Context Navigation

bhab_3128_priv.c

Last change on this file was 2, checked in by jglee, 11 years ago
first commit
Property svn:executable set to ``*
File size: 59.1 KB

Line
1	/***************************************************************************
2	* Copyright (c) 2003-2011, Broadcom Corporation
3	* All Rights Reserved
4	* Confidential Property of Broadcom Corporation
5	*
6	* THIS SOFTWARE MAY ONLY BE USED SUBJECT TO AN EXECUTED SOFTWARE LICENSE
7	* AGREEMENT BETWEEN THE USER AND BROADCOM. YOU HAVE NO RIGHT TO USE OR
8	* EXPLOIT THIS MATERIAL EXCEPT SUBJECT TO THE TERMS OF SUCH AN AGREEMENT.
9	*
10	* $brcm_Workfile: bhab_3128_priv.c $
11	* $brcm_Revision: Hydra_Software_Devel/9 $
12	* $brcm_Date: 5/11/11 2:45p $
13	*
14	*
15	* Revision History:
16	*
17	* $brcm_Log: X:/win_views/97231/magnum/basemodules/hab/3128/bhab_3128_priv.c $
18	*
19	* Hydra_Software_Devel/9 5/11/11 2:45p vishk
20	* SW3128-2: Added support to configure TM_MTSIF_CTRL - Transport Control.
21	* Move the MTSIF settings from BHAB_Open() to BHAB_ResetAp().
22	*
23	* Hydra_Software_Devel/8 5/6/11 3:49p atanugul
24	* SW3128-2: Added support to configure TM_MTSIF_CTRL - Transport Control
25	* Register for BCM3128
26	*
27	* Hydra_Software_Devel/7 5/6/11 12:46p atanugul
28	* SW3128-2: Fix AOB status and BHAB_3128_SendHabCommand()
29	*
30	* Hydra_Software_Devel/6 4/29/11 10:16a atanugul
31	* SW3128-8: Add SPI support for 3128
32	*
33	* Hydra_Software_Devel/5 4/15/11 4:41p atanugul
34	* SW3128-6: Fixed ADS Reset Status and Get Status
35	*
36	* Hydra_Software_Devel/4 4/13/11 7:18p vishk
37	* SW7425-328: Hab timeout seen upon NEXUS_Frontend_Untune()
38	*
39	* Hydra_Software_Devel/3 4/8/11 4:37p vishk
40	* SW3128-4: Bus Error due to channel callbacks called for the ones not
41	* opened too.
42	*
43	* Hydra_Software_Devel/2 3/28/11 12:13p atanugul
44	* SW3128-2: Add Support for 8 cores and code cleanup
45	*
46	* Hydra_Software_Devel/1 3/4/11 3:10p vishk
47	* SW7422-171: Nexus support for the 3128 (8 ADS core + tuner on daughter
48	* board) plug on 7422 board
49	*
50	* Hydra_Software_Devel/3 3/2/11 3:24p atanugul
51	* SW3128-2: Add Support for BCM3128
52	*
53	* Hydra_Software_Devel/2 2/2/11 12:46p atanugul
54	* SW3128-2: Add Support for BCM3128
55	*
56	* Hydra_Software_Devel/1 2/1/11 10:44a atanugul
57	* SW3128-2: Add Support for BCM3128
58	*
59	***************************************************************************/
60	#include "bhab_3128_priv.h"
61	#include "bhab_3128_bbsi.h"
62	#include "bchp_leap_ctrl.h"
63	#include "bchp_leap_hab_mem.h"
64	#include "bchp_tm.h"
65
66
67	BDBG_MODULE(bhab_3128_priv);
68
69	/******************************************************************************
70	BHAB_3128_Open()
71	******************************************************************************/
72	BERR_Code BHAB_3128_Open(
73	BHAB_Handle handle, / [out] BHAB handle */
74	void pReg, / [in] pointer ot i2c or spi handle */
75	const BHAB_Settings pDefSettings / [in] Default Settings */
76	)
77	{
78	BERR_Code retCode = BERR_SUCCESS;
79	BHAB_Handle hDev;
80	BHAB_3128_P_Handle *h3128Dev;
81	unsigned i;
82
83	BDBG_ASSERT(pDefSettings->interruptEnableFunc);
84
85	hDev = (BHAB_Handle)BKNI_Malloc(sizeof(BHAB_P_Handle));
86	BDBG_ASSERT(hDev);
87	h3128Dev = (BHAB_3128_P_Handle *)BKNI_Malloc(sizeof(BHAB_3128_P_Handle));
88	BDBG_ASSERT(h3128Dev);
89	BKNI_Memset( h3128Dev, 0x00, sizeof(BHAB_3128_P_Handle));
90	hDev->pImpl = (void*)h3128Dev;
91
92	if(pDefSettings->isSpi) {
93	h3128Dev->hSpiRegister = (BREG_SPI_Handle)pReg;
94	}
95	else {
96	h3128Dev->hI2cRegister = (BREG_I2C_Handle)pReg;
97	}
98
99	BKNI_Memcpy((void)(&(hDev->settings)), (void)pDefSettings, sizeof(BHAB_Settings));
100
101	/* create events */
102	BHAB_CHK_RETCODE(BKNI_CreateEvent(&(h3128Dev->hInterruptEvent)));
103	BHAB_CHK_RETCODE(BKNI_CreateEvent(&(h3128Dev->hApiEvent)));
104	BHAB_CHK_RETCODE(BKNI_CreateEvent(&(h3128Dev->hInitDoneEvent)));
105	BHAB_CHK_RETCODE(BKNI_CreateEvent(&(h3128Dev->hHabDoneEvent)));
106	BHAB_CHK_RETCODE(BKNI_CreateMutex(&(h3128Dev->hMutex)));
107
108	for(i=0; i<BHAB_DevId_eMax; i++){
109	h3128Dev->InterruptCallbackInfo[i].func = NULL;
110	h3128Dev->InterruptCallbackInfo[i].pParm1 = NULL;
111	h3128Dev->InterruptCallbackInfo[i].parm2 = (int)NULL;
112	}
113
114	BKNI_Memset( &h3128Dev->nmiSettings, 0x00, sizeof(BHAB_NmiSettings));
115	BKNI_Memset( &h3128Dev->wdtSettings, 0x00, sizeof(BHAB_WatchDogTimerSettings));
116
117	h3128Dev->isSpi = pDefSettings->isSpi;
118	h3128Dev->isMtsif = pDefSettings->isMtsif;
119
120	retCode = BHAB_3128_P_DisableInterrupts(hDev);
121	done:
122	*handle = hDev;
123
124	return retCode;
125	}
126
127
128	/******************************************************************************
129	BHAB_3128_Close()
130	******************************************************************************/
131	BERR_Code BHAB_3128_Close(BHAB_Handle handle)
132	{
133	BERR_Code retCode = BERR_SUCCESS;
134	BHAB_3128_P_Handle p3128 = (BHAB_3128_P_Handle )(handle->pImpl);
135	uint32_t sb, buf;
136
137	BDBG_ASSERT(handle);
138
139	/* If we didn't load the AP when starting, don't reset it when closing */
140	if (p3128->loadAP)
141	{
142	/* reset all interrupt status */
143	buf = 0;
144	BHAB_CHK_RETCODE(BHAB_3128_WriteRegister(handle, BCHP_LEAP_CTRL_HOST_IRQ, &buf));
145	BHAB_CHK_RETCODE(BHAB_3128_WriteRegister(handle, BCHP_LEAP_CTRL_SPARE, &buf));
146
147	/* reset the AP */
148	sb = 0x01;
149	retCode = BHAB_3128_WriteRegister(handle, BCHP_LEAP_CTRL_CTRL, &sb);
150
151	if(retCode)
152	BDBG_WRN(("Ap not in reset."));
153	}
154
155	retCode = BHAB_3128_P_DisableInterrupts(handle);
156	done:
157	if (p3128->hInterruptEvent) {BKNI_DestroyEvent(p3128->hInterruptEvent);}
158	if (p3128->hApiEvent){BKNI_DestroyEvent(p3128->hApiEvent);}
159	if (p3128->hInitDoneEvent){BKNI_DestroyEvent(p3128->hInitDoneEvent);}
160	if (p3128->hHabDoneEvent){BKNI_DestroyEvent(p3128->hHabDoneEvent);}
161	if (p3128->hMutex){BKNI_DestroyMutex(p3128->hMutex);}
162
163	BKNI_Free((void*)p3128);
164	BKNI_Free((void*)handle);
165
166	return retCode;
167	}
168
169
170	/******************************************************************************
171	BHAB_3128_P_InitAp()
172	******************************************************************************/
173	BERR_Code BHAB_3128_InitAp(
174	BHAB_Handle handle, /* [in] BHAB handle */
175	const uint8_t pHexImage / [in] pointer to BCM3128 microcode image */
176	)
177	{
178	BERR_Code retCode = BERR_SUCCESS;
179	BHAB_3128_P_Handle p3128 = (BHAB_3128_P_Handle )(handle->pImpl);
180	uint32_t n, instlen, datalen, instaddr, dataaddr;
181	const uint8_t *pImage;
182	uint8_t retries, count=0;
183
184	/* We are loading AP code, it is appropriate to reset the AP when closing */
185	p3128->loadAP = true;
186
187	/* Disable host interrupt */
188	BHAB_CHK_RETCODE(BHAB_3128_P_EnableHostInterrupt(handle, false));
189
190	/* reset the AP before downloading the microcode */
191	BHAB_CHK_RETCODE(BHAB_3128_P_ResetAp(handle));
192
193	if (pHexImage)
194	{
195	/* download to RAM */
196	pImage = pHexImage;
197
198	instlen = (pImage[10] << 16) \| (pImage[11] << 8) \| pImage[12];
199	datalen = (pImage[16] << 16) \| (pImage[17] << 8) \| pImage[18];
200	n = instlen + datalen;
201	if (n != 0)
202	{
203	instaddr = (pImage[7] << 16) \| (pImage[8] << 8) \| pImage[9];
204	dataaddr = (pImage[13] << 16) \| (pImage[14] << 8) \| pImage[15];
205
206	for (retries = 0; retries < 3; retries++)
207	{
208	BHAB_CHK_RETCODE(BHAB_3128_WriteMemory(handle, instaddr, &pImage[19], instlen));
209	/BHAB_CHK_RETCODE(BHAB_3128_WriteMemory(handle, dataaddr, &pImage[19 + instlen] , datalen)); /
210	break;
211	}
212
213	if (retries == 3)
214	return(BERR_OS_ERROR);
215	}
216
217	}
218
219	/* enable init done interrupt */
220	BHAB_CHK_RETCODE(BHAB_3128_P_EnableInitDoneInterrupt(handle));
221
222	/* start running the AP */
223	if ((retCode = BHAB_3128_P_RunAp(handle)) != BERR_SUCCESS)
224	return retCode;
225
226	for (count = 0; count < BHAB_INIT_RETRIES; count++) {
227	/* wait for init done interrupt */
228	if (BHAB_3128_P_WaitForEvent(handle, p3128->hInitDoneEvent, 150) == BERR_SUCCESS)
229	break;
230	/* Disable host interrupt */
231	BHAB_CHK_RETCODE(BHAB_3128_P_EnableHostInterrupt(handle, false));
232	}
233
234	if (count < BHAB_INIT_RETRIES)
235	retCode = BERR_SUCCESS;
236	else
237	{
238	/* reset the AP before running */
239	BHAB_CHK_RETCODE(BHAB_3128_P_ResetAp(handle));
240	BKNI_Sleep(10);
241	BDBG_WRN(("AP initialization timeout. Starting over %d times", count));
242	BERR_TRACE(retCode = BHAB_ERR_AP_NOT_INIT);
243	}
244
245	done:
246	return retCode;
247	}
248
249
250	/******************************************************************************
251	BHAB_3128_GetApStatus()
252	******************************************************************************/
253	BERR_Code BHAB_3128_GetApStatus(
254	BHAB_Handle handle, /* [in] HAB device handle */
255	BHAB_ApStatus pStatus / [out] AP status */
256	)
257	{
258	BERR_Code retCode = BERR_SUCCESS;
259	uint32_t sb;
260
261	*pStatus = 0;
262	BHAB_CHK_RETCODE(BHAB_3128_ReadRegister(handle, BCHP_LEAP_CTRL_SPARE, &sb));
263	*pStatus = sb;
264
265	done:
266	return retCode;
267	}
268
269
270	/******************************************************************************
271	BHAB_3128_GetApVersion()
272	******************************************************************************/
273	BERR_Code BHAB_3128_GetApVersion(
274	BHAB_Handle handle, /* [in] BHAB handle */
275	uint16_t pChipId, / [out] BHAB chip ID */
276	uint16_t pChipVer, / [out] chip revision number */
277	uint8_t pApVer, / [out] AP microcode version */
278	uint8_t pScrVer, / [out] acquisition script version */
279	uint8_t pCfgVer / [out] host configuration version */
280	)
281	{
282	BERR_Code retCode = BERR_SUCCESS;
283	uint8_t buf[8];
284
285	buf[0] = ((BHAB_GETVERSION >> 2) & 0xFF);
286	buf[1] = (((BHAB_GETVERSION & 0x3) << 6) \| ((PAYLOAD_LEN >> 4) & 0x3F));
287	buf[2] = ((PAYLOAD_LEN & 0xF) << 4);
288	buf[3] = CORE_ID;
289	buf[4] = 0; /* CRC */
290
291	BHAB_CHK_RETCODE(BHAB_3128_SendHabCommand(handle, buf, 5, buf, 8, false, true, 8));
292	*pChipId = ((buf[4] << 8) \| buf[5]);
293	*pChipVer = ((buf[6] << 8) \| buf[7]);
294	*pApVer = buf[5];
295	pScrVer = 0; / Not supported */
296	pCfgVer = 0; / Not supported */
297
298	done:
299	return retCode;
300	}
301
302
303	/******************************************************************************
304	BHAB_3128_ReadMemory()
305	******************************************************************************/
306	BERR_Code BHAB_3128_ReadMemory(BHAB_Handle handle, uint32_t addr, uint8_t *buf, uint32_t n)
307	{
308	BERR_Code retCode = BERR_SUCCESS;
309	BHAB_3128_P_Handle p3128 = (BHAB_3128_P_Handle )(handle->pImpl);
310	uint8_t sb, data, offset, readbuf[8], writebuf[8];
311	uint32_t sb1;
312	uint16_t bytes_left;
313
314	if (((uint32_t)addr + (uint32_t)n) > (BCHP_LEAP_HAB_MEM_WORDi_ARRAY_BASE + 128))
315	return BERR_TRACE(BERR_INVALID_PARAMETER);
316
317	sb1 = ((addr & 0x000000FF) << 24 \|
318	(addr & 0x0000FF00) << 8 \|
319	(addr & 0x00FF0000) >> 8 \|
320	(addr & 0xFF000000) >> 24 );
321
322	if(p3128->isSpi){
323	/* enable read mode and speculative read */
324	writebuf[0] = (handle->settings.chipAddr << 1) \| 0x1;
325	writebuf[1] = CSR_CONFIG;
326	writebuf[2] = CSR_CONFIG_READ_RBUS_READ \| (CSR_CONFIG_SPECULATIVE_READ_EN_BITS << CSR_CONFIG_SPECULATIVE_READ_EN_SHIFT);
327	BREG_SPI_Write(p3128->hSpiRegister, writebuf, 3);
328
329	/* set CSR pointer to point to ADDR0 and set RBUS address to read */
330	writebuf[1] = CSR_RBUS_ADDR0;
331	writebuf[2] = sb1;
332	writebuf[3] = (sb1 >> 8);
333	writebuf[4] = (sb1 >> 16);
334	writebuf[5] = (sb1 >> 24);
335	BREG_SPI_Write(p3128->hSpiRegister, writebuf, 6);
336
337	writebuf[0] = (handle->settings.chipAddr << 1);
338	for (offset = 0; offset < n/4 * 4; offset+=4) {
339	writebuf[1] = CSR_RBUS_DATA0;
340	BREG_SPI_Read(p3128->hSpiRegister, writebuf, readbuf, 6);
341	*buf++ = readbuf[2];
342	*buf++ = readbuf[3];
343	*buf++ = readbuf[4];
344	*buf++ = readbuf[5];
345
346	while(1) /* modify*/
347	{
348	writebuf[1] = CSR_STATUS;
349	BREG_SPI_Read(p3128->hSpiRegister, writebuf, readbuf, 3);
350	if (readbuf[2] == BHAB_CPU_RUNNIG)
351	break;
352	}
353	}
354
355	/* Read the bytes left */
356	bytes_left = n%4;
357	if(bytes_left)
358	{
359	BREG_SPI_Read(p3128->hSpiRegister, writebuf, readbuf, 2+bytes_left);
360	*buf++ = readbuf[2];
361	*buf++ = readbuf[3];
362	}
363
364	/* set it back to the default write mode */
365	writebuf[0] = (handle->settings.chipAddr << 1) \| 0x1;
366	writebuf[1] = CSR_CONFIG;
367	writebuf[2] = 0;
368	BREG_SPI_Write(p3128->hSpiRegister, writebuf, 3);
369	}
370	else {
371	/* enable read mode and speculative read*/
372	data = CSR_CONFIG_READ_RBUS_READ \| (CSR_CONFIG_SPECULATIVE_READ_EN_BITS << CSR_CONFIG_SPECULATIVE_READ_EN_SHIFT);
373	BHAB_CHK_RETCODE(BREG_I2C_Write(p3128->hI2cRegister, handle->settings.chipAddr, CSR_CONFIG, &data, 1));
374
375	/* set CSR pointer to point to ADDR0 and set RBUS address to read */
376	BHAB_CHK_RETCODE(BREG_I2C_Write(p3128->hI2cRegister, handle->settings.chipAddr, CSR_RBUS_ADDR0, (uint8_t *)&sb1, 4));
377
378	/* poll the busy bit to make sure the transaction is completed */
379	sb=0;
380	while(1)
381	{
382	BHAB_CHK_RETCODE(BREG_I2C_P_Read3128(p3128->hI2cRegister, handle->settings.chipAddr, CSR_STATUS, &sb, 1));
383	if (sb == BHAB_CPU_RUNNIG)
384	break;
385	}
386
387	for (offset = 0; offset < n; offset+=4) {
388	BHAB_CHK_RETCODE(BREG_I2C_P_Read3128(p3128->hI2cRegister, handle->settings.chipAddr, CSR_RBUS_DATA0, buf+offset, 4));
389	while(1)
390	{
391	BHAB_CHK_RETCODE(BREG_I2C_P_Read3128(p3128->hI2cRegister, handle->settings.chipAddr, CSR_STATUS, &sb, 1));
392	if(sb == BHAB_CPU_RUNNIG)
393	break;
394	}
395	}
396
397	data =0;
398	BHAB_CHK_RETCODE(BREG_I2C_Write(p3128->hI2cRegister, handle->settings.chipAddr, CSR_CONFIG, &data, 1));
399	}
400	done:
401	return retCode;
402	}
403
404
405	/******************************************************************************
406	BHAB_3128_WriteMemory()
407	******************************************************************************/
408	BERR_Code BHAB_3128_WriteMemory(BHAB_Handle handle, uint32_t addr, const uint8_t *buf, uint32_t n)
409	{
410	BERR_Code retCode = BERR_SUCCESS;
411	BHAB_3128_P_Handle p3128 = (BHAB_3128_P_Handle )(handle->pImpl);
412	uint8_t pad, sb, i=0, k=0;
413	uint16_t bytes_left;
414	uint32_t data, sb1, curr_addr, j=0;
415	uint8_t readbuf[8], writebuf[8];
416
417	if ((addr + n) >= (BCHP_LEAP_HAB_MEM_WORDi_ARRAY_BASE +128))
418	return BERR_TRACE(BERR_INVALID_PARAMETER);
419
420	sb1 = ((addr & 0x000000FF) << 24 \|
421	(addr & 0x0000FF00) << 8 \|
422	(addr & 0x00FF0000) >> 8 \|
423	(addr & 0xFF000000) >> 24 );
424
425	if(p3128->isSpi)
426	{
427	/* set CSR pointer to point to ADDR0 and set RBUS address to zero */
428	writebuf[0] = (handle->settings.chipAddr << 1) \| 0x1;
429	writebuf[1] = CSR_CONFIG;
430	writebuf[2] = 0;
431	BREG_SPI_Write(p3128->hSpiRegister, writebuf, 3);
432
433	writebuf[1] = CSR_RBUS_ADDR0;
434	writebuf[2] = sb1;
435	writebuf[3] = (sb1 >> 8);
436	writebuf[4] = (sb1 >> 16);
437	writebuf[5] = (sb1 >> 24);
438	BREG_SPI_Write(p3128->hSpiRegister, writebuf, 6);
439
440	writebuf[1] = CSR_RBUS_DATA0;/Modify/
441	for (j = 0; j < n/4 * 4; j+=4) {
442	writebuf[2] = (((uint8_t )buf+j+0));
443	writebuf[3] = (((uint8_t )buf+j+1));
444	writebuf[4] = (((uint8_t )buf+j+2));
445	writebuf[5] = (((uint8_t )buf+j+3));
446	BREG_SPI_Write(p3128->hSpiRegister, writebuf, 6);
447	}
448
449	/* pad with zeros at the end, so that an RBUS write can be triggered
450	for the last word */
451	bytes_left = n%4;
452	if(bytes_left)
453	{
454	writebuf[0] = (handle->settings.chipAddr << 1) \| 0x1;
455	writebuf[1] = CSR_RBUS_DATA0;
456	for(i=0; i<bytes_left; i++)
457	{
458	writebuf[2+i] = (((uint8_t )buf+j+i));
459	}
460	for(k=0; k<(4-bytes_left); k++)
461	{
462	writebuf[2+i+k] = 0;
463	}
464	BREG_SPI_Write(p3128->hSpiRegister, writebuf, 6);
465	}
466	/* check for host transfer error */
467	writebuf[0] = (handle->settings.chipAddr << 1);
468	writebuf[1] = CSR_STATUS;
469	for(i=0; i < 5; i++){
470	BKNI_Sleep(10);
471	BREG_SPI_Read(p3128->hSpiRegister, writebuf, readbuf, 3);
472	if ((readbuf[2] & CSR_STATUS_ERROR_BITS) == 0)
473	break;
474	}
475	if(i==5)
476	BDBG_WRN(("Write transaction not finished"));
477	}
478	else
479	{
480
481	data = 0;
482	BHAB_CHK_RETCODE(BREG_I2C_Write(p3128->hI2cRegister, handle->settings.chipAddr, CSR_CONFIG, (uint8_t *)&data, 1));
483
484	/* set CSR pointer to point to ADDR0 and set RBUS address to zero */
485	BHAB_CHK_RETCODE(BREG_I2C_Write(p3128->hI2cRegister, handle->settings.chipAddr, CSR_RBUS_ADDR0, (uint8_t *)&sb1, 4));
486
487	/* set CSR pointer to point to DATA0 and provide the data to be downloaded */
488	BHAB_CHK_RETCODE(BREG_I2C_Write(p3128->hI2cRegister, handle->settings.chipAddr, CSR_RBUS_DATA0, buf, n));
489
490	/* check for host transfer error */
491	for(i=0; i < 5; i++){
492	BKNI_Sleep(10);
493	BHAB_CHK_RETCODE(BREG_I2C_P_Read3128(p3128->hI2cRegister, handle->settings.chipAddr, CSR_STATUS, &sb, 1));
494	if ((sb & CSR_STATUS_ERROR_BITS) == 0)
495	break;
496	}
497	if(i==5)
498	BDBG_WRN(("Write transaction not finished"));
499
500	bytes_left = n%4;
501
502	/* pad with zeros at the end, so that an RBUS write can be triggered for the last word */
503	if(bytes_left)
504	{
505	pad = 0;
506	curr_addr = CSR_RBUS_ADDR0 + 4 - bytes_left;
507	for(i=1; i<=bytes_left; i++)
508	{
509	BHAB_CHK_RETCODE(BREG_I2C_Write(p3128->hI2cRegister, handle->settings.chipAddr, curr_addr++, &pad, 1));
510	}
511	}
512
513	/* check for host transfer error */
514	writebuf[0] = (handle->settings.chipAddr << 1);
515	writebuf[1] = CSR_STATUS;
516	for(i=0; i < 5; i++){
517	BKNI_Sleep(10);
518	BHAB_CHK_RETCODE(BREG_I2C_P_Read3128(p3128->hI2cRegister, handle->settings.chipAddr, CSR_STATUS, &sb, 1));
519	if ((sb & CSR_STATUS_ERROR_BITS) == 0)
520	break;
521	}
522	if(i==5)
523	BDBG_WRN(("Write transaction not finished"));
524	}
525	done:
526	return retCode;
527	}
528
529
530	/******************************************************************************
531	BHAB_3128_ReadMbox()
532	******************************************************************************/
533	BERR_Code BHAB_3128_ReadMbox(
534	BHAB_Handle handle, /* [in] BHAB PI Handle */
535	uint32_t reg, /* [in] RBUS register address */
536	uint32_t val / [out] value read from register */
537	)
538	{
539	BERR_Code retCode = BERR_SUCCESS;
540	BSTD_UNUSED(handle);
541	BSTD_UNUSED(reg);
542	BSTD_UNUSED(val);
543
544	return retCode;
545	}
546
547
548	/******************************************************************************
549	BHAB_3128_WriteMbox()
550	******************************************************************************/
551	BERR_Code BHAB_3128_WriteMbox(
552	BHAB_Handle handle, /* [in] BHAB PI Handle */
553	uint32_t reg, /* [in] RBUS register address */
554	uint32_t val / [in] value to write */
555	)
556	{
557	BERR_Code retCode = BERR_SUCCESS;
558	BSTD_UNUSED(handle);
559	BSTD_UNUSED(reg);
560	BSTD_UNUSED(val);
561
562	return retCode;
563	}
564
565
566	/******************************************************************************
567	BHAB_3128_ReadRegister()
568	******************************************************************************/
569	BERR_Code BHAB_3128_ReadRegister(
570	BHAB_Handle handle, /* [in] BHAB PI Handle */
571	uint32_t reg, /* [in] RBUS register address */
572	uint32_t val / [out] value read from register */
573	)
574	{
575	BERR_Code retCode = BERR_SUCCESS;
576	BHAB_3128_P_Handle p3128 = (BHAB_3128_P_Handle )(handle->pImpl);
577	uint8_t data, sb, buf[4], i=0;
578	uint32_t sb1;
579	uint8_t readbuf[8], writebuf[8];
580
581	/* set CSR pointer to point to ADDR0 and set RBUS address to read */
582	sb1 = ((reg & 0x000000FF) << 24 \|
583	(reg & 0x0000FF00) << 8 \|
584	(reg & 0x00FF0000) >> 8 \|
585	(reg & 0xFF000000) >> 24 );
586
587	if(p3128->isSpi)
588	{
589	readbuf[2] = 0;
590
591	writebuf[0] = (handle->settings.chipAddr << 1) \| 0x1;
592	writebuf[1] = CSR_CONFIG;
593	writebuf[2] = 0;
594	BREG_SPI_Write (p3128->hSpiRegister, writebuf, 3);
595
596	/* enable read mode and speculative read */
597	writebuf[0] = (handle->settings.chipAddr << 1);
598	writebuf[1] = CSR_CONFIG;
599	BREG_SPI_Read(p3128->hSpiRegister, writebuf, readbuf, 3);
600
601	writebuf[0] = (handle->settings.chipAddr << 1) \| 0x1;
602	readbuf[2] &= ~CSR_CONFIG_READ_RBUS_MASK;
603	readbuf[2] \|= ((CSR_CONFIG_READ_RBUS_READ << CSR_CONFIG_READ_RBUS_SHIFT) \| (1 << CSR_CONFIG_NO_RBUS_ADDR_INC_SHIFT));
604	writebuf[2] = readbuf[2];
605	BREG_SPI_Write(p3128->hSpiRegister, writebuf, 3);
606
607	/* set CSR pointer to point to ADDR0 and set RBUS address to write */
608	writebuf[1] = CSR_RBUS_ADDR0;
609	writebuf[2] = sb1;
610	writebuf[3] = (sb1 >> 8);
611	writebuf[4] = (sb1 >> 16);
612	writebuf[5] = (sb1 >> 24);
613	BREG_SPI_Write(p3128->hSpiRegister, writebuf, 6);
614
615	/* poll the busy bit to make sure the transaction is completed */
616	writebuf[0] = (handle->settings.chipAddr << 1);
617	writebuf[1] = CSR_STATUS;
618	for(i=0; i < 5; i++){
619	BKNI_Sleep(10);
620	BREG_SPI_Read(p3128->hSpiRegister, writebuf, readbuf, 3);
621	if ((readbuf[2] & (1 << CSR_STATUS_BUSY_SHIFT)) == 0)
622	break;
623	}
624	if(i==5)
625	BDBG_WRN(("Read transaction not finished"));
626
627	/* read data*/
628	writebuf[0] = (handle->settings.chipAddr << 1);
629	writebuf[1] = CSR_RBUS_DATA0;
630	BREG_SPI_Read(p3128->hSpiRegister, writebuf, readbuf, 6);
631
632	*val = (readbuf[2] << 24) \| (readbuf[3] << 16) \| (readbuf[4] << 8) \| readbuf[5];
633
634	/* set READ_RBUS to the reset value for write mode */
635	writebuf[0] = (handle->settings.chipAddr << 1) \| 0x1;
636	writebuf[1] = CSR_CONFIG;
637	writebuf[2] = CSR_CONFIG_READ_RBUS_WRITE;
638	BREG_SPI_Write(p3128->hSpiRegister, writebuf, 3);
639	}
640	else
641	{
642	data=0;
643	BHAB_CHK_RETCODE(BREG_I2C_Write(p3128->hI2cRegister, handle->settings.chipAddr, CSR_CONFIG, (uint8_t *)&data, 1));
644
645	/* read CSR_CONFIG value*/
646	BHAB_CHK_RETCODE(BREG_I2C_P_Read3128(p3128->hI2cRegister, handle->settings.chipAddr, CSR_CONFIG, &data, 1));
647	data &= ~CSR_CONFIG_READ_RBUS_MASK;
648	data \|= ((CSR_CONFIG_READ_RBUS_READ << CSR_CONFIG_READ_RBUS_SHIFT) \| (1 << CSR_CONFIG_NO_RBUS_ADDR_INC_SHIFT));
649
650	/* set READ_RBUS to the reset value for read mode */
651	BHAB_CHK_RETCODE(BREG_I2C_Write(p3128->hI2cRegister, handle->settings.chipAddr, CSR_CONFIG, &data, 1));
652
653	BHAB_CHK_RETCODE(BREG_I2C_Write(p3128->hI2cRegister, handle->settings.chipAddr, CSR_RBUS_ADDR0, (uint8_t *)&sb1, 4));
654
655	/* poll the busy bit to make sure the transaction is completed */
656	for(i=0; i < 5; i++){
657	BKNI_Sleep(10);
658	retCode = BREG_I2C_P_Read3128(p3128->hI2cRegister, handle->settings.chipAddr, CSR_STATUS, &sb, 1);
659	if ((sb & (1 << CSR_STATUS_BUSY_SHIFT)) == 0)
660	break;
661	}
662	if(i==5)
663	BDBG_WRN(("Read transaction not finished\n"));
664
665	/* read the data */
666	BHAB_CHK_RETCODE(BREG_I2C_P_Read3128(p3128->hI2cRegister, handle->settings.chipAddr, CSR_RBUS_DATA0, buf, 4));
667	*val = (buf[0] << 24) \| (buf[1] << 16) \| (buf[2] << 8) \| buf[3];
668
669	/* set READ_RBUS to the reset value for write mode */
670	data = CSR_CONFIG_READ_RBUS_WRITE;
671	BHAB_CHK_RETCODE(BREG_I2C_Write(p3128->hI2cRegister, handle->settings.chipAddr, CSR_CONFIG, &data, 1));
672	}
673	done:
674	return retCode;
675	}
676
677
678	/******************************************************************************
679	BHAB_3128_WriteRegister()
680	******************************************************************************/
681	BERR_Code BHAB_3128_WriteRegister(
682	BHAB_Handle handle, /* [in] BHAB PI Handle */
683	uint32_t reg, /* [in] RBUS register address */
684	uint32_t val / [in] value to write */
685	)
686	{
687	BERR_Code retCode = BERR_SUCCESS;
688	BHAB_3128_P_Handle p3128 = (BHAB_3128_P_Handle )(handle->pImpl);
689	uint8_t data, sb, buf[4], i=0;
690	uint32_t sb1;
691	uint8_t readbuf[8], writebuf[8];
692
693	BSTD_UNUSED(reg);
694
695	sb1 = ((reg & 0x000000FF) << 24 \|
696	(reg & 0x0000FF00) << 8 \|
697	(reg & 0x00FF0000) >> 8 \|
698	(reg & 0xFF000000) >> 24 );
699
700	if(p3128->isSpi)
701	{
702	/* enable write mode */
703	writebuf[0] = (handle->settings.chipAddr << 1);
704	writebuf[1] = CSR_CONFIG;
705	BREG_SPI_Read (p3128->hSpiRegister, writebuf, readbuf, 3);
706
707	writebuf[0] = (handle->settings.chipAddr << 1) \| 0x1;
708	readbuf[2] &= ~CSR_CONFIG_READ_RBUS_MASK;
709	readbuf[2] \|= (CSR_CONFIG_READ_RBUS_WRITE << CSR_CONFIG_READ_RBUS_SHIFT);
710	writebuf[2] = readbuf[2];
711	BREG_SPI_Write (p3128->hSpiRegister, writebuf, 3);
712
713	/* set CSR pointer to point to ADDR0 and set RBUS address to write */
714	writebuf[1] = CSR_RBUS_ADDR0;
715	writebuf[2] = sb1;
716	writebuf[3] = (sb1 >> 8);
717	writebuf[4] = (sb1 >> 16);
718	writebuf[5] = (sb1 >> 24);
719	BREG_SPI_Write (p3128->hSpiRegister, writebuf, 6);
720
721	/* write to RBUS*/
722	writebuf[1] = CSR_RBUS_DATA0;
723	writebuf[2] = ((uint8_t )val+3);
724	writebuf[3] = ((uint8_t )val+2);
725	writebuf[4] = ((uint8_t )val+1);
726	writebuf[5] = ((uint8_t )val+0);
727
728	BREG_SPI_Write (p3128->hSpiRegister, writebuf, 6);
729
730	/* poll the busy bit to make sure the transaction is completed */
731	writebuf[0] = (handle->settings.chipAddr << 1);
732	writebuf[1] = CSR_STATUS;
733	for(i=0; i < 5; i++){
734	BKNI_Sleep(10);
735	BREG_SPI_Read(p3128->hSpiRegister, writebuf, readbuf, 3);
736	if ((readbuf[2] & (1 << CSR_STATUS_BUSY_SHIFT)) == 0)
737	break;
738	}
739	if(i==5)
740	BDBG_WRN(("Write transaction not finished"));
741	}
742	else {
743	/* read CSR_CONFIG value*/
744	BHAB_CHK_RETCODE(BREG_I2C_P_Read3128(p3128->hI2cRegister, handle->settings.chipAddr, CSR_CONFIG, &data, 1));
745
746	data &= ~CSR_CONFIG_READ_RBUS_MASK;
747	data \|= (CSR_CONFIG_READ_RBUS_WRITE << CSR_CONFIG_READ_RBUS_SHIFT);
748
749	/* set READ_RBUS to the reset value for write mode */
750	BHAB_CHK_RETCODE(BREG_I2C_Write(p3128->hI2cRegister, handle->settings.chipAddr, CSR_CONFIG, &data, 1));
751
752	/* set CSR pointer to point to ADDR0 and set RBUS address to write */
753	BHAB_CHK_RETCODE(BREG_I2C_Write(p3128->hI2cRegister, handle->settings.chipAddr, CSR_RBUS_ADDR0, (uint8_t *)&sb1, 4));
754
755	sb1 = ((((uint8_t )val+0)) << 24 \|
756	(((uint8_t )val+1)) << 16 \|
757	(((uint8_t )val+2)) << 8 \|
758	(((uint8_t )val+3)));
759
760	/* write to RBUS*/
761	BHAB_CHK_RETCODE(BREG_I2C_Write(p3128->hI2cRegister, handle->settings.chipAddr, CSR_RBUS_DATA0, (uint8_t *)&sb1, 4));
762
763	BHAB_CHK_RETCODE(BREG_I2C_P_Read3128(p3128->hI2cRegister, handle->settings.chipAddr, CSR_RBUS_DATA0, buf, 4));
764
765	/* poll the busy bit to make sure the transaction is completed */
766	for(i=0; i < 5; i++){
767	BKNI_Sleep(10);
768	retCode = BREG_I2C_P_Read3128(p3128->hI2cRegister, handle->settings.chipAddr, CSR_STATUS, &sb, 1);
769	if ((sb & (1 << CSR_STATUS_BUSY_SHIFT)) == 0)
770	break;
771	}
772	if(i==5)
773	BDBG_WRN(("Write transaction not finished\n"));
774	}
775
776	done:
777	return retCode;
778	}
779
780
781	/******************************************************************************
782	BHAB_3128_HandleInterrupt_isr()
783	******************************************************************************/
784	BERR_Code BHAB_3128_HandleInterrupt_isr(
785	BHAB_Handle handle /* [in] BHAB handle */
786	)
787	{
788	BHAB_3128_P_Handle p3128 = (BHAB_3128_P_Handle )(handle->pImpl);
789	BKNI_ASSERT_ISR_CONTEXT();
790
791	BDBG_ASSERT(handle);
792	handle->settings.interruptEnableFunc(false, handle->settings.interruptEnableFuncParam);
793
794	BKNI_SetEvent(p3128->hApiEvent);
795	BKNI_SetEvent(p3128->hInterruptEvent);
796	return BERR_SUCCESS;
797	}
798
799
800	/******************************************************************************
801	BHAB_3128_ProcessInterruptEvent()
802	******************************************************************************/
803	BERR_Code BHAB_3128_ProcessInterruptEvent(
804	BHAB_Handle handle /* [in] BHAB handle */
805	)
806	{
807	BERR_Code retCode = BERR_SUCCESS;
808	BDBG_ASSERT(handle);
809
810	BHAB_3128_P_EnableHostInterrupt(handle, false);
811	BHAB_CHK_RETCODE(BHAB_3128_P_DecodeInterrupt(handle));
812	BHAB_3128_P_EnableHostInterrupt(handle, true);
813
814	done:
815	return retCode;
816	}
817
818
819	/******************************************************************************
820	BHAB_3128_EnableLockInterrupt()
821	******************************************************************************/
822	BERR_Code BHAB_3128_EnableLockInterrupt(
823	BHAB_Handle handle, /* [in] BHAB handle */
824	BHAB_DevId eDevId, /* [in] Device ID */
825	bool bEnable /* [in] true = enable Lock interrupt */
826	)
827	{
828	BERR_Code retCode = BERR_SUCCESS;
829	BSTD_UNUSED(handle);
830	BSTD_UNUSED(eDevId);
831	BSTD_UNUSED(bEnable);
832
833	return retCode;
834	}
835
836
837	/******************************************************************************
838	BHAB_3128_InstallInterruptCallback()
839	******************************************************************************/
840	BERR_Code BHAB_3128_InstallInterruptCallback(
841	BHAB_Handle handle, /* [in] BHAB handle */
842	BHAB_DevId eDevId, /* [in] Device ID */
843	BHAB_IntCallbackFunc fCallBack,
844	void * pParm1,
845	int parm2
846	)
847	{
848	BHAB_P_CallbackInfo *callback;
849	BHAB_3128_P_Handle p3128 = (BHAB_3128_P_Handle )(handle->pImpl);
850
851	BDBG_ASSERT(handle);
852
853	/TODO : setup bitmask to enable/disable interrupt callabcks/
854
855	if (eDevId >= BHAB_DevId_eMax) {
856	return BERR_TRACE(BERR_INVALID_PARAMETER);
857	}
858
859	callback = &p3128->InterruptCallbackInfo[eDevId];
860
861	callback->func = fCallBack;
862	callback->pParm1 = pParm1;
863	callback->parm2 = parm2;
864
865	return BERR_TRACE(BERR_SUCCESS);
866	}
867
868
869	/******************************************************************************
870	BHAB_3128_UnInstallInterruptCallback()
871	******************************************************************************/
872	BERR_Code BHAB_3128_UnInstallInterruptCallback(
873	BHAB_Handle handle, /* [in] BHAB handle */
874	BHAB_DevId eDevId /* [in] Device ID */
875	)
876	{
877	BHAB_P_CallbackInfo *callback;
878	BHAB_3128_P_Handle p3128 = (BHAB_3128_P_Handle )(handle->pImpl);
879
880	BDBG_ASSERT(handle);
881
882	if (eDevId >= BHAB_DevId_eMax) {
883	return BERR_TRACE(BERR_INVALID_PARAMETER);
884	}
885
886	callback = &p3128->InterruptCallbackInfo[eDevId];
887
888	callback->func = NULL;
889	callback->pParm1 = NULL;
890	callback->parm2 = (int)NULL;
891
892	return BERR_TRACE(BERR_SUCCESS);
893	}
894
895
896	/******************************************************************************
897	BHAB_3128_SendHabCommand()
898	******************************************************************************/
899	BERR_Code BHAB_3128_SendHabCommand(
900	BHAB_Handle handle, /* [in] BHAB PI Handle */
901	uint8_t write_buf, / [in] specifies the HAB command to send */
902	uint8_t write_len, /* [in] number of bytes in the HAB command */
903	uint8_t read_buf, / [out] holds the data read from the HAB */
904	uint8_t read_len, /* [in] number of bytes to read from the HAB */
905	bool bCheckForAck, /* [in] true = determine if the AP has serviced the command */
906	bool bInsertTermination, /* [in] true = insert termination byte 0x00 in write buffer at read_len position */
907	uint8_t command_len
908	)
909	{
910	BERR_Code retCode = BERR_SUCCESS;
911	uint32_t sb;
912	BSTD_UNUSED(command_len);
913
914	BHAB_P_ACQUIRE_MUTEX(handle);
915	if ((write_len > 127) \|\| (read_len > 127) \|\| (write_len == 0))
916	return (BERR_TRACE(BERR_INVALID_PARAMETER));
917
918	BHAB_CHK_RETCODE(BHAB_3128_P_CheckHab(handle));
919
920	/* write the command to the HAB */
921	BHAB_CHK_RETCODE(BHAB_3128_P_WriteHab(handle, 0, write_buf, write_len));
922
923	if(bInsertTermination){
924	sb=0x1;
925	BHAB_CHK_RETCODE(BHAB_3128_WriteRegister(handle, BCHP_LEAP_CTRL_HAB_REQUEST, &sb));
926	}
927	/* wait for the AP to service the HAB, and then read any return data */
928	BHAB_CHK_RETCODE(BHAB_3128_P_ServiceHab(handle, read_buf, read_len, bCheckForAck, write_buf[0] \| 0x80));
929
930	done:
931	BHAB_P_RELEASE_MUTEX(handle);
932
933	return retCode;
934	}
935
936	/******************************************************************************
937	BHAB_3128_GetInterruptEventHandle()
938	******************************************************************************/
939	BERR_Code BHAB_3128_GetInterruptEventHandle(
940	BHAB_Handle handle, /* [in] BHAB handle */
941	BKNI_EventHandle hEvent / [out] interrupt event handle */
942	)
943	{
944	hEvent = ((BHAB_3128_P_Handle )(handle->pImpl))->hInterruptEvent;
945	return BERR_SUCCESS;
946	}
947
948
949	/**************************Private Functions*******************************/
950
951
952	/******************************************************************************
953	BREG_I2C_P_Read3128()
954	******************************************************************************/
955	BERR_Code BREG_I2C_P_Read3128(
956	BREG_I2C_Handle i2cHandle, /* [in] BREG_I2C Handle */
957	uint16_t chipAddr,
958	uint8_t subAddr,
959	uint8_t *pData,
960	size_t length
961	)
962	{
963	BERR_Code retCode = BERR_SUCCESS;
964
965	BREG_I2C_WriteNoAddr(i2cHandle, chipAddr, (uint8_t *)&subAddr, 1);
966	BREG_I2C_ReadNoAddr(i2cHandle, chipAddr, pData, length);
967
968	return retCode;
969	}
970
971
972	/******************************************************************************
973	BHAB_3128_P_EnableHostInterrupt()
974	******************************************************************************/
975	BERR_Code BHAB_3128_P_EnableHostInterrupt(
976	BHAB_Handle handle, /* [in] HAB handle */
977	bool bEnable /* [in] true=enables the L1 interrupt on the host processor */
978	)
979	{
980	BKNI_EnterCriticalSection();
981	handle->settings.interruptEnableFunc(bEnable, handle->settings.interruptEnableFuncParam);
982	BKNI_LeaveCriticalSection();
983
984	return BERR_SUCCESS;
985	}
986
987
988	/******************************************************************************
989	BHAB_3128_P_DisableInterrupts()
990	******************************************************************************/
991	BERR_Code BHAB_3128_P_DisableInterrupts(
992	BHAB_Handle handle /* [in] BHAB Handle */
993	)
994	{
995	BERR_Code retCode = BERR_SUCCESS;
996	BSTD_UNUSED(handle);
997
998	return retCode;
999	}
1000
1001
1002	/******************************************************************************
1003	BHAB_3128_P_EnableHabDoneInterrupt()
1004	******************************************************************************/
1005	BERR_Code BHAB_3128_P_EnableHabDoneInterrupt(
1006	BHAB_Handle handle /* [in] BHAB PI Handle */
1007	)
1008	{
1009	BERR_Code retCode = BERR_SUCCESS;
1010	BSTD_UNUSED(handle);
1011
1012	return retCode;
1013	}
1014
1015
1016	/******************************************************************************
1017	BHAB_3128_P_EnableInitDoneInterrupt()
1018	******************************************************************************/
1019	BERR_Code BHAB_3128_P_EnableInitDoneInterrupt(
1020	BHAB_Handle handle /* [in] BHAB PI Handle */
1021	)
1022	{
1023	BERR_Code retCode = BERR_SUCCESS;
1024	BSTD_UNUSED(handle);
1025
1026	return retCode;
1027	}
1028
1029
1030	/******************************************************************************
1031	BERR_3128_Code BHAB_P_WaitForEvent()
1032	******************************************************************************/
1033	BERR_Code BHAB_3128_P_WaitForEvent(
1034	BHAB_Handle handle, /* [in] BHAB PI Handle */
1035	BKNI_EventHandle hEvent, /* [in] event to wait on */
1036	int timeoutMsec /* [in] timeout in milliseconds */
1037	)
1038	{
1039	uint8_t i=0;
1040	BERR_Code retCode = BERR_SUCCESS;
1041	BHAB_3128_P_Handle p3128 = (BHAB_3128_P_Handle )(handle->pImpl);
1042
1043	/* Temporary fix till B0 3128 chip as that provides maskable Host IRQ register. */
1044	for(i=0;i<30;i++){
1045	BHAB_3128_P_EnableHostInterrupt(handle, true);
1046	retCode = BKNI_WaitForEvent(p3128->hApiEvent, timeoutMsec);
1047	if ( retCode != BERR_SUCCESS ) { break; }
1048	BHAB_3128_P_EnableHostInterrupt(handle, false);
1049	BHAB_3128_P_DecodeInterrupt(handle);
1050
1051	retCode = BKNI_WaitForEvent(hEvent, 0);
1052	if (retCode == BERR_SUCCESS ) { break; }
1053	}
1054
1055	BHAB_3128_P_EnableHostInterrupt(handle, true);
1056
1057	return retCode;
1058
1059	}
1060
1061
1062	/******************************************************************************
1063	BHAB_3128_P_RunAp()
1064	******************************************************************************/
1065	BERR_Code BHAB_3128_P_RunAp(BHAB_Handle handle)
1066	{
1067	BERR_Code retCode = BERR_SUCCESS;
1068	uint32_t buf;
1069
1070	BHAB_3128_P_EnableHostInterrupt(handle, true);
1071
1072	/* start running the AP */
1073	BHAB_CHK_RETCODE(BHAB_3128_ReadRegister(handle, BCHP_LEAP_CTRL_CTRL, &buf));
1074	buf &= ~0x02;
1075	BHAB_CHK_RETCODE(BHAB_3128_WriteRegister(handle, BCHP_LEAP_CTRL_CTRL, &buf));
1076
1077	done:
1078	return retCode;
1079	}
1080
1081
1082	/******************************************************************************
1083	BHAB_3128_P_ResetAp()
1084	******************************************************************************/
1085	BERR_Code BHAB_3128_P_ResetAp(BHAB_Handle handle)
1086	{
1087	BERR_Code retCode = BERR_SUCCESS;
1088	uint32_t buf;
1089	BHAB_3128_P_Handle p3128 = (BHAB_3128_P_Handle )(handle->pImpl);
1090
1091	/* clear LEAP_HOST_IRQ and LEAP_CTRL_SPARE put LEAP in reset (write 0x3) */
1092	buf = 0;
1093	BHAB_CHK_RETCODE(BHAB_3128_WriteRegister(handle, BCHP_LEAP_CTRL_HOST_IRQ, &buf ));
1094	BHAB_CHK_RETCODE(BHAB_3128_WriteRegister(handle, BCHP_LEAP_CTRL_SPARE, &buf));
1095
1096	BHAB_CHK_RETCODE(BHAB_3128_ReadRegister(handle, BCHP_LEAP_CTRL_CTRL, &buf));
1097	buf &= ~0x02;
1098	buf \|= 0x02;
1099	BHAB_CHK_RETCODE(BHAB_3128_WriteRegister(handle, BCHP_LEAP_CTRL_CTRL, &buf));
1100
1101	buf =0;
1102	BHAB_CHK_RETCODE(BHAB_3128_ReadRegister(handle, BCHP_TM_MTSIF_CTRL, &buf));
1103	if(p3128->isMtsif)
1104	buf &= ~0x01;
1105	else
1106	buf \|= 0x1;
1107	BHAB_CHK_RETCODE(BHAB_3128_WriteRegister(handle, BCHP_TM_MTSIF_CTRL, &buf));
1108	done:
1109	return retCode;
1110	}
1111
1112
1113	/******************************************************************************
1114	BHAB_3128_P_ReadHab()
1115	******************************************************************************/
1116	BERR_Code BHAB_3128_P_ReadHab(BHAB_Handle handle, uint8_t addr, uint8_t *buf, uint8_t n)
1117	{
1118
1119	BERR_Code retCode = BERR_SUCCESS;
1120
1121	if ((addr & BHAB_HAB_SIZE) \|\| (n & BHAB_HAB_SIZE))
1122	return BERR_TRACE(BERR_INVALID_PARAMETER);
1123
1124	if ((addr + n) > BHAB_HAB_SIZE)
1125	return BERR_TRACE(BERR_INVALID_PARAMETER);
1126
1127	BHAB_CHK_RETCODE(BHAB_3128_ReadMemory(handle, BCHP_LEAP_HAB_MEM_WORDi_ARRAY_BASE, buf, n));
1128
1129	done:
1130	return retCode;
1131	}
1132
1133
1134	/******************************************************************************
1135	BHAB_3128_P_WriteHab()
1136	******************************************************************************/
1137	BERR_Code BHAB_3128_P_WriteHab(BHAB_Handle handle, uint8_t addr, uint8_t *buf, uint8_t n)
1138	{
1139	BERR_Code retCode = BERR_SUCCESS;
1140
1141	if ((addr & BHAB_HAB_SIZE) \|\| (n & BHAB_HAB_SIZE))
1142	return BERR_TRACE(BERR_INVALID_PARAMETER);
1143
1144	if ((addr + n) > BHAB_HAB_SIZE)
1145	return BERR_TRACE(BERR_INVALID_PARAMETER);
1146
1147	BHAB_CHK_RETCODE(BHAB_3128_WriteMemory(handle, (BCHP_LEAP_HAB_MEM_WORDi_ARRAY_BASE + addr), buf, n));
1148
1149	done:
1150	return retCode;
1151	}
1152
1153
1154	/******************************************************************************
1155	BHAB_3128_P_ServiceHab()
1156	******************************************************************************/
1157	BERR_Code BHAB_3128_P_ServiceHab(
1158	BHAB_Handle handle, /* [in] BHAB PI Handle */
1159	uint8_t read_buf, / [out] holds the data read from the HAB */
1160	uint8_t read_len, /* [in] number of bytes to read from the HAB */
1161	bool bCheckForAck, /* [in] true = determine if the AP has serviced the command */
1162	uint8_t ack_byte /* [in] value of the ack byte to expect */
1163	)
1164	{
1165	BERR_Code retCode = BERR_SUCCESS;
1166
1167	BHAB_3128_P_Handle p3128 = (BHAB_3128_P_Handle )(handle->pImpl);
1168
1169	BHAB_3128_P_EnableHostInterrupt(handle, false);
1170
1171	if (BERR_SUCCESS == BKNI_WaitForEvent(p3128->hHabDoneEvent, 0))
1172	{
1173	BDBG_WRN(("Discarded a HabDoneEvent"));
1174	}
1175
1176	if (BHAB_3128_P_WaitForEvent(handle, p3128->hHabDoneEvent, 850) == BERR_TIMEOUT)
1177	{
1178	BDBG_ERR(("HAB timeout\n"));
1179	BERR_TRACE(retCode = BHAB_ERR_HAB_TIMEOUT);
1180	goto done;
1181	}
1182
1183	if (read_len > 0)
1184	{
1185	BHAB_CHK_RETCODE(BHAB_3128_P_ReadHab(handle, 0, read_buf, read_len));
1186	if (bCheckForAck)
1187	{
1188	if (ack_byte != read_buf[0])
1189	{
1190	BDBG_ERR(("HAB command not serviced!\n"));
1191	BERR_TRACE(retCode = BHAB_ERR_HAB_NO_ACK);
1192	}
1193	}
1194	}
1195
1196	done:
1197	return retCode;
1198	}
1199
1200
1201	/******************************************************************************
1202	BHAB_3128_P_DecodeInterrupt()
1203	******************************************************************************/
1204	BERR_Code BHAB_3128_P_DecodeInterrupt(BHAB_Handle handle)
1205	{
1206	BERR_Code retCode = BERR_SUCCESS;
1207	BHAB_3128_P_Handle p3128 = (BHAB_3128_P_Handle )(handle->pImpl);
1208	uint32_t buf, sb, sb1;
1209
1210	BHAB_P_CallbackInfo *callback;
1211
1212	BHAB_CHK_RETCODE(BHAB_3128_ReadRegister(handle, BCHP_LEAP_CTRL_HOST_IRQ, &buf));
1213	if(buf == 0) return retCode;
1214
1215	/HAB DONE INTERRUPT/
1216	if (buf & BHAB_HAB_DONE)
1217	{
1218	BDBG_MSG(("HAB_DONE"));
1219	BKNI_SetEvent(p3128->hHabDoneEvent);
1220	}
1221
1222	/INIT DONE INTERRUPT/
1223	if (buf & BHAB_AP_INIT_DONE)
1224	{
1225	BDBG_MSG(("AP INIT DONE"));
1226	BKNI_SetEvent(p3128->hInitDoneEvent);
1227	}
1228
1229	if(buf & BHAB_ADS_CHN7_OUT_OF_LOCK)
1230	{
1231	if(p3128->InterruptCallbackInfo[BHAB_DevId_eADS7].func){
1232	BDBG_ERR(("Channel 7 out of Lock"));
1233	callback = &p3128->InterruptCallbackInfo[BHAB_DevId_eADS7];
1234	callback->parm2 = (int) BHAB_Interrupt_eLockChange;
1235	BKNI_EnterCriticalSection();
1236	callback->func(callback->pParm1, callback->parm2);
1237	BKNI_LeaveCriticalSection();
1238	}
1239	else {
1240	BDBG_MSG(("Channel 7 callback not installed. "));
1241	}
1242	}
1243
1244	if(buf & BHAB_ADS_CHN7_IN_LOCK)
1245	{
1246	if(p3128->InterruptCallbackInfo[BHAB_DevId_eADS7].func){
1247	BDBG_ERR(("Channel 7 In Lock"));
1248	callback = &p3128->InterruptCallbackInfo[BHAB_DevId_eADS7];
1249	callback->parm2 = (int) BHAB_Interrupt_eLockChange;
1250	BKNI_EnterCriticalSection();
1251	callback->func(callback->pParm1, callback->parm2);
1252	BKNI_LeaveCriticalSection();
1253	}
1254	else {
1255	BDBG_MSG(("Channel 7 callback not installed. "));
1256	}
1257	}
1258
1259	if(buf & BHAB_ADS_CHN6_OUT_OF_LOCK)
1260	{
1261	if(p3128->InterruptCallbackInfo[BHAB_DevId_eADS6].func){
1262	BDBG_ERR(("Channel 6 out of Lock"));
1263	callback = &p3128->InterruptCallbackInfo[BHAB_DevId_eADS6];
1264	callback->parm2 = (int) BHAB_Interrupt_eLockChange;
1265	BKNI_EnterCriticalSection();
1266	callback->func(callback->pParm1, callback->parm2);
1267	BKNI_LeaveCriticalSection();
1268	}
1269	else {
1270	BDBG_MSG(("Channel 6 callback not installed. "));
1271	}
1272	}
1273
1274	if(buf & BHAB_ADS_CHN6_IN_LOCK)
1275	{
1276	if(p3128->InterruptCallbackInfo[BHAB_DevId_eADS6].func){
1277	BDBG_ERR(("Channel 6 In Lock"));
1278	callback = &p3128->InterruptCallbackInfo[BHAB_DevId_eADS6];
1279	callback->parm2 = (int) BHAB_Interrupt_eLockChange;
1280	BKNI_EnterCriticalSection();
1281	callback->func(callback->pParm1, callback->parm2);
1282	BKNI_LeaveCriticalSection();
1283	}
1284	else {
1285	BDBG_MSG(("Channel 6 callback not installed. "));
1286	}
1287	}
1288
1289	if(buf & BHAB_ADS_CHN5_OUT_OF_LOCK)
1290	{
1291
1292	if(p3128->InterruptCallbackInfo[BHAB_DevId_eADS5].func){
1293	BDBG_ERR(("Channel 5 out of Lock"));
1294	callback = &p3128->InterruptCallbackInfo[BHAB_DevId_eADS5];
1295	callback->parm2 = (int) BHAB_Interrupt_eLockChange;
1296	BKNI_EnterCriticalSection();
1297	callback->func(callback->pParm1, callback->parm2);
1298	BKNI_LeaveCriticalSection();
1299	}
1300	else {
1301	BDBG_MSG(("Channel 5 callback not installed. "));
1302	}
1303	}
1304
1305	if(buf & BHAB_ADS_CHN5_IN_LOCK)
1306	{
1307
1308	if(p3128->InterruptCallbackInfo[BHAB_DevId_eADS5].func){
1309	BDBG_ERR(("Channel 5 In Lock"));
1310	callback = &p3128->InterruptCallbackInfo[BHAB_DevId_eADS5];
1311	callback->parm2 = (int) BHAB_Interrupt_eLockChange;
1312	BKNI_EnterCriticalSection();
1313	callback->func(callback->pParm1, callback->parm2);
1314	BKNI_LeaveCriticalSection();
1315	}
1316	else {
1317	BDBG_MSG(("Channel 5 callback not installed. "));
1318	}
1319	}
1320
1321	if(buf & BHAB_ADS_CHN4_OUT_OF_LOCK)
1322	{
1323	if(p3128->InterruptCallbackInfo[BHAB_DevId_eADS4].func){
1324	BDBG_ERR(("Channel 4 out of Lock"));
1325	callback = &p3128->InterruptCallbackInfo[BHAB_DevId_eADS4];
1326	callback->parm2 = (int) BHAB_Interrupt_eLockChange;
1327	BKNI_EnterCriticalSection();
1328	callback->func(callback->pParm1, callback->parm2);
1329	BKNI_LeaveCriticalSection();
1330	}
1331	else {
1332	BDBG_MSG(("Channel 4 callback not installed. "));
1333	}
1334	}
1335
1336	if(buf & BHAB_ADS_CHN4_IN_LOCK)
1337	{
1338
1339	if(p3128->InterruptCallbackInfo[BHAB_DevId_eADS4].func){
1340	BDBG_ERR(("Channel 4 In Lock"));
1341	callback = &p3128->InterruptCallbackInfo[BHAB_DevId_eADS4];
1342	callback->parm2 = (int) BHAB_Interrupt_eLockChange;
1343	BKNI_EnterCriticalSection();
1344	callback->func(callback->pParm1, callback->parm2);
1345	BKNI_LeaveCriticalSection();
1346	}
1347	else {
1348	BDBG_MSG(("Channel 4 callback not installed. "));
1349	}
1350	}
1351
1352	if(buf & BHAB_ADS_CHN3_OUT_OF_LOCK)
1353	{
1354	if(p3128->InterruptCallbackInfo[BHAB_DevId_eADS3].func){
1355	BDBG_ERR(("Channel 3 out of Lock"));
1356	callback = &p3128->InterruptCallbackInfo[BHAB_DevId_eADS3];
1357	callback->parm2 = (int) BHAB_Interrupt_eLockChange;
1358	BKNI_EnterCriticalSection();
1359	callback->func(callback->pParm1, callback->parm2);
1360	BKNI_LeaveCriticalSection();
1361	}
1362	else {
1363	BDBG_MSG(("Channel 3 callback not installed. "));
1364	}
1365	}
1366
1367	if(buf & BHAB_ADS_CHN3_IN_LOCK)
1368	{
1369
1370	if(p3128->InterruptCallbackInfo[BHAB_DevId_eADS3].func){
1371	BDBG_ERR(("Channel 3 In Lock"));
1372	callback = &p3128->InterruptCallbackInfo[BHAB_DevId_eADS3];
1373	callback->parm2 = (int) BHAB_Interrupt_eLockChange;
1374	BKNI_EnterCriticalSection();
1375	callback->func(callback->pParm1, callback->parm2);
1376	BKNI_LeaveCriticalSection();
1377	}
1378	else {
1379	BDBG_MSG(("Channel 3 callback not installed. "));
1380	}
1381	}
1382
1383	if(buf & BHAB_ADS_CHN2_OUT_OF_LOCK)
1384	{
1385	if(p3128->InterruptCallbackInfo[BHAB_DevId_eADS2].func){
1386	BDBG_ERR(("Channel 2 out of Lock"));
1387	callback = &p3128->InterruptCallbackInfo[BHAB_DevId_eADS2];
1388	callback->parm2 = (int) BHAB_Interrupt_eLockChange;
1389	BKNI_EnterCriticalSection();
1390	callback->func(callback->pParm1, callback->parm2);
1391	BKNI_LeaveCriticalSection();
1392	}
1393	else {
1394	BDBG_MSG(("Channel 2 callback not installed. "));
1395	}
1396	}
1397
1398	if(buf & BHAB_ADS_CHN2_IN_LOCK)
1399	{
1400	if(p3128->InterruptCallbackInfo[BHAB_DevId_eADS2].func){
1401	BDBG_ERR(("Channel 2 In Lock"));
1402	callback = &p3128->InterruptCallbackInfo[BHAB_DevId_eADS2];
1403	callback->parm2 = (int) BHAB_Interrupt_eLockChange;
1404	BKNI_EnterCriticalSection();
1405	callback->func(callback->pParm1, callback->parm2);
1406	BKNI_LeaveCriticalSection();
1407	}
1408	else {
1409	BDBG_MSG(("Channel 2 callback not installed. "));
1410	}
1411	}
1412
1413	if(buf & BHAB_ADS_CHN1_OUT_OF_LOCK)
1414	{
1415	if(p3128->InterruptCallbackInfo[BHAB_DevId_eADS1].func){
1416	BDBG_ERR(("Channel 1 out of Lock"));
1417	callback = &p3128->InterruptCallbackInfo[BHAB_DevId_eADS1];
1418	callback->parm2 = (int) BHAB_Interrupt_eLockChange;
1419	BKNI_EnterCriticalSection();
1420	callback->func(callback->pParm1, callback->parm2);
1421	BKNI_LeaveCriticalSection();
1422	}
1423	else {
1424	BDBG_MSG(("Channel 1 callback not installed. "));
1425	}
1426	}
1427
1428	if(buf & BHAB_ADS_CHN1_IN_LOCK)
1429	{
1430	if(p3128->InterruptCallbackInfo[BHAB_DevId_eADS1].func){
1431	BDBG_ERR(("Channel 1 In Lock"));
1432	callback = &p3128->InterruptCallbackInfo[BHAB_DevId_eADS1];
1433	callback->parm2 = (int) BHAB_Interrupt_eLockChange;
1434	BKNI_EnterCriticalSection();
1435	callback->func(callback->pParm1, callback->parm2);
1436	BKNI_LeaveCriticalSection();
1437	}
1438	else {
1439	BDBG_MSG(("Channel 1 callback not installed. "));
1440	}
1441	}
1442
1443	if(buf & BHAB_ADS_CHN0_OUT_OF_LOCK)
1444	{
1445	if(p3128->InterruptCallbackInfo[BHAB_DevId_eADS0].func){
1446	BDBG_ERR(("Channel 0 out of Lock"));
1447	callback = &p3128->InterruptCallbackInfo[BHAB_DevId_eADS0];
1448	callback->parm2 = (int) BHAB_Interrupt_eLockChange;
1449	BKNI_EnterCriticalSection();
1450	callback->func(callback->pParm1, callback->parm2);
1451	BKNI_LeaveCriticalSection();
1452	}
1453	else {
1454	BDBG_MSG(("Channel 0 callback not installed. "));
1455	}
1456	}
1457
1458	if(buf & BHAB_ADS_CHN0_IN_LOCK)
1459	{
1460	if(p3128->InterruptCallbackInfo[BHAB_DevId_eADS0].func){
1461	BDBG_ERR(("Channel 0 In Lock"));
1462	callback = &p3128->InterruptCallbackInfo[BHAB_DevId_eADS0];
1463	callback->parm2 = (int) BHAB_Interrupt_eLockChange;
1464	BKNI_EnterCriticalSection();
1465	callback->func(callback->pParm1, callback->parm2);
1466	BKNI_LeaveCriticalSection();
1467	}
1468	else {
1469	BDBG_MSG(("Channel 0 callback not installed. "));
1470	}
1471	}
1472
1473	if (buf & BHAB_ADS_STATUS_RDY)
1474	{
1475	BHAB_CHK_RETCODE(BHAB_3128_ReadRegister(handle, BCHP_LEAP_CTRL_SPARE, &sb1));
1476	if (sb1 & BHAB_ADS_CHN0_STATUS_RDY)
1477	{
1478	if(p3128->InterruptCallbackInfo[BHAB_DevId_eADS0].func){
1479	BDBG_ERR(("Channel 0 Status Rdy"));
1480	callback = &p3128->InterruptCallbackInfo[BHAB_DevId_eADS0];
1481	callback->parm2 = (int) BHAB_Interrupt_eQamAsyncStatusReady;
1482	BKNI_EnterCriticalSection();
1483	callback->func(callback->pParm1, callback->parm2);
1484	BKNI_LeaveCriticalSection();
1485	}
1486	}
1487
1488	if (sb1 & BHAB_ADS_CHN1_STATUS_RDY)
1489	{
1490	if(p3128->InterruptCallbackInfo[BHAB_DevId_eADS1].func){
1491	BDBG_ERR(("Channel 1 Status Rdy"));
1492	callback = &p3128->InterruptCallbackInfo[BHAB_DevId_eADS1];
1493	callback->parm2 = (int) BHAB_Interrupt_eQamAsyncStatusReady;
1494	BKNI_EnterCriticalSection();
1495	callback->func(callback->pParm1, callback->parm2);
1496	BKNI_LeaveCriticalSection();
1497	}
1498	}
1499
1500	if (sb1 & BHAB_ADS_CHN2_STATUS_RDY)
1501	{
1502	if(p3128->InterruptCallbackInfo[BHAB_DevId_eADS2].func){
1503	BDBG_ERR(("Channel 2 Status Rdy"));
1504	callback = &p3128->InterruptCallbackInfo[BHAB_DevId_eADS2];
1505	callback->parm2 = (int) BHAB_Interrupt_eQamAsyncStatusReady;
1506	BKNI_EnterCriticalSection();
1507	callback->func(callback->pParm1, callback->parm2);
1508	BKNI_LeaveCriticalSection();
1509	}
1510	}
1511
1512	if (sb1 & BHAB_ADS_CHN3_STATUS_RDY)
1513	{
1514	if(p3128->InterruptCallbackInfo[BHAB_DevId_eADS3].func){
1515	BDBG_ERR(("Channel 3 Status Rdy"));
1516	callback = &p3128->InterruptCallbackInfo[BHAB_DevId_eADS3];
1517	callback->parm2 = (int) BHAB_Interrupt_eQamAsyncStatusReady;
1518	BKNI_EnterCriticalSection();
1519	callback->func(callback->pParm1, callback->parm2);
1520	BKNI_LeaveCriticalSection();
1521	}
1522	}
1523
1524	if (sb1 & BHAB_ADS_CHN4_STATUS_RDY)
1525	{
1526	if(p3128->InterruptCallbackInfo[BHAB_DevId_eADS4].func){
1527	BDBG_ERR(("Channel 4 Status Rdy"));
1528	callback = &p3128->InterruptCallbackInfo[BHAB_DevId_eADS4];
1529	callback->parm2 = (int) BHAB_Interrupt_eQamAsyncStatusReady;
1530	BKNI_EnterCriticalSection();
1531	callback->func(callback->pParm1, callback->parm2);
1532	BKNI_LeaveCriticalSection();
1533	}
1534	}
1535
1536	if (sb1 & BHAB_ADS_CHN5_STATUS_RDY)
1537	{
1538	if(p3128->InterruptCallbackInfo[BHAB_DevId_eADS5].func){
1539	BDBG_ERR(("Channel 5 Status Rdy"));
1540	callback = &p3128->InterruptCallbackInfo[BHAB_DevId_eADS5];
1541	callback->parm2 = (int) BHAB_Interrupt_eQamAsyncStatusReady;
1542	BKNI_EnterCriticalSection();
1543	callback->func(callback->pParm1, callback->parm2);
1544	BKNI_LeaveCriticalSection();
1545	}
1546	}
1547
1548	if (sb1 & BHAB_ADS_CHN6_STATUS_RDY)
1549	{
1550	if(p3128->InterruptCallbackInfo[BHAB_DevId_eADS6].func){
1551	BDBG_ERR(("Channel 6 Status Rdy"));
1552	callback = &p3128->InterruptCallbackInfo[BHAB_DevId_eADS6];
1553	callback->parm2 = (int) BHAB_Interrupt_eQamAsyncStatusReady;
1554	BKNI_EnterCriticalSection();
1555	callback->func(callback->pParm1, callback->parm2);
1556	BKNI_LeaveCriticalSection();
1557	}
1558	}
1559
1560	if (sb1 & BHAB_ADS_CHN7_STATUS_RDY)
1561	{
1562	if(p3128->InterruptCallbackInfo[BHAB_DevId_eADS7].func){
1563	BDBG_ERR(("Channel 7 Status Rdy"));
1564	callback = &p3128->InterruptCallbackInfo[BHAB_DevId_eADS7];
1565	callback->parm2 = (int) BHAB_Interrupt_eQamAsyncStatusReady;
1566	BKNI_EnterCriticalSection();
1567	callback->func(callback->pParm1, callback->parm2);
1568	BKNI_LeaveCriticalSection();
1569	}
1570	}
1571	}
1572
1573	/* clear LEAP_HOST_IRQ and LEAP_CTRL_SPARE */
1574	sb=0;
1575	BHAB_CHK_RETCODE(BHAB_3128_WriteRegister(handle, BCHP_LEAP_CTRL_HOST_IRQ, &sb));
1576
1577	done:
1578	return retCode;
1579	}
1580
1581
1582	/******************************************************************************
1583	BHAB_3128_P_DecodeError()
1584	******************************************************************************/
1585	BERR_Code BHAB_3128_P_DecodeError(
1586	BHAB_Handle handle, /* [in] BHAB PI Handle */
1587	BHAB_ApStatus pApStatus / [in] AP status returned by BHAB_GetApStatus */
1588	)
1589	{
1590	BERR_Code retCode = BERR_SUCCESS;
1591	uint8_t sb;
1592	BSTD_UNUSED(handle);
1593
1594	if (*pApStatus & BHAB_AP_ERROR)
1595	retCode = BHAB_ERR_AP_UNKNOWN;
1596
1597	else if (*pApStatus & BHAB_HAB_DONE)
1598	{
1599	sb = *pApStatus & BHAB_HAB_DONE;
1600
1601	switch (sb)
1602	{
1603	case 1:
1604	break;
1605
1606	case 2:
1607	retCode = BHAB_ERR_HAB_ERR;
1608	break;
1609
1610	case 3:
1611	retCode = BHAB_ERR_HAB_ERR;
1612	break;
1613
1614	case 4:
1615	retCode = BHAB_ERR_HAB_ERR;
1616	break;
1617
1618	case 5:
1619	retCode = BHAB_ERR_HAB_TIMEOUT;
1620	break;
1621
1622	case 6:
1623	retCode = BHAB_ERR_HAB_ERR;
1624	break;
1625
1626	default:
1627	BDBG_ERR(("unknown MSG1 (=0x%02X)\n", sb));
1628	retCode = BHAB_ERR_AP_UNKNOWN;
1629	break;
1630	}
1631	}
1632
1633	return retCode;
1634	}
1635
1636
1637	/******************************************************************************
1638	BHAB_3128_P_CheckHab()
1639	******************************************************************************/
1640	BERR_Code BHAB_3128_P_CheckHab(
1641	BHAB_Handle handle /* [in] BHAB Handle */
1642	)
1643	{
1644	BERR_Code retCode = BERR_SUCCESS;
1645	BHAB_ApStatus status = 0;
1646	uint32_t buf;
1647
1648	BHAB_CHK_RETCODE(BHAB_3128_GetApStatus(handle, &status));
1649	BHAB_CHK_RETCODE(BHAB_3128_ReadRegister(handle, BCHP_LEAP_CTRL_HOST_IRQ, &buf));
1650
1651	BDBG_MSG(("BHAB_3128_P_CheckHab status = 0x%x", status ));
1652	BDBG_MSG(("BHAB_3128_P_CheckHab IRQ register = 0x%x", buf ));
1653	if ((status & BHAB_HAB_DONE) == 0x1) {
1654
1655	retCode = BERR_SUCCESS;
1656	}
1657	else
1658	{
1659	BDBG_MSG(("2. BHAB_3128_P_DecodeError called. 0x%x", status ));
1660	BERR_TRACE(retCode = BHAB_3128_P_DecodeError(handle, &status));
1661	}
1662
1663	done:
1664	return retCode;
1665	}
1666
1667
1668	/******************************************************************************
1669	BHAB_3128_GetWatchDogTimer()
1670	******************************************************************************/
1671	BERR_Code BHAB_3128_GetWatchDogTimer(
1672	BHAB_Handle handle, /* [in] BHAB Handle */
1673	BHAB_WatchDogTimerSettings *wdtSettings
1674	)
1675	{
1676	BERR_Code retCode = BERR_SUCCESS;
1677	BSTD_UNUSED(handle);
1678	BSTD_UNUSED(wdtSettings);
1679
1680	return retCode;
1681	}
1682
1683
1684	/******************************************************************************
1685	BHAB_3128_SetWatchDogTimer()
1686	******************************************************************************/
1687	BERR_Code BHAB_3128_SetWatchDogTimer(
1688	BHAB_Handle handle, /* [in] BHAB Handle */
1689	const BHAB_WatchDogTimerSettings *wdtSettings
1690	)
1691	{
1692	BERR_Code retCode = BERR_SUCCESS;
1693	BSTD_UNUSED(handle);
1694	BSTD_UNUSED(wdtSettings);
1695
1696	return retCode;
1697	}
1698
1699
1700	/******************************************************************************
1701	BHAB_3128_GetNmiConfig()
1702	******************************************************************************/
1703	BERR_Code BHAB_3128_GetNmiConfig(
1704	BHAB_Handle handle, /* [in] BHAB Handle */
1705	BHAB_NmiSettings *nmiSettings
1706	)
1707	{
1708	BERR_Code retCode = BERR_SUCCESS;
1709	BSTD_UNUSED(handle);
1710	BSTD_UNUSED(nmiSettings);
1711
1712	return retCode;
1713	}
1714
1715
1716	/******************************************************************************
1717	BHAB_3128_SetNmiConfig()
1718	******************************************************************************/
1719	BERR_Code BHAB_3128_SetNmiConfig(
1720	BHAB_Handle handle, /* [in] BHAB Handle */
1721	const BHAB_NmiSettings *nmiSettings
1722	)
1723	{
1724	BERR_Code retCode = BERR_SUCCESS;
1725	BSTD_UNUSED(handle);
1726	BSTD_UNUSED(nmiSettings);
1727
1728	return retCode;
1729	}
1730

Note: See TracBrowser for help on using the repository browser.

Context Navigation

source: svn/trunk/newcon3bcm2_21bu/magnum/basemodules/hab/3128/bhab_3128_priv.c

Download in other formats: