source: svn/trunk/newcon3bcm2_21bu/magnum/portinginterface/aob/7552/baob_acquire.c

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1/******************************************************************************
2 *    (c)2011-2012 Broadcom Corporation
3 *
4 * This program is the proprietary software of Broadcom Corporation and/or its licensors,
5 * and may only be used, duplicated, modified or distributed pursuant to the terms and
6 * conditions of a separate, written license agreement executed between you and Broadcom
7 * (an "Authorized License").  Except as set forth in an Authorized License, Broadcom grants
8 * no license (express or implied), right to use, or waiver of any kind with respect to the
9 * Software, and Broadcom expressly reserves all rights in and to the Software and all
10 * intellectual property rights therein.  IF YOU HAVE NO AUTHORIZED LICENSE, THEN YOU
11 * HAVE NO RIGHT TO USE THIS SOFTWARE IN ANY WAY, AND SHOULD IMMEDIATELY
12 * NOTIFY BROADCOM AND DISCONTINUE ALL USE OF THE SOFTWARE. 
13 * 
14 * Except as expressly set forth in the Authorized License,
15 * 
16 * 1.     This program, including its structure, sequence and organization, constitutes the valuable trade
17 * secrets of Broadcom, and you shall use all reasonable efforts to protect the confidentiality thereof,
18 * and to use this information only in connection with your use of Broadcom integrated circuit products.
19 * 
20 * 2.     TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS"
21 * AND WITH ALL FAULTS AND BROADCOM MAKES NO PROMISES, REPRESENTATIONS OR
22 * WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH RESPECT TO
23 * THE SOFTWARE.  BROADCOM SPECIFICALLY DISCLAIMS ANY AND ALL IMPLIED WARRANTIES
24 * OF TITLE, MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR PURPOSE,
25 * LACK OF VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET POSSESSION
26 * OR CORRESPONDENCE TO DESCRIPTION. YOU ASSUME THE ENTIRE RISK ARISING OUT OF
27 * USE OR PERFORMANCE OF THE SOFTWARE.
28 *
29 * 3.     TO THE MAXIMUM EXTENT PERMITTED BY LAW, IN NO EVENT SHALL BROADCOM OR ITS
30 * LICENSORS BE LIABLE FOR (i) CONSEQUENTIAL, INCIDENTAL, SPECIAL, INDIRECT, OR
31 * EXEMPLARY DAMAGES WHATSOEVER ARISING OUT OF OR IN ANY WAY RELATING TO YOUR
32 * USE OF OR INABILITY TO USE THE SOFTWARE EVEN IF BROADCOM HAS BEEN ADVISED OF
33 * THE POSSIBILITY OF SUCH DAMAGES; OR (ii) ANY AMOUNT IN EXCESS OF THE AMOUNT
34 * ACTUALLY PAID FOR THE SOFTWARE ITSELF OR U.S. $1, WHICHEVER IS GREATER. THESE
35 * LIMITATIONS SHALL APPLY NOTWITHSTANDING ANY FAILURE OF ESSENTIAL PURPOSE OF
36 * ANY LIMITED REMEDY.
37 *
38 * $brcm_Workfile: baob_acquire.c $
39 * $brcm_Revision: 24 $
40 * $brcm_Date: 3/13/12 5:03p $
41 *
42 * Module Description:
43 *
44 * Revision History:
45 *
46 * $brcm_Log: /AP/ctfe/core/aob/baob_acquire.c $
47 *
48 * 24   3/13/12 5:03p farshidf
49 * SW3128-1: reset status lock at power down
50 *
51 * 23   2/15/12 6:50p farshidf
52 * SW3128-1: merge to main
53 *
54 * Fw_Integration_Devel/7   2/15/12 6:41p farshidf
55 * SW3128-1: merge to integ
56 *
57 * Fw_Integration_Devel/AP_V4_0_AOB_DEV/1   2/15/12 5:15p dorothyl
58 * SW3128-1 : bug fix
59 *
60 * Fw_Integration_Devel/6   2/9/12 12:14p farshidf
61 * SW3128-1: merge to integ
62 *
63 * Fw_Integration_Devel/AP_V3_0_AOB_DEV/9   2/8/12 4:10p dorothyl
64 * SW3128-1 : oob fec bug
65 *
66 * Fw_Integration_Devel/AP_V3_0_AOB_DEV/8   2/8/12 2:16p dorothyl
67 * SW3128-1 : OOB BERT
68 *
69 * Fw_Integration_Devel/AP_V3_0_AOB_DEV/7   2/3/12 1:56p dorothyl
70 * SW3128-1 : clean up comments
71 *
72 * Fw_Integration_Devel/AP_V3_0_AOB_DEV/6   1/6/12 1:24p dorothyl
73 * SW3128-1 : add nyq option
74 *
75 * Fw_Integration_Devel/AP_V3_0_AOB_DEV/5   12/14/11 11:14a mpovich
76 * SW3128-1: Incorporate changes from Dorothy Lew on 12/14/2011, 11:00 am.
77 *
78 * 18   12/13/11 5:25p mpovich
79 * SW3128-1: Merge to main branch.
80 *
81 * Fw_Integration_Devel/3   12/13/11 5:25p mpovich
82 * SW3128-1: Merge to integ. branch.
83 *
84 * Fw_Integration_Devel/AP_V3_0_AOB_DEV/4   12/13/11 5:21p mpovich
85 * SW3128-1: Take Dorothy's OOB changes on 12/12/2011.
86 *
87 * Fw_Integration_Devel/AP_V3_0_AOB_DEV/3   12/13/11 4:50p mpovich
88 * SW3128-1: Take Dorothy's OOB changes on 12/12/2011.
89 *
90 * 17   12/13/11 1:21p mpovich
91 * SW3128-1: Merge to the main branch.
92 *
93 * Fw_Integration_Devel/2   12/13/11 12:26p mpovich
94 * SW3128-69: Add lock/unlock IRQs and status for Out of Band.
95 *
96 * Fw_Integration_Devel/AP_V3_0_AOB_DEV/2   12/13/11 12:25p mpovich
97 * SW3128-69: Add lock/unlock IRQs and status for Out of Band.
98 *
99 * Fw_Integration_Devel/AP_V3_0_AOB_DEV/SW3128-69/2   12/13/11 12:09p mpovich
100 * SW3128-69: Add lock/unlock IRQs and status for Out of Band.
101 *
102 * Fw_Integration_Devel/AP_V3_0_AOB_DEV/SW3128-69/1   12/12/11 9:38p mpovich
103 * SW3128-69: Support for lock/unlock Host IRQs for Out of Band.
104 *
105 * 16   11/22/11 4:55p farshidf
106 * SW3461-99: compile fix
107 *
108 * 15   11/22/11 4:36p farshidf
109 * SW3461-99: merge to main
110 *
111 * Fw_Integration_Devel/1   11/22/11 3:22p farshidf
112 * SW3461-99: merge to integ
113 *
114 * Fw_Integration_Devel/1   11/22/11 3:22p farshidf
115 * SW3461-99: merge to integ
116 *
117 * Fw_Integration_Devel/AP_V3_0_AOB_DEV/1   11/22/11 10:08a mpovich
118 * SW3128-77: Merge to dev. branch.
119 *
120 * Fw_Integration_Devel/AP_V3_0_AOB_DEV/SW3128-71/1   11/21/11 4:43p mpovich
121 * SW3128-77: Fix AOB RAM Power down setting (change value written from
122 *  0x7 to 0x3 [is 2 bit field]).
123 *
124 * 13   4/18/11 5:32p farshidf
125 * SW3128-1: update to make it work with host chip
126 *
127 * 12   4/12/11 11:47a farshidf
128 * SW3128-1: fix warning
129 *
130 * 11   4/5/11 3:21p farshidf
131 * SW3461-1: merge  main
132 *
133 * AOB_3128_1/13   4/5/11 10:54a dorothyl
134 * SW3128-1: OOB UPDATE
135 *
136 * AOB_3128_1/12   3/31/11 11:32a dorothyl
137 * SW3128-1: oob status fix
138 *
139 * AOB_3128_1/11   3/29/11 12:05p dorothyl
140 * SW3128-1: oob
141 *
142 * AOB_3128_1/10   3/29/11 10:39a dorothyl
143 * SW3128-1: oob bert
144 *
145 * AOB_3128_1/9   3/28/11 2:33p dorothyl
146 * SW3128 : OOB FIXED
147 *
148 * AOB_3128_1/8   3/25/11 11:26a dorothyl
149 * SW3128-1: fix OOB
150 *
151 * AOB_3128_1/7   3/23/11 12:49p mpovich
152 * SW3128-1: Pick up HAB related updates.
153 *
154 * AOB_3128_1/6   3/23/11 12:42p dorothyl
155 * sw3128-1: oob change
156 *
157 * 6   3/22/11 5:03p mpovich
158 * SW3128-1: Add latest AOB driver changes.
159 *
160 * AOB_3128_1/5   3/21/11 6:30p farshidf
161 * SW3128-1: add the IRQ for lock and lost of lock
162 *
163 * AOB_3128_1/4   3/21/11 6:25p farshidf
164 * SW3461-1: update naming
165 *
166 * AOB_3128_1/3   3/18/11 4:37p cbrooks
167 * sw3128-1:Added Status for OOB
168 *
169 * AOB_3128_1/2   3/17/11 8:38p cbrooks
170 * sw3128-1:Worked on AOB status
171 *
172 * AOB_3128_1/1   3/17/11 6:16p cbrooks
173 * sw3128-1:Added OOB code
174 *
175 * 5   3/11/11 3:49p farshidf
176 * SW3128-1: latest chnages from Charlie
177 *
178 * 4   3/9/11 5:21p farshidf
179 * SW3128-1: fix build issue
180 *
181 * 3   3/8/11 3:10p farshidf
182 * SW3128-1: add the OOb chnages
183 *
184 * 2   3/8/11 2:45p cbrooks
185 * sw3128-1:NEW CODE
186 *
187 *****************************************************************************/
188
189
190#include "bstd.h"
191#include "bkni.h"
192#include "bkni_multi.h"
193#include "btmr.h"
194#ifdef LEAP_BASED_CODE
195#include "baob_api.h"
196#include "bchp_tm.h"
197#include "bchp_leap_ctrl.h"
198#else
199BDBG_MODULE(baob_acquire);
200#include "baob.h"
201#endif
202#include "baob_struct.h"
203#include "baob_acquire.h"
204#include "baob_status.h"
205#include "baob_utils.h"
206#include "baob_priv.h"
207#include "bchp_ds_topm.h"
208#include "bchp_oob.h"
209
210
211
212
213/**************************************************************************
214* BAOB_P_PowerUp()is used to power up the ADS core, it should be followed
215* by an initialization of the OOB core using BAOB_P_Init()                                                               
216***************************************************************************/
217BERR_Code BAOB_P_PowerUp(BAOB_3x7x_Handle h)
218{
219        BERR_Code retCode = BERR_SUCCESS;
220        BDBG_MSG(("BAOB_P_PowerUp() "));
221#ifdef LEAP_BASED_CODE
222                BREG_WriteField(h->hRegister, TM_MEM_CTRL, PSM_RAM_OB, 0x2);
223                BKNI_Delay(20);
224                BREG_WriteField(h->hRegister, TM_MEM_CTRL, PSM_RAM_OB, 0x0);
225#endif
226                BREG_Write32(h->hRegister, BCHP_OOB_CTRL2, 0x9b0300);
227                /*--DDL BREG_Write32(h->hRegister, BCHP_OOB_CTRL1, 0x7fff0010);  */
228                BREG_Write32(h->hRegister, BCHP_OOB_CTRL1, 0xff7f1f00);
229                BREG_Write32(h->hRegister, BCHP_OOB_CTRL2, 0x9b0300);
230            BREG_Write32(h->hRegister, BCHP_OOB_CTRL3, 0x320012cc);
231                /*h->pAcqParam->BAOB_Local_Params.CTRL3 =  0x320012cc;
232                h->pAcqParam->BAOB_Local_Params.BERSRC = 3;*/
233                /*BREG_Write32(h->hRegister, BCHP_OOB_CTRL3, 0x11dc);*/
234                BREG_Write32(h->hRegister, BCHP_OOB_CTRL4, 0x3060f);
235                BREG_Write32(h->hRegister, BCHP_OOB_CTRL5, 0x400002);
236          h->PowerStatus = BAOB_ePower_On;
237
238        return retCode;
239}
240
241
242BERR_Code BAOB_P_PowerDn(BAOB_3x7x_Handle h)
243{
244        BERR_Code retCode = BERR_SUCCESS;
245        BDBG_MSG(("BAOB_P_PowerDn() "));
246#ifdef LEAP_BASED_CODE
247        BREG_WriteField(h->hRegister,TM_MEM_CTRL, PSM_RAM_OB, 0x3);
248        BREG_WriteField(h->hRegister,OOB_CTRL2, OBPWR, 0x1);
249#else
250        h->PowerStatus = BAOB_ePower_Off;
251        h->pStatus->RLK = BAOB_Status_eUnlock;
252        h->pStatus->FLK = BAOB_Status_eUnlock;
253        BSTD_UNUSED(h);
254#endif 
255        return retCode;
256}
257
258
259BERR_Code BAOB_P_Init(BAOB_3x7x_Handle h)
260{
261        BERR_Code retCode = BERR_SUCCESS;
262    BSTD_UNUSED(h);
263        BDBG_MSG(("BAOB_P_Init() "));
264       
265        return retCode;
266}
267
268BERR_Code BAOB_P_Get_LockStatus(BAOB_3x7x_Handle h)
269{
270        BERR_Code retCode = BERR_SUCCESS;
271        BSTD_UNUSED(h);
272        BDBG_MSG(("BAOB_P_Get_LockStatus() "));
273
274        return retCode;
275}
276
277BERR_Code BAOB_P_Acquire(BAOB_3x7x_Handle h)
278{
279        int32_t  CFL_Frequency;
280        uint32_t Symbol_Rate ;
281        uint8_t  AutoInversionFlag, FEC_LockFlag;
282        uint32_t ReadReg;
283
284        /* BDBG_MSG(("BAOB_P_Acquire() ")); */
285
286        h->pStatus->Reack_Count++;
287
288                /* this a bug in A0 where the status needs to clear the first time */
289    BREG_Write32(h->hRegister, BCHP_OOB_IRQCLR2A, 0xffffffff); 
290        BREG_Write32(h->hRegister, BCHP_OOB_IRQMST2A, 0xffffffff); 
291
292        /* was part of the oob_reset bbs routine*/
293        BREG_Write32(h->hRegister, BCHP_OOB_CTRL1, 0xff7f1f00); /*frz DAGC,FFE,DFE,DRL,BRL,AGL; rst FEC,FFE,DFE,SNR,DRL,BRL,AGL*/
294
295
296        BREG_Write32(h->hRegister, BCHP_OOB_CONFIG, 0xF0C00000); /*no byp; FFE/DFE 2^-11*/
297        BREG_Write32(h->hRegister, BCHP_OOB_CTRL4, 0x00030603); /*frz DR2; rst FLI,DCC*/
298        BREG_Write32(h->hRegister, BCHP_OOB_CTRL2, 0x00628300);  /*rst slicer off, spec inv off; 2 taps, main F1*/
299
300        /*Program CFL_Frequency*/
301        CFL_Frequency = BAOB_IF_FREQUENCY;
302        BAOB_P_Set_CFL_Frequency(h, BAOB_IF_FREQUENCY);
303
304        BAOB_P_Set_CFL_BW(h, BW_Sel_eAcquisition_BW);
305
306        /*Program TL_Frequency*/
307        switch (h->pAcqParam->BAOB_Acquire_Params.AA)
308        {
309        case BAOB_Acquire_Params_BPS_eDVS178:
310                Symbol_Rate = 1024000;
311                break;
312        case BAOB_Acquire_Params_BPS_eDVS167:
313                if(h->pAcqParam->BAOB_Acquire_Params.BPS==BAOB_Acquire_Params_BPS_eDVS_167_GradeA)
314                        Symbol_Rate = 772000;
315                else
316                        Symbol_Rate = 1544000;
317                break;
318        default :
319                Symbol_Rate = 0;
320                BDBG_ERR(("UNKNOWN BAOB_Acquire_Params.BPS in BAOB_P_Acquire()"));
321        }
322 
323        BAOB_P_Set_TL_Frequency(h, Symbol_Rate);
324
325        /*Program FEC*/
326        BAOB_P_Set_FEC(h);
327
328   
329        BAOB_P_Set_TL_BW(h, BW_Sel_eAcquisition_BW);
330
331        /*Spectral Inversion control*/
332        if (h->pAcqParam->BAOB_Acquire_Params.IS == BAOB_Acquire_Params_eDisable) 
333        {
334                BREG_WriteField(h->hRegister, OOB_CTRL2, OFMT, 0);
335        }
336        else 
337        {
338                BREG_WriteField(h->hRegister, OOB_CTRL2, OFMT, 1);
339        }
340        /*AGC/PGA setup and control*/
341
342   if (h->pAcqParam->BAOB_Acquire_Params.BYP == BAOB_Acquire_Params_eEnable)                      /*Bypass FEC in "CC" mode*/
343        {
344                if (CLOCK_INVERT == 1) 
345                {
346                        BREG_Write32(h->hRegister, BCHP_OOB_CTRL5, 0x3d400002);
347                }
348                else
349                {
350                        BREG_Write32(h->hRegister, BCHP_OOB_CTRL5, 0x39400002); 
351                }       
352        }
353        else
354        {
355                if (CLOCK_INVERT == 1) 
356                {
357                        BREG_WriteField(h->hRegister, OOB_CTRL2, INVCK, 1);
358                }
359                else
360                {
361                        BREG_WriteField(h->hRegister, OOB_CTRL2, INVCK, 0); 
362                }
363                BREG_Write32(h->hRegister, BCHP_OOB_CTRL5, 0x38400002);  /*PGA normal operation; halfband/nyq filt gain, FEC output control*/
364        }
365
366        /*Set BERT Source*/
367        /*Need to add a shadow  hack since this register can not be read back*/
368        /*BDBG_ERR(( "BERSRC = %32x", h->pAcqParam->BAOB_Acquire_Params.BERSRC));*/
369        switch (h->pAcqParam->BAOB_Acquire_Params.BERSRC)
370        {
371        case BAOB_Acquire_Params_BERT_Source_eI:
372                BREG_WriteField(h->hRegister, OOB_CTRL3, BERSRC, 0x0);
373                /*BDBG_ERR(( "BEFORE WRITE (i) CTRL3 = %32x", h->pAcqParam->BAOB_Local_Params.CTRL3));*/
374                /*h->pAcqParam->BAOB_Local_Params.CTRL3 = h->pAcqParam->BAOB_Local_Params.CTRL3 & 0xcfffffff;*/
375                break;
376        case BAOB_Acquire_Params_BERT_Source_eQ:
377                BREG_WriteField(h->hRegister, OOB_CTRL3, BERSRC, 0x1);
378                /*BDBG_ERR(( "BEFORE WRITE (q) CTRL3 = %32x", h->pAcqParam->BAOB_Local_Params.CTRL3));*/
379                /*h->pAcqParam->BAOB_Local_Params.CTRL3 = h->pAcqParam->BAOB_Local_Params.CTRL3 & 0xdfffffff;
380                h->pAcqParam->BAOB_Local_Params.CTRL3 = h->pAcqParam->BAOB_Local_Params.CTRL3 | 0x10000000;  */
381                        break;
382        case BAOB_Acquire_Params_BERT_Source_eIQ:
383                BREG_WriteField(h->hRegister, OOB_CTRL3, BERSRC, 0x2);
384                /*BDBG_ERR(( "BEFORE WRITE (iq) CTRL3 = %32x", h->pAcqParam->BAOB_Local_Params.CTRL3));*/
385                /*h->pAcqParam->BAOB_Local_Params.CTRL3 = h->pAcqParam->BAOB_Local_Params.CTRL3 | 0x20000000;
386                h->pAcqParam->BAOB_Local_Params.CTRL3 = h->pAcqParam->BAOB_Local_Params.CTRL3 & 0xefffffff;  */
387                break;
388        case BAOB_Acquire_Params_BERT_Source_eFEC:
389                BREG_WriteField(h->hRegister, OOB_CTRL3, BERSRC, 0x3);
390                /*BDBG_ERR(( "BEFORE WRITE(fec) == CTRL3 = %32x", h->pAcqParam->BAOB_Local_Params.CTRL3));*/
391                /*h->pAcqParam->BAOB_Local_Params.CTRL3 = h->pAcqParam->BAOB_Local_Params.CTRL3 | 0x30000000;
392                h->pAcqParam->BAOB_Local_Params.BERSRC = BAOB_Local_Params_BERT_Source_eFEC;    */
393                break;
394        default :
395                BREG_WriteField(h->hRegister, OOB_CTRL3, BERSRC, 0x3);
396                /*h->pAcqParam->BAOB_Local_Params.CTRL3 = h->pAcqParam->BAOB_Local_Params.CTRL3 & 0xcfffffff; */
397                /*BDBG_ERR(("UNKNOWN BAOB_Acquire_Params.BERSRC in BAOB_P_Acquire()"));*/
398        }
399
400        /*BREG_Write32(h->hRegister, BCHP_OOB_CTRL3, h->pAcqParam->BAOB_Local_Params.CTRL3);*/
401        /*BDBG_ERR(( "AFTERWRITE CTRL3=%32x", h->pAcqParam->BAOB_Local_Params.CTRL3));*/
402       
403        /*set SNR thresholds*/
404        BAOB_P_Set_SNR(h);
405
406
407        /*Enable BERT Source*/
408   /*   h->pAcqParam->BAOB_Local_Params.CTRL3 = h->pAcqParam->BAOB_Local_Params.CTRL3 | 0x02000000;
409        BREG_Write32(h->hRegister, BCHP_OOB_CTRL3, h->pAcqParam->BAOB_Local_Params.CTRL3);*/
410        BREG_WriteField(h->hRegister, OOB_CTRL3, BERCEN, 0x1);
411       
412        BREG_Write32(h->hRegister, BCHP_OOB_STBRI, 0);  /*initialize baud integrator*/
413        BREG_Write32(h->hRegister, BCHP_OOB_STDRI, 0);  /*initialize (CFL) DR1 integrator*/
414        BREG_Write32(h->hRegister, BCHP_OOB_STD2I, 0);  /*initialize (CPL) DR2 integrator*/
415        BREG_Write32(h->hRegister, BCHP_OOB_STATHR, 0x06000000);  /*A/D loading and AGC loop threshold*/
416        BREG_Write32(h->hRegister, BCHP_OOB_BYP, 0x1);  /*bypass the dagc*/
417
418        BREG_Write32(h->hRegister, BCHP_OOB_CTRL6, 0x05040011); /*enable self clearing of FEC counter after reading*/
419        BREG_Write32(h->hRegister, BCHP_OOB_STBERTT, 0xf0000500); 
420
421        /*BEGIN ACQUISITION*/
422
423       
424        /*BDBG_MSG(( "OOB BPS=%32x", h->pAcqParam->BAOB_Acquire_Params.BPS));*/
425
426        if(h->pAcqParam->BAOB_Acquire_Params.AA==BAOB_Acquire_Params_BPS_eDVS178)/*if annex B*/
427        {
428                BREG_Write32(h->hRegister, BCHP_OOB_STDRSP, 0x00a10000);  /* window set and freq det enabled*/
429        }
430        else /*annex A*/
431        {
432                BREG_Write32(h->hRegister, BCHP_OOB_STDRSP, 0x00a00000);  /* window set and freq det enabled*/ 
433        }
434
435  /*AGC*/
436        ReadReg = BREG_Read32(h->hRegister, BCHP_OOB_CTRL1); 
437        ReadReg = ReadReg & 0x003eff00;
438        ReadReg = ReadReg | 0x003e0f00;/*do not overwrite the aci/nyq filter selection*/
439        BREG_Write32(h->hRegister, BCHP_OOB_CTRL1, ReadReg);  /*release AGC and main tap*/
440                /*BDBG_MSG(( "OOB_CTRL1 written with %x",ReadReg));*/
441
442        if (DAGC_FREEZE == 1)
443        {       
444                /*BREG_Write32(h->hRegister, BCHP_OOB_CTRL1, 0x00be1f00); release AGC and main tap, DAGC still frozen*/
445                ReadReg = BREG_Read32(h->hRegister, BCHP_OOB_CTRL1); 
446                ReadReg = ReadReg & 0x00beff00;
447                ReadReg = ReadReg | 0x00be0f00;/*do not overwrite the aci/nyq filter selection*/
448                BREG_Write32(h->hRegister, BCHP_OOB_CTRL1, ReadReg); 
449        }
450        else
451        {
452                /*BREG_Write32(h->hRegister, BCHP_OOB_CTRL1, 0x003e1f00);  release AGC and main tap and DAGC */
453                ReadReg = BREG_Read32(h->hRegister, BCHP_OOB_CTRL1); 
454                ReadReg = ReadReg & 0x003eff00;
455                ReadReg = ReadReg | 0x003e0f00;/*do not overwrite the aci/nyq filter selection*/
456                BREG_Write32(h->hRegister, BCHP_OOB_CTRL1, ReadReg); 
457        }
458
459        BKNI_Sleep(AGC_WAIT_TIME);                                      /*AGC settling time*/
460 
461        /*baud/timing*/
462        BREG_Write32(h->hRegister, BCHP_OOB_STBEN, 0x01000000);  /*baud loop enable */
463        if (DAGC_FREEZE == 1)
464        {       
465                /*BREG_Write32(h->hRegister, BCHP_OOB_CTRL1, 0x00bc1f00);  release baud, AGC, and main tap, DAGC still frozen*/
466                ReadReg = BREG_Read32(h->hRegister, BCHP_OOB_CTRL1); 
467                ReadReg = ReadReg & 0x00bcff00;
468                ReadReg = ReadReg | 0x00bc0f00;/*do not overwrite the aci/nyq filter selection*/
469                BREG_Write32(h->hRegister, BCHP_OOB_CTRL1, ReadReg); 
470        }
471        else
472        {
473                /*BREG_Write32(h->hRegister, BCHP_OOB_CTRL1, 0x003c1f00);  release baud, AGC, and main tap, DAGC running */
474                ReadReg = BREG_Read32(h->hRegister, BCHP_OOB_CTRL1); 
475                ReadReg = ReadReg & 0x003cff00;
476                ReadReg = ReadReg | 0x003c0f00;/*do not overwrite the aci/nyq filter selection*/
477                BREG_Write32(h->hRegister, BCHP_OOB_CTRL1, ReadReg); 
478
479        }
480        BKNI_Sleep(BAUD_WAIT_TIME);                                     /*baud loop convergence time*/
481   
482  /*FEC*/
483        if (DAGC_FREEZE == 1)
484        {       
485                /*BREG_Write32(h->hRegister, BCHP_OOB_CTRL1, 0x40bc1f00);  FEC reset after FEC setup and after baud acquired, DAGC still frozen*/
486                ReadReg = BREG_Read32(h->hRegister, BCHP_OOB_CTRL1); 
487                ReadReg = ReadReg & 0x40bcff00;
488                ReadReg = ReadReg | 0x40bc0f00;/*do not overwrite the aci/nyq filter selection*/
489                BREG_Write32(h->hRegister, BCHP_OOB_CTRL1, ReadReg); 
490        }
491        else
492        {
493                /*BREG_Write32(h->hRegister, BCHP_OOB_CTRL1, 0x403c1f00);  FEC reset after FEC setup and after baud acquired, DAGC running*/
494                ReadReg = BREG_Read32(h->hRegister, BCHP_OOB_CTRL1); 
495                ReadReg = ReadReg & 0x403cff00;
496                ReadReg = ReadReg | 0x403c0f00;/*do not overwrite the aci/nyq filter selection*/
497                BREG_Write32(h->hRegister, BCHP_OOB_CTRL1, ReadReg); 
498
499        }
500   BKNI_Sleep(CARRIER_WAIT_TIME);                                       /*CFL convergence time*/
501 
502  /*FEC reset to take in new data*/
503        if (DAGC_FREEZE == 1)
504        {       
505                /*BREG_Write32(h->hRegister, BCHP_OOB_CTRL1, 0x00a01f00);  release CFL, baud, AGC, main tap, DFE, FFE,jianh do not release eq, DAGC still frozen*/
506                ReadReg = BREG_Read32(h->hRegister, BCHP_OOB_CTRL1); 
507                ReadReg = ReadReg & 0x00a0ff00;
508                ReadReg = ReadReg | 0x00a00f00;/*do not overwrite the aci/nyq filter selection*/
509                BREG_Write32(h->hRegister, BCHP_OOB_CTRL1, ReadReg); 
510
511        }
512        else
513        {
514                /*BREG_Write32(h->hRegister, BCHP_OOB_CTRL1, 0x00201f00);  release CFL, baud, AGC, main tap, DFE, FFE,jianh do not release eq, DAGC running*/
515                ReadReg = BREG_Read32(h->hRegister, BCHP_OOB_CTRL1); 
516                ReadReg = ReadReg & 0x0020ff00;
517                ReadReg = ReadReg | 0x00200f00;/*do not overwrite the aci/nyq filter selection*/
518                BREG_Write32(h->hRegister, BCHP_OOB_CTRL1, ReadReg); 
519}
520        BKNI_Sleep(CARRIER_WAIT_TIME);                                  /*CFL convergence time*/
521 
522        /*start tracking*/
523   BAOB_P_Set_TL_BW(h, BW_Sel_eTracking_BW);
524  BAOB_P_Set_CFL_BW(h, BW_Sel_eTracking_BW);
525     
526        BREG_Write32(h->hRegister, BCHP_OOB_STFLTH, 0x0D060000); 
527 
528        /*Do not wait for FEC or auto invert spectrum in Cable Card Mode*/
529        if (h->pAcqParam->BAOB_Acquire_Params.BYP == BAOB_Acquire_Params_eEnable)
530        {
531                BKNI_Sleep(CABLECARD_WAIT_TIME);
532        }
533        else
534        {
535                /*settling time for FEC to declare/maintain lock*/
536                if (h->pAcqParam->BAOB_Acquire_Params.AA == BAOB_Acquire_Params_BPS_eDVS178)
537                {
538                        BKNI_Sleep(ANNEXB_FEC_WAIT_TIME);                                       
539                }
540                else
541                {
542                        BKNI_Sleep(ANNEXA_FEC_WAIT_TIME);
543                }
544
545                FEC_LockFlag = BREG_ReadField(h->hRegister, OOB_IRQST,  FEC_IS); 
546               
547                /*Spectral Inversion Auto control*/
548                /*Only used when not in Cable Card mode*/
549                if ((h->pAcqParam->BAOB_Acquire_Params.AI == BAOB_Acquire_Params_eEnable) && (FEC_LockFlag == 0))
550                {
551                        AutoInversionFlag = BREG_ReadField(h->hRegister, OOB_CTRL2, OFMT);
552                        AutoInversionFlag = AutoInversionFlag ^ 1;
553                        BREG_WriteField(h->hRegister, OOB_CTRL2, OFMT, AutoInversionFlag);
554                        /*settling time for FEC to declare/maintain lock*/
555                        if (h->pAcqParam->BAOB_Acquire_Params.AA == BAOB_Acquire_Params_BPS_eDVS178)
556                        {
557                                BKNI_Sleep(ANNEXB_FEC_WAIT_TIME);                                       
558                        }
559                        else
560                        {
561                                BKNI_Sleep(ANNEXA_FEC_WAIT_TIME);
562                        }
563                }
564        }
565
566        /*Setup Nyq filters*/
567        /*h->pAcqParam->BAOB_Acquire_Params.Nyq=BAOB_Acquire_Params_Nyq_ehalf_raised;   */ 
568
569        if(h->pAcqParam->BAOB_Acquire_Params.Nyq == BAOB_Acquire_Params_Nyq_ehalf_rtraised)
570        {
571                /*root raised cosine with 0.5 rolloff*/
572                BREG_WriteField(h->hRegister, OOB_CTRL1, NYQ_SEL, 0);
573                BDBG_MSG(("root raised cosine %d",h->pAcqParam->BAOB_Acquire_Params.Nyq )); 
574        }
575        else if(h->pAcqParam->BAOB_Acquire_Params.Nyq == BAOB_Acquire_Params_Nyq_ehalf_raised)
576        {
577                /*raised cosine with 0.5 rolloff*/
578                BREG_WriteField(h->hRegister, OOB_CTRL1, NYQ_SEL, 1); 
579                BDBG_MSG(("raised cosine %d",h->pAcqParam->BAOB_Acquire_Params.Nyq ));
580        }
581        else 
582        {
583                /*root raised cosine with 0.3 rolloff*/
584                BREG_WriteField(h->hRegister, OOB_CTRL1, NYQ_SEL, 2); 
585        }
586
587       
588
589        /*setup ACI filters*/
590        if(Symbol_Rate == 1024000)
591        {       
592                BDBG_ERR(("Setting filters for 1.024"));
593                BREG_WriteField(h->hRegister, OOB_BYP, ACI, 0);         
594               
595                BREG_WriteField(h->hRegister, OOB_CTRL1, ACI_SEL, 2);
596        }
597        else if(Symbol_Rate == 772000)
598        {       
599                BDBG_ERR(("Setting filters for 0.772"));
600
601                BREG_WriteField(h->hRegister, OOB_BYP, ACI, 0); 
602                BREG_WriteField(h->hRegister, OOB_CTRL1, ACI_SEL, 1);
603        }
604        else if(Symbol_Rate == 1544000)
605        {       
606                BDBG_ERR(("Setting filters for 1.544"));
607                BREG_WriteField(h->hRegister, OOB_BYP, ACI, 0); 
608                BREG_WriteField(h->hRegister, OOB_CTRL1, ACI_SEL, 3);
609        }
610
611
612#if 0   
613        BDBG_ERR(("OOB symbol rate = %d", Symbol_Rate));
614                BREG_WriteField(h->hRegister, OOB_BYP, ACI, 0);
615                BREG_WriteField(h->hRegister, OOB_CTRL1, NYQ_SEL, 0);
616                BREG_WriteField(h->hRegister, OOB_CTRL1, ACI_SEL, 0);
617#endif
618
619#if 0
620        /* this a bug in A0 where the status needs to clear the first time */
621        BREG_Write32(h->hRegister, BCHP_OOB_IRQMST2A, 0xffffffff);
622
623    if (h->pAcqParam->BAOB_Acquire_Params.BYP == BAOB_Acquire_Params_eEnable)
624        {
625                AobL2_EnableIsr(BCHP_INT_ID_AOB_SNR_IS_INTR);
626                AobL2_EnableIsr(BCHP_INT_ID_AOB_SNR_LS_INTR);
627        }
628        else
629        {
630                AobL2_EnableIsr(BCHP_INT_ID_AOB_FEC_IS_INTR);
631                AobL2_EnableIsr(BCHP_INT_ID_AOB_FEC_LS_INTR);
632        }
633#endif
634                return BERR_SUCCESS;
635}
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