source: svn/trunk/newcon3bcm2_21bu/magnum/portinginterface/dma/7552/bdma_priv.h

Last change on this file was 2, checked in by jglee, 11 years ago

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1/***************************************************************************
2 *     Copyright (c) 2003-2011, Broadcom Corporation
3 *     All Rights Reserved
4 *     Confidential Property of Broadcom Corporation
5 *
6 *  THIS SOFTWARE MAY ONLY BE USED SUBJECT TO AN EXECUTED SOFTWARE LICENSE
7 *  AGREEMENT  BETWEEN THE USER AND BROADCOM.  YOU HAVE NO RIGHT TO USE OR
8 *  EXPLOIT THIS MATERIAL EXCEPT SUBJECT TO THE TERMS OF SUCH AN AGREEMENT.
9 *
10 * $brcm_Workfile: bdma_priv.h $
11 * $brcm_Revision: Hydra_Software_Devel/20 $
12 * $brcm_Date: 4/4/11 11:45p $
13 *
14 * Module Description:
15 *
16 * Revision History:
17 *
18 * $brcm_Log: /magnum/portinginterface/dma/7400/bdma_priv.h $
19 *
20 * Hydra_Software_Devel/20   4/4/11 11:45p vanessah
21 * SWDTV-6186: 35233 DMA support
22 *
23 * Hydra_Software_Devel/19   2/2/11 10:29a vanessah
24 * SW7550-670: add Sharf DMA support
25 *
26 * Hydra_Software_Devel/18   12/22/10 3:01p vanessah
27 * SWBLURAY-23683: Add DMA PortingInterface support for Blast (7640) chip
28 *
29 * Hydra_Software_Devel/18   12/21/10 6:40p vanessah
30 * SWBLURAY-23683: Add DMA PortingInterface support for Blast (7640) chip
31 *
32 * Hydra_Software_Devel/17   12/1/10 12:08p cdisc
33 * SW35230-2451: adding Sharf support for 35230 C0
34 *
35 * Hydra_Software_Devel/16   3/9/10 12:05p syang
36 * SW7630-72:  update to 41 key slots for 7601, 7635 and 7630
37 *
38 * Hydra_Software_Devel/15   9/15/09 8:15a tdo
39 * SW7630-13: Fix compiling error
40 *
41 * Hydra_Software_Devel/14   9/14/09 5:01p tdo
42 * SW7630-13: Bringup of portinginterface "dma" for Grain (7630)
43 *
44 * Hydra_Software_Devel/13   4/8/09 4:23p vsilyaev
45 * PR 54015: Don't include bkni_multi.h into the bdbg.h. All thread-aware
46 * modules should include explicitly bkni_multi.h
47 *
48 * Hydra_Software_Devel/12   4/7/09 4:09p syang
49 * PR 52973: add 7635 support
50 *
51 * Hydra_Software_Devel/11   1/23/09 11:24a syang
52 * PR 43729:  fix compile for 7405
53 *
54 * Hydra_Software_Devel/10   1/23/09 10:33a syang
55 * PR 43729: change 7440 sharf num to 2, per abbas' request
56 *
57 * Hydra_Software_Devel/9   11/14/08 2:55p syang
58 * PR 43729:  correct number of sharf engines for 7601
59 *
60 * Hydra_Software_Devel/8   10/3/08 5:29p syang
61 * PR 34606: support 41 key slots for 7405 B0
62 *
63 * Hydra_Software_Devel/7   8/20/08 4:10p syang
64 * PR 45212: clean up #define
65 *
66 * Hydra_Software_Devel/6   8/20/08 2:11p syang
67 * PR 45212:  turn off AUTO_APPEND usage (it seems caused wrong data
68 * during encryption with dyn link), and now 3 recording streams with
69 * crypto/time-shift still works fine.
70 *
71 * Hydra_Software_Devel/5   8/20/08 1:27p syang
72 * PR 43729:  add sharf for 7601
73 *
74 * Hydra_Software_Devel/4   7/31/08 10:51a syang
75 * PR 34606:  use curr_desc again (reg reading validation added)
76 *
77 * Hydra_Software_Devel/3   7/23/08 6:27p tdo
78 * PR33689: Add support for 7601
79 *
80 * Hydra_Software_Devel/2   7/11/08 3:46p syang
81 * PR 43729:  rm code for old crypto hw arch
82 *
83 * Hydra_Software_Devel/30   7/11/08 11:48a syang
84 * PR 43729:  make bdma.h chip independent
85 *
86 * Hydra_Software_Devel/27   5/28/08 5:20p syang
87 * PR 34606: handle the dyn link failure when AUTO_PEND is suppoted and
88 * LAST bit in desc is not cleared
89 *
90 * Hydra_Software_Devel/26   5/19/08 1:58p syang
91 * PR 34606:  clean up
92 *
93 * Hydra_Software_Devel/25   5/19/08 11:48a syang
94 * PR 34606:  add validation for HW reg reading
95 *
96 * Hydra_Software_Devel/24   2/22/08 9:51a rpan
97 * PR39458: Initial work for bcm3556.
98 *
99 * Hydra_Software_Devel/23   2/21/08 1:38p rpan
100 * PR34854: Initial work for bcm3548.
101 *
102 * Hydra_Software_Devel/22   12/12/07 3:42p syang
103 * PR 31923: added auto-append support to PI
104 *
105 * Hydra_Software_Devel/21   12/7/07 4:10p syang
106 * PR 34606: rewrite more than half of code to support hw sharing for
107 * kernel and user-mode sides
108 *
109 * Hydra_Software_Devel/19   10/15/07 11:44a yuxiaz
110 * PR35323: Added DMA support for 7325.
111 *
112 * Hydra_Software_Devel/18   5/8/07 3:40p yuxiaz
113 * PR29728: Basic DMA support for 7405-A0
114 *
115 * Hydra_Software_Devel/17   3/21/07 12:47p syang
116 * PR 28173: dyn link works now after fixing next_desc shift and status
117 * proc  tran loop break. fixed cur hw desc left shift
118 *
119 * Hydra_Software_Devel/16   3/19/07 4:17p syang
120 * PR 28171: prepare to add sharf support
121 *
122 * Hydra_Software_Devel/15   3/8/07 2:09p tdo
123 * PR 26224:  Move chip secific and prive macro defines out of bdma.h back
124 * to bdma_priv.h
125 *
126 * Hydra_Software_Devel/14   3/7/07 4:27p tdo
127 * PR 26224:  Add support for 2nd MEM DMA for 7400B0
128 *
129 * Hydra_Software_Devel/13   3/7/07 3:08p yuxiaz
130 * PR 28167: Added DMA support for MEMC_2 on 7400.
131 *
132 * Hydra_Software_Devel/12   2/5/07 4:43p syang
133 * PR 23354: allow mem addr in mem_1; cleanup cip specific code section
134 * macro usage
135 *
136 * Hydra_Software_Devel/11   1/8/07 12:53p tdo
137 * PR 26224:  Add second DMA MEM engine support for 7400 B0
138 *
139 * Hydra_Software_Devel/10   10/3/06 4:02p syang
140 * PR 24634: replace critical section with private mutex for
141 * mem/pci_dma_handle create/destroy.
142 *
143 * Hydra_Software_Devel/9   9/22/04 3:44p syang
144 * PR12728: Fixed -pdantic build warnings.
145 *
146 * Hydra_Software_Devel/8   11/20/03 5:46p syang
147 * set ptr to NULL in BDMA_P_GENERIC_DESTROY_CONTEXT
148 *
149 * Hydra_Software_Devel/7   11/19/03 6:39p syang
150 * take out struct ptr cast from get_context
151 *
152 * Hydra_Software_Devel/6   10/23/03 3:16p syang
153 * added real pci dma implementation
154 *
155 * Hydra_Software_Devel/5   10/23/03 11:07a syang
156 * first time checking after resolving comipling errors
157 *
158 * Hydra_Software_Devel/4   10/21/03 4:46p syang
159 * added GetMemDmaHandle and GetPciDmaHandle
160 *
161 * Hydra_Software_Devel/3   10/20/03 12:19p syang
162 * change function name SetMem/PciHandle to SetMem/PciDmaHandle
163 *
164 * Hydra_Software_Devel/2   10/17/03 4:16p syang
165 * generic_get_context are moved in from tool.h, engine id enum is added
166 *
167 * Hydra_Software_Devel/1   10/7/03 3:53p syang
168 * init version
169 *
170 * Hydra_Software_Devel/1   9/25/03 6:44p syang
171 * init version, from scratch
172 *
173 ***************************************************************************/
174#ifndef BDMA_PRIV_H__
175#define BDMA_PRIV_H__
176
177#include "bdma.h"
178#include "bdma_errors.h"
179#include "bkni_multi.h"
180
181#ifdef __cplusplus
182extern "C" {
183#endif
184
185
186#if (BCHP_CHIP == 7400)
187#if (BCHP_VER>=BCHP_VER_B0)
188#define BDMA_P_MEM_2_ADDR_BASE                (0x70000000)
189#define BDMA_P_MEM_2_ADDR_SIZE                (64*1024*1024)
190#endif
191#define BDMA_P_MEM_1_ADDR_BASE                (0x60000000)
192#define BDMA_P_MEM_1_ADDR_SIZE                (64*1024*1024)
193#elif (BCHP_CHIP==7405) || (BCHP_CHIP == 7325)
194#define BDMA_P_MEM_1_ADDR_BASE                (0x60000000)
195#define BDMA_P_MEM_1_ADDR_SIZE                (64*1024*1024)
196#elif (BCHP_CHIP==3563)
197#define BDMA_P_MEM_1_ADDR_BASE                (0x60000000)
198#define BDMA_P_MEM_1_ADDR_SIZE                (32*1024*1024)
199#endif
200
201#if (BCHP_CHIP==7400) || (BCHP_CHIP==7401)
202#define BDMA_P_MEM_ADDR_SIZE                  (7<<28)
203#else
204#define BDMA_P_MEM_ADDR_SIZE                  (1<<28)
205#endif
206
207/* number of mem ctrl */
208#if (BCHP_CHIP==7400) && (BCHP_VER>=BCHP_VER_B0)
209#define BDMA_P_SUPPORT_MEM_CTRL                3
210#elif (BCHP_CHIP==7405) || (BCHP_CHIP == 7325) || (BCHP_CHIP == 7335)
211#define BDMA_P_SUPPORT_MEM_CTRL                2
212#elif (BCHP_CHIP==3563)
213#define BDMA_P_SUPPORT_MEM_CTRL                2
214#else
215#define BDMA_P_SUPPORT_MEM_CTRL                1
216#endif
217
218#if ((BCHP_CHIP==7440) && (BCHP_VER>=BCHP_VER_B0)) || \
219    (BCHP_CHIP == 7601) || (BCHP_CHIP == 7635) || (BCHP_CHIP == 7630) || (BCHP_CHIP == 7640) \
220    || ((BCHP_CHIP == 35230) && (BCHP_VER==BCHP_VER_C0)) \
221    || ((BCHP_CHIP ==  7550) && (BCHP_VER>=BCHP_VER_B0)) \
222    || (BCHP_CHIP ==  35233)
223#define BDMA_P_SUPPORT_SHARF_DMA_ENGINE        2
224#endif
225
226/* number of mem dma HW engines */
227#if (BCHP_CHIP==7400) && (BCHP_VER>=BCHP_VER_B0)
228#define BDMA_P_SUPPORT_MEM_DMA_ENGINE          2
229#elif(BCHP_CHIP==7550)
230#define BDMA_P_SUPPORT_MEM_DMA_ENGINE          0
231#else
232#define BDMA_P_SUPPORT_MEM_DMA_ENGINE          1
233#endif
234
235/* number of pci dma HW engines */
236#if (BCHP_CHIP == 3548) || (BCHP_CHIP == 3556)
237#define BDMA_P_SUPPORT_PCI_DMA_ENGINE          0
238#else
239#define BDMA_P_SUPPORT_PCI_DMA_ENGINE          1
240#endif
241
242/* register name support mutiple engine or not */
243#if ((BCHP_CHIP==3548) || (BCHP_CHIP==3556) || \
244     (BCHP_CHIP==3563) || (BCHP_CHIP==7118) || (BCHP_CHIP==7401) || (BCHP_CHIP==7403) || \
245     (BCHP_CHIP==7440) || ((BCHP_CHIP==7400) && (BCHP_VER<BCHP_VER_B0)) || \
246     (BCHP_CHIP==7601) || (BCHP_CHIP==7635)) || (BCHP_CHIP==7630)
247#define BDMA_P_SUPPORT_MEM_DMA_REG_NAME_i      0
248#else
249#define BDMA_P_SUPPORT_MEM_DMA_REG_NAME_i      1
250#endif
251
252/* Scatter-Gather */
253#if ((BCHP_CHIP==3563) || (BCHP_CHIP==7118) || (BCHP_CHIP==7401) || (BCHP_CHIP==7403) || \
254     ((BCHP_CHIP==7400) && (BCHP_VER<BCHP_VER_B0)) || \
255     ((BCHP_CHIP==7440) && (BCHP_VER<BCHP_VER_B0)))
256#define BDMA_P_SUPPORT_MEM_DMA_SCATTER_GATHER  0
257#else
258#define BDMA_P_SUPPORT_MEM_DMA_SCATTER_GATHER  1
259#endif
260
261/* auto-pend so that scatter-gather link list can be appended with non-scatter-gather linked list */
262#if ((BCHP_CHIP==3563) || (BCHP_CHIP==7118) || (BCHP_CHIP==7401) || (BCHP_CHIP==7403) || \
263     ((BCHP_CHIP==7400) && (BCHP_VER<BCHP_VER_D0)) || (BCHP_CHIP==7440) || \
264     ((BCHP_CHIP==7405) && (BCHP_VER<BCHP_VER_B0)))
265#define BDMA_P_SUPPORT_MEM_DMA_AUTO_APPEND     0
266#else
267/* XXX ??? AUTO_APPEND currently cause bad data with dyn link */
268#define BDMA_P_SUPPORT_MEM_DMA_AUTO_APPEND     0
269#endif
270
271/* 41 key slots */
272#if ((BCHP_CHIP==3548) || (BCHP_CHIP==3556) || (BCHP_CHIP==3560) || \
273         (BCHP_CHIP==3563) || (BCHP_CHIP==7038) || \
274         (BCHP_CHIP==7118) || (BCHP_CHIP==7325) || (BCHP_CHIP==7335) || \
275         (BCHP_CHIP==7400) || (BCHP_CHIP==7401) || (BCHP_CHIP==7403) || \
276         (BCHP_CHIP==7438) || (BCHP_CHIP==7440) || \
277         ((BCHP_CHIP==7405) && (BCHP_VER<BCHP_VER_B0)))
278#define BDMA_P_SUPPORT_MEM_DMA_41_KEY_SLOTS    0
279#else
280#define BDMA_P_SUPPORT_MEM_DMA_41_KEY_SLOTS    1
281#endif
282
283#define BDMA_P_WATER_MARK_SG_OPEN              (0x2A)
284#define BDMA_P_WATER_MARK_SG_CLOSE             (0x33)
285#define BDMA_P_WATER_MARK_MASK                 (0x3F)
286
287
288/* code configure */
289#define BDMA_P_USE_CURR_DESC_ADDR                  1
290
291#define BDMA_P_CHECK_BASIC                     0
292#define BDMA_P_CHECK_NEXT_DESC                 0
293#define BDMA_P_CHECK_SCATTER_GATHER            0
294#define BDMA_P_CHECK_CORRUPT                   0
295
296#define BDMA_P_SHOW_DESC                       0
297#define BDMA_P_SHOW_SG_OPEN                    0
298#define BDMA_P_SHOW_DYN_LINK_FAIL              0
299
300
301/***************************************************************************
302 *
303 *  Generic utility macro
304 *
305 ****************************************************************************/
306
307/* This macro take the check for a validity of a handle, and
308 * cast to context pointer.
309 */
310#define BDMA_P_GENERIC_GET_CONTEXT(handle, context, structname) \
311{ \
312        if(!(handle) || \
313           (((structname*)(handle))->ulBlackMagic != \
314            (sizeof(structname) | 0xbac98700))) \
315        { \
316                BDBG_ERR(("NULL context handle\n")); \
317                (context) = NULL; \
318        } \
319        else \
320        { \
321                (context) = (handle); \
322        } \
323}
324
325/* This macro set the black magic for later handle validation
326 */
327#define BDMA_P_GENERIC_SET_BLACK_MAGIC(handle, structname) \
328{ \
329        ((structname*)(handle))->ulBlackMagic = sizeof(structname) | 0xbac98700; \
330}
331
332/* This macro ends the function if error "result" is seen
333 */
334#define BDMA_P_END_IF_ERR(result, done_lable) \
335        if ( BERR_SUCCESS != (result)) \
336        {\
337                goto done_lable;  \
338        }
339
340/* This macro shred the garbage
341 */
342#if BDBG_DEBUG_BUILD
343#define BDMA_P_GENERIC_DESTROY_CONTEXT(struct_ptr, structname) \
344{ \
345        BKNI_Memset((void*)struct_ptr, 0xA3, sizeof(structname)); \
346        BKNI_Free((void*)struct_ptr); \
347        struct_ptr = NULL; \
348}
349#else
350#define BDMA_P_GENERIC_DESTROY_CONTEXT(struct_ptr, structname) \
351{ \
352        BKNI_Free((void*)struct_ptr); \
353}
354#endif
355
356/***************************************************************************
357 *
358 *  DMA main context utility macro
359 *
360 ****************************************************************************/
361
362#define BDMA_P_MAIN_GET_CONTEXT(handle, context) \
363        BDMA_P_GENERIC_GET_CONTEXT(handle, context, BDMA_P_Context)
364
365#define BDMA_P_MAIN_SET_BLACK_MAGIC(handle) \
366        BDMA_P_GENERIC_SET_BLACK_MAGIC(handle, BDMA_P_Context)
367
368#define BDMA_P_MAIN_DESTROY_CONTEXT(struct_ptr) \
369        BDMA_P_GENERIC_DESTROY_CONTEXT(struct_ptr, BDMA_P_Context)
370
371
372/***************************************************************************
373 *
374 *  Main context struct and utility functions
375 *
376 ****************************************************************************/
377
378/***************************************************************************
379 * BDMA module Context
380 */
381typedef struct BDMA_P_Context
382{
383        uint32_t   ulBlackMagic;   /* Black magic for handle validation */
384
385        /* handed down from up level sw */
386        BCHP_Handle    hChip;
387        BREG_Handle    hRegister;
388        BMEM_Handle    hMemory;
389        BINT_Handle    hInterrupt;
390
391        /* protect dma API calls from diff threads */
392        BKNI_MutexHandle hMutex;
393
394#if BDMA_P_SUPPORT_MEM_DMA_ENGINE
395        BDMA_Mem_Handle hMemDma[BDMA_P_SUPPORT_MEM_DMA_ENGINE];
396#endif
397
398#if BDMA_P_SUPPORT_PCI_DMA_ENGINE
399        BDMA_Pci_Handle hPciDma[BDMA_P_SUPPORT_PCI_DMA_ENGINE];
400#endif
401
402#ifdef BDMA_P_SUPPORT_SHARF_DMA_ENGINE
403        BDMA_Mem_Handle hSharfDma[BDMA_P_SUPPORT_SHARF_DMA_ENGINE];
404#endif
405
406} BDMA_P_Context;
407
408/***************************************************************************
409 * BDMA private function to get diff handles passed in as module open
410 * no paramter validation
411 */
412BCHP_Handle BDMA_P_GetChipHandle( BDMA_Handle  hDma );
413BREG_Handle BDMA_P_GetRegisterHandle( BDMA_Handle  hDma );
414BMEM_Handle BDMA_P_GetMemoryHandle( BDMA_Handle  hDma );
415BINT_Handle BDMA_P_GetInterruptHandle( BDMA_Handle  hDma );
416
417/***************************************************************************
418 * BDMA private function to set sub-module handle
419 * no paramter validation
420 * Note that BDMA_P_GetMemDmaHandle and BDMA_P_SetMemDmaHandle are for
421 * backward compatible.  For 7400 B0 chip, these 2 functions will set or
422 * return the handle of the last MEM engine created.
423 */
424#if BDMA_P_SUPPORT_MEM_DMA_ENGINE
425BDMA_Mem_Handle BDMA_P_GetMemDmaHandle( BDMA_Handle hDma, BDMA_MemDmaEngine eEngine );
426void BDMA_P_SetMemDmaHandle( BDMA_Handle hDma, BDMA_MemDmaEngine eEngine, BDMA_Mem_Handle hMemDma );
427#endif
428
429#if BDMA_P_SUPPORT_PCI_DMA_ENGINE
430BDMA_Pci_Handle BDMA_P_GetPciDmaHandle( BDMA_Handle hDma, BDMA_PciDmaEngine eEngine );
431void BDMA_P_SetPciDmaHandle( BDMA_Handle hDma, BDMA_PciDmaEngine eEngine, BDMA_Pci_Handle hPciDma );
432#endif
433
434#ifdef __cplusplus
435}
436#endif
437
438#endif /* #ifndef BDMA_PRIV_H__ */
439
440/* end of file */
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