| 1 | /*************************************************************************** |
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| 2 | * Copyright (c) 2003-2011, Broadcom Corporation |
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| 3 | * All Rights Reserved |
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| 4 | * Confidential Property of Broadcom Corporation |
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| 5 | * |
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| 6 | * THIS SOFTWARE MAY ONLY BE USED SUBJECT TO AN EXECUTED SOFTWARE LICENSE |
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| 7 | * AGREEMENT BETWEEN THE USER AND BROADCOM. YOU HAVE NO RIGHT TO USE OR |
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| 8 | * EXPLOIT THIS MATERIAL EXCEPT SUBJECT TO THE TERMS OF SUCH AN AGREEMENT. |
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| 9 | * |
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| 10 | * $brcm_Workfile: bdma_sharf.h $ |
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| 11 | * $brcm_Revision: Hydra_Software_Devel/3 $ |
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| 12 | * $brcm_Date: 3/1/11 8:21a $ |
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| 13 | * |
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| 14 | * Module Description: |
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| 15 | * |
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| 16 | * Revision History: |
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| 17 | * |
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| 18 | * $brcm_Log: /magnum/portinginterface/dma/7440/bdma_sharf.h $ |
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| 19 | * |
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| 20 | * Hydra_Software_Devel/3 3/1/11 8:21a vanessah |
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| 21 | * SWBLURAY-24887: fix compile error for compile error. To be removed |
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| 22 | * later |
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| 23 | * |
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| 24 | * Hydra_Software_Devel/2 2/2/11 10:30a vanessah |
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| 25 | * SW7550-670: add Sharf DMA support |
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| 26 | * |
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| 27 | * Hydra_Software_Devel/2 12/11/07 10:58a syang |
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| 28 | * PR 34606: update sharf dma according to big rewriting of regular dma |
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| 29 | * code / API |
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| 30 | * |
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| 31 | * Hydra_Software_Devel/1 3/19/07 4:27p syang |
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| 32 | * PR 28171: init version |
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| 33 | * |
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| 34 | ***************************************************************************/ |
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| 35 | #ifndef BDMA_SHARF_H__ |
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| 36 | #define BDMA_SHARF_H__ |
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| 37 | |
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| 38 | #include "bdma.h" /* */ |
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| 39 | |
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| 40 | #if 0 |
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| 41 | |
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| 42 | #ifdef __cplusplus |
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| 43 | extern "C" { |
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| 44 | #endif |
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| 45 | |
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| 46 | |
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| 47 | /**************************** Module Overview: ***************************** |
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| 48 | SHARF memory dma engine is also represented by regular memory dma sub-module |
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| 49 | handle BDMA_Mem_Handle. The API functions and usage are exactly the same as |
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| 50 | regular memory dma, except that |
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| 51 | |
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| 52 | o Its BDMA_Mem_Handle sub-module handle should be created by |
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| 53 | BDMA_Mem_Sharf_Create, rather than BDMA_Mem_Create; should be destoyed |
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| 54 | by BDMA_Mem_Sharf_Destroy, rahtern than BDMA_Mem_Destroy. |
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| 55 | o BDMA_Mem_Sharf_Tran_SetCrypto should be used to configure the sharf SCRAM |
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| 56 | operations, and BDMA_Mem_SetCrypto should not be used for sharf dma. |
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| 57 | o BDMA_Mem_Sharf_Tran_SetSgStartEnd should be used to set the start |
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| 58 | point and/or end point of scatter-gather SCRAM. |
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| 59 | o BDMA_Mem_Sharf_Tran_SetDmaBlockInfo(_isr) are used to replace the |
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| 60 | regular BDMA_Mem_Tran_SetDmaBlockInfo(_isr). |
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| 61 | |
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| 62 | bdma_sharf.h could be considered as part of bdma.h for sharf particularly. |
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| 63 | ****************************************************************************/ |
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| 64 | |
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| 65 | /*************************************************************************** |
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| 66 | Summary: |
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| 67 | This enumeration represents the sharf dma engines. |
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| 68 | |
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| 69 | Description: |
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| 70 | BDMA_Sharf is an enumeration which represents the sharf dma engines. |
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| 71 | |
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| 72 | See Also: |
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| 73 | BDMA_Mem_Sharf_Create |
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| 74 | ***************************************************************************/ |
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| 75 | typedef enum BDMA_Sharf |
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| 76 | { |
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| 77 | BDMA_Sharf_e0, /* sharf memory dma engine 0 */ |
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| 78 | BDMA_Sharf_e1, /* sharf memory dma engine 1 */ |
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| 79 | BDMA_Sharf_eInvalid |
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| 80 | } |
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| 81 | BDMA_Sharf; |
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| 82 | |
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| 83 | /*************************************************************************** |
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| 84 | Summary: |
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| 85 | Creates a sub-module handle to sharf memory DMA engine. |
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| 86 | |
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| 87 | Description: |
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| 88 | Once created, the handle to the unique memory DMA engine is required by |
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| 89 | sharf memory DMA sub-module functions in order to configure the DMA engine |
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| 90 | and perform DMA transfer. |
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| 91 | |
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| 92 | This function also initializes the sub-module to default configure. |
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| 93 | |
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| 94 | Refer to BDMA_Mem_Handle and BDMA_Mem_Create2 description for detailed |
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| 95 | usage info. |
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| 96 | |
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| 97 | Input: |
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| 98 | hDma - Handle to the BDMA module. |
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| 99 | eEngine - The enum to identify the HW sharf memory dma engine. |
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| 100 | |
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| 101 | Output: |
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| 102 | phMemDma - The created memory DMA sub-module handle. If failure |
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| 103 | occurred phMemDma will holds NULL. |
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| 104 | |
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| 105 | Returns: |
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| 106 | BERR_INVALID_PARAMETER - Invalid function parameters. |
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| 107 | BERR_SUCCESS - Successfully created the handle. |
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| 108 | |
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| 109 | See Also: |
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| 110 | BDMA_Mem_sharf_Destroy |
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| 111 | **************************************************************************/ |
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| 112 | BERR_Code BDMA_Mem_Sharf_Create( |
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| 113 | BDMA_Handle hDma, |
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| 114 | BDMA_Sharf eEngine, |
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| 115 | BDMA_Mem_Settings * pSettings, |
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| 116 | BDMA_Mem_Handle * phMemDma ); |
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| 117 | |
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| 118 | |
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| 119 | /*************************************************************************** |
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| 120 | Summary: |
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| 121 | Destroys the sub-module handle of the memory DMA engine. |
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| 122 | |
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| 123 | Description: |
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| 124 | Once this function is called the sub-module handle can no longer be |
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| 125 | used. |
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| 126 | |
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| 127 | Memory DMA engine sub-module handle should be destroyed before closing |
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| 128 | the main module handle BDMA_Handle by BDMA_Close. |
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| 129 | |
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| 130 | Input: |
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| 131 | hMemDma - The memory DMA engine sub-module handle to destroy. |
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| 132 | |
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| 133 | Output: |
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| 134 | |
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| 135 | Returns: |
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| 136 | BERR_INVALID_PARAMETER - hMemDma is not a valid memory DMA engine |
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| 137 | sub-module handle. |
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| 138 | BERR_SUCCESS - Successfully destroyed |
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| 139 | |
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| 140 | See Also: |
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| 141 | BDMA_Mem_Sharf_Create |
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| 142 | **************************************************************************/ |
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| 143 | BERR_Code BDMA_Mem_Sharf_Destroy( |
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| 144 | BDMA_Mem_Handle hMemDma ); |
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| 145 | |
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| 146 | /*************************************************************************** |
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| 147 | Summary: |
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| 148 | This enumeration represents the possible SCRAM operations performed by |
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| 149 | sharf dma engines. |
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| 150 | |
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| 151 | Description: |
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| 152 | BDMA_SharfMode is an enumeration which represents the possible SCRAM |
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| 153 | operations performed by sharf dma engines. |
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| 154 | |
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| 155 | See Also: |
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| 156 | BDMA_Mem_Sharf_Tran_SetCrypto |
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| 157 | ***************************************************************************/ |
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| 158 | typedef enum BDMA_SharfMode |
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| 159 | { |
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| 160 | BDMA_SharfMode_ePassThrough, |
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| 161 | BDMA_SharfMode_eSha1, |
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| 162 | BDMA_SharfMode_eAes128CbcDecrypt, |
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| 163 | BDMA_SharfMode_eAes128CbcEncrypt, |
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| 164 | BDMA_SharfMode_eCmac, |
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| 165 | BDMA_SharfMode_eAes128EcbDecrypt, |
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| 166 | BDMA_SharfMode_eAes128EcbEncrypt, |
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| 167 | BDMA_SharfMode_eInvalid |
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| 168 | } |
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| 169 | BDMA_SharfMode; |
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| 170 | |
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| 171 | |
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| 172 | /*************************************************************************** |
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| 173 | Summary: |
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| 174 | Set sharf scram operation. |
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| 175 | |
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| 176 | Description: |
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| 177 | During a DMA data transfer, sharf memory DMA engines could be configured |
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| 178 | to perform different kind of SCRAM operations. |
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| 179 | |
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| 180 | In the case that eSharfMode is BDMA_SharfMode_ePassThrough, the data will |
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| 181 | pass through sharf without SCRAM operation. |
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| 182 | |
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| 183 | If eSharfMode has other valid value, the specified SCRAM is performed by |
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| 184 | sharf HW. |
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| 185 | |
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| 186 | Further, when scatter-gather mode is enabled by bSgEnable, the dma engine |
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| 187 | will treat the data stream section of a list of dma blocks as a whole for |
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| 188 | SCRAM purpose. The stream section starts from the beginning of the block |
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| 189 | marked as scatter-gather start point, and ends at the end of the block |
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| 190 | marked as scatter-gather end point. bSgEnable and eSharfMode can not |
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| 191 | change between the scatter-gather start point and end point. |
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| 192 | |
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| 193 | When bUseBspKey is false, sharf uses the key wrapped in the head of the |
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| 194 | scatter-gather data stream section, for the following data encrypt or |
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| 195 | decrypt. if bUseBspKey is true, sharf uses the key supplied by Aegis |
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| 196 | directly for data encrypt and decrypt, regardless of the state of key- |
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| 197 | present set with BDMA_Mem_Sharf_Tran_SetSgStartEnd. |
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| 198 | |
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| 199 | The sub-module maintains a current state of settings by this API function. |
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| 200 | Each setting modifies the current state and is applied to the future |
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| 201 | calls to BDMA_Mem_Tran_SetDmaBlockInfo(_isr), unless it is reset again. |
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| 202 | |
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| 203 | Input: |
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| 204 | hTran - The transfer handle to set crypto. |
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| 205 | BDMA_SharfMode - SCRAM operation mode. |
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| 206 | bSgEnable - Whether enable scatter-gather SCRAM operation. |
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| 207 | bUseBspKey - If it is true, sharf uses the key supplied by Aegis directly |
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| 208 | (regardless of what BDMA_Mem_Sharf_Tran_SetSgStartEnd sets for key-present). |
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| 209 | bCmp8LstByts - If it is true, sharf will use only the 8 least significant |
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| 210 | bytes for digest comparing. |
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| 211 | Output: |
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| 212 | |
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| 213 | Returns: |
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| 214 | BERR_SUCCESS - crypto setting is set successfully. |
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| 215 | BERR_INVALID_PARAMETER - One of the input parameters is invalid. |
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| 216 | |
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| 217 | See Also: |
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| 218 | BDMA_Mem_Sharf_Tran_SetSgStartEnd, BDMA_Mem_Sharf_Tran_SetSgStartEnd_isr, |
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| 219 | BDMA_Mem_Tran_SetDmaBlockInfo, BDMA_Mem_Tran_SetDmaBlockInfo_isr |
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| 220 | ****************************************************************************/ |
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| 221 | BERR_Code BDMA_Mem_Sharf_Tran_SetCrypto( |
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| 222 | BDMA_Mem_Tran_Handle hTran, |
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| 223 | BDMA_SharfMode eSharfMode, |
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| 224 | bool bSgEnable, |
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| 225 | bool bUseBspKey, |
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| 226 | bool bCmp8LstByts); |
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| 227 | |
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| 228 | /*************************************************************************** |
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| 229 | Summary: |
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| 230 | Set the start point and/or end point of scatter-gather. |
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| 231 | |
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| 232 | Description: |
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| 233 | When SCRAM operation and scatter-gather mode are enabled, the sharf dma |
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| 234 | engine will treat the data stream section of a list of dma blocks as a |
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| 235 | whole for SCRAM purpose. The stream section starts from the beginning of |
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| 236 | the block marked as scatter-gather start point, and ends at the end of |
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| 237 | the block marked as scatter-gather end point. |
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| 238 | |
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| 239 | This API function is used to mark the block with ID ulBlockId as scatter- |
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| 240 | gather start and/or end point. It can also mark whether crypto key and/or |
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| 241 | digest/MAC reference value is prepended into the data transferred by dma. |
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| 242 | |
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| 243 | Input: |
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| 244 | hTran - The transfer handle to set block info. |
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| 245 | ulBlockId - The block index in the block list of this transfer, it starts |
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| 246 | from 0. |
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| 247 | bStartSgScram - Whether this block is a scatter-gather start point. |
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| 248 | bEndSgScram - Whether this block is a scatter-gather end point. |
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| 249 | bKeyPresent - Whether crypto key is prepended into the data stream. |
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| 250 | bDigestPresent - Whether digest reference value is prepended into the data |
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| 251 | stream. |
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| 252 | Output: |
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| 253 | |
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| 254 | Returns: |
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| 255 | BERR_SUCCESS - The block info is set successfully. |
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| 256 | BERR_INVALID_PARAMETER - One of the input parameters is invalid. |
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| 257 | |
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| 258 | See Also: |
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| 259 | BDMA_Mem_Sharf_Tran_SetCrypto, BDMA_Mem_Tran_SetDmaBlockInfo, |
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| 260 | BDMA_Mem_Sharf_Tran_SetSgStartEnd_isr |
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| 261 | ****************************************************************************/ |
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| 262 | BERR_Code BDMA_Mem_Sharf_Tran_SetSgStartEnd( |
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| 263 | BDMA_Mem_Tran_Handle hTran, |
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| 264 | uint32_t ulBlockId, |
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| 265 | bool bStartSgScram, |
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| 266 | bool bEndSgScram, |
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| 267 | bool bKeyPresent, |
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| 268 | bool bDigestPresent ); |
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| 269 | |
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| 270 | /*************************************************************************** |
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| 271 | Summary: |
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| 272 | This enumeration represents the contexts sharf support. |
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| 273 | |
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| 274 | Description: |
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| 275 | BDMA_Context is an enumeration which represents the contexts sharf support. |
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| 276 | |
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| 277 | See Also: |
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| 278 | BDMA_Mem_Sharf_Tran_SetDmaBlockInfo, BDMA_Mem_Sharf_Tran_SetDmaBlockInfo_isr |
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| 279 | ***************************************************************************/ |
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| 280 | typedef enum BDMA_Context |
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| 281 | { |
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| 282 | BDMA_Context_eSha0, /* context 0 for sha op */ |
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| 283 | BDMA_Context_eSha1, /* context 1 for sha op */ |
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| 284 | BDMA_Context_eSha2, /* context 2 for sha op */ |
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| 285 | BDMA_Context_eAesOrCmac, /* context for AES or CMAC */ |
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| 286 | BDMA_Context_eInvalid |
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| 287 | } |
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| 288 | BDMA_Context; |
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| 289 | |
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| 290 | /*************************************************************************** |
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| 291 | Summary: |
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| 292 | Set the block info for one block of a DMA transfer. |
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| 293 | |
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| 294 | Description: |
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| 295 | In order to perform a DMA transfer, user first creates a transfer handle, |
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| 296 | then uses it to set block info for each block, to start the DMA transfer, |
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| 297 | and finally to get the transfer status. This API function is used to set |
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| 298 | block info for one block. |
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| 299 | |
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| 300 | ulBlockId is the index of the block, in the block list of the transfer |
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| 301 | represented by hTran. It starts from 0. eContext is the context number |
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| 302 | this block belongs to. |
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| 303 | |
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| 304 | The source and destination address are in memory bus address space. They |
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| 305 | are 28 bits unsigned integer number in 7038 chip. It is more likely that |
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| 306 | they are converted from virtual memory mapped address using |
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| 307 | BMEM_ConvertAddressToOffset and the virtual address is returned by |
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| 308 | BMEM_AllocAligned or BMEM_Alloc. |
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| 309 | |
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| 310 | Both addresses and block size are byte aligned. Max block size is |
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| 311 | 0xfff,ffff (16 MByte). Source and destination region overlap with |
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| 312 | (ulSrcBusAddr < ulDstBusAddr < ulSrcBusAddr+ulBlockSize) is not allowed. |
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| 313 | |
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| 314 | Encryption and decryption algorithms typically work on memory size of |
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| 315 | multiple 8 bytes or 16 bytes, and certain residue mode clear termination |
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| 316 | or OFB, might be used for the remaining bytes in the block. |
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| 317 | |
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| 318 | Please notice that when a non-word-aligned source address is used, the |
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| 319 | read endian determine which bytes to read in a 32 bits word. |
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| 320 | |
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| 321 | The current state of read endian, swap mode and encrypt / decrypt setting |
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| 322 | is used during the transfer of this block. |
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| 323 | |
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| 324 | Please refer to the DMA module overview and BDMA_Mem_Handle for more |
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| 325 | info on the usage of the memory DMA sub-module API functions. |
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| 326 | |
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| 327 | Input: |
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| 328 | hTran - The transfer handle to set block info. |
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| 329 | ulBlockId - The block index in the block list of this transfer, it starts |
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| 330 | from 0. |
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| 331 | eContext - The context number this block belongs to. |
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| 332 | ulDstBusAddr - Destination address in memory bus address space. |
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| 333 | ulSrcBusAddr - Source address in memory bus address space. |
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| 334 | ulBlockSize - This block size in bytes. |
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| 335 | |
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| 336 | Output: |
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| 337 | |
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| 338 | Returns: |
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| 339 | BERR_SUCCESS - The block info is set successfully. |
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| 340 | BDMA_ERR_OVERLAP - Source and destination region overlap. |
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| 341 | BDMA_ERR_SIZE_OUT_RANGE - ulBlockSize is 0 or bigger than 16 MByte. |
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| 342 | BERR_INVALID_PARAMETER - One of the input parameters is invalid. |
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| 343 | |
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| 344 | See Also: |
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| 345 | BDMA_Mem_Tran_Create2 |
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| 346 | BDMA_Mem_Tran_Start, BDMA_Mem_Tran_StartAndCallBack |
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| 347 | BDMA_Mem_SetByteSwapMode, BDMA_Mem_SetCrypt |
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| 348 | BDMA_Mem_Tran_SetDmaBlockInfo_isr |
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| 349 | ****************************************************************************/ |
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| 350 | BERR_Code BDMA_Mem_Sharf_Tran_SetDmaBlockInfo( |
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| 351 | BDMA_Mem_Tran_Handle hTran, |
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| 352 | uint32_t ulBlockId, |
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| 353 | BDMA_Context eContext, |
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| 354 | uint32_t ulDstBusAddr, |
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| 355 | uint32_t ulSrcBusAddr, |
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| 356 | uint32_t ulBlockSize ); |
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| 357 | |
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| 358 | /*************************************************************************** |
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| 359 | Summary: |
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| 360 | Set sharf scram operation. |
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| 361 | |
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| 362 | Description: |
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| 363 | This is the "_isr" version of BDMA_Mem_Sharf_Tran_SetCrypto. It is used |
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| 364 | in interrupt handler or critical session. For more description refer to |
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| 365 | BDMA_Mem_Sharf_Tran_SetCrypto. |
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| 366 | |
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| 367 | Input: |
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| 368 | hTran - The transfer handle to set crypto. |
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| 369 | BDMA_SharfMode - SCRAM operation mode. |
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| 370 | bSgEnable - Whether enable scatter-gather SCRAM operation. |
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| 371 | bUseBspKey - If it is true, sharf uses the key supplied by Aegis directly |
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| 372 | (regardless of what BDMA_Mem_Sharf_Tran_SetSgStartEnd sets for key-present). |
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| 373 | bCmp8LstByts - If it is true, sharf will use only the 8 least significant |
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| 374 | bytes for digest comparing. |
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| 375 | Output: |
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| 376 | |
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| 377 | Returns: |
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| 378 | BERR_SUCCESS - crypto setting is set successfully. |
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| 379 | BERR_INVALID_PARAMETER - One of the input parameters is invalid. |
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| 380 | |
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| 381 | See Also: |
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| 382 | BDMA_Mem_Sharf_Tran_SetCrypto, |
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| 383 | BDMA_Mem_Sharf_Tran_SetSgStartEnd, BDMA_Mem_Sharf_Tran_SetSgStartEnd_isr, |
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| 384 | BDMA_Mem_Tran_SetDmaBlockInfo, BDMA_Mem_Tran_SetDmaBlockInfo_isr |
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| 385 | ****************************************************************************/ |
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| 386 | BERR_Code BDMA_Mem_Sharf_Tran_SetCrypto_isr( |
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| 387 | BDMA_Mem_Tran_Handle hTran, |
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| 388 | BDMA_SharfMode eSharfMode, |
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| 389 | bool bSgEnable, |
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| 390 | bool bUseBspKey, |
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| 391 | bool bCmp8LstByts); |
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| 392 | |
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| 393 | /*************************************************************************** |
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| 394 | Summary: |
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| 395 | Set the start point and/or end point of scatter-gather. |
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| 396 | |
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| 397 | Description: |
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| 398 | This is the "_isr" version of BDMA_Mem_Sharf_Tran_SetSgStartEnd. It is |
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| 399 | used in interrupt handler or critical session. For more description refer |
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| 400 | to BDMA_Mem_Sharf_Tran_SetSgStartEnd. |
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| 401 | |
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| 402 | Input: |
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| 403 | hTran - The transfer handle to set block info. |
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| 404 | ulBlockId - The block index in the block list of this transfer, it starts |
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| 405 | from 0. |
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| 406 | bStartSgScram - Whether this block is a scatter-gather start point. |
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| 407 | bEndSgScram - Whether this block is a scatter-gather end point. |
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| 408 | bKeyPresent - Whether crypto key is prepended into the data stream. |
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| 409 | bDigestPresent - Whether digest reference value is prepended into the data |
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| 410 | stream. |
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| 411 | Output: |
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| 412 | |
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| 413 | Returns: |
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| 414 | BERR_SUCCESS - The block info is set successfully. |
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| 415 | BERR_INVALID_PARAMETER - One of the input parameters is invalid. |
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| 416 | |
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| 417 | See Also: |
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| 418 | BDMA_Mem_Sharf_Tran_SetCrypto, BDMA_Mem_Tran_SetDmaBlockInfo_isr, |
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| 419 | BDMA_Mem_Sharf_Tran_SetSgStartEnd |
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| 420 | ****************************************************************************/ |
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| 421 | BERR_Code BDMA_Mem_Sharf_Tran_SetSgStartEnd_isr( |
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| 422 | BDMA_Mem_Tran_Handle hTran, |
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| 423 | uint32_t ulBlockId, |
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| 424 | bool bStartSgScram, |
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| 425 | bool bEndSgScram, |
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| 426 | bool bKeyPresent, |
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| 427 | bool bDigestPresent ); |
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| 428 | |
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| 429 | /*************************************************************************** |
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| 430 | Summary: |
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| 431 | Set the block info for one block of a DMA transfer. |
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| 432 | |
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| 433 | Description: |
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| 434 | This is the "_isr" version of BDMA_Mem_Sharf_Tran_SetDmaBlockInfo. It is |
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| 435 | used in interrupt handler or critical session. For more description refer |
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| 436 | to BDMA_Mem_Sharf_Tran_SetDmaBlockInfo. |
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| 437 | |
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| 438 | Input: |
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| 439 | hTran - The transfer handle to set block info. |
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| 440 | ulBlockId - The block index in the block list of this transfer, it starts |
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| 441 | from 0. |
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| 442 | eContext - The context number this block belongs to. |
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| 443 | ulDstBusAddr - Destination address in memory bus address space. |
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| 444 | ulSrcBusAddr - Source address in memory bus address space. |
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| 445 | ulBlockSize - This block size in bytes. |
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| 446 | |
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| 447 | Output: |
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| 448 | |
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| 449 | Returns: |
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| 450 | BERR_SUCCESS - The block info is set successfully. |
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| 451 | BDMA_ERR_OVERLAP - Source and destination region overlap. |
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| 452 | BDMA_ERR_SIZE_OUT_RANGE - ulBlockSize is 0 or bigger than 16 MByte. |
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| 453 | BERR_INVALID_PARAMETER - One of the input parameters is invalid. |
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| 454 | |
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| 455 | See Also: |
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| 456 | BDMA_Mem_Tran_Create2 |
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| 457 | BDMA_Mem_Tran_Start, BDMA_Mem_Tran_StartAndCallBack |
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| 458 | BDMA_Mem_SetByteSwapMode, BDMA_Mem_SetCrypt |
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| 459 | BDMA_Mem_Tran_SetDmaBlockInfo_isr |
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| 460 | ****************************************************************************/ |
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| 461 | BERR_Code BDMA_Mem_Sharf_Tran_SetDmaBlockInfo_isr( |
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| 462 | BDMA_Mem_Tran_Handle hTran, |
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| 463 | uint32_t ulBlockId, |
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| 464 | BDMA_Context eContext, |
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| 465 | uint32_t ulDstBusAddr, |
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| 466 | uint32_t ulSrcBusAddr, |
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| 467 | uint32_t ulBlockSize ); |
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| 468 | |
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| 469 | |
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| 470 | #ifdef __cplusplus |
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| 471 | } |
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| 472 | #endif |
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| 473 | #endif |
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| 474 | #endif /* #ifndef BDMA_SHARF_H__ */ |
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| 475 | |
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| 476 | /* end of file */ |
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