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bgrc.c

Last change on this file was 2, checked in by jglee, 11 years ago
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1	/***************************************************************************
2	* Copyright (c) 2003-2012, Broadcom Corporation
3	* All Rights Reserved
4	* Confidential Property of Broadcom Corporation
5	*
6	* THIS SOFTWARE MAY ONLY BE USED SUBJECT TO AN EXECUTED SOFTWARE LICENSE
7	* AGREEMENT BETWEEN THE USER AND BROADCOM. YOU HAVE NO RIGHT TO USE OR
8	* EXPLOIT THIS MATERIAL EXCEPT SUBJECT TO THE TERMS OF SUCH AN AGREEMENT.
9	*
10	* $brcm_Workfile: bgrc.c $
11	* $brcm_Revision: Hydra_Software_Devel/232 $
12	* $brcm_Date: 3/2/12 1:28p $
13	*
14	* Module Description:
15	*
16	* Revision History:
17	*
18	* $brcm_Log: /magnum/portinginterface/grc/7435/bgrc.c $
19	*
20	* Hydra_Software_Devel/232 3/2/12 1:28p nissen
21	* SW7435-13 : Added support for 2nd M2MC in 7435 A0.
22	*
23	* Hydra_Software_Devel/231 2/16/12 3:35p nissen
24	* SW7405-5427: Adding flags for output mirroring when blitting
25	*
26	* Hydra_Software_Devel/230 2/1/12 1:51p nissen
27	* SW7346-660: Fixed BGRC_WaitForOperationReady timeout by checking ref
28	* count before waiting for event.
29	*
30	* Hydra_Software_Devel/229 1/6/12 1:25p nissen
31	* SW7435-13 : Fixed support for 7435 A0.
32	*
33	* Hydra_Software_Devel/228 12/21/11 5:21p nissen
34	* SW7360-5: Added support for the 7360 A0.
35	*
36	* Hydra_Software_Devel/227 12/15/11 6:36p nissen
37	* SW7435-13 : Added support for 7435 A0.
38	*
39	* Hydra_Software_Devel/226 12/14/11 4:41p nissen
40	* SW7435-13 : Added support for 7435 A0.
41	*
42	* Hydra_Software_Devel/225 12/8/11 2:09p nissen
43	* SW7425-1413: Disabled split fifo.
44	*
45	* Hydra_Software_Devel/224 10/5/11 5:27p nissen
46	* SW7425-248: Updated use of BDBG_OBJECTs.
47	*
48	* Hydra_Software_Devel/223 10/5/11 12:53p nissen
49	* SW7425-248: Removed BDBG_OBJECT support for the 7038.
50	*
51	* Hydra_Software_Devel/222 9/23/11 12:36p nissen
52	* SW7429-4: Added support for 7429.
53	*
54	* Hydra_Software_Devel/221 9/17/11 7:18p nissen
55	* SW7425-248: Added BDBG_OBJECT_SET.
56	*
57	* Hydra_Software_Devel/220 9/17/11 7:08p nissen
58	* SW7425-248: Added BDBG_OBJECT_ID.
59	*
60	* Hydra_Software_Devel/219 9/12/11 2:21p nissen
61	* SWBLURAY-27238: Fixing support for 7640 B0.
62	*
63	* Hydra_Software_Devel/218 9/9/11 7:26p nissen
64	* SWBLURAY-27238: Added support for 7640 B0.
65	*
66	* Hydra_Software_Devel/217 4/20/11 1:25p nissen
67	* SW7630-104: Added support for A8_Y8 format and big endian 420
68	* conversion.
69	*
70	* Hydra_Software_Devel/216 3/24/11 1:35p jhaberf
71	* SW35330-13: Added support for 35233 DTV chip
72	*
73	* Hydra_Software_Devel/215 3/2/11 11:24p nissen
74	* SW7038-3500: Fixed build errors on 7038.
75	*
76	* Hydra_Software_Devel/214 12/3/10 4:21p nissen
77	* SW35125-33: Added support for the 35125 DTV chip
78	*
79	* Hydra_Software_Devel/213 12/3/10 11:42a nissen
80	* SW7344-10: Added support for the 7344 and 7346.
81	*
82	* Hydra_Software_Devel/212 11/25/10 12:31p nissen
83	* SW7552-13: Fixed support for 7552.
84	*
85	* Hydra_Software_Devel/211 11/24/10 9:34p nissen
86	* SW7552-13: Added support for 7552.
87	*
88	* Hydra_Software_Devel/210 11/19/10 12:47p nissen
89	* SW7425-19: Fixed HW reset.
90	*
91	* Hydra_Software_Devel/209 10/12/10 1:15p nissen
92	* SW7231-9: Added support for the 7231.
93	*
94	* Hydra_Software_Devel/208 10/12/10 12:58p nissen
95	* SW7358-14: Added support for the 7358.
96	*
97	* Hydra_Software_Devel/207 9/24/10 1:41p nissen
98	* SW7550-579: Added GRC support for 7550 B0.
99	*
100	* Hydra_Software_Devel/206 9/20/10 12:13p nissen
101	* SW7405-4755: Fixed function for setting KeyMatrixScale order.
102	*
103	* Hydra_Software_Devel/205 9/17/10 5:58p nissen
104	* SW7325-809: Returning error if rectangle coordinates are greater than
105	* the max of 8191.
106	*
107	* Hydra_Software_Devel/204 9/1/10 8:03p nissen
108	* SW7135-11: Added support for building for the 7135.
109	*
110	* Hydra_Software_Devel/203 8/28/10 4:47p nissen
111	* SW7425-19: Added support for building for the 7422 and 7425.
112	*
113	* Hydra_Software_Devel/202 8/3/10 2:30p nissen
114	* SW7420-925: Removed BERR_TRACE when returning out of memory error.
115	*
116	* Hydra_Software_Devel/201 7/29/10 1:17p nissen
117	* SW7208-24: Fixed luma surface format for YUV420 blits.
118	*
119	* Hydra_Software_Devel/200 7/16/10 3:16p nissen
120	* SW35230-369: Fixing setting raster order for YUV420 secondary surface.
121	*
122	* Hydra_Software_Devel/199 7/2/10 3:12p nissen
123	* SW35230-369: Fixing method of setting raster order for YUV420.
124	*
125	* Hydra_Software_Devel/198 7/2/10 1:51p nissen
126	* SW35230-369: Changed raster order back to striped for YUV420 destripe
127	* blits.
128	*
129	* Hydra_Software_Devel/197 7/1/10 3:05p nissen
130	* SW35230-369: Changed raster order to linear for YUV420 destripe blits.
131	*
132	* Hydra_Software_Devel/196 7/1/10 2:26p nissen
133	* SW35230-369: Fixed raster order for YUV420 destripe blit.
134	*
135	* Hydra_Software_Devel/195 7/1/10 12:55p nissen
136	* SW35230-369: Fixed defines for YUV420 destripe blit.
137	*
138	* Hydra_Software_Devel/194 6/30/10 5:11p nissen
139	* SW35230-369: Fixing problem with YUV420 destripe blit.
140	*
141	* Hydra_Software_Devel/193 6/1/10 6:10p nissen
142	* SW7400-2716: Fixed pattern compile warning.
143	*
144	* Hydra_Software_Devel/192 5/28/10 2:55p nissen
145	* SW7400-2716: Fixed compiler warning.
146	*
147	* Hydra_Software_Devel/191 3/9/10 4:14p mward
148	* SW7400-2716: Cast return from BGRC_WaitForOperationsComplete() to void
149	* to indicate intentional ignore of return value to prevent Coverity
150	* error.
151	*
152	* Hydra_Software_Devel/190 1/10/10 3:22p nissen
153	* SW7400-2644: Changed default back to ScaleThenKeyThenMatrix, otherwise
154	* YCbCr420 blits hang.
155	*
156	* Hydra_Software_Devel/189 12/7/09 5:19p nissen
157	* SW7468-40: Added support for 7468.
158	*
159	* Hydra_Software_Devel/188 12/2/09 2:43p nissen
160	* SW35230-12: Added support for 35230.
161	*
162	* Hydra_Software_Devel/187 11/19/09 2:59p nissen
163	* SW7405-3429: Changed KeyMatrixScale order default to
164	* KeyThenScaleThenMatrix.
165	*
166	* Hydra_Software_Devel/186 11/17/09 9:47a nissen
167	* SW7408-16: Added support for 7408.
168	*
169	* Hydra_Software_Devel/185 11/4/09 4:29p nissen
170	* SW3556-849: Added support for 10-bit 422 and 444 formats for the
171	* 3548/3556.
172	*
173	* Hydra_Software_Devel/184 8/17/09 8:43p nissen
174	* PR 57469: Fixed WaitForOperationsComplete by restoring state when blit
175	* fails.
176	*
177	* Hydra_Software_Devel/183 8/12/09 3:30p nissen
178	* PR 57469: Added dummy blit to OperationsComplete to flush operation
179	* processing when device is idle.
180	*
181	* Hydra_Software_Devel/182 8/12/09 1:08p nissen
182	* PR 57469: Set min packet and operation sizes when opening.
183	*
184	* Hydra_Software_Devel/181 8/10/09 8:06p nissen
185	* PR 57469: Added code to return failure for WaitForOperationReady.
186	*
187	* Hydra_Software_Devel/180 8/10/09 6:14p nissen
188	* PR 57469: Fixed problem with WaitForOperationReady function.
189	*
190	* Hydra_Software_Devel/179 8/5/09 11:58a nissen
191	* PR 57328: Fixed BGRC_OperationsComplete.
192	*
193	* Hydra_Software_Devel/178 8/5/09 11:28a nissen
194	* PR 57328: Fixed BGRC_OperationsComplete to report when all operations
195	* have been processed, not just when the device is done.
196	*
197	* Hydra_Software_Devel/177 8/4/09 8:54p nissen
198	* PR 57093: Added support for 7125.
199	*
200	* Hydra_Software_Devel/176 8/4/09 5:52p nissen
201	* PR 57180: Added code to return error message when attempting to use a
202	* 10-bit source on devices that don't support it.
203	*
204	* Hydra_Software_Devel/175 7/8/09 6:09p nissen
205	* PR 55223: Added support for 7340 and 7342.
206	*
207	* Hydra_Software_Devel/174 7/7/09 5:52p nissen
208	* PR 56610: Moved local declaration to GRC handle structure.
209	*
210	* Hydra_Software_Devel/173 6/22/09 5:15p nissen
211	* PR 56219: Added support for disabling channels on the primary source
212	* surface, that will be provided by the secondary/alpha source surface.
213	*
214	* Hydra_Software_Devel/172 6/9/09 4:19p nissen
215	* PR 52504: Changed global and static variables to constants.
216	*
217	* Hydra_Software_Devel/171 6/8/09 6:34p nissen
218	* PR 51077: Fixed return value when getting error in
219	* BGRC_WaitForOperationsComplete().
220	*
221	* Hydra_Software_Devel/170 6/7/09 5:13p nissen
222	* PR 51077: Fixed while loop condition when waiting for periodic event.
223	*
224	* Hydra_Software_Devel/169 6/3/09 9:41p nissen
225	* PR 51077: Fixed condition when waiting for available memory.
226	*
227	* Hydra_Software_Devel/168 6/3/09 7:13p nissen
228	* PR 51077: Fixed problem with waiting for available memory.
229	*
230	* Hydra_Software_Devel/167 6/3/09 5:41p nissen
231	* PR 51077: Added memory cleanup before waiting on periodic event.
232	*
233	* Hydra_Software_Devel/166 6/2/09 9:44p nissen
234	* PR 51077: Fixed problem with waiting for available memory.
235	*
236	* Hydra_Software_Devel/165 6/1/09 8:37p nissen
237	* PR 51077: Changed periodic interrupt to happen more frequently.
238	*
239	* Hydra_Software_Devel/164 5/20/09 4:19p nissen
240	* PR 54637: Added support for using TestFeature1 when the M2MC operation
241	* queue is running.
242	*
243	* Hydra_Software_Devel/163 5/15/09 7:02p nissen
244	* PR 54637: Added wait after disabling TestFeature1.
245	*
246	* Hydra_Software_Devel/162 5/15/09 4:56p nissen
247	* PR 54637: Added code to reset TestFeature1 after blit.
248	*
249	* Hydra_Software_Devel/161 5/15/09 12:59p nissen
250	* PR 52465: Reseting test feature before using.
251	*
252	* Hydra_Software_Devel/160 5/13/09 1:49p nissen
253	* PR 52465: Disabling test feature when not in use.
254	*
255	* Hydra_Software_Devel/159 5/13/09 10:46a nissen
256	* PR 51077: Fixed problem with waiting for operations to complete.
257	*
258	* Hydra_Software_Devel/158 4/24/09 1:06p katrep
259	* PR54146: Fixed coveirty issue
260	*
261	* Hydra_Software_Devel/157 4/17/09 5:27p nissen
262	* PR 51077: Added code to wait function to check if event has already
263	* been set.
264	*
265	* Hydra_Software_Devel/156 4/17/09 4:35p nissen
266	* PR 51077: Added callbacks to wait functions.
267	*
268	* Hydra_Software_Devel/155 4/14/09 6:13p nissen
269	* PR 53698: Fixing destination palette bypass.
270	*
271	* Hydra_Software_Devel/154 4/13/09 4:48p nissen
272	* PR 54114: Fixed compile error for 7400.
273	*
274	* Hydra_Software_Devel/153 4/9/09 2:18p nissen
275	* PR 53698: Removed support for loading a destination palette because the
276	* M2MC does not support it.
277	*
278	* Hydra_Software_Devel/152 4/7/09 2:38p nissen
279	* PR 52976: Added support for 7635/7630 and future chips using RDB
280	* defines.
281	*
282	* Hydra_Software_Devel/151 4/1/09 8:31p nissen
283	* PR 51077: Added pattern and blend states to saving and restoring when
284	* waiting for operations to complete.
285	*
286	* Hydra_Software_Devel/150 4/1/09 4:03p nissen
287	* PR 51077: Added code to save and restore state when waiting for
288	* operations to complete.
289	*
290	* Hydra_Software_Devel/149 3/25/09 9:39p nissen
291	* PR 51077: Fixed memory leak when closing module.
292	*
293	* Hydra_Software_Devel/148 3/20/09 4:26p nissen
294	* PR 51077: Added functions to wait on operations, and better handling
295	* for running out of memory.
296	*
297	* Hydra_Software_Devel/147 3/17/09 2:55p nissen
298	* PR 52321: Added functions for enabling Alpha Premultiply.
299	*
300	* Hydra_Software_Devel/146 3/6/09 2:55p nissen
301	* PR 48325: Fixed Coverity Defect ID:12036 and 12037.
302	*
303	* Hydra_Software_Devel/145 2/26/09 4:26p nissen
304	* PR 52465: Using TestFeature1 prediction mode field.
305	*
306	* Hydra_Software_Devel/144 2/25/09 5:04p nissen
307	* PR 52465: Fixed device completion test in BGRC_OperationsComplete.
308	*
309	* Hydra_Software_Devel/143 2/25/09 4:29p nissen
310	* PR 48447: Set 3548/3556 B2 to use NOLEFT when output surface height is
311	* 1080.
312	*
313	* Hydra_Software_Devel/142 1/31/09 1:17a jrubio
314	* PR51629: add 7336 support
315	*
316	* Hydra_Software_Devel/141 12/3/08 7:46p nissen
317	* PR 47763: Fixed support for 7420.
318	*
319	* Hydra_Software_Devel/140 12/3/08 6:59p nissen
320	* PR 47763: Added support for 7420.
321	*
322	* Hydra_Software_Devel/139 10/23/08 9:45p nissen
323	* PR 46310: Changed TestFeature1 parameter to Normal instead of NoLeft.
324	*
325	* Hydra_Software_Devel/138 10/3/08 3:56p nissen
326	* PR 46310: Updated TestFeature1.
327	*
328	* Hydra_Software_Devel/137 10/1/08 6:10p nissen
329	* PR 46310: Added support for outputing to TestFeature1 surface for
330	* 3548/3556 B0.
331	*
332	* Hydra_Software_Devel/136 9/26/08 11:17a nissen
333	* PR 46715: Fixed setting alpha premultiply field for 7601.
334	*
335	* Hydra_Software_Devel/135 7/30/08 8:04p nissen
336	* PR 33687: Added support for the 7601.
337	*
338	* Hydra_Software_Devel/134 7/25/08 12:48p nissen
339	* PR 32979: Added memory fix for mosaic captures for 7405 only.
340	*
341	* Hydra_Software_Devel/133 6/23/08 11:28a nissen
342	* PR 43693: Added fix to init macro block when moduled opened for 3548
343	* and 3556.
344	*
345	* Hydra_Software_Devel/132 6/4/08 8:05p nissen
346	* PR 43321: Updated for 3548 and 3556.
347	*
348	* Hydra_Software_Devel/131 4/4/08 11:58a nissen
349	* PR 39460: Added support for the 3556.
350	*
351	* Hydra_Software_Devel/130 4/4/08 10:38a nissen
352	* PR 35948: Renamed callback function.
353	*
354	* Hydra_Software_Devel/129 2/8/08 2:09p nissen
355	* PR 38945: Added support for the 3548.
356	*
357	* Hydra_Software_Devel/128 12/17/07 9:54a nissen
358	* PR 38269: Added support for inverting sources during a blit.
359	*
360	* Hydra_Software_Devel/127 12/4/07 5:21p nissen
361	* PR 36878: Added support for the 7335.
362	*
363	* Hydra_Software_Devel/126 11/16/07 3:07p nissen
364	* PR 36759: Added support for setting the scale factor independently of
365	* the provided rectangle sizes.
366	*
367	* Hydra_Software_Devel/125 10/24/07 2:39p nissen
368	* PR 36107: Including bint.h instead of bint_plat.h.
369	*
370	* Hydra_Software_Devel/124 10/12/07 11:24a nissen
371	* PR 35747: Added fix for YCbCr 420 sources for 7405 by using surface
372	* pitch as stripe width, and surface height as stripe height.
373	*
374	* Hydra_Software_Devel/123 10/12/07 7:47a nissen
375	* PR 35920: Added support for preallocating system memory for operation
376	* structures when opening module.
377	*
378	* Hydra_Software_Devel/122 9/19/07 11:24a nissen
379	* PR 34538: Added support for building for the 7325.
380	*
381	* Hydra_Software_Devel/121 9/18/07 1:32p nissen
382	* PR 34852: Added support for building for the 3573.
383	*
384	* Hydra_Software_Devel/120 8/20/07 3:43p nissen
385	* PR 34132: Fixed problem with building for chips that don't support 420
386	* linear format.
387	*
388	* Hydra_Software_Devel/119 8/20/07 2:11p nissen
389	* PR 34132: Added support for setting a linear 420 source.
390	*
391	* Hydra_Software_Devel/118 7/13/07 9:15a yuxiaz
392	* PR29724, PR32979: Added support for 7405.
393	*
394	* Hydra_Software_Devel/117 6/25/07 8:51a nissen
395	* PR 32459: Added support for building for the 7400 C0.
396	*
397	* Hydra_Software_Devel/116 6/18/07 11:52a nissen
398	* PR 32140: Added support for setting scale, color key, and color matrix
399	* order.
400	*
401	* Hydra_Software_Devel/115 5/2/07 12:23p nissen
402	* PR 29724: Fixed problem with MacroBlock strip width.
403	*
404	* Hydra_Software_Devel/114 5/2/07 11:37a nissen
405	* PR 29724: Added support for 7405 A0 including new MacroBlock strip
406	* width setting.
407	*
408	* Hydra_Software_Devel/113 3/30/07 8:52a nissen
409	* PR 29200: Moved M2MC reset before initialization of interrupts to
410	* prevent any previous interrupts from firing.
411	*
412	* Hydra_Software_Devel/112 3/28/07 9:45p nissen
413	* PR 29156: Fixed bug with palette surface identification.
414	*
415	* Hydra_Software_Devel/111 3/28/07 10:50a nissen
416	* PR 29136: Added code to disabled 3-2 pulldown cadence on 3560 and 3563
417	* when opeing module.
418	*
419	* Hydra_Software_Devel/110 3/28/07 9:54a nissen
420	* PR 29122: Fixed problem with using an XRGB source surface on 7440.
421	*
422	* Hydra_Software_Devel/109 3/6/07 7:53p nissen
423	* PR 25991: Fixed problem with checking device number on 7400 A0.
424	*
425	* Hydra_Software_Devel/108 3/2/07 3:05p nissen
426	* PR 28010: Added support for new AlphaPremultiply on 7440 B0.
427	*
428	* Hydra_Software_Devel/107 3/2/07 11:32a nissen
429	* PR 28010: Added Macroblock feature support for 7440 B0.
430	*
431	* Hydra_Software_Devel/106 3/1/07 1:27p nissen
432	* PR 25991: Switched to supporting one M2MC on 7400 B0.
433	*
434	* Hydra_Software_Devel/105 3/1/07 12:37p nissen
435	* PR 25991: Fixed MacroBlock feature for 7400 B0.
436	*
437	* Hydra_Software_Devel/104 1/12/07 12:48p nissen
438	* PR 27040: Fixed problem with using uninitialized surface structure in
439	* functions that set surfaces.
440	*
441	* Hydra_Software_Devel/103 12/11/06 1:57p nissen
442	* PR 26405: Added surface address information to debug message dump.
443	*
444	* Hydra_Software_Devel/102 12/7/06 3:36p nissen
445	* PR 26405: Added wait information to debug message dump.
446	*
447	* Hydra_Software_Devel/101 12/7/06 12:49p nissen
448	* PR 26405: Added calls to DBG_MSG to log blits.
449	*
450	* Hydra_Software_Devel/100 12/1/06 10:56a nissen
451	* PR 25991: Added support for 7400 B0.
452	*
453	* Hydra_Software_Devel/99 11/15/06 2:36p nissen
454	* PR 25683: Fixed problem with using new surface id.
455	*
456	* Hydra_Software_Devel/98 11/15/06 11:42a nissen
457	* PR 25668: Added support for 7403.
458	*
459	* Hydra_Software_Devel/97 11/8/06 11:07a nissen
460	* PR 25683: Added support for using a surface ID to identify new
461	* surfaces.
462	*
463	* Hydra_Software_Devel/96 10/24/06 7:34p nissen
464	* PR 24648: Fixed problem with VC-1 macroblock
465	*
466	* Hydra_Software_Devel/95 10/20/06 10:08a nissen
467	* PR 25023: Fixed build warnings.
468	*
469	* Hydra_Software_Devel/94 10/19/06 10:54a nissen
470	* PR 24647: Added support for preallocting all device memory when module
471	* is opened.
472	*
473	* Hydra_Software_Devel/93 10/12/06 11:14a nissen
474	* PR 24648: Disabling macro block range support because of a problem with
475	* it.
476	*
477	* Hydra_Software_Devel/92 10/5/06 6:44p nissen
478	* PR 24375: Fixed build problem.
479	*
480	* Hydra_Software_Devel/91 10/5/06 1:58p nissen
481	* PR 24648: Added support for VC-1 macro block range remapping and
482	* expansion for 7401 C0 and 7118.
483	*
484	* Hydra_Software_Devel/90 9/19/06 4:04p nissen
485	* PR 24375: Set RANGE_EXP_MAP_SCALE_FACTOR_Y/C to 0x8 for source alpha
486	* surface on 7401 C0 and 7118 A0.
487	*
488	* Hydra_Software_Devel/89 9/15/06 10:52p nissen
489	* PR 23977: set RANGE_EXP_MAP_SCALE_FACTOR_Y/C to 0x8 for 7401 C0.
490	*
491	* Hydra_Software_Devel/88 9/8/06 3:54p nissen
492	* PR 23517: Added support for 7440.
493	*
494	* Hydra_Software_Devel/87 9/6/06 2:18a syang
495	* PR 23977: set RANGE_EXP_MAP_SCALE_FACTOR_Y/C to 0x8
496	*
497	* Hydra_Software_Devel/86 8/28/06 4:29p nissen
498	* PR 23941: Re-added function to toggle destination palette bypass.
499	*
500	* Hydra_Software_Devel/85 8/25/06 9:39a nissen
501	* PR 23179: Fixed define for running on 3563.
502	*
503	* Hydra_Software_Devel/84 8/25/06 9:08a nissen
504	* PR 21940: Fixed problem with opening module on 7118.
505	*
506	* Hydra_Software_Devel/83 8/17/06 11:26a nissen
507	* PR 23179: Added support for building and running on the 3563.
508	*
509	* Hydra_Software_Devel/82 7/13/06 7:27a nissen
510	* PR 22396: Moved chip macro.
511	*
512	* Hydra_Software_Devel/81 7/12/06 9:29p nissen
513	* PR 22396: Added code to clear secondary source surface related
514	* registers when not using a YCbCr 420 source surface.
515	*
516	* Hydra_Software_Devel/80 6/22/06 10:41a nissen
517	* PR 21940: Added support for 7118.
518	*
519	* Hydra_Software_Devel/79 5/30/06 10:58a nissen
520	* PR 21613: Fixed surface format validation when setting destination and
521	* output alpha surfaces.
522	*
523	* Hydra_Software_Devel/78 5/30/06 10:41a nissen
524	* PR 21878: Added code to check if the device is really hung when waiting
525	* times out, and added support for user setting the time out interval.
526	*
527	* Hydra_Software_Devel/77 5/8/06 1:52p nissen
528	* PR 21399: Added BGRC_OperationsComplete function that will read the
529	* M2MC registers to determine if all pending operations are complete.
530	*
531	* Hydra_Software_Devel/76 5/5/06 3:34p nissen
532	* PR 20236: Switched scale/key/matrix order.
533	*
534	* Hydra_Software_Devel/75 5/3/06 12:41p nissen
535	* PR 21171: Added support for building and running 7401 B0.
536	*
537	* Hydra_Software_Devel/74 4/18/06 1:52p nissen
538	* PR 21007: Fixed warnings.
539	*
540	* Hydra_Software_Devel/73 4/18/06 1:23p nissen
541	* PR 18369: Added support for hardware striping when scaling on the 7400
542	* and 7401.
543	*
544	* Hydra_Software_Devel/72 4/13/06 3:33p nissen
545	* PR 20352: Added support for all filter coefficients for 7400 and 7401.
546	*
547	* Hydra_Software_Devel/71 3/22/06 1:15p nissen
548	* PR 19551: Fixed use of format type register field.
549	*
550	* Hydra_Software_Devel/70 3/22/06 12:05p nissen
551	* PR 19551: Using new macro to set color register values.
552	*
553	* Hydra_Software_Devel/69 3/15/06 1:22p nissen
554	* PR 15840: Fixed problem with YCbCr420 format without filtering enabled.
555	*
556	* Hydra_Software_Devel/68 3/15/06 12:05p nissen
557	* PR 15840: Added support for using YCbCr420 surfaces as a source.
558	*
559	* Hydra_Software_Devel/67 3/8/06 2:52p nissen
560	* PR 19575: Added support for building and running second m2mc on 7438.
561	*
562	* Hydra_Software_Devel/66 3/7/06 3:24p nissen
563	* PR 19084: Removed & from function paramater when creating interrupt
564	* callback.
565	*
566	* Hydra_Software_Devel/65 3/7/06 11:06a nissen
567	* PR 19084: Fixed vxworks build problem with 7400 interrupt macro.
568	*
569	* Hydra_Software_Devel/64 2/21/06 4:42p nissen
570	* PR 19553: Added support for point sample and bilinear filtering for
571	* 7400.
572	*
573	* Hydra_Software_Devel/63 2/21/06 3:36p nissen
574	* PR 19084: Fixed problem with 7400 interrupt macro.
575	*
576	* Hydra_Software_Devel/62 2/21/06 12:02p nissen
577	* PR 19084: Added support for second m2mc device.
578	*
579	* Hydra_Software_Devel/61 2/18/06 8:31a nissen
580	* PR 19553: Switched scale/key/matrix order macro for 7400.
581	*
582	* Hydra_Software_Devel/60 2/1/06 5:31p nissen
583	* PR 19084: Added support for building for the 7400 A0.
584	*
585	* Hydra_Software_Devel/59 1/12/06 5:59p nissen
586	* PR 18761: Added support for BCHP_VER macro.
587	*
588	* Hydra_Software_Devel/58 11/7/05 10:16a nissen
589	* PR 17518: Removed offset adjust and clut scale functions for 7401.
590	*
591	* Hydra_Software_Devel/57 10/26/05 1:46p nissen
592	* PR 17518: Added new entry point functions for 7401 scaling parameters.
593	* Added code to return error if not using Sharp filtering while scaling
594	* for 7401.
595	*
596	* Hydra_Software_Devel/56 9/19/05 11:53a nissen
597	* PR 17201: Removed calls from BGRC_Open that are not supported by 7401.
598	*
599	* Hydra_Software_Devel/55 9/13/05 4:30p nissen
600	* PR 16499: Added code to free memory past a default or specified
601	* threshold.
602	*
603	* Hydra_Software_Devel/54 7/7/05 5:42p nissen
604	* PR 15108: Fixed problem with getting palette offset.
605	*
606	* Hydra_Software_Devel/53 7/5/05 5:30p nissen
607	* PR 16056: Added support for building for the 7401 A0.
608	*
609	* Hydra_Software_Devel/52 6/14/05 10:12a nissen
610	* PR 15811: Re-added support for destination color key for Cx devices.
611	*
612	* Hydra_Software_Devel/51 5/18/05 4:24p agin
613	* PR14720: B2, C1, C2 compilation support.
614	*
615	* Hydra_Software_Devel/51 5/18/05 11:53a agin
616	* PR14720: B2, C1, C2 compilation support.
617	*
618	* Hydra_Software_Devel/50 5/12/05 4:36p nissen
619	* PR 15264: Modified support for user defined phase adjustment when
620	* filtering.
621	*
622	* Hydra_Software_Devel/49 5/12/05 2:47p nissen
623	* PR 15264: Added support for user defined phase adjustment when
624	* filtering.
625	*
626	* Hydra_Software_Devel/48 5/12/05 10:28a nissen
627	* PR 15226: Modified code to store surface information when a surface is
628	* set instead of looking it up later.
629	*
630	* Hydra_Software_Devel/47 5/6/05 1:34p nissen
631	* PR 13488: Added support for M2MC C1.
632	*
633	* Hydra_Software_Devel/46 3/16/05 12:46p nissen
634	* PR 14457: Added code to return an error if destination and output
635	* rectangle sizes are not the same.
636	*
637	* Hydra_Software_Devel/45 3/16/05 12:21p nissen
638	* PR 14329: Fixed use of W alpha.
639	*
640	* Hydra_Software_Devel/44 2/24/05 1:36p nissen
641	* PR 14207: Added bstd.h include.
642	*
643	* Hydra_Software_Devel/43 2/17/05 1:14p nissen
644	* PR 14086: Added support for new color matrix register precision on the
645	* 3560.
646	*
647	* Hydra_Software_Devel/42 1/14/05 8:07p nissen
648	* PR 13804: Added register writes to reset M2MC when opening module.
649	*
650	* Hydra_Software_Devel/41 1/14/05 4:50p nissen
651	* PR 13804: Reinserted M2MC register write to stop op list for C0 code
652	* when opening module.
653	*
654	* Hydra_Software_Devel/40 12/13/04 2:14p nissen
655	* PR 13488: Added support for M2MC C0.
656	*
657	* Hydra_Software_Devel/39 9/24/04 4:44p nissen
658	* PR 12598: Added code to check if YCbCr422 surfaces have odd rectangle
659	* edges.
660	*
661	* Hydra_Software_Devel/38 7/23/04 11:25a nissen
662	* PR 12031: Removed waiting on finished field for list status register
663	* when closing module.
664	*
665	* Hydra_Software_Devel/37 6/11/04 10:30p nissen
666	* PR 11486: Fixed problemss with scaling.
667	*
668	* Hydra_Software_Devel/36 6/3/04 8:29p nissen
669	* PR 11349: Added code to wait for all blit operations to complete when
670	* closing module.
671	*
672	* Hydra_Software_Devel/35 5/24/04 5:08p jasonh
673	* PR 11189: Merge down from B0 to main-line
674	*
675	* Hydra_Software_Devel/Refsw_Devel_7038_B0/2 4/28/04 2:46p nissen
676	* PR 9635: Removed comments.
677	*
678	* Hydra_Software_Devel/Refsw_Devel_7038_B0/1 4/27/04 7:18p nissen
679	* PR 9635: Added support for M2MC B0.
680	*
681	* Hydra_Software_Devel/34 4/16/04 11:03a nissen
682	* PR 10622: Removed const from pattern variable declaration.
683	*
684	* Hydra_Software_Devel/33 4/12/04 11:52p nissen
685	* PR 10428: Fixed problem with setting surfaces to null.
686	*
687	* Hydra_Software_Devel/32 4/12/04 9:53a pntruong
688	* PR 10548: Changed private shift function to non-private.
689	*
690	* Hydra_Software_Devel/31 4/9/04 2:19p nissen
691	* PR 10380: Modified field setting macros to do mask and set operation
692	* for more than one field at a time.
693	*
694	* Hydra_Software_Devel/30 3/31/04 11:57a nissen
695	* PR 10165: Added code to validate surface dimensions.
696	*
697	* Hydra_Software_Devel/29 3/12/04 2:16p nissen
698	* PR 10024: Added more error checking.
699	* PR 10072: Added support for no-scale filtering.
700	*
701	* Hydra_Software_Devel/28 3/5/04 2:33p nissen
702	* PR 9856: Fixed problem with rectangle width's and height's being set to
703	* zero.
704	*
705	* Hydra_Software_Devel/27 2/27/04 1:37p nissen
706	* PR 9856: Fixed problem with rectangles when doing a fill.
707	*
708	* Hydra_Software_Devel/26 1/30/04 1:43p nissen
709	* PR 9537: Removed unnecessary loading of certain register groups.
710	*
711	* Hydra_Software_Devel/25 1/21/04 1:58p nissen
712	* PR 9432: Added more error checking.
713	*
714	* Hydra_Software_Devel/24 12/29/03 6:41p pntruong
715	* PR 9117: Refactor BINT to no longer use strings to specify interrupt
716	* name.
717	*
718	* Hydra_Software_Devel/23 12/23/03 11:26a nissen
719	* PR 9078: Reduced interrupt name strings for GFX.
720	*
721	* Hydra_Software_Devel/22 12/21/03 8:47p nissen
722	* PR 9033: Fixed setting surface address registers when surface is null.
723	*
724	* Hydra_Software_Devel/21 12/18/03 2:04p nissen
725	* PR 9016: Added support for splitting scaled/filtered blits into
726	* vertical strips.
727	*
728	* Hydra_Software_Devel/20 12/9/03 1:40p nissen
729	* PR 8900: Added code to disable 3-2 pulldown cadence detect on init.
730	*
731	* Hydra_Software_Devel/19 11/21/03 6:36p nissen
732	* Removed IKOS hacks.
733	*
734	* Hydra_Software_Devel/18 11/20/03 6:56p nissen
735	* Changed module pointers to handles. Added support for interrupts.
736	*
737	* Hydra_Software_Devel/17 10/20/03 1:45p nissen
738	* Eliminated warnings.
739	*
740	* Hydra_Software_Devel/16 10/9/03 1:35p nissen
741	* Removed IKOS hacks.
742	*
743	* Hydra_Software_Devel/15 9/29/03 1:29p nissen
744	* Modified Close function to return void.
745	*
746	* Hydra_Software_Devel/14 9/24/03 10:03a maivu
747	* Added missing semicolon(s) to fix build errors.
748	*
749	* Hydra_Software_Devel/13 9/23/03 5:51p pntruong
750	* Removed the 7038_ from header filename generated from RDB.
751	*
752	* Hydra_Software_Devel/12 9/19/03 3:45p nissen
753	* Added support for aligning ROP pattern to output x and y coordinates.
754	*
755	* Hydra_Software_Devel/11 8/26/03 4:08p nissen
756	* Added support for W formats. Added all to macro to get surface data.
757	*
758	* Hydra_Software_Devel/10 8/26/03 10:23a maivu
759	* Added the double parathesis for BDBG calls (this fixed compile error *
760	* for msvc60).
761	*
762	* Hydra_Software_Devel/9 8/21/03 1:33p nissen
763	* Added code to initialize state when module is opened.
764	*
765	* Hydra_Software_Devel/8 8/20/03 4:53p nissen
766	* Added support for setting default states.
767	*
768	* Hydra_Software_Devel/7 8/19/03 10:19a nissen
769	* Added functions to reflect changes made to module header file. Removed
770	* functions to set component sizes. Added code to check if registers
771	* have changed.
772	*
773	* Hydra_Software_Devel/6 8/12/03 11:29a nissen
774	* Changed usage of field setting macros. Added dither enable function.
775	*
776	* Hydra_Software_Devel/5 8/6/03 2:30p nissen
777	* Added entry point functions for enabling zero pad/replicate for source
778	* and dest. Added entry point functions for setting pixel component
779	* sizes for source, dest, and output.
780	*
781	* Hydra_Software_Devel/4 6/25/03 12:07p nissen
782	* Added code to write registers, initiate blit opertion, and wait for it
783	* to finish.
784	*
785	* Hydra_Software_Devel/3 6/5/03 5:38p jasonh
786	* Changed register file name and added setting of debug module.
787	*
788	* Hydra_Software_Devel/2 6/5/03 11:45a nissen
789	* Added calls to macros to set surface format type.
790	*
791	* Hydra_Software_Devel/1 5/28/03 3:20p nissen
792	* Graphics compositor.
793	*
794	***************************************************************************/
795
796	#include "bstd.h"
797	#include "bstd_defs.h"
798	#include "berr.h"
799	#include "bkni.h"
800	#include "bint.h"
801	#include "bchp.h"
802
803	#if ((BCHP_CHIP==7405) && (BCHP_VER >= BCHP_VER_A0))
804	#include "bchp_int_id_memc16_gfx_l2.h"
805	#else
806	#include "bchp_hif_cpu_intr1.h"
807	#endif
808
809	#if ((BCHP_CHIP==7400) && (BCHP_VER >= BCHP_VER_B0))
810	#include "bchp_memc16_gfx_l2.h"
811	#include "bchp_memc16_gfx_grb.h"
812	#elif ((BCHP_CHIP==7405) && (BCHP_VER >= BCHP_VER_A0))
813	#include "bchp_memc16_gfx_l2.h"
814	#include "bchp_memc_gfx_grb.h"
815	#elif ((BCHP_CHIP==7325) && (BCHP_VER >= BCHP_VER_B0)) \|\| \
816	((BCHP_CHIP==7335) && (BCHP_VER >= BCHP_VER_B0)) \|\| \
817	((BCHP_CHIP==7336) && (BCHP_VER >= BCHP_VER_A0))
818	#include "bchp_graphics_l2.h"
819	#include "bchp_graphics_grb.h"
820	#elif (BCHP_CHIP==3548) \|\| (BCHP_CHIP==3556) \|\| (BCHP_CHIP==35230) \|\| (BCHP_CHIP==35125) \|\| (BCHP_CHIP==35233)
821	#include "bchp_int_id_gfx_l2.h"
822	#include "bchp_gfx_rgrb.h"
823	#elif (BCHP_CHIP==7420) \|\| (BCHP_CHIP==7125)
824	#include "bchp_gfx_l2.h"
825	#include "bchp_gfx_gr.h"
826	#elif (BCHP_CHIP==7344) \|\| (BCHP_CHIP==7346) \|\| (BCHP_CHIP==7340) \|\| (BCHP_CHIP==7342) \|\| (BCHP_CHIP==7408) \|\| \
827	(BCHP_CHIP==7422) \|\| (BCHP_CHIP==7425) \|\| (BCHP_CHIP==7135) \|\| (BCHP_CHIP==7231) \|\| (BCHP_CHIP==7429)
828	#include "bchp_int_id_gfx_l2.h"
829	#include "bchp_gfx_gr.h"
830	#elif (BCHP_CHIP==7468)
831	#include "bchp_m2mc_wrap_l2.h"
832	#include "bchp_m2mc_wrap_gr_bridge.h"
833	#elif (BCHP_CHIP==7552) \|\| (BCHP_CHIP==7550) \|\| (BCHP_CHIP==7358) \|\| (BCHP_CHIP==7360)
834	#include "bchp_m2mc_top_l2.h"
835	#include "bchp_m2mc_top_gr_bridge.h"
836	#elif ((BCHP_CHIP==7640) && (BCHP_VER >= BCHP_VER_B0))
837	#include "bchp_wrap_m2mc_l2.h"
838	#include "bchp_wrap_m2mc_grb.h"
839	#include "bchp_gfx_grb.h"
840	#elif (BCHP_CHIP==7435)
841	#include "bchp_m2mc_l2.h"
842	#include "bchp_m2mc1_l2.h"
843	#include "bchp_m2mc_gr.h"
844	#include "bchp_m2mc1_gr.h"
845	#include "bchp_int_id_m2mc1_l2.h"
846	#else
847	#include "bchp_int_id_gfx_l2.h"
848	#include "bchp_gfx_grb.h"
849	#endif
850
851	#if (BCHP_CHIP==7435)
852	#include "bchp_m2mc.h"
853	#include "bchp_m2mc1.h"
854	#else
855	#include "bchp_m2mc.h"
856	#endif
857
858	#if ((BCHP_CHIP==7400) && (BCHP_VER == BCHP_VER_A0)) \|\| \
859	((BCHP_CHIP==7440) && (BCHP_VER >= BCHP_VER_A0)) \|\| \
860	((BCHP_CHIP==7640) && (BCHP_VER >= BCHP_VER_B0))
861	#include "bchp_m2mc_1.h"
862	#elif ((BCHP_CHIP==7438) && (BCHP_VER >= BCHP_VER_A0))
863	#include "bchp_m2mc_1.h"
864	#include "bchp_m2mc_1_grb.h"
865	#include "bchp_int_id_m2mc_1_l2.h"
866	#endif
867
868	#if ((BCHP_CHIP==7405) && (BCHP_VER >= BCHP_VER_A0))
869	#include "bchp_memc_1_1.h"
870	#endif
871
872	#include "bchp_common.h"
873	#include "bgrc.h"
874	#include "bgrc_private.h"
875
876	BDBG_MODULE(BGRC);
877	BDBG_OBJECT_ID(BGRC);
878
879	/***************************************************************************/
880	#define BGRC_P_SURFACE_RECT_SIZE_MAX 8191
881
882	/***************************************************************************/
883	static const BGRC_Settings BGRC_P_DEFAULT_SETTINGS =
884	{
885	BGRC_PACKET_MEMORY_MAX, /* ulPacketMemoryMax */
886	BGRC_OPERATION_MAX, /* ulOperationMax */
887	0, /* ulDeviceNum */
888	BGRC_WAIT_TIMEOUT, /* ulWaitTimeout */
889	true /* bPreAllocMemory */
890	};
891
892	/***************************************************************************/
893	BERR_Code BGRC_GetDefaultSettings(
894	BGRC_Settings *pDefSettings )
895	{
896	BDBG_ENTER(BGRC_GetDefaultSettings);
897
898	if( pDefSettings )
899	*pDefSettings = BGRC_P_DEFAULT_SETTINGS;
900
901	BDBG_LEAVE(BGRC_GetDefaultSettings);
902	return BERR_SUCCESS;
903	}
904
905	/***************************************************************************/
906	BERR_Code BGRC_Open(
907	BGRC_Handle *phGrc,
908	BCHP_Handle hChip,
909	BREG_Handle hRegister,
910	BMEM_Handle hMemory,
911	BINT_Handle hInterrupt,
912	const BGRC_Settings *pDefSettings )
913	{
914	BGRC_Handle hGrc = 0;
915	BGRC_P_State *pState;
916	BERR_Code err = BERR_SUCCESS;
917	const int32_t ai32_Matrix[20] = { 0 };
918	const uint8_t aucPattern[8] = { 0 };
919
920	#if ((BCHP_CHIP==7438) && (BCHP_VER >= BCHP_VER_A0))
921	BINT_Id IntID = BCHP_INT_ID_GFX_L2_M2MC_INTR;
922	#elif ((BCHP_CHIP==7400) && (BCHP_VER >= BCHP_VER_B0))
923	BINT_Id IntID = BCHP_INT_ID_CREATE(BCHP_MEMC16_GFX_L2_CPU_STATUS, BCHP_MEMC16_GFX_L2_CPU_STATUS_M2MC_INTR_SHIFT);
924	#elif ((BCHP_CHIP==7405) && (BCHP_VER >= BCHP_VER_A0))
925	BINT_Id IntID = BCHP_INT_ID_M2MC_0_INTR;
926	#elif ((BCHP_CHIP==7325) && (BCHP_VER >= BCHP_VER_B0)) \|\| \
927	((BCHP_CHIP==7335) && (BCHP_VER >= BCHP_VER_B0)) \|\| \
928	((BCHP_CHIP==7336) && (BCHP_VER >= BCHP_VER_A0))
929	BINT_Id IntID = BCHP_INT_ID_CREATE(BCHP_GRAPHICS_L2_CPU_STATUS, BCHP_GRAPHICS_L2_CPU_STATUS_M2MC_0_INTR_SHIFT);
930	#elif (BCHP_CHIP==7420) \|\| (BCHP_CHIP==7125)
931	BINT_Id IntID = BCHP_INT_ID_CREATE(BCHP_GFX_L2_CPU_STATUS, BCHP_GFX_L2_CPU_STATUS_M2MC_INTR_SHIFT);
932	#elif (BCHP_CHIP==7468)
933	BINT_Id IntID = BCHP_INT_ID_CREATE(BCHP_M2MC_WRAP_L2_CPU_STATUS, BCHP_M2MC_WRAP_L2_CPU_STATUS_M2MC_INTR_SHIFT);
934	#elif (BCHP_CHIP==7552) \|\| (BCHP_CHIP==7550) \|\| (BCHP_CHIP==7358) \|\| (BCHP_CHIP==7360)
935	BINT_Id IntID = BCHP_INT_ID_CREATE(BCHP_M2MC_TOP_L2_CPU_STATUS, BCHP_M2MC_TOP_L2_CPU_STATUS_M2MC_INTR_SHIFT);
936	#elif ((BCHP_CHIP==7640) && (BCHP_VER >= BCHP_VER_B0))
937	BINT_Id IntID = BCHP_INT_ID_CREATE(BCHP_WRAP_M2MC_L2_CPU_STATUS, BCHP_WRAP_M2MC_L2_CPU_STATUS_M2MC_0_INTR_SHIFT);
938	#elif (BCHP_CHIP==7435)
939	BINT_Id IntID = BCHP_INT_ID_CREATE(BCHP_M2MC_L2_CPU_STATUS, BCHP_M2MC_L2_CPU_STATUS_M2MC_INTR_SHIFT);
940	#else
941	BINT_Id IntID = BCHP_INT_ID_M2MC_INTR;
942	#endif
943
944	BDBG_ENTER(BGRC_Open);
945	BDBG_ASSERT( phGrc );
946	BDBG_ASSERT( hChip );
947	BDBG_ASSERT( hRegister );
948	BDBG_ASSERT( hMemory );
949	BDBG_ASSERT( hInterrupt );
950
951	/* allocate memory for private data */
952	hGrc = (BGRC_Handle) BKNI_Malloc( sizeof (BGRC_P_Handle) );
953	if( hGrc == 0 )
954	{
955	err = BERR_OUT_OF_SYSTEM_MEMORY;
956	goto fail;
957	}
958
959	/* clear main data structure */
960	BKNI_Memset( (void *) hGrc, 0, sizeof (BGRC_P_Handle) );
961	BDBG_OBJECT_SET(hGrc, BGRC);
962
963	/* create interrupt events */
964	err = BKNI_CreateEvent( &hGrc->hInterruptEvent );
965	if( err != BERR_SUCCESS )
966	goto fail;
967
968	BKNI_ResetEvent( hGrc->hInterruptEvent );
969
970	err = BKNI_CreateEvent( &hGrc->hPeriodicEvent );
971	if( err != BERR_SUCCESS )
972	goto fail;
973
974	BKNI_ResetEvent( hGrc->hPeriodicEvent );
975	BKNI_SetEvent( hGrc->hPeriodicEvent );
976
977	/* set private data */
978	hGrc->hChip = hChip;
979	hGrc->hRegister = hRegister;
980	hGrc->hMemory = hMemory;
981	hGrc->hInterrupt = hInterrupt;
982	hGrc->ulPacketMemoryMax = pDefSettings ? pDefSettings->ulPacketMemoryMax : BGRC_P_DEFAULT_SETTINGS.ulPacketMemoryMax;
983	hGrc->ulOperationMax = pDefSettings ? pDefSettings->ulOperationMax : BGRC_P_DEFAULT_SETTINGS.ulOperationMax;
984	hGrc->ulDeviceNum = pDefSettings ? pDefSettings->ulDeviceNum : BGRC_P_DEFAULT_SETTINGS.ulDeviceNum;
985	hGrc->ulWaitTimeout = pDefSettings ? pDefSettings->ulWaitTimeout : BGRC_P_DEFAULT_SETTINGS.ulWaitTimeout;
986	hGrc->bPreAllocMemory = pDefSettings ? pDefSettings->bPreAllocMemory : BGRC_P_DEFAULT_SETTINGS.bPreAllocMemory;
987	hGrc->bUninitialized = true;
988	pState = &hGrc->CurrentState;
989
990	hGrc->ulPacketMemoryMax = BGRC_P_MAX(hGrc->ulPacketMemoryMax, BGRC_P_LIST_BLOCK_MIN_SIZE);
991	hGrc->ulOperationMax = BGRC_P_MAX(hGrc->ulOperationMax, BGRC_P_OPERATION_MIN);
992
993	/* validate choosen m2mc device */
994	#if ((BCHP_CHIP!=7400) && (BCHP_CHIP!=7438) && (BCHP_CHIP!=7440) && (BCHP_CHIP!=7435)) \|\| \
995	((BCHP_CHIP==7400) && (BCHP_VER >= BCHP_VER_B0))
996	if( hGrc->ulDeviceNum )
997	{
998	err = BGRC_ERR_M2MC_DEVICE_NUM_INVALID;
999	goto fail;
1000	}
1001	#endif
1002
1003	if( hGrc->ulDeviceNum > 1 )
1004	{
1005	err = BGRC_ERR_M2MC_DEVICE_NUM_INVALID;
1006	goto fail;
1007	}
1008
1009	/* reset m2mc */
1010	#if ((BCHP_CHIP==7400) && (BCHP_VER >= BCHP_VER_B0))
1011	BREG_Write32( hGrc->hRegister, BCHP_MEMC16_GFX_GRB_SW_RESET_0, BCHP_FIELD_ENUM(MEMC16_GFX_GRB_SW_RESET_0, M2MC_SW_RESET, ASSERT) );
1012	BREG_Write32( hGrc->hRegister, BCHP_MEMC16_GFX_GRB_SW_RESET_0, BCHP_FIELD_ENUM(MEMC16_GFX_GRB_SW_RESET_0, M2MC_SW_RESET, DEASSERT) );
1013	#elif ((BCHP_CHIP==7405) && (BCHP_VER >= BCHP_VER_A0))
1014	BREG_Write32( hGrc->hRegister, BCHP_MEMC_GFX_GRB_SW_RESET_0, BCHP_FIELD_ENUM(MEMC_GFX_GRB_SW_RESET_0, M2MC_SW_RESET, ASSERT) );
1015	BREG_Write32( hGrc->hRegister, BCHP_MEMC_GFX_GRB_SW_RESET_0, BCHP_FIELD_ENUM(MEMC_GFX_GRB_SW_RESET_0, M2MC_SW_RESET, DEASSERT) );
1016	#elif ((BCHP_CHIP==7325) && (BCHP_VER >= BCHP_VER_B0)) \|\| \
1017	((BCHP_CHIP==7335) && (BCHP_VER >= BCHP_VER_B0)) \|\| \
1018	((BCHP_CHIP==7336) && (BCHP_VER >= BCHP_VER_A0))
1019	BREG_Write32( hGrc->hRegister, BCHP_GRAPHICS_GRB_SW_RESET_0, BCHP_FIELD_ENUM(GRAPHICS_GRB_SW_RESET_0, M2MC_SW_RESET, ASSERT) );
1020	BREG_Write32( hGrc->hRegister, BCHP_GRAPHICS_GRB_SW_RESET_0, BCHP_FIELD_ENUM(GRAPHICS_GRB_SW_RESET_0, M2MC_SW_RESET, DEASSERT) );
1021	#elif (BCHP_CHIP==3548) \|\| (BCHP_CHIP==3556) \|\| (BCHP_CHIP==35230) \|\| (BCHP_CHIP==35125) \|\| (BCHP_CHIP==35233)
1022	BREG_Write32( hGrc->hRegister, BCHP_GFX_RGRB_SW_RESET_0, BCHP_FIELD_ENUM(GFX_RGRB_SW_RESET_0, M2MC_SW_RESET, ASSERT) );
1023	BREG_Write32( hGrc->hRegister, BCHP_GFX_RGRB_SW_RESET_0, BCHP_FIELD_ENUM(GFX_RGRB_SW_RESET_0, M2MC_SW_RESET, DEASSERT) );
1024	#elif (BCHP_CHIP==7420) \|\| (BCHP_CHIP==7340) \|\| (BCHP_CHIP==7342) \|\| (BCHP_CHIP==7125) \|\| (BCHP_CHIP==7408)
1025	BREG_Write32( hGrc->hRegister, BCHP_GFX_GR_SW_RESET_0, BCHP_FIELD_ENUM(GFX_GR_SW_RESET_0, M2MC_SW_RESET, ASSERT) );
1026	BREG_Write32( hGrc->hRegister, BCHP_GFX_GR_SW_RESET_0, BCHP_FIELD_ENUM(GFX_GR_SW_RESET_0, M2MC_SW_RESET, DEASSERT) );
1027	#elif (BCHP_CHIP==7468)
1028	BREG_Write32( hGrc->hRegister, BCHP_M2MC_WRAP_GR_BRIDGE_SW_RESET_0, BCHP_FIELD_ENUM(M2MC_WRAP_GR_BRIDGE_SW_RESET_0, M2MC_SW_RESET, ASSERT) );
1029	BREG_Write32( hGrc->hRegister, BCHP_M2MC_WRAP_GR_BRIDGE_SW_RESET_0, BCHP_FIELD_ENUM(M2MC_WRAP_GR_BRIDGE_SW_RESET_0, M2MC_SW_RESET, DEASSERT) );
1030	#elif (BCHP_CHIP==7344) \|\| (BCHP_CHIP==7346) \|\| (BCHP_CHIP==7422) \|\| (BCHP_CHIP==7425) \|\| (BCHP_CHIP==7135) \|\| (BCHP_CHIP==7231) \|\| (BCHP_CHIP==7429)
1031
1032	BREG_Write32( hGrc->hRegister, BCHP_GFX_GR_SW_INIT_0, BCHP_FIELD_ENUM(GFX_GR_SW_INIT_0, M2MC_CLK_108_SW_INIT, ASSERT) );
1033	BREG_Write32( hGrc->hRegister, BCHP_GFX_GR_SW_INIT_0, BCHP_FIELD_ENUM(GFX_GR_SW_INIT_0, M2MC_CLK_108_SW_INIT, DEASSERT) );
1034	BREG_Write32( hGrc->hRegister, BCHP_M2MC_CLK_GATE_AND_SW_INIT_CONTROL, BCHP_M2MC_CLK_GATE_AND_SW_INIT_CONTROL_START_SW_INIT_MASK );
1035
1036	while( BREG_Read32(hRegister, BCHP_M2MC_BLIT_STATUS) == 0 );
1037
1038	BREG_Write32( hGrc->hRegister, BCHP_GFX_GR_SW_INIT_0, BCHP_FIELD_ENUM(GFX_GR_SW_INIT_0, M2MC_CLK_108_SW_INIT, ASSERT) );
1039	BREG_Write32( hGrc->hRegister, BCHP_GFX_GR_SW_INIT_0, BCHP_FIELD_ENUM(GFX_GR_SW_INIT_0, M2MC_CLK_108_SW_INIT, DEASSERT) );
1040
1041	#elif (BCHP_CHIP==7552)
1042	BREG_Write32( hGrc->hRegister, BCHP_M2MC_TOP_GR_BRIDGE_SW_INIT_0, BCHP_FIELD_ENUM(M2MC_TOP_GR_BRIDGE_SW_INIT_0, M2MC_CLK_108_SW_INIT, ASSERT) );
1043	BREG_Write32( hGrc->hRegister, BCHP_M2MC_TOP_GR_BRIDGE_SW_INIT_0, BCHP_FIELD_ENUM(M2MC_TOP_GR_BRIDGE_SW_INIT_0, M2MC_CLK_108_SW_INIT, DEASSERT) );
1044	#elif (BCHP_CHIP==7550)
1045	BREG_Write32( hGrc->hRegister, BCHP_M2MC_TOP_GR_BRIDGE_SW_RESET_0, BCHP_FIELD_ENUM(M2MC_TOP_GR_BRIDGE_SW_RESET_0, M2MC_SW_RESET, ASSERT) );
1046	BREG_Write32( hGrc->hRegister, BCHP_M2MC_TOP_GR_BRIDGE_SW_RESET_0, BCHP_FIELD_ENUM(M2MC_TOP_GR_BRIDGE_SW_RESET_0, M2MC_SW_RESET, DEASSERT) );
1047	#elif (BCHP_CHIP==7358) \|\| (BCHP_CHIP==7360)
1048	BREG_Write32( hGrc->hRegister, BCHP_M2MC_TOP_GR_BRIDGE_SW_INIT_0, BCHP_FIELD_ENUM(M2MC_TOP_GR_BRIDGE_SW_INIT_0, M2MC_CLK_108_SW_INIT, ASSERT) );
1049	BREG_Write32( hGrc->hRegister, BCHP_M2MC_TOP_GR_BRIDGE_SW_INIT_0, BCHP_FIELD_ENUM(M2MC_TOP_GR_BRIDGE_SW_INIT_0, M2MC_CLK_108_SW_INIT, DEASSERT) );
1050	#elif (BCHP_CHIP==7435)
1051	if( hGrc->ulDeviceNum )
1052	{
1053	BREG_Write32( hGrc->hRegister, BCHP_M2MC1_GR_SW_INIT_0, BCHP_FIELD_ENUM(M2MC_GR_SW_INIT_0, M2MC_CLK_108_SW_INIT, ASSERT) );
1054	BREG_Write32( hGrc->hRegister, BCHP_M2MC1_GR_SW_INIT_0, BCHP_FIELD_ENUM(M2MC_GR_SW_INIT_0, M2MC_CLK_108_SW_INIT, DEASSERT) );
1055	BREG_Write32( hGrc->hRegister, BCHP_M2MC1_CLK_GATE_AND_SW_INIT_CONTROL, BCHP_M2MC_CLK_GATE_AND_SW_INIT_CONTROL_START_SW_INIT_MASK );
1056	while( BREG_Read32(hRegister, BCHP_M2MC1_BLIT_STATUS) == 0 );
1057	BREG_Write32( hGrc->hRegister, BCHP_M2MC1_GR_SW_INIT_0, BCHP_FIELD_ENUM(M2MC_GR_SW_INIT_0, M2MC_CLK_108_SW_INIT, ASSERT) );
1058	BREG_Write32( hGrc->hRegister, BCHP_M2MC1_GR_SW_INIT_0, BCHP_FIELD_ENUM(M2MC_GR_SW_INIT_0, M2MC_CLK_108_SW_INIT, DEASSERT) );
1059	}
1060	else
1061	{
1062	BREG_Write32( hGrc->hRegister, BCHP_M2MC_GR_SW_INIT_0, BCHP_FIELD_ENUM(M2MC_GR_SW_INIT_0, M2MC_CLK_108_SW_INIT, ASSERT) );
1063	BREG_Write32( hGrc->hRegister, BCHP_M2MC_GR_SW_INIT_0, BCHP_FIELD_ENUM(M2MC_GR_SW_INIT_0, M2MC_CLK_108_SW_INIT, DEASSERT) );
1064	BREG_Write32( hGrc->hRegister, BCHP_M2MC_CLK_GATE_AND_SW_INIT_CONTROL, BCHP_M2MC_CLK_GATE_AND_SW_INIT_CONTROL_START_SW_INIT_MASK );
1065	while( BREG_Read32(hRegister, BCHP_M2MC_BLIT_STATUS) == 0 );
1066	BREG_Write32( hGrc->hRegister, BCHP_M2MC_GR_SW_INIT_0, BCHP_FIELD_ENUM(M2MC_GR_SW_INIT_0, M2MC_CLK_108_SW_INIT, ASSERT) );
1067	BREG_Write32( hGrc->hRegister, BCHP_M2MC_GR_SW_INIT_0, BCHP_FIELD_ENUM(M2MC_GR_SW_INIT_0, M2MC_CLK_108_SW_INIT, DEASSERT) );
1068	}
1069	#else
1070	#if ((BCHP_CHIP==7400) && (BCHP_VER == BCHP_VER_A0)) \|\| \
1071	((BCHP_CHIP==7440) && (BCHP_VER >= BCHP_VER_A0))
1072	if( hGrc->ulDeviceNum )
1073	{
1074	BREG_Write32( hGrc->hRegister, BCHP_GFX_GRB_SW_RESET_0, BCHP_FIELD_ENUM(GFX_GRB_SW_RESET_0, M2MC_1_SW_RESET, ASSERT) );
1075	BREG_Write32( hGrc->hRegister, BCHP_GFX_GRB_SW_RESET_0, BCHP_FIELD_ENUM(GFX_GRB_SW_RESET_0, M2MC_1_SW_RESET, DEASSERT) );
1076	}
1077	else
1078	#elif ((BCHP_CHIP==7438) && (BCHP_VER >= BCHP_VER_A0))
1079	if( hGrc->ulDeviceNum )
1080	{
1081	BREG_Write32( hGrc->hRegister, BCHP_M2MC_1_GRB_SW_RESET_0, BCHP_FIELD_ENUM(GFX_GRB_SW_RESET_0, M2MC_SW_RESET, ASSERT) );
1082	BREG_Write32( hGrc->hRegister, BCHP_M2MC_1_GRB_SW_RESET_0, BCHP_FIELD_ENUM(GFX_GRB_SW_RESET_0, M2MC_SW_RESET, DEASSERT) );
1083	}
1084	else
1085	#endif
1086	{
1087	BREG_Write32( hGrc->hRegister, BCHP_GFX_GRB_SW_RESET_0, BCHP_FIELD_ENUM(GFX_GRB_SW_RESET_0, M2MC_SW_RESET, ASSERT) );
1088	BREG_Write32( hGrc->hRegister, BCHP_GFX_GRB_SW_RESET_0, BCHP_FIELD_ENUM(GFX_GRB_SW_RESET_0, M2MC_SW_RESET, DEASSERT) );
1089	}
1090	#endif
1091
1092	/* reset m2mc list */
1093	BGRC_P_WRITE_REG( LIST_CTRL, BCHP_FIELD_ENUM(M2MC_LIST_CTRL, RUN, Stop) );
1094
1095	/* create interrupt callback */
1096	#if ((BCHP_CHIP==7400) && (BCHP_VER == BCHP_VER_A0)) \|\| \
1097	((BCHP_CHIP==7440) && (BCHP_VER >= BCHP_VER_A0))
1098	IntID = hGrc->ulDeviceNum ? BCHP_INT_ID_M2MC_1_INTR : BCHP_INT_ID_M2MC_INTR;
1099	#elif ((BCHP_CHIP==7438) && (BCHP_VER >= BCHP_VER_A0))
1100	IntID = hGrc->ulDeviceNum ? BCHP_INT_ID_M2MC_1_L2_M2MC_INTR : BCHP_INT_ID_GFX_L2_M2MC_INTR;
1101	#elif ((BCHP_CHIP==7435) && (BCHP_VER >= BCHP_VER_A0))
1102	IntID = hGrc->ulDeviceNum ? BCHP_INT_ID_M2MC1_L2_M2MC_INTR : IntID;
1103	#endif
1104
1105	err = BINT_CreateCallback( &hGrc->hInterruptCallback, hInterrupt, IntID, BGRC_P_List_PacketIsr, hGrc, 0 );
1106	if( err != BERR_SUCCESS )
1107	goto fail;
1108
1109	/* clear interrupt callback */
1110	err = BINT_ClearCallback( hGrc->hInterruptCallback );
1111	if( err != BERR_SUCCESS )
1112	goto fail;
1113
1114	/* enable interrupt callback */
1115	err = BINT_EnableCallback( hGrc->hInterruptCallback );
1116	if( err != BERR_SUCCESS )
1117	goto fail;
1118
1119	/* initialize list packet memory */
1120	if( !BGRC_P_List_InitPacketMemory( hGrc, hGrc->bPreAllocMemory ? hGrc->ulPacketMemoryMax : BGRC_P_LIST_BLOCK_SIZE ) )
1121	{
1122	err = BERR_OUT_OF_DEVICE_MEMORY;
1123	goto fail;
1124	}
1125
1126	/* create surface for waiting */
1127	err = BSUR_Surface_Create( hGrc->hMemory, 1, 1, 0, NULL, BPXL_eA8_R8_G8_B8, 0, 0, NULL, &hGrc->hWaitSurface );
1128	if( err != BERR_SUCCESS )
1129	return BERR_TRACE(err);
1130
1131	/* preallocate memory for operation structures */
1132	if( hGrc->bPreAllocMemory )
1133	{
1134	if( !BGRC_P_Operation_Prealloc( hGrc, hGrc->ulOperationMax ) )
1135	{
1136	err = BERR_OUT_OF_SYSTEM_MEMORY;
1137	goto fail;
1138	}
1139	}
1140
1141	#if defined(BCHP_M2MC_BLIT_CTRL_BLOCK_AUTO_SPLIT_FIFO_MASK)
1142	BGRC_P_SET_FIELD_ENUM( BLIT_CTRL, BLOCK_AUTO_SPLIT_FIFO, ENABLE );
1143	#endif
1144
1145	/* set palette bypass field */
1146	BGRC_P_SET_FIELD_ENUM( DEST_SURFACE_FORMAT_DEF_3, PALETTE_BYPASS, DONT_LOOKUP );
1147	pState->bDstPaletteBypass = true;
1148
1149	/* set default source state */
1150	BGRC_Source_SetSurface( hGrc, NULL );
1151	BGRC_Source_SetAlphaSurface( hGrc, NULL );
1152	BGRC_Source_TogglePaletteBypass( hGrc, false );
1153	BGRC_Source_SetChromaExpansion( hGrc, BGRC_ChromaExpansion_eReplicate );
1154	BGRC_Source_SetZeroPad( hGrc, false );
1155	BGRC_Source_SetColorKey( hGrc, 0, 0, 0xFFFFFFFF, 0, 0xFFFFFFFF, false );
1156	BGRC_Source_ToggleColorKey( hGrc, false );
1157	BGRC_Source_SetColorMatrix5x4( hGrc, ai32_Matrix, 0 );
1158	BGRC_Source_ToggleColorMatrix( hGrc, false );
1159	BGRC_Source_SetColorMatrixRounding( hGrc, BGRC_Rounding_eTruncate );
1160	BGRC_Source_SetColor( hGrc, 0xFF000000 );
1161	BGRC_Source_SetRectangle( hGrc, 0, 0, 0, 0 );
1162	BGRC_Source_SetFilterCoeffs( hGrc, BGRC_FilterCoeffs_eSharp, BGRC_FilterCoeffs_eSharp );
1163	BGRC_Source_ToggleFilter( hGrc, false, false );
1164	BGRC_Source_SetFilterPhaseAdjustment( hGrc, 0, 0, 0 );
1165	BGRC_Source_SetScaleRounding( hGrc, BGRC_Rounding_eNearest );
1166	BGRC_Source_SetScaleAlphaAdjust( hGrc, false );
1167
1168	#if 0/def BCHP_M2MC_BLIT_HEADER_CBAR_SRC_COLOR_SCALE_THEN_KEY_THEN_MATRIX/
1169	BGRC_Source_SetKeyMatrixScaleOrder( hGrc, BGRC_KeyMatrixScaleOrder_eKeyThenScaleThenMatrix );
1170	#else
1171	BGRC_Source_SetKeyMatrixOrder( hGrc, BGRC_KeyMatrixOrder_eKeyThenMatrix );
1172	#endif
1173
1174	#if defined(BCHP_M2MC_SCALER_CTRL_ALPHA_PRE_MULTIPLY_MASK)
1175	BGRC_Source_SetScaleAlphaPreMultiply( hGrc, false );
1176	#endif
1177
1178	#if defined(BCHP_M2MC_SCALER_CTRL_ALPHA_PRE_MULTIPLY_ENABLE_MASK)
1179	BGRC_Source_SetAlphaPreMultiply( hGrc, false );
1180	#endif
1181
1182	#if defined(BCHP_M2MC_SCALER_CTRL_ALPHA_PRE_MULTIPLY_OFFSET_EN_MASK)
1183	BGRC_Source_SetAlphaPreMultiplyOffset( hGrc, false );
1184	#endif
1185
1186	#if defined(BCHP_M2MC_SCALER_CTRL_EDGE_CONDITION_MASK)
1187	BGRC_Source_SetScaleEdgeCondition( hGrc, BGRC_EdgeCondition_eReplicateLast );
1188	#endif
1189
1190	#if defined(BCHP_M2MC_SRC_SURFACE_0_FORMAT_DEF_3_RANGE_EXP_MAP_SCALE_FACTOR_Y_MASK)
1191	BGRC_Source_SetMacroBlock( hGrc, BGRC_MacroBlockRange_None, BGRC_MacroBlockRange_None, 0, 0 );
1192	BGRC_Source_SetMacroBlock_StripWidth( hGrc, BGRC_P_YCbCr420_STRIP_WIDTH );
1193	#endif
1194
1195	#if defined(BCHP_M2MC_SRC_SURFACE_1_FORMAT_DEF_1)
1196	BGRC_Source_SetMacroBlock_LinearFormat( hGrc, false );
1197	#endif
1198
1199	/* set default destination state */
1200	BGRC_Destination_SetSurface( hGrc, NULL );
1201	BGRC_Destination_SetAlphaSurface( hGrc, NULL );
1202	BGRC_Destination_SetChromaExpansion( hGrc, BGRC_ChromaExpansion_eReplicate );
1203	BGRC_Destination_SetZeroPad( hGrc, false );
1204	BGRC_Destination_SetColorKey( hGrc, 0, 0, 0xFFFFFFFF, 0, 0xFFFFFFFF, false );
1205	BGRC_Destination_ToggleColorKey( hGrc, false );
1206	BGRC_Destination_TogglePaletteBypass( hGrc, false );
1207	#if ((BCHP_CHIP==7038) && (BCHP_VER < BCHP_VER_C0))
1208	BGRC_Destination_SetColorMatrix5x4( hGrc, ai32_Matrix, 0 );
1209	BGRC_Destination_ToggleColorMatrix( hGrc, false );
1210	BGRC_Destination_SetColorMatrixRounding( hGrc, BGRC_Rounding_eTruncate );
1211	BGRC_Destination_SetKeyMatrixOrder( hGrc, BGRC_KeyMatrixOrder_eKeyThenMatrix );
1212	#endif
1213	BGRC_Destination_SetColor( hGrc, 0xFF000000 );
1214	BGRC_Destination_SetRectangle( hGrc, 0, 0, 0, 0 );
1215
1216	/* set default pattern state */
1217	BGRC_Pattern_Set( hGrc, 0, aucPattern, 0, 0 );
1218
1219	/* set default blend state */
1220	BGRC_Blend_SetColor( hGrc, 0xFF000000 );
1221
1222	err = BGRC_Blend_SetColorBlend( hGrc,
1223	BGRC_Blend_Source_eSourceColor, BGRC_Blend_Source_eOne, false,
1224	BGRC_Blend_Source_eZero, BGRC_Blend_Source_eZero, false,
1225	BGRC_Blend_Source_eZero );
1226	if( err != BERR_SUCCESS )
1227	goto fail;
1228
1229	err = BGRC_Blend_SetAlphaBlend( hGrc,
1230	BGRC_Blend_Source_eSourceAlpha, BGRC_Blend_Source_eOne, false,
1231	BGRC_Blend_Source_eZero, BGRC_Blend_Source_eZero, false,
1232	BGRC_Blend_Source_eZero );
1233	if( err != BERR_SUCCESS )
1234	goto fail;
1235
1236	/* set default output state */
1237	BGRC_Output_SetSurface( hGrc, NULL );
1238	BGRC_Output_SetAlphaSurface( hGrc, NULL );
1239	#if ((BCHP_CHIP==7038) && (BCHP_VER < BCHP_VER_C0))
1240	BGRC_Output_SetColorMatrix5x4( hGrc, ai32_Matrix, 0 );
1241	BGRC_Output_ToggleColorMatrix( hGrc, false );
1242	BGRC_Output_SetColorMatrixRounding( hGrc, BGRC_Rounding_eTruncate );
1243	#endif
1244	BGRC_Output_SetRectangle( hGrc, 0, 0, 0, 0 );
1245	BGRC_Output_SetColorKeySelection( hGrc,
1246	BGRC_Output_ColorKeySelection_eTakeSource,
1247	BGRC_Output_ColorKeySelection_eTakeSource,
1248	BGRC_Output_ColorKeySelection_eTakeDestination,
1249	BGRC_Output_ColorKeySelection_eTakeDestination );
1250	BGRC_Output_SetDither( hGrc, false );
1251	BGRC_Source_SetFixedScaleFactor( hGrc, 0, 0, 0, 0 );
1252
1253	hGrc->bUninitialized = false;
1254
1255	/* copy current state to default state */
1256	BGRC_P_Source_CopyState( &hGrc->DefaultState, &hGrc->CurrentState,
1257	hGrc->aulDefaultRegs, hGrc->aulCurrentRegs );
1258	BGRC_P_Destination_CopyState( &hGrc->DefaultState, &hGrc->CurrentState,
1259	hGrc->aulDefaultRegs, hGrc->aulCurrentRegs );
1260	BGRC_P_Pattern_CopyState( &hGrc->DefaultState, &hGrc->CurrentState,
1261	hGrc->aulDefaultRegs, hGrc->aulCurrentRegs );
1262	BGRC_P_Blend_CopyState( &hGrc->DefaultState, &hGrc->CurrentState,
1263	hGrc->aulDefaultRegs, hGrc->aulCurrentRegs );
1264	BGRC_P_Output_CopyState( &hGrc->DefaultState, &hGrc->CurrentState,
1265	hGrc->aulDefaultRegs, hGrc->aulCurrentRegs );
1266
1267	/* enable loading of all registers groups */
1268	BGRC_P_LOAD_LIST_GRP( LIST_PACKET_HEADER_1, SRC_FEEDER_GRP_CNTRL, GRP_ENABLE, &hGrc->CurrentState, hGrc->aulCurrentRegs );
1269	BGRC_P_LOAD_LIST_GRP( LIST_PACKET_HEADER_1, DST_FEEDER_GRP_CNTRL, GRP_ENABLE, &hGrc->CurrentState, hGrc->aulCurrentRegs );
1270	BGRC_P_LOAD_LIST_GRP( LIST_PACKET_HEADER_1, OUTPUT_FEEDER_GRP_CNTRL, GRP_ENABLE, &hGrc->CurrentState, hGrc->aulCurrentRegs );
1271	BGRC_P_LOAD_LIST_GRP( LIST_PACKET_HEADER_1, SRC_COLOR_KEY_GRP_CNTRL, GRP_ENABLE, &hGrc->CurrentState, hGrc->aulCurrentRegs );
1272	BGRC_P_LOAD_LIST_GRP( LIST_PACKET_HEADER_1, SRC_COLOR_MATRIX_GRP_CNTRL, GRP_ENABLE, &hGrc->CurrentState, hGrc->aulCurrentRegs );
1273	BGRC_P_LOAD_LIST_GRP( LIST_PACKET_HEADER_1, DST_COLOR_KEY_GRP_CNTRL, GRP_ENABLE, &hGrc->CurrentState, hGrc->aulCurrentRegs );
1274	#if ((BCHP_CHIP==7038) && (BCHP_VER < BCHP_VER_C0))
1275	BGRC_P_LOAD_LIST_GRP( LIST_PACKET_HEADER_1, DST_COLOR_MATRIX_GRP_CNTRL, GRP_ENABLE, &hGrc->CurrentState, hGrc->aulCurrentRegs );
1276	BGRC_P_LOAD_LIST_GRP( LIST_PACKET_HEADER_1, OUTPUT_COLOR_MATRIX_GRP_CNTRL, GRP_ENABLE, &hGrc->CurrentState, hGrc->aulCurrentRegs );
1277	#endif
1278	BGRC_P_LOAD_LIST_GRP( LIST_PACKET_HEADER_1, SCALE_PARAM_GRP_CNTRL, GRP_ENABLE, &hGrc->CurrentState, hGrc->aulCurrentRegs );
1279	BGRC_P_LOAD_LIST_GRP( LIST_PACKET_HEADER_1, BLEND_PARAM_GRP_CNTRL, GRP_ENABLE, &hGrc->CurrentState, hGrc->aulCurrentRegs );
1280	BGRC_P_LOAD_LIST_GRP( LIST_PACKET_HEADER_1, BLIT_GRP_CNTRL, GRP_ENABLE, &hGrc->CurrentState, hGrc->aulCurrentRegs );
1281	BGRC_P_LOAD_LIST_GRP( LIST_PACKET_HEADER_1, ROP_GRP_CNTRL, GRP_ENABLE, &hGrc->CurrentState, hGrc->aulCurrentRegs );
1282
1283	#if ((BCHP_CHIP==7038) && (BCHP_VER < BCHP_VER_C0)) \|\| \
1284	((BCHP_CHIP==3560) && (BCHP_VER >= BCHP_VER_B0)) \|\| \
1285	((BCHP_CHIP==3563) && (BCHP_VER >= BCHP_VER_A0))
1286	/* disable 3-2 pulldown cadence detect */
1287	BREG_Write32( hGrc->hRegister, BCHP_M2MC_BLEND_PULLDOWN_COUNTER_ENABLE,
1288	BCHP_M2MC_BLEND_PULLDOWN_COUNTER_ENABLE_ENABLE_DISABLE );
1289	#endif
1290
1291	/* set return handle */
1292	*phGrc = hGrc;
1293
1294	#if ((BCHP_CHIP==7405) && (BCHP_VER >= BCHP_VER_A0))
1295	{
1296	uint32_t reg;
1297	reg = BREG_Read32(hRegister, BCHP_MEMC_1_1_CLIENT_INFO_2);
1298	reg \|= BCHP_MEMC_1_1_CLIENT_INFO_2_RR_EN_MASK;
1299	BREG_Write32(hRegister, BCHP_MEMC_1_1_CLIENT_INFO_2, reg);
1300	reg = BREG_Read32(hRegister, BCHP_MEMC_1_1_CLIENT_INFO_2);
1301	}
1302	#endif
1303
1304	BDBG_LEAVE(BGRC_Open);
1305	return BERR_SUCCESS;
1306
1307	fail:
1308	if( hGrc )
1309	{
1310	if( hGrc->hWaitSurface )
1311	BSUR_Surface_Destroy( hGrc->hWaitSurface );
1312
1313	if( hGrc->hPeriodicEvent )
1314	BKNI_DestroyEvent( hGrc->hPeriodicEvent );
1315
1316	if( hGrc->hInterruptEvent )
1317	BKNI_DestroyEvent( hGrc->hInterruptEvent );
1318
1319	if( hGrc->hInterruptCallback )
1320	BINT_DestroyCallback( hGrc->hInterruptCallback );
1321
1322	BKNI_Free( (void *) hGrc );
1323	}
1324
1325	BDBG_LEAVE(BGRC_Open);
1326	return BERR_TRACE(err);
1327	}
1328
1329	/***************************************************************************/
1330	void BGRC_Close(
1331	BGRC_Handle hGrc )
1332	{
1333	BDBG_ENTER(BGRC_Close);
1334	BDBG_ASSERT( hGrc );
1335
1336	/* wait for device to finish */
1337	(void)BGRC_WaitForOperationsComplete( hGrc, NULL, NULL );
1338
1339	/* free operation memory */
1340	BGRC_P_Operation_CleanupList( hGrc );
1341	BGRC_P_Operation_FreeAll( hGrc );
1342
1343	/* free list packet memory */
1344	BGRC_P_List_FreePacketMemory( hGrc );
1345
1346	/* free wait surface */
1347	BSUR_Surface_Destroy( hGrc->hWaitSurface );
1348
1349	/* destroy interrupt events */
1350	BKNI_DestroyEvent( hGrc->hInterruptEvent );
1351	BKNI_DestroyEvent( hGrc->hPeriodicEvent );
1352
1353	/* disable and destroy interrupt callback */
1354	BINT_DisableCallback( hGrc->hInterruptCallback );
1355	BINT_DestroyCallback( hGrc->hInterruptCallback );
1356
1357	/* free memory for private data */
1358	BDBG_OBJECT_DESTROY(hGrc, BGRC);
1359	BKNI_Free( (void *) hGrc );
1360
1361	BDBG_LEAVE(BGRC_Close);
1362	}
1363
1364	/***************************************************************************/
1365	BERR_Code BGRC_ResetState(
1366	BGRC_Handle hGrc )
1367	{
1368	BDBG_ENTER(BGRC_ResetState);
1369	BDBG_ASSERT( hGrc );
1370
1371	/* reset all states */
1372	BGRC_Source_ResetState( hGrc );
1373	BGRC_Destination_ResetState( hGrc );
1374	BGRC_Blend_ResetState( hGrc );
1375	BGRC_Pattern_ResetState( hGrc );
1376	BGRC_Output_ResetState( hGrc );
1377
1378	BDBG_LEAVE(BGRC_ResetState);
1379	return BERR_SUCCESS;
1380	}
1381
1382	/***************************************************************************/
1383	BERR_Code BGRC_P_IssueState(
1384	BGRC_Handle hGrc,
1385	BGRC_Callback pCallback_isr,
1386	void *pData )
1387	{
1388	BGRC_P_State *pState;
1389	BERR_Code err;
1390
1391	pState = &hGrc->CurrentState;
1392
1393	/* check if there is an output surface */
1394	if( pState->OutSurface.hSurface == 0 )
1395	return BERR_TRACE(BGRC_ERR_NO_OUTPUT_SURFACE);
1396
1397	/* validate surface dimensions */
1398	if( !BGRC_P_VALIDATE_SURFACE_RECTANGLE( &pState->SrcRect ) )
1399	return BERR_TRACE(BGRC_ERR_SOURCE_DIMENSIONS_INVALID);
1400
1401	if( !BGRC_P_VALIDATE_SURFACE_RECTANGLE( &pState->DstRect ) )
1402	return BERR_TRACE(BGRC_ERR_DESTINATION_DIMENSIONS_INVALID);
1403
1404	if( !BGRC_P_VALIDATE_SURFACE_RECTANGLE( &pState->OutRect ) )
1405	return BERR_TRACE(BGRC_ERR_OUTPUT_DIMENSIONS_INVALID);
1406
1407	/* set surface dimensions */
1408	pState->SrcSurface.ulX = pState->SrcRect.ulX;
1409	pState->SrcSurface.ulY = pState->SrcRect.ulY;
1410	pState->SrcSurface.ulWidth = pState->SrcRect.ulWidth ? pState->SrcRect.ulWidth : pState->SrcSurface.ulSurfaceWidth;
1411	pState->SrcSurface.ulHeight = pState->SrcRect.ulHeight ? pState->SrcRect.ulHeight : pState->SrcSurface.ulSurfaceHeight;
1412	pState->DstSurface.ulX = pState->DstRect.ulX;
1413	pState->DstSurface.ulY = pState->DstRect.ulY;
1414	pState->DstSurface.ulWidth = pState->DstRect.ulWidth ? pState->DstRect.ulWidth : pState->DstSurface.ulSurfaceWidth;
1415	pState->DstSurface.ulHeight = pState->DstRect.ulHeight ? pState->DstRect.ulHeight : pState->DstSurface.ulSurfaceHeight;
1416	pState->OutSurface.ulX = pState->OutRect.ulX;
1417	pState->OutSurface.ulY = pState->OutRect.ulY;
1418	pState->OutSurface.ulWidth = pState->OutRect.ulWidth ? pState->OutRect.ulWidth : pState->OutSurface.ulSurfaceWidth;
1419	pState->OutSurface.ulHeight = pState->OutRect.ulHeight ? pState->OutRect.ulHeight : pState->OutSurface.ulSurfaceHeight;
1420
1421	/* validate surface rectangles */
1422	if( !BGRC_P_VALIDATE_SURFACE_BOUNDS( pState, Src ) )
1423	return BERR_TRACE(BGRC_ERR_SOURCE_RECT_OUT_OF_BOUNDS);
1424
1425	if( !BGRC_P_VALIDATE_SURFACE_BOUNDS( pState, Dst ) )
1426	return BERR_TRACE(BGRC_ERR_DESTINATION_RECT_OUT_OF_BOUNDS);
1427
1428	if( !BGRC_P_VALIDATE_SURFACE_BOUNDS( pState, Out ) )
1429	return BERR_TRACE(BGRC_ERR_OUTPUT_RECT_OUT_OF_BOUNDS);
1430
1431	/* check if destination and output rectangle sizes are the same */
1432	if( pState->DstSurface.hSurface && pState->OutSurface.hSurface && (
1433	(pState->DstSurface.ulWidth != pState->OutSurface.ulWidth) \|\|
1434	(pState->DstSurface.ulHeight != pState->OutSurface.ulHeight)) )
1435	return BERR_TRACE(BGRC_ERR_DESTINATION_DIMENSIONS_INVALID);
1436
1437	/* check if rectangle has odd egdes when the surface is YCbCr422 */
1438	if( pState->SrcSurface.hSurface && BPXL_IS_YCbCr422_FORMAT(pState->SrcSurface.eFormat) &&
1439	((pState->SrcSurface.ulX & 1) \|\| (pState->SrcSurface.ulWidth & 1)) )
1440	return BERR_TRACE(BGRC_ERR_YCBCR422_SURFACE_HAS_ODD_EDGE);
1441
1442	if( pState->DstSurface.hSurface && BPXL_IS_YCbCr422_FORMAT(pState->DstSurface.eFormat) &&
1443	((pState->DstSurface.ulX & 1) \|\| (pState->DstSurface.ulWidth & 1)) )
1444	return BERR_TRACE(BGRC_ERR_YCBCR422_SURFACE_HAS_ODD_EDGE);
1445
1446	if( pState->OutSurface.hSurface && BPXL_IS_YCbCr422_FORMAT(pState->OutSurface.eFormat) &&
1447	((pState->OutSurface.ulX & 1) \|\| (pState->OutSurface.ulWidth & 1)) )
1448	return BERR_TRACE(BGRC_ERR_YCBCR422_SURFACE_HAS_ODD_EDGE);
1449
1450	/* Fire interrupt periodically so that operations can be marked as completed and memory can be reallocated. */
1451	if( hGrc->bPreAllocMemory )
1452	{
1453	if( hGrc->ulPacketMemorySinceInterrupt > BGRC_P_LIST_BLOCK_SIZE * 4 )
1454	{
1455	hGrc->bPeriodicInterrupt = true;
1456	hGrc->ulPeriodicInterrupts++;
1457	hGrc->ulPacketMemorySinceInterrupt = 0;
1458	}
1459	}
1460
1461	#if defined(BCHP_M2MC_SRC_SURFACE_1_FORMAT_DEF_1)
1462	/* check for YCbCr420 source */
1463	hGrc->bYCbCr420Source = false;
1464	if( ((pState->SrcSurface.eFormat == BPXL_eY8) \|\| (pState->SrcSurface.eFormat == BPXL_eA8_Y8)) &&
1465	((pState->SrcAlphaSurface.eFormat == BPXL_eCb8_Cr8) \|\| (pState->SrcAlphaSurface.eFormat == BPXL_eCr8_Cb8)) )
1466	{
1467	hGrc->bYCbCr420Source = true;
1468	}
1469	#endif
1470
1471	/* check for no scale filtering */
1472	hGrc->bNoScaleFilter = false;
1473	if( pState->SrcSurface.hSurface &&
1474	(pState->SrcSurface.ulWidth == pState->OutSurface.ulWidth) &&
1475	(pState->SrcSurface.ulHeight == pState->OutSurface.ulHeight) )
1476	{
1477	if( pState->bHorzFilter \|\| pState->bVertFilter )
1478	hGrc->bNoScaleFilter = true;
1479
1480	#if defined(BCHP_M2MC_SRC_SURFACE_1_FORMAT_DEF_1)
1481	if( hGrc->bYCbCr420Source )
1482	hGrc->bNoScaleFilter = true;
1483	#endif
1484	}
1485
1486	/* check if scaling or filtering */
1487	if( hGrc->bNoScaleFilter \|\| (pState->SrcSurface.hSurface && (
1488	(pState->SrcSurface.ulWidth != pState->OutSurface.ulWidth) \|\|
1489	(pState->SrcSurface.ulHeight != pState->OutSurface.ulHeight))) )
1490	{
1491	/* start filter blit operation */
1492	err = BGRC_P_FilterBlit( hGrc, pCallback_isr, pData, hGrc->bSetEvent );
1493	if( err != BERR_SUCCESS )
1494	return BERR_TRACE(err);
1495	}
1496	else
1497	{
1498	pState->ulHorzScalerStep = (1 << BGRC_P_SCALER_STEP_FRAC_BITS);
1499	pState->ulVertScalerStep = (1 << BGRC_P_SCALER_STEP_FRAC_BITS);
1500	pState->ulHorzAveragerCount = 1;
1501	pState->ulVertAveragerCount = 1;
1502
1503	/* start blit operation */
1504	err = BGRC_P_Blit( hGrc, pCallback_isr, pData, hGrc->bSetEvent );
1505	if( err != BERR_SUCCESS )
1506	return err;
1507	}
1508
1509	/* dump debug info */
1510	if( pState->SrcSurface.hSurface && pState->DstSurface.hSurface )
1511	{
1512	BDBG_MSG(("GRC Blit: Src(o=%08x,f=%08x,r=%dx%d-%dx%d,s=%dx%d) + Dst(o=%08x,f=%08x,r=%dx%d-%dx%d,s=%dx%d) -> Out(o=%08x,f=%08x,r=%dx%d-%dx%d,s=%dx%d) %s",
1513	pState->SrcSurface.ulOffset, pState->SrcSurface.eFormat, pState->SrcSurface.ulX, pState->SrcSurface.ulY, pState->SrcSurface.ulWidth, pState->SrcSurface.ulHeight, pState->SrcSurface.ulSurfaceWidth, pState->SrcSurface.ulSurfaceHeight,
1514	pState->DstSurface.ulOffset, pState->DstSurface.eFormat, pState->DstSurface.ulX, pState->DstSurface.ulY, pState->DstSurface.ulWidth, pState->DstSurface.ulHeight, pState->DstSurface.ulSurfaceWidth, pState->DstSurface.ulSurfaceHeight,
1515	pState->OutSurface.ulOffset, pState->OutSurface.eFormat, pState->OutSurface.ulX, pState->OutSurface.ulY, pState->OutSurface.ulWidth, pState->OutSurface.ulHeight, pState->OutSurface.ulSurfaceWidth, pState->OutSurface.ulSurfaceHeight,
1516	hGrc->bSetEvent ? "wait" : "async"));
1517	}
1518	else if( pState->SrcSurface.hSurface )
1519	{
1520	BDBG_MSG(("GRC Blit: Src(o=%08x,f=%08x,r=%dx%d-%dx%d,s=%dx%d) -> Out(o=%08x,f=%08x,r=%dx%d-%dx%d,s=%dx%d) %s",
1521	pState->SrcSurface.ulOffset, pState->SrcSurface.eFormat, pState->SrcSurface.ulX, pState->SrcSurface.ulY, pState->SrcSurface.ulWidth, pState->SrcSurface.ulHeight, pState->SrcSurface.ulSurfaceWidth, pState->SrcSurface.ulSurfaceHeight,
1522	pState->OutSurface.ulOffset, pState->OutSurface.eFormat, pState->OutSurface.ulX, pState->OutSurface.ulY, pState->OutSurface.ulWidth, pState->OutSurface.ulHeight, pState->OutSurface.ulSurfaceWidth, pState->OutSurface.ulSurfaceHeight,
1523	hGrc->bSetEvent ? "wait" : "async"));
1524	}
1525	else if( pState->DstSurface.hSurface )
1526	{
1527	BDBG_MSG(("GRC Blit: Dst(o=%08x,f=%08x,r=%dx%d-%dx%d,s=%dx%d) -> Out(o=%08x,f=%08x,r=%dx%d-%dx%d,s=%dx%d) %s",
1528	pState->DstSurface.ulOffset, pState->DstSurface.eFormat, pState->DstSurface.ulX, pState->DstSurface.ulY, pState->DstSurface.ulWidth, pState->DstSurface.ulHeight, pState->DstSurface.ulSurfaceWidth, pState->DstSurface.ulSurfaceHeight,
1529	pState->OutSurface.ulOffset, pState->OutSurface.eFormat, pState->OutSurface.ulX, pState->OutSurface.ulY, pState->OutSurface.ulWidth, pState->OutSurface.ulHeight, pState->OutSurface.ulSurfaceWidth, pState->OutSurface.ulSurfaceHeight,
1530	hGrc->bSetEvent ? "wait" : "async"));
1531	}
1532	else
1533	{
1534	BDBG_MSG(("GRC Blit: Out(o=%08x,f=%08x,r=%dx%d-%dx%d,s=%dx%d) %s",
1535	pState->OutSurface.ulOffset, pState->OutSurface.eFormat, pState->OutSurface.ulX, pState->OutSurface.ulY, pState->OutSurface.ulWidth, pState->OutSurface.ulHeight, pState->OutSurface.ulSurfaceWidth, pState->OutSurface.ulSurfaceHeight,
1536	hGrc->bSetEvent ? "wait" : "async"));
1537	}
1538
1539	/* disable set event flag */
1540	hGrc->bSetEvent = false;
1541	hGrc->bPeriodicInterrupt = false;
1542
1543	return BERR_SUCCESS;
1544	}
1545
1546	/***************************************************************************/
1547	BERR_Code BGRC_P_IssueStateAndWait(
1548	BGRC_Handle hGrc )
1549	{
1550	uint32_t ulCurrentAddress = 0;
1551	uint32_t ulPreviousAddress = 0;
1552	BERR_Code err;
1553
1554	/* enable set event flag */
1555	hGrc->bSetEvent = true;
1556
1557	/* initiate device operation */
1558	err = BGRC_P_IssueState( hGrc, NULL, NULL );
1559	if( err != BERR_SUCCESS )
1560	return BERR_TRACE(err);
1561
1562	/* wait for the device operation to finish */
1563	while( BKNI_WaitForEvent( hGrc->hInterruptEvent, hGrc->ulWaitTimeout * 1000 ) == BERR_TIMEOUT )
1564	{
1565	ulCurrentAddress = BGRC_P_READ_REG( BLIT_OUTPUT_ADDRESS );
1566	if( ulCurrentAddress == ulPreviousAddress )
1567	{
1568	BGRC_P_PrintRegisters( hGrc );
1569	return BERR_TRACE(BGRC_ERR_M2MC_DEVICE_IS_HUNG);
1570	}
1571	ulPreviousAddress = ulCurrentAddress;
1572	}
1573
1574	return BERR_SUCCESS;
1575	}
1576
1577	#ifdef BCHP_M2MC_DCE_PRED_CFG
1578	/***************************************************************************/
1579	void BGRC_P_EnableTestFeature1(
1580	BGRC_Handle hGrc,
1581	BSUR_TestFeature1_Settings *pSettings )
1582	{
1583	uint32_t ulReg = BREG_Read32( hGrc->hRegister, BCHP_M2MC_DCE_PRED_CFG ) & (~(
1584	BCHP_MASK(M2MC_DCE_PRED_CFG, ENABLE) \|
1585	BCHP_MASK(M2MC_DCE_PRED_CFG, CONVERT_RGB) \|
1586	BCHP_MASK(M2MC_DCE_PRED_CFG, PREDICTION_MODE) \|
1587	BCHP_MASK(M2MC_DCE_PRED_CFG, EDGE_PRED_ENA) \|
1588	BCHP_MASK(M2MC_DCE_PRED_CFG, LEFT_PRED_ENA) \|
1589	BCHP_MASK(M2MC_DCE_PRED_CFG, ABCD_PRED_ENA) \|
1590	BCHP_MASK(M2MC_DCE_PRED_CFG, LS_PRED_ENA)));
1591
1592	BREG_Write32( hGrc->hRegister, BCHP_M2MC_DCE_PRED_CFG, ulReg \|
1593	BCHP_FIELD_ENUM(M2MC_DCE_PRED_CFG, ENABLE, Enable) \|
1594	BCHP_FIELD_DATA(M2MC_DCE_PRED_CFG, PREDICTION_MODE, pSettings->ulPredictionMode) \|
1595	BCHP_FIELD_ENUM(M2MC_DCE_PRED_CFG, CONVERT_RGB, Disable) \|
1596	BCHP_FIELD_ENUM(M2MC_DCE_PRED_CFG, EDGE_PRED_ENA, Disable) \|
1597	BCHP_FIELD_ENUM(M2MC_DCE_PRED_CFG, LEFT_PRED_ENA, Disable) \|
1598	BCHP_FIELD_ENUM(M2MC_DCE_PRED_CFG, ABCD_PRED_ENA, Disable) \|
1599	BCHP_FIELD_ENUM(M2MC_DCE_PRED_CFG, LS_PRED_ENA, Enable) );
1600
1601	ulReg = BREG_Read32( hGrc->hRegister, BCHP_M2MC_DCE_COMPR_CFG1 ) & (~(
1602	BCHP_MASK(M2MC_DCE_COMPR_CFG1, PIXELS_PER_GROUP) \|
1603	BCHP_MASK(M2MC_DCE_COMPR_CFG1, TGT_BPG)));
1604	BREG_Write32( hGrc->hRegister, BCHP_M2MC_DCE_COMPR_CFG1, ulReg \|
1605	BCHP_FIELD_ENUM(M2MC_DCE_COMPR_CFG1, PIXELS_PER_GROUP, Four) \|
1606	BCHP_FIELD_DATA(M2MC_DCE_COMPR_CFG1, TGT_BPG, pSettings->ulBitsPerPixel * 2) );
1607
1608	ulReg = BREG_Read32( hGrc->hRegister, BCHP_M2MC_DCE_VIDEO_CFG ) & (~(
1609	BCHP_MASK(M2MC_DCE_VIDEO_CFG, VIDEO_FORMAT) \|
1610	BCHP_MASK(M2MC_DCE_VIDEO_CFG, COMP10BIT)));
1611	BREG_Write32( hGrc->hRegister, BCHP_M2MC_DCE_VIDEO_CFG, ulReg \|
1612	BCHP_FIELD_ENUM(M2MC_DCE_VIDEO_CFG, VIDEO_FORMAT, Fmt_4444) \|
1613	BCHP_FIELD_ENUM(M2MC_DCE_VIDEO_CFG, COMP10BIT, Eight_bit) );
1614
1615	BGRC_P_SET_FIELD_DATA( OUTPUT_SURFACE_FORMAT_DEF_1, FORMAT_TYPE, 9 );
1616	}
1617
1618	/***************************************************************************/
1619	void BGRC_P_DisableTestFeature1(
1620	BGRC_Handle hGrc )
1621	{
1622	uint32_t ulReg = BREG_Read32( hGrc->hRegister, BCHP_M2MC_DCE_PRED_CFG ) & (~BCHP_MASK(M2MC_DCE_PRED_CFG, ENABLE));
1623	BREG_Write32( hGrc->hRegister, BCHP_M2MC_DCE_PRED_CFG, ulReg \| BCHP_FIELD_ENUM(M2MC_DCE_PRED_CFG, ENABLE, Disable) );
1624	}
1625
1626	/***************************************************************************/
1627	BERR_Code BGRC_P_IssueStateTestFeature1(
1628	BGRC_Handle hGrc,
1629	BGRC_Callback pCallback_isr,
1630	void *pData )
1631	{
1632	BERR_Code err = BERR_SUCCESS;
1633
1634	BSUR_TestFeature1_Settings stTestFeature1Settings;
1635	BSUR_Surface_GetTestFeature1( hGrc->CurrentState.OutSurface.hSurface, &stTestFeature1Settings );
1636
1637	BGRC_WaitForOperationsComplete( hGrc, NULL, NULL );
1638	BGRC_P_EnableTestFeature1( hGrc, &stTestFeature1Settings );
1639
1640	err = BGRC_P_IssueStateAndWait( hGrc );
1641
1642	BGRC_P_DisableTestFeature1( hGrc );
1643	BGRC_WaitForOperationsComplete( hGrc, pCallback_isr, pData );
1644
1645	return BERR_TRACE(err);
1646	}
1647	#endif
1648
1649	/***************************************************************************/
1650	BERR_Code BGRC_IssueState(
1651	BGRC_Handle hGrc,
1652	BGRC_Callback pCallback_isr,
1653	void *pData )
1654	{
1655	#ifdef BCHP_M2MC_DCE_PRED_CFG
1656	BSUR_TestFeature1_Settings stTestFeature1Settings;
1657	#endif
1658
1659	BDBG_ENTER(BGRC_IssueState);
1660	BDBG_ASSERT( hGrc );
1661
1662	if( hGrc->CurrentState.OutSurface.hSurface == 0 )
1663	return BERR_TRACE(BGRC_ERR_NO_OUTPUT_SURFACE);
1664
1665	#ifdef BCHP_M2MC_DCE_PRED_CFG
1666	BSUR_Surface_GetTestFeature1( hGrc->CurrentState.OutSurface.hSurface, &stTestFeature1Settings );
1667	if( stTestFeature1Settings.bEnable )
1668	{
1669	BGRC_P_IssueStateTestFeature1( hGrc, pCallback_isr, pData );
1670	}
1671	else
1672	#endif
1673	{
1674	BERR_Code err = BGRC_P_IssueState( hGrc, pCallback_isr, pData );
1675	if( err != BERR_SUCCESS )
1676	{
1677	BDBG_LEAVE(BGRC_IssueState);
1678	return BERR_TRACE(err);
1679	}
1680	}
1681
1682	BDBG_LEAVE(BGRC_IssueState);
1683	return BERR_SUCCESS;
1684	}
1685
1686	/***************************************************************************/
1687	BERR_Code BGRC_IssueStateAndWait(
1688	BGRC_Handle hGrc )
1689	{
1690	#ifdef BCHP_M2MC_DCE_PRED_CFG
1691	BSUR_TestFeature1_Settings stTestFeature1Settings;
1692	#endif
1693
1694	BDBG_ENTER(BGRC_IssueStateAndWait);
1695	BDBG_ASSERT( hGrc );
1696
1697	if( hGrc->CurrentState.OutSurface.hSurface == 0 )
1698	return BERR_TRACE(BGRC_ERR_NO_OUTPUT_SURFACE);
1699
1700	#ifdef BCHP_M2MC_DCE_PRED_CFG
1701	BSUR_Surface_GetTestFeature1( hGrc->CurrentState.OutSurface.hSurface, &stTestFeature1Settings );
1702	if( stTestFeature1Settings.bEnable )
1703	{
1704	BGRC_P_IssueStateTestFeature1( hGrc, NULL, NULL );
1705	}
1706	else
1707	#endif
1708	{
1709	BERR_Code err = BGRC_P_IssueStateAndWait( hGrc );
1710	if( err != BERR_SUCCESS )
1711	{
1712	BDBG_LEAVE(BGRC_IssueStateAndWait);
1713	return BERR_TRACE(err);
1714	}
1715	}
1716
1717	BDBG_LEAVE(BGRC_IssueStateAndWait);
1718	return BERR_SUCCESS;
1719	}
1720
1721	/***************************************************************************/
1722	BERR_Code BGRC_OperationsComplete(
1723	BGRC_Handle hGrc,
1724	bool *pbComplete )
1725	{
1726	uint32_t ulBlitStatus;
1727	uint32_t ulListStatus;
1728
1729	BDBG_ENTER(BGRC_OperationsComplete);
1730	BDBG_ASSERT( hGrc );
1731	BDBG_ASSERT( pbComplete );
1732
1733	/* check if device is idle */
1734	ulBlitStatus = BGRC_P_READ_REG( BLIT_STATUS );
1735	ulListStatus = BGRC_P_READ_REG( LIST_STATUS );
1736
1737	if( (BCHP_GET_FIELD_DATA(ulListStatus, M2MC_LIST_STATUS, BUSY) == BCHP_M2MC_LIST_STATUS_BUSY_Busy) \|\|
1738	(BCHP_GET_FIELD_DATA(ulListStatus, M2MC_LIST_STATUS, FINISHED) == BCHP_M2MC_LIST_STATUS_FINISHED_NotFinished) \|\|
1739	(BCHP_GET_FIELD_DATA(ulBlitStatus, M2MC_BLIT_STATUS, STATUS) == BCHP_M2MC_BLIT_STATUS_STATUS_RUNNING) )
1740	*pbComplete = false;
1741	else
1742	*pbComplete = true;
1743
1744	/* wait for dummy blit if device is idle to flush operation processing */
1745	if( *pbComplete )
1746	{
1747	BERR_Code err = BGRC_WaitForOperationsComplete( hGrc, 0, 0 );
1748	if( err != BERR_SUCCESS )
1749	{
1750	BDBG_ERR(( "BGRC_WaitForOperationsComplete FAILED IN BGRC_OperationsComplete" ));
1751	return BERR_TRACE(err);
1752	}
1753	}
1754
1755	BDBG_LEAVE(BGRC_OperationsComplete);
1756	return BERR_SUCCESS;
1757	}
1758
1759	/***************************************************************************/
1760	BERR_Code BGRC_WaitForOperationReady(
1761	BGRC_Handle hGrc,
1762	BGRC_Callback pCallback_isr,
1763	void *pData )
1764	{
1765	BERR_Code err = BERR_SUCCESS;
1766
1767	BDBG_ENTER(BGRC_WaitForOperationReady);
1768	BDBG_ASSERT( hGrc );
1769
1770	if( pCallback_isr )
1771	{
1772	hGrc->pPeriodicData = pData;
1773	hGrc->pPeriodicCallback = pCallback_isr;
1774
1775	if( hGrc->ulPeriodicInterrupts == 0 )
1776	{
1777	err = BGRC_WaitForOperationsComplete( hGrc, pCallback_isr, pData );
1778	if( err != BERR_SUCCESS )
1779	{
1780	BDBG_ERR(( "BGRC_WaitForOperationsComplete FAILED IN BGRC_WaitForOperationReady" ));
1781	return BERR_TRACE(err);
1782	}
1783	hGrc->pPeriodicData = NULL;
1784	hGrc->pPeriodicCallback = NULL;
1785	}
1786	}
1787	else
1788	{
1789	while( hGrc->pCurrListBlock->pNextBlock->ulRefCount )
1790	{
1791	BERR_Code err = BKNI_WaitForEvent( hGrc->hPeriodicEvent, hGrc->ulWaitTimeout * 1000 );
1792	if( err != BERR_SUCCESS )
1793	{
1794	BDBG_ERR(( "BKNI_WaitForEvent TIMED OUT IN BGRC_WaitForOperationReady." ));
1795	return BERR_TRACE(err);
1796	}
1797
1798	BGRC_P_Operation_CleanupList( hGrc );
1799	}
1800	}
1801
1802	BDBG_LEAVE(BGRC_WaitForOperationReady);
1803	return BERR_SUCCESS;
1804	}
1805
1806	/***************************************************************************/
1807	BERR_Code BGRC_WaitForOperationsComplete(
1808	BGRC_Handle hGrc,
1809	BGRC_Callback pCallback_isr,
1810	void *pData )
1811	{
1812	BERR_Code err = BERR_SUCCESS;
1813
1814	BDBG_ENTER(BGRC_WaitForOperationsComplete);
1815	BDBG_ASSERT( hGrc );
1816
1817	/* Save current state */
1818	BGRC_P_Source_CopyState( &hGrc->StoredState, &hGrc->CurrentState, hGrc->aulStoredRegs, hGrc->aulCurrentRegs );
1819	BGRC_P_Destination_CopyState( &hGrc->StoredState, &hGrc->CurrentState, hGrc->aulStoredRegs, hGrc->aulCurrentRegs );
1820	BGRC_P_Output_CopyState( &hGrc->StoredState, &hGrc->CurrentState, hGrc->aulStoredRegs, hGrc->aulCurrentRegs );
1821	BGRC_P_Pattern_CopyState( &hGrc->StoredState, &hGrc->CurrentState, hGrc->aulStoredRegs, hGrc->aulCurrentRegs );
1822	BGRC_P_Blend_CopyState( &hGrc->StoredState, &hGrc->CurrentState, hGrc->aulStoredRegs, hGrc->aulCurrentRegs );
1823
1824	/* Do fill and wait */
1825	err = BGRC_ResetState( hGrc );
1826	if( err != BERR_SUCCESS )
1827	{
1828	BDBG_LEAVE(BGRC_WaitForOperationsComplete);
1829	return BERR_TRACE(err);
1830	}
1831
1832	BGRC_Output_SetSurface( hGrc, hGrc->hWaitSurface );
1833
1834	if( pCallback_isr )
1835	err = BGRC_P_IssueState( hGrc, pCallback_isr, pData );
1836	else
1837	err = BGRC_P_IssueStateAndWait( hGrc );
1838
1839	/* Restore current state */
1840	BGRC_P_Source_CopyState( &hGrc->CurrentState, &hGrc->StoredState, hGrc->aulCurrentRegs, hGrc->aulStoredRegs );
1841	BGRC_P_Destination_CopyState( &hGrc->CurrentState, &hGrc->StoredState, hGrc->aulCurrentRegs, hGrc->aulStoredRegs );
1842	BGRC_P_Output_CopyState( &hGrc->CurrentState, &hGrc->StoredState, hGrc->aulCurrentRegs, hGrc->aulStoredRegs );
1843	BGRC_P_Pattern_CopyState( &hGrc->CurrentState, &hGrc->StoredState, hGrc->aulCurrentRegs, hGrc->aulStoredRegs );
1844	BGRC_P_Blend_CopyState( &hGrc->CurrentState, &hGrc->StoredState, hGrc->aulCurrentRegs, hGrc->aulStoredRegs );
1845
1846	BDBG_LEAVE(BGRC_WaitForOperationsComplete);
1847	if( err != BERR_SUCCESS )
1848	return BERR_TRACE(err);
1849	else
1850	return BERR_SUCCESS;
1851	}
1852
1853	/***************************************************************************/
1854	BERR_Code BGRC_Source_SetSurface(
1855	BGRC_Handle hGrc,
1856	BSUR_Surface_Handle hSurface )
1857	{
1858	BGRC_P_State *pState;
1859	BGRC_P_Surface Surface;
1860	bool bSurfaceChanged = false;
1861
1862	BDBG_ENTER(BGRC_Source_SetSurface);
1863	BDBG_ASSERT( hGrc );
1864
1865	pState = &hGrc->CurrentState;
1866
1867	/* get surface data */
1868	BGRC_P_GET_SURFACE_DATA( hSurface, Surface, pState->SrcSurface );
1869
1870	/* check if surface is changing */
1871	if( hGrc->bUninitialized \|\| bSurfaceChanged )
1872	{
1873	/* validate surface format */
1874	if( hSurface && BPXL_IS_DEPTH_FORMAT(Surface.eFormat) )
1875	return BERR_TRACE(BERR_INVALID_PARAMETER);
1876
1877	#if (BCHP_CHIP!=3548) && (BCHP_CHIP!=3556) && (BCHP_CHIP!=3563) && (BCHP_CHIP!=35130) && (BCHP_CHIP!=35230)
1878	if( hSurface && (BPXL_IS_YCbCr444_10BIT_FORMAT(Surface.eFormat) \|\| BPXL_IS_YCbCr422_10BIT_FORMAT(Surface.eFormat)) )
1879	return BERR_TRACE(BERR_INVALID_PARAMETER);
1880	#endif
1881
1882	/* set register load field */
1883	BGRC_P_LOAD_LIST_GRP( LIST_PACKET_HEADER_1, SRC_FEEDER_GRP_CNTRL, GRP_ENABLE, pState, hGrc->aulCurrentRegs );
1884
1885	/* set surface fields */
1886	BGRC_P_SET_FIELD_COMP( SRC_FEEDER_ENABLE, ENABLE, ENABLE, DISABLE, hSurface );
1887	BGRC_P_SET_FIELD_DATA( SRC_SURFACE_ADDR_0, ADDR, Surface.ulOffset );
1888	BGRC_P_SET_FIELD_DATA( SRC_SURFACE_STRIDE_0, STRIDE, Surface.ulPitch );
1889	BGRC_P_SET_FIELD_FORMAT( SRC, FORMAT_TYPE, Surface.eFormat, pState->SrcAlphaSurface.hSurface, pState->bSrcPaletteBypass );
1890	BGRC_P_SET_FIELD_CHANNELS( SRC, Surface.eFormat, hSurface );
1891
1892	BGRC_P_SET_FIELD_COMP_DATA( SRC_SURFACE_FORMAT_DEF_3, CH0_DISABLE, 0, 1, hSurface && BPXL_COMPONENT_SIZE(Surface.eFormat, 0) );
1893	BGRC_P_SET_FIELD_COMP_DATA( SRC_SURFACE_FORMAT_DEF_3, CH1_DISABLE, 0, 1, hSurface && BPXL_COMPONENT_SIZE(Surface.eFormat, 1) );
1894	BGRC_P_SET_FIELD_COMP_DATA( SRC_SURFACE_FORMAT_DEF_3, CH2_DISABLE, 0, 1, hSurface && BPXL_COMPONENT_SIZE(Surface.eFormat, 2) );
1895	BGRC_P_SET_FIELD_COMP_DATA( SRC_SURFACE_FORMAT_DEF_3, CH3_DISABLE, 0, 1, hSurface && BPXL_COMPONENT_SIZE(Surface.eFormat, 3) );
1896
1897	#if defined(BCHP_M2MC_BLIT_SRC_STRIPE_HEIGHT_WIDTH_0)
1898	BGRC_P_SET_FIELD_DATA( BLIT_SRC_STRIPE_HEIGHT_WIDTH_0, STRIPE_HEIGHT, 0 );
1899	#endif
1900	#if defined(BCHP_M2MC_SRC_SURFACE_0_FORMAT_DEF_1_STRIPED_IMAGE_FORMAT_MASK)
1901	BGRC_P_SET_FIELD_DATA( SRC_SURFACE_0_FORMAT_DEF_1, STRIPED_IMAGE_FORMAT, 0 );
1902	#endif
1903	#if defined(BCHP_M2MC_SRC_SURFACE_0_FORMAT_DEF_3_RANGE_EXP_MAP_SCALE_FACTOR_Y_MASK)
1904	BGRC_P_SET_FIELD_DATA( SRC_SURFACE_0_FORMAT_DEF_3, RANGE_EXP_MAP_SCALE_FACTOR_Y, BGRC_P_MACROBLOCK_RANGE_NONE );
1905	BGRC_P_SET_FIELD_DATA( SRC_SURFACE_0_FORMAT_DEF_3, RANGE_EXP_MAP_SCALE_FACTOR_C, BGRC_P_MACROBLOCK_RANGE_NONE );
1906	#endif
1907
1908	/* set registers for YCbCr 420 format */
1909	if( (Surface.eFormat == BPXL_eY8) \|\| (Surface.eFormat == BPXL_eA8_Y8) )
1910	{
1911	#if defined(BCHP_M2MC_BLIT_SRC_STRIPE_HEIGHT_WIDTH_0)
1912	BGRC_P_SET_FIELD_DATA( BLIT_SRC_STRIPE_HEIGHT_WIDTH_0, STRIPE_HEIGHT, Surface.ulSurfaceHeight );
1913	#endif
1914	#if defined(BCHP_M2MC_BLIT_SRC_STRIPE_HEIGHT_WIDTH_0_STRIPE_WIDTH_MASK)
1915	BGRC_P_SET_FIELD_DATA( BLIT_SRC_STRIPE_HEIGHT_WIDTH_0, STRIPE_WIDTH,
1916	(pState->ulMacroBlockStripWidth == BGRC_P_YCbCr420_STRIP_WIDTH) ? 0 : 1 );
1917	#endif
1918
1919	#if defined(BCHP_M2MC_SRC_SURFACE_0_FORMAT_DEF_1_STRIPED_IMAGE_FORMAT_MASK)
1920	BGRC_P_SET_FIELD_DATA( SRC_SURFACE_0_FORMAT_DEF_1, STRIPED_IMAGE_FORMAT, pState->bMacroBlockLinear ? 0 : 1 );
1921	BGRC_P_SET_FIELD_DATA( SRC_SURFACE_0_FORMAT_DEF_1, FORMAT_TYPE, pState->bMacroBlockBigEndian ? 0 : 7 );
1922	#else
1923	BGRC_P_SET_FIELD_DATA( SRC_SURFACE_FORMAT_DEF_1, FORMAT_TYPE, pState->bMacroBlockBigEndian ? 0 : (pState->bMacroBlockLinear ? 7 : 15) );
1924	#endif
1925	BGRC_P_SET_FIELD_DATA( SRC_SURFACE_FORMAT_DEF_3, CH0_DISABLE, 1 );
1926	BGRC_P_SET_FIELD_DATA( SRC_SURFACE_FORMAT_DEF_3, CH1_DISABLE, 1 );
1927	BGRC_P_SET_FIELD_DATA( SRC_SURFACE_FORMAT_DEF_3, CH2_DISABLE, 0 );
1928	BGRC_P_SET_FIELD_DATA( SRC_SURFACE_FORMAT_DEF_3, CH3_DISABLE, (Surface.eFormat == BPXL_eA8_Y8) ? 0 : 1 );
1929
1930	#if defined(BCHP_M2MC_SRC_SURFACE_0_FORMAT_DEF_3_RANGE_EXP_MAP_SCALE_FACTOR_Y_MASK)
1931	BGRC_P_SET_FIELD_DATA( SRC_SURFACE_0_FORMAT_DEF_3, RANGE_EXP_MAP_SCALE_FACTOR_Y, pState->ulMacroBlockRangeY );
1932	#endif
1933	}
1934
1935	#if defined(BCHP_M2MC_BLIT_SRC_STRIPE_HEIGHT_WIDTH_0)
1936	if( BGRC_P_REGISTER_CHANGED( BLIT_SRC_STRIPE_HEIGHT_WIDTH_0 ) )
1937	BGRC_P_LOAD_LIST_GRP( LIST_PACKET_HEADER_1, BLIT_GRP_CNTRL, GRP_ENABLE, pState, hGrc->aulCurrentRegs );
1938	#endif
1939
1940	/* store surface data */
1941	BKNI_Memcpy( &pState->SrcSurface, &Surface, sizeof (BGRC_P_Surface) );
1942	}
1943
1944	BDBG_LEAVE(BGRC_Source_SetSurface);
1945	return BERR_SUCCESS;
1946	}
1947
1948	/***************************************************************************/
1949	BERR_Code BGRC_Source_SetAlphaSurface(
1950	BGRC_Handle hGrc,
1951	BSUR_Surface_Handle hSurface )
1952	{
1953	BGRC_P_State *pState;
1954	BGRC_P_Surface Surface;
1955	bool bSurfaceChanged = false;
1956
1957	BDBG_ENTER(BGRC_Source_SetAlphaSurface);
1958	BDBG_ASSERT( hGrc );
1959
1960	pState = &hGrc->CurrentState;
1961
1962	/* get surface data */
1963	BGRC_P_GET_SURFACE_DATA( hSurface, Surface, pState->SrcAlphaSurface );
1964
1965	/* check if surface is changing */
1966	if( hGrc->bUninitialized \|\| bSurfaceChanged )
1967	{
1968	/* validate surface format */
1969	if( hSurface && BPXL_IS_DEPTH_FORMAT(Surface.eFormat) )
1970	return BERR_TRACE(BERR_INVALID_PARAMETER);
1971
1972	/* set register load field */
1973	BGRC_P_LOAD_LIST_GRP( LIST_PACKET_HEADER_1, SRC_FEEDER_GRP_CNTRL, GRP_ENABLE, pState, hGrc->aulCurrentRegs );
1974
1975	/* set surface fields */
1976	BGRC_P_SET_FIELD_DATA( SRC_SURFACE_ADDR_1, ADDR, Surface.ulOffset );
1977	BGRC_P_SET_FIELD_DATA( SRC_SURFACE_STRIDE_1, STRIDE, Surface.ulPitch );
1978
1979	#if defined(BCHP_M2MC_SRC_SURFACE_1_FORMAT_DEF_1)
1980	BGRC_P_SET_FIELD_COMP_DATA( SRC_SURFACE_1_FORMAT_DEF_3, CH0_DISABLE, 0, 1, hSurface && BPXL_COMPONENT_SIZE(Surface.eFormat, 0) );
1981	BGRC_P_SET_FIELD_COMP_DATA( SRC_SURFACE_1_FORMAT_DEF_3, CH1_DISABLE, 0, 1, hSurface && BPXL_COMPONENT_SIZE(Surface.eFormat, 1) );
1982	BGRC_P_SET_FIELD_COMP_DATA( SRC_SURFACE_1_FORMAT_DEF_3, CH2_DISABLE, 0, 1, hSurface && BPXL_COMPONENT_SIZE(Surface.eFormat, 2) );
1983	BGRC_P_SET_FIELD_COMP_DATA( SRC_SURFACE_1_FORMAT_DEF_3, CH3_DISABLE, 0, 1, hSurface && BPXL_COMPONENT_SIZE(Surface.eFormat, 3) );
1984	BGRC_P_SET_FIELD_DATA( SRC_SURFACE_1_FORMAT_DEF_1, FORMAT_TYPE, 0 );
1985
1986	#if defined(BCHP_M2MC_BLIT_SRC_STRIPE_HEIGHT_WIDTH_1)
1987	BGRC_P_SET_FIELD_DATA( BLIT_SRC_STRIPE_HEIGHT_WIDTH_1, STRIPE_HEIGHT, 0 );
1988	#endif
1989	#if defined(BCHP_M2MC_SRC_SURFACE_1_FORMAT_DEF_1_STRIPED_IMAGE_FORMAT_MASK)
1990	BGRC_P_SET_FIELD_DATA( SRC_SURFACE_1_FORMAT_DEF_1, STRIPED_IMAGE_FORMAT, 0 );
1991	#endif
1992	#if defined(BCHP_M2MC_SRC_SURFACE_1_FORMAT_DEF_3_RANGE_EXP_MAP_SCALE_FACTOR_Y_MASK)
1993	BGRC_P_SET_FIELD_DATA( SRC_SURFACE_1_FORMAT_DEF_3, RANGE_EXP_MAP_SCALE_FACTOR_Y, BGRC_P_MACROBLOCK_RANGE_NONE );
1994	BGRC_P_SET_FIELD_DATA( SRC_SURFACE_1_FORMAT_DEF_3, RANGE_EXP_MAP_SCALE_FACTOR_C, BGRC_P_MACROBLOCK_RANGE_NONE );
1995	#endif
1996
1997	/* set registers for YCbCr 420 format */
1998	if( (Surface.eFormat == BPXL_eCb8_Cr8) \|\| (Surface.eFormat == BPXL_eCr8_Cb8) )
1999	{
2000	#if defined(BCHP_M2MC_BLIT_SRC_STRIPE_HEIGHT_WIDTH_1)
2001	BGRC_P_SET_FIELD_DATA( BLIT_SRC_STRIPE_HEIGHT_WIDTH_1, STRIPE_HEIGHT, Surface.ulSurfaceHeight );
2002	#endif
2003	#if defined(BCHP_M2MC_BLIT_SRC_STRIPE_HEIGHT_WIDTH_1_STRIPE_WIDTH_MASK)
2004	BGRC_P_SET_FIELD_DATA( BLIT_SRC_STRIPE_HEIGHT_WIDTH_1, STRIPE_WIDTH,
2005	(pState->ulMacroBlockStripWidth == BGRC_P_YCbCr420_STRIP_WIDTH) ? 0 : 1 );
2006	#endif
2007
2008	#if defined(BCHP_M2MC_SRC_SURFACE_1_FORMAT_DEF_1_STRIPED_IMAGE_FORMAT_MASK)
2009	BGRC_P_SET_FIELD_DATA( SRC_SURFACE_1_FORMAT_DEF_1, STRIPED_IMAGE_FORMAT, pState->bMacroBlockLinear ? 0 : 1 );
2010	BGRC_P_SET_FIELD_DATA( SRC_SURFACE_1_FORMAT_DEF_1, FORMAT_TYPE, pState->bMacroBlockBigEndian ? 0 : 7 );
2011	#else
2012	BGRC_P_SET_FIELD_DATA( SRC_SURFACE_1_FORMAT_DEF_1, FORMAT_TYPE, pState->bMacroBlockBigEndian ? 0 : (pState->bMacroBlockLinear ? 7 : 15) );
2013	#endif
2014	BGRC_P_SET_FIELD_DATA( SRC_SURFACE_1_FORMAT_DEF_1, CH0_NUM_BITS, BPXL_COMPONENT_SIZE(Surface.eFormat, 0) );
2015	BGRC_P_SET_FIELD_DATA( SRC_SURFACE_1_FORMAT_DEF_1, CH1_NUM_BITS, BPXL_COMPONENT_SIZE(Surface.eFormat, 1) );
2016	BGRC_P_SET_FIELD_DATA( SRC_SURFACE_1_FORMAT_DEF_1, CH2_NUM_BITS, 0 );
2017	BGRC_P_SET_FIELD_DATA( SRC_SURFACE_1_FORMAT_DEF_1, CH3_NUM_BITS, 0 );
2018	BGRC_P_SET_FIELD_DATA( SRC_SURFACE_1_FORMAT_DEF_2, CH0_LSB_POS, BPXL_COMPONENT_POS(Surface.eFormat, 0) );
2019	BGRC_P_SET_FIELD_DATA( SRC_SURFACE_1_FORMAT_DEF_2, CH1_LSB_POS, BPXL_COMPONENT_POS(Surface.eFormat, 1) );
2020	BGRC_P_SET_FIELD_DATA( SRC_SURFACE_1_FORMAT_DEF_2, CH2_LSB_POS, 0 );
2021	BGRC_P_SET_FIELD_DATA( SRC_SURFACE_1_FORMAT_DEF_2, CH3_LSB_POS, 0 );
2022	BGRC_P_SET_FIELD_DATA( SRC_SURFACE_1_FORMAT_DEF_3, CH0_DISABLE, 0 );
2023	BGRC_P_SET_FIELD_DATA( SRC_SURFACE_1_FORMAT_DEF_3, CH1_DISABLE, 0 );
2024	BGRC_P_SET_FIELD_DATA( SRC_SURFACE_1_FORMAT_DEF_3, CH2_DISABLE, 1 );
2025	BGRC_P_SET_FIELD_DATA( SRC_SURFACE_1_FORMAT_DEF_3, CH3_DISABLE, 1 );
2026
2027	#if defined(BCHP_M2MC_SRC_SURFACE_1_FORMAT_DEF_3_RANGE_EXP_MAP_SCALE_FACTOR_C_MASK)
2028	BGRC_P_SET_FIELD_DATA( SRC_SURFACE_1_FORMAT_DEF_3, RANGE_EXP_MAP_SCALE_FACTOR_C, pState->ulMacroBlockRangeC );
2029	#endif
2030	}
2031	else
2032	{
2033	BGRC_P_SET_FIELD_DATA( SRC_SURFACE_1_FORMAT_DEF_1, CH0_NUM_BITS, 0 );
2034	BGRC_P_SET_FIELD_DATA( SRC_SURFACE_1_FORMAT_DEF_1, CH1_NUM_BITS, 0 );
2035	BGRC_P_SET_FIELD_DATA( SRC_SURFACE_1_FORMAT_DEF_1, CH2_NUM_BITS, 0 );
2036	BGRC_P_SET_FIELD_DATA( SRC_SURFACE_1_FORMAT_DEF_1, CH3_NUM_BITS, 0 );
2037	BGRC_P_SET_FIELD_DATA( SRC_SURFACE_1_FORMAT_DEF_2, CH0_LSB_POS, 0 );
2038	BGRC_P_SET_FIELD_DATA( SRC_SURFACE_1_FORMAT_DEF_2, CH1_LSB_POS, 0 );
2039	BGRC_P_SET_FIELD_DATA( SRC_SURFACE_1_FORMAT_DEF_2, CH2_LSB_POS, 0 );
2040	BGRC_P_SET_FIELD_DATA( SRC_SURFACE_1_FORMAT_DEF_2, CH3_LSB_POS, 0 );
2041	BGRC_P_SET_FIELD_DATA( SRC_SURFACE_1_FORMAT_DEF_3, CH0_DISABLE, 1 );
2042	BGRC_P_SET_FIELD_DATA( SRC_SURFACE_1_FORMAT_DEF_3, CH1_DISABLE, 1 );
2043	BGRC_P_SET_FIELD_DATA( SRC_SURFACE_1_FORMAT_DEF_3, CH2_DISABLE, 1 );
2044	BGRC_P_SET_FIELD_DATA( SRC_SURFACE_1_FORMAT_DEF_3, CH3_DISABLE, 1 );
2045	}
2046
2047	if( BGRC_P_REGISTER_CHANGED( BLIT_SRC_STRIPE_HEIGHT_WIDTH_1 ) )
2048	BGRC_P_LOAD_LIST_GRP( LIST_PACKET_HEADER_1, BLIT_GRP_CNTRL, GRP_ENABLE, pState, hGrc->aulCurrentRegs );
2049	#endif
2050
2051	#if 0
2052	/* set surface format field */
2053	if( pState->SrcSurface.hSurface )
2054	BGRC_P_SET_FIELD_FORMAT( SRC, FORMAT_TYPE, pState->SrcSurface.eFormat, hSurface, pState->bSrcPaletteBypass );
2055	#endif
2056
2057	/* store surface data */
2058	BKNI_Memcpy( &pState->SrcAlphaSurface, &Surface, sizeof (BGRC_P_Surface) );
2059	}
2060
2061	BDBG_LEAVE(BGRC_Source_SetAlphaSurface);
2062	return BERR_SUCCESS;
2063	}
2064
2065	/***************************************************************************/
2066	BERR_Code BGRC_Source_TogglePaletteBypass(
2067	BGRC_Handle hGrc,
2068	bool bEnableBypass )
2069	{
2070	BGRC_P_State *pState;
2071
2072	BDBG_ENTER(BGRC_Source_TogglePaletteBypass);
2073	BDBG_ASSERT( hGrc );
2074
2075	pState = &hGrc->CurrentState;
2076
2077	/* set palette bypass field */
2078	BGRC_P_SET_FIELD_COMP( SRC_SURFACE_FORMAT_DEF_3, PALETTE_BYPASS, DONT_LOOKUP, LOOKUP, bEnableBypass );
2079
2080	/* set format type due to bypass */
2081	if( pState->SrcSurface.hSurface )
2082	BGRC_P_SET_FIELD_FORMAT( SRC, FORMAT_TYPE, pState->SrcSurface.eFormat, pState->SrcAlphaSurface.hSurface, bEnableBypass );
2083
2084	/* set register load field */
2085	if( BGRC_P_REGISTER_CHANGED( SRC_SURFACE_FORMAT_DEF_1 ) \|\|
2086	BGRC_P_REGISTER_CHANGED( SRC_SURFACE_FORMAT_DEF_3 ) )
2087	BGRC_P_LOAD_LIST_GRP( LIST_PACKET_HEADER_1, SRC_FEEDER_GRP_CNTRL, GRP_ENABLE, pState, hGrc->aulCurrentRegs );
2088
2089	pState->bSrcPaletteBypass = bEnableBypass;
2090
2091	BDBG_LEAVE(BGRC_Source_TogglePaletteBypass);
2092	return BERR_SUCCESS;
2093	}
2094
2095	/***************************************************************************/
2096	BERR_Code BGRC_Source_SetChromaExpansion(
2097	BGRC_Handle hGrc,
2098	BGRC_ChromaExpansion eChromaExpansion )
2099	{
2100	BDBG_ENTER(BGRC_Source_SetChromaExpansion);
2101	BDBG_ASSERT( hGrc );
2102
2103	/* set chroma expansion field */
2104	BGRC_P_SET_FIELD_COMP( SRC_SURFACE_FORMAT_DEF_3, CHROMA_FILTER,
2105	REPLICATE, FILTER, eChromaExpansion == BGRC_ChromaExpansion_eReplicate );
2106
2107	/* set register load field */
2108	if( BGRC_P_REGISTER_CHANGED( SRC_SURFACE_FORMAT_DEF_3 ) )
2109	BGRC_P_LOAD_LIST_GRP( LIST_PACKET_HEADER_1, SRC_FEEDER_GRP_CNTRL, GRP_ENABLE, &hGrc->CurrentState, hGrc->aulCurrentRegs );
2110
2111	BDBG_LEAVE(BGRC_Source_SetChromaExpansion);
2112	return BERR_SUCCESS;
2113	}
2114
2115	/***************************************************************************/
2116	BERR_Code BGRC_Source_SetZeroPad(
2117	BGRC_Handle hGrc,
2118	bool bEnableZeroPad )
2119	{
2120	BDBG_ENTER(BGRC_Source_SetZeroPad);
2121	BDBG_ASSERT( hGrc );
2122
2123	/* set zero pad field */
2124	BGRC_P_SET_FIELD_COMP( SRC_SURFACE_FORMAT_DEF_3, ZERO_PAD,
2125	ZERO_PAD, REPLICATE, bEnableZeroPad );
2126
2127	/* set register load field */
2128	if( BGRC_P_REGISTER_CHANGED( SRC_SURFACE_FORMAT_DEF_3 ) )
2129	BGRC_P_LOAD_LIST_GRP( LIST_PACKET_HEADER_1, SRC_FEEDER_GRP_CNTRL, GRP_ENABLE, &hGrc->CurrentState, hGrc->aulCurrentRegs );
2130
2131	BDBG_LEAVE(BGRC_Source_SetZeroPad);
2132	return BERR_SUCCESS;
2133	}
2134
2135	/***************************************************************************/
2136	BERR_Code BGRC_Source_SetColorKey(
2137	BGRC_Handle hGrc,
2138	uint32_t ulMin,
2139	uint32_t ulMax,
2140	uint32_t ulMask,
2141	uint32_t ulReplacement,
2142	uint32_t ulReplacementMask,
2143	bool bExclusive )
2144	{
2145	BDBG_ENTER(BGRC_Source_SetColorKey);
2146	BDBG_ASSERT( hGrc );
2147
2148	/* set color key fields */
2149	BGRC_P_SET_FIELD_COMP( BLIT_HEADER, SRC_COLOR_KEY_COMPARE, EXCUSIVE, INCLUSIVE, bExclusive );
2150	BGRC_P_SET_FIELD_FULL( SRC_COLOR_KEY_LOW, ulMin );
2151	BGRC_P_SET_FIELD_FULL( SRC_COLOR_KEY_HIGH, ulMax );
2152	BGRC_P_SET_FIELD_FULL( SRC_COLOR_KEY_MASK, ulMask );
2153	BGRC_P_SET_FIELD_FULL( SRC_COLOR_KEY_REPLACEMENT, ulReplacement );
2154	BGRC_P_SET_FIELD_FULL( SRC_COLOR_KEY_REPLACEMENT_MASK, ulReplacementMask );
2155
2156	/* set register load fields */
2157	if( BGRC_P_REGISTER_CHANGED( BLIT_HEADER ) )
2158	BGRC_P_LOAD_LIST_GRP( LIST_PACKET_HEADER_1, BLIT_GRP_CNTRL, GRP_ENABLE, &hGrc->CurrentState, hGrc->aulCurrentRegs );
2159
2160	if( BGRC_P_REGISTER_CHANGED( SRC_COLOR_KEY_LOW ) \|\|
2161	BGRC_P_REGISTER_CHANGED( SRC_COLOR_KEY_HIGH ) \|\|
2162	BGRC_P_REGISTER_CHANGED( SRC_COLOR_KEY_MASK ) \|\|
2163	BGRC_P_REGISTER_CHANGED( SRC_COLOR_KEY_REPLACEMENT ) \|\|
2164	BGRC_P_REGISTER_CHANGED( SRC_COLOR_KEY_REPLACEMENT_MASK ) )
2165	BGRC_P_LOAD_LIST_GRP( LIST_PACKET_HEADER_1, SRC_COLOR_KEY_GRP_CNTRL, GRP_ENABLE, &hGrc->CurrentState, hGrc->aulCurrentRegs );
2166
2167	BDBG_LEAVE(BGRC_Source_SetColorKey);
2168	return BERR_SUCCESS;
2169	}
2170
2171	/***************************************************************************/
2172	BERR_Code BGRC_Source_ToggleColorKey(
2173	BGRC_Handle hGrc,
2174	bool bEnable )
2175	{
2176	BDBG_ENTER(BGRC_Source_ToggleColorKey);
2177	BDBG_ASSERT( hGrc );
2178
2179	/* set color key enable field */
2180	BGRC_P_SET_FIELD_COMP( BLIT_HEADER, SRC_COLOR_KEY_ENABLE,
2181	ENABLE, DISABLE, bEnable );
2182
2183	/* set register load field */
2184	if( BGRC_P_REGISTER_CHANGED( BLIT_HEADER ) )
2185	BGRC_P_LOAD_LIST_GRP( LIST_PACKET_HEADER_1, BLIT_GRP_CNTRL, GRP_ENABLE, &hGrc->CurrentState, hGrc->aulCurrentRegs );
2186
2187	BDBG_LEAVE(BGRC_Source_ToggleColorKey);
2188	return BERR_SUCCESS;
2189	}
2190
2191	/***************************************************************************/
2192	BERR_Code BGRC_Source_SetColorMatrix5x4(
2193	BGRC_Handle hGrc,
2194	const int32_t ai32_Matrix[],
2195	uint32_t ulShift )
2196	{
2197	BDBG_ENTER(BGRC_Source_SetColorMatrix5x4);
2198	BDBG_ASSERT( hGrc );
2199
2200	/* set color matrix fields */
2201	BGRC_P_SET_FIELD_MATRIX_ROW( SRC, 0, ai32_Matrix, 0, ulShift );
2202	BGRC_P_SET_FIELD_MATRIX_ROW( SRC, 1, ai32_Matrix, 5, ulShift );
2203	BGRC_P_SET_FIELD_MATRIX_ROW( SRC, 2, ai32_Matrix, 10, ulShift );
2204	BGRC_P_SET_FIELD_MATRIX_ROW( SRC, 3, ai32_Matrix, 15, ulShift );
2205
2206	/* set register load field */
2207	if( BGRC_P_REGISTER_CHANGED( SRC_CM_C00_C01 ) \|\|
2208	BGRC_P_REGISTER_CHANGED( SRC_CM_C02_C03 ) \|\|
2209	BGRC_P_REGISTER_CHANGED( SRC_CM_C04 ) \|\|
2210	BGRC_P_REGISTER_CHANGED( SRC_CM_C10_C11 ) \|\|
2211	BGRC_P_REGISTER_CHANGED( SRC_CM_C12_C13 ) \|\|
2212	BGRC_P_REGISTER_CHANGED( SRC_CM_C14 ) \|\|
2213	BGRC_P_REGISTER_CHANGED( SRC_CM_C20_C21 ) \|\|
2214	BGRC_P_REGISTER_CHANGED( SRC_CM_C22_C23 ) \|\|
2215	BGRC_P_REGISTER_CHANGED( SRC_CM_C24 ) \|\|
2216	BGRC_P_REGISTER_CHANGED( SRC_CM_C30_C31 ) \|\|
2217	BGRC_P_REGISTER_CHANGED( SRC_CM_C32_C33 ) \|\|
2218	BGRC_P_REGISTER_CHANGED( SRC_CM_C34 ) )
2219	BGRC_P_LOAD_LIST_GRP( LIST_PACKET_HEADER_1, SRC_COLOR_MATRIX_GRP_CNTRL, GRP_ENABLE, &hGrc->CurrentState, hGrc->aulCurrentRegs );
2220
2221	BDBG_LEAVE(BGRC_Source_SetColorMatrix5x4);
2222	return BERR_SUCCESS;
2223	}
2224
2225	/***************************************************************************/
2226	BERR_Code BGRC_Source_ToggleColorMatrix(
2227	BGRC_Handle hGrc,
2228	bool bEnable )
2229	{
2230	BDBG_ENTER(BGRC_Source_ToggleColorMatrix);
2231	BDBG_ASSERT( hGrc );
2232
2233	/* set color matrix enable field */
2234	BGRC_P_SET_FIELD_COMP( BLIT_HEADER, SRC_COLOR_MATRIX_ENABLE,
2235	ENABLE, DISABLE, bEnable );
2236
2237	/* set register load field */
2238	if( BGRC_P_REGISTER_CHANGED( BLIT_HEADER ) )
2239	BGRC_P_LOAD_LIST_GRP( LIST_PACKET_HEADER_1, BLIT_GRP_CNTRL, GRP_ENABLE, &hGrc->CurrentState, hGrc->aulCurrentRegs );
2240
2241	BDBG_LEAVE(BGRC_Source_ToggleColorMatrix);
2242	return BERR_SUCCESS;
2243	}
2244
2245	/***************************************************************************/
2246	BERR_Code BGRC_Source_SetColorMatrixRounding(
2247	BGRC_Handle hGrc,
2248	BGRC_Rounding eMatrixRounding )
2249	{
2250	BDBG_ENTER(BGRC_Source_SetColorMatrixRounding);
2251	BDBG_ASSERT( hGrc );
2252
2253	/* set matrix rounding field */
2254	BGRC_P_SET_FIELD_COMP( BLIT_HEADER, SRC_COLOR_MATRIX_ROUNDING,
2255	TRUNCATE, NEAREST, eMatrixRounding == BGRC_Rounding_eTruncate );
2256
2257	/* set register load field */
2258	if( BGRC_P_REGISTER_CHANGED( BLIT_HEADER ) )
2259	BGRC_P_LOAD_LIST_GRP( LIST_PACKET_HEADER_1, BLIT_GRP_CNTRL, GRP_ENABLE, &hGrc->CurrentState, hGrc->aulCurrentRegs );
2260
2261	BDBG_LEAVE(BGRC_Source_SetColorMatrixRounding);
2262	return BERR_SUCCESS;
2263	}
2264
2265	/***************************************************************************/
2266	BERR_Code BGRC_Source_SetKeyMatrixOrder(
2267	BGRC_Handle hGrc,
2268	BGRC_KeyMatrixOrder eKeyMatrixOrder )
2269	{
2270	BDBG_ENTER(BGRC_Source_SetKeyMatrixOrder);
2271	BDBG_ASSERT( hGrc );
2272
2273	/* set colorkey/matrix order field */
2274	#if defined(BCHP_M2MC_BLIT_HEADER_CBAR_SRC_COLOR_KEY_THEN_MATRIX)
2275	BGRC_P_SET_FIELD_COMP( BLIT_HEADER, CBAR_SRC_COLOR, KEY_THEN_MATRIX,
2276	MATRIX_THEN_KEY, eKeyMatrixOrder == BGRC_KeyMatrixOrder_eKeyThenMatrix );
2277	#else
2278	BGRC_P_SET_FIELD_COMP( BLIT_HEADER, CBAR_SRC_COLOR, SCALE_THEN_KEY_THEN_MATRIX,
2279	SCALE_THEN_MATRIX_THEN_KEY, eKeyMatrixOrder == BGRC_KeyMatrixOrder_eKeyThenMatrix );
2280	#endif
2281
2282	/* set register load field */
2283	if( BGRC_P_REGISTER_CHANGED( BLIT_HEADER ) )
2284	BGRC_P_LOAD_LIST_GRP( LIST_PACKET_HEADER_1, BLIT_GRP_CNTRL, GRP_ENABLE, &hGrc->CurrentState, hGrc->aulCurrentRegs );
2285
2286	BDBG_LEAVE(BGRC_Source_SetKeyMatrixOrder);
2287	return BERR_SUCCESS;
2288	}
2289
2290	/***************************************************************************/
2291	BERR_Code BGRC_Source_SetKeyMatrixScaleOrder(
2292	BGRC_Handle hGrc,
2293	BGRC_KeyMatrixScaleOrder eKeyMatrixScaleOrder )
2294	{
2295	BDBG_ENTER(BGRC_Source_SetKeyMatrixScaleOrder);
2296	BDBG_ASSERT( hGrc );
2297
2298	/* set colorkey/matrix order field */
2299	#if defined(BCHP_M2MC_BLIT_HEADER_CBAR_SRC_COLOR_KEY_THEN_MATRIX)
2300	BGRC_P_SET_FIELD_COMP( BLIT_HEADER, CBAR_SRC_COLOR, KEY_THEN_MATRIX, MATRIX_THEN_KEY,
2301	(eKeyMatrixScaleOrder == BGRC_KeyMatrixScaleOrder_eScaleThenKeyThenMatrix) \|\|
2302	(eKeyMatrixScaleOrder == BGRC_KeyMatrixScaleOrder_eKeyThenMatrixThenScale) \|\|
2303	(eKeyMatrixScaleOrder == BGRC_KeyMatrixScaleOrder_eKeyThenScaleThenMatrix) );
2304	#else
2305	BGRC_P_SET_FIELD_DATA( BLIT_HEADER, CBAR_SRC_COLOR, eKeyMatrixScaleOrder );
2306	#endif
2307
2308	/* set register load field */
2309	if( BGRC_P_REGISTER_CHANGED( BLIT_HEADER ) )
2310	BGRC_P_LOAD_LIST_GRP( LIST_PACKET_HEADER_1, BLIT_GRP_CNTRL, GRP_ENABLE, &hGrc->CurrentState, hGrc->aulCurrentRegs );
2311
2312	BDBG_LEAVE(BGRC_Source_SetKeyMatrixScaleOrder);
2313	return BERR_SUCCESS;
2314	}
2315
2316	/***************************************************************************/
2317	BERR_Code BGRC_Source_SetColor(
2318	BGRC_Handle hGrc,
2319	uint32_t ulColor )
2320	{
2321	BDBG_ENTER(BGRC_Source_SetColor);
2322	BDBG_ASSERT( hGrc );
2323
2324	/* set single color field */
2325	BGRC_P_SET_FIELD_FULL( SRC_CONSTANT_COLOR, ulColor );
2326	BGRC_P_SET_FIELD_DATA( SRC_W_ALPHA, W0_ALPHA, BPXL_GET_COMPONENT( BPXL_eA8_R8_G8_B8, ulColor, 3 ) );
2327
2328	/* set register load field */
2329	if( BGRC_P_REGISTER_CHANGED( SRC_CONSTANT_COLOR ) \|\|
2330	BGRC_P_REGISTER_CHANGED( SRC_W_ALPHA ) )
2331	BGRC_P_LOAD_LIST_GRP( LIST_PACKET_HEADER_1, SRC_FEEDER_GRP_CNTRL, GRP_ENABLE, &hGrc->CurrentState, hGrc->aulCurrentRegs );
2332
2333	BDBG_LEAVE(BGRC_Source_SetColor);
2334	return BERR_SUCCESS;
2335	}
2336
2337	/***************************************************************************/
2338	BERR_Code BGRC_Source_SetRectangle(
2339	BGRC_Handle hGrc,
2340	uint32_t ulLeft,
2341	uint32_t ulTop,
2342	uint32_t ulWidth,
2343	uint32_t ulHeight )
2344	{
2345	BDBG_ENTER(BGRC_Source_SetRectangle);
2346	BDBG_ASSERT( hGrc );
2347
2348	/* validate dimensions */
2349	if( !BGRC_P_VALIDATE_SURFACE_DIMENSIONS( ulLeft, ulTop, ulWidth, ulHeight ) )
2350	return BERR_TRACE(BGRC_ERR_SOURCE_DIMENSIONS_INVALID);
2351
2352	if( (ulLeft > BGRC_P_SURFACE_RECT_SIZE_MAX) \|\| (ulTop > BGRC_P_SURFACE_RECT_SIZE_MAX) \|\|
2353	(ulWidth > BGRC_P_SURFACE_RECT_SIZE_MAX) \|\| (ulHeight > BGRC_P_SURFACE_RECT_SIZE_MAX) )
2354	return BERR_TRACE(BGRC_ERR_SOURCE_DIMENSIONS_INVALID);
2355
2356	/* store width and height */
2357	hGrc->CurrentState.SrcRect.ulX = ulLeft;
2358	hGrc->CurrentState.SrcRect.ulY = ulTop;
2359	hGrc->CurrentState.SrcRect.ulWidth = ulWidth;
2360	hGrc->CurrentState.SrcRect.ulHeight = ulHeight;
2361
2362	BDBG_LEAVE(BGRC_Source_SetRectangle);
2363	return BERR_SUCCESS;
2364	}
2365
2366	/***************************************************************************/
2367	BERR_Code BGRC_Source_SetFilterCoeffs(
2368	BGRC_Handle hGrc,
2369	BGRC_FilterCoeffs eHorizontalCoeffs,
2370	BGRC_FilterCoeffs eVerticalCoeffs )
2371	{
2372	BDBG_ENTER(BGRC_Source_SetFilterCoeffs);
2373	BDBG_ASSERT( hGrc );
2374
2375	/* set filter coefficients */
2376	hGrc->CurrentState.eHorzCoeffs = eHorizontalCoeffs;
2377	hGrc->CurrentState.eVertCoeffs = eVerticalCoeffs;
2378
2379	BDBG_LEAVE(BGRC_Source_SetFilterCoeffs);
2380	return BERR_SUCCESS;
2381	}
2382
2383	/***************************************************************************/
2384	BERR_Code BGRC_Source_ToggleFilter(
2385	BGRC_Handle hGrc,
2386	bool bEnableHorizontalFilter,
2387	bool bEnableVerticalFilter )
2388	{
2389	BDBG_ENTER(BGRC_Source_ToggleFilter);
2390	BDBG_ASSERT( hGrc );
2391
2392	/* set filter enables */
2393	hGrc->CurrentState.bHorzFilter = bEnableHorizontalFilter;
2394	hGrc->CurrentState.bVertFilter = bEnableVerticalFilter;
2395
2396	BDBG_LEAVE(BGRC_Source_ToggleFilter);
2397	return BERR_SUCCESS;
2398	}
2399
2400	/***************************************************************************/
2401	BERR_Code BGRC_Source_SetFilterPhaseAdjustment(
2402	BGRC_Handle hGrc,
2403	int32_t iHorizontalPhase,
2404	int32_t iVerticalPhase,
2405	uint32_t ulShift )
2406	{
2407	BDBG_ENTER(BGRC_Source_SetFilterPhaseAdjustment);
2408	BDBG_ASSERT( hGrc );
2409
2410	/* set filter phase */
2411	hGrc->CurrentState.iHorzPhaseAdj = iHorizontalPhase;
2412	hGrc->CurrentState.iVertPhaseAdj = iVerticalPhase;
2413	hGrc->CurrentState.ulPhaseShift = ulShift;
2414
2415	BDBG_LEAVE(BGRC_Source_SetFilterPhaseAdjustment);
2416	return BERR_SUCCESS;
2417	}
2418
2419	/***************************************************************************/
2420	BERR_Code BGRC_Source_SetFixedScaleFactor(
2421	BGRC_Handle hGrc,
2422	uint32_t ulHorizontalNumerator,
2423	uint32_t ulHorizontalDenominator,
2424	uint32_t ulVerticalNumerator,
2425	uint32_t ulVerticalDenominator )
2426	{
2427	BDBG_ENTER(BGRC_Source_SetFixedScaleFactor);
2428	BDBG_ASSERT( hGrc );
2429
2430	/* set scale factor */
2431	hGrc->CurrentState.ulHorzScalerNum = ulHorizontalNumerator;
2432	hGrc->CurrentState.ulHorzScalerDen = ulHorizontalDenominator;
2433	hGrc->CurrentState.ulVertScalerNum = ulVerticalNumerator;
2434	hGrc->CurrentState.ulVertScalerDen = ulVerticalDenominator;
2435
2436	BDBG_LEAVE(BGRC_Source_SetFixedScaleFactor);
2437	return BERR_SUCCESS;
2438	}
2439
2440	/***************************************************************************/
2441	BERR_Code BGRC_Source_SetScaleAlphaPreMultiply(
2442	BGRC_Handle hGrc,
2443	bool bAlphaPreMultiply )
2444	{
2445	BDBG_ENTER(BGRC_Source_SetScaleAlphaPreMultiply);
2446	BDBG_ASSERT( hGrc );
2447
2448	#if defined(BCHP_M2MC_SCALER_CTRL_ALPHA_PRE_MULTIPLY_MASK)
2449	BGRC_P_SET_FIELD_COMP( SCALER_CTRL, ALPHA_PRE_MULTIPLY, ENABLE, DISABLE, bAlphaPreMultiply );
2450
2451	if( BGRC_P_REGISTER_CHANGED( SCALER_CTRL ) )
2452	BGRC_P_LOAD_LIST_GRP( LIST_PACKET_HEADER_1, SCALE_PARAM_GRP_CNTRL, GRP_ENABLE, &hGrc->CurrentState, hGrc->aulCurrentRegs );
2453
2454	BDBG_LEAVE(BGRC_Source_SetScaleAlphaPreMultiply);
2455	return BERR_SUCCESS;
2456	#else
2457	BSTD_UNUSED( hGrc );
2458	BSTD_UNUSED( bAlphaPreMultiply );
2459	BDBG_LEAVE(BGRC_Source_SetScaleAlphaPreMultiply);
2460	return BERR_TRACE(BERR_NOT_SUPPORTED);
2461	#endif
2462	}
2463
2464	/***************************************************************************/
2465	BERR_Code BGRC_Source_SetScaleAlphaAdjust(
2466	BGRC_Handle hGrc,
2467	bool bAdjustAlpha )
2468	{
2469	BDBG_ENTER(BGRC_Source_SetScaleAlphaAdjust);
2470	BDBG_ASSERT( hGrc );
2471
2472	#if defined(BCHP_M2MC_SCALER_CTRL_ALPHA_ADJUST_ENABLE)
2473	BGRC_P_SET_FIELD_COMP( SCALER_CTRL, ALPHA_ADJUST, ENABLE, DISABLE, bAdjustAlpha );
2474	#else
2475	BGRC_P_SET_FIELD_COMP( SCALER_CTRL, OFFSET_ADJUST, ENABLE, DISABLE, bAdjustAlpha );
2476	#endif
2477
2478	if( BGRC_P_REGISTER_CHANGED( SCALER_CTRL ) )
2479	BGRC_P_LOAD_LIST_GRP( LIST_PACKET_HEADER_1, SCALE_PARAM_GRP_CNTRL, GRP_ENABLE, &hGrc->CurrentState, hGrc->aulCurrentRegs );
2480
2481	BDBG_LEAVE(BGRC_Source_SetScaleAlphaAdjust);
2482	return BERR_SUCCESS;
2483	}
2484
2485	/***************************************************************************/
2486	BERR_Code BGRC_Source_SetScaleRounding(
2487	BGRC_Handle hGrc,
2488	BGRC_Rounding eScaleRounding )
2489	{
2490	BDBG_ENTER(BGRC_Source_SetScaleRounding);
2491	BDBG_ASSERT( hGrc );
2492
2493	/* set scale rounding field */
2494	BGRC_P_SET_FIELD_COMP( SCALER_CTRL, ROUNDING_MODE,
2495	TRUNCATE, NEAREST, eScaleRounding == BGRC_Rounding_eTruncate );
2496
2497	/* set register load field */
2498	if( BGRC_P_REGISTER_CHANGED( SCALER_CTRL ) )
2499	BGRC_P_LOAD_LIST_GRP( LIST_PACKET_HEADER_1, SCALE_PARAM_GRP_CNTRL, GRP_ENABLE, &hGrc->CurrentState, hGrc->aulCurrentRegs );
2500
2501	BDBG_LEAVE(BGRC_Source_SetScaleRounding);
2502	return BERR_SUCCESS;
2503	}
2504
2505	/***************************************************************************/
2506	BERR_Code BGRC_Source_SetScaleEdgeCondition(
2507	BGRC_Handle hGrc,
2508	BGRC_EdgeCondition eEdgeCondition )
2509	{
2510	BDBG_ENTER(BGRC_Source_SetScaleEdgeCondition);
2511	BDBG_ASSERT( hGrc );
2512
2513	#if defined(BCHP_M2MC_SCALER_CTRL_EDGE_CONDITION_MASK)
2514	BGRC_P_SET_FIELD_COMP( SCALER_CTRL, EDGE_CONDITION, REPLICATE, MIRROR, eEdgeCondition == BGRC_EdgeCondition_eReplicateLast );
2515
2516	if( BGRC_P_REGISTER_CHANGED( SCALER_CTRL ) )
2517	BGRC_P_LOAD_LIST_GRP( LIST_PACKET_HEADER_1, SCALE_PARAM_GRP_CNTRL, GRP_ENABLE, &hGrc->CurrentState, hGrc->aulCurrentRegs );
2518
2519	BDBG_LEAVE(BGRC_Source_SetScaleEdgeCondition);
2520	return BERR_SUCCESS;
2521	#else
2522	BSTD_UNUSED( hGrc );
2523	BSTD_UNUSED( eEdgeCondition );
2524	BDBG_LEAVE(BGRC_Source_SetScaleEdgeCondition);
2525	return BERR_TRACE(BERR_NOT_SUPPORTED);
2526	#endif
2527	}
2528
2529	/***************************************************************************/
2530	BERR_Code BGRC_Source_SetAlphaPreMultiply(
2531	BGRC_Handle hGrc,
2532	bool bAlphaPreMultiply )
2533	{
2534	BDBG_ENTER(BGRC_Source_SetAlphaPreMultiply);
2535	BDBG_ASSERT( hGrc );
2536
2537	#if defined(BCHP_M2MC_SCALER_CTRL_ALPHA_PRE_MULTIPLY_ENABLE_MASK)
2538	BGRC_P_SET_FIELD_COMP( SCALER_CTRL, ALPHA_PRE_MULTIPLY_ENABLE, ENABLE, DISABLE, bAlphaPreMultiply );
2539
2540	if( BGRC_P_REGISTER_CHANGED( SCALER_CTRL ) )
2541	BGRC_P_LOAD_LIST_GRP( LIST_PACKET_HEADER_1, SCALE_PARAM_GRP_CNTRL, GRP_ENABLE, &hGrc->CurrentState, hGrc->aulCurrentRegs );
2542
2543	BDBG_LEAVE(BGRC_Source_SetAlphaPreMultiply);
2544	return BERR_SUCCESS;
2545	#else
2546	BSTD_UNUSED( hGrc );
2547	BSTD_UNUSED( bAlphaPreMultiply );
2548
2549	BDBG_LEAVE(BGRC_Source_SetAlphaPreMultiply);
2550	return BERR_TRACE(BERR_NOT_SUPPORTED);
2551	#endif
2552	}
2553
2554	/***************************************************************************/
2555	BERR_Code BGRC_Source_SetAlphaPreMultiplyOffset(
2556	BGRC_Handle hGrc,
2557	bool bOffset )
2558	{
2559	BDBG_ENTER(BGRC_Source_SetAlphaPreMultiplyOffset);
2560	BDBG_ASSERT( hGrc );
2561
2562	#if defined(BCHP_M2MC_SCALER_CTRL_ALPHA_PRE_MULTIPLY_OFFSET_EN_MASK)
2563	BGRC_P_SET_FIELD_COMP( SCALER_CTRL, ALPHA_PRE_MULTIPLY_OFFSET_EN, ENABLE, DISABLE, bOffset );
2564
2565	if( BGRC_P_REGISTER_CHANGED( SCALER_CTRL ) )
2566	BGRC_P_LOAD_LIST_GRP( LIST_PACKET_HEADER_1, SCALE_PARAM_GRP_CNTRL, GRP_ENABLE, &hGrc->CurrentState, hGrc->aulCurrentRegs );
2567
2568	BDBG_LEAVE(BGRC_Source_SetAlphaPreMultiplyOffset);
2569	return BERR_SUCCESS;
2570	#else
2571	BSTD_UNUSED( hGrc );
2572	BSTD_UNUSED( bOffset );
2573	BDBG_LEAVE(BGRC_Source_SetAlphaPreMultiplyOffset);
2574	return BERR_TRACE(BERR_NOT_SUPPORTED);
2575	#endif
2576	}
2577
2578	/***************************************************************************/
2579	BERR_Code BGRC_Source_SetMacroBlock(
2580	BGRC_Handle hGrc,
2581	BGRC_MacroBlockRange eRangeY,
2582	BGRC_MacroBlockRange eRangeC,
2583	uint8_t ucScaleFactorY,
2584	uint8_t ucScaleFactorC )
2585	{
2586	BDBG_ENTER(BGRC_Source_SetMacroBlock);
2587	BDBG_ASSERT( hGrc );
2588
2589	#if defined(BCHP_M2MC_SRC_SURFACE_0_FORMAT_DEF_3_RANGE_EXP_MAP_SCALE_FACTOR_Y_MASK)
2590	if( eRangeY == BGRC_MacroBlockRange_None )
2591	hGrc->CurrentState.ulMacroBlockRangeY = BGRC_P_MACROBLOCK_RANGE_NONE;
2592	else if( eRangeY == BGRC_MacroBlockRange_Expansion )
2593	hGrc->CurrentState.ulMacroBlockRangeY = BGRC_P_MACROBLOCK_RANGE_EXPANSION;
2594	else if( eRangeY == BGRC_MacroBlockRange_Remapping )
2595	hGrc->CurrentState.ulMacroBlockRangeY = BGRC_P_MACROBLOCK_RANGE_REMAPPING + ucScaleFactorY;
2596
2597	BGRC_P_SET_FIELD_DATA( SRC_SURFACE_0_FORMAT_DEF_3, RANGE_EXP_MAP_SCALE_FACTOR_Y, hGrc->CurrentState.ulMacroBlockRangeY );
2598	BGRC_P_SET_FIELD_DATA( SRC_SURFACE_0_FORMAT_DEF_3, RANGE_EXP_MAP_SCALE_FACTOR_C, BGRC_P_MACROBLOCK_RANGE_NONE );
2599
2600	if( eRangeC == BGRC_MacroBlockRange_None )
2601	hGrc->CurrentState.ulMacroBlockRangeC = BGRC_P_MACROBLOCK_RANGE_NONE;
2602	else if( eRangeC == BGRC_MacroBlockRange_Expansion )
2603	hGrc->CurrentState.ulMacroBlockRangeC = BGRC_P_MACROBLOCK_RANGE_EXPANSION;
2604	else if( eRangeC == BGRC_MacroBlockRange_Remapping )
2605	hGrc->CurrentState.ulMacroBlockRangeC = BGRC_P_MACROBLOCK_RANGE_REMAPPING + ucScaleFactorC;
2606
2607	BGRC_P_SET_FIELD_DATA( SRC_SURFACE_1_FORMAT_DEF_3, RANGE_EXP_MAP_SCALE_FACTOR_Y, BGRC_P_MACROBLOCK_RANGE_NONE );
2608	BGRC_P_SET_FIELD_DATA( SRC_SURFACE_1_FORMAT_DEF_3, RANGE_EXP_MAP_SCALE_FACTOR_C, hGrc->CurrentState.ulMacroBlockRangeC );
2609	#else
2610	BSTD_UNUSED( hGrc );
2611	BSTD_UNUSED( eRangeY );
2612	BSTD_UNUSED( eRangeC );
2613	BSTD_UNUSED( ucScaleFactorY );
2614	BSTD_UNUSED( ucScaleFactorC );
2615	BDBG_LEAVE(BGRC_Source_SetMacroBlock);
2616	return BERR_TRACE(BERR_NOT_SUPPORTED);
2617	#endif
2618
2619	BDBG_LEAVE(BGRC_Source_SetMacroBlock);
2620	return BERR_SUCCESS;
2621	}
2622
2623	/***************************************************************************/
2624	BERR_Code BGRC_Source_SetMacroBlock_StripWidth(
2625	BGRC_Handle hGrc,
2626	uint32_t ulStripWidth )
2627	{
2628	BDBG_ENTER(BGRC_Source_SetMacroBlock_StripWidth);
2629	BDBG_ASSERT( hGrc );
2630
2631	#if defined(BCHP_M2MC_SRC_SURFACE_0_FORMAT_DEF_3_RANGE_EXP_MAP_SCALE_FACTOR_Y_MASK)
2632
2633	#if defined(BCHP_M2MC_BLIT_SRC_STRIPE_HEIGHT_WIDTH_0_STRIPE_WIDTH_MASK)
2634	if( (ulStripWidth != BGRC_P_YCbCr420_STRIP_WIDTH) && (ulStripWidth != BGRC_P_YCbCr420_STRIP_WIDTH * 2) )
2635	return BERR_TRACE(BERR_INVALID_PARAMETER);
2636	#else
2637	if( ulStripWidth != BGRC_P_YCbCr420_STRIP_WIDTH )
2638	return BERR_TRACE(BERR_INVALID_PARAMETER);
2639	#endif
2640
2641	hGrc->CurrentState.ulMacroBlockStripWidth = ulStripWidth;
2642
2643	#if defined(BCHP_M2MC_BLIT_SRC_STRIPE_HEIGHT_WIDTH_0_STRIPE_WIDTH_MASK)
2644	BGRC_P_SET_FIELD_DATA( BLIT_SRC_STRIPE_HEIGHT_WIDTH_0, STRIPE_WIDTH,
2645	(hGrc->CurrentState.ulMacroBlockStripWidth == BGRC_P_YCbCr420_STRIP_WIDTH) ? 0 : 1 );
2646	BGRC_P_SET_FIELD_DATA( BLIT_SRC_STRIPE_HEIGHT_WIDTH_1, STRIPE_WIDTH,
2647	(hGrc->CurrentState.ulMacroBlockStripWidth == BGRC_P_YCbCr420_STRIP_WIDTH) ? 0 : 1 );
2648
2649	if( BGRC_P_REGISTER_CHANGED( BLIT_SRC_STRIPE_HEIGHT_WIDTH_0 ) \|\|
2650	BGRC_P_REGISTER_CHANGED( BLIT_SRC_STRIPE_HEIGHT_WIDTH_1 ) )
2651	BGRC_P_LOAD_LIST_GRP( LIST_PACKET_HEADER_1, SCALE_PARAM_GRP_CNTRL, GRP_ENABLE, &hGrc->CurrentState, hGrc->aulCurrentRegs );
2652	#endif
2653
2654	#else
2655	BSTD_UNUSED( hGrc );
2656	BSTD_UNUSED( ulStripWidth );
2657	BDBG_LEAVE(BGRC_Source_SetMacroBlock_StripWidth);
2658	return BERR_TRACE(BERR_NOT_SUPPORTED);
2659	#endif
2660
2661	BDBG_LEAVE(BGRC_Source_SetMacroBlock_StripWidth);
2662	return BERR_SUCCESS;
2663	}
2664
2665	/***************************************************************************/
2666	BERR_Code BGRC_Source_SetMacroBlock_LinearFormat(
2667	BGRC_Handle hGrc,
2668	bool bLinearFormat )
2669	{
2670	BDBG_ENTER(BGRC_Source_SetMacroBlock_LinearFormat);
2671	BDBG_ASSERT( hGrc );
2672
2673	#if defined(BCHP_M2MC_SRC_SURFACE_1_FORMAT_DEF_1)
2674	hGrc->CurrentState.bMacroBlockLinear = bLinearFormat;
2675	#else
2676	BSTD_UNUSED( hGrc );
2677	BSTD_UNUSED( bLinearFormat );
2678	BDBG_LEAVE(BGRC_Source_SetMacroBlock_LinearFormat);
2679	return BERR_TRACE(BERR_NOT_SUPPORTED);
2680	#endif
2681
2682	BDBG_LEAVE(BGRC_Source_SetMacroBlock_LinearFormat);
2683	return BERR_SUCCESS;
2684	}
2685
2686	/***************************************************************************/
2687	BERR_Code BGRC_Source_SetMacroBlock_Endian(
2688	BGRC_Handle hGrc,
2689	bool bBigEndian )
2690	{
2691	BDBG_ENTER(BGRC_Source_SetMacroBlock_Endian);
2692	BDBG_ASSERT( hGrc );
2693
2694	#if defined(BCHP_M2MC_SRC_SURFACE_1_FORMAT_DEF_1)
2695	hGrc->CurrentState.bMacroBlockBigEndian = bBigEndian;
2696	#else
2697	BSTD_UNUSED( hGrc );
2698	BSTD_UNUSED( bBigEndian );
2699	BDBG_LEAVE(BGRC_Source_SetMacroBlock_Endian);
2700	return BERR_TRACE(BERR_NOT_SUPPORTED);
2701	#endif
2702
2703	BDBG_LEAVE(BGRC_Source_SetMacroBlock_Endian);
2704	return BERR_SUCCESS;
2705	}
2706
2707	/***************************************************************************/
2708	BERR_Code BGRC_Source_SetDirection(
2709	BGRC_Handle hGrc,
2710	bool bRightToLeft,
2711	bool bBottomToTop )
2712	{
2713	BDBG_ENTER(BGRC_Source_SetDirection);
2714	BDBG_ASSERT( hGrc );
2715
2716	hGrc->CurrentState.bSrcRightToLeft = bRightToLeft;
2717	hGrc->CurrentState.bSrcBottomToTop = bBottomToTop;
2718
2719	BDBG_LEAVE(BGRC_Source_SetDirection);
2720	return BERR_SUCCESS;
2721	}
2722
2723	/***************************************************************************/
2724	BERR_Code BGRC_Source_ResetState(
2725	BGRC_Handle hGrc )
2726	{
2727	BDBG_ENTER(BGRC_Source_ResetState);
2728	BDBG_ASSERT( hGrc );
2729
2730	/* copy default state to current state */
2731	BGRC_P_Source_CopyState( &hGrc->CurrentState, &hGrc->DefaultState,
2732	hGrc->aulCurrentRegs, hGrc->aulDefaultRegs );
2733
2734	BDBG_LEAVE(BGRC_Source_ResetState);
2735	return BERR_SUCCESS;
2736	}
2737
2738	/***************************************************************************/
2739	BERR_Code BGRC_Source_SetDefault(
2740	BGRC_Handle hGrc )
2741	{
2742	BDBG_ENTER(BGRC_Source_SetDefault);
2743	BDBG_ASSERT( hGrc );
2744
2745	/* copy current state to default state */
2746	BGRC_P_Source_CopyState( &hGrc->DefaultState, &hGrc->CurrentState,
2747	hGrc->aulDefaultRegs, hGrc->aulCurrentRegs );
2748
2749	BDBG_LEAVE(BGRC_Source_SetDefault);
2750	return BERR_SUCCESS;
2751	}
2752
2753	/***************************************************************************/
2754	BERR_Code BGRC_Destination_SetSurface(
2755	BGRC_Handle hGrc,
2756	BSUR_Surface_Handle hSurface )
2757	{
2758	BGRC_P_State *pState;
2759	BGRC_P_Surface Surface;
2760	bool bSurfaceChanged = false;
2761
2762	BDBG_ENTER(BGRC_Destination_SetSurface);
2763	BDBG_ASSERT( hGrc );
2764
2765	pState = &hGrc->CurrentState;
2766
2767	/* get surface data */
2768	BGRC_P_GET_SURFACE_DATA( hSurface, Surface, pState->DstSurface );
2769
2770	/* check if surface is changing */
2771	if( hGrc->bUninitialized \|\| bSurfaceChanged )
2772	{
2773	/* validate surface format */
2774	if( hSurface && BPXL_IS_DEPTH_FORMAT(Surface.eFormat) )
2775	return BERR_TRACE(BERR_INVALID_PARAMETER);
2776
2777	if( hSurface && (BPXL_IS_YCbCr444_10BIT_FORMAT(Surface.eFormat) \|\| BPXL_IS_YCbCr422_10BIT_FORMAT(Surface.eFormat)) )
2778	return BERR_TRACE(BERR_INVALID_PARAMETER);
2779
2780	/* set register load field */
2781	BGRC_P_LOAD_LIST_GRP( LIST_PACKET_HEADER_1, DST_FEEDER_GRP_CNTRL, GRP_ENABLE, pState, hGrc->aulCurrentRegs );
2782
2783	/* set surface fields */
2784	BGRC_P_SET_FIELD_COMP( DEST_FEEDER_ENABLE, ENABLE, ENABLE, DISABLE, hSurface );
2785	BGRC_P_SET_FIELD_DATA( DEST_SURFACE_ADDR_0, ADDR, Surface.ulOffset );
2786	BGRC_P_SET_FIELD_DATA( DEST_SURFACE_STRIDE_0, STRIDE, Surface.ulPitch );
2787	BGRC_P_SET_FIELD_FORMAT( DEST, FORMAT_TYPE, Surface.eFormat, pState->DstAlphaSurface.hSurface, pState->bDstPaletteBypass );
2788	BGRC_P_SET_FIELD_CHANNELS( DEST, Surface.eFormat, hSurface );
2789
2790	BGRC_P_SET_FIELD_COMP_DATA( DEST_SURFACE_FORMAT_DEF_3, CH0_DISABLE, 0, 1, hSurface && BPXL_COMPONENT_SIZE(Surface.eFormat, 0) );
2791	BGRC_P_SET_FIELD_COMP_DATA( DEST_SURFACE_FORMAT_DEF_3, CH1_DISABLE, 0, 1, hSurface && BPXL_COMPONENT_SIZE(Surface.eFormat, 1) );
2792	BGRC_P_SET_FIELD_COMP_DATA( DEST_SURFACE_FORMAT_DEF_3, CH2_DISABLE, 0, 1, hSurface && BPXL_COMPONENT_SIZE(Surface.eFormat, 2) );
2793	BGRC_P_SET_FIELD_COMP_DATA( DEST_SURFACE_FORMAT_DEF_3, CH3_DISABLE, 0, 1, hSurface && BPXL_COMPONENT_SIZE(Surface.eFormat, 3) );
2794
2795	/* store surface data */
2796	BKNI_Memcpy( &pState->DstSurface, &Surface, sizeof (BGRC_P_Surface) );
2797	}
2798
2799	BDBG_LEAVE(BGRC_Destination_SetSurface);
2800	return BERR_SUCCESS;
2801	}
2802
2803	/***************************************************************************/
2804	BERR_Code BGRC_Destination_SetAlphaSurface(
2805	BGRC_Handle hGrc,
2806	BSUR_Surface_Handle hSurface )
2807	{
2808	BGRC_P_State *pState;
2809	BGRC_P_Surface Surface;
2810	bool bSurfaceChanged = false;
2811
2812	BDBG_ENTER(BGRC_Destination_SetAlphaSurface);
2813	BDBG_ASSERT( hGrc );
2814
2815	pState = &hGrc->CurrentState;
2816
2817	/* get surface data */
2818	BGRC_P_GET_SURFACE_DATA( hSurface, Surface, pState->DstAlphaSurface );
2819
2820	/* check if surface is changing */
2821	if( hGrc->bUninitialized \|\| bSurfaceChanged )
2822	{
2823	/* validate surface format */
2824	if( hSurface && (Surface.eFormat != BPXL_eA1) && (Surface.eFormat != BPXL_eW1) )
2825	return BERR_TRACE(BERR_INVALID_PARAMETER);
2826
2827	/* set register load field */
2828	BGRC_P_LOAD_LIST_GRP( LIST_PACKET_HEADER_1, DST_FEEDER_GRP_CNTRL, GRP_ENABLE, pState, hGrc->aulCurrentRegs );
2829
2830	/* set surface fields */
2831	BGRC_P_SET_FIELD_DATA( DEST_SURFACE_ADDR_1, ADDR, Surface.ulOffset );
2832	BGRC_P_SET_FIELD_DATA( DEST_SURFACE_STRIDE_1, STRIDE, Surface.ulPitch );
2833
2834	/* set surface format field */
2835	if( pState->DstSurface.hSurface )
2836	BGRC_P_SET_FIELD_FORMAT( DEST, FORMAT_TYPE, pState->DstSurface.eFormat, hSurface, pState->bDstPaletteBypass );
2837
2838	/* store surface data */
2839	BKNI_Memcpy( &pState->DstAlphaSurface, &Surface, sizeof (BGRC_P_Surface) );
2840	}
2841
2842	BDBG_LEAVE(BGRC_Destination_SetAlphaSurface);
2843	return BERR_SUCCESS;
2844	}
2845
2846	/***************************************************************************/
2847	BERR_Code BGRC_Destination_TogglePaletteBypass(
2848	BGRC_Handle hGrc,
2849	bool bEnableBypass )
2850	{
2851	BGRC_P_State *pState;
2852
2853	BDBG_ENTER(BGRC_Destination_TogglePaletteBypass);
2854	BDBG_ASSERT( hGrc );
2855
2856	pState = &hGrc->CurrentState;
2857
2858	/* set palette bypass field */
2859	BGRC_P_SET_FIELD_COMP( DEST_SURFACE_FORMAT_DEF_3, PALETTE_BYPASS, DONT_LOOKUP, LOOKUP, bEnableBypass );
2860
2861	/* set format type due to bypass */
2862	if( pState->DstSurface.hSurface )
2863	BGRC_P_SET_FIELD_FORMAT( DEST, FORMAT_TYPE, pState->DstSurface.eFormat, pState->DstAlphaSurface.hSurface, bEnableBypass );
2864
2865	/* set register load field */
2866	if( BGRC_P_REGISTER_CHANGED( DEST_SURFACE_FORMAT_DEF_1 ) \|\|
2867	BGRC_P_REGISTER_CHANGED( DEST_SURFACE_FORMAT_DEF_3 ) )
2868	BGRC_P_LOAD_LIST_GRP( LIST_PACKET_HEADER_1, DST_FEEDER_GRP_CNTRL, GRP_ENABLE, pState, hGrc->aulCurrentRegs );
2869
2870	pState->bDstPaletteBypass = bEnableBypass;
2871
2872	BDBG_LEAVE(BGRC_Destination_TogglePaletteBypass);
2873	return BERR_SUCCESS;
2874	}
2875
2876	/***************************************************************************/
2877	BERR_Code BGRC_Destination_SetChromaExpansion(
2878	BGRC_Handle hGrc,
2879	BGRC_ChromaExpansion eChromaExpansion )
2880	{
2881	BDBG_ENTER(BGRC_Destination_SetChromaExpansion);
2882	BDBG_ASSERT( hGrc );
2883
2884	/* set chroma expansion field */
2885	BGRC_P_SET_FIELD_COMP( DEST_SURFACE_FORMAT_DEF_3, CHROMA_FILTER,
2886	REPLICATE, FILTER, eChromaExpansion == BGRC_ChromaExpansion_eReplicate );
2887
2888	/* set register load field */
2889	if( BGRC_P_REGISTER_CHANGED( DEST_SURFACE_FORMAT_DEF_3 ) )
2890	BGRC_P_LOAD_LIST_GRP( LIST_PACKET_HEADER_1, DST_FEEDER_GRP_CNTRL, GRP_ENABLE, &hGrc->CurrentState, hGrc->aulCurrentRegs );
2891
2892	BDBG_LEAVE(BGRC_Destination_SetChromaExpansion);
2893	return BERR_SUCCESS;
2894	}
2895
2896	/***************************************************************************/
2897	BERR_Code BGRC_Destination_SetZeroPad(
2898	BGRC_Handle hGrc,
2899	bool bEnableZeroPad )
2900	{
2901	BDBG_ENTER(BGRC_Destination_SetZeroPad);
2902	BDBG_ASSERT( hGrc );
2903
2904	/* set zero pad field */
2905	BGRC_P_SET_FIELD_COMP( DEST_SURFACE_FORMAT_DEF_3, ZERO_PAD,
2906	ZERO_PAD, REPLICATE, bEnableZeroPad );
2907
2908	/* set register load field */
2909	if( BGRC_P_REGISTER_CHANGED( DEST_SURFACE_FORMAT_DEF_3 ) )
2910	BGRC_P_LOAD_LIST_GRP( LIST_PACKET_HEADER_1, DST_FEEDER_GRP_CNTRL, GRP_ENABLE, &hGrc->CurrentState, hGrc->aulCurrentRegs );
2911
2912	BDBG_LEAVE(BGRC_Destination_SetZeroPad);
2913	return BERR_SUCCESS;
2914	}
2915
2916	/***************************************************************************/
2917	BERR_Code BGRC_Destination_SetColorKey(
2918	BGRC_Handle hGrc,
2919	uint32_t ulMin,
2920	uint32_t ulMax,
2921	uint32_t ulMask,
2922	uint32_t ulReplacement,
2923	uint32_t ulReplacementMask,
2924	bool bExclusive )
2925	{
2926	BDBG_ENTER(BGRC_Destination_SetColorKey);
2927	BDBG_ASSERT( hGrc );
2928
2929	/* set color key fields */
2930	BGRC_P_SET_FIELD_COMP( BLIT_HEADER, DEST_COLOR_KEY_COMPARE, EXCUSIVE, INCLUSIVE, bExclusive );
2931	BGRC_P_SET_FIELD_FULL( DEST_COLOR_KEY_LOW, ulMin );
2932	BGRC_P_SET_FIELD_FULL( DEST_COLOR_KEY_HIGH, ulMax );
2933	BGRC_P_SET_FIELD_FULL( DEST_COLOR_KEY_MASK, ulMask);
2934	BGRC_P_SET_FIELD_FULL( DEST_COLOR_KEY_REPLACEMENT, ulReplacement );
2935	BGRC_P_SET_FIELD_FULL( DEST_COLOR_KEY_REPLACEMENT_MASK, ulReplacementMask );
2936
2937	/* set register load fields */
2938	if( BGRC_P_REGISTER_CHANGED( BLIT_HEADER ) )
2939	BGRC_P_LOAD_LIST_GRP( LIST_PACKET_HEADER_1, BLIT_GRP_CNTRL, GRP_ENABLE, &hGrc->CurrentState, hGrc->aulCurrentRegs );
2940
2941	if( BGRC_P_REGISTER_CHANGED( DEST_COLOR_KEY_LOW ) \|\|
2942	BGRC_P_REGISTER_CHANGED( DEST_COLOR_KEY_HIGH ) \|\|
2943	BGRC_P_REGISTER_CHANGED( DEST_COLOR_KEY_MASK ) \|\|
2944	BGRC_P_REGISTER_CHANGED( DEST_COLOR_KEY_REPLACEMENT ) \|\|
2945	BGRC_P_REGISTER_CHANGED( DEST_COLOR_KEY_REPLACEMENT_MASK ) )
2946	BGRC_P_LOAD_LIST_GRP( LIST_PACKET_HEADER_1, DST_COLOR_KEY_GRP_CNTRL, GRP_ENABLE, &hGrc->CurrentState, hGrc->aulCurrentRegs );
2947
2948	BDBG_LEAVE(BGRC_Destination_SetColorKey);
2949	return BERR_SUCCESS;
2950	}
2951
2952	/***************************************************************************/
2953	BERR_Code BGRC_Destination_ToggleColorKey(
2954	BGRC_Handle hGrc,
2955	bool bEnable )
2956	{
2957	BDBG_ENTER(BGRC_Destination_ToggleColorKey);
2958	BDBG_ASSERT( hGrc );
2959
2960	/* set color key enable field */
2961	BGRC_P_SET_FIELD_COMP( BLIT_HEADER, DEST_COLOR_KEY_ENABLE,
2962	ENABLE, DISABLE, bEnable );
2963
2964	/* set register load field */
2965	if( BGRC_P_REGISTER_CHANGED( BLIT_HEADER ) )
2966	BGRC_P_LOAD_LIST_GRP( LIST_PACKET_HEADER_1, BLIT_GRP_CNTRL, GRP_ENABLE, &hGrc->CurrentState, hGrc->aulCurrentRegs );
2967
2968	BDBG_LEAVE(BGRC_Destination_ToggleColorKey);
2969	return BERR_SUCCESS;
2970	}
2971
2972	/***************************************************************************/
2973	BERR_Code BGRC_Destination_SetColorMatrix5x4(
2974	BGRC_Handle hGrc,
2975	const int32_t ai32_Matrix[],
2976	uint32_t ulShift )
2977	{
2978	BDBG_ENTER(BGRC_Destination_SetColorMatrix5x4);
2979	BDBG_ASSERT( hGrc );
2980	BDBG_ASSERT( ai32_Matrix );
2981
2982	#if ((BCHP_CHIP==7038) && (BCHP_VER < BCHP_VER_C0))
2983	/* set color matrix fields */
2984	BGRC_P_SET_FIELD_MATRIX_ROW( DEST, 0, ai32_Matrix, 0, ulShift );
2985	BGRC_P_SET_FIELD_MATRIX_ROW( DEST, 1, ai32_Matrix, 5, ulShift );
2986	BGRC_P_SET_FIELD_MATRIX_ROW( DEST, 2, ai32_Matrix, 10, ulShift );
2987	BGRC_P_SET_FIELD_MATRIX_ROW( DEST, 3, ai32_Matrix, 15, ulShift );
2988
2989	/* set register load field */
2990	if( BGRC_P_REGISTER_CHANGED( DEST_CM_C00_C01 ) \|\|
2991	BGRC_P_REGISTER_CHANGED( DEST_CM_C02_C03 ) \|\|
2992	BGRC_P_REGISTER_CHANGED( DEST_CM_C04 ) \|\|
2993	BGRC_P_REGISTER_CHANGED( DEST_CM_C10_C11 ) \|\|
2994	BGRC_P_REGISTER_CHANGED( DEST_CM_C12_C13 ) \|\|
2995	BGRC_P_REGISTER_CHANGED( DEST_CM_C14 ) \|\|
2996	BGRC_P_REGISTER_CHANGED( DEST_CM_C20_C21 ) \|\|
2997	BGRC_P_REGISTER_CHANGED( DEST_CM_C22_C23 ) \|\|
2998	BGRC_P_REGISTER_CHANGED( DEST_CM_C24 ) \|\|
2999	BGRC_P_REGISTER_CHANGED( DEST_CM_C30_C31 ) \|\|
3000	BGRC_P_REGISTER_CHANGED( DEST_CM_C32_C33 ) \|\|
3001	BGRC_P_REGISTER_CHANGED( DEST_CM_C34 ) )
3002	BGRC_P_LOAD_LIST_GRP( LIST_PACKET_HEADER_1, DST_COLOR_MATRIX_GRP_CNTRL, GRP_ENABLE, &hGrc->CurrentState, hGrc->aulCurrentRegs );
3003
3004	BDBG_LEAVE(BGRC_Destination_SetColorMatrix5x4);
3005	return BERR_SUCCESS;
3006	#else
3007	BSTD_UNUSED( hGrc );
3008	BSTD_UNUSED( ai32_Matrix );
3009	BSTD_UNUSED( ulShift );
3010	BDBG_LEAVE(BGRC_Destination_SetColorMatrix5x4);
3011	return BERR_TRACE(BERR_NOT_SUPPORTED);
3012	#endif
3013	}
3014
3015	/***************************************************************************/
3016	BERR_Code BGRC_Destination_ToggleColorMatrix(
3017	BGRC_Handle hGrc,
3018	bool bEnable )
3019	{
3020	BDBG_ENTER(BGRC_Destination_ToggleColorMatrix);
3021	BDBG_ASSERT( hGrc );
3022
3023	#if ((BCHP_CHIP==7038) && (BCHP_VER < BCHP_VER_C0))
3024	/* set color matrix enable field */
3025	BGRC_P_SET_FIELD_COMP( BLIT_HEADER, DEST_COLOR_MATRIX_ENABLE,
3026	ENABLE, DISABLE, bEnable );
3027
3028	/* set register load field */
3029	if( BGRC_P_REGISTER_CHANGED( BLIT_HEADER ) )
3030	BGRC_P_LOAD_LIST_GRP( LIST_PACKET_HEADER_1, BLIT_GRP_CNTRL, GRP_ENABLE, &hGrc->CurrentState, hGrc->aulCurrentRegs );
3031
3032	BDBG_LEAVE(BGRC_Destination_ToggleColorMatrix);
3033	return BERR_SUCCESS;
3034	#else
3035	BSTD_UNUSED( hGrc );
3036	BSTD_UNUSED( bEnable );
3037	BDBG_LEAVE(BGRC_Destination_ToggleColorMatrix);
3038	return BERR_TRACE(BERR_NOT_SUPPORTED);
3039	#endif
3040	}
3041
3042	/***************************************************************************/
3043	BERR_Code BGRC_Destination_SetColorMatrixRounding(
3044	BGRC_Handle hGrc,
3045	BGRC_Rounding eMatrixRounding )
3046	{
3047	BDBG_ENTER(BGRC_Destination_SetColorMatrixRounding);
3048	BDBG_ASSERT( hGrc );
3049
3050	#if ((BCHP_CHIP==7038) && (BCHP_VER < BCHP_VER_C0))
3051	/* set matrix rounding field */
3052	BGRC_P_SET_FIELD_COMP( BLIT_HEADER, DEST_COLOR_MATRIX_ROUNDING,
3053	TRUNCATE, NEAREST, eMatrixRounding == BGRC_Rounding_eTruncate );
3054
3055	/* set register load field */
3056	if( BGRC_P_REGISTER_CHANGED( BLIT_HEADER ) )
3057	BGRC_P_LOAD_LIST_GRP( LIST_PACKET_HEADER_1, BLIT_GRP_CNTRL, GRP_ENABLE, &hGrc->CurrentState, hGrc->aulCurrentRegs );
3058
3059	BDBG_LEAVE(BGRC_Destination_SetColorMatrixRounding);
3060	return BERR_SUCCESS;
3061	#else
3062	BSTD_UNUSED( hGrc );
3063	BSTD_UNUSED( eMatrixRounding );
3064	BDBG_LEAVE(BGRC_Destination_SetColorMatrixRounding);
3065	return BERR_TRACE(BERR_NOT_SUPPORTED);
3066	#endif
3067	}
3068
3069	/***************************************************************************/
3070	BERR_Code BGRC_Destination_SetKeyMatrixOrder(
3071	BGRC_Handle hGrc,
3072	BGRC_KeyMatrixOrder eKeyMatrixOrder )
3073	{
3074	BDBG_ENTER(BGRC_Destination_SetKeyMatrixOrder);
3075	BDBG_ASSERT( hGrc );
3076
3077	#if ((BCHP_CHIP==7038) && (BCHP_VER < BCHP_VER_C0))
3078	/* set colorkey/matrix order field */
3079	BGRC_P_SET_FIELD_COMP( BLIT_HEADER, CBAR_DEST_COLOR, KEY_THEN_MATRIX,
3080	MATRIX_THEN_KEY, eKeyMatrixOrder == BGRC_KeyMatrixOrder_eKeyThenMatrix );
3081
3082	/* set register load field */
3083	if( BGRC_P_REGISTER_CHANGED( BLIT_HEADER ) )
3084	BGRC_P_LOAD_LIST_GRP( LIST_PACKET_HEADER_1, BLIT_GRP_CNTRL, GRP_ENABLE, &hGrc->CurrentState, hGrc->aulCurrentRegs );
3085
3086	BDBG_LEAVE(BGRC_Destination_SetKeyMatrixOrder);
3087	return BERR_SUCCESS;
3088	#else
3089	BSTD_UNUSED( hGrc );
3090	BSTD_UNUSED( eKeyMatrixOrder );
3091	BDBG_LEAVE(BGRC_Destination_SetKeyMatrixOrder);
3092	return BERR_TRACE(BERR_NOT_SUPPORTED);
3093	#endif
3094	}
3095
3096	/***************************************************************************/
3097	BERR_Code BGRC_Destination_SetColor(
3098	BGRC_Handle hGrc,
3099	uint32_t ulColor )
3100	{
3101	BDBG_ENTER(BGRC_Destination_SetColor);
3102	BDBG_ASSERT( hGrc );
3103
3104	/* set single color field */
3105	BGRC_P_SET_FIELD_FULL( DEST_CONSTANT_COLOR, ulColor );
3106	BGRC_P_SET_FIELD_DATA( DEST_W_ALPHA, W0_ALPHA, BPXL_GET_COMPONENT( BPXL_eA8_R8_G8_B8, ulColor, 3 ) );
3107
3108	/* set register load field */
3109	if( BGRC_P_REGISTER_CHANGED( DEST_CONSTANT_COLOR ) \|\|
3110	BGRC_P_REGISTER_CHANGED( DEST_W_ALPHA ) )
3111	BGRC_P_LOAD_LIST_GRP( LIST_PACKET_HEADER_1, DST_FEEDER_GRP_CNTRL, GRP_ENABLE, &hGrc->CurrentState, hGrc->aulCurrentRegs );
3112
3113	BDBG_LEAVE(BGRC_Destination_SetColor);
3114	return BERR_SUCCESS;
3115	}
3116
3117	/***************************************************************************/
3118	BERR_Code BGRC_Destination_SetRectangle(
3119	BGRC_Handle hGrc,
3120	uint32_t ulLeft,
3121	uint32_t ulTop,
3122	uint32_t ulWidth,
3123	uint32_t ulHeight )
3124	{
3125	BDBG_ENTER(BGRC_Destination_SetRectangle);
3126	BDBG_ASSERT( hGrc );
3127
3128	/* validate dimensions */
3129	if( !BGRC_P_VALIDATE_SURFACE_DIMENSIONS( ulLeft, ulTop, ulWidth, ulHeight ) )
3130	return BERR_TRACE(BGRC_ERR_DESTINATION_DIMENSIONS_INVALID);
3131
3132	if( (ulLeft > BGRC_P_SURFACE_RECT_SIZE_MAX) \|\| (ulTop > BGRC_P_SURFACE_RECT_SIZE_MAX) \|\|
3133	(ulWidth > BGRC_P_SURFACE_RECT_SIZE_MAX) \|\| (ulHeight > BGRC_P_SURFACE_RECT_SIZE_MAX) )
3134	return BERR_TRACE(BGRC_ERR_DESTINATION_DIMENSIONS_INVALID);
3135
3136	/* store width and height */
3137	hGrc->CurrentState.DstRect.ulX = ulLeft;
3138	hGrc->CurrentState.DstRect.ulY = ulTop;
3139	hGrc->CurrentState.DstRect.ulWidth = ulWidth;
3140	hGrc->CurrentState.DstRect.ulHeight = ulHeight;
3141
3142	BDBG_LEAVE(BGRC_Destination_SetRectangle);
3143	return BERR_SUCCESS;
3144	}
3145
3146	/***************************************************************************/
3147	BERR_Code BGRC_Destination_SetDirection(
3148	BGRC_Handle hGrc,
3149	bool bRightToLeft,
3150	bool bBottomToTop )
3151	{
3152	BDBG_ENTER(BGRC_Destination_SetDirection);
3153	BDBG_ASSERT( hGrc );
3154
3155	hGrc->CurrentState.bDstRightToLeft = bRightToLeft;
3156	hGrc->CurrentState.bDstBottomToTop = bBottomToTop;
3157
3158	BDBG_LEAVE(BGRC_Destination_SetDirection);
3159	return BERR_SUCCESS;
3160	}
3161
3162	/***************************************************************************/
3163	BERR_Code BGRC_Destination_ResetState(
3164	BGRC_Handle hGrc )
3165	{
3166	BDBG_ENTER(BGRC_Destination_ResetState);
3167	BDBG_ASSERT( hGrc );
3168
3169	/* copy default state to current state */
3170	BGRC_P_Destination_CopyState( &hGrc->CurrentState, &hGrc->DefaultState,
3171	hGrc->aulCurrentRegs, hGrc->aulDefaultRegs );
3172
3173	BDBG_LEAVE(BGRC_Destination_ResetState);
3174	return BERR_SUCCESS;
3175	}
3176
3177	/***************************************************************************/
3178	BERR_Code BGRC_Destination_SetDefault(
3179	BGRC_Handle hGrc )
3180	{
3181	BDBG_ENTER(BGRC_Destination_SetDefault);
3182	BDBG_ASSERT( hGrc );
3183
3184	/* copy current state to default state */
3185	BGRC_P_Destination_CopyState( &hGrc->DefaultState, &hGrc->CurrentState,
3186	hGrc->aulDefaultRegs, hGrc->aulCurrentRegs );
3187
3188	BDBG_LEAVE(BGRC_Destination_SetDefault);
3189	return BERR_SUCCESS;
3190	}
3191
3192	/***************************************************************************/
3193	BERR_Code BGRC_Pattern_Set(
3194	BGRC_Handle hGrc,
3195	uint8_t ucVector,
3196	const uint8_t aucPattern[8],
3197	uint32_t ulColor0,
3198	uint32_t ulColor1 )
3199	{
3200	uint32_t aulPattern[2] = { 0, 0 };
3201
3202	BDBG_ENTER(BGRC_Pattern_Set);
3203	BDBG_ASSERT( hGrc );
3204
3205	if( aucPattern )
3206	{
3207	/* setup pattern */
3208	hGrc->CurrentState.aucPattern[0] = aucPattern[4];
3209	hGrc->CurrentState.aucPattern[1] = aucPattern[5];
3210	hGrc->CurrentState.aucPattern[2] = aucPattern[6];
3211	hGrc->CurrentState.aucPattern[3] = aucPattern[7];
3212	hGrc->CurrentState.aucPattern[4] = aucPattern[0];
3213	hGrc->CurrentState.aucPattern[5] = aucPattern[1];
3214	hGrc->CurrentState.aucPattern[6] = aucPattern[2];
3215	hGrc->CurrentState.aucPattern[7] = aucPattern[3];
3216
3217	#if ((BCHP_CHIP==7038) && (BCHP_VER < BCHP_VER_C0))
3218	BGRC_P_ALIGN_PATTERN( aulPattern, hGrc->CurrentState.aucPattern,
3219	hGrc->CurrentState.OutRect.ulX, hGrc->CurrentState.OutRect.ulY );
3220	#else
3221	BGRC_P_ALIGN_PATTERN( aulPattern, hGrc->CurrentState.aucPattern, 0, 0 );
3222	#endif
3223	}
3224
3225	/* set pattern/rop fields */
3226	BGRC_P_SET_FIELD_DATA( ROP_OPERATION, VECTOR, ucVector );
3227	BGRC_P_SET_FIELD_DATA( ROP_PATTERN_TOP, PATTERN, aulPattern[1] );
3228	BGRC_P_SET_FIELD_DATA( ROP_PATTERN_BOTTOM, PATTERN, aulPattern[0] );
3229	BGRC_P_SET_FIELD_FULL( ROP_PATTERN_COLOR_0, ulColor0 );
3230	BGRC_P_SET_FIELD_FULL( ROP_PATTERN_COLOR_1, ulColor1 );
3231
3232	/* set register load field */
3233	if( BGRC_P_REGISTER_CHANGED( ROP_OPERATION ) \|\|
3234	BGRC_P_REGISTER_CHANGED( ROP_PATTERN_TOP ) \|\|
3235	BGRC_P_REGISTER_CHANGED( ROP_PATTERN_BOTTOM ) \|\|
3236	BGRC_P_REGISTER_CHANGED( ROP_PATTERN_COLOR_0 ) \|\|
3237	BGRC_P_REGISTER_CHANGED( ROP_PATTERN_COLOR_1 ) )
3238	BGRC_P_LOAD_LIST_GRP( LIST_PACKET_HEADER_1, ROP_GRP_CNTRL, GRP_ENABLE, &hGrc->CurrentState, hGrc->aulCurrentRegs );
3239
3240	BDBG_LEAVE(BGRC_Pattern_Set);
3241	return BERR_SUCCESS;
3242	}
3243
3244	/***************************************************************************/
3245	BERR_Code BGRC_Pattern_ResetState(
3246	BGRC_Handle hGrc )
3247	{
3248	BDBG_ENTER(BGRC_Pattern_ResetState);
3249	BDBG_ASSERT( hGrc );
3250
3251	/* copy default state to current state */
3252	BGRC_P_Pattern_CopyState( &hGrc->CurrentState, &hGrc->DefaultState,
3253	hGrc->aulCurrentRegs, hGrc->aulDefaultRegs );
3254
3255	BDBG_LEAVE(BGRC_Pattern_ResetState);
3256	return BERR_SUCCESS;
3257	}
3258
3259	/***************************************************************************/
3260	BERR_Code BGRC_Pattern_SetDefault(
3261	BGRC_Handle hGrc )
3262	{
3263	BDBG_ENTER(BGRC_Pattern_SetDefault);
3264	BDBG_ASSERT( hGrc );
3265
3266	/* copy current state to default state */
3267	BGRC_P_Pattern_CopyState( &hGrc->DefaultState, &hGrc->CurrentState,
3268	hGrc->aulDefaultRegs, hGrc->aulCurrentRegs );
3269
3270	BDBG_LEAVE(BGRC_Pattern_SetDefault);
3271	return BERR_SUCCESS;
3272	}
3273
3274	/***************************************************************************/
3275	BERR_Code BGRC_Blend_SetColor(
3276	BGRC_Handle hGrc,
3277	uint32_t ulColor )
3278	{
3279	BDBG_ENTER(BGRC_Blend_SetColor);
3280	BDBG_ASSERT( hGrc );
3281
3282	/* set blend color field */
3283	BGRC_P_SET_FIELD_FULL( BLEND_CONSTANT_COLOR, ulColor );
3284
3285	/* set register load field */
3286	if( BGRC_P_REGISTER_CHANGED( BLEND_CONSTANT_COLOR ) )
3287	BGRC_P_LOAD_LIST_GRP( LIST_PACKET_HEADER_1, BLEND_PARAM_GRP_CNTRL, GRP_ENABLE, &hGrc->CurrentState, hGrc->aulCurrentRegs );
3288
3289	BDBG_LEAVE(BGRC_Blend_SetColor);
3290	return BERR_SUCCESS;
3291	}
3292
3293	/***************************************************************************/
3294	BERR_Code BGRC_Blend_SetColorBlend(
3295	BGRC_Handle hGrc,
3296	BGRC_Blend_Source eSourceA,
3297	BGRC_Blend_Source eSourceB,
3298	bool bSubtractCD,
3299	BGRC_Blend_Source eSourceC,
3300	BGRC_Blend_Source eSourceD,
3301	bool bSubtractE,
3302	BGRC_Blend_Source eSourceE )
3303	{
3304	BDBG_ENTER(BGRC_Blend_SetColorBlend);
3305	BDBG_ASSERT( hGrc );
3306
3307	/* set color blend fields */
3308	BGRC_P_SET_FIELD_BLEND( COLOR, eSourceA, eSourceB, eSourceC, eSourceD, eSourceE, bSubtractCD, bSubtractE );
3309
3310	/* set register load field */
3311	if( BGRC_P_REGISTER_CHANGED( BLEND_COLOR_OP ) )
3312	BGRC_P_LOAD_LIST_GRP( LIST_PACKET_HEADER_1, BLEND_PARAM_GRP_CNTRL, GRP_ENABLE, &hGrc->CurrentState, hGrc->aulCurrentRegs );
3313
3314	BDBG_LEAVE(BGRC_Blend_SetColorBlend);
3315	return BERR_SUCCESS;
3316	}
3317
3318	/***************************************************************************/
3319	BERR_Code BGRC_Blend_SetAlphaBlend(
3320	BGRC_Handle hGrc,
3321	BGRC_Blend_Source eSourceA,
3322	BGRC_Blend_Source eSourceB,
3323	bool bSubtractCD,
3324	BGRC_Blend_Source eSourceC,
3325	BGRC_Blend_Source eSourceD,
3326	bool bSubtractE,
3327	BGRC_Blend_Source eSourceE )
3328	{
3329	BDBG_ENTER(BGRC_Blend_SetAlphaBlend);
3330	BDBG_ASSERT( hGrc );
3331
3332	/* set alpha blend fields */
3333	BGRC_P_SET_FIELD_BLEND( ALPHA, eSourceA, eSourceB, eSourceC, eSourceD, eSourceE, bSubtractCD, bSubtractE );
3334
3335	/* set register load field */
3336	if( BGRC_P_REGISTER_CHANGED( BLEND_ALPHA_OP ) )
3337	BGRC_P_LOAD_LIST_GRP( LIST_PACKET_HEADER_1, BLEND_PARAM_GRP_CNTRL, GRP_ENABLE, &hGrc->CurrentState, hGrc->aulCurrentRegs );
3338
3339	BDBG_LEAVE(BGRC_Blend_SetAlphaBlend);
3340	return BERR_SUCCESS;
3341	}
3342
3343	/***************************************************************************/
3344	BERR_Code BGRC_Blend_ResetState(
3345	BGRC_Handle hGrc )
3346	{
3347	BDBG_ENTER(BGRC_Blend_ResetState);
3348	BDBG_ASSERT( hGrc );
3349
3350	/* copy default state to current state */
3351	BGRC_P_Blend_CopyState( &hGrc->CurrentState, &hGrc->DefaultState,
3352	hGrc->aulCurrentRegs, hGrc->aulDefaultRegs );
3353
3354	BDBG_LEAVE(BGRC_Blend_ResetState);
3355	return BERR_SUCCESS;
3356	}
3357
3358	/***************************************************************************/
3359	BERR_Code BGRC_Blend_SetDefault(
3360	BGRC_Handle hGrc )
3361	{
3362	BDBG_ENTER(BGRC_Blend_SetDefault);
3363	BDBG_ASSERT( hGrc );
3364
3365	/* copy current state to default state */
3366	BGRC_P_Blend_CopyState( &hGrc->DefaultState, &hGrc->CurrentState,
3367	hGrc->aulDefaultRegs, hGrc->aulCurrentRegs );
3368
3369	BDBG_LEAVE(BGRC_Blend_SetDefault);
3370	return BERR_SUCCESS;
3371	}
3372
3373	#include "bchp_sun_top_ctrl.h"
3374
3375	/***************************************************************************/
3376	BERR_Code BGRC_Output_SetSurface(
3377	BGRC_Handle hGrc,
3378	BSUR_Surface_Handle hSurface )
3379	{
3380	BGRC_P_State *pState;
3381	BGRC_P_Surface Surface;
3382	bool bSurfaceChanged = false;
3383
3384	BDBG_ENTER(BGRC_Output_SetSurface);
3385	BDBG_ASSERT( hGrc );
3386
3387	pState = &hGrc->CurrentState;
3388
3389	/* get surface data */
3390	BGRC_P_GET_SURFACE_DATA( hSurface, Surface, pState->OutSurface );
3391
3392	/* check if surface is changing */
3393	if( hGrc->bUninitialized \|\| bSurfaceChanged )
3394	{
3395	bool bBypass = true;
3396
3397	/* validate surface format */
3398	if( hSurface && BPXL_IS_DEPTH_FORMAT(Surface.eFormat) )
3399	return BERR_TRACE(BERR_INVALID_PARAMETER);
3400
3401	if( hSurface && (BPXL_IS_YCbCr444_10BIT_FORMAT(Surface.eFormat) \|\| BPXL_IS_YCbCr422_10BIT_FORMAT(Surface.eFormat)) )
3402	return BERR_TRACE(BERR_INVALID_PARAMETER);
3403
3404	/* set register load field */
3405	BGRC_P_LOAD_LIST_GRP( LIST_PACKET_HEADER_1, OUTPUT_FEEDER_GRP_CNTRL, GRP_ENABLE, pState, hGrc->aulCurrentRegs );
3406
3407	/* set surface fields */
3408	BGRC_P_SET_FIELD_COMP( OUTPUT_FEEDER_ENABLE, ENABLE, ENABLE, DISABLE, hSurface );
3409	BGRC_P_SET_FIELD_DATA( OUTPUT_SURFACE_ADDR_0, ADDR, Surface.ulOffset );
3410	BGRC_P_SET_FIELD_DATA( OUTPUT_SURFACE_STRIDE_0, STRIDE, Surface.ulPitch );
3411	BGRC_P_SET_FIELD_FORMAT( OUTPUT, FORMAT_TYPE, Surface.eFormat, pState->OutAlphaSurface.hSurface, bBypass );
3412	BGRC_P_SET_FIELD_CHANNELS( OUTPUT, Surface.eFormat, hSurface );
3413
3414	/* store surface data */
3415	BKNI_Memcpy( &pState->OutSurface, &Surface, sizeof (BGRC_P_Surface) );
3416	}
3417
3418	BDBG_LEAVE(BGRC_Output_SetSurface);
3419	return BERR_SUCCESS;
3420	}
3421
3422	/***************************************************************************/
3423	BERR_Code BGRC_Output_SetAlphaSurface(
3424	BGRC_Handle hGrc,
3425	BSUR_Surface_Handle hSurface )
3426	{
3427	BGRC_P_State *pState;
3428	BGRC_P_Surface Surface;
3429	bool bSurfaceChanged = false;
3430
3431	BDBG_ENTER(BGRC_Output_SetAlphaSurface);
3432	BDBG_ASSERT( hGrc );
3433
3434	pState = &hGrc->CurrentState;
3435
3436	/* get surface data */
3437	BGRC_P_GET_SURFACE_DATA( hSurface, Surface, pState->OutAlphaSurface );
3438
3439	/* check if surface is changing */
3440	if( hGrc->bUninitialized \|\| bSurfaceChanged )
3441	{
3442	bool bBypass = true;
3443
3444	/* validate surface format */
3445	if( hSurface && (Surface.eFormat != BPXL_eA1) && (Surface.eFormat != BPXL_eW1) )
3446	return BERR_TRACE(BERR_INVALID_PARAMETER);
3447
3448	/* store surface data */
3449	BKNI_Memcpy( &pState->OutAlphaSurface, &Surface, sizeof (BGRC_P_Surface) );
3450
3451	/* set register load field */
3452	BGRC_P_LOAD_LIST_GRP( LIST_PACKET_HEADER_1, OUTPUT_FEEDER_GRP_CNTRL, GRP_ENABLE, pState, hGrc->aulCurrentRegs );
3453
3454	/* set surface fields */
3455	BGRC_P_SET_FIELD_DATA( OUTPUT_SURFACE_ADDR_1, ADDR, pState->OutAlphaSurface.ulOffset );
3456	BGRC_P_SET_FIELD_DATA( OUTPUT_SURFACE_STRIDE_1, STRIDE, pState->OutAlphaSurface.ulPitch );
3457
3458	/* set surface format field */
3459	if( pState->OutSurface.hSurface )
3460	BGRC_P_SET_FIELD_FORMAT( OUTPUT, FORMAT_TYPE, pState->OutSurface.eFormat, hSurface, bBypass );
3461	}
3462
3463	BDBG_LEAVE(BGRC_Output_SetAlphaSurface);
3464	return BERR_SUCCESS;
3465	}
3466
3467	/***************************************************************************/
3468	BERR_Code BGRC_Output_SetColorMatrix5x4(
3469	BGRC_Handle hGrc,
3470	const int32_t ai32_Matrix[],
3471	uint32_t ulShift )
3472	{
3473	BDBG_ENTER(BGRC_Output_SetColorMatrix5x4);
3474	BDBG_ASSERT( hGrc );
3475	BDBG_ASSERT( ai32_Matrix );
3476
3477	#if ((BCHP_CHIP==7038) && (BCHP_VER < BCHP_VER_C0))
3478	/* set color matrix fields */
3479	BGRC_P_SET_FIELD_MATRIX_ROW( OUTPUT, 0, ai32_Matrix, 0, ulShift );
3480	BGRC_P_SET_FIELD_MATRIX_ROW( OUTPUT, 1, ai32_Matrix, 5, ulShift );
3481	BGRC_P_SET_FIELD_MATRIX_ROW( OUTPUT, 2, ai32_Matrix, 10, ulShift );
3482	BGRC_P_SET_FIELD_MATRIX_ROW( OUTPUT, 3, ai32_Matrix, 15, ulShift );
3483
3484	/* set register load field */
3485	if( BGRC_P_REGISTER_CHANGED( OUTPUT_CM_C00_C01 ) \|\|
3486	BGRC_P_REGISTER_CHANGED( OUTPUT_CM_C02_C03 ) \|\|
3487	BGRC_P_REGISTER_CHANGED( OUTPUT_CM_C04 ) \|\|
3488	BGRC_P_REGISTER_CHANGED( OUTPUT_CM_C10_C11 ) \|\|
3489	BGRC_P_REGISTER_CHANGED( OUTPUT_CM_C12_C13 ) \|\|
3490	BGRC_P_REGISTER_CHANGED( OUTPUT_CM_C14 ) \|\|
3491	BGRC_P_REGISTER_CHANGED( OUTPUT_CM_C20_C21 ) \|\|
3492	BGRC_P_REGISTER_CHANGED( OUTPUT_CM_C22_C23 ) \|\|
3493	BGRC_P_REGISTER_CHANGED( OUTPUT_CM_C24 ) \|\|
3494	BGRC_P_REGISTER_CHANGED( OUTPUT_CM_C30_C31 ) \|\|
3495	BGRC_P_REGISTER_CHANGED( OUTPUT_CM_C32_C33 ) \|\|
3496	BGRC_P_REGISTER_CHANGED( OUTPUT_CM_C34 ) )
3497	BGRC_P_LOAD_LIST_GRP( LIST_PACKET_HEADER_1, OUTPUT_COLOR_MATRIX_GRP_CNTRL, GRP_ENABLE, &hGrc->CurrentState, hGrc->aulCurrentRegs );
3498
3499	BDBG_LEAVE(BGRC_Output_SetColorMatrix5x4);
3500	return BERR_SUCCESS;
3501	#else
3502	BSTD_UNUSED( hGrc );
3503	BSTD_UNUSED( ai32_Matrix );
3504	BSTD_UNUSED( ulShift );
3505	BDBG_LEAVE(BGRC_Output_SetColorMatrix5x4);
3506	return BERR_TRACE(BERR_NOT_SUPPORTED);
3507	#endif
3508	}
3509
3510	/***************************************************************************/
3511	BERR_Code BGRC_Output_ToggleColorMatrix(
3512	BGRC_Handle hGrc,
3513	bool bEnable )
3514	{
3515	BDBG_ENTER(BGRC_Output_ToggleColorMatrix);
3516	BDBG_ASSERT( hGrc );
3517
3518	#if ((BCHP_CHIP==7038) && (BCHP_VER < BCHP_VER_C0))
3519	/* set color matrix enable field */
3520	BGRC_P_SET_FIELD_COMP( BLIT_HEADER, OUTPUT_COLOR_MATRIX_ENABLE,
3521	ENABLE, DISABLE, bEnable );
3522
3523	/* set register load field */
3524	if( BGRC_P_REGISTER_CHANGED( BLIT_HEADER ) )
3525	BGRC_P_LOAD_LIST_GRP( LIST_PACKET_HEADER_1, BLIT_GRP_CNTRL, GRP_ENABLE, &hGrc->CurrentState, hGrc->aulCurrentRegs );
3526
3527	BDBG_LEAVE(BGRC_Output_ToggleColorMatrix);
3528	return BERR_SUCCESS;
3529	#else
3530	BSTD_UNUSED( hGrc );
3531	BSTD_UNUSED( bEnable );
3532	BDBG_LEAVE(BGRC_Output_ToggleColorMatrix);
3533	return BERR_TRACE(BERR_NOT_SUPPORTED);
3534	#endif
3535	}
3536
3537	/***************************************************************************/
3538	BERR_Code BGRC_Output_SetColorMatrixRounding(
3539	BGRC_Handle hGrc,
3540	BGRC_Rounding eMatrixRounding )
3541	{
3542	BDBG_ENTER(BGRC_Output_SetColorMatrixRounding);
3543	BDBG_ASSERT( hGrc );
3544
3545	#if ((BCHP_CHIP==7038) && (BCHP_VER < BCHP_VER_C0))
3546	/* set matrix rounding field */
3547	BGRC_P_SET_FIELD_COMP( BLIT_HEADER, OUTPUT_COLOR_MATRIX_ROUNDING,
3548	TRUNCATE, NEAREST, eMatrixRounding == BGRC_Rounding_eTruncate );
3549
3550	/* set register load field */
3551	if( BGRC_P_REGISTER_CHANGED( BLIT_HEADER ) )
3552	BGRC_P_LOAD_LIST_GRP( LIST_PACKET_HEADER_1, BLIT_GRP_CNTRL, GRP_ENABLE, &hGrc->CurrentState, hGrc->aulCurrentRegs );
3553
3554	BDBG_LEAVE(BGRC_Output_SetColorMatrixRounding);
3555	return BERR_SUCCESS;
3556	#else
3557	BSTD_UNUSED( hGrc );
3558	BSTD_UNUSED( eMatrixRounding );
3559	BDBG_LEAVE(BGRC_Output_SetColorMatrixRounding);
3560	return BERR_TRACE(BERR_NOT_SUPPORTED);
3561	#endif
3562	}
3563
3564	/***************************************************************************/
3565	BERR_Code BGRC_Output_SetRectangle(
3566	BGRC_Handle hGrc,
3567	uint32_t ulLeft,
3568	uint32_t ulTop,
3569	uint32_t ulWidth,
3570	uint32_t ulHeight )
3571	{
3572	uint32_t aulPattern[2] = { 0, 0 };
3573
3574	BDBG_ENTER(BGRC_Output_SetRectangle);
3575	BDBG_ASSERT( hGrc );
3576
3577	/* validate dimensions */
3578	if( !BGRC_P_VALIDATE_SURFACE_DIMENSIONS( ulLeft, ulTop, ulWidth, ulHeight ) )
3579	return BERR_TRACE(BGRC_ERR_OUTPUT_DIMENSIONS_INVALID);
3580
3581	if( (ulLeft > BGRC_P_SURFACE_RECT_SIZE_MAX) \|\| (ulTop > BGRC_P_SURFACE_RECT_SIZE_MAX) \|\|
3582	(ulWidth > BGRC_P_SURFACE_RECT_SIZE_MAX) \|\| (ulHeight > BGRC_P_SURFACE_RECT_SIZE_MAX) )
3583	return BERR_TRACE(BGRC_ERR_OUTPUT_DIMENSIONS_INVALID);
3584
3585	/* store width and height */
3586	hGrc->CurrentState.OutRect.ulX = ulLeft;
3587	hGrc->CurrentState.OutRect.ulY = ulTop;
3588	hGrc->CurrentState.OutRect.ulWidth = ulWidth;
3589	hGrc->CurrentState.OutRect.ulHeight = ulHeight;
3590
3591	/* set pattern fields */
3592	#if ((BCHP_CHIP==7038) && (BCHP_VER < BCHP_VER_C0))
3593	BGRC_P_ALIGN_PATTERN( aulPattern, hGrc->CurrentState.aucPattern, ulLeft, ulTop );
3594	#else
3595	BGRC_P_ALIGN_PATTERN( aulPattern, hGrc->CurrentState.aucPattern, 0, 0 );
3596	#endif
3597	BGRC_P_SET_FIELD_DATA( ROP_PATTERN_TOP, PATTERN, aulPattern[1] );
3598	BGRC_P_SET_FIELD_DATA( ROP_PATTERN_BOTTOM, PATTERN, aulPattern[0] );
3599
3600	/* set register load field */
3601	if( BGRC_P_REGISTER_CHANGED( ROP_PATTERN_TOP ) \|\|
3602	BGRC_P_REGISTER_CHANGED( ROP_PATTERN_BOTTOM ) )
3603	BGRC_P_LOAD_LIST_GRP( LIST_PACKET_HEADER_1, ROP_GRP_CNTRL, GRP_ENABLE, &hGrc->CurrentState, hGrc->aulCurrentRegs );
3604
3605	BDBG_LEAVE(BGRC_Output_SetRectangle);
3606	return BERR_SUCCESS;
3607	}
3608
3609	/***************************************************************************/
3610	BERR_Code BGRC_Output_SetColorKeySelection(
3611	BGRC_Handle hGrc,
3612	BGRC_Output_ColorKeySelection eSrcNotKeyedDstNotKeyed,
3613	BGRC_Output_ColorKeySelection eSrcNotKeyedDstKeyed,
3614	BGRC_Output_ColorKeySelection eSrcKeyedDstNotKeyed,
3615	BGRC_Output_ColorKeySelection eSrcKeyedDstKeyed )
3616	{
3617	BDBG_ENTER(BGRC_Output_SetColorKeySelection);
3618	BDBG_ASSERT( hGrc );
3619
3620	/* set output selction fields */
3621	BGRC_P_SET_FIELD_COLORKEY( eSrcNotKeyedDstNotKeyed, eSrcNotKeyedDstKeyed, eSrcKeyedDstNotKeyed, eSrcKeyedDstKeyed );
3622
3623	/* set register load field */
3624	if( BGRC_P_REGISTER_CHANGED( BLEND_COLOR_KEY_ACTION ) )
3625	BGRC_P_LOAD_LIST_GRP( LIST_PACKET_HEADER_1, BLEND_PARAM_GRP_CNTRL, GRP_ENABLE, &hGrc->CurrentState, hGrc->aulCurrentRegs );
3626
3627	BDBG_LEAVE(BGRC_Output_SetColorKeySelection);
3628	return BERR_SUCCESS;
3629	}
3630
3631	/***************************************************************************/
3632	BERR_Code BGRC_Output_SetDither(
3633	BGRC_Handle hGrc,
3634	bool bEnableDither )
3635	{
3636	BDBG_ENTER(BGRC_Output_SetDither);
3637	BDBG_ASSERT( hGrc );
3638
3639	/* set dither field */
3640	BGRC_P_SET_FIELD_COMP( OUTPUT_SURFACE_FORMAT_DEF_3, DITHER_ENABLE,
3641	ENABLE, DISABLE, bEnableDither );
3642
3643	/* set register load field */
3644	if( BGRC_P_REGISTER_CHANGED( OUTPUT_SURFACE_FORMAT_DEF_3 ) )
3645	BGRC_P_LOAD_LIST_GRP( LIST_PACKET_HEADER_1, OUTPUT_FEEDER_GRP_CNTRL, GRP_ENABLE, &hGrc->CurrentState, hGrc->aulCurrentRegs );
3646
3647	BDBG_LEAVE(BGRC_Output_SetDither);
3648	return BERR_SUCCESS;
3649	}
3650
3651	/***************************************************************************/
3652	BERR_Code BGRC_Output_SetDirection(
3653	BGRC_Handle hGrc,
3654	bool bRightToLeft,
3655	bool bBottomToTop )
3656	{
3657	BDBG_ENTER(BGRC_Output_SetDirection);
3658	BDBG_ASSERT( hGrc );
3659
3660	hGrc->CurrentState.bOutRightToLeft = bRightToLeft;
3661	hGrc->CurrentState.bOutBottomToTop = bBottomToTop;
3662
3663	BDBG_LEAVE(BGRC_Output_SetDirection);
3664	return BERR_SUCCESS;
3665	}
3666
3667	/***************************************************************************/
3668	BERR_Code BGRC_Output_ResetState(
3669	BGRC_Handle hGrc )
3670	{
3671	BDBG_ENTER(BGRC_Output_ResetState);
3672	BDBG_ASSERT( hGrc );
3673
3674	/* copy default state to current state */
3675	BGRC_P_Output_CopyState( &hGrc->CurrentState, &hGrc->DefaultState,
3676	hGrc->aulCurrentRegs, hGrc->aulDefaultRegs );
3677
3678	BDBG_LEAVE(BGRC_Output_ResetState);
3679	return BERR_SUCCESS;
3680	}
3681
3682	/***************************************************************************/
3683	BERR_Code BGRC_Output_SetDefault(
3684	BGRC_Handle hGrc )
3685	{
3686	BDBG_ENTER(BGRC_Output_SetDefault);
3687	BDBG_ASSERT( hGrc );
3688
3689	/* copy current state to default state */
3690	BGRC_P_Output_CopyState( &hGrc->DefaultState, &hGrc->CurrentState,
3691	hGrc->aulDefaultRegs, hGrc->aulCurrentRegs );
3692
3693	BDBG_LEAVE(BGRC_Output_SetDefault);
3694	return BERR_SUCCESS;
3695	}
3696
3697	/* End of File */

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source: svn/trunk/newcon3bcm2_21bu/magnum/portinginterface/grc/7552/bgrc.c

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