| 1 | /*************************************************************************** |
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| 2 | * Copyright (c) 2003-2012, Broadcom Corporation |
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| 3 | * All Rights Reserved |
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| 4 | * Confidential Property of Broadcom Corporation |
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| 5 | * |
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| 6 | * THIS SOFTWARE MAY ONLY BE USED SUBJECT TO AN EXECUTED SOFTWARE LICENSE |
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| 7 | * AGREEMENT BETWEEN THE USER AND BROADCOM. YOU HAVE NO RIGHT TO USE OR |
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| 8 | * EXPLOIT THIS MATERIAL EXCEPT SUBJECT TO THE TERMS OF SUCH AN AGREEMENT. |
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| 9 | * |
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| 10 | * $brcm_Workfile: bgrc_private.c $ |
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| 11 | * $brcm_Revision: Hydra_Software_Devel/192 $ |
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| 12 | * $brcm_Date: 2/21/12 11:45a $ |
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| 13 | * |
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| 14 | * Module Description: |
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| 15 | * |
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| 16 | * Revision History: |
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| 17 | * |
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| 18 | * $brcm_Log: /magnum/portinginterface/grc/7405/bgrc_private.c $ |
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| 19 | * |
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| 20 | * Hydra_Software_Devel/192 2/21/12 11:45a nissen |
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| 21 | * SW7425-1413: Fixing problem with last output stripe size for M2MCs with |
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| 22 | * split fifo. |
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| 23 | * |
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| 24 | * Hydra_Software_Devel/191 2/16/12 3:20p nissen |
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| 25 | * SW7405-5427: Adding flags for output mirroring when blitting |
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| 26 | * |
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| 27 | * Hydra_Software_Devel/190 1/6/12 1:51p nissen |
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| 28 | * SW7435-13 : Fixed support for 7435 A0. |
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| 29 | * |
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| 30 | * Hydra_Software_Devel/189 12/15/11 6:22p nissen |
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| 31 | * SW7435-13 : Added support for 7435 A0. |
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| 32 | * |
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| 33 | * Hydra_Software_Devel/188 12/14/11 4:55p nissen |
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| 34 | * SW7435-13 : Added support for 7435 A0. |
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| 35 | * |
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| 36 | * Hydra_Software_Devel/187 10/25/11 1:17p nissen |
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| 37 | * SW7420-499: Removed FixedLeft fix. |
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| 38 | * |
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| 39 | * Hydra_Software_Devel/186 9/9/11 7:27p nissen |
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| 40 | * SWBLURAY-27238: Added support for 7640 B0. |
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| 41 | * |
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| 42 | * Hydra_Software_Devel/185 4/20/11 2:58p nissen |
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| 43 | * SW7405-5274: Adjusted initial phases for 420 scaling. |
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| 44 | * |
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| 45 | * Hydra_Software_Devel/184 3/3/11 11:18a nissen |
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| 46 | * SW7420-499: Fixed problem with initial phase on last strip when |
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| 47 | * scaling. |
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| 48 | * |
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| 49 | * Hydra_Software_Devel/183 11/18/10 5:57p nissen |
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| 50 | * SW7425-19: Fixed destination format registers for null dest on the |
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| 51 | * 7422. |
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| 52 | * |
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| 53 | * Hydra_Software_Devel/182 11/18/10 5:44p nissen |
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| 54 | * SW7425-19: Fixed source format registers for null source on the 7422. |
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| 55 | * |
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| 56 | * Hydra_Software_Devel/181 8/31/10 5:01p nissen |
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| 57 | * SW7405-4831: Reduced stripe width when software striping. |
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| 58 | * |
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| 59 | * Hydra_Software_Devel/180 8/31/10 4:48p nissen |
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| 60 | * SW7420-499: Fixed problem with source stripe width being too small for |
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| 61 | * last stripe. |
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| 62 | * |
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| 63 | * Hydra_Software_Devel/178 8/3/10 2:34p nissen |
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| 64 | * SW7420-925: Removed BERR_TRACE when returning out of memory error. |
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| 65 | * |
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| 66 | * Hydra_Software_Devel/177 6/9/10 5:23p nissen |
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| 67 | * SW7405-4385: Fixed calculation of source strip width when using fixed |
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| 68 | * scaling. |
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| 69 | * |
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| 70 | * Hydra_Software_Devel/176 5/21/10 5:43p nissen |
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| 71 | * SW7405-4384: Added critical section to prevent interrupt handler from |
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| 72 | * getting interrupted to add a blit operation to the queue. |
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| 73 | * |
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| 74 | * Hydra_Software_Devel/175 5/12/10 1:03p nissen |
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| 75 | * SW7420-499: Fixed problem with output stripe width being to large. |
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| 76 | * |
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| 77 | * Hydra_Software_Devel/174 1/1/10 3:48p nissen |
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| 78 | * SW7420-499: Fixed problem with calculating output stripe width when |
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| 79 | * using fixed scaling. |
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| 80 | * |
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| 81 | * Hydra_Software_Devel/173 12/10/09 2:14p nissen |
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| 82 | * SW7420-499: Increased precision of initial phase calculation. |
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| 83 | * |
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| 84 | * Hydra_Software_Devel/172 10/28/09 2:01p nissen |
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| 85 | * SW7405-2856: Fixed build warning. |
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| 86 | * |
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| 87 | * Hydra_Software_Devel/171 8/20/09 12:47p nissen |
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| 88 | * PR 52470: Changed some variables and functions to const and/or static. |
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| 89 | * |
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| 90 | * Hydra_Software_Devel/170 8/18/09 5:40p nissen |
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| 91 | * PR 52470: Optimized setting registers. |
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| 92 | * |
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| 93 | * Hydra_Software_Devel/169 8/10/09 6:20p nissen |
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| 94 | * PR 57469: Fixed problem with WaitForOperationReady function. |
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| 95 | * |
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| 96 | * Hydra_Software_Devel/168 6/9/09 4:16p nissen |
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| 97 | * PR 52504: Changed global and static variables to constants. |
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| 98 | * |
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| 99 | * Hydra_Software_Devel/167 6/9/09 11:43a nissen |
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| 100 | * PR 51077: Fixed getting previous operation in isr. |
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| 101 | * |
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| 102 | * Hydra_Software_Devel/166 6/7/09 5:14p nissen |
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| 103 | * PR 51077: Fixed while loop condition when processing operations in isr. |
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| 104 | * |
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| 105 | * Hydra_Software_Devel/165 6/3/09 2:11p nissen |
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| 106 | * PR 51077: Changed location of periodic event reset again. |
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| 107 | * |
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| 108 | * Hydra_Software_Devel/164 6/3/09 1:15p nissen |
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| 109 | * PR 51077: Changed location of periodic event reset. |
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| 110 | * |
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| 111 | * Hydra_Software_Devel/163 6/2/09 9:43p nissen |
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| 112 | * PR 51077: Changed code to reset event when running out of memory. |
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| 113 | * |
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| 114 | * Hydra_Software_Devel/162 6/1/09 8:38p nissen |
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| 115 | * PR 51077: Removed code that processed operations during cleanup. |
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| 116 | * |
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| 117 | * Hydra_Software_Devel/161 6/1/09 7:02p nissen |
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| 118 | * PR 51077: Added wait for when filter blit fails. Added code to better |
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| 119 | * process completed operations. |
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| 120 | * |
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| 121 | * Hydra_Software_Devel/160 6/1/09 1:25p nissen |
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| 122 | * PR 51077: Fixed warning. |
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| 123 | * |
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| 124 | * Hydra_Software_Devel/159 6/1/09 12:31p nissen |
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| 125 | * PR 51077: Added fix for when FilterBlit runs out of memory. |
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| 126 | * |
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| 127 | * Hydra_Software_Devel/158 4/17/09 4:46p nissen |
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| 128 | * PR 51077: Added callbacks to wait functions. |
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| 129 | * |
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| 130 | * Hydra_Software_Devel/157 4/9/09 2:11p nissen |
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| 131 | * PR 53698: Removed support for loading a destination palette because the |
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| 132 | * M2MC does not support it. |
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| 133 | * |
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| 134 | * Hydra_Software_Devel/156 4/7/09 2:51p nissen |
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| 135 | * PR 52976: Added support for 7635/7630 and future chips using RDB |
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| 136 | * defines. |
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| 137 | * |
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| 138 | * Hydra_Software_Devel/155 3/20/09 4:36p nissen |
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| 139 | * PR 51077: Added functions to wait on operations, and better handling |
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| 140 | * for running out of memory. |
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| 141 | * |
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| 142 | * Hydra_Software_Devel/154 1/31/09 1:12a jrubio |
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| 143 | * PR51629: add 7336 support |
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| 144 | * |
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| 145 | * Hydra_Software_Devel/153 12/3/08 7:09p nissen |
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| 146 | * PR 47763: Added support for 7420. |
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| 147 | * |
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| 148 | * Hydra_Software_Devel/152 10/29/08 5:18p nissen |
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| 149 | * PR 46310: Added register dump for DCE registers 3548 B0. |
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| 150 | * |
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| 151 | * Hydra_Software_Devel/151 7/30/08 8:10p nissen |
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| 152 | * PR 33687: Added support for the 7601. |
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| 153 | * |
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| 154 | * Hydra_Software_Devel/150 6/25/08 5:32p nissen |
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| 155 | * PR 44159: Enabled sw striping while scaling/filtering for 3548 and 3556 |
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| 156 | * for 420 fix. |
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| 157 | * |
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| 158 | * Hydra_Software_Devel/149 6/23/08 4:22p nissen |
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| 159 | * PR 43693: Enabled hw striping while scaling/filtering for 3548 and |
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| 160 | * 3556. |
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| 161 | * |
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| 162 | * Hydra_Software_Devel/148 6/23/08 12:50p nissen |
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| 163 | * PR 43693: Removed scaler coefficient register overwrite fix for 3548 |
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| 164 | * and 3556. |
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| 165 | * |
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| 166 | * Hydra_Software_Devel/147 6/10/08 1:31p nissen |
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| 167 | * PR 43459: Fixed "fixed point" problem when scaling a source that is |
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| 168 | * larger than 2048. |
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| 169 | * |
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| 170 | * Hydra_Software_Devel/146 6/4/08 7:58p nissen |
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| 171 | * PR 43321: Updated for 3548 and 3556. |
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| 172 | * |
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| 173 | * Hydra_Software_Devel/145 5/5/08 12:12p nissen |
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| 174 | * PR 42410: Fixed problem with checking if all operations are complete in |
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| 175 | * isr function. |
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| 176 | * |
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| 177 | * Hydra_Software_Devel/144 4/4/08 12:05p nissen |
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| 178 | * PR 39460: Added support for the 3556. |
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| 179 | * |
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| 180 | * Hydra_Software_Devel/143 2/8/08 2:17p nissen |
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| 181 | * PR 38945: Added support for the 3548. |
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| 182 | * |
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| 183 | * Hydra_Software_Devel/142 2/8/08 10:45a nissen |
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| 184 | * PR 39221: Added pulldown register overwrite fix for 3563 C0. |
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| 185 | * |
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| 186 | * Hydra_Software_Devel/141 2/7/08 12:38p nissen |
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| 187 | * PR 24618: Added sharper anti-flutter filter coefficient table. |
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| 188 | * |
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| 189 | * Hydra_Software_Devel/140 1/7/08 2:35p nissen |
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| 190 | * PR 35747: Turned off HW striping when source is YCbCr 422 for 7405. |
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| 191 | * |
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| 192 | * Hydra_Software_Devel/139 12/19/07 8:10p nissen |
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| 193 | * PR 35855: Fixed problem with processing interrupts. |
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| 194 | * |
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| 195 | * Hydra_Software_Devel/138 12/17/07 9:58a nissen |
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| 196 | * PR 38269: Added support for inverting sources during a blit. |
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| 197 | * |
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| 198 | * Hydra_Software_Devel/137 12/17/07 9:18a nissen |
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| 199 | * PR 35855: Fixed problem with checking if device is busy. |
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| 200 | * |
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| 201 | * Hydra_Software_Devel/136 12/10/07 3:07p nissen |
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| 202 | * PR 29724: Fixed problem with reseting macroblock state. |
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| 203 | * |
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| 204 | * Hydra_Software_Devel/135 12/4/07 5:38p nissen |
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| 205 | * PR 28248: Removed register overwrite fix for 3563 C0 and above. |
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| 206 | * |
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| 207 | * Hydra_Software_Devel/134 12/4/07 5:28p nissen |
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| 208 | * PR 36878: Added support for the 7335. |
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| 209 | * |
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| 210 | * Hydra_Software_Devel/133 11/16/07 3:10p nissen |
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| 211 | * PR 36759: Added support for setting the scale factor independently of |
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| 212 | * the provided rectangle sizes. |
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| 213 | * |
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| 214 | * Hydra_Software_Devel/132 10/18/07 11:26p nissen |
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| 215 | * PR 35920: Fixed support for preallocating system memory. |
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| 216 | * |
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| 217 | * Hydra_Software_Devel/131 10/12/07 7:52a nissen |
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| 218 | * PR 35920: Added support for preallocating system memory for operation |
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| 219 | * structures when opening module. |
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| 220 | * |
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| 221 | * Hydra_Software_Devel/130 10/11/07 6:03p nissen |
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| 222 | * PR 33390: Using software striping when scaling down past 7x in vertical |
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| 223 | * direction. |
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| 224 | * |
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| 225 | * Hydra_Software_Devel/129 9/19/07 11:34a nissen |
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| 226 | * PR 34538: Added support for building for the 7325. |
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| 227 | * |
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| 228 | * Hydra_Software_Devel/128 9/18/07 1:21p nissen |
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| 229 | * PR 34852: Added support for building for the 3573. |
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| 230 | * |
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| 231 | * Hydra_Software_Devel/127 7/26/07 1:40p nissen |
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| 232 | * PR 33320: Fixed problem with output stripe size with YCbCr formats. |
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| 233 | * |
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| 234 | * Hydra_Software_Devel/126 5/2/07 11:46a nissen |
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| 235 | * PR 29724: Added support for 7405 A0 including new MacroBlock strip |
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| 236 | * width setting. |
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| 237 | * |
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| 238 | * Hydra_Software_Devel/125 4/23/07 11:01a nissen |
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| 239 | * PR 29903: Switched to software striping when using YCbCr422 source for |
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| 240 | * 7400 and 7401. |
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| 241 | * |
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| 242 | * Hydra_Software_Devel/124 4/3/07 9:03p nissen |
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| 243 | * PR 28248: Removed writing of source color matrix registers in 3563 M2MC |
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| 244 | * register overwrite fix because it was not required. |
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| 245 | * |
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| 246 | * Hydra_Software_Devel/123 3/30/07 8:56a nissen |
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| 247 | * PR 29200: Fixed interrupt handler to check if module handle is null |
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| 248 | * before using it. |
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| 249 | * |
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| 250 | * Hydra_Software_Devel/122 3/29/07 11:24a nissen |
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| 251 | * PR 28248: Fixed problem with 3563 M2MC overwritting source color matrix |
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| 252 | * and pulldown registers when writing scaler coefficent registers. |
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| 253 | * |
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| 254 | * Hydra_Software_Devel/121 3/28/07 9:50a nissen |
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| 255 | * PR 29122: Fixed problem with using an XRGB output surface on 7440. |
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| 256 | * |
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| 257 | * Hydra_Software_Devel/120 3/8/07 2:32p nissen |
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| 258 | * PR 27748: Fixed problem with output stripe size when scaling YCbCr 420 |
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| 259 | * to 422. |
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| 260 | * |
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| 261 | * Hydra_Software_Devel/119 1/29/07 10:48a nissen |
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| 262 | * PR 19665: Fixed problem with hardware striping while scaling. |
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| 263 | * |
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| 264 | * Hydra_Software_Devel/118 1/22/07 1:15p nissen |
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| 265 | * PR 23200: Fixed problem with setting initial phase when scaling. |
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| 266 | * |
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| 267 | * Hydra_Software_Devel/117 12/14/06 12:29p nissen |
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| 268 | * PR 24648: Disabled striping when using YCbCr420 format with 7400 A0. |
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| 269 | * |
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| 270 | * Hydra_Software_Devel/116 12/14/06 10:05a nissen |
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| 271 | * PR 24648: Disabled striping when using YCbCr420 format with 7401 A0 and |
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| 272 | * B0. |
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| 273 | * |
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| 274 | * Hydra_Software_Devel/115 12/1/06 10:59a nissen |
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| 275 | * PR 25991: Added support for 7400 B0. |
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| 276 | * |
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| 277 | * Hydra_Software_Devel/114 11/15/06 11:48a nissen |
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| 278 | * PR 25668: Added support for 7403. |
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| 279 | * |
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| 280 | * Hydra_Software_Devel/113 11/8/06 11:04a nissen |
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| 281 | * PR 25683: Switched register data memory to uncached. |
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| 282 | * |
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| 283 | * Hydra_Software_Devel/112 10/24/06 7:37p nissen |
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| 284 | * PR 24648: Fixed problem with VC-1 macroblock |
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| 285 | * |
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| 286 | * Hydra_Software_Devel/111 10/20/06 6:08p nissen |
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| 287 | * PR 24647: Fixed problem when allocating device memory. |
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| 288 | * |
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| 289 | * Hydra_Software_Devel/110 10/19/06 11:00a nissen |
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| 290 | * PR 24647: Added support for preallocting all device memory when module |
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| 291 | * is opened. |
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| 292 | * |
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| 293 | * Hydra_Software_Devel/109 10/6/06 11:59a nissen |
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| 294 | * PR 24740: Removed code that forced point sample filtering. |
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| 295 | * |
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| 296 | * Hydra_Software_Devel/108 9/29/06 10:11a nissen |
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| 297 | * PR 24618: Added support for second blurryer anti-flutter filter |
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| 298 | * coefficient table. |
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| 299 | * |
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| 300 | * Hydra_Software_Devel/107 9/8/06 4:01p nissen |
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| 301 | * PR 23517: Added support for 7440. |
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| 302 | * |
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| 303 | * Hydra_Software_Devel/106 8/28/06 4:32p nissen |
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| 304 | * PR 23941: Re-added function to toggle destination palette bypass. |
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| 305 | * |
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| 306 | * Hydra_Software_Devel/105 8/17/06 11:33a nissen |
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| 307 | * PR 23179: Added support for building and running on the 3563. |
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| 308 | * |
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| 309 | * Hydra_Software_Devel/104 8/3/06 9:58a nissen |
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| 310 | * PR 22999: Fixed problem with setting surface registers on 7401 B0. |
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| 311 | * |
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| 312 | * Hydra_Software_Devel/103 7/25/06 4:47p nissen |
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| 313 | * PR 22852: Fixed problem setting dst surface registers on 7401 B0. |
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| 314 | * |
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| 315 | * Hydra_Software_Devel/102 7/24/06 8:53a nissen |
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| 316 | * PR 21171: Fixed build problem for 7401 A0. |
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| 317 | * |
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| 318 | * Hydra_Software_Devel/101 7/12/06 9:33p nissen |
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| 319 | * PR 22396: Added code to clear secondary source surface related |
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| 320 | * registers when not using a YCbCr 420 source surface. |
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| 321 | * |
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| 322 | * Hydra_Software_Devel/100 6/22/06 10:44a nissen |
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| 323 | * PR 21940: Added support for 7118. |
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| 324 | * |
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| 325 | * Hydra_Software_Devel/99 5/8/06 7:07a nissen |
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| 326 | * PR 19575: Fixed use of feedthrough bit for M2MCs on 7438. |
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| 327 | * |
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| 328 | * Hydra_Software_Devel/98 5/5/06 3:38p nissen |
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| 329 | * PR 20236: Removed striping when scaling with YCbCr420 source. |
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| 330 | * |
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| 331 | * Hydra_Software_Devel/97 5/3/06 12:35p nissen |
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| 332 | * PR 21171: Added support for building and running 7401 B0. |
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| 333 | * |
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| 334 | * Hydra_Software_Devel/96 5/2/06 12:22p nissen |
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| 335 | * PR 19553: Fixed problem with fill on 7401. |
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| 336 | * |
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| 337 | * Hydra_Software_Devel/95 4/20/06 12:19p nissen |
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| 338 | * PR 14329: Added code to use "clut scale mode" when scaling/filtering to |
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| 339 | * a palette format. |
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| 340 | * |
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| 341 | * Hydra_Software_Devel/94 4/18/06 1:55p nissen |
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| 342 | * PR 21007: Fixed warnings. |
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| 343 | * |
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| 344 | * Hydra_Software_Devel/93 4/18/06 1:26p nissen |
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| 345 | * PR 18369: Added support for hardware striping when scaling on the 7400 |
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| 346 | * and 7401. |
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| 347 | * |
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| 348 | * Hydra_Software_Devel/92 4/10/06 4:24p nissen |
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| 349 | * PR 19575: Fixed use of feedthrough bit for second M2MC on 7438. |
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| 350 | * |
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| 351 | * Hydra_Software_Devel/91 4/7/06 7:39p nissen |
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| 352 | * PR 19575: Fixed use of feedthrough bit in blit header register for |
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| 353 | * 7438. |
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| 354 | * |
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| 355 | * Hydra_Software_Devel/90 3/22/06 1:10p nissen |
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| 356 | * PR 19551: Fixed use of format type register field. |
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| 357 | * |
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| 358 | * Hydra_Software_Devel/89 3/22/06 10:48a nissen |
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| 359 | * PR 18903: Fixed warnings when debug is off. |
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| 360 | * |
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| 361 | * Hydra_Software_Devel/88 3/15/06 1:25p nissen |
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| 362 | * PR 15840: Fixed problem with YCbCr420 format without filtering enabled. |
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| 363 | * |
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| 364 | * Hydra_Software_Devel/87 3/15/06 12:08p nissen |
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| 365 | * PR 15840: Added support for using YCbCr420 surfaces as a source. |
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| 366 | * |
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| 367 | * Hydra_Software_Devel/86 3/8/06 2:46p nissen |
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| 368 | * PR 19575: Added support for building and running second m2mc on 7438. |
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| 369 | * |
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| 370 | * Hydra_Software_Devel/85 2/21/06 4:36p nissen |
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| 371 | * PR 19553: Fixed problem with setting filter coefficient registers for |
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| 372 | * 7400. |
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| 373 | * |
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| 374 | * Hydra_Software_Devel/84 2/21/06 12:13p nissen |
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| 375 | * PR 19084: Added support for second m2mc device. |
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| 376 | * |
|---|
| 377 | * Hydra_Software_Devel/83 2/18/06 8:15a nissen |
|---|
| 378 | * PR 19553: Enabled source channels for fill blit on 7400, otherwise it |
|---|
| 379 | * seems to hang. |
|---|
| 380 | * |
|---|
| 381 | * Hydra_Software_Devel/82 2/9/06 5:30p nissen |
|---|
| 382 | * PR 19553: Adjusted register groups. |
|---|
| 383 | * |
|---|
| 384 | * Hydra_Software_Devel/81 2/1/06 5:40p nissen |
|---|
| 385 | * PR 19084: Added support for building for the 7400 A0. |
|---|
| 386 | * |
|---|
| 387 | * Hydra_Software_Devel/80 2/1/06 1:54p nissen |
|---|
| 388 | * PR 18903: Switch BDGB_MSG to DBG_ERR. |
|---|
| 389 | * |
|---|
| 390 | * Hydra_Software_Devel/79 1/18/06 11:47a nissen |
|---|
| 391 | * PR 19116: Added support for inactivating operations when no interrupts |
|---|
| 392 | * are expected. |
|---|
| 393 | * |
|---|
| 394 | * Hydra_Software_Devel/78 1/12/06 5:37p nissen |
|---|
| 395 | * PR 18761: Added support for BCHP_VER macro. |
|---|
| 396 | * |
|---|
| 397 | * Hydra_Software_Devel/77 1/12/06 3:12p nissen |
|---|
| 398 | * PR 18903: Fixed vxworks warnings and changed BKNI_Printf calls to |
|---|
| 399 | * BDBG_MSG. |
|---|
| 400 | * |
|---|
| 401 | * Hydra_Software_Devel/76 12/9/05 1:47p nissen |
|---|
| 402 | * PR 18007: Fixed warning. |
|---|
| 403 | * |
|---|
| 404 | * Hydra_Software_Devel/75 12/8/05 1:41p nissen |
|---|
| 405 | * PR 18007: Fixed initial phases when filtering without scaling. |
|---|
| 406 | * |
|---|
| 407 | * Hydra_Software_Devel/74 12/7/05 8:32p nissen |
|---|
| 408 | * PR 18007: Fixed potential problem with packet offset in interrupt |
|---|
| 409 | * handler. |
|---|
| 410 | * |
|---|
| 411 | * Hydra_Software_Devel/73 12/7/05 10:53a nissen |
|---|
| 412 | * PR 18369: Turned off hardware striping for 7401. |
|---|
| 413 | * |
|---|
| 414 | * Hydra_Software_Devel/72 12/5/05 4:54p nissen |
|---|
| 415 | * PR 18007: Added fix for setting initial phases when scaling. |
|---|
| 416 | * |
|---|
| 417 | * Hydra_Software_Devel/71 12/3/05 6:03p nissen |
|---|
| 418 | * PR 18007: Fixed problem with reallocating memory that the device was |
|---|
| 419 | * not done with yet. |
|---|
| 420 | * |
|---|
| 421 | * Hydra_Software_Devel/70 12/1/05 6:10p nissen |
|---|
| 422 | * PR 18007: Added code to return error when down scaling more than 15x |
|---|
| 423 | * for M2MC Cx and above. |
|---|
| 424 | * |
|---|
| 425 | * Hydra_Software_Devel/69 12/1/05 11:39a nissen |
|---|
| 426 | * PR 18369: Added fix for scaling YCbCr422 surfaces and switched on |
|---|
| 427 | * hardware striping. |
|---|
| 428 | * |
|---|
| 429 | * Hydra_Software_Devel/68 10/5/05 9:37p nissen |
|---|
| 430 | * PR 17273: Added support for cached memory. |
|---|
| 431 | * |
|---|
| 432 | * Hydra_Software_Devel/67 10/5/05 1:22p nissen |
|---|
| 433 | * PR 17267: Fixed problem with writing registers. |
|---|
| 434 | * |
|---|
| 435 | * Hydra_Software_Devel/66 10/5/05 10:39a nissen |
|---|
| 436 | * PR 17267: Having trouble with hardware striping on C0, so switching to |
|---|
| 437 | * software striping for now. |
|---|
| 438 | * |
|---|
| 439 | * Hydra_Software_Devel/65 10/5/05 10:29a nissen |
|---|
| 440 | * PR 17267: Removed fix that was causing other problems. |
|---|
| 441 | * |
|---|
| 442 | * Hydra_Software_Devel/64 9/26/05 5:22p nissen |
|---|
| 443 | * PR 17306: Fixed problem with setting destination size registers. |
|---|
| 444 | * |
|---|
| 445 | * Hydra_Software_Devel/63 9/23/05 2:33p nissen |
|---|
| 446 | * PR 17267: Added code to not turn on dst feeder when scaling with |
|---|
| 447 | * striping. |
|---|
| 448 | * |
|---|
| 449 | * Hydra_Software_Devel/62 9/13/05 4:36p nissen |
|---|
| 450 | * PR 16499: Added code to free memory past a default or specified |
|---|
| 451 | * threshold. |
|---|
| 452 | * |
|---|
| 453 | * Hydra_Software_Devel/61 8/4/05 5:34p nissen |
|---|
| 454 | * PR 16489: Fixed problem with processing interrupts for operations that |
|---|
| 455 | * have not completed. |
|---|
| 456 | * |
|---|
| 457 | * Hydra_Software_Devel/60 8/2/05 4:07p nissen |
|---|
| 458 | * PR 16489: Fixed problem with processing interrupts for operations that |
|---|
| 459 | * have not completed. |
|---|
| 460 | * |
|---|
| 461 | * Hydra_Software_Devel/59 7/5/05 5:34p nissen |
|---|
| 462 | * PR 16056: Added support for building for the 7401 A0. |
|---|
| 463 | * |
|---|
| 464 | * Hydra_Software_Devel/58 5/18/05 4:34p agin |
|---|
| 465 | * PR14720: B2, C1, C2 compilation support. |
|---|
| 466 | * |
|---|
| 467 | * Hydra_Software_Devel/57 5/12/05 4:40p nissen |
|---|
| 468 | * PR 15264: Modified support for user defined phase adjustment when |
|---|
| 469 | * filtering. |
|---|
| 470 | * |
|---|
| 471 | * Hydra_Software_Devel/56 5/12/05 2:51p nissen |
|---|
| 472 | * PR 15264: Added support for user defined phase adjustment when |
|---|
| 473 | * filtering. |
|---|
| 474 | * |
|---|
| 475 | * Hydra_Software_Devel/55 5/12/05 11:15a nissen |
|---|
| 476 | * PR 15226: Fixed build error for 7038 Cx. |
|---|
| 477 | * |
|---|
| 478 | * Hydra_Software_Devel/54 5/12/05 10:22a nissen |
|---|
| 479 | * PR 15226: Modified code to store surface information when a surface is |
|---|
| 480 | * set instead of looking it up later. |
|---|
| 481 | * |
|---|
| 482 | * Hydra_Software_Devel/53 5/6/05 1:36p nissen |
|---|
| 483 | * PR 13488: Added support for M2MC C1. |
|---|
| 484 | * |
|---|
| 485 | * Hydra_Software_Devel/52 3/21/05 11:24p nissen |
|---|
| 486 | * PR 14528: Added code for the C0 to use software striping when there is |
|---|
| 487 | * a destination surface. |
|---|
| 488 | * |
|---|
| 489 | * Hydra_Software_Devel/51 3/3/05 6:53p nissen |
|---|
| 490 | * PR 14281: Fixed support for no scale filtering when scaling in only one |
|---|
| 491 | * direction. |
|---|
| 492 | * |
|---|
| 493 | * Hydra_Software_Devel/50 2/24/05 1:33p nissen |
|---|
| 494 | * PR 14207: Added bstd.h include. |
|---|
| 495 | * |
|---|
| 496 | * Hydra_Software_Devel/49 2/17/05 1:18p nissen |
|---|
| 497 | * PR 14086: Added support for new color matrix register precision on the |
|---|
| 498 | * 3560. |
|---|
| 499 | * |
|---|
| 500 | * Hydra_Software_Devel/48 1/20/05 9:45a nissen |
|---|
| 501 | * PR 13841: Fixed problem with calculating striping values when scaling |
|---|
| 502 | * on the C0. |
|---|
| 503 | * |
|---|
| 504 | * Hydra_Software_Devel/47 12/17/04 1:37p nissen |
|---|
| 505 | * PR 13325: Added code to process all operations that missed an interrupt |
|---|
| 506 | * when an interrupt for the current operation is received. |
|---|
| 507 | * |
|---|
| 508 | * Hydra_Software_Devel/46 12/13/04 2:18p nissen |
|---|
| 509 | * PR 13488: Added support for M2MC C0. |
|---|
| 510 | * |
|---|
| 511 | * Hydra_Software_Devel/45 10/13/04 10:31a nissen |
|---|
| 512 | * PR 12989: Removed code to do striping in hardware. |
|---|
| 513 | * |
|---|
| 514 | * Hydra_Software_Devel/44 10/6/04 10:18a nissen |
|---|
| 515 | * PR 12728: Removed pedantic errors. |
|---|
| 516 | * |
|---|
| 517 | * Hydra_Software_Devel/43 9/23/04 2:24p nissen |
|---|
| 518 | * PR 12729: Added support for anti-flutter filtering. Fixed turning off |
|---|
| 519 | * horizontal filtering only when not scaling. |
|---|
| 520 | * |
|---|
| 521 | * Hydra_Software_Devel/42 7/29/04 9:58a nissen |
|---|
| 522 | * PR 12095: Added sharper and blurry entries to the filter function |
|---|
| 523 | * table. |
|---|
| 524 | * |
|---|
| 525 | * Hydra_Software_Devel/41 6/29/04 9:13p nissen |
|---|
| 526 | * PR 11745: Fixed problem with vertical scale. |
|---|
| 527 | * |
|---|
| 528 | * Hydra_Software_Devel/40 6/29/04 8:52p nissen |
|---|
| 529 | * PR 11744: Fixed problem with setting palette offset register. |
|---|
| 530 | * |
|---|
| 531 | * Hydra_Software_Devel/39 6/28/04 1:02p nissen |
|---|
| 532 | * PR 11699: Eliminated compiler warnings. |
|---|
| 533 | * |
|---|
| 534 | * Hydra_Software_Devel/38 6/22/04 9:12p nissen |
|---|
| 535 | * PR 11638: Added fix for expanding alpha using replication for ARGBB1555 |
|---|
| 536 | * formats. |
|---|
| 537 | * |
|---|
| 538 | * Hydra_Software_Devel/37 6/11/04 10:27p nissen |
|---|
| 539 | * PR 11486: Fixed problemss with scaling. |
|---|
| 540 | * |
|---|
| 541 | * Hydra_Software_Devel/36 6/4/04 4:10p nissen |
|---|
| 542 | * PR 11361: Added code to adjust src padding when scaling YCbCr422 |
|---|
| 543 | * surfaces so that no src stripes start on a odd pixel boundry. |
|---|
| 544 | * |
|---|
| 545 | * Hydra_Software_Devel/35 6/3/04 8:34p nissen |
|---|
| 546 | * PR 11349: Added functionality for tracking interrupts. |
|---|
| 547 | * |
|---|
| 548 | * Hydra_Software_Devel/34 5/24/04 5:08p jasonh |
|---|
| 549 | * PR 11189: Merge down from B0 to main-line |
|---|
| 550 | * |
|---|
| 551 | * Hydra_Software_Devel/Refsw_Devel_7038_B0/3 4/30/04 10:57a nissen |
|---|
| 552 | * PR 9635: Fixed problem with not setting packet memory block to busy. |
|---|
| 553 | * |
|---|
| 554 | * Hydra_Software_Devel/Refsw_Devel_7038_B0/2 4/28/04 2:53p nissen |
|---|
| 555 | * PR 9635: Fixed problem with initiating register packet. |
|---|
| 556 | * |
|---|
| 557 | * Hydra_Software_Devel/Refsw_Devel_7038_B0/1 4/27/04 7:20p nissen |
|---|
| 558 | * PR 9635: Added support for M2MC B0. |
|---|
| 559 | * |
|---|
| 560 | * Hydra_Software_Devel/33 4/22/04 4:48p nissen |
|---|
| 561 | * PR 10676: Fixed problem with shifting negative numbers when dealing |
|---|
| 562 | * with initial phases while scaling. |
|---|
| 563 | * |
|---|
| 564 | * Hydra_Software_Devel/32 4/21/04 11:49a nissen |
|---|
| 565 | * PR 10692: Fixed initial phase when down scaling more than 8 times by |
|---|
| 566 | * dividing initial phase by averager count. |
|---|
| 567 | * |
|---|
| 568 | * Hydra_Software_Devel/31 4/19/04 9:06p nissen |
|---|
| 569 | * PR 10676: Fixed initial phases when scaling. |
|---|
| 570 | * |
|---|
| 571 | * Hydra_Software_Devel/30 4/16/04 4:55p nissen |
|---|
| 572 | * PR 10427: Fixed problem with last stripe in a scale over reading the |
|---|
| 573 | * source when filtering. |
|---|
| 574 | * |
|---|
| 575 | * Hydra_Software_Devel/29 4/16/04 10:59a nissen |
|---|
| 576 | * PR 10622: Fixed scaling offset problem by setting initial phases to |
|---|
| 577 | * zero. |
|---|
| 578 | * |
|---|
| 579 | * Hydra_Software_Devel/28 4/9/04 2:17p nissen |
|---|
| 580 | * PR 10380: Modified field setting macros to do mask and set operation |
|---|
| 581 | * for more than one field at a time. |
|---|
| 582 | * |
|---|
| 583 | * Hydra_Software_Devel/27 3/12/04 2:29p nissen |
|---|
| 584 | * PR 10024: Added support in isr for forcing events. |
|---|
| 585 | * PR 10072: Added support for no-scale filtering. |
|---|
| 586 | * |
|---|
| 587 | * Hydra_Software_Devel/26 3/9/04 10:40a nissen |
|---|
| 588 | * PR 8725: Fixed warnings in printf statements. |
|---|
| 589 | * |
|---|
| 590 | * Hydra_Software_Devel/25 3/9/04 10:27a nissen |
|---|
| 591 | * PR 9856: Fixed problem with not disabling striping when not using it. |
|---|
| 592 | * |
|---|
| 593 | * Hydra_Software_Devel/24 3/5/04 2:37p nissen |
|---|
| 594 | * PR 9856: Fixed problem with rectangle width's and height's being set to |
|---|
| 595 | * zero. |
|---|
| 596 | * |
|---|
| 597 | * Hydra_Software_Devel/23 2/17/04 2:42p nissen |
|---|
| 598 | * PR 9719: Added support for sharper filtering when upscaling. |
|---|
| 599 | * |
|---|
| 600 | * Hydra_Software_Devel/22 2/11/04 5:30p nissen |
|---|
| 601 | * PR 9721: Added support for dest constant color when there is no dest |
|---|
| 602 | * surface. |
|---|
| 603 | * |
|---|
| 604 | * Hydra_Software_Devel/21 2/10/04 11:23a nissen |
|---|
| 605 | * PR 9700: Added support for blurry filtering. |
|---|
| 606 | * |
|---|
| 607 | * Hydra_Software_Devel/20 1/30/04 1:46p nissen |
|---|
| 608 | * PR 9537: Fixed problem with loading wrong register group when copying a |
|---|
| 609 | * state. |
|---|
| 610 | * |
|---|
| 611 | * Hydra_Software_Devel/19 1/21/04 6:49p nissen |
|---|
| 612 | * PR 9431: Fixed problem with destination when doing a source fill. |
|---|
| 613 | * |
|---|
| 614 | * Hydra_Software_Devel/18 1/21/04 1:49p nissen |
|---|
| 615 | * PR 9195: Removed math.h include. |
|---|
| 616 | * |
|---|
| 617 | * Hydra_Software_Devel/17 12/21/03 8:52p nissen |
|---|
| 618 | * PR 9033: Fixed setting source width and height registers when doing a |
|---|
| 619 | * fill. |
|---|
| 620 | * |
|---|
| 621 | * Hydra_Software_Devel/16 12/18/03 2:09p nissen |
|---|
| 622 | * PR 9016: Added support for splitting scaled/filtered blits into |
|---|
| 623 | * vertical strips |
|---|
| 624 | * |
|---|
| 625 | * Hydra_Software_Devel/15 11/21/03 6:42p nissen |
|---|
| 626 | * Fixed problem with callback function pointer. |
|---|
| 627 | * |
|---|
| 628 | * Hydra_Software_Devel/14 11/20/03 7:03p nissen |
|---|
| 629 | * Added operation queuing mechanism and support for interrupts. |
|---|
| 630 | * |
|---|
| 631 | * Hydra_Software_Devel/13 10/20/03 1:54p nissen |
|---|
| 632 | * Eliminated warnings. |
|---|
| 633 | * |
|---|
| 634 | * Hydra_Software_Devel/12 10/10/03 5:29p jasonh |
|---|
| 635 | * Removed C++ style comments. |
|---|
| 636 | * |
|---|
| 637 | * Hydra_Software_Devel/11 9/23/03 5:51p pntruong |
|---|
| 638 | * Removed the 7038_ from header filename generated from RDB. |
|---|
| 639 | * |
|---|
| 640 | * Hydra_Software_Devel/10 9/19/03 3:57p nissen |
|---|
| 641 | * Removed use of float (PR 8043). |
|---|
| 642 | * |
|---|
| 643 | * Hydra_Software_Devel/9 8/26/03 4:11p nissen |
|---|
| 644 | * Added support for initial phase when scaling. |
|---|
| 645 | * |
|---|
| 646 | * Hydra_Software_Devel/8 8/21/03 1:27p nissen |
|---|
| 647 | * Set palette to non-palette blit to use one pixel feedthrough. Added |
|---|
| 648 | * code to disable color key in copy register functions. |
|---|
| 649 | * |
|---|
| 650 | * Hydra_Software_Devel/7 8/20/03 4:43p nissen |
|---|
| 651 | * Added functions to copy state groups. |
|---|
| 652 | * |
|---|
| 653 | * Hydra_Software_Devel/6 8/19/03 10:12a nissen |
|---|
| 654 | * Fixed filter coefficient tables. Added code to check if registers |
|---|
| 655 | * changed. |
|---|
| 656 | * |
|---|
| 657 | * Hydra_Software_Devel/5 8/12/03 11:35a nissen |
|---|
| 658 | * Added more filter coefficient tables. Changed use of field and register |
|---|
| 659 | * setting macros. |
|---|
| 660 | * |
|---|
| 661 | * Hydra_Software_Devel/4 8/6/03 2:34p nissen |
|---|
| 662 | * Added support for scaling and filtering. Added support for only setting |
|---|
| 663 | * register sets that have changed. |
|---|
| 664 | * |
|---|
| 665 | * Hydra_Software_Devel/3 6/25/03 12:03p nissen |
|---|
| 666 | * Update function that sets registers. |
|---|
| 667 | * |
|---|
| 668 | * Hydra_Software_Devel/2 6/5/03 5:39p jasonh |
|---|
| 669 | * Changed register include name. |
|---|
| 670 | * |
|---|
| 671 | * Hydra_Software_Devel/1 5/28/03 4:16p nissen |
|---|
| 672 | * Graphics compositor. |
|---|
| 673 | * |
|---|
| 674 | ***************************************************************************/ |
|---|
| 675 | |
|---|
| 676 | #include "bstd.h" |
|---|
| 677 | #include "bstd_defs.h" |
|---|
| 678 | #include "berr.h" |
|---|
| 679 | #include "bdbg.h" |
|---|
| 680 | #include "bkni.h" |
|---|
| 681 | #include "breg_mem.h" |
|---|
| 682 | #include "bchp.h" |
|---|
| 683 | |
|---|
| 684 | #if (BCHP_CHIP==7435) |
|---|
| 685 | #include "bchp_m2mc.h" |
|---|
| 686 | #include "bchp_m2mc1.h" |
|---|
| 687 | #else |
|---|
| 688 | #include "bchp_m2mc.h" |
|---|
| 689 | #endif |
|---|
| 690 | |
|---|
| 691 | #if ((BCHP_CHIP==7400) && (BCHP_VER == BCHP_VER_A0)) || \ |
|---|
| 692 | ((BCHP_CHIP==7438) && (BCHP_VER >= BCHP_VER_A0)) || \ |
|---|
| 693 | ((BCHP_CHIP==7440) && (BCHP_VER >= BCHP_VER_A0)) || \ |
|---|
| 694 | ((BCHP_CHIP==7640) && (BCHP_VER >= BCHP_VER_B0)) |
|---|
| 695 | #include "bchp_m2mc_1.h" |
|---|
| 696 | #endif |
|---|
| 697 | #include "bchp_common.h" |
|---|
| 698 | #include "bgrc.h" |
|---|
| 699 | #include "bgrc_private.h" |
|---|
| 700 | |
|---|
| 701 | BDBG_MODULE(BGRC); |
|---|
| 702 | |
|---|
| 703 | /***************************************************************************/ |
|---|
| 704 | static uint32_t *BGRC_P_List_AllocPacket( BGRC_Handle hGrc, uint32_t ulPacketHeader, uint32_t *pulPacketOffset, uint32_t *pulPacketSize, BGRC_P_Block **ppBlock ); |
|---|
| 705 | static BERR_Code BGRC_P_List_PreparePacket( BGRC_Handle hGrc, bool bEnableInterrupt ); |
|---|
| 706 | static void BGRC_P_List_WritePacket( BGRC_Handle hGrc, uint32_t *pulPacket, uint32_t ulPacketHeader ); |
|---|
| 707 | static void BGRC_P_List_RenderPacket( BGRC_Handle hGrc, uint32_t ulPacketOffset ); |
|---|
| 708 | static BGRC_P_Block *BGRC_P_List_CreateBlock( BGRC_Handle hGrc ); |
|---|
| 709 | static BGRC_P_Block *BGRC_P_List_DestroyBlock( BGRC_Handle hGrc, BGRC_P_Block *pBlock ); |
|---|
| 710 | static BGRC_P_Operation *BGRC_P_Operation_Alloc( BGRC_Handle hGrc, BGRC_Callback pCallback, void *pData, BGRC_P_Block *pBlock, uint32_t ulPacketOffset, bool bSetEvent ); |
|---|
| 711 | static void BGRC_P_Operation_AddToList( BGRC_Handle hGrc, BGRC_P_Operation *pOp ); |
|---|
| 712 | static void BGRC_P_Operation_RemoveFromList( BGRC_Handle hGrc, BGRC_P_Operation *pOp ); |
|---|
| 713 | |
|---|
| 714 | /***************************************************************************/ |
|---|
| 715 | /* FIR FILTER COEFFICENT TABLES */ |
|---|
| 716 | /***************************************************************************/ |
|---|
| 717 | extern const uint32_t BGRC_P_FIRCOEFF_POINTSAMPLE[]; |
|---|
| 718 | extern const uint32_t BGRC_P_FIRCOEFF_BILINEAR[]; |
|---|
| 719 | extern const uint32_t BGRC_P_FIRCOEFF_BLURRY_3to1[]; |
|---|
| 720 | extern const uint32_t BGRC_P_FIRCOEFF_ANISOTROPIC_1to1[]; |
|---|
| 721 | extern const uint32_t BGRC_P_FIRCOEFF_ANISOTROPIC_2to1[]; |
|---|
| 722 | extern const uint32_t BGRC_P_FIRCOEFF_ANISOTROPIC_3to1[]; |
|---|
| 723 | extern const uint32_t BGRC_P_FIRCOEFF_ANISOTROPIC_4to1[]; |
|---|
| 724 | extern const uint32_t BGRC_P_FIRCOEFF_ANISOTROPIC_5to1[]; |
|---|
| 725 | extern const uint32_t BGRC_P_FIRCOEFF_ANISOTROPIC_6to1[]; |
|---|
| 726 | extern const uint32_t BGRC_P_FIRCOEFF_ANISOTROPIC_7to1[]; |
|---|
| 727 | extern const uint32_t BGRC_P_FIRCOEFF_ANISOTROPIC_8to1[]; |
|---|
| 728 | extern const uint32_t BGRC_P_FIRCOEFF_SHARP_8to9[]; |
|---|
| 729 | extern const uint32_t BGRC_P_FIRCOEFF_SHARP_8to8[]; |
|---|
| 730 | extern const uint32_t BGRC_P_FIRCOEFF_SHARP_8to7[]; |
|---|
| 731 | extern const uint32_t BGRC_P_FIRCOEFF_SHARP_8to6[]; |
|---|
| 732 | extern const uint32_t BGRC_P_FIRCOEFF_SHARP_8to5[]; |
|---|
| 733 | extern const uint32_t BGRC_P_FIRCOEFF_SHARP_8to4[]; |
|---|
| 734 | extern const uint32_t BGRC_P_FIRCOEFF_SHARP_8to3[]; |
|---|
| 735 | extern const uint32_t BGRC_P_FIRCOEFF_SHARP_8to2[]; |
|---|
| 736 | extern const uint32_t BGRC_P_FIRCOEFF_SHARP_8to1[]; |
|---|
| 737 | extern const uint32_t BGRC_P_FIRCOEFF_SHARP_1toN[]; |
|---|
| 738 | extern const uint32_t BGRC_P_FIRCOEFF_SHARPER_1toN[]; |
|---|
| 739 | extern const uint32_t BGRC_P_FIRCOEFF_ANTIFLUTTER[]; |
|---|
| 740 | extern const uint32_t BGRC_P_FIRCOEFF_ANTIFLUTTERSCALE[]; |
|---|
| 741 | extern const uint32_t BGRC_P_FIRCOEFF_ANTIFLUTTERBLURRY[]; |
|---|
| 742 | extern const uint32_t BGRC_P_FIRCOEFF_ANTIFLUTTERSHARP[]; |
|---|
| 743 | |
|---|
| 744 | /***************************************************************************/ |
|---|
| 745 | /* SOURCE PAD ARRAYS FOR SPLIT FILTERED BLITS */ |
|---|
| 746 | /***************************************************************************/ |
|---|
| 747 | static const uint32_t BGRC_P_FILTER_SRCPADLEFT[] = |
|---|
| 748 | { |
|---|
| 749 | 0, /* BGRC_FilterCoeffs_ePointSample */ |
|---|
| 750 | 0, /* BGRC_FilterCoeffs_eBilinear */ |
|---|
| 751 | BGRC_P_FIR_TAP_COUNT / 2 - 1, /* BGRC_FilterCoeffs_eAnisotropic */ |
|---|
| 752 | BGRC_P_FIR_TAP_COUNT / 2 - 1, /* BGRC_FilterCoeffs_eSharp */ |
|---|
| 753 | BGRC_P_FIR_TAP_COUNT / 2 - 1, /* BGRC_FilterCoeffs_eSharper */ |
|---|
| 754 | BGRC_P_FIR_TAP_COUNT / 2 - 1, /* BGRC_FilterCoeffs_eBlurry */ |
|---|
| 755 | BGRC_P_FIR_TAP_COUNT / 2 - 1, /* BGRC_FilterCoeffs_eAntiFlutter */ |
|---|
| 756 | BGRC_P_FIR_TAP_COUNT / 2 - 1, /* BGRC_FilterCoeffs_eAntiFlutterBlurry */ |
|---|
| 757 | BGRC_P_FIR_TAP_COUNT / 2 - 1 /* BGRC_FilterCoeffs_eAntiFlutterSharp */ |
|---|
| 758 | }; |
|---|
| 759 | |
|---|
| 760 | static const uint32_t BGRC_P_FILTER_SRCPADRIGHT[] = |
|---|
| 761 | { |
|---|
| 762 | 0, /* BGRC_FilterCoeffs_ePointSample */ |
|---|
| 763 | 2, /* BGRC_FilterCoeffs_eBilinear */ |
|---|
| 764 | BGRC_P_FIR_TAP_COUNT / 2, /* BGRC_FilterCoeffs_eAnisotropic */ |
|---|
| 765 | BGRC_P_FIR_TAP_COUNT / 2, /* BGRC_FilterCoeffs_eSharp */ |
|---|
| 766 | BGRC_P_FIR_TAP_COUNT / 2, /* BGRC_FilterCoeffs_eSharper */ |
|---|
| 767 | BGRC_P_FIR_TAP_COUNT / 2, /* BGRC_FilterCoeffs_eBlurry */ |
|---|
| 768 | BGRC_P_FIR_TAP_COUNT / 2, /* BGRC_FilterCoeffs_eAntiFlutter */ |
|---|
| 769 | BGRC_P_FIR_TAP_COUNT / 2, /* BGRC_FilterCoeffs_eAntiFlutterBlurry */ |
|---|
| 770 | BGRC_P_FIR_TAP_COUNT / 2 /* BGRC_FilterCoeffs_eAntiFlutterSharp */ |
|---|
| 771 | }; |
|---|
| 772 | |
|---|
| 773 | /***************************************************************************/ |
|---|
| 774 | /* TABLE OF FIR FILTER TABLE RETRIEVAL FUNCTIONS */ |
|---|
| 775 | /***************************************************************************/ |
|---|
| 776 | typedef const uint32_t *(*GetFilterCoefficients)( uint32_t ulScalerStep ); |
|---|
| 777 | |
|---|
| 778 | static const uint32_t *BGRC_P_GetFilterCoefficients_PointSample( uint32_t ulScalerStep ); |
|---|
| 779 | static const uint32_t *BGRC_P_GetFilterCoefficients_Bilinear( uint32_t ulScalerStep ); |
|---|
| 780 | static const uint32_t *BGRC_P_GetFilterCoefficients_Anisotropic( uint32_t ulScalerStep ); |
|---|
| 781 | static const uint32_t *BGRC_P_GetFilterCoefficients_Sharp( uint32_t ulScalerStep ); |
|---|
| 782 | static const uint32_t *BGRC_P_GetFilterCoefficients_Sharper( uint32_t ulScalerStep ); |
|---|
| 783 | static const uint32_t *BGRC_P_GetFilterCoefficients_Blurry( uint32_t ulScalerStep ); |
|---|
| 784 | static const uint32_t *BGRC_P_GetFilterCoefficients_AntiFlutter( uint32_t ulScalerStep ); |
|---|
| 785 | static const uint32_t *BGRC_P_GetFilterCoefficients_AntiFlutterBlurry( uint32_t ulScalerStep ); |
|---|
| 786 | static const uint32_t *BGRC_P_GetFilterCoefficients_AntiFlutterSharp( uint32_t ulScalerStep ); |
|---|
| 787 | |
|---|
| 788 | /***************************************************************************/ |
|---|
| 789 | static const GetFilterCoefficients BGRC_P_GET_FILTER_COEFFICIENTS[] = |
|---|
| 790 | { |
|---|
| 791 | BGRC_P_GetFilterCoefficients_PointSample, |
|---|
| 792 | BGRC_P_GetFilterCoefficients_Bilinear, |
|---|
| 793 | BGRC_P_GetFilterCoefficients_Anisotropic, |
|---|
| 794 | BGRC_P_GetFilterCoefficients_Sharp, |
|---|
| 795 | BGRC_P_GetFilterCoefficients_Sharper, |
|---|
| 796 | BGRC_P_GetFilterCoefficients_Blurry, |
|---|
| 797 | BGRC_P_GetFilterCoefficients_AntiFlutter, |
|---|
| 798 | BGRC_P_GetFilterCoefficients_AntiFlutterBlurry, |
|---|
| 799 | BGRC_P_GetFilterCoefficients_AntiFlutterSharp |
|---|
| 800 | }; |
|---|
| 801 | |
|---|
| 802 | /***************************************************************************/ |
|---|
| 803 | /* FUNCTIONS FOR RETRIEVING FIR FILTER COEFFICIENT TABLES */ |
|---|
| 804 | /***************************************************************************/ |
|---|
| 805 | static const uint32_t *BGRC_P_GetFilterCoefficients_PointSample( |
|---|
| 806 | uint32_t ulScalerStep ) |
|---|
| 807 | { |
|---|
| 808 | BSTD_UNUSED( ulScalerStep ); |
|---|
| 809 | |
|---|
| 810 | return (uint32_t *) BGRC_P_FIRCOEFF_POINTSAMPLE; |
|---|
| 811 | } |
|---|
| 812 | |
|---|
| 813 | /***************************************************************************/ |
|---|
| 814 | static const uint32_t *BGRC_P_GetFilterCoefficients_Bilinear( |
|---|
| 815 | uint32_t ulScalerStep ) |
|---|
| 816 | { |
|---|
| 817 | BSTD_UNUSED( ulScalerStep ); |
|---|
| 818 | |
|---|
| 819 | return (uint32_t *) BGRC_P_FIRCOEFF_BILINEAR; |
|---|
| 820 | } |
|---|
| 821 | |
|---|
| 822 | /***************************************************************************/ |
|---|
| 823 | static const uint32_t *BGRC_P_GetFilterCoefficients_Blurry( |
|---|
| 824 | uint32_t ulScalerStep ) |
|---|
| 825 | { |
|---|
| 826 | BSTD_UNUSED( ulScalerStep ); |
|---|
| 827 | |
|---|
| 828 | return (uint32_t *) BGRC_P_FIRCOEFF_BLURRY_3to1; |
|---|
| 829 | } |
|---|
| 830 | |
|---|
| 831 | /***************************************************************************/ |
|---|
| 832 | static const uint32_t *BGRC_P_GetFilterCoefficients_Anisotropic( |
|---|
| 833 | uint32_t ulScalerStep ) |
|---|
| 834 | { |
|---|
| 835 | if( ulScalerStep < (2 << BGRC_P_SCALER_STEP_FRAC_BITS) ) |
|---|
| 836 | return (uint32_t *) BGRC_P_FIRCOEFF_ANISOTROPIC_1to1; |
|---|
| 837 | else if( ulScalerStep < (3 << BGRC_P_SCALER_STEP_FRAC_BITS) ) |
|---|
| 838 | return (uint32_t *) BGRC_P_FIRCOEFF_ANISOTROPIC_2to1; |
|---|
| 839 | else if( ulScalerStep < (4 << BGRC_P_SCALER_STEP_FRAC_BITS) ) |
|---|
| 840 | return (uint32_t *) BGRC_P_FIRCOEFF_ANISOTROPIC_3to1; |
|---|
| 841 | else if( ulScalerStep < (5 << BGRC_P_SCALER_STEP_FRAC_BITS) ) |
|---|
| 842 | return (uint32_t *) BGRC_P_FIRCOEFF_ANISOTROPIC_4to1; |
|---|
| 843 | else if( ulScalerStep < (6 << BGRC_P_SCALER_STEP_FRAC_BITS) ) |
|---|
| 844 | return (uint32_t *) BGRC_P_FIRCOEFF_ANISOTROPIC_5to1; |
|---|
| 845 | else if( ulScalerStep < (7 << BGRC_P_SCALER_STEP_FRAC_BITS) ) |
|---|
| 846 | return (uint32_t *) BGRC_P_FIRCOEFF_ANISOTROPIC_6to1; |
|---|
| 847 | else if( ulScalerStep < (8 << BGRC_P_SCALER_STEP_FRAC_BITS) ) |
|---|
| 848 | return (uint32_t *) BGRC_P_FIRCOEFF_ANISOTROPIC_7to1; |
|---|
| 849 | else |
|---|
| 850 | return (uint32_t *) BGRC_P_FIRCOEFF_ANISOTROPIC_8to1; |
|---|
| 851 | } |
|---|
| 852 | |
|---|
| 853 | /***************************************************************************/ |
|---|
| 854 | static const uint32_t *BGRC_P_GetFilterCoefficients_Sharp( |
|---|
| 855 | uint32_t ulScalerStep ) |
|---|
| 856 | { |
|---|
| 857 | if( ulScalerStep < ((8 << BGRC_P_SCALER_STEP_FRAC_BITS) / 9) ) |
|---|
| 858 | return (uint32_t *) BGRC_P_FIRCOEFF_SHARP_1toN; |
|---|
| 859 | else if( ulScalerStep < ((8 << BGRC_P_SCALER_STEP_FRAC_BITS) / 8) ) |
|---|
| 860 | return (uint32_t *) BGRC_P_FIRCOEFF_SHARP_8to9; |
|---|
| 861 | else if( ulScalerStep < ((8 << BGRC_P_SCALER_STEP_FRAC_BITS) / 7) ) |
|---|
| 862 | return (uint32_t *) BGRC_P_FIRCOEFF_SHARP_8to8; |
|---|
| 863 | else if( ulScalerStep < ((8 << BGRC_P_SCALER_STEP_FRAC_BITS) / 6) ) |
|---|
| 864 | return (uint32_t *) BGRC_P_FIRCOEFF_SHARP_8to7; |
|---|
| 865 | else if( ulScalerStep < ((8 << BGRC_P_SCALER_STEP_FRAC_BITS) / 5) ) |
|---|
| 866 | return (uint32_t *) BGRC_P_FIRCOEFF_SHARP_8to6; |
|---|
| 867 | else if( ulScalerStep < ((8 << BGRC_P_SCALER_STEP_FRAC_BITS) / 4) ) |
|---|
| 868 | return (uint32_t *) BGRC_P_FIRCOEFF_SHARP_8to5; |
|---|
| 869 | else if( ulScalerStep < ((8 << BGRC_P_SCALER_STEP_FRAC_BITS) / 3) ) |
|---|
| 870 | return (uint32_t *) BGRC_P_FIRCOEFF_SHARP_8to4; |
|---|
| 871 | else if( ulScalerStep < ((8 << BGRC_P_SCALER_STEP_FRAC_BITS) / 2) ) |
|---|
| 872 | return (uint32_t *) BGRC_P_FIRCOEFF_SHARP_8to3; |
|---|
| 873 | else if( ulScalerStep < ((8 << BGRC_P_SCALER_STEP_FRAC_BITS) / 1) ) |
|---|
| 874 | return (uint32_t *) BGRC_P_FIRCOEFF_SHARP_8to2; |
|---|
| 875 | else |
|---|
| 876 | return (uint32_t *) BGRC_P_FIRCOEFF_SHARP_8to1; |
|---|
| 877 | } |
|---|
| 878 | |
|---|
| 879 | /***************************************************************************/ |
|---|
| 880 | static const uint32_t *BGRC_P_GetFilterCoefficients_Sharper( |
|---|
| 881 | uint32_t ulScalerStep ) |
|---|
| 882 | { |
|---|
| 883 | if( ulScalerStep < ((8 << BGRC_P_SCALER_STEP_FRAC_BITS) / 9) ) |
|---|
| 884 | return (uint32_t *) BGRC_P_FIRCOEFF_SHARPER_1toN; |
|---|
| 885 | else if( ulScalerStep < ((8 << BGRC_P_SCALER_STEP_FRAC_BITS) / 8) ) |
|---|
| 886 | return (uint32_t *) BGRC_P_FIRCOEFF_SHARP_8to9; |
|---|
| 887 | else if( ulScalerStep < ((8 << BGRC_P_SCALER_STEP_FRAC_BITS) / 7) ) |
|---|
| 888 | return (uint32_t *) BGRC_P_FIRCOEFF_SHARP_8to8; |
|---|
| 889 | else if( ulScalerStep < ((8 << BGRC_P_SCALER_STEP_FRAC_BITS) / 6) ) |
|---|
| 890 | return (uint32_t *) BGRC_P_FIRCOEFF_SHARP_8to7; |
|---|
| 891 | else if( ulScalerStep < ((8 << BGRC_P_SCALER_STEP_FRAC_BITS) / 5) ) |
|---|
| 892 | return (uint32_t *) BGRC_P_FIRCOEFF_SHARP_8to6; |
|---|
| 893 | else if( ulScalerStep < ((8 << BGRC_P_SCALER_STEP_FRAC_BITS) / 4) ) |
|---|
| 894 | return (uint32_t *) BGRC_P_FIRCOEFF_SHARP_8to5; |
|---|
| 895 | else if( ulScalerStep < ((8 << BGRC_P_SCALER_STEP_FRAC_BITS) / 3) ) |
|---|
| 896 | return (uint32_t *) BGRC_P_FIRCOEFF_SHARP_8to4; |
|---|
| 897 | else if( ulScalerStep < ((8 << BGRC_P_SCALER_STEP_FRAC_BITS) / 2) ) |
|---|
| 898 | return (uint32_t *) BGRC_P_FIRCOEFF_SHARP_8to3; |
|---|
| 899 | else if( ulScalerStep < ((8 << BGRC_P_SCALER_STEP_FRAC_BITS) / 1) ) |
|---|
| 900 | return (uint32_t *) BGRC_P_FIRCOEFF_SHARP_8to2; |
|---|
| 901 | else |
|---|
| 902 | return (uint32_t *) BGRC_P_FIRCOEFF_SHARP_8to1; |
|---|
| 903 | } |
|---|
| 904 | |
|---|
| 905 | /***************************************************************************/ |
|---|
| 906 | static const uint32_t *BGRC_P_GetFilterCoefficients_AntiFlutter( |
|---|
| 907 | uint32_t ulScalerStep ) |
|---|
| 908 | { |
|---|
| 909 | if( ulScalerStep == (1 << BGRC_P_SCALER_STEP_FRAC_BITS) ) |
|---|
| 910 | return (uint32_t *) BGRC_P_FIRCOEFF_ANTIFLUTTER; |
|---|
| 911 | else |
|---|
| 912 | return (uint32_t *) BGRC_P_FIRCOEFF_ANTIFLUTTERSCALE; |
|---|
| 913 | } |
|---|
| 914 | |
|---|
| 915 | /***************************************************************************/ |
|---|
| 916 | static const uint32_t *BGRC_P_GetFilterCoefficients_AntiFlutterBlurry( |
|---|
| 917 | uint32_t ulScalerStep ) |
|---|
| 918 | { |
|---|
| 919 | if( ulScalerStep == (1 << BGRC_P_SCALER_STEP_FRAC_BITS) ) |
|---|
| 920 | return (uint32_t *) BGRC_P_FIRCOEFF_ANTIFLUTTERBLURRY; |
|---|
| 921 | else |
|---|
| 922 | return (uint32_t *) BGRC_P_FIRCOEFF_ANTIFLUTTERSCALE; |
|---|
| 923 | } |
|---|
| 924 | |
|---|
| 925 | /***************************************************************************/ |
|---|
| 926 | static const uint32_t *BGRC_P_GetFilterCoefficients_AntiFlutterSharp( |
|---|
| 927 | uint32_t ulScalerStep ) |
|---|
| 928 | { |
|---|
| 929 | if( ulScalerStep == (1 << BGRC_P_SCALER_STEP_FRAC_BITS) ) |
|---|
| 930 | return (uint32_t *) BGRC_P_FIRCOEFF_ANTIFLUTTERSHARP; |
|---|
| 931 | else |
|---|
| 932 | return (uint32_t *) BGRC_P_FIRCOEFF_ANTIFLUTTERSHARP; |
|---|
| 933 | } |
|---|
| 934 | |
|---|
| 935 | /***************************************************************************/ |
|---|
| 936 | static const uint8_t BGRC_P_BLEND_OP[] = |
|---|
| 937 | { |
|---|
| 938 | BGRC_M2MC(BLEND_COLOR_OP_OP_A_ZERO), /* eZero */ |
|---|
| 939 | BGRC_M2MC(BLEND_COLOR_OP_OP_A_HALF), /* eHalf */ |
|---|
| 940 | BGRC_M2MC(BLEND_COLOR_OP_OP_A_ZERO), /* eOne */ |
|---|
| 941 | BGRC_M2MC(BLEND_COLOR_OP_OP_A_SOURCE_COLOR), /* eSourceColor */ |
|---|
| 942 | BGRC_M2MC(BLEND_COLOR_OP_OP_A_SOURCE_COLOR), /* eInverseSourceColor */ |
|---|
| 943 | BGRC_M2MC(BLEND_COLOR_OP_OP_A_SOURCE_ALPHA), /* eSourceAlpha */ |
|---|
| 944 | BGRC_M2MC(BLEND_COLOR_OP_OP_A_SOURCE_ALPHA), /* eInverseSourceAlpha */ |
|---|
| 945 | BGRC_M2MC(BLEND_COLOR_OP_OP_A_DEST_COLOR), /* eDestinationColor */ |
|---|
| 946 | BGRC_M2MC(BLEND_COLOR_OP_OP_A_DEST_COLOR), /* eInverseDestinationColor */ |
|---|
| 947 | BGRC_M2MC(BLEND_COLOR_OP_OP_A_DEST_ALPHA), /* eDestinationAlpha */ |
|---|
| 948 | BGRC_M2MC(BLEND_COLOR_OP_OP_A_DEST_ALPHA), /* eInverseDestinationAlpha */ |
|---|
| 949 | BGRC_M2MC(BLEND_COLOR_OP_OP_A_CONSTANT_COLOR), /* eConstantColor */ |
|---|
| 950 | BGRC_M2MC(BLEND_COLOR_OP_OP_A_CONSTANT_COLOR), /* eInverseConstantColor */ |
|---|
| 951 | BGRC_M2MC(BLEND_COLOR_OP_OP_A_CONSTANT_ALPHA), /* eConstantAlpha */ |
|---|
| 952 | BGRC_M2MC(BLEND_COLOR_OP_OP_A_CONSTANT_ALPHA) /* eInverseConstantAlpha */ |
|---|
| 953 | }; |
|---|
| 954 | |
|---|
| 955 | /***************************************************************************/ |
|---|
| 956 | static const uint8_t BGRC_P_BLEND_OP_INV[] = |
|---|
| 957 | { |
|---|
| 958 | 0, /* eZero */ |
|---|
| 959 | 0, /* eHalf */ |
|---|
| 960 | 1, /* eOne */ |
|---|
| 961 | 0, /* eSourceColor */ |
|---|
| 962 | 1, /* eInverseSourceColor */ |
|---|
| 963 | 0, /* eSourceAlpha */ |
|---|
| 964 | 1, /* eInverseSourceAlpha */ |
|---|
| 965 | 0, /* eDestinationColor */ |
|---|
| 966 | 1, /* eInverseDestinationColor */ |
|---|
| 967 | 0, /* eDestinationAlpha */ |
|---|
| 968 | 1, /* eInverseDestinationAlpha */ |
|---|
| 969 | 0, /* eConstantColor */ |
|---|
| 970 | 1, /* eInverseConstantColor */ |
|---|
| 971 | 0, /* eConstantAlpha */ |
|---|
| 972 | 1 /* eInverseConstantAlpha */ |
|---|
| 973 | }; |
|---|
| 974 | |
|---|
| 975 | /***************************************************************************/ |
|---|
| 976 | uint32_t BGRC_P_GetBlendOp( |
|---|
| 977 | BGRC_Blend_Source eSource ) |
|---|
| 978 | { |
|---|
| 979 | return BGRC_P_BLEND_OP[eSource]; |
|---|
| 980 | } |
|---|
| 981 | |
|---|
| 982 | /***************************************************************************/ |
|---|
| 983 | uint32_t BGRC_P_GetBlendOpInv( |
|---|
| 984 | BGRC_Blend_Source eSource ) |
|---|
| 985 | { |
|---|
| 986 | return BGRC_P_BLEND_OP_INV[eSource]; |
|---|
| 987 | } |
|---|
| 988 | |
|---|
| 989 | /***************************************************************************/ |
|---|
| 990 | /* BLIT FUNCTIONS */ |
|---|
| 991 | /***************************************************************************/ |
|---|
| 992 | BERR_Code BGRC_P_Blit( |
|---|
| 993 | BGRC_Handle hGrc, |
|---|
| 994 | BGRC_Callback pUserCallback, |
|---|
| 995 | void *pUserData, |
|---|
| 996 | bool bSetEvent ) |
|---|
| 997 | { |
|---|
| 998 | BGRC_P_Operation *pOp; |
|---|
| 999 | BGRC_P_Block *pBlock = NULL; |
|---|
| 1000 | uint32_t ulPacketHeader; |
|---|
| 1001 | uint32_t ulPacketSize = 0; |
|---|
| 1002 | uint32_t ulPacketOffset = 0; |
|---|
| 1003 | uint32_t *pulPacket; |
|---|
| 1004 | BERR_Code err; |
|---|
| 1005 | |
|---|
| 1006 | BKNI_ResetEvent( hGrc->hPeriodicEvent ); |
|---|
| 1007 | |
|---|
| 1008 | /* prepare packet */ |
|---|
| 1009 | err = BGRC_P_List_PreparePacket( hGrc, (pUserCallback || bSetEvent || hGrc->bPeriodicInterrupt) ? true : false ); |
|---|
| 1010 | if( err != BERR_SUCCESS ) |
|---|
| 1011 | return err; |
|---|
| 1012 | |
|---|
| 1013 | ulPacketHeader = hGrc->aulCurrentRegs[BGRC_P_REG_INDEX(LIST_PACKET_HEADER_1)]; |
|---|
| 1014 | |
|---|
| 1015 | /* free unused memory that is over the allocation limit */ |
|---|
| 1016 | BGRC_P_Operation_CleanupList( hGrc ); |
|---|
| 1017 | BGRC_P_List_CleanupPacketMemory( hGrc ); |
|---|
| 1018 | |
|---|
| 1019 | /* allocate packet */ |
|---|
| 1020 | pulPacket = BGRC_P_List_AllocPacket( hGrc, ulPacketHeader, &ulPacketOffset, &ulPacketSize, &pBlock ); |
|---|
| 1021 | if( pulPacket == NULL ) |
|---|
| 1022 | return BERR_OUT_OF_DEVICE_MEMORY; |
|---|
| 1023 | |
|---|
| 1024 | /* allocate operation */ |
|---|
| 1025 | pOp = BGRC_P_Operation_Alloc( hGrc, pUserCallback, pUserData, pBlock, ulPacketOffset, bSetEvent ); |
|---|
| 1026 | if( pOp == NULL ) |
|---|
| 1027 | { |
|---|
| 1028 | hGrc->pCurrListBlock->ulRefCount--; |
|---|
| 1029 | return BERR_OUT_OF_SYSTEM_MEMORY; |
|---|
| 1030 | } |
|---|
| 1031 | |
|---|
| 1032 | /* set periodic event */ |
|---|
| 1033 | if( hGrc->bPeriodicInterrupt ) |
|---|
| 1034 | { |
|---|
| 1035 | pOp->bSetPeriodicEvent = true; |
|---|
| 1036 | hGrc->bPeriodicInterrupt = false; |
|---|
| 1037 | } |
|---|
| 1038 | |
|---|
| 1039 | /* add operation to list */ |
|---|
| 1040 | BKNI_EnterCriticalSection(); |
|---|
| 1041 | BGRC_P_Operation_AddToList( hGrc, pOp ); |
|---|
| 1042 | |
|---|
| 1043 | /* write packet */ |
|---|
| 1044 | BGRC_P_List_WritePacket( hGrc, pulPacket, ulPacketHeader ); |
|---|
| 1045 | |
|---|
| 1046 | #if 0 |
|---|
| 1047 | /* flush memory writes for register data */ |
|---|
| 1048 | BMEM_FlushCache( hGrc->hMemory, pulPacket, ulPacketSize ); |
|---|
| 1049 | #endif |
|---|
| 1050 | |
|---|
| 1051 | /* initiate packet */ |
|---|
| 1052 | BGRC_P_List_RenderPacket( hGrc, ulPacketOffset ); |
|---|
| 1053 | BKNI_LeaveCriticalSection(); |
|---|
| 1054 | |
|---|
| 1055 | /* disable loading of all register groups */ |
|---|
| 1056 | BGRC_P_SET_FIELD_ENUM( LIST_PACKET_HEADER_1, SRC_FEEDER_GRP_CNTRL, GRP_DISABLE ); |
|---|
| 1057 | BGRC_P_SET_FIELD_ENUM( LIST_PACKET_HEADER_1, DST_FEEDER_GRP_CNTRL, GRP_DISABLE ); |
|---|
| 1058 | BGRC_P_SET_FIELD_ENUM( LIST_PACKET_HEADER_1, OUTPUT_FEEDER_GRP_CNTRL, GRP_DISABLE ); |
|---|
| 1059 | BGRC_P_SET_FIELD_ENUM( LIST_PACKET_HEADER_1, SRC_COLOR_KEY_GRP_CNTRL, GRP_DISABLE ); |
|---|
| 1060 | BGRC_P_SET_FIELD_ENUM( LIST_PACKET_HEADER_1, DST_COLOR_KEY_GRP_CNTRL, GRP_DISABLE ); |
|---|
| 1061 | BGRC_P_SET_FIELD_ENUM( LIST_PACKET_HEADER_1, SRC_COLOR_MATRIX_GRP_CNTRL, GRP_DISABLE ); |
|---|
| 1062 | BGRC_P_SET_FIELD_ENUM( LIST_PACKET_HEADER_1, DST_COLOR_MATRIX_GRP_CNTRL, GRP_DISABLE ); |
|---|
| 1063 | BGRC_P_SET_FIELD_ENUM( LIST_PACKET_HEADER_1, OUTPUT_COLOR_MATRIX_GRP_CNTRL, GRP_DISABLE ); |
|---|
| 1064 | BGRC_P_SET_FIELD_ENUM( LIST_PACKET_HEADER_1, SCALE_PARAM_GRP_CNTRL, GRP_DISABLE ); |
|---|
| 1065 | BGRC_P_SET_FIELD_ENUM( LIST_PACKET_HEADER_1, SCALE_COEF_GRP_CNTRL, GRP_DISABLE ); |
|---|
| 1066 | BGRC_P_SET_FIELD_ENUM( LIST_PACKET_HEADER_1, BLEND_PARAM_GRP_CNTRL, GRP_DISABLE ); |
|---|
| 1067 | BGRC_P_SET_FIELD_ENUM( LIST_PACKET_HEADER_1, BLIT_GRP_CNTRL, GRP_DISABLE ); |
|---|
| 1068 | BGRC_P_SET_FIELD_ENUM( LIST_PACKET_HEADER_1, ROP_GRP_CNTRL, GRP_DISABLE ); |
|---|
| 1069 | BGRC_P_SET_FIELD_ENUM( LIST_PACKET_HEADER_1, SRC_CLUT_GRP_CNTRL, GRP_DISABLE ); |
|---|
| 1070 | BGRC_P_SET_FIELD_ENUM( LIST_PACKET_HEADER_1, DST_CLUT_GRP_CNTRL, GRP_DISABLE ); |
|---|
| 1071 | |
|---|
| 1072 | /* store some previous packet information */ |
|---|
| 1073 | hGrc->pulPrevPacket = pulPacket; |
|---|
| 1074 | hGrc->pPrevUserCallback = pUserCallback; |
|---|
| 1075 | |
|---|
| 1076 | return BERR_SUCCESS; |
|---|
| 1077 | } |
|---|
| 1078 | |
|---|
| 1079 | /***************************************************************************/ |
|---|
| 1080 | #define BGRC_P_FIXED_SHIFT_RIGHT( data, shift ) \ |
|---|
| 1081 | (((data) >> (shift)) | (((data) & 0x80000000) ? ~(0xFFFFFFFF >> (shift)) : 0)) |
|---|
| 1082 | |
|---|
| 1083 | /***************************************************************************/ |
|---|
| 1084 | BERR_Code BGRC_P_FilterBlit( |
|---|
| 1085 | BGRC_Handle hGrc, |
|---|
| 1086 | BGRC_Callback pCallback, |
|---|
| 1087 | void *pData, |
|---|
| 1088 | bool bSetEvent ) |
|---|
| 1089 | { |
|---|
| 1090 | BGRC_P_State *pState = &hGrc->CurrentState; |
|---|
| 1091 | BERR_Code err; |
|---|
| 1092 | |
|---|
| 1093 | uint32_t ulSrcWidth = pState->SrcSurface.ulWidth; |
|---|
| 1094 | uint32_t ulOutWidth = pState->OutSurface.ulWidth; |
|---|
| 1095 | uint32_t ulSrcHeight = pState->SrcSurface.ulHeight; |
|---|
| 1096 | uint32_t ulOutHeight = pState->OutSurface.ulHeight; |
|---|
| 1097 | uint32_t ulHorzScalerStep; |
|---|
| 1098 | uint32_t ulVertScalerStep; |
|---|
| 1099 | |
|---|
| 1100 | /* set averager count and coefficient values */ |
|---|
| 1101 | pState->ulHorzAveragerCount = 1; |
|---|
| 1102 | pState->ulHorzAveragerCoeff = 1 << BGRC_P_AVERAGER_COEFF_FRAC_BITS; |
|---|
| 1103 | pState->ulVertAveragerCount = 1; |
|---|
| 1104 | pState->ulVertAveragerCoeff = 1 << BGRC_P_AVERAGER_COEFF_FRAC_BITS; |
|---|
| 1105 | |
|---|
| 1106 | #if ((BCHP_CHIP==7038) && (BCHP_VER < BCHP_VER_C0)) |
|---|
| 1107 | while( ulSrcWidth > ulOutWidth * 8 ) |
|---|
| 1108 | { |
|---|
| 1109 | ulSrcWidth /= 2; |
|---|
| 1110 | pState->ulHorzAveragerCount *= 2; |
|---|
| 1111 | pState->ulHorzAveragerCoeff /= 2; |
|---|
| 1112 | } |
|---|
| 1113 | |
|---|
| 1114 | while( ulSrcHeight > ulOutHeight * 8 ) |
|---|
| 1115 | { |
|---|
| 1116 | ulSrcHeight /= 2; |
|---|
| 1117 | pState->ulVertAveragerCount *= 2; |
|---|
| 1118 | pState->ulVertAveragerCoeff /= 2; |
|---|
| 1119 | } |
|---|
| 1120 | |
|---|
| 1121 | ulSrcWidth = pState->SrcSurface.ulWidth; |
|---|
| 1122 | ulSrcHeight = pState->SrcSurface.ulHeight; |
|---|
| 1123 | #else |
|---|
| 1124 | if( (ulSrcWidth > ulOutWidth * BGRC_P_SCALE_DOWN_MAX) || |
|---|
| 1125 | (ulSrcHeight > ulOutHeight * BGRC_P_SCALE_DOWN_MAX) ) |
|---|
| 1126 | return BERR_TRACE(BGRC_ERR_MAX_SCALE_DOWN_LIMIT_EXCEEDED); |
|---|
| 1127 | #endif |
|---|
| 1128 | |
|---|
| 1129 | /* set scaler step and initial phase values */ |
|---|
| 1130 | if( ((ulSrcWidth << BGRC_P_SCALER_STEP_FRAC_BITS) >> BGRC_P_SCALER_STEP_FRAC_BITS) != ulSrcWidth ) |
|---|
| 1131 | ulHorzScalerStep = ((ulSrcWidth / 2) << BGRC_P_SCALER_STEP_FRAC_BITS) / (ulOutWidth / 2); |
|---|
| 1132 | else |
|---|
| 1133 | ulHorzScalerStep = (ulSrcWidth << BGRC_P_SCALER_STEP_FRAC_BITS) / ulOutWidth; |
|---|
| 1134 | |
|---|
| 1135 | if( ((ulSrcHeight << BGRC_P_SCALER_STEP_FRAC_BITS) >> BGRC_P_SCALER_STEP_FRAC_BITS) != ulSrcHeight ) |
|---|
| 1136 | ulVertScalerStep = ((ulSrcHeight / 2) << BGRC_P_SCALER_STEP_FRAC_BITS) / (ulOutHeight / 2); |
|---|
| 1137 | else |
|---|
| 1138 | ulVertScalerStep = (ulSrcHeight << BGRC_P_SCALER_STEP_FRAC_BITS) / ulOutHeight; |
|---|
| 1139 | |
|---|
| 1140 | if ( (pState->ulHorzScalerDen == 0) || (pState->ulHorzScalerNum == 0) ) |
|---|
| 1141 | pState->ulHorzScalerStep = ulHorzScalerStep; |
|---|
| 1142 | else |
|---|
| 1143 | pState->ulHorzScalerStep = (pState->ulHorzScalerNum << BGRC_P_SCALER_STEP_FRAC_BITS) / pState->ulHorzScalerDen; |
|---|
| 1144 | |
|---|
| 1145 | if ( (pState->ulVertScalerDen == 0) || (pState->ulVertScalerNum == 0) ) |
|---|
| 1146 | pState->ulVertScalerStep = ulVertScalerStep; |
|---|
| 1147 | else |
|---|
| 1148 | pState->ulVertScalerStep = (pState->ulVertScalerNum << BGRC_P_SCALER_STEP_FRAC_BITS) / pState->ulVertScalerDen; |
|---|
| 1149 | |
|---|
| 1150 | pState->ulOverlapStrip = 0; |
|---|
| 1151 | |
|---|
| 1152 | /* set initial phases */ |
|---|
| 1153 | pState->ulHorzInitPhase = BGRC_P_FIXED_SHIFT_RIGHT(pState->ulHorzScalerStep - BGRC_P_SCALER_STEP_FRAC_MASK - 1, 1) + |
|---|
| 1154 | (pState->iHorzPhaseAdj << (BGRC_P_SCALER_STEP_FRAC_BITS - pState->ulPhaseShift)); |
|---|
| 1155 | pState->ulVertInitPhase = BGRC_P_FIXED_SHIFT_RIGHT(pState->ulVertScalerStep - BGRC_P_SCALER_STEP_FRAC_MASK - 1, 1) + |
|---|
| 1156 | (pState->iVertPhaseAdj << (BGRC_P_SCALER_STEP_FRAC_BITS - pState->ulPhaseShift)); |
|---|
| 1157 | |
|---|
| 1158 | /* check if both src and out widths are greater than max striping width */ |
|---|
| 1159 | if( (ulSrcWidth > BGRC_P_STRIP_WIDTH_MAX) && (ulOutWidth > BGRC_P_STRIP_WIDTH_MAX) ) |
|---|
| 1160 | { |
|---|
| 1161 | bool bSrcYCbCr422 = BPXL_IS_YCbCr422_FORMAT(pState->SrcSurface.eFormat) | |
|---|
| 1162 | BPXL_IS_YCbCr420_FORMAT(pState->SrcSurface.eFormat); |
|---|
| 1163 | bool bOutYCbCr422 = BPXL_IS_YCbCr422_FORMAT(pState->OutSurface.eFormat); |
|---|
| 1164 | |
|---|
| 1165 | #if ((BCHP_CHIP!=7038) || (BCHP_VER >= BCHP_VER_C0)) |
|---|
| 1166 | |
|---|
| 1167 | #ifdef BGRC_P_SW_STRIPE_SCALE_YCBCR42X |
|---|
| 1168 | if( (pState->DstSurface.hSurface == NULL) && (!hGrc->bYCbCr420Source) && (!bSrcYCbCr422) && |
|---|
| 1169 | #else |
|---|
| 1170 | if( (pState->DstSurface.hSurface == NULL) && (!bSrcYCbCr422) && |
|---|
| 1171 | #endif |
|---|
| 1172 | (ulOutHeight * BGRC_P_SCALE_DOWN_MAX_Y >= ulSrcHeight) ) |
|---|
| 1173 | { |
|---|
| 1174 | /* setup hardware striping */ |
|---|
| 1175 | uint32_t ulOverlap = ((pState->ulHorzScalerStep + BGRC_P_SCALER_STEP_FRAC_MASK) >> BGRC_P_SCALER_STEP_FRAC_BITS); |
|---|
| 1176 | uint32_t ulOverlapClamp = BGRC_P_MIN(ulOverlap + BGRC_P_FIR_OVERLAP_MIN, BGRC_P_FIR_OVERLAP_MIN * 2); |
|---|
| 1177 | uint32_t ulStripWidth = BGRC_P_STRIP_WIDTH_MAX - ulOverlapClamp * 2; |
|---|
| 1178 | if( ulSrcWidth < ulOutWidth ) |
|---|
| 1179 | { |
|---|
| 1180 | pState->ulHorzScalerStep--; |
|---|
| 1181 | if( pState->ulHorzScalerNum && pState->ulHorzScalerDen ) |
|---|
| 1182 | pState->ulOutStripWidth = (ulStripWidth * pState->ulHorzScalerDen) / pState->ulHorzScalerNum; |
|---|
| 1183 | else |
|---|
| 1184 | pState->ulOutStripWidth = (ulStripWidth * ulOutWidth) / ulSrcWidth; |
|---|
| 1185 | } |
|---|
| 1186 | else |
|---|
| 1187 | { |
|---|
| 1188 | pState->ulOutStripWidth = ulStripWidth; |
|---|
| 1189 | } |
|---|
| 1190 | |
|---|
| 1191 | if( (ulOutWidth % pState->ulOutStripWidth) <= ulOverlapClamp ) |
|---|
| 1192 | pState->ulOutStripWidth -= ulOverlapClamp; |
|---|
| 1193 | |
|---|
| 1194 | if( bOutYCbCr422 && (pState->ulOutStripWidth & 1) ) |
|---|
| 1195 | { |
|---|
| 1196 | pState->ulOutStripWidth--; |
|---|
| 1197 | if( (ulOutWidth % pState->ulOutStripWidth) == 0 ) |
|---|
| 1198 | pState->ulOutStripWidth -= 2; |
|---|
| 1199 | } |
|---|
| 1200 | |
|---|
| 1201 | #if defined(BCHP_M2MC_BLIT_CTRL_BLOCK_AUTO_SPLIT_FIFO_MASK) |
|---|
| 1202 | { |
|---|
| 1203 | /* make sure last stripe is less pixels than the rest */ |
|---|
| 1204 | uint32_t scale_factor = ((BGRC_P_SCALER_STEP_FRAC_MASK+1) << 2) / ulHorzScalerStep; |
|---|
| 1205 | if( pState->ulOutStripWidth && ((ulOutWidth % pState->ulOutStripWidth) >= pState->ulOutStripWidth - scale_factor) ) |
|---|
| 1206 | pState->ulOutStripWidth += 2; |
|---|
| 1207 | } |
|---|
| 1208 | #endif |
|---|
| 1209 | |
|---|
| 1210 | pState->ulSrcStripWidth = (pState->ulOutStripWidth * ulHorzScalerStep) >> BGRC_P_SCALER_STEP_TO_STRIPE_WIDTH_SHIFT; |
|---|
| 1211 | pState->ulOverlapStrip = ulOverlapClamp; |
|---|
| 1212 | } |
|---|
| 1213 | else |
|---|
| 1214 | #endif |
|---|
| 1215 | { |
|---|
| 1216 | uint32_t ulSrcX = pState->SrcSurface.ulX; |
|---|
| 1217 | uint32_t ulStripWidth; |
|---|
| 1218 | uint32_t ulStripCount; |
|---|
| 1219 | uint32_t ulSrcPadLeft; |
|---|
| 1220 | uint32_t ulSrcPadRight; |
|---|
| 1221 | uint32_t ii; |
|---|
| 1222 | |
|---|
| 1223 | /* calculate fixed shift for large source widths */ |
|---|
| 1224 | uint32_t ulFixedLeft; |
|---|
| 1225 | uint32_t ulFixedRight; |
|---|
| 1226 | uint32_t ulFixedShift = 0; |
|---|
| 1227 | if ( (pState->ulHorzScalerDen == 0) || (pState->ulHorzScalerNum == 0) ) |
|---|
| 1228 | { |
|---|
| 1229 | uint32_t ulSrcSize = ulSrcWidth; |
|---|
| 1230 | while( ((ulSrcSize << (BGRC_P_SCALER_STEP_FRAC_BITS + 1)) >> (BGRC_P_SCALER_STEP_FRAC_BITS + 1)) != ulSrcSize ) |
|---|
| 1231 | { |
|---|
| 1232 | ulSrcSize /= 2; |
|---|
| 1233 | ulFixedShift++;; |
|---|
| 1234 | } |
|---|
| 1235 | } |
|---|
| 1236 | |
|---|
| 1237 | /* break scale into multiple vertical strip blits */ |
|---|
| 1238 | /* ulFixedLeft = (pState->ulHorzInitPhase & BCHP_M2MC_HORIZ_SCALER_INITIAL_PHASE_PHASE_MASK) >> ulFixedShift;*/ |
|---|
| 1239 | ulFixedLeft = pState->ulHorzInitPhase >> ulFixedShift; |
|---|
| 1240 | ulStripWidth = (ulSrcWidth > ulOutWidth) ? (BGRC_P_STRIP_WIDTH_MAX - 4) : (((BGRC_P_STRIP_WIDTH_MAX - 7) * ulOutWidth) / ulSrcWidth); |
|---|
| 1241 | ulStripCount = (ulOutWidth + ulStripWidth - 1) / ulStripWidth; |
|---|
| 1242 | |
|---|
| 1243 | ulSrcPadLeft = 0; |
|---|
| 1244 | ulSrcPadRight = BGRC_P_FILTER_SRCPADRIGHT[pState->eHorzCoeffs]; |
|---|
| 1245 | if( bSrcYCbCr422 && (pState->SrcSurface.ulX & 1) ) |
|---|
| 1246 | { |
|---|
| 1247 | pState->SrcSurface.ulX++; |
|---|
| 1248 | ulSrcPadLeft--; |
|---|
| 1249 | } |
|---|
| 1250 | |
|---|
| 1251 | /* set strip's output width */ |
|---|
| 1252 | pState->OutSurface.ulWidth = (ulOutWidth + ulStripCount - 1) / ulStripCount; |
|---|
| 1253 | pState->DstSurface.ulWidth = pState->OutSurface.ulWidth; |
|---|
| 1254 | if( bOutYCbCr422 && (pState->OutSurface.ulWidth & 1) ) |
|---|
| 1255 | { |
|---|
| 1256 | pState->OutSurface.ulWidth--; |
|---|
| 1257 | pState->DstSurface.ulWidth--; |
|---|
| 1258 | } |
|---|
| 1259 | |
|---|
| 1260 | /* blit all but last strip */ |
|---|
| 1261 | for( ii = 0; ii < ulOutWidth - pState->OutSurface.ulWidth; ii += pState->OutSurface.ulWidth ) |
|---|
| 1262 | { |
|---|
| 1263 | ulFixedRight = ulFixedLeft + ((pState->OutSurface.ulWidth * pState->ulHorzScalerStep) >> ulFixedShift); |
|---|
| 1264 | |
|---|
| 1265 | /* set strip's source width */ |
|---|
| 1266 | pState->SrcSurface.ulWidth = (BGRC_P_FIXED_SHIFT_RIGHT(ulFixedRight, BGRC_P_SCALER_STEP_FRAC_BITS - ulFixedShift) - |
|---|
| 1267 | BGRC_P_FIXED_SHIFT_RIGHT(ulFixedLeft, BGRC_P_SCALER_STEP_FRAC_BITS - ulFixedShift)) + ulSrcPadLeft + ulSrcPadRight; |
|---|
| 1268 | |
|---|
| 1269 | if( BGRC_P_Blit( hGrc, NULL, NULL, false ) != BERR_SUCCESS ) |
|---|
| 1270 | { |
|---|
| 1271 | BGRC_WaitForOperationReady( hGrc, NULL, NULL ); |
|---|
| 1272 | err = BGRC_P_Blit( hGrc, NULL, NULL, false ); |
|---|
| 1273 | if( err != BERR_SUCCESS ) |
|---|
| 1274 | return err; |
|---|
| 1275 | } |
|---|
| 1276 | |
|---|
| 1277 | ulFixedLeft = ulFixedRight; |
|---|
| 1278 | ulSrcPadLeft = BGRC_P_FILTER_SRCPADLEFT[pState->eHorzCoeffs]; |
|---|
| 1279 | |
|---|
| 1280 | /* set next strip's positions and initial phase */ |
|---|
| 1281 | pState->SrcSurface.ulX = ulSrcX + BGRC_P_FIXED_SHIFT_RIGHT(ulFixedLeft, BGRC_P_SCALER_STEP_FRAC_BITS - ulFixedShift) - ulSrcPadLeft; |
|---|
| 1282 | if( bSrcYCbCr422 && (pState->SrcSurface.ulX & 1) ) |
|---|
| 1283 | { |
|---|
| 1284 | pState->SrcSurface.ulX++; |
|---|
| 1285 | ulSrcPadLeft--; |
|---|
| 1286 | } |
|---|
| 1287 | pState->OutSurface.ulX += pState->OutSurface.ulWidth; |
|---|
| 1288 | pState->DstSurface.ulX += pState->OutSurface.ulWidth; |
|---|
| 1289 | pState->ulHorzInitPhase = ((ulFixedLeft << ulFixedShift) & BGRC_P_SCALER_STEP_FRAC_MASK) + (ulSrcPadLeft << BGRC_P_SCALER_STEP_FRAC_BITS); |
|---|
| 1290 | } |
|---|
| 1291 | |
|---|
| 1292 | /* set last strip's widths */ |
|---|
| 1293 | pState->SrcSurface.ulWidth = ulSrcWidth + ulSrcX - pState->SrcSurface.ulX; |
|---|
| 1294 | pState->OutSurface.ulWidth = ulOutWidth - ii; |
|---|
| 1295 | pState->DstSurface.ulWidth = pState->OutSurface.ulWidth; |
|---|
| 1296 | } |
|---|
| 1297 | } |
|---|
| 1298 | |
|---|
| 1299 | /* blit last or only strip */ |
|---|
| 1300 | if( BGRC_P_Blit( hGrc, pCallback, pData, bSetEvent ) != BERR_SUCCESS ) |
|---|
| 1301 | { |
|---|
| 1302 | BGRC_WaitForOperationReady( hGrc, NULL, NULL ); |
|---|
| 1303 | err = BGRC_P_Blit( hGrc, pCallback, pData, bSetEvent ); |
|---|
| 1304 | if( err != BERR_SUCCESS ) |
|---|
| 1305 | return err; |
|---|
| 1306 | } |
|---|
| 1307 | |
|---|
| 1308 | return BERR_SUCCESS; |
|---|
| 1309 | } |
|---|
| 1310 | |
|---|
| 1311 | /***************************************************************************/ |
|---|
| 1312 | /* STATE COPY FUNCTIONS */ |
|---|
| 1313 | /***************************************************************************/ |
|---|
| 1314 | void BGRC_P_Source_CopyState( |
|---|
| 1315 | BGRC_P_State *pDstState, |
|---|
| 1316 | BGRC_P_State *pSrcState, |
|---|
| 1317 | uint32_t aulDstRegs[], |
|---|
| 1318 | uint32_t aulSrcRegs[] ) |
|---|
| 1319 | { |
|---|
| 1320 | /* store current source registers */ |
|---|
| 1321 | BGRC_P_COPY_REGISTER( pDstState, aulDstRegs, aulSrcRegs, SRC_FEEDER_GRP_CNTRL, SRC_FEEDER_ENABLE ); |
|---|
| 1322 | BGRC_P_COPY_REGISTER( pDstState, aulDstRegs, aulSrcRegs, SRC_FEEDER_GRP_CNTRL, SRC_SURFACE_ADDR_0 ); |
|---|
| 1323 | BGRC_P_COPY_REGISTER( pDstState, aulDstRegs, aulSrcRegs, SRC_FEEDER_GRP_CNTRL, SRC_SURFACE_STRIDE_0 ); |
|---|
| 1324 | BGRC_P_COPY_REGISTER( pDstState, aulDstRegs, aulSrcRegs, SRC_FEEDER_GRP_CNTRL, SRC_SURFACE_ADDR_1 ); |
|---|
| 1325 | BGRC_P_COPY_REGISTER( pDstState, aulDstRegs, aulSrcRegs, SRC_FEEDER_GRP_CNTRL, SRC_SURFACE_STRIDE_1 ); |
|---|
| 1326 | BGRC_P_COPY_REGISTER( pDstState, aulDstRegs, aulSrcRegs, SRC_FEEDER_GRP_CNTRL, SRC_SURFACE_FORMAT_DEF_1 ); |
|---|
| 1327 | BGRC_P_COPY_REGISTER( pDstState, aulDstRegs, aulSrcRegs, SRC_FEEDER_GRP_CNTRL, SRC_SURFACE_FORMAT_DEF_2 ); |
|---|
| 1328 | BGRC_P_COPY_REGISTER( pDstState, aulDstRegs, aulSrcRegs, SRC_FEEDER_GRP_CNTRL, SRC_SURFACE_FORMAT_DEF_3 ); |
|---|
| 1329 | #if defined(BCHP_M2MC_SRC_SURFACE_1_FORMAT_DEF_1) |
|---|
| 1330 | BGRC_P_COPY_REGISTER( pDstState, aulDstRegs, aulSrcRegs, SRC_FEEDER_GRP_CNTRL, SRC_SURFACE_1_FORMAT_DEF_1 ); |
|---|
| 1331 | BGRC_P_COPY_REGISTER( pDstState, aulDstRegs, aulSrcRegs, SRC_FEEDER_GRP_CNTRL, SRC_SURFACE_1_FORMAT_DEF_2 ); |
|---|
| 1332 | BGRC_P_COPY_REGISTER( pDstState, aulDstRegs, aulSrcRegs, SRC_FEEDER_GRP_CNTRL, SRC_SURFACE_1_FORMAT_DEF_3 ); |
|---|
| 1333 | #endif |
|---|
| 1334 | BGRC_P_COPY_REGISTER( pDstState, aulDstRegs, aulSrcRegs, SRC_FEEDER_GRP_CNTRL, SRC_CONSTANT_COLOR ); |
|---|
| 1335 | BGRC_P_COPY_REGISTER( pDstState, aulDstRegs, aulSrcRegs, SRC_COLOR_KEY_GRP_CNTRL, SRC_COLOR_KEY_LOW ); |
|---|
| 1336 | BGRC_P_COPY_REGISTER( pDstState, aulDstRegs, aulSrcRegs, SRC_COLOR_KEY_GRP_CNTRL, SRC_COLOR_KEY_HIGH ); |
|---|
| 1337 | BGRC_P_COPY_REGISTER( pDstState, aulDstRegs, aulSrcRegs, SRC_COLOR_KEY_GRP_CNTRL, SRC_COLOR_KEY_MASK ); |
|---|
| 1338 | BGRC_P_COPY_REGISTER( pDstState, aulDstRegs, aulSrcRegs, SRC_COLOR_KEY_GRP_CNTRL, SRC_COLOR_KEY_REPLACEMENT ); |
|---|
| 1339 | BGRC_P_COPY_REGISTER( pDstState, aulDstRegs, aulSrcRegs, SRC_COLOR_KEY_GRP_CNTRL, SRC_COLOR_KEY_REPLACEMENT_MASK ); |
|---|
| 1340 | BGRC_P_COPY_REGISTER( pDstState, aulDstRegs, aulSrcRegs, SRC_COLOR_MATRIX_GRP_CNTRL, SRC_CM_C00_C01 ); |
|---|
| 1341 | BGRC_P_COPY_REGISTER( pDstState, aulDstRegs, aulSrcRegs, SRC_COLOR_MATRIX_GRP_CNTRL, SRC_CM_C02_C03 ); |
|---|
| 1342 | BGRC_P_COPY_REGISTER( pDstState, aulDstRegs, aulSrcRegs, SRC_COLOR_MATRIX_GRP_CNTRL, SRC_CM_C04 ); |
|---|
| 1343 | BGRC_P_COPY_REGISTER( pDstState, aulDstRegs, aulSrcRegs, SRC_COLOR_MATRIX_GRP_CNTRL, SRC_CM_C10_C11 ); |
|---|
| 1344 | BGRC_P_COPY_REGISTER( pDstState, aulDstRegs, aulSrcRegs, SRC_COLOR_MATRIX_GRP_CNTRL, SRC_CM_C12_C13 ); |
|---|
| 1345 | BGRC_P_COPY_REGISTER( pDstState, aulDstRegs, aulSrcRegs, SRC_COLOR_MATRIX_GRP_CNTRL, SRC_CM_C14 ); |
|---|
| 1346 | BGRC_P_COPY_REGISTER( pDstState, aulDstRegs, aulSrcRegs, SRC_COLOR_MATRIX_GRP_CNTRL, SRC_CM_C20_C21 ); |
|---|
| 1347 | BGRC_P_COPY_REGISTER( pDstState, aulDstRegs, aulSrcRegs, SRC_COLOR_MATRIX_GRP_CNTRL, SRC_CM_C22_C23 ); |
|---|
| 1348 | BGRC_P_COPY_REGISTER( pDstState, aulDstRegs, aulSrcRegs, SRC_COLOR_MATRIX_GRP_CNTRL, SRC_CM_C24 ); |
|---|
| 1349 | BGRC_P_COPY_REGISTER( pDstState, aulDstRegs, aulSrcRegs, SRC_COLOR_MATRIX_GRP_CNTRL, SRC_CM_C30_C31 ); |
|---|
| 1350 | BGRC_P_COPY_REGISTER( pDstState, aulDstRegs, aulSrcRegs, SRC_COLOR_MATRIX_GRP_CNTRL, SRC_CM_C32_C33 ); |
|---|
| 1351 | BGRC_P_COPY_REGISTER( pDstState, aulDstRegs, aulSrcRegs, SRC_COLOR_MATRIX_GRP_CNTRL, SRC_CM_C34 ); |
|---|
| 1352 | BGRC_P_COPY_REGISTER( pDstState, aulDstRegs, aulSrcRegs, BLIT_GRP_CNTRL, BLIT_SRC_TOP_LEFT ); |
|---|
| 1353 | BGRC_P_COPY_REGISTER( pDstState, aulDstRegs, aulSrcRegs, BLIT_GRP_CNTRL, BLIT_SRC_SIZE ); |
|---|
| 1354 | #if defined(BCHP_M2MC_BLIT_SRC_TOP_LEFT_1) |
|---|
| 1355 | BGRC_P_COPY_REGISTER( pDstState, aulDstRegs, aulSrcRegs, BLIT_GRP_CNTRL, BLIT_SRC_TOP_LEFT_1 ); |
|---|
| 1356 | BGRC_P_COPY_REGISTER( pDstState, aulDstRegs, aulSrcRegs, BLIT_GRP_CNTRL, BLIT_SRC_SIZE_1 ); |
|---|
| 1357 | #endif |
|---|
| 1358 | #if defined(BCHP_M2MC_BLIT_SRC_STRIPE_HEIGHT_WIDTH_0) |
|---|
| 1359 | BGRC_P_COPY_REGISTER( pDstState, aulDstRegs, aulSrcRegs, BLIT_GRP_CNTRL, BLIT_SRC_STRIPE_HEIGHT_WIDTH_0 ); |
|---|
| 1360 | #endif |
|---|
| 1361 | #if defined(BCHP_M2MC_BLIT_SRC_STRIPE_HEIGHT_WIDTH_1) |
|---|
| 1362 | BGRC_P_COPY_REGISTER( pDstState, aulDstRegs, aulSrcRegs, BLIT_GRP_CNTRL, BLIT_SRC_STRIPE_HEIGHT_WIDTH_1 ); |
|---|
| 1363 | #endif |
|---|
| 1364 | |
|---|
| 1365 | /* store current source register fields */ |
|---|
| 1366 | BGRC_P_COPY_FIELD( pDstState, aulDstRegs, aulSrcRegs, BLIT_GRP_CNTRL, BLIT_HEADER, SRC_COLOR_KEY_ENABLE ); |
|---|
| 1367 | BGRC_P_COPY_FIELD( pDstState, aulDstRegs, aulSrcRegs, BLIT_GRP_CNTRL, BLIT_HEADER, SRC_COLOR_KEY_COMPARE ); |
|---|
| 1368 | BGRC_P_COPY_FIELD( pDstState, aulDstRegs, aulSrcRegs, BLIT_GRP_CNTRL, BLIT_HEADER, SRC_COLOR_MATRIX_ENABLE ); |
|---|
| 1369 | BGRC_P_COPY_FIELD( pDstState, aulDstRegs, aulSrcRegs, BLIT_GRP_CNTRL, BLIT_HEADER, SRC_COLOR_MATRIX_ROUNDING ); |
|---|
| 1370 | BGRC_P_COPY_FIELD( pDstState, aulDstRegs, aulSrcRegs, BLIT_GRP_CNTRL, BLIT_HEADER, CBAR_SRC_COLOR ); |
|---|
| 1371 | BGRC_P_COPY_FIELD( pDstState, aulDstRegs, aulSrcRegs, SCALE_PARAM_GRP_CNTRL, SCALER_CTRL, SCALER_ORDER ); |
|---|
| 1372 | BGRC_P_COPY_FIELD( pDstState, aulDstRegs, aulSrcRegs, SCALE_PARAM_GRP_CNTRL, SCALER_CTRL, ROUNDING_MODE ); |
|---|
| 1373 | |
|---|
| 1374 | #if defined(BCHP_M2MC_SCALER_CTRL_ALPHA_ADJUST_ENABLE) |
|---|
| 1375 | BGRC_P_COPY_FIELD( pDstState, aulDstRegs, aulSrcRegs, SCALE_PARAM_GRP_CNTRL, SCALER_CTRL, ALPHA_ADJUST ); |
|---|
| 1376 | #else |
|---|
| 1377 | BGRC_P_COPY_FIELD( pDstState, aulDstRegs, aulSrcRegs, SCALE_PARAM_GRP_CNTRL, SCALER_CTRL, OFFSET_ADJUST ); |
|---|
| 1378 | #endif |
|---|
| 1379 | #if defined(BCHP_M2MC_SCALER_CTRL_EDGE_CONDITION_REPLICATE) |
|---|
| 1380 | BGRC_P_COPY_FIELD( pDstState, aulDstRegs, aulSrcRegs, SCALE_PARAM_GRP_CNTRL, SCALER_CTRL, EDGE_CONDITION ); |
|---|
| 1381 | #endif |
|---|
| 1382 | #if defined(BCHP_M2MC_SCALER_CTRL_ALPHA_PRE_MULTIPLY_ENABLE) |
|---|
| 1383 | BGRC_P_COPY_FIELD( pDstState, aulDstRegs, aulSrcRegs, SCALE_PARAM_GRP_CNTRL, SCALER_CTRL, ALPHA_PRE_MULTIPLY ); |
|---|
| 1384 | #endif |
|---|
| 1385 | #if defined(BCHP_M2MC_SCALER_CTRL_ALPHA_PRE_MULTIPLY_ENABLE_ENABLE) |
|---|
| 1386 | BGRC_P_COPY_FIELD( pDstState, aulDstRegs, aulSrcRegs, SCALE_PARAM_GRP_CNTRL, SCALER_CTRL, ALPHA_PRE_MULTIPLY_ENABLE ); |
|---|
| 1387 | #endif |
|---|
| 1388 | #if defined(BCHP_M2MC_SCALER_CTRL_CLUT_SCALE_MODE_ENABLE) |
|---|
| 1389 | BGRC_P_COPY_FIELD( pDstState, aulDstRegs, aulSrcRegs, SCALE_PARAM_GRP_CNTRL, SCALER_CTRL, CLUT_SCALE_MODE ); |
|---|
| 1390 | #endif |
|---|
| 1391 | |
|---|
| 1392 | BGRC_P_COPY_FIELD( pDstState, aulDstRegs, aulSrcRegs, SCALE_PARAM_GRP_CNTRL, HORIZ_SCALER_INITIAL_PHASE, PHASE ); |
|---|
| 1393 | BGRC_P_COPY_FIELD( pDstState, aulDstRegs, aulSrcRegs, SCALE_PARAM_GRP_CNTRL, HORIZ_SCALER_STEP, STEP ); |
|---|
| 1394 | BGRC_P_COPY_FIELD( pDstState, aulDstRegs, aulSrcRegs, SCALE_PARAM_GRP_CNTRL, VERT_SCALER_INITIAL_PHASE, PHASE ); |
|---|
| 1395 | BGRC_P_COPY_FIELD( pDstState, aulDstRegs, aulSrcRegs, SCALE_PARAM_GRP_CNTRL, VERT_SCALER_STEP, STEP ); |
|---|
| 1396 | |
|---|
| 1397 | #if defined(BCHP_M2MC_HORIZ_SCALER_1_INITIAL_PHASE) |
|---|
| 1398 | BGRC_P_COPY_FIELD( pDstState, aulDstRegs, aulSrcRegs, SCALE_PARAM_GRP_CNTRL, VERT_SCALER_1_INITIAL_PHASE, PHASE ); |
|---|
| 1399 | BGRC_P_COPY_FIELD( pDstState, aulDstRegs, aulSrcRegs, SCALE_PARAM_GRP_CNTRL, VERT_SCALER_1_STEP, STEP ); |
|---|
| 1400 | BGRC_P_COPY_FIELD( pDstState, aulDstRegs, aulSrcRegs, SCALE_PARAM_GRP_CNTRL, HORIZ_SCALER_1_INITIAL_PHASE, PHASE ); |
|---|
| 1401 | BGRC_P_COPY_FIELD( pDstState, aulDstRegs, aulSrcRegs, SCALE_PARAM_GRP_CNTRL, HORIZ_SCALER_1_STEP, STEP ); |
|---|
| 1402 | #endif |
|---|
| 1403 | |
|---|
| 1404 | /* store current source state information */ |
|---|
| 1405 | pDstState->SrcSurface = pSrcState->SrcSurface; |
|---|
| 1406 | pDstState->SrcAlphaSurface = pSrcState->SrcAlphaSurface; |
|---|
| 1407 | pDstState->SrcRect = pSrcState->SrcRect; |
|---|
| 1408 | pDstState->eHorzCoeffs = pSrcState->eHorzCoeffs; |
|---|
| 1409 | pDstState->eVertCoeffs = pSrcState->eVertCoeffs; |
|---|
| 1410 | pDstState->pulHorzFirCoeffs = pSrcState->pulHorzFirCoeffs; |
|---|
| 1411 | pDstState->pulVertFirCoeffs = pSrcState->pulVertFirCoeffs; |
|---|
| 1412 | pDstState->bHorzFilter = pSrcState->bHorzFilter; |
|---|
| 1413 | pDstState->bVertFilter = pSrcState->bVertFilter; |
|---|
| 1414 | pDstState->bSrcPaletteBypass = pSrcState->bSrcPaletteBypass; |
|---|
| 1415 | pDstState->iHorzPhaseAdj = pSrcState->iHorzPhaseAdj; |
|---|
| 1416 | pDstState->iVertPhaseAdj = pSrcState->iVertPhaseAdj; |
|---|
| 1417 | pDstState->ulPhaseShift = pSrcState->ulPhaseShift; |
|---|
| 1418 | pDstState->ulHorzScalerNum = pSrcState->ulHorzScalerNum; |
|---|
| 1419 | pDstState->ulHorzScalerDen = pSrcState->ulHorzScalerDen; |
|---|
| 1420 | pDstState->ulVertScalerNum = pSrcState->ulVertScalerNum; |
|---|
| 1421 | pDstState->ulVertScalerDen = pSrcState->ulVertScalerDen; |
|---|
| 1422 | pDstState->ulMacroBlockRangeY = pSrcState->ulMacroBlockRangeY; |
|---|
| 1423 | pDstState->ulMacroBlockRangeC = pSrcState->ulMacroBlockRangeC; |
|---|
| 1424 | pDstState->ulMacroBlockStripWidth = pSrcState->ulMacroBlockStripWidth; |
|---|
| 1425 | pDstState->bMacroBlockLinear = pSrcState->bMacroBlockLinear; |
|---|
| 1426 | } |
|---|
| 1427 | |
|---|
| 1428 | /***************************************************************************/ |
|---|
| 1429 | void BGRC_P_Destination_CopyState( |
|---|
| 1430 | BGRC_P_State *pDstState, |
|---|
| 1431 | BGRC_P_State *pSrcState, |
|---|
| 1432 | uint32_t aulDstRegs[], |
|---|
| 1433 | uint32_t aulSrcRegs[] ) |
|---|
| 1434 | { |
|---|
| 1435 | /* store current destination registers */ |
|---|
| 1436 | BGRC_P_COPY_REGISTER( pDstState, aulDstRegs, aulSrcRegs, DST_FEEDER_GRP_CNTRL, DEST_FEEDER_ENABLE ); |
|---|
| 1437 | BGRC_P_COPY_REGISTER( pDstState, aulDstRegs, aulSrcRegs, DST_FEEDER_GRP_CNTRL, DEST_SURFACE_ADDR_0 ); |
|---|
| 1438 | BGRC_P_COPY_REGISTER( pDstState, aulDstRegs, aulSrcRegs, DST_FEEDER_GRP_CNTRL, DEST_SURFACE_STRIDE_0 ); |
|---|
| 1439 | BGRC_P_COPY_REGISTER( pDstState, aulDstRegs, aulSrcRegs, DST_FEEDER_GRP_CNTRL, DEST_SURFACE_ADDR_1 ); |
|---|
| 1440 | BGRC_P_COPY_REGISTER( pDstState, aulDstRegs, aulSrcRegs, DST_FEEDER_GRP_CNTRL, DEST_SURFACE_STRIDE_1 ); |
|---|
| 1441 | BGRC_P_COPY_REGISTER( pDstState, aulDstRegs, aulSrcRegs, DST_FEEDER_GRP_CNTRL, DEST_SURFACE_FORMAT_DEF_1 ); |
|---|
| 1442 | BGRC_P_COPY_REGISTER( pDstState, aulDstRegs, aulSrcRegs, DST_FEEDER_GRP_CNTRL, DEST_SURFACE_FORMAT_DEF_2 ); |
|---|
| 1443 | BGRC_P_COPY_REGISTER( pDstState, aulDstRegs, aulSrcRegs, DST_FEEDER_GRP_CNTRL, DEST_SURFACE_FORMAT_DEF_3 ); |
|---|
| 1444 | BGRC_P_COPY_REGISTER( pDstState, aulDstRegs, aulSrcRegs, DST_FEEDER_GRP_CNTRL, DEST_CONSTANT_COLOR ); |
|---|
| 1445 | BGRC_P_COPY_REGISTER( pDstState, aulDstRegs, aulSrcRegs, DST_COLOR_KEY_GRP_CNTRL, DEST_COLOR_KEY_LOW ); |
|---|
| 1446 | BGRC_P_COPY_REGISTER( pDstState, aulDstRegs, aulSrcRegs, DST_COLOR_KEY_GRP_CNTRL, DEST_COLOR_KEY_HIGH ); |
|---|
| 1447 | BGRC_P_COPY_REGISTER( pDstState, aulDstRegs, aulSrcRegs, DST_COLOR_KEY_GRP_CNTRL, DEST_COLOR_KEY_MASK ); |
|---|
| 1448 | BGRC_P_COPY_REGISTER( pDstState, aulDstRegs, aulSrcRegs, DST_COLOR_KEY_GRP_CNTRL, DEST_COLOR_KEY_REPLACEMENT ); |
|---|
| 1449 | BGRC_P_COPY_REGISTER( pDstState, aulDstRegs, aulSrcRegs, DST_COLOR_KEY_GRP_CNTRL, DEST_COLOR_KEY_REPLACEMENT_MASK ); |
|---|
| 1450 | #if ((BCHP_CHIP==7038) && (BCHP_VER < BCHP_VER_C0)) |
|---|
| 1451 | BGRC_P_COPY_REGISTER( pDstState, aulDstRegs, aulSrcRegs, DST_COLOR_MATRIX_GRP_CNTRL, DEST_CM_C00_C01 ); |
|---|
| 1452 | BGRC_P_COPY_REGISTER( pDstState, aulDstRegs, aulSrcRegs, DST_COLOR_MATRIX_GRP_CNTRL, DEST_CM_C02_C03 ); |
|---|
| 1453 | BGRC_P_COPY_REGISTER( pDstState, aulDstRegs, aulSrcRegs, DST_COLOR_MATRIX_GRP_CNTRL, DEST_CM_C04 ); |
|---|
| 1454 | BGRC_P_COPY_REGISTER( pDstState, aulDstRegs, aulSrcRegs, DST_COLOR_MATRIX_GRP_CNTRL, DEST_CM_C10_C11 ); |
|---|
| 1455 | BGRC_P_COPY_REGISTER( pDstState, aulDstRegs, aulSrcRegs, DST_COLOR_MATRIX_GRP_CNTRL, DEST_CM_C12_C13 ); |
|---|
| 1456 | BGRC_P_COPY_REGISTER( pDstState, aulDstRegs, aulSrcRegs, DST_COLOR_MATRIX_GRP_CNTRL, DEST_CM_C14 ); |
|---|
| 1457 | BGRC_P_COPY_REGISTER( pDstState, aulDstRegs, aulSrcRegs, DST_COLOR_MATRIX_GRP_CNTRL, DEST_CM_C20_C21 ); |
|---|
| 1458 | BGRC_P_COPY_REGISTER( pDstState, aulDstRegs, aulSrcRegs, DST_COLOR_MATRIX_GRP_CNTRL, DEST_CM_C22_C23 ); |
|---|
| 1459 | BGRC_P_COPY_REGISTER( pDstState, aulDstRegs, aulSrcRegs, DST_COLOR_MATRIX_GRP_CNTRL, DEST_CM_C24 ); |
|---|
| 1460 | BGRC_P_COPY_REGISTER( pDstState, aulDstRegs, aulSrcRegs, DST_COLOR_MATRIX_GRP_CNTRL, DEST_CM_C30_C31 ); |
|---|
| 1461 | BGRC_P_COPY_REGISTER( pDstState, aulDstRegs, aulSrcRegs, DST_COLOR_MATRIX_GRP_CNTRL, DEST_CM_C32_C33 ); |
|---|
| 1462 | BGRC_P_COPY_REGISTER( pDstState, aulDstRegs, aulSrcRegs, DST_COLOR_MATRIX_GRP_CNTRL, DEST_CM_C34 ); |
|---|
| 1463 | #endif |
|---|
| 1464 | BGRC_P_COPY_REGISTER( pDstState, aulDstRegs, aulSrcRegs, BLIT_GRP_CNTRL, BLIT_DEST_TOP_LEFT ); |
|---|
| 1465 | BGRC_P_COPY_REGISTER( pDstState, aulDstRegs, aulSrcRegs, BLIT_GRP_CNTRL, BLIT_DEST_SIZE ); |
|---|
| 1466 | |
|---|
| 1467 | /* store current destination register fields */ |
|---|
| 1468 | BGRC_P_COPY_FIELD( pDstState, aulDstRegs, aulSrcRegs, BLIT_GRP_CNTRL, BLIT_HEADER, DEST_COLOR_KEY_ENABLE ); |
|---|
| 1469 | BGRC_P_COPY_FIELD( pDstState, aulDstRegs, aulSrcRegs, BLIT_GRP_CNTRL, BLIT_HEADER, DEST_COLOR_KEY_COMPARE ); |
|---|
| 1470 | #if ((BCHP_CHIP==7038) && (BCHP_VER < BCHP_VER_C0)) |
|---|
| 1471 | BGRC_P_COPY_FIELD( pDstState, aulDstRegs, aulSrcRegs, BLIT_GRP_CNTRL, BLIT_HEADER, DEST_COLOR_MATRIX_ENABLE ); |
|---|
| 1472 | BGRC_P_COPY_FIELD( pDstState, aulDstRegs, aulSrcRegs, BLIT_GRP_CNTRL, BLIT_HEADER, DEST_COLOR_MATRIX_ROUNDING ); |
|---|
| 1473 | BGRC_P_COPY_FIELD( pDstState, aulDstRegs, aulSrcRegs, BLIT_GRP_CNTRL, BLIT_HEADER, CBAR_DEST_COLOR ); |
|---|
| 1474 | #endif |
|---|
| 1475 | |
|---|
| 1476 | /* store current destination state information */ |
|---|
| 1477 | pDstState->DstSurface = pSrcState->DstSurface; |
|---|
| 1478 | pDstState->DstAlphaSurface = pSrcState->DstAlphaSurface; |
|---|
| 1479 | pDstState->DstRect = pSrcState->DstRect; |
|---|
| 1480 | pDstState->bDstPaletteBypass = pSrcState->bDstPaletteBypass; |
|---|
| 1481 | } |
|---|
| 1482 | |
|---|
| 1483 | /***************************************************************************/ |
|---|
| 1484 | void BGRC_P_Pattern_CopyState( |
|---|
| 1485 | BGRC_P_State *pDstState, |
|---|
| 1486 | BGRC_P_State *pSrcState, |
|---|
| 1487 | uint32_t aulDstRegs[], |
|---|
| 1488 | uint32_t aulSrcRegs[] ) |
|---|
| 1489 | { |
|---|
| 1490 | /* store current rop registers */ |
|---|
| 1491 | BGRC_P_COPY_REGISTER( pDstState, aulDstRegs, aulSrcRegs, ROP_GRP_CNTRL, ROP_OPERATION ); |
|---|
| 1492 | BGRC_P_COPY_REGISTER( pDstState, aulDstRegs, aulSrcRegs, ROP_GRP_CNTRL, ROP_PATTERN_TOP ); |
|---|
| 1493 | BGRC_P_COPY_REGISTER( pDstState, aulDstRegs, aulSrcRegs, ROP_GRP_CNTRL, ROP_PATTERN_BOTTOM ); |
|---|
| 1494 | BGRC_P_COPY_REGISTER( pDstState, aulDstRegs, aulSrcRegs, ROP_GRP_CNTRL, ROP_PATTERN_COLOR_0 ); |
|---|
| 1495 | BGRC_P_COPY_REGISTER( pDstState, aulDstRegs, aulSrcRegs, ROP_GRP_CNTRL, ROP_PATTERN_COLOR_1 ); |
|---|
| 1496 | |
|---|
| 1497 | /* store current pattern state information */ |
|---|
| 1498 | BKNI_Memcpy( pDstState->aucPattern, pSrcState->aucPattern, 8 ); |
|---|
| 1499 | } |
|---|
| 1500 | |
|---|
| 1501 | /***************************************************************************/ |
|---|
| 1502 | void BGRC_P_Blend_CopyState( |
|---|
| 1503 | BGRC_P_State *pDstState, |
|---|
| 1504 | BGRC_P_State *pSrcState, |
|---|
| 1505 | uint32_t aulDstRegs[], |
|---|
| 1506 | uint32_t aulSrcRegs[] ) |
|---|
| 1507 | { |
|---|
| 1508 | BSTD_UNUSED( pDstState ); |
|---|
| 1509 | BSTD_UNUSED( pSrcState ); |
|---|
| 1510 | |
|---|
| 1511 | /* store current blend registers */ |
|---|
| 1512 | BGRC_P_COPY_REGISTER( pDstState, aulDstRegs, aulSrcRegs, BLEND_PARAM_GRP_CNTRL, BLEND_CONSTANT_COLOR ); |
|---|
| 1513 | BGRC_P_COPY_REGISTER( pDstState, aulDstRegs, aulSrcRegs, BLEND_PARAM_GRP_CNTRL, BLEND_COLOR_OP ); |
|---|
| 1514 | BGRC_P_COPY_REGISTER( pDstState, aulDstRegs, aulSrcRegs, BLEND_PARAM_GRP_CNTRL, BLEND_ALPHA_OP ); |
|---|
| 1515 | } |
|---|
| 1516 | |
|---|
| 1517 | /***************************************************************************/ |
|---|
| 1518 | void BGRC_P_Output_CopyState( |
|---|
| 1519 | BGRC_P_State *pDstState, |
|---|
| 1520 | BGRC_P_State *pSrcState, |
|---|
| 1521 | uint32_t aulDstRegs[], |
|---|
| 1522 | uint32_t aulSrcRegs[] ) |
|---|
| 1523 | { |
|---|
| 1524 | /* store current output registers */ |
|---|
| 1525 | BGRC_P_COPY_REGISTER( pDstState, aulDstRegs, aulSrcRegs, OUTPUT_FEEDER_GRP_CNTRL, OUTPUT_FEEDER_ENABLE ); |
|---|
| 1526 | BGRC_P_COPY_REGISTER( pDstState, aulDstRegs, aulSrcRegs, OUTPUT_FEEDER_GRP_CNTRL, OUTPUT_SURFACE_ADDR_0 ); |
|---|
| 1527 | BGRC_P_COPY_REGISTER( pDstState, aulDstRegs, aulSrcRegs, OUTPUT_FEEDER_GRP_CNTRL, OUTPUT_SURFACE_STRIDE_0 ); |
|---|
| 1528 | BGRC_P_COPY_REGISTER( pDstState, aulDstRegs, aulSrcRegs, OUTPUT_FEEDER_GRP_CNTRL, OUTPUT_SURFACE_ADDR_1 ); |
|---|
| 1529 | BGRC_P_COPY_REGISTER( pDstState, aulDstRegs, aulSrcRegs, OUTPUT_FEEDER_GRP_CNTRL, OUTPUT_SURFACE_STRIDE_1 ); |
|---|
| 1530 | BGRC_P_COPY_REGISTER( pDstState, aulDstRegs, aulSrcRegs, OUTPUT_FEEDER_GRP_CNTRL, OUTPUT_SURFACE_FORMAT_DEF_1 ); |
|---|
| 1531 | BGRC_P_COPY_REGISTER( pDstState, aulDstRegs, aulSrcRegs, OUTPUT_FEEDER_GRP_CNTRL, OUTPUT_SURFACE_FORMAT_DEF_2 ); |
|---|
| 1532 | BGRC_P_COPY_REGISTER( pDstState, aulDstRegs, aulSrcRegs, OUTPUT_FEEDER_GRP_CNTRL, OUTPUT_SURFACE_FORMAT_DEF_3 ); |
|---|
| 1533 | #if ((BCHP_CHIP==7038) && (BCHP_VER < BCHP_VER_C0)) |
|---|
| 1534 | BGRC_P_COPY_REGISTER( pDstState, aulDstRegs, aulSrcRegs, OUTPUT_COLOR_MATRIX_GRP_CNTRL, OUTPUT_CM_C00_C01 ); |
|---|
| 1535 | BGRC_P_COPY_REGISTER( pDstState, aulDstRegs, aulSrcRegs, OUTPUT_COLOR_MATRIX_GRP_CNTRL, OUTPUT_CM_C02_C03 ); |
|---|
| 1536 | BGRC_P_COPY_REGISTER( pDstState, aulDstRegs, aulSrcRegs, OUTPUT_COLOR_MATRIX_GRP_CNTRL, OUTPUT_CM_C04 ); |
|---|
| 1537 | BGRC_P_COPY_REGISTER( pDstState, aulDstRegs, aulSrcRegs, OUTPUT_COLOR_MATRIX_GRP_CNTRL, OUTPUT_CM_C10_C11 ); |
|---|
| 1538 | BGRC_P_COPY_REGISTER( pDstState, aulDstRegs, aulSrcRegs, OUTPUT_COLOR_MATRIX_GRP_CNTRL, OUTPUT_CM_C12_C13 ); |
|---|
| 1539 | BGRC_P_COPY_REGISTER( pDstState, aulDstRegs, aulSrcRegs, OUTPUT_COLOR_MATRIX_GRP_CNTRL, OUTPUT_CM_C14 ); |
|---|
| 1540 | BGRC_P_COPY_REGISTER( pDstState, aulDstRegs, aulSrcRegs, OUTPUT_COLOR_MATRIX_GRP_CNTRL, OUTPUT_CM_C20_C21 ); |
|---|
| 1541 | BGRC_P_COPY_REGISTER( pDstState, aulDstRegs, aulSrcRegs, OUTPUT_COLOR_MATRIX_GRP_CNTRL, OUTPUT_CM_C22_C23 ); |
|---|
| 1542 | BGRC_P_COPY_REGISTER( pDstState, aulDstRegs, aulSrcRegs, OUTPUT_COLOR_MATRIX_GRP_CNTRL, OUTPUT_CM_C24 ); |
|---|
| 1543 | BGRC_P_COPY_REGISTER( pDstState, aulDstRegs, aulSrcRegs, OUTPUT_COLOR_MATRIX_GRP_CNTRL, OUTPUT_CM_C30_C31 ); |
|---|
| 1544 | BGRC_P_COPY_REGISTER( pDstState, aulDstRegs, aulSrcRegs, OUTPUT_COLOR_MATRIX_GRP_CNTRL, OUTPUT_CM_C32_C33 ); |
|---|
| 1545 | BGRC_P_COPY_REGISTER( pDstState, aulDstRegs, aulSrcRegs, OUTPUT_COLOR_MATRIX_GRP_CNTRL, OUTPUT_CM_C34 ); |
|---|
| 1546 | #endif |
|---|
| 1547 | BGRC_P_COPY_REGISTER( pDstState, aulDstRegs, aulSrcRegs, BLIT_GRP_CNTRL, BLIT_OUTPUT_TOP_LEFT ); |
|---|
| 1548 | BGRC_P_COPY_REGISTER( pDstState, aulDstRegs, aulSrcRegs, BLIT_GRP_CNTRL, BLIT_OUTPUT_SIZE ); |
|---|
| 1549 | BGRC_P_COPY_REGISTER( pDstState, aulDstRegs, aulSrcRegs, BLEND_PARAM_GRP_CNTRL, BLEND_COLOR_KEY_ACTION ); |
|---|
| 1550 | |
|---|
| 1551 | #if ((BCHP_CHIP==7038) && (BCHP_VER < BCHP_VER_C0)) |
|---|
| 1552 | /* store current output register fields */ |
|---|
| 1553 | BGRC_P_COPY_FIELD( pDstState, aulDstRegs, aulSrcRegs, BLIT_GRP_CNTRL, BLIT_HEADER, OUTPUT_COLOR_MATRIX_ENABLE ); |
|---|
| 1554 | BGRC_P_COPY_FIELD( pDstState, aulDstRegs, aulSrcRegs, BLIT_GRP_CNTRL, BLIT_HEADER, OUTPUT_COLOR_MATRIX_ROUNDING ); |
|---|
| 1555 | #endif |
|---|
| 1556 | |
|---|
| 1557 | /* store current output state information */ |
|---|
| 1558 | pDstState->OutSurface = pSrcState->OutSurface; |
|---|
| 1559 | pDstState->OutAlphaSurface = pSrcState->OutAlphaSurface; |
|---|
| 1560 | pDstState->OutRect = pSrcState->OutRect; |
|---|
| 1561 | } |
|---|
| 1562 | |
|---|
| 1563 | /***************************************************************************/ |
|---|
| 1564 | /* DEBUG DUMPING FUNCTIONS */ |
|---|
| 1565 | /***************************************************************************/ |
|---|
| 1566 | void BGRC_P_PrintRegisters( |
|---|
| 1567 | BGRC_Handle hGrc ) |
|---|
| 1568 | { |
|---|
| 1569 | void *pNext = 0; |
|---|
| 1570 | |
|---|
| 1571 | BSTD_UNUSED( hGrc ); |
|---|
| 1572 | |
|---|
| 1573 | BMEM_ConvertOffsetToAddress( hGrc->hMemory, BGRC_P_READ_REG( LIST_CURR_PKT_ADDR ), &pNext ); |
|---|
| 1574 | |
|---|
| 1575 | if( pNext ) |
|---|
| 1576 | BDBG_ERR(( "NEXT_ADDR %08x", *((uint32_t *) pNext) )); |
|---|
| 1577 | |
|---|
| 1578 | BDBG_ERR(( "LIST_CTRL %08x", (unsigned int) BGRC_P_READ_REG( LIST_CTRL ) )); |
|---|
| 1579 | BDBG_ERR(( "LIST_STATUS %08x", (unsigned int) BGRC_P_READ_REG( LIST_STATUS ) )); |
|---|
| 1580 | BDBG_ERR(( "LIST_FIRST_PKT_ADDR %08x", (unsigned int) BGRC_P_READ_REG( LIST_FIRST_PKT_ADDR ) )); |
|---|
| 1581 | BDBG_ERR(( "LIST_CURR_PKT_ADDR %08x", (unsigned int) BGRC_P_READ_REG( LIST_CURR_PKT_ADDR ) )); |
|---|
| 1582 | BDBG_ERR(( "BLIT_STATUS %08x", (unsigned int) BGRC_P_READ_REG( BLIT_STATUS ) )); |
|---|
| 1583 | BDBG_ERR(( "BLIT_SRC_ADDRESS %08x", (unsigned int) BGRC_P_READ_REG( BLIT_SRC_ADDRESS ) )); |
|---|
| 1584 | BDBG_ERR(( "BLIT_DEST_ADDRESS %08x", (unsigned int) BGRC_P_READ_REG( BLIT_DEST_ADDRESS ) )); |
|---|
| 1585 | BDBG_ERR(( "BLIT_OUTPUT_ADDRESS %08x", (unsigned int) BGRC_P_READ_REG( BLIT_OUTPUT_ADDRESS ) )); |
|---|
| 1586 | BDBG_ERR(( "BLIT_MEM_HI %08x", (unsigned int) BGRC_P_READ_REG( BLIT_MEM_HI ) )); |
|---|
| 1587 | BDBG_ERR(( "BLIT_MEM_LO %08x", (unsigned int) BGRC_P_READ_REG( BLIT_MEM_LO ) )); |
|---|
| 1588 | BDBG_ERR(( "SRC_FEEDER_ENABLE %08x", (unsigned int) BGRC_P_READ_REG( SRC_FEEDER_ENABLE ) )); |
|---|
| 1589 | BDBG_ERR(( "SRC_SURFACE_ADDR_0 %08x", (unsigned int) BGRC_P_READ_REG( SRC_SURFACE_ADDR_0 ) )); |
|---|
| 1590 | BDBG_ERR(( "SRC_SURFACE_STRIDE_0 %08x", (unsigned int) BGRC_P_READ_REG( SRC_SURFACE_STRIDE_0 ) )); |
|---|
| 1591 | BDBG_ERR(( "SRC_SURFACE_ADDR_1 %08x", (unsigned int) BGRC_P_READ_REG( SRC_SURFACE_ADDR_1 ) )); |
|---|
| 1592 | BDBG_ERR(( "SRC_SURFACE_STRIDE_1 %08x", (unsigned int) BGRC_P_READ_REG( SRC_SURFACE_STRIDE_1 ) )); |
|---|
| 1593 | BDBG_ERR(( "SRC_SURFACE_FORMAT_DEF_1 %08x", (unsigned int) BGRC_P_READ_REG( SRC_SURFACE_FORMAT_DEF_1 ) )); |
|---|
| 1594 | BDBG_ERR(( "SRC_SURFACE_FORMAT_DEF_2 %08x", (unsigned int) BGRC_P_READ_REG( SRC_SURFACE_FORMAT_DEF_2 ) )); |
|---|
| 1595 | BDBG_ERR(( "SRC_SURFACE_FORMAT_DEF_3 %08x", (unsigned int) BGRC_P_READ_REG( SRC_SURFACE_FORMAT_DEF_3 ) )); |
|---|
| 1596 | #if defined(BCHP_M2MC_SRC_SURFACE_1_FORMAT_DEF_1) |
|---|
| 1597 | BDBG_ERR(( "SRC_SURFACE_1_FORMAT_DEF_1 %08x", (unsigned int) BGRC_P_READ_REG( SRC_SURFACE_1_FORMAT_DEF_1 ) )); |
|---|
| 1598 | BDBG_ERR(( "SRC_SURFACE_1_FORMAT_DEF_2 %08x", (unsigned int) BGRC_P_READ_REG( SRC_SURFACE_1_FORMAT_DEF_2 ) )); |
|---|
| 1599 | BDBG_ERR(( "SRC_SURFACE_1_FORMAT_DEF_3 %08x", (unsigned int) BGRC_P_READ_REG( SRC_SURFACE_1_FORMAT_DEF_3 ) )); |
|---|
| 1600 | #endif |
|---|
| 1601 | BDBG_ERR(( "SRC_W_ALPHA %08x", (unsigned int) BGRC_P_READ_REG( SRC_W_ALPHA ) )); |
|---|
| 1602 | BDBG_ERR(( "SRC_CONSTANT_COLOR %08x", (unsigned int) BGRC_P_READ_REG( SRC_CONSTANT_COLOR ) )); |
|---|
| 1603 | BDBG_ERR(( "DEST_FEEDER_ENABLE %08x", (unsigned int) BGRC_P_READ_REG( DEST_FEEDER_ENABLE ) )); |
|---|
| 1604 | BDBG_ERR(( "DEST_SURFACE_ADDR_0 %08x", (unsigned int) BGRC_P_READ_REG( DEST_SURFACE_ADDR_0 ) )); |
|---|
| 1605 | BDBG_ERR(( "DEST_SURFACE_STRIDE_0 %08x", (unsigned int) BGRC_P_READ_REG( DEST_SURFACE_STRIDE_0 ) )); |
|---|
| 1606 | BDBG_ERR(( "DEST_SURFACE_ADDR_1 %08x", (unsigned int) BGRC_P_READ_REG( DEST_SURFACE_ADDR_1 ) )); |
|---|
| 1607 | BDBG_ERR(( "DEST_SURFACE_STRIDE_1 %08x", (unsigned int) BGRC_P_READ_REG( DEST_SURFACE_STRIDE_1 ) )); |
|---|
| 1608 | BDBG_ERR(( "DEST_SURFACE_FORMAT_DEF_1 %08x", (unsigned int) BGRC_P_READ_REG( DEST_SURFACE_FORMAT_DEF_1 ) )); |
|---|
| 1609 | BDBG_ERR(( "DEST_SURFACE_FORMAT_DEF_2 %08x", (unsigned int) BGRC_P_READ_REG( DEST_SURFACE_FORMAT_DEF_2 ) )); |
|---|
| 1610 | BDBG_ERR(( "DEST_SURFACE_FORMAT_DEF_3 %08x", (unsigned int) BGRC_P_READ_REG( DEST_SURFACE_FORMAT_DEF_3 ) )); |
|---|
| 1611 | BDBG_ERR(( "DEST_W_ALPHA %08x", (unsigned int) BGRC_P_READ_REG( DEST_W_ALPHA ) )); |
|---|
| 1612 | BDBG_ERR(( "DEST_CONSTANT_COLOR %08x", (unsigned int) BGRC_P_READ_REG( DEST_CONSTANT_COLOR ) )); |
|---|
| 1613 | BDBG_ERR(( "OUTPUT_FEEDER_ENABLE %08x", (unsigned int) BGRC_P_READ_REG( OUTPUT_FEEDER_ENABLE ) )); |
|---|
| 1614 | BDBG_ERR(( "OUTPUT_SURFACE_ADDR_0 %08x", (unsigned int) BGRC_P_READ_REG( OUTPUT_SURFACE_ADDR_0 ) )); |
|---|
| 1615 | BDBG_ERR(( "OUTPUT_SURFACE_STRIDE_0 %08x", (unsigned int) BGRC_P_READ_REG( OUTPUT_SURFACE_STRIDE_0 ) )); |
|---|
| 1616 | BDBG_ERR(( "OUTPUT_SURFACE_ADDR_1 %08x", (unsigned int) BGRC_P_READ_REG( OUTPUT_SURFACE_ADDR_1 ) )); |
|---|
| 1617 | BDBG_ERR(( "OUTPUT_SURFACE_STRIDE_1 %08x", (unsigned int) BGRC_P_READ_REG( OUTPUT_SURFACE_STRIDE_1 ) )); |
|---|
| 1618 | BDBG_ERR(( "OUTPUT_SURFACE_FORMAT_DEF_1 %08x", (unsigned int) BGRC_P_READ_REG( OUTPUT_SURFACE_FORMAT_DEF_1 ) )); |
|---|
| 1619 | BDBG_ERR(( "OUTPUT_SURFACE_FORMAT_DEF_2 %08x", (unsigned int) BGRC_P_READ_REG( OUTPUT_SURFACE_FORMAT_DEF_2 ) )); |
|---|
| 1620 | BDBG_ERR(( "OUTPUT_SURFACE_FORMAT_DEF_3 %08x", (unsigned int) BGRC_P_READ_REG( OUTPUT_SURFACE_FORMAT_DEF_3 ) )); |
|---|
| 1621 | BDBG_ERR(( "BLIT_HEADER %08x", (unsigned int) BGRC_P_READ_REG( BLIT_HEADER ) )); |
|---|
| 1622 | BDBG_ERR(( "BLIT_SRC_TOP_LEFT %08x", (unsigned int) BGRC_P_READ_REG( BLIT_SRC_TOP_LEFT ) )); |
|---|
| 1623 | BDBG_ERR(( "BLIT_SRC_SIZE %08x", (unsigned int) BGRC_P_READ_REG( BLIT_SRC_SIZE ) )); |
|---|
| 1624 | #if defined(BCHP_M2MC_BLIT_SRC_TOP_LEFT_1) |
|---|
| 1625 | BDBG_ERR(( "BLIT_SRC_TOP_LEFT_1 %08x", (unsigned int) BGRC_P_READ_REG( BLIT_SRC_TOP_LEFT_1 ) )); |
|---|
| 1626 | BDBG_ERR(( "BLIT_SRC_SIZE_1 %08x", (unsigned int) BGRC_P_READ_REG( BLIT_SRC_SIZE_1 ) )); |
|---|
| 1627 | #endif |
|---|
| 1628 | #if defined(BCHP_M2MC_BLIT_SRC_STRIPE_HEIGHT_WIDTH_0) |
|---|
| 1629 | #endif |
|---|
| 1630 | BDBG_ERR(( "BLIT_SRC_STRIPE_HEIGHT_WIDTH_0 %08x", (unsigned int) BGRC_P_READ_REG( BLIT_SRC_STRIPE_HEIGHT_WIDTH_0 ) )); |
|---|
| 1631 | #if defined(BCHP_M2MC_BLIT_SRC_STRIPE_HEIGHT_WIDTH_1) |
|---|
| 1632 | BDBG_ERR(( "BLIT_SRC_STRIPE_HEIGHT_WIDTH_1 %08x", (unsigned int) BGRC_P_READ_REG( BLIT_SRC_STRIPE_HEIGHT_WIDTH_1 ) )); |
|---|
| 1633 | #endif |
|---|
| 1634 | BDBG_ERR(( "BLIT_DEST_TOP_LEFT %08x", (unsigned int) BGRC_P_READ_REG( BLIT_DEST_TOP_LEFT ) )); |
|---|
| 1635 | BDBG_ERR(( "BLIT_DEST_SIZE %08x", (unsigned int) BGRC_P_READ_REG( BLIT_DEST_SIZE ) )); |
|---|
| 1636 | BDBG_ERR(( "BLIT_OUTPUT_TOP_LEFT %08x", (unsigned int) BGRC_P_READ_REG( BLIT_OUTPUT_TOP_LEFT ) )); |
|---|
| 1637 | BDBG_ERR(( "BLIT_OUTPUT_SIZE %08x", (unsigned int) BGRC_P_READ_REG( BLIT_OUTPUT_SIZE ) )); |
|---|
| 1638 | BDBG_ERR(( "BLIT_INPUT_STRIPE_WIDTH %08x", (unsigned int) BGRC_P_READ_REG( BLIT_INPUT_STRIPE_WIDTH ) )); |
|---|
| 1639 | #if defined(BCHP_M2MC_BLIT_INPUT_STRIPE_WIDTH_1) |
|---|
| 1640 | BDBG_ERR(( "BLIT_INPUT_STRIPE_WIDTH_1 %08x", (unsigned int) BGRC_P_READ_REG( BLIT_INPUT_STRIPE_WIDTH_1 ) )); |
|---|
| 1641 | #endif |
|---|
| 1642 | BDBG_ERR(( "BLIT_OUTPUT_STRIPE_WIDTH %08x", (unsigned int) BGRC_P_READ_REG( BLIT_OUTPUT_STRIPE_WIDTH ) )); |
|---|
| 1643 | BDBG_ERR(( "BLIT_STRIPE_OVERLAP %08x", (unsigned int) BGRC_P_READ_REG( BLIT_STRIPE_OVERLAP ) )); |
|---|
| 1644 | #if defined(BCHP_M2MC_BLIT_STRIPE_OVERLAP_1) |
|---|
| 1645 | BDBG_ERR(( "BLIT_STRIPE_OVERLAP_1 %08x", (unsigned int) BGRC_P_READ_REG( BLIT_STRIPE_OVERLAP_1 ) )); |
|---|
| 1646 | #endif |
|---|
| 1647 | BDBG_ERR(( "BLIT_CTRL %08x", (unsigned int) BGRC_P_READ_REG( BLIT_CTRL ) )); |
|---|
| 1648 | BDBG_ERR(( "SCALER_CTRL %08x", (unsigned int) BGRC_P_READ_REG( SCALER_CTRL ) )); |
|---|
| 1649 | BDBG_ERR(( "HORIZ_AVERAGER_COUNT %08x", (unsigned int) BGRC_P_READ_REG( HORIZ_AVERAGER_COUNT ) )); |
|---|
| 1650 | BDBG_ERR(( "HORIZ_AVERAGER_COEFF %08x", (unsigned int) BGRC_P_READ_REG( HORIZ_AVERAGER_COEFF ) )); |
|---|
| 1651 | BDBG_ERR(( "VERT_AVERAGER_COUNT %08x", (unsigned int) BGRC_P_READ_REG( VERT_AVERAGER_COUNT ) )); |
|---|
| 1652 | BDBG_ERR(( "VERT_AVERAGER_COEFF %08x", (unsigned int) BGRC_P_READ_REG( VERT_AVERAGER_COEFF ) )); |
|---|
| 1653 | BDBG_ERR(( "HORIZ_SCALER_INITIAL_PHASE %08x", (unsigned int) BGRC_P_READ_REG( HORIZ_SCALER_INITIAL_PHASE ) )); |
|---|
| 1654 | BDBG_ERR(( "HORIZ_SCALER_STEP %08x", (unsigned int) BGRC_P_READ_REG( HORIZ_SCALER_STEP ) )); |
|---|
| 1655 | #if defined(BCHP_M2MC_HORIZ_SCALER_1_INITIAL_PHASE) |
|---|
| 1656 | BDBG_ERR(( "HORIZ_SCALER_1_INITIAL_PHASE %08x", (unsigned int) BGRC_P_READ_REG( HORIZ_SCALER_1_INITIAL_PHASE ) )); |
|---|
| 1657 | BDBG_ERR(( "HORIZ_SCALER_1_STEP %08x", (unsigned int) BGRC_P_READ_REG( HORIZ_SCALER_1_STEP ) )); |
|---|
| 1658 | #endif |
|---|
| 1659 | BDBG_ERR(( "VERT_SCALER_INITIAL_PHASE %08x", (unsigned int) BGRC_P_READ_REG( VERT_SCALER_INITIAL_PHASE ) )); |
|---|
| 1660 | BDBG_ERR(( "VERT_SCALER_STEP %08x", (unsigned int) BGRC_P_READ_REG( VERT_SCALER_STEP ) )); |
|---|
| 1661 | #if defined(BCHP_M2MC_VERT_SCALER_1_INITIAL_PHASE) |
|---|
| 1662 | BDBG_ERR(( "VERT_SCALER_1_INITIAL_PHASE %08x", (unsigned int) BGRC_P_READ_REG( VERT_SCALER_1_INITIAL_PHASE ) )); |
|---|
| 1663 | BDBG_ERR(( "VERT_SCALER_1_STEP %08x", (unsigned int) BGRC_P_READ_REG( VERT_SCALER_1_STEP ) )); |
|---|
| 1664 | #endif |
|---|
| 1665 | BDBG_ERR(( "BLEND_COLOR_OP %08x", (unsigned int) BGRC_P_READ_REG( BLEND_COLOR_OP ) )); |
|---|
| 1666 | BDBG_ERR(( "BLEND_ALPHA_OP %08x", (unsigned int) BGRC_P_READ_REG( BLEND_ALPHA_OP ) )); |
|---|
| 1667 | BDBG_ERR(( "BLEND_CONSTANT_COLOR %08x", (unsigned int) BGRC_P_READ_REG( BLEND_CONSTANT_COLOR ) )); |
|---|
| 1668 | BDBG_ERR(( "BLEND_COLOR_KEY_ACTION %08x", (unsigned int) BGRC_P_READ_REG( BLEND_COLOR_KEY_ACTION ) )); |
|---|
| 1669 | BDBG_ERR(( "SRC_CM_C00_C01 %08x", (unsigned int) BGRC_P_READ_REG( SRC_CM_C00_C01 ) )); |
|---|
| 1670 | BDBG_ERR(( "SRC_CM_C02_C03 %08x", (unsigned int) BGRC_P_READ_REG( SRC_CM_C02_C03 ) )); |
|---|
| 1671 | BDBG_ERR(( "SRC_CM_C04 %08x", (unsigned int) BGRC_P_READ_REG( SRC_CM_C04 ) )); |
|---|
| 1672 | BDBG_ERR(( "SRC_CM_C10_C11 %08x", (unsigned int) BGRC_P_READ_REG( SRC_CM_C10_C11 ) )); |
|---|
| 1673 | BDBG_ERR(( "SRC_CM_C12_C13 %08x", (unsigned int) BGRC_P_READ_REG( SRC_CM_C12_C13 ) )); |
|---|
| 1674 | BDBG_ERR(( "SRC_CM_C14 %08x", (unsigned int) BGRC_P_READ_REG( SRC_CM_C14 ) )); |
|---|
| 1675 | BDBG_ERR(( "SRC_CM_C20_C21 %08x", (unsigned int) BGRC_P_READ_REG( SRC_CM_C20_C21 ) )); |
|---|
| 1676 | BDBG_ERR(( "SRC_CM_C22_C23 %08x", (unsigned int) BGRC_P_READ_REG( SRC_CM_C22_C23 ) )); |
|---|
| 1677 | BDBG_ERR(( "SRC_CM_C24 %08x", (unsigned int) BGRC_P_READ_REG( SRC_CM_C24 ) )); |
|---|
| 1678 | #if ((BCHP_CHIP==3548) && (BCHP_VER >= BCHP_VER_B0)) || \ |
|---|
| 1679 | ((BCHP_CHIP==3556) && (BCHP_VER >= BCHP_VER_B0)) |
|---|
| 1680 | BDBG_ERR(( "DCE_PRED_CFG %08x", (unsigned int) BGRC_P_READ_REG( DCE_PRED_CFG ) )); |
|---|
| 1681 | BDBG_ERR(( "DCE_COMPR_CFG1 %08x", (unsigned int) BGRC_P_READ_REG( DCE_COMPR_CFG1 ) )); |
|---|
| 1682 | BDBG_ERR(( "DCE_COMPR_CFG2 %08x", (unsigned int) BGRC_P_READ_REG( DCE_COMPR_CFG2 ) )); |
|---|
| 1683 | BDBG_ERR(( "DCE_RANGE0 %08x", (unsigned int) BGRC_P_READ_REG( DCE_RANGE0 ) )); |
|---|
| 1684 | BDBG_ERR(( "DCE_RANGE1 %08x", (unsigned int) BGRC_P_READ_REG( DCE_RANGE1 ) )); |
|---|
| 1685 | BDBG_ERR(( "DCE_RANGE2 %08x", (unsigned int) BGRC_P_READ_REG( DCE_RANGE2 ) )); |
|---|
| 1686 | BDBG_ERR(( "DCE_RANGE3 %08x", (unsigned int) BGRC_P_READ_REG( DCE_RANGE3 ) )); |
|---|
| 1687 | BDBG_ERR(( "DCE_RANGE4 %08x", (unsigned int) BGRC_P_READ_REG( DCE_RANGE4 ) )); |
|---|
| 1688 | BDBG_ERR(( "DCE_RANGE5 %08x", (unsigned int) BGRC_P_READ_REG( DCE_RANGE5 ) )); |
|---|
| 1689 | BDBG_ERR(( "DCE_RANGE6 %08x", (unsigned int) BGRC_P_READ_REG( DCE_RANGE6 ) )); |
|---|
| 1690 | BDBG_ERR(( "DCE_RANGE7 %08x", (unsigned int) BGRC_P_READ_REG( DCE_RANGE7 ) )); |
|---|
| 1691 | BDBG_ERR(( "DCE_RANGE8 %08x", (unsigned int) BGRC_P_READ_REG( DCE_RANGE8 ) )); |
|---|
| 1692 | BDBG_ERR(( "DCE_RANGE9 %08x", (unsigned int) BGRC_P_READ_REG( DCE_RANGE9 ) )); |
|---|
| 1693 | BDBG_ERR(( "DCE_RANGE10 %08x", (unsigned int) BGRC_P_READ_REG( DCE_RANGE10 ) )); |
|---|
| 1694 | BDBG_ERR(( "DCE_RANGE11 %08x", (unsigned int) BGRC_P_READ_REG( DCE_RANGE11 ) )); |
|---|
| 1695 | BDBG_ERR(( "DCE_RANGE12 %08x", (unsigned int) BGRC_P_READ_REG( DCE_RANGE12 ) )); |
|---|
| 1696 | BDBG_ERR(( "DCE_RANGE13 %08x", (unsigned int) BGRC_P_READ_REG( DCE_RANGE13 ) )); |
|---|
| 1697 | BDBG_ERR(( "DCE_RANGE14 %08x", (unsigned int) BGRC_P_READ_REG( DCE_RANGE14 ) )); |
|---|
| 1698 | BDBG_ERR(( "DCE_VIDEO_CFG %08x", (unsigned int) BGRC_P_READ_REG( DCE_VIDEO_CFG ) )); |
|---|
| 1699 | BDBG_ERR(( "DCE_DIAG %08x", (unsigned int) BGRC_P_READ_REG( DCE_DIAG ) )); |
|---|
| 1700 | #endif |
|---|
| 1701 | BDBG_ERR(( "" )); |
|---|
| 1702 | } |
|---|
| 1703 | |
|---|
| 1704 | /***************************************************************************/ |
|---|
| 1705 | /* LIST PROCESSING FUNCTIONS */ |
|---|
| 1706 | /***************************************************************************/ |
|---|
| 1707 | static const uint8_t BGRC_P_LIST_GROUP_COUNT[] = |
|---|
| 1708 | { |
|---|
| 1709 | BGRC_P_LIST_DST_CLUT_GRP_CNTRL_COUNT, |
|---|
| 1710 | BGRC_P_LIST_SRC_CLUT_GRP_CNTRL_COUNT, |
|---|
| 1711 | BGRC_P_LIST_OUTPUT_COLOR_MATRIX_GRP_CNTRL_COUNT, |
|---|
| 1712 | BGRC_P_LIST_DST_COLOR_MATRIX_GRP_CNTRL_COUNT, |
|---|
| 1713 | BGRC_P_LIST_SRC_COLOR_MATRIX_GRP_CNTRL_COUNT, |
|---|
| 1714 | BGRC_P_LIST_SCALE_COEF_GRP_CNTRL_COUNT, |
|---|
| 1715 | BGRC_P_LIST_DST_COLOR_KEY_GRP_CNTRL_COUNT, |
|---|
| 1716 | BGRC_P_LIST_SRC_COLOR_KEY_GRP_CNTRL_COUNT, |
|---|
| 1717 | BGRC_P_LIST_ROP_GRP_CNTRL_COUNT, |
|---|
| 1718 | BGRC_P_LIST_BLEND_PARAM_GRP_CNTRL_COUNT, |
|---|
| 1719 | BGRC_P_LIST_SCALE_PARAM_GRP_CNTRL_COUNT, |
|---|
| 1720 | BGRC_P_LIST_BLIT_GRP_CNTRL_COUNT, |
|---|
| 1721 | BGRC_P_LIST_OUTPUT_FEEDER_GRP_CNTRL_COUNT, |
|---|
| 1722 | BGRC_P_LIST_DST_FEEDER_GRP_CNTRL_COUNT, |
|---|
| 1723 | BGRC_P_LIST_SRC_FEEDER_GRP_CNTRL_COUNT |
|---|
| 1724 | }; |
|---|
| 1725 | |
|---|
| 1726 | /***************************************************************************/ |
|---|
| 1727 | static bool BGRC_P_IsBlockDone( |
|---|
| 1728 | BGRC_Handle hGrc, |
|---|
| 1729 | BGRC_P_Block *pBlock ) |
|---|
| 1730 | { |
|---|
| 1731 | if( pBlock->ulRefCount == 0 ) |
|---|
| 1732 | { |
|---|
| 1733 | uint32_t ulDeviceOffset = BGRC_P_READ_REG( LIST_CURR_PKT_ADDR ) & BGRC_M2MC(LIST_CURR_PKT_ADDR_CURR_PKT_ADDR_MASK); |
|---|
| 1734 | |
|---|
| 1735 | if( (ulDeviceOffset < pBlock->ulOffset) || (ulDeviceOffset >= pBlock->ulOffset + BGRC_P_LIST_BLOCK_SIZE) ) |
|---|
| 1736 | return true; |
|---|
| 1737 | } |
|---|
| 1738 | |
|---|
| 1739 | return false; |
|---|
| 1740 | } |
|---|
| 1741 | |
|---|
| 1742 | /***************************************************************************/ |
|---|
| 1743 | #define BGRC_P_GET_PACKET_SIZE( ulHeader, ulSize ) \ |
|---|
| 1744 | { \ |
|---|
| 1745 | uint32_t ii; \ |
|---|
| 1746 | ulSize = 0; \ |
|---|
| 1747 | for( ii = 0; ii < BGRC_P_GROUP_COUNT; ++ii ) \ |
|---|
| 1748 | ulSize += (((ulHeader) >> ii) & 1) ? BGRC_P_LIST_GROUP_COUNT[ii] * sizeof (uint32_t) : 0; \ |
|---|
| 1749 | ulSize += (BGRC_P_HEADER_COUNT + BGRC_P_USERDATA_COUNT) * sizeof (uint32_t); \ |
|---|
| 1750 | } |
|---|
| 1751 | |
|---|
| 1752 | /***************************************************************************/ |
|---|
| 1753 | #define BGRC_P_ALIGN_PACKET_SIZE( ulSize ) \ |
|---|
| 1754 | { \ |
|---|
| 1755 | ulSize += (1 << BGRC_P_LIST_BLOCK_ALIGN) - 1; \ |
|---|
| 1756 | ulSize &= ~((1 << BGRC_P_LIST_BLOCK_ALIGN) - 1); \ |
|---|
| 1757 | } |
|---|
| 1758 | |
|---|
| 1759 | /***************************************************************************/ |
|---|
| 1760 | bool BGRC_P_List_InitPacketMemory( |
|---|
| 1761 | BGRC_Handle hGrc, |
|---|
| 1762 | uint32_t ulMemorySize ) |
|---|
| 1763 | { |
|---|
| 1764 | #if 1 |
|---|
| 1765 | BGRC_P_Block *pCurrBlock = NULL; |
|---|
| 1766 | BGRC_P_Block *pPrevBlock = NULL; |
|---|
| 1767 | uint32_t ulBlockCount = (ulMemorySize + BGRC_P_LIST_BLOCK_SIZE - 1) / BGRC_P_LIST_BLOCK_SIZE; |
|---|
| 1768 | uint32_t ii; |
|---|
| 1769 | |
|---|
| 1770 | for( ii = 0; ii < ulBlockCount; ++ii ) |
|---|
| 1771 | { |
|---|
| 1772 | /* create memory block */ |
|---|
| 1773 | pCurrBlock = BGRC_P_List_CreateBlock( hGrc ); |
|---|
| 1774 | if( pCurrBlock == NULL ) |
|---|
| 1775 | return false; |
|---|
| 1776 | |
|---|
| 1777 | /* attach to previous block */ |
|---|
| 1778 | if( pPrevBlock ) |
|---|
| 1779 | pPrevBlock->pNextBlock = pCurrBlock; |
|---|
| 1780 | else |
|---|
| 1781 | hGrc->pCurrListBlock = pCurrBlock; |
|---|
| 1782 | |
|---|
| 1783 | pPrevBlock = pCurrBlock; |
|---|
| 1784 | } |
|---|
| 1785 | |
|---|
| 1786 | /* set last block to point to first block */ |
|---|
| 1787 | if( pCurrBlock ) |
|---|
| 1788 | pCurrBlock->pNextBlock = hGrc->pCurrListBlock; |
|---|
| 1789 | |
|---|
| 1790 | hGrc->pPrevListBlock = pCurrBlock; |
|---|
| 1791 | #else |
|---|
| 1792 | /* create memory block */ |
|---|
| 1793 | hGrc->pCurrListBlock = BGRC_P_List_CreateBlock( hGrc ); |
|---|
| 1794 | if( hGrc->pCurrListBlock == NULL ) |
|---|
| 1795 | return false; |
|---|
| 1796 | |
|---|
| 1797 | /* attach block to itself */ |
|---|
| 1798 | hGrc->pCurrListBlock->pNextBlock = hGrc->pCurrListBlock; |
|---|
| 1799 | #endif |
|---|
| 1800 | hGrc->ulListBlockPos = 0; |
|---|
| 1801 | |
|---|
| 1802 | return true; |
|---|
| 1803 | } |
|---|
| 1804 | |
|---|
| 1805 | /***************************************************************************/ |
|---|
| 1806 | void BGRC_P_List_FreePacketMemory( |
|---|
| 1807 | BGRC_Handle hGrc ) |
|---|
| 1808 | { |
|---|
| 1809 | /* free all list blocks */ |
|---|
| 1810 | BGRC_P_Block *pBlock = hGrc->pCurrListBlock; |
|---|
| 1811 | while( pBlock ) |
|---|
| 1812 | { |
|---|
| 1813 | pBlock = BGRC_P_List_DestroyBlock( hGrc, pBlock ); |
|---|
| 1814 | } |
|---|
| 1815 | } |
|---|
| 1816 | |
|---|
| 1817 | /***************************************************************************/ |
|---|
| 1818 | void BGRC_P_List_CleanupPacketMemory( |
|---|
| 1819 | BGRC_Handle hGrc ) |
|---|
| 1820 | { |
|---|
| 1821 | BGRC_P_Block *pBlock = hGrc->pCurrListBlock; |
|---|
| 1822 | |
|---|
| 1823 | /* free packet memory blocks while total allocation size is greater than max */ |
|---|
| 1824 | while( pBlock && hGrc->ulPacketMemoryMax && |
|---|
| 1825 | (hGrc->ulPacketMemorySize > hGrc->ulPacketMemoryMax) && BGRC_P_IsBlockDone( hGrc, pBlock ) ) |
|---|
| 1826 | { |
|---|
| 1827 | pBlock = BGRC_P_List_DestroyBlock( hGrc, pBlock ); |
|---|
| 1828 | } |
|---|
| 1829 | } |
|---|
| 1830 | |
|---|
| 1831 | /***************************************************************************/ |
|---|
| 1832 | static uint32_t *BGRC_P_List_AllocPacket( |
|---|
| 1833 | BGRC_Handle hGrc, |
|---|
| 1834 | uint32_t ulPacketHeader, |
|---|
| 1835 | uint32_t *pulPacketOffset, |
|---|
| 1836 | uint32_t *pulPacketSize, |
|---|
| 1837 | BGRC_P_Block **ppBlock ) |
|---|
| 1838 | { |
|---|
| 1839 | uint32_t *pulPacket; |
|---|
| 1840 | uint32_t ulPacketSize; |
|---|
| 1841 | |
|---|
| 1842 | /* get packet size */ |
|---|
| 1843 | BGRC_P_GET_PACKET_SIZE( ulPacketHeader, ulPacketSize ); |
|---|
| 1844 | BGRC_P_ALIGN_PACKET_SIZE( ulPacketSize ); |
|---|
| 1845 | |
|---|
| 1846 | /* check if current memory block is full */ |
|---|
| 1847 | if( hGrc->ulListBlockPos + ulPacketSize > BGRC_P_LIST_BLOCK_SIZE ) |
|---|
| 1848 | { |
|---|
| 1849 | /* if next block is busy, check if it can be set to not busy */ |
|---|
| 1850 | BGRC_P_Block *pCurrBlock = hGrc->pCurrListBlock->pNextBlock; |
|---|
| 1851 | if( pCurrBlock->bBusy && BGRC_P_IsBlockDone( hGrc, pCurrBlock ) ) |
|---|
| 1852 | pCurrBlock->bBusy = false; |
|---|
| 1853 | |
|---|
| 1854 | /* check if next block is still busy */ |
|---|
| 1855 | if( pCurrBlock->bBusy ) |
|---|
| 1856 | { |
|---|
| 1857 | /* return error if memory is pre-allocated */ |
|---|
| 1858 | if( hGrc->bPreAllocMemory ) |
|---|
| 1859 | return NULL; |
|---|
| 1860 | |
|---|
| 1861 | /* create new memory block */ |
|---|
| 1862 | pCurrBlock = BGRC_P_List_CreateBlock( hGrc ); |
|---|
| 1863 | if( pCurrBlock == NULL ) |
|---|
| 1864 | return NULL; |
|---|
| 1865 | |
|---|
| 1866 | /* attach block to list */ |
|---|
| 1867 | pCurrBlock->pNextBlock = hGrc->pCurrListBlock->pNextBlock; |
|---|
| 1868 | hGrc->pCurrListBlock->pNextBlock = pCurrBlock; |
|---|
| 1869 | } |
|---|
| 1870 | |
|---|
| 1871 | /* clear new block */ |
|---|
| 1872 | hGrc->pPrevListBlock = hGrc->pCurrListBlock; |
|---|
| 1873 | hGrc->pCurrListBlock = pCurrBlock; |
|---|
| 1874 | hGrc->ulListBlockPos = 0; |
|---|
| 1875 | pCurrBlock->bBusy = true; |
|---|
| 1876 | } |
|---|
| 1877 | |
|---|
| 1878 | /* get packet address */ |
|---|
| 1879 | #if 0 |
|---|
| 1880 | pulPacket = (uint32_t *) ((uint8_t *) hGrc->pCurrListBlock->pvCached + hGrc->ulListBlockPos); |
|---|
| 1881 | #else |
|---|
| 1882 | pulPacket = (uint32_t *) ((uint8_t *) hGrc->pCurrListBlock->pvMemory + hGrc->ulListBlockPos); |
|---|
| 1883 | #endif |
|---|
| 1884 | *pulPacketOffset = hGrc->pCurrListBlock->ulOffset + hGrc->ulListBlockPos; |
|---|
| 1885 | *pulPacketSize = ulPacketSize; |
|---|
| 1886 | |
|---|
| 1887 | hGrc->ulListBlockPos += ulPacketSize; |
|---|
| 1888 | hGrc->pCurrListBlock->ulRefCount++; |
|---|
| 1889 | |
|---|
| 1890 | hGrc->ulPacketMemorySinceInterrupt += ulPacketSize; |
|---|
| 1891 | |
|---|
| 1892 | *ppBlock = hGrc->pCurrListBlock; |
|---|
| 1893 | return pulPacket; |
|---|
| 1894 | } |
|---|
| 1895 | |
|---|
| 1896 | /***************************************************************************/ |
|---|
| 1897 | static BERR_Code BGRC_P_List_PreparePacket( |
|---|
| 1898 | BGRC_Handle hGrc, |
|---|
| 1899 | bool bEnableInterrupt ) |
|---|
| 1900 | { |
|---|
| 1901 | BGRC_P_State *pState = &hGrc->CurrentState; |
|---|
| 1902 | |
|---|
| 1903 | /* set W alpha for alpha channel expansion for ARGB1555 formats */ |
|---|
| 1904 | if( pState->SrcSurface.hSurface && (!BPXL_IS_WINDOW_FORMAT(pState->SrcSurface.eFormat)) && |
|---|
| 1905 | BGRC_P_COMPARE_VALUE( SRC_SURFACE_FORMAT_DEF_1, FORMAT_TYPE, 1 ) ) |
|---|
| 1906 | { |
|---|
| 1907 | BGRC_P_SET_FIELD_DATA( SRC_W_ALPHA, W0_ALPHA, 0 ); |
|---|
| 1908 | BGRC_P_SET_FIELD_DATA( SRC_W_ALPHA, W1_ALPHA, |
|---|
| 1909 | BGRC_P_COMPARE_FIELD( SRC_SURFACE_FORMAT_DEF_3, ZERO_PAD, REPLICATE ) ? 0xFF : 0x80 ); |
|---|
| 1910 | if( BGRC_P_REGISTER_CHANGED( SRC_W_ALPHA ) ) |
|---|
| 1911 | BGRC_P_LOAD_LIST_GRP( LIST_PACKET_HEADER_1, SRC_FEEDER_GRP_CNTRL, GRP_ENABLE, pState, hGrc->aulCurrentRegs ); |
|---|
| 1912 | } |
|---|
| 1913 | |
|---|
| 1914 | if( pState->DstSurface.hSurface && (!BPXL_IS_WINDOW_FORMAT(pState->DstSurface.eFormat)) && |
|---|
| 1915 | BGRC_P_COMPARE_VALUE( DEST_SURFACE_FORMAT_DEF_1, FORMAT_TYPE, 1 ) ) |
|---|
| 1916 | { |
|---|
| 1917 | BGRC_P_SET_FIELD_DATA( DEST_W_ALPHA, W0_ALPHA, 0 ); |
|---|
| 1918 | BGRC_P_SET_FIELD_DATA( DEST_W_ALPHA, W1_ALPHA, |
|---|
| 1919 | BGRC_P_COMPARE_FIELD( DEST_SURFACE_FORMAT_DEF_3, ZERO_PAD, REPLICATE ) ? 0xFF : 0x80 ); |
|---|
| 1920 | if( BGRC_P_REGISTER_CHANGED( DEST_W_ALPHA ) ) |
|---|
| 1921 | BGRC_P_LOAD_LIST_GRP( LIST_PACKET_HEADER_1, DST_FEEDER_GRP_CNTRL, GRP_ENABLE, pState, hGrc->aulCurrentRegs ); |
|---|
| 1922 | } |
|---|
| 1923 | |
|---|
| 1924 | /* set rectangle fields */ |
|---|
| 1925 | BGRC_P_SET_SURFACE_DIMENSIONS( SRC, pState->SrcSurface.hSurface, |
|---|
| 1926 | pState->SrcSurface.ulX, pState->SrcSurface.ulY, pState->SrcSurface.ulWidth, pState->SrcSurface.ulHeight ); |
|---|
| 1927 | BGRC_P_SET_SURFACE_DIMENSIONS( DEST, pState->DstSurface.hSurface, |
|---|
| 1928 | pState->DstSurface.ulX, pState->DstSurface.ulY, pState->DstSurface.ulWidth, pState->DstSurface.ulHeight ); |
|---|
| 1929 | BGRC_P_SET_SURFACE_DIMENSIONS( OUTPUT, pState->OutSurface.hSurface, |
|---|
| 1930 | pState->OutSurface.ulX, pState->OutSurface.ulY, pState->OutSurface.ulWidth, pState->OutSurface.ulHeight ); |
|---|
| 1931 | |
|---|
| 1932 | #if defined(BCHP_M2MC_BLIT_SRC_TOP_LEFT_1) |
|---|
| 1933 | /* set rectangle registers for YCbCr 420 format */ |
|---|
| 1934 | if( hGrc->bYCbCr420Source ) |
|---|
| 1935 | { |
|---|
| 1936 | BGRC_P_SET_FIELD_DATA( BLIT_SRC_TOP_LEFT_1, LEFT, pState->SrcSurface.ulX / 2 ); |
|---|
| 1937 | BGRC_P_SET_FIELD_DATA( BLIT_SRC_TOP_LEFT_1, TOP, pState->SrcSurface.ulY / 2 ); |
|---|
| 1938 | BGRC_P_SET_FIELD_DATA( BLIT_SRC_SIZE_1, SURFACE_WIDTH, pState->SrcSurface.ulWidth / 2 ); |
|---|
| 1939 | BGRC_P_SET_FIELD_DATA( BLIT_SRC_SIZE_1, SURFACE_HEIGHT, pState->SrcSurface.ulHeight / 2 ); |
|---|
| 1940 | } |
|---|
| 1941 | else |
|---|
| 1942 | { |
|---|
| 1943 | BGRC_P_SET_FIELD_DATA( BLIT_SRC_TOP_LEFT_1, LEFT, 0 ); |
|---|
| 1944 | BGRC_P_SET_FIELD_DATA( BLIT_SRC_TOP_LEFT_1, TOP, 0 ); |
|---|
| 1945 | BGRC_P_SET_FIELD_DATA( BLIT_SRC_SIZE_1, SURFACE_WIDTH, 0 ); |
|---|
| 1946 | BGRC_P_SET_FIELD_DATA( BLIT_SRC_SIZE_1, SURFACE_HEIGHT, 0 ); |
|---|
| 1947 | } |
|---|
| 1948 | #endif |
|---|
| 1949 | |
|---|
| 1950 | /* check if there is no source surface */ |
|---|
| 1951 | if( pState->SrcSurface.hSurface == 0 ) |
|---|
| 1952 | { |
|---|
| 1953 | /* setup for source fill */ |
|---|
| 1954 | BGRC_P_SET_FIELD_ENUM( SRC_FEEDER_ENABLE, ENABLE, ENABLE ); |
|---|
| 1955 | BGRC_P_SET_FIELD_CHANNELS( SRC, BPXL_eA8_R8_G8_B8, pState->OutSurface.hSurface ); |
|---|
| 1956 | |
|---|
| 1957 | /* set source width and height registers to same as output */ |
|---|
| 1958 | BGRC_P_SET_FIELD_DATA( BLIT_SRC_SIZE, SURFACE_WIDTH, BGRC_P_GET_FIELD_DATA(BLIT_OUTPUT_SIZE, SURFACE_WIDTH) ); |
|---|
| 1959 | BGRC_P_SET_FIELD_DATA( BLIT_SRC_SIZE, SURFACE_HEIGHT, BGRC_P_GET_FIELD_DATA(BLIT_OUTPUT_SIZE, SURFACE_HEIGHT) ); |
|---|
| 1960 | |
|---|
| 1961 | /* set register load fields */ |
|---|
| 1962 | if( BGRC_P_REGISTER_CHANGED( SRC_FEEDER_ENABLE ) ) |
|---|
| 1963 | BGRC_P_LOAD_LIST_GRP( LIST_PACKET_HEADER_1, SRC_FEEDER_GRP_CNTRL, GRP_ENABLE, pState, hGrc->aulCurrentRegs ); |
|---|
| 1964 | |
|---|
| 1965 | if( BGRC_P_REGISTER_CHANGED( BLIT_SRC_SIZE ) ) |
|---|
| 1966 | BGRC_P_LOAD_LIST_GRP( LIST_PACKET_HEADER_1, BLIT_GRP_CNTRL, GRP_ENABLE, pState, hGrc->aulCurrentRegs ); |
|---|
| 1967 | } |
|---|
| 1968 | |
|---|
| 1969 | /* check if there is no destination surface */ |
|---|
| 1970 | { |
|---|
| 1971 | if( pState->DstSurface.hSurface == 0 ) |
|---|
| 1972 | { |
|---|
| 1973 | /* setup for destination fill */ |
|---|
| 1974 | BGRC_P_SET_FIELD_ENUM( DEST_FEEDER_ENABLE, ENABLE, ENABLE ); |
|---|
| 1975 | BGRC_P_SET_FIELD_CHANNELS( DEST, BPXL_eA8_R8_G8_B8, pState->OutSurface.hSurface ); |
|---|
| 1976 | |
|---|
| 1977 | /* set destination width and height registers to same as output */ |
|---|
| 1978 | BGRC_P_SET_FIELD_DATA( BLIT_DEST_SIZE, SURFACE_WIDTH, BGRC_P_GET_FIELD_DATA(BLIT_OUTPUT_SIZE, SURFACE_WIDTH) ); |
|---|
| 1979 | BGRC_P_SET_FIELD_DATA( BLIT_DEST_SIZE, SURFACE_HEIGHT, BGRC_P_GET_FIELD_DATA(BLIT_OUTPUT_SIZE, SURFACE_HEIGHT) ); |
|---|
| 1980 | |
|---|
| 1981 | /* set register load fields */ |
|---|
| 1982 | if( BGRC_P_REGISTER_CHANGED( DEST_FEEDER_ENABLE ) ) |
|---|
| 1983 | BGRC_P_LOAD_LIST_GRP( LIST_PACKET_HEADER_1, DST_FEEDER_GRP_CNTRL, GRP_ENABLE, pState, hGrc->aulCurrentRegs ); |
|---|
| 1984 | |
|---|
| 1985 | if( BGRC_P_REGISTER_CHANGED( BLIT_DEST_SIZE ) ) |
|---|
| 1986 | BGRC_P_LOAD_LIST_GRP( LIST_PACKET_HEADER_1, BLIT_GRP_CNTRL, GRP_ENABLE, pState, hGrc->aulCurrentRegs ); |
|---|
| 1987 | } |
|---|
| 1988 | } |
|---|
| 1989 | |
|---|
| 1990 | /* set blit direction fields */ |
|---|
| 1991 | if( pState->bSrcRightToLeft || pState->bSrcBottomToTop || |
|---|
| 1992 | pState->bDstRightToLeft || pState->bDstBottomToTop || |
|---|
| 1993 | pState->bOutRightToLeft || pState->bOutBottomToTop ) |
|---|
| 1994 | { |
|---|
| 1995 | BGRC_P_SET_FIELD_COMP( BLIT_CTRL, SRC_H_DIRECTION, RIGHT_TO_LEFT, LEFT_TO_RIGHT, pState->bSrcRightToLeft ); |
|---|
| 1996 | BGRC_P_SET_FIELD_COMP( BLIT_CTRL, SRC_V_DIRECTION, BOTTOM_TO_TOP, TOP_TO_BOTTOM, pState->bSrcBottomToTop ); |
|---|
| 1997 | BGRC_P_SET_FIELD_COMP( BLIT_CTRL, DEST_H_DIRECTION, RIGHT_TO_LEFT, LEFT_TO_RIGHT, pState->bDstRightToLeft ); |
|---|
| 1998 | BGRC_P_SET_FIELD_COMP( BLIT_CTRL, DEST_V_DIRECTION, BOTTOM_TO_TOP, TOP_TO_BOTTOM, pState->bDstBottomToTop ); |
|---|
| 1999 | BGRC_P_SET_FIELD_COMP( BLIT_CTRL, OUTPUT_H_DIRECTION, RIGHT_TO_LEFT, LEFT_TO_RIGHT, pState->bOutRightToLeft ); |
|---|
| 2000 | BGRC_P_SET_FIELD_COMP( BLIT_CTRL, OUTPUT_V_DIRECTION, BOTTOM_TO_TOP, TOP_TO_BOTTOM, pState->bOutBottomToTop ); |
|---|
| 2001 | } |
|---|
| 2002 | else if( pState->SrcSurface.hSurface && BGRC_P_SURFACE_INTERSECT( SRC, OUTPUT ) ) |
|---|
| 2003 | { |
|---|
| 2004 | BGRC_P_SET_FIELD_DIRECTION( SRC, OUTPUT, DEST, H, LEFT, LEFT_TO_RIGHT, RIGHT_TO_LEFT ); |
|---|
| 2005 | BGRC_P_SET_FIELD_DIRECTION( SRC, OUTPUT, DEST, V, TOP, TOP_TO_BOTTOM, BOTTOM_TO_TOP ); |
|---|
| 2006 | } |
|---|
| 2007 | else if( pState->DstSurface.hSurface && BGRC_P_SURFACE_INTERSECT( DEST, OUTPUT ) ) |
|---|
| 2008 | { |
|---|
| 2009 | BGRC_P_SET_FIELD_DIRECTION( DEST, OUTPUT, SRC, H, LEFT, LEFT_TO_RIGHT, RIGHT_TO_LEFT ); |
|---|
| 2010 | BGRC_P_SET_FIELD_DIRECTION( DEST, OUTPUT, SRC, V, TOP, TOP_TO_BOTTOM, BOTTOM_TO_TOP ); |
|---|
| 2011 | } |
|---|
| 2012 | else |
|---|
| 2013 | { |
|---|
| 2014 | BGRC_P_SET_FIELD_ENUM( BLIT_CTRL, SRC_H_DIRECTION, LEFT_TO_RIGHT ); |
|---|
| 2015 | BGRC_P_SET_FIELD_ENUM( BLIT_CTRL, SRC_V_DIRECTION, TOP_TO_BOTTOM ); |
|---|
| 2016 | BGRC_P_SET_FIELD_ENUM( BLIT_CTRL, DEST_H_DIRECTION, LEFT_TO_RIGHT ); |
|---|
| 2017 | BGRC_P_SET_FIELD_ENUM( BLIT_CTRL, DEST_V_DIRECTION, TOP_TO_BOTTOM ); |
|---|
| 2018 | BGRC_P_SET_FIELD_ENUM( BLIT_CTRL, OUTPUT_H_DIRECTION, LEFT_TO_RIGHT ); |
|---|
| 2019 | BGRC_P_SET_FIELD_ENUM( BLIT_CTRL, OUTPUT_V_DIRECTION, TOP_TO_BOTTOM ); |
|---|
| 2020 | } |
|---|
| 2021 | |
|---|
| 2022 | /* set scaler fields */ |
|---|
| 2023 | if( pState->SrcSurface.hSurface && (hGrc->bNoScaleFilter || |
|---|
| 2024 | (pState->ulHorzScalerStep != (1 << BGRC_P_SCALER_STEP_FRAC_BITS)) || |
|---|
| 2025 | (pState->ulVertScalerStep != (1 << BGRC_P_SCALER_STEP_FRAC_BITS))) ) |
|---|
| 2026 | { |
|---|
| 2027 | /* get fir filter coefficient tables */ |
|---|
| 2028 | const uint32_t *pulHorzFirCoeffs = BGRC_P_GET_FILTER_COEFFICIENTS[pState->eHorzCoeffs]( pState->ulHorzScalerStep ); |
|---|
| 2029 | const uint32_t *pulVertFirCoeffs = BGRC_P_GET_FILTER_COEFFICIENTS[pState->eVertCoeffs]( pState->ulVertScalerStep ); |
|---|
| 2030 | |
|---|
| 2031 | /* check if scaler step has changed */ |
|---|
| 2032 | if( (pState->pulHorzFirCoeffs != pulHorzFirCoeffs) || |
|---|
| 2033 | (pState->pulVertFirCoeffs != pulVertFirCoeffs) ) |
|---|
| 2034 | { |
|---|
| 2035 | #if defined(BCHP_M2MC_SCALER_CTRL_CLUT_SCALE_MODE_ENABLE) |
|---|
| 2036 | BGRC_P_SET_FIELD_COMP( SCALER_CTRL, CLUT_SCALE_MODE, ENABLE, DISABLE, |
|---|
| 2037 | (pState->eHorzCoeffs == BGRC_FilterCoeffs_ePointSample) && |
|---|
| 2038 | (pState->eVertCoeffs == BGRC_FilterCoeffs_ePointSample) ); |
|---|
| 2039 | #endif |
|---|
| 2040 | |
|---|
| 2041 | BGRC_P_LOAD_LIST_GRP( LIST_PACKET_HEADER_1, SCALE_COEF_GRP_CNTRL, GRP_ENABLE, pState, hGrc->aulCurrentRegs ); |
|---|
| 2042 | pState->pulHorzFirCoeffs = pulHorzFirCoeffs; |
|---|
| 2043 | pState->pulVertFirCoeffs = pulVertFirCoeffs; |
|---|
| 2044 | } |
|---|
| 2045 | |
|---|
| 2046 | /* set scaler enable and scale order */ |
|---|
| 2047 | BGRC_P_SET_FIELD_ENUM( BLIT_HEADER, SRC_SCALER_ENABLE, ENABLE ); |
|---|
| 2048 | BGRC_P_SET_FIELD_COMP( SCALER_CTRL, SCALER_ORDER, VERT_THEN_HORIZ, HORIZ_THEN_VERT, |
|---|
| 2049 | pState->ulHorzScalerStep < (1 << BGRC_P_SCALER_STEP_FRAC_BITS) ); |
|---|
| 2050 | |
|---|
| 2051 | /* set horizontal scaler */ |
|---|
| 2052 | BGRC_P_SET_FIELD_ENUM( SCALER_CTRL, HORIZ_SCALER_ENABLE, ENABLE ); |
|---|
| 2053 | BGRC_P_SET_FIELD_DATA( HORIZ_SCALER_INITIAL_PHASE, PHASE, pState->ulHorzInitPhase / pState->ulHorzAveragerCount ) |
|---|
| 2054 | BGRC_P_SET_FIELD_DATA( HORIZ_SCALER_STEP, STEP, pState->ulHorzScalerStep / pState->ulHorzAveragerCount ); |
|---|
| 2055 | |
|---|
| 2056 | #if defined(BCHP_M2MC_HORIZ_SCALER_1_INITIAL_PHASE) |
|---|
| 2057 | /* set scaler registers for YCbCr 420 format */ |
|---|
| 2058 | if( hGrc->bYCbCr420Source ) |
|---|
| 2059 | { |
|---|
| 2060 | BGRC_P_SET_FIELD_DATA( HORIZ_SCALER_1_INITIAL_PHASE, PHASE, pState->ulHorzInitPhase / 2 );/*- |
|---|
| 2061 | pState->ulHorzScalerStep / 2 );*/ |
|---|
| 2062 | BGRC_P_SET_FIELD_DATA( HORIZ_SCALER_1_STEP, STEP, pState->ulHorzScalerStep / 2 ); |
|---|
| 2063 | } |
|---|
| 2064 | #endif |
|---|
| 2065 | |
|---|
| 2066 | #if ((BCHP_CHIP==7038) && (BCHP_VER < BCHP_VER_C0)) |
|---|
| 2067 | /* set horizontal averager */ |
|---|
| 2068 | BGRC_P_SET_FIELD_COMP( SCALER_CTRL, HORIZ_AVERAGER_ENABLE, ENABLE, DISABLE, |
|---|
| 2069 | pState->ulHorzAveragerCount > 1 ); |
|---|
| 2070 | BGRC_P_SET_FIELD_DATA( HORIZ_AVERAGER_COUNT, COUNT, pState->ulHorzAveragerCount ); |
|---|
| 2071 | BGRC_P_SET_FIELD_DATA( HORIZ_AVERAGER_COEFF, COEFF, pState->ulHorzAveragerCoeff ); |
|---|
| 2072 | #endif |
|---|
| 2073 | |
|---|
| 2074 | /* check if striping */ |
|---|
| 2075 | if( (pState->SrcSurface.ulWidth > BGRC_P_STRIP_WIDTH_MAX) && (pState->OutSurface.ulWidth > BGRC_P_STRIP_WIDTH_MAX) ) |
|---|
| 2076 | { |
|---|
| 2077 | /* set striping */ |
|---|
| 2078 | BGRC_P_SET_FIELD_ENUM( BLIT_CTRL, STRIPE_ENABLE, ENABLE ); |
|---|
| 2079 | BGRC_P_SET_FIELD_DATA( BLIT_INPUT_STRIPE_WIDTH, STRIPE_WIDTH, pState->ulSrcStripWidth ); |
|---|
| 2080 | BGRC_P_SET_FIELD_DATA( BLIT_OUTPUT_STRIPE_WIDTH, STRIPE_WIDTH, pState->ulOutStripWidth ); |
|---|
| 2081 | BGRC_P_SET_FIELD_DATA( BLIT_STRIPE_OVERLAP, STRIPE_WIDTH, pState->ulOverlapStrip ); |
|---|
| 2082 | |
|---|
| 2083 | #if defined(BCHP_M2MC_BLIT_INPUT_STRIPE_WIDTH_1) |
|---|
| 2084 | if( hGrc->bYCbCr420Source ) |
|---|
| 2085 | { |
|---|
| 2086 | BGRC_P_SET_FIELD_DATA( BLIT_INPUT_STRIPE_WIDTH_1, STRIPE_WIDTH, pState->ulSrcStripWidth / 2 ); |
|---|
| 2087 | BGRC_P_SET_FIELD_DATA( BLIT_STRIPE_OVERLAP_1, STRIPE_WIDTH, pState->ulOverlapStrip ); |
|---|
| 2088 | } |
|---|
| 2089 | #endif |
|---|
| 2090 | |
|---|
| 2091 | /* disable dst feeder when striping enabled */ |
|---|
| 2092 | BGRC_P_SET_FIELD_ENUM( DEST_FEEDER_ENABLE, ENABLE, DISABLE ); |
|---|
| 2093 | |
|---|
| 2094 | if( BGRC_P_REGISTER_CHANGED( DEST_FEEDER_ENABLE ) ) |
|---|
| 2095 | BGRC_P_LOAD_LIST_GRP( LIST_PACKET_HEADER_1, DST_FEEDER_GRP_CNTRL, GRP_ENABLE, pState, hGrc->aulCurrentRegs ); |
|---|
| 2096 | |
|---|
| 2097 | /* set register load field */ |
|---|
| 2098 | if( BGRC_P_REGISTER_CHANGED( BLIT_INPUT_STRIPE_WIDTH ) || |
|---|
| 2099 | BGRC_P_REGISTER_CHANGED( BLIT_OUTPUT_STRIPE_WIDTH ) || |
|---|
| 2100 | BGRC_P_REGISTER_CHANGED( BLIT_STRIPE_OVERLAP ) ) |
|---|
| 2101 | BGRC_P_LOAD_LIST_GRP( LIST_PACKET_HEADER_1, BLIT_GRP_CNTRL, GRP_ENABLE, pState, hGrc->aulCurrentRegs ); |
|---|
| 2102 | } |
|---|
| 2103 | else |
|---|
| 2104 | { |
|---|
| 2105 | /* disable striping */ |
|---|
| 2106 | BGRC_P_SET_FIELD_ENUM ( BLIT_CTRL, STRIPE_ENABLE, DISABLE ); |
|---|
| 2107 | } |
|---|
| 2108 | |
|---|
| 2109 | /* check if vertical scaling */ |
|---|
| 2110 | if( pState->bVertFilter || (pState->ulVertScalerStep != (1 << BGRC_P_SCALER_STEP_FRAC_BITS)) || hGrc->bYCbCr420Source ) |
|---|
| 2111 | { |
|---|
| 2112 | /* set vertical scaler */ |
|---|
| 2113 | BGRC_P_SET_FIELD_ENUM( SCALER_CTRL, VERT_SCALER_ENABLE, ENABLE ); |
|---|
| 2114 | BGRC_P_SET_FIELD_DATA( VERT_SCALER_INITIAL_PHASE, PHASE, pState->ulVertInitPhase / pState->ulVertAveragerCount ); |
|---|
| 2115 | BGRC_P_SET_FIELD_DATA( VERT_SCALER_STEP, STEP, pState->ulVertScalerStep / pState->ulVertAveragerCount ); |
|---|
| 2116 | |
|---|
| 2117 | #if defined(BCHP_M2MC_VERT_SCALER_1_INITIAL_PHASE) |
|---|
| 2118 | /* set scaler registers for YCbCr 420 format */ |
|---|
| 2119 | if( hGrc->bYCbCr420Source ) |
|---|
| 2120 | { |
|---|
| 2121 | BGRC_P_SET_FIELD_DATA( VERT_SCALER_1_INITIAL_PHASE, PHASE, pState->ulVertInitPhase / 2 );/*- |
|---|
| 2122 | pState->ulVertScalerStep / 2 );*/ |
|---|
| 2123 | BGRC_P_SET_FIELD_DATA( VERT_SCALER_1_STEP, STEP, pState->ulVertScalerStep / 2 ); |
|---|
| 2124 | } |
|---|
| 2125 | #endif |
|---|
| 2126 | |
|---|
| 2127 | #if ((BCHP_CHIP==7038) && (BCHP_VER < BCHP_VER_C0)) |
|---|
| 2128 | /* set vertical averager */ |
|---|
| 2129 | BGRC_P_SET_FIELD_COMP( SCALER_CTRL, VERT_AVERAGER_ENABLE, ENABLE, DISABLE, |
|---|
| 2130 | pState->ulVertAveragerCount > 1 ); |
|---|
| 2131 | BGRC_P_SET_FIELD_DATA( VERT_AVERAGER_COUNT, COUNT, pState->ulVertAveragerCount ); |
|---|
| 2132 | BGRC_P_SET_FIELD_DATA( VERT_AVERAGER_COEFF, COEFF, pState->ulVertAveragerCoeff ); |
|---|
| 2133 | #endif |
|---|
| 2134 | } |
|---|
| 2135 | else |
|---|
| 2136 | { |
|---|
| 2137 | /* disable vertical scaling and averagering */ |
|---|
| 2138 | BGRC_P_SET_FIELD_ENUM( SCALER_CTRL, VERT_SCALER_ENABLE, DISABLE ); |
|---|
| 2139 | #if ((BCHP_CHIP==7038) && (BCHP_VER < BCHP_VER_C0)) |
|---|
| 2140 | BGRC_P_SET_FIELD_ENUM( SCALER_CTRL, VERT_AVERAGER_ENABLE, DISABLE ); |
|---|
| 2141 | #endif |
|---|
| 2142 | } |
|---|
| 2143 | |
|---|
| 2144 | /* set register load field */ |
|---|
| 2145 | if( BGRC_P_REGISTER_CHANGED( SCALER_CTRL ) || |
|---|
| 2146 | BGRC_P_REGISTER_CHANGED( HORIZ_AVERAGER_COUNT ) || |
|---|
| 2147 | BGRC_P_REGISTER_CHANGED( HORIZ_AVERAGER_COEFF ) || |
|---|
| 2148 | BGRC_P_REGISTER_CHANGED( HORIZ_SCALER_INITIAL_PHASE ) || |
|---|
| 2149 | BGRC_P_REGISTER_CHANGED( HORIZ_SCALER_STEP ) || |
|---|
| 2150 | BGRC_P_REGISTER_CHANGED( VERT_AVERAGER_COUNT ) || |
|---|
| 2151 | BGRC_P_REGISTER_CHANGED( VERT_AVERAGER_COEFF ) || |
|---|
| 2152 | BGRC_P_REGISTER_CHANGED( VERT_SCALER_INITIAL_PHASE ) || |
|---|
| 2153 | BGRC_P_REGISTER_CHANGED( VERT_SCALER_STEP ) ) |
|---|
| 2154 | BGRC_P_LOAD_LIST_GRP( LIST_PACKET_HEADER_1, SCALE_PARAM_GRP_CNTRL, GRP_ENABLE, pState, hGrc->aulCurrentRegs ); |
|---|
| 2155 | } |
|---|
| 2156 | else |
|---|
| 2157 | { |
|---|
| 2158 | /* disable scaling */ |
|---|
| 2159 | BGRC_P_SET_FIELD_ENUM( BLIT_HEADER, SRC_SCALER_ENABLE, DISABLE ); |
|---|
| 2160 | BGRC_P_SET_FIELD_ENUM( BLIT_CTRL, STRIPE_ENABLE, DISABLE ); |
|---|
| 2161 | BGRC_P_SET_FIELD_ENUM( SCALER_CTRL, HORIZ_SCALER_ENABLE, DISABLE ); |
|---|
| 2162 | BGRC_P_SET_FIELD_ENUM( SCALER_CTRL, VERT_SCALER_ENABLE, DISABLE ); |
|---|
| 2163 | #if ((BCHP_CHIP==7038) && (BCHP_VER < BCHP_VER_C0)) |
|---|
| 2164 | BGRC_P_SET_FIELD_ENUM( SCALER_CTRL, HORIZ_AVERAGER_ENABLE, DISABLE ); |
|---|
| 2165 | BGRC_P_SET_FIELD_ENUM( SCALER_CTRL, VERT_AVERAGER_ENABLE, DISABLE ); |
|---|
| 2166 | #endif |
|---|
| 2167 | |
|---|
| 2168 | /* set register load field */ |
|---|
| 2169 | if( BGRC_P_REGISTER_CHANGED( SCALER_CTRL ) ) |
|---|
| 2170 | BGRC_P_LOAD_LIST_GRP( LIST_PACKET_HEADER_1, SCALE_PARAM_GRP_CNTRL, GRP_ENABLE, pState, hGrc->aulCurrentRegs ); |
|---|
| 2171 | } |
|---|
| 2172 | |
|---|
| 2173 | /* set feedthrough field */ |
|---|
| 2174 | #if ((BCHP_CHIP==7038) && (BCHP_VER < BCHP_VER_C0)) || \ |
|---|
| 2175 | ((BCHP_CHIP==7438) && (BCHP_VER >= BCHP_VER_A0)) |
|---|
| 2176 | if( BGRC_P_COMPARE_FIELD( BLIT_HEADER, SRC_COLOR_KEY_ENABLE, ENABLE ) || |
|---|
| 2177 | BGRC_P_COMPARE_FIELD( BLIT_HEADER, DEST_COLOR_KEY_ENABLE, ENABLE ) || |
|---|
| 2178 | BGRC_P_COMPARE_FIELD( BLIT_HEADER, SRC_COLOR_MATRIX_ENABLE, ENABLE ) || |
|---|
| 2179 | #if ((BCHP_CHIP==7038) && (BCHP_VER < BCHP_VER_C0)) |
|---|
| 2180 | BGRC_P_COMPARE_FIELD( BLIT_HEADER, DEST_COLOR_MATRIX_ENABLE, ENABLE ) || |
|---|
| 2181 | BGRC_P_COMPARE_FIELD( BLIT_HEADER, OUTPUT_COLOR_MATRIX_ENABLE, ENABLE ) || |
|---|
| 2182 | #endif |
|---|
| 2183 | BGRC_P_COMPARE_FIELD( BLIT_HEADER, SRC_SCALER_ENABLE, ENABLE ) || ( |
|---|
| 2184 | BGRC_P_COMPARE_VALUE( SRC_SURFACE_FORMAT_DEF_1, FORMAT_TYPE, 3 ) && |
|---|
| 2185 | BGRC_P_COMPARE_FIELD( SRC_SURFACE_FORMAT_DEF_3, PALETTE_BYPASS, LOOKUP )) || ( |
|---|
| 2186 | BGRC_P_COMPARE_VALUE( DEST_SURFACE_FORMAT_DEF_1, FORMAT_TYPE, 3 ) && |
|---|
| 2187 | BGRC_P_COMPARE_FIELD( DEST_SURFACE_FORMAT_DEF_3, PALETTE_BYPASS, LOOKUP )) ) |
|---|
| 2188 | { |
|---|
| 2189 | BGRC_P_SET_FIELD_ENUM( BLIT_HEADER, FEEDTHROUGH, ONE_PIXEL ); |
|---|
| 2190 | } |
|---|
| 2191 | else |
|---|
| 2192 | { |
|---|
| 2193 | #if ((BCHP_CHIP==7438) && (BCHP_VER >= BCHP_VER_A0)) |
|---|
| 2194 | if( hGrc->ulDeviceNum == 0 ) |
|---|
| 2195 | { |
|---|
| 2196 | BGRC_P_SET_FIELD_ENUM( BLIT_HEADER, FEEDTHROUGH, ONE_PIXEL ); |
|---|
| 2197 | } |
|---|
| 2198 | else |
|---|
| 2199 | #endif |
|---|
| 2200 | { |
|---|
| 2201 | BGRC_P_SET_FIELD_ENUM( BLIT_HEADER, FEEDTHROUGH, FOUR_PIXELS ); |
|---|
| 2202 | } |
|---|
| 2203 | } |
|---|
| 2204 | #endif |
|---|
| 2205 | |
|---|
| 2206 | /* set interrupt enable field */ |
|---|
| 2207 | BGRC_P_SET_FIELD_DATA( BLIT_HEADER, INTERRUPT_ENABLE, bEnableInterrupt ? 1 : 0 ); |
|---|
| 2208 | |
|---|
| 2209 | /* check if loading a source palette */ |
|---|
| 2210 | if( BGRC_P_COMPARE_VALUE( SRC_SURFACE_FORMAT_DEF_1, FORMAT_TYPE, 3 ) && |
|---|
| 2211 | BGRC_P_COMPARE_FIELD( SRC_SURFACE_FORMAT_DEF_3, PALETTE_BYPASS, LOOKUP ) ) |
|---|
| 2212 | { |
|---|
| 2213 | if( pState->SrcSurface.ulPaletteOffset ) |
|---|
| 2214 | BGRC_P_LOAD_LIST_GRP( LIST_PACKET_HEADER_1, SRC_CLUT_GRP_CNTRL, GRP_ENABLE, pState, hGrc->aulCurrentRegs ); |
|---|
| 2215 | } |
|---|
| 2216 | |
|---|
| 2217 | #if ((BCHP_CHIP==7038) && (BCHP_VER < BCHP_VER_C0)) |
|---|
| 2218 | /* check if loading a destination palette */ |
|---|
| 2219 | if( BGRC_P_COMPARE_VALUE( DEST_SURFACE_FORMAT_DEF_1, FORMAT_TYPE, 3 ) && |
|---|
| 2220 | BGRC_P_COMPARE_FIELD( DEST_SURFACE_FORMAT_DEF_3, PALETTE_BYPASS, LOOKUP ) ) |
|---|
| 2221 | { |
|---|
| 2222 | BGRC_P_LOAD_LIST_GRP( LIST_PACKET_HEADER_1, DST_CLUT_GRP_CNTRL, GRP_ENABLE, pState, hGrc->aulCurrentRegs ); |
|---|
| 2223 | } |
|---|
| 2224 | #endif |
|---|
| 2225 | |
|---|
| 2226 | /* set register load field */ |
|---|
| 2227 | if( BGRC_P_REGISTER_CHANGED( BLIT_HEADER ) || |
|---|
| 2228 | BGRC_P_REGISTER_CHANGED( BLIT_CTRL ) || |
|---|
| 2229 | (hGrc->aulCurrentRegs[BGRC_P_REG_INDEX(LIST_PACKET_HEADER_1)] == 0) ) |
|---|
| 2230 | { |
|---|
| 2231 | BGRC_P_LOAD_LIST_GRP( LIST_PACKET_HEADER_1, BLIT_GRP_CNTRL, GRP_ENABLE, pState, hGrc->aulCurrentRegs ); |
|---|
| 2232 | } |
|---|
| 2233 | |
|---|
| 2234 | return BERR_SUCCESS; |
|---|
| 2235 | } |
|---|
| 2236 | |
|---|
| 2237 | #define BGRC_P_OPTIMIZE_SET_REGISTER |
|---|
| 2238 | /***************************************************************************/ |
|---|
| 2239 | static void BGRC_P_List_WritePacket( |
|---|
| 2240 | BGRC_Handle hGrc, |
|---|
| 2241 | uint32_t *pulPacket, |
|---|
| 2242 | uint32_t ulPacketHeader ) |
|---|
| 2243 | { |
|---|
| 2244 | BGRC_P_State *pState = &hGrc->CurrentState; |
|---|
| 2245 | |
|---|
| 2246 | /* write list header */ |
|---|
| 2247 | *pulPacket++ = BCHP_FIELD_ENUM(M2MC_LIST_PACKET_HEADER_0, LAST_PKT_IND, NextPktInvalid); |
|---|
| 2248 | *pulPacket++ = ulPacketHeader; |
|---|
| 2249 | |
|---|
| 2250 | /* write source group registers */ |
|---|
| 2251 | if( BGRC_P_COMPARE_FIELD( LIST_PACKET_HEADER_1, SRC_FEEDER_GRP_CNTRL, GRP_ENABLE ) ) |
|---|
| 2252 | { |
|---|
| 2253 | #ifdef BGRC_P_OPTIMIZE_SET_REGISTER |
|---|
| 2254 | BGRC_P_SET_REGISTERS( SRC_FEEDER, SRC_FEEDER_ENABLE ); |
|---|
| 2255 | #else |
|---|
| 2256 | BGRC_P_SET_REGISTER( SRC_FEEDER_ENABLE ); |
|---|
| 2257 | BGRC_P_SET_REGISTER( SRC_SURFACE_ADDR_0 ); |
|---|
| 2258 | BGRC_P_SET_REGISTER( SRC_SURFACE_STRIDE_0 ); |
|---|
| 2259 | BGRC_P_SET_REGISTER( SRC_SURFACE_ADDR_1 ); |
|---|
| 2260 | BGRC_P_SET_REGISTER( SRC_SURFACE_STRIDE_1 ); |
|---|
| 2261 | BGRC_P_SET_REGISTER( SRC_SURFACE_FORMAT_DEF_1 ); |
|---|
| 2262 | BGRC_P_SET_REGISTER( SRC_SURFACE_FORMAT_DEF_2 ); |
|---|
| 2263 | BGRC_P_SET_REGISTER( SRC_SURFACE_FORMAT_DEF_3 ); |
|---|
| 2264 | #if defined(BCHP_M2MC_SRC_SURFACE_1_FORMAT_DEF_1) |
|---|
| 2265 | BGRC_P_SET_REGISTER( SRC_SURFACE_1_FORMAT_DEF_1 ); |
|---|
| 2266 | BGRC_P_SET_REGISTER( SRC_SURFACE_1_FORMAT_DEF_2 ); |
|---|
| 2267 | BGRC_P_SET_REGISTER( SRC_SURFACE_1_FORMAT_DEF_3 ); |
|---|
| 2268 | #endif |
|---|
| 2269 | BGRC_P_SET_REGISTER( SRC_W_ALPHA ); |
|---|
| 2270 | BGRC_P_SET_REGISTER( SRC_CONSTANT_COLOR ); |
|---|
| 2271 | #endif |
|---|
| 2272 | } |
|---|
| 2273 | |
|---|
| 2274 | /* write destination group registers */ |
|---|
| 2275 | if( BGRC_P_COMPARE_FIELD( LIST_PACKET_HEADER_1, DST_FEEDER_GRP_CNTRL, GRP_ENABLE ) ) |
|---|
| 2276 | { |
|---|
| 2277 | #ifdef BGRC_P_OPTIMIZE_SET_REGISTER |
|---|
| 2278 | BGRC_P_SET_REGISTERS( DST_FEEDER, DEST_FEEDER_ENABLE ); |
|---|
| 2279 | #else |
|---|
| 2280 | BGRC_P_SET_REGISTER( DEST_FEEDER_ENABLE ); |
|---|
| 2281 | BGRC_P_SET_REGISTER( DEST_SURFACE_ADDR_0 ); |
|---|
| 2282 | BGRC_P_SET_REGISTER( DEST_SURFACE_STRIDE_0 ); |
|---|
| 2283 | BGRC_P_SET_REGISTER( DEST_SURFACE_ADDR_1 ); |
|---|
| 2284 | BGRC_P_SET_REGISTER( DEST_SURFACE_STRIDE_1 ); |
|---|
| 2285 | BGRC_P_SET_REGISTER( DEST_SURFACE_FORMAT_DEF_1 ); |
|---|
| 2286 | BGRC_P_SET_REGISTER( DEST_SURFACE_FORMAT_DEF_2 ); |
|---|
| 2287 | BGRC_P_SET_REGISTER( DEST_SURFACE_FORMAT_DEF_3 ); |
|---|
| 2288 | BGRC_P_SET_REGISTER( DEST_W_ALPHA ); |
|---|
| 2289 | BGRC_P_SET_REGISTER( DEST_CONSTANT_COLOR ); |
|---|
| 2290 | #endif |
|---|
| 2291 | } |
|---|
| 2292 | |
|---|
| 2293 | /* write output group registers */ |
|---|
| 2294 | if( BGRC_P_COMPARE_FIELD( LIST_PACKET_HEADER_1, OUTPUT_FEEDER_GRP_CNTRL, GRP_ENABLE ) ) |
|---|
| 2295 | { |
|---|
| 2296 | #ifdef BGRC_P_OPTIMIZE_SET_REGISTER |
|---|
| 2297 | BGRC_P_SET_REGISTERS( OUTPUT_FEEDER, OUTPUT_FEEDER_ENABLE ); |
|---|
| 2298 | #else |
|---|
| 2299 | BGRC_P_SET_REGISTER( OUTPUT_FEEDER_ENABLE ); |
|---|
| 2300 | BGRC_P_SET_REGISTER( OUTPUT_SURFACE_ADDR_0 ); |
|---|
| 2301 | BGRC_P_SET_REGISTER( OUTPUT_SURFACE_STRIDE_0 ); |
|---|
| 2302 | BGRC_P_SET_REGISTER( OUTPUT_SURFACE_ADDR_1 ); |
|---|
| 2303 | BGRC_P_SET_REGISTER( OUTPUT_SURFACE_STRIDE_1 ); |
|---|
| 2304 | BGRC_P_SET_REGISTER( OUTPUT_SURFACE_FORMAT_DEF_1 ); |
|---|
| 2305 | BGRC_P_SET_REGISTER( OUTPUT_SURFACE_FORMAT_DEF_2 ); |
|---|
| 2306 | BGRC_P_SET_REGISTER( OUTPUT_SURFACE_FORMAT_DEF_3 ); |
|---|
| 2307 | #endif |
|---|
| 2308 | } |
|---|
| 2309 | |
|---|
| 2310 | /* write blit group registers */ |
|---|
| 2311 | if( BGRC_P_COMPARE_FIELD( LIST_PACKET_HEADER_1, BLIT_GRP_CNTRL, GRP_ENABLE ) ) |
|---|
| 2312 | { |
|---|
| 2313 | #ifdef BGRC_P_OPTIMIZE_SET_REGISTER |
|---|
| 2314 | BGRC_P_SET_REGISTERS( BLIT, BLIT_HEADER ); |
|---|
| 2315 | #else |
|---|
| 2316 | BGRC_P_SET_REGISTER( BLIT_HEADER ); |
|---|
| 2317 | BGRC_P_SET_REGISTER( BLIT_SRC_TOP_LEFT ); |
|---|
| 2318 | BGRC_P_SET_REGISTER( BLIT_SRC_SIZE ); |
|---|
| 2319 | #if defined(BCHP_M2MC_BLIT_SRC_TOP_LEFT_1) |
|---|
| 2320 | BGRC_P_SET_REGISTER( BLIT_SRC_TOP_LEFT_1 ); |
|---|
| 2321 | BGRC_P_SET_REGISTER( BLIT_SRC_SIZE_1 ); |
|---|
| 2322 | BGRC_P_SET_REGISTER( BLIT_SRC_STRIPE_HEIGHT_WIDTH_0 ); |
|---|
| 2323 | BGRC_P_SET_REGISTER( BLIT_SRC_STRIPE_HEIGHT_WIDTH_1 ); |
|---|
| 2324 | #endif |
|---|
| 2325 | BGRC_P_SET_REGISTER( BLIT_DEST_TOP_LEFT ); |
|---|
| 2326 | BGRC_P_SET_REGISTER( BLIT_DEST_SIZE ); |
|---|
| 2327 | BGRC_P_SET_REGISTER( BLIT_OUTPUT_TOP_LEFT ); |
|---|
| 2328 | BGRC_P_SET_REGISTER( BLIT_OUTPUT_SIZE ); |
|---|
| 2329 | BGRC_P_SET_REGISTER( BLIT_INPUT_STRIPE_WIDTH ); |
|---|
| 2330 | #if defined(BCHP_M2MC_BLIT_INPUT_STRIPE_WIDTH_1) |
|---|
| 2331 | BGRC_P_SET_REGISTER( BLIT_INPUT_STRIPE_WIDTH_1 ); |
|---|
| 2332 | #endif |
|---|
| 2333 | BGRC_P_SET_REGISTER( BLIT_OUTPUT_STRIPE_WIDTH ); |
|---|
| 2334 | BGRC_P_SET_REGISTER( BLIT_STRIPE_OVERLAP ); |
|---|
| 2335 | #if defined(BCHP_M2MC_BLIT_STRIPE_OVERLAP_1) |
|---|
| 2336 | BGRC_P_SET_REGISTER( BLIT_STRIPE_OVERLAP_1 ); |
|---|
| 2337 | #endif |
|---|
| 2338 | BGRC_P_SET_REGISTER( BLIT_CTRL ); |
|---|
| 2339 | #endif |
|---|
| 2340 | } |
|---|
| 2341 | |
|---|
| 2342 | /* write scaler group registers */ |
|---|
| 2343 | if( BGRC_P_COMPARE_FIELD( LIST_PACKET_HEADER_1, SCALE_PARAM_GRP_CNTRL, GRP_ENABLE ) ) |
|---|
| 2344 | { |
|---|
| 2345 | #ifdef BGRC_P_OPTIMIZE_SET_REGISTER |
|---|
| 2346 | BGRC_P_SET_REGISTERS( SCALE_PARAM, SCALER_CTRL ); |
|---|
| 2347 | #else |
|---|
| 2348 | BGRC_P_SET_REGISTER( SCALER_CTRL ); |
|---|
| 2349 | BGRC_P_SET_REGISTER( HORIZ_AVERAGER_COUNT ); |
|---|
| 2350 | BGRC_P_SET_REGISTER( HORIZ_AVERAGER_COEFF ); |
|---|
| 2351 | BGRC_P_SET_REGISTER( VERT_AVERAGER_COUNT ); |
|---|
| 2352 | BGRC_P_SET_REGISTER( VERT_AVERAGER_COEFF ); |
|---|
| 2353 | BGRC_P_SET_REGISTER( HORIZ_SCALER_INITIAL_PHASE ); |
|---|
| 2354 | BGRC_P_SET_REGISTER( HORIZ_SCALER_STEP ); |
|---|
| 2355 | #if defined(BCHP_M2MC_HORIZ_SCALER_1_INITIAL_PHASE) |
|---|
| 2356 | BGRC_P_SET_REGISTER( HORIZ_SCALER_1_INITIAL_PHASE ); |
|---|
| 2357 | BGRC_P_SET_REGISTER( HORIZ_SCALER_1_STEP ); |
|---|
| 2358 | #endif |
|---|
| 2359 | BGRC_P_SET_REGISTER( VERT_SCALER_INITIAL_PHASE ); |
|---|
| 2360 | BGRC_P_SET_REGISTER( VERT_SCALER_STEP ); |
|---|
| 2361 | #if defined(BCHP_M2MC_VERT_SCALER_1_INITIAL_PHASE) |
|---|
| 2362 | BGRC_P_SET_REGISTER( VERT_SCALER_1_INITIAL_PHASE ); |
|---|
| 2363 | BGRC_P_SET_REGISTER( VERT_SCALER_1_STEP ); |
|---|
| 2364 | #endif |
|---|
| 2365 | #endif |
|---|
| 2366 | } |
|---|
| 2367 | |
|---|
| 2368 | /* write blend group registers */ |
|---|
| 2369 | if( BGRC_P_COMPARE_FIELD( LIST_PACKET_HEADER_1, BLEND_PARAM_GRP_CNTRL, GRP_ENABLE ) ) |
|---|
| 2370 | { |
|---|
| 2371 | #ifdef BGRC_P_OPTIMIZE_SET_REGISTER |
|---|
| 2372 | BGRC_P_SET_REGISTERS( BLEND_PARAM, BLEND_COLOR_OP ); |
|---|
| 2373 | #else |
|---|
| 2374 | BGRC_P_SET_REGISTER( BLEND_COLOR_OP ); |
|---|
| 2375 | BGRC_P_SET_REGISTER( BLEND_ALPHA_OP ); |
|---|
| 2376 | BGRC_P_SET_REGISTER( BLEND_CONSTANT_COLOR ); |
|---|
| 2377 | BGRC_P_SET_REGISTER( BLEND_COLOR_KEY_ACTION ); |
|---|
| 2378 | #endif |
|---|
| 2379 | } |
|---|
| 2380 | |
|---|
| 2381 | /* write rop group registers */ |
|---|
| 2382 | if( BGRC_P_COMPARE_FIELD( LIST_PACKET_HEADER_1, ROP_GRP_CNTRL, GRP_ENABLE ) ) |
|---|
| 2383 | { |
|---|
| 2384 | #ifdef BGRC_P_OPTIMIZE_SET_REGISTER |
|---|
| 2385 | BGRC_P_SET_REGISTERS( ROP, ROP_OPERATION ); |
|---|
| 2386 | #else |
|---|
| 2387 | BGRC_P_SET_REGISTER( ROP_OPERATION ); |
|---|
| 2388 | BGRC_P_SET_REGISTER( ROP_PATTERN_TOP ); |
|---|
| 2389 | BGRC_P_SET_REGISTER( ROP_PATTERN_BOTTOM ); |
|---|
| 2390 | BGRC_P_SET_REGISTER( ROP_PATTERN_COLOR_0 ); |
|---|
| 2391 | BGRC_P_SET_REGISTER( ROP_PATTERN_COLOR_1 ); |
|---|
| 2392 | #endif |
|---|
| 2393 | } |
|---|
| 2394 | |
|---|
| 2395 | /* write source color key group registers */ |
|---|
| 2396 | if( BGRC_P_COMPARE_FIELD( LIST_PACKET_HEADER_1, SRC_COLOR_KEY_GRP_CNTRL, GRP_ENABLE ) ) |
|---|
| 2397 | { |
|---|
| 2398 | #ifdef BGRC_P_OPTIMIZE_SET_REGISTER |
|---|
| 2399 | BGRC_P_SET_REGISTERS( SRC_COLOR_KEY, SRC_COLOR_KEY_HIGH ); |
|---|
| 2400 | #else |
|---|
| 2401 | BGRC_P_SET_REGISTER( SRC_COLOR_KEY_HIGH ); |
|---|
| 2402 | BGRC_P_SET_REGISTER( SRC_COLOR_KEY_LOW ); |
|---|
| 2403 | BGRC_P_SET_REGISTER( SRC_COLOR_KEY_MASK ); |
|---|
| 2404 | BGRC_P_SET_REGISTER( SRC_COLOR_KEY_REPLACEMENT ); |
|---|
| 2405 | BGRC_P_SET_REGISTER( SRC_COLOR_KEY_REPLACEMENT_MASK ); |
|---|
| 2406 | #endif |
|---|
| 2407 | } |
|---|
| 2408 | |
|---|
| 2409 | /* write destination color key group registers */ |
|---|
| 2410 | if( BGRC_P_COMPARE_FIELD( LIST_PACKET_HEADER_1, DST_COLOR_KEY_GRP_CNTRL, GRP_ENABLE ) ) |
|---|
| 2411 | { |
|---|
| 2412 | #ifdef BGRC_P_OPTIMIZE_SET_REGISTER |
|---|
| 2413 | BGRC_P_SET_REGISTERS( DST_COLOR_KEY, DEST_COLOR_KEY_HIGH ); |
|---|
| 2414 | #else |
|---|
| 2415 | BGRC_P_SET_REGISTER( DEST_COLOR_KEY_HIGH ); |
|---|
| 2416 | BGRC_P_SET_REGISTER( DEST_COLOR_KEY_LOW ); |
|---|
| 2417 | BGRC_P_SET_REGISTER( DEST_COLOR_KEY_MASK ); |
|---|
| 2418 | BGRC_P_SET_REGISTER( DEST_COLOR_KEY_REPLACEMENT ); |
|---|
| 2419 | BGRC_P_SET_REGISTER( DEST_COLOR_KEY_REPLACEMENT_MASK ); |
|---|
| 2420 | #endif |
|---|
| 2421 | } |
|---|
| 2422 | |
|---|
| 2423 | /* write scaler coefficient group registers */ |
|---|
| 2424 | if( BGRC_P_COMPARE_FIELD( LIST_PACKET_HEADER_1, SCALE_COEF_GRP_CNTRL, GRP_ENABLE ) ) |
|---|
| 2425 | { |
|---|
| 2426 | uint32_t ii, jj; |
|---|
| 2427 | |
|---|
| 2428 | #if defined(BCHP_M2MC_HORIZ_FIR_1_COEFF_PHASE0_01) |
|---|
| 2429 | uint32_t kk; |
|---|
| 2430 | |
|---|
| 2431 | /* write horizontal coefficient group registers */ |
|---|
| 2432 | for( kk = 0; kk < 2; ++kk ) |
|---|
| 2433 | #endif |
|---|
| 2434 | for( jj = 0; jj < BGRC_P_FIR_PHASE_COUNT; ++jj ) |
|---|
| 2435 | for( ii = 0; ii < BGRC_P_FIR_TAP_COUNT / 2; ++ii ) |
|---|
| 2436 | *pulPacket++ = pState->pulHorzFirCoeffs[ii + jj * BGRC_P_FIR_TAP_COUNT / 2]; |
|---|
| 2437 | |
|---|
| 2438 | /* write vertical coefficient group registers */ |
|---|
| 2439 | #if defined(BCHP_M2MC_HORIZ_FIR_1_COEFF_PHASE0_01) |
|---|
| 2440 | for( kk = 0; kk < 2; ++kk ) |
|---|
| 2441 | #endif |
|---|
| 2442 | for( jj = 0; jj < BGRC_P_FIR_PHASE_COUNT; ++jj ) |
|---|
| 2443 | for( ii = 0; ii < BGRC_P_FIR_TAP_COUNT / 2; ++ii ) |
|---|
| 2444 | *pulPacket++ = pState->pulVertFirCoeffs[ii + jj * BGRC_P_FIR_TAP_COUNT / 2]; |
|---|
| 2445 | |
|---|
| 2446 | #if ((BCHP_CHIP==7401) && (BCHP_VER == BCHP_VER_A0)) || \ |
|---|
| 2447 | ((BCHP_CHIP==3563) && (BCHP_VER >= BCHP_VER_A0)) |
|---|
| 2448 | /* Some M2MCs overwrite the pulldown registers when writing the scaler |
|---|
| 2449 | coefficient registers. Compensating for this requires writing a zero |
|---|
| 2450 | into the memory that will overwrite the pulldown enable register. */ |
|---|
| 2451 | pulPacket += BGRC_P_LIST_SRC_COLOR_MATRIX_GRP_CNTRL_COUNT; |
|---|
| 2452 | *pulPacket = 0; |
|---|
| 2453 | pulPacket += BGRC_P_LIST_SCALE_COEF_GRP_CNTRL_COUNT - BGRC_P_LIST_SRC_COLOR_MATRIX_GRP_CNTRL_COUNT - 8; |
|---|
| 2454 | #endif |
|---|
| 2455 | } |
|---|
| 2456 | |
|---|
| 2457 | /* write source color matrix group registers */ |
|---|
| 2458 | if( BGRC_P_COMPARE_FIELD( LIST_PACKET_HEADER_1, SRC_COLOR_MATRIX_GRP_CNTRL, GRP_ENABLE ) ) |
|---|
| 2459 | { |
|---|
| 2460 | #ifdef BGRC_P_OPTIMIZE_SET_REGISTER |
|---|
| 2461 | BGRC_P_SET_REGISTERS( SRC_COLOR_MATRIX, SRC_CM_C00_C01 ); |
|---|
| 2462 | #else |
|---|
| 2463 | BGRC_P_SET_REGISTER( SRC_CM_C00_C01 ); |
|---|
| 2464 | BGRC_P_SET_REGISTER( SRC_CM_C02_C03 ); |
|---|
| 2465 | BGRC_P_SET_REGISTER( SRC_CM_C04 ); |
|---|
| 2466 | BGRC_P_SET_REGISTER( SRC_CM_C10_C11 ); |
|---|
| 2467 | BGRC_P_SET_REGISTER( SRC_CM_C12_C13 ); |
|---|
| 2468 | BGRC_P_SET_REGISTER( SRC_CM_C14 ); |
|---|
| 2469 | BGRC_P_SET_REGISTER( SRC_CM_C20_C21 ); |
|---|
| 2470 | BGRC_P_SET_REGISTER( SRC_CM_C22_C23 ); |
|---|
| 2471 | BGRC_P_SET_REGISTER( SRC_CM_C24 ); |
|---|
| 2472 | BGRC_P_SET_REGISTER( SRC_CM_C30_C31 ); |
|---|
| 2473 | BGRC_P_SET_REGISTER( SRC_CM_C32_C33 ); |
|---|
| 2474 | BGRC_P_SET_REGISTER( SRC_CM_C34 ); |
|---|
| 2475 | #endif |
|---|
| 2476 | } |
|---|
| 2477 | |
|---|
| 2478 | #if ((BCHP_CHIP==7038) && (BCHP_VER < BCHP_VER_C0)) |
|---|
| 2479 | /* write destination color matrix group registers */ |
|---|
| 2480 | if( BGRC_P_COMPARE_FIELD( LIST_PACKET_HEADER_1, DST_COLOR_MATRIX_GRP_CNTRL, GRP_ENABLE ) ) |
|---|
| 2481 | { |
|---|
| 2482 | #ifdef BGRC_P_OPTIMIZE_SET_REGISTER |
|---|
| 2483 | BGRC_P_SET_REGISTERS( DST_COLOR_MATRIX, DEST_CM_C00_C01 ); |
|---|
| 2484 | #else |
|---|
| 2485 | BGRC_P_SET_REGISTER( DEST_CM_C00_C01 ); |
|---|
| 2486 | BGRC_P_SET_REGISTER( DEST_CM_C02_C03 ); |
|---|
| 2487 | BGRC_P_SET_REGISTER( DEST_CM_C04 ); |
|---|
| 2488 | BGRC_P_SET_REGISTER( DEST_CM_C10_C11 ); |
|---|
| 2489 | BGRC_P_SET_REGISTER( DEST_CM_C12_C13 ); |
|---|
| 2490 | BGRC_P_SET_REGISTER( DEST_CM_C14 ); |
|---|
| 2491 | BGRC_P_SET_REGISTER( DEST_CM_C20_C21 ); |
|---|
| 2492 | BGRC_P_SET_REGISTER( DEST_CM_C22_C23 ); |
|---|
| 2493 | BGRC_P_SET_REGISTER( DEST_CM_C24 ); |
|---|
| 2494 | BGRC_P_SET_REGISTER( DEST_CM_C30_C31 ); |
|---|
| 2495 | BGRC_P_SET_REGISTER( DEST_CM_C32_C33 ); |
|---|
| 2496 | BGRC_P_SET_REGISTER( DEST_CM_C34 ); |
|---|
| 2497 | #endif |
|---|
| 2498 | } |
|---|
| 2499 | |
|---|
| 2500 | /* write output color matrix group registers */ |
|---|
| 2501 | if( BGRC_P_COMPARE_FIELD( LIST_PACKET_HEADER_1, OUTPUT_COLOR_MATRIX_GRP_CNTRL, GRP_ENABLE ) ) |
|---|
| 2502 | { |
|---|
| 2503 | #ifdef BGRC_P_OPTIMIZE_SET_REGISTER |
|---|
| 2504 | BGRC_P_SET_REGISTERS( OUTPUT_COLOR_MATRIX, OUTPUT_CM_C00_C01 ); |
|---|
| 2505 | #else |
|---|
| 2506 | BGRC_P_SET_REGISTER( OUTPUT_CM_C00_C01 ); |
|---|
| 2507 | BGRC_P_SET_REGISTER( OUTPUT_CM_C02_C03 ); |
|---|
| 2508 | BGRC_P_SET_REGISTER( OUTPUT_CM_C04 ); |
|---|
| 2509 | BGRC_P_SET_REGISTER( OUTPUT_CM_C10_C11 ); |
|---|
| 2510 | BGRC_P_SET_REGISTER( OUTPUT_CM_C12_C13 ); |
|---|
| 2511 | BGRC_P_SET_REGISTER( OUTPUT_CM_C14 ); |
|---|
| 2512 | BGRC_P_SET_REGISTER( OUTPUT_CM_C20_C21 ); |
|---|
| 2513 | BGRC_P_SET_REGISTER( OUTPUT_CM_C22_C23 ); |
|---|
| 2514 | BGRC_P_SET_REGISTER( OUTPUT_CM_C24 ); |
|---|
| 2515 | BGRC_P_SET_REGISTER( OUTPUT_CM_C30_C31 ); |
|---|
| 2516 | BGRC_P_SET_REGISTER( OUTPUT_CM_C32_C33 ); |
|---|
| 2517 | BGRC_P_SET_REGISTER( OUTPUT_CM_C34 ); |
|---|
| 2518 | #endif |
|---|
| 2519 | } |
|---|
| 2520 | #endif |
|---|
| 2521 | |
|---|
| 2522 | /* write source palette group registers */ |
|---|
| 2523 | if( BGRC_P_COMPARE_FIELD( LIST_PACKET_HEADER_1, SRC_CLUT_GRP_CNTRL, GRP_ENABLE ) ) |
|---|
| 2524 | *pulPacket++ = pState->SrcSurface.ulPaletteOffset; |
|---|
| 2525 | |
|---|
| 2526 | /* write destination palette group registers */ |
|---|
| 2527 | if( BGRC_P_COMPARE_FIELD( LIST_PACKET_HEADER_1, DST_CLUT_GRP_CNTRL, GRP_ENABLE ) ) |
|---|
| 2528 | *pulPacket++ = pState->DstSurface.ulPaletteOffset; |
|---|
| 2529 | } |
|---|
| 2530 | |
|---|
| 2531 | /***************************************************************************/ |
|---|
| 2532 | static void BGRC_P_List_RenderPacket( |
|---|
| 2533 | BGRC_Handle hGrc, |
|---|
| 2534 | uint32_t ulPacketOffset ) |
|---|
| 2535 | { |
|---|
| 2536 | /* write packet offset to previous packet header */ |
|---|
| 2537 | if( hGrc->pulPrevPacket ) |
|---|
| 2538 | { |
|---|
| 2539 | *hGrc->pulPrevPacket = ulPacketOffset | BCHP_FIELD_DATA(M2MC_LIST_PACKET_HEADER_0, LAST_PKT_IND, |
|---|
| 2540 | BCHP_M2MC_LIST_PACKET_HEADER_0_LAST_PKT_IND_NextPktValid); |
|---|
| 2541 | #if 0 |
|---|
| 2542 | BMEM_FlushCache( hGrc->hMemory, hGrc->pulPrevPacket, 4 ); |
|---|
| 2543 | #endif |
|---|
| 2544 | } |
|---|
| 2545 | |
|---|
| 2546 | if( hGrc->pulPrevPacket == NULL ) |
|---|
| 2547 | { |
|---|
| 2548 | /* write first packet offset and initiate */ |
|---|
| 2549 | BGRC_P_WRITE_REG( LIST_FIRST_PKT_ADDR, ulPacketOffset ); |
|---|
| 2550 | BGRC_P_WRITE_REG( LIST_CTRL, |
|---|
| 2551 | BCHP_FIELD_ENUM(M2MC_LIST_CTRL, WAKE_MODE, ResumeFromFirst) | |
|---|
| 2552 | BCHP_FIELD_ENUM(M2MC_LIST_CTRL, RUN, Run) | |
|---|
| 2553 | BCHP_FIELD_ENUM(M2MC_LIST_CTRL, WAKE, Ack) ); |
|---|
| 2554 | } |
|---|
| 2555 | else |
|---|
| 2556 | { |
|---|
| 2557 | /* initiate packet */ |
|---|
| 2558 | BGRC_P_WRITE_REG( LIST_CTRL, |
|---|
| 2559 | BCHP_FIELD_ENUM(M2MC_LIST_CTRL, WAKE_MODE, ResumeFromLast) | |
|---|
| 2560 | BCHP_FIELD_ENUM(M2MC_LIST_CTRL, RUN, Run) | |
|---|
| 2561 | BCHP_FIELD_ENUM(M2MC_LIST_CTRL, WAKE, WakeUp) ); |
|---|
| 2562 | } |
|---|
| 2563 | } |
|---|
| 2564 | |
|---|
| 2565 | /***************************************************************************/ |
|---|
| 2566 | void BGRC_P_List_PacketIsr( |
|---|
| 2567 | void *pvParam1, |
|---|
| 2568 | int iParam2 ) |
|---|
| 2569 | { |
|---|
| 2570 | BGRC_Handle hGrc = (BGRC_Handle) pvParam1; |
|---|
| 2571 | BGRC_P_Operation *pOp; |
|---|
| 2572 | uint32_t ulDeviceOffset; |
|---|
| 2573 | bool bDeviceBusy; |
|---|
| 2574 | |
|---|
| 2575 | BSTD_UNUSED( iParam2 ); |
|---|
| 2576 | |
|---|
| 2577 | if( hGrc == 0 ) |
|---|
| 2578 | return; |
|---|
| 2579 | |
|---|
| 2580 | ulDeviceOffset = BGRC_P_READ_REG( LIST_CURR_PKT_ADDR ) & BGRC_M2MC(LIST_CURR_PKT_ADDR_CURR_PKT_ADDR_MASK); |
|---|
| 2581 | |
|---|
| 2582 | bDeviceBusy = (((BGRC_P_READ_REG( BLIT_STATUS ) & BGRC_M2MC(BLIT_STATUS_STATUS_MASK)) == BGRC_M2MC(BLIT_STATUS_STATUS_RUNNING))/* || |
|---|
| 2583 | ((BGRC_P_READ_REG( LIST_STATUS ) & BGRC_M2MC(LIST_STATUS_BUSY_MASK)) == BGRC_M2MC(LIST_STATUS_BUSY_Busy)) || |
|---|
| 2584 | ((BGRC_P_READ_REG( LIST_STATUS ) & BGRC_M2MC(LIST_STATUS_FINISHED_MASK)) == BGRC_M2MC(LIST_STATUS_FINISHED_NotFinished)) */); |
|---|
| 2585 | |
|---|
| 2586 | /* find first active operation */ |
|---|
| 2587 | pOp = hGrc->pLastOp; |
|---|
| 2588 | while( pOp && (!pOp->bActive) ) |
|---|
| 2589 | pOp = pOp->pPrevOp; |
|---|
| 2590 | |
|---|
| 2591 | if( pOp == NULL ) |
|---|
| 2592 | return; |
|---|
| 2593 | |
|---|
| 2594 | if( hGrc->pLastOp == NULL ) |
|---|
| 2595 | return; |
|---|
| 2596 | |
|---|
| 2597 | while( ((!bDeviceBusy) && (pOp->pPrevOp == NULL)) || (ulDeviceOffset != pOp->ulPacketOffset) ) |
|---|
| 2598 | { |
|---|
| 2599 | BGRC_P_Operation *pPrevOp = pOp->pPrevOp; |
|---|
| 2600 | BGRC_P_Operation *pCurrOp = pOp; |
|---|
| 2601 | |
|---|
| 2602 | /* call user callback function */ |
|---|
| 2603 | if( pOp->pUserCallback ) |
|---|
| 2604 | (*pOp->pUserCallback)( hGrc, pOp->pUserData ); |
|---|
| 2605 | |
|---|
| 2606 | /* set events */ |
|---|
| 2607 | if( pOp->bSetEvent ) |
|---|
| 2608 | BKNI_SetEvent( hGrc->hInterruptEvent ); |
|---|
| 2609 | |
|---|
| 2610 | /* set period event and call callback */ |
|---|
| 2611 | if( pOp->bSetPeriodicEvent ) |
|---|
| 2612 | { |
|---|
| 2613 | if( hGrc->pPeriodicCallback ) |
|---|
| 2614 | { |
|---|
| 2615 | (*hGrc->pPeriodicCallback)( hGrc, hGrc->pPeriodicData ); |
|---|
| 2616 | hGrc->pPeriodicCallback = NULL; |
|---|
| 2617 | } |
|---|
| 2618 | |
|---|
| 2619 | if( hGrc->ulPeriodicInterrupts ) |
|---|
| 2620 | hGrc->ulPeriodicInterrupts--; |
|---|
| 2621 | |
|---|
| 2622 | BKNI_SetEvent( hGrc->hPeriodicEvent ); |
|---|
| 2623 | } |
|---|
| 2624 | |
|---|
| 2625 | if( pOp->pUserCallback || pOp->bSetEvent ) |
|---|
| 2626 | hGrc->ulIntReceived++; |
|---|
| 2627 | |
|---|
| 2628 | /* get next operation and inactivate current operation */ |
|---|
| 2629 | pOp = pPrevOp; |
|---|
| 2630 | pCurrOp->bActive = false; |
|---|
| 2631 | |
|---|
| 2632 | /* exit loop if no more operations */ |
|---|
| 2633 | if( pOp == NULL ) |
|---|
| 2634 | break; |
|---|
| 2635 | } |
|---|
| 2636 | } |
|---|
| 2637 | |
|---|
| 2638 | /***************************************************************************/ |
|---|
| 2639 | static BGRC_P_Block *BGRC_P_List_CreateBlock( |
|---|
| 2640 | BGRC_Handle hGrc ) |
|---|
| 2641 | { |
|---|
| 2642 | /* allocate memory for block structure */ |
|---|
| 2643 | BGRC_P_Block *pBlock = (BGRC_P_Block *) BKNI_Malloc( sizeof (BGRC_P_Block) ); |
|---|
| 2644 | if( pBlock == NULL ) |
|---|
| 2645 | return NULL; |
|---|
| 2646 | |
|---|
| 2647 | /* allocate device memory for list block */ |
|---|
| 2648 | pBlock->pvMemory = BMEM_AllocAligned( hGrc->hMemory, BGRC_P_LIST_BLOCK_SIZE, BGRC_P_LIST_BLOCK_ALIGN, 0 ); |
|---|
| 2649 | if( pBlock->pvMemory == NULL ) |
|---|
| 2650 | { |
|---|
| 2651 | BKNI_Free( (void *) pBlock ); |
|---|
| 2652 | return NULL; |
|---|
| 2653 | } |
|---|
| 2654 | |
|---|
| 2655 | /* convert block address to offset */ |
|---|
| 2656 | if( BMEM_ConvertAddressToOffset( hGrc->hMemory, pBlock->pvMemory, &pBlock->ulOffset ) != BERR_SUCCESS ) |
|---|
| 2657 | { |
|---|
| 2658 | BMEM_Free( hGrc->hMemory, pBlock->pvMemory ); |
|---|
| 2659 | BKNI_Free( (void *) pBlock ); |
|---|
| 2660 | return NULL; |
|---|
| 2661 | } |
|---|
| 2662 | |
|---|
| 2663 | /* get cached address */ |
|---|
| 2664 | if( BMEM_ConvertAddressToCached( hGrc->hMemory, pBlock->pvMemory, &pBlock->pvCached ) != BERR_SUCCESS ) |
|---|
| 2665 | { |
|---|
| 2666 | BMEM_Free( hGrc->hMemory, pBlock->pvMemory ); |
|---|
| 2667 | BKNI_Free( (void *) pBlock ); |
|---|
| 2668 | return NULL; |
|---|
| 2669 | } |
|---|
| 2670 | |
|---|
| 2671 | hGrc->ulPacketMemorySize += BGRC_P_LIST_BLOCK_SIZE; |
|---|
| 2672 | pBlock->ulRefCount = 0; |
|---|
| 2673 | /* pBlock->bBusy = true;*/ |
|---|
| 2674 | |
|---|
| 2675 | return pBlock; |
|---|
| 2676 | } |
|---|
| 2677 | |
|---|
| 2678 | /***************************************************************************/ |
|---|
| 2679 | static BGRC_P_Block *BGRC_P_List_DestroyBlock( |
|---|
| 2680 | BGRC_Handle hGrc, |
|---|
| 2681 | BGRC_P_Block *pBlock ) |
|---|
| 2682 | { |
|---|
| 2683 | BGRC_P_Block *pNextBlock = pBlock->pNextBlock; |
|---|
| 2684 | |
|---|
| 2685 | /* free block memory */ |
|---|
| 2686 | BMEM_Free( hGrc->hMemory, pBlock->pvMemory ); |
|---|
| 2687 | BKNI_Free( (void *) pBlock ); |
|---|
| 2688 | hGrc->ulPacketMemorySize -= BGRC_P_LIST_BLOCK_SIZE; |
|---|
| 2689 | |
|---|
| 2690 | /* dettach block from list */ |
|---|
| 2691 | if( hGrc->pCurrListBlock == pNextBlock ) |
|---|
| 2692 | { |
|---|
| 2693 | hGrc->pPrevListBlock = NULL; |
|---|
| 2694 | pNextBlock = NULL; |
|---|
| 2695 | } |
|---|
| 2696 | |
|---|
| 2697 | if( hGrc->pPrevListBlock ) |
|---|
| 2698 | hGrc->pPrevListBlock->pNextBlock = pNextBlock; |
|---|
| 2699 | |
|---|
| 2700 | hGrc->pCurrListBlock = pNextBlock; |
|---|
| 2701 | return pNextBlock; |
|---|
| 2702 | } |
|---|
| 2703 | |
|---|
| 2704 | /***************************************************************************/ |
|---|
| 2705 | /* OPERATION PROCESSING FUNCTIONS */ |
|---|
| 2706 | /***************************************************************************/ |
|---|
| 2707 | static BGRC_P_Operation *BGRC_P_Operation_Alloc( |
|---|
| 2708 | BGRC_Handle hGrc, |
|---|
| 2709 | BGRC_Callback pCallback, |
|---|
| 2710 | void *pData, |
|---|
| 2711 | BGRC_P_Block *pBlock, |
|---|
| 2712 | uint32_t ulPacketOffset, |
|---|
| 2713 | bool bSetEvent ) |
|---|
| 2714 | { |
|---|
| 2715 | BGRC_P_Operation *pOp; |
|---|
| 2716 | |
|---|
| 2717 | /* check if there are any free operation structures */ |
|---|
| 2718 | if( hGrc->pFreeOp ) |
|---|
| 2719 | { |
|---|
| 2720 | /* get a free operation structure */ |
|---|
| 2721 | pOp = hGrc->pFreeOp; |
|---|
| 2722 | hGrc->pFreeOp = pOp->pNextOp; |
|---|
| 2723 | } |
|---|
| 2724 | else |
|---|
| 2725 | { |
|---|
| 2726 | /* return error if operation max reached */ |
|---|
| 2727 | if( hGrc->bPreAllocMemory && (hGrc->ulOperationCount == hGrc->ulOperationMax) ) |
|---|
| 2728 | return NULL; |
|---|
| 2729 | |
|---|
| 2730 | /* allocate operation structure */ |
|---|
| 2731 | pOp = (BGRC_P_Operation *) BKNI_Malloc( sizeof (BGRC_P_Operation) ); |
|---|
| 2732 | if( pOp == NULL ) |
|---|
| 2733 | return NULL; |
|---|
| 2734 | hGrc->ulOperationCount++; |
|---|
| 2735 | } |
|---|
| 2736 | |
|---|
| 2737 | pOp->pPrevOp = NULL; |
|---|
| 2738 | pOp->pNextOp = NULL; |
|---|
| 2739 | pOp->pUserCallback = pCallback; |
|---|
| 2740 | pOp->pUserData = pData; |
|---|
| 2741 | pOp->pBlock = pBlock; |
|---|
| 2742 | pOp->ulPacketOffset = ulPacketOffset; |
|---|
| 2743 | pOp->bSetEvent = bSetEvent; |
|---|
| 2744 | pOp->bActive = true; |
|---|
| 2745 | pOp->bSetPeriodicEvent = false; |
|---|
| 2746 | |
|---|
| 2747 | if( pCallback || bSetEvent ) |
|---|
| 2748 | hGrc->ulIntExpected++; |
|---|
| 2749 | |
|---|
| 2750 | return pOp; |
|---|
| 2751 | } |
|---|
| 2752 | |
|---|
| 2753 | /***************************************************************************/ |
|---|
| 2754 | void BGRC_P_Operation_FreeAll( |
|---|
| 2755 | BGRC_Handle hGrc ) |
|---|
| 2756 | { |
|---|
| 2757 | BGRC_P_Operation *pOp = hGrc->pFreeOp; |
|---|
| 2758 | while( pOp ) |
|---|
| 2759 | { |
|---|
| 2760 | BGRC_P_Operation *pNextOp = pOp->pNextOp; |
|---|
| 2761 | BKNI_Free( pOp ); |
|---|
| 2762 | pOp = pNextOp; |
|---|
| 2763 | } |
|---|
| 2764 | |
|---|
| 2765 | hGrc->pFreeOp = NULL; |
|---|
| 2766 | } |
|---|
| 2767 | |
|---|
| 2768 | /***************************************************************************/ |
|---|
| 2769 | static void BGRC_P_Operation_AddToList( |
|---|
| 2770 | BGRC_Handle hGrc, |
|---|
| 2771 | BGRC_P_Operation *pOp ) |
|---|
| 2772 | { |
|---|
| 2773 | if( hGrc->pCurrOp ) |
|---|
| 2774 | hGrc->pCurrOp->pPrevOp = pOp; |
|---|
| 2775 | |
|---|
| 2776 | if( hGrc->pLastOp == NULL ) |
|---|
| 2777 | hGrc->pLastOp = pOp; |
|---|
| 2778 | |
|---|
| 2779 | pOp->pNextOp = hGrc->pCurrOp; |
|---|
| 2780 | hGrc->pCurrOp = pOp; |
|---|
| 2781 | } |
|---|
| 2782 | |
|---|
| 2783 | /***************************************************************************/ |
|---|
| 2784 | static void BGRC_P_Operation_RemoveFromList( |
|---|
| 2785 | BGRC_Handle hGrc, |
|---|
| 2786 | BGRC_P_Operation *pOp ) |
|---|
| 2787 | { |
|---|
| 2788 | BGRC_P_Operation *pPrevOp = pOp->pPrevOp; |
|---|
| 2789 | |
|---|
| 2790 | /* dettach operation from list */ |
|---|
| 2791 | if( hGrc->pCurrOp == hGrc->pLastOp ) |
|---|
| 2792 | hGrc->pCurrOp = NULL; |
|---|
| 2793 | |
|---|
| 2794 | hGrc->pLastOp = pPrevOp; |
|---|
| 2795 | if( pPrevOp ) |
|---|
| 2796 | { |
|---|
| 2797 | pPrevOp->pNextOp = NULL; |
|---|
| 2798 | pOp->pPrevOp = NULL; |
|---|
| 2799 | } |
|---|
| 2800 | |
|---|
| 2801 | /* decrement reference count of packet memory block */ |
|---|
| 2802 | pOp->pBlock->ulRefCount--; |
|---|
| 2803 | |
|---|
| 2804 | /* check if more operations allocated than allowed */ |
|---|
| 2805 | if( hGrc->ulOperationMax && (!hGrc->bPreAllocMemory) && (hGrc->ulOperationCount > hGrc->ulOperationMax) ) |
|---|
| 2806 | { |
|---|
| 2807 | /* free operation memory */ |
|---|
| 2808 | BKNI_Free( pOp ); |
|---|
| 2809 | hGrc->ulOperationCount--; |
|---|
| 2810 | } |
|---|
| 2811 | else |
|---|
| 2812 | { |
|---|
| 2813 | /* attach operation to free list */ |
|---|
| 2814 | pOp->pNextOp = hGrc->pFreeOp; |
|---|
| 2815 | hGrc->pFreeOp = pOp; |
|---|
| 2816 | } |
|---|
| 2817 | } |
|---|
| 2818 | |
|---|
| 2819 | /***************************************************************************/ |
|---|
| 2820 | void BGRC_P_Operation_CleanupList( |
|---|
| 2821 | BGRC_Handle hGrc ) |
|---|
| 2822 | { |
|---|
| 2823 | BGRC_P_Operation *pOp; |
|---|
| 2824 | |
|---|
| 2825 | /* remove inactive operations from list */ |
|---|
| 2826 | pOp = hGrc->pLastOp; |
|---|
| 2827 | while( pOp && (!pOp->bActive) ) |
|---|
| 2828 | { |
|---|
| 2829 | BGRC_P_Operation *pPrevOp = pOp->pPrevOp; |
|---|
| 2830 | BGRC_P_Operation_RemoveFromList( hGrc, pOp ); |
|---|
| 2831 | pOp = pPrevOp; |
|---|
| 2832 | } |
|---|
| 2833 | } |
|---|
| 2834 | |
|---|
| 2835 | /***************************************************************************/ |
|---|
| 2836 | bool BGRC_P_Operation_Prealloc( |
|---|
| 2837 | BGRC_Handle hGrc, |
|---|
| 2838 | uint32_t ulCount ) |
|---|
| 2839 | { |
|---|
| 2840 | BGRC_P_Operation *pPrevOp = NULL; |
|---|
| 2841 | uint32_t ii; |
|---|
| 2842 | |
|---|
| 2843 | /* setup free operations list */ |
|---|
| 2844 | for( ii = 0; ii < ulCount; ++ii ) |
|---|
| 2845 | { |
|---|
| 2846 | BGRC_P_Operation *pOp = (BGRC_P_Operation *) BKNI_Malloc( sizeof (BGRC_P_Operation) ); |
|---|
| 2847 | if( pOp == NULL ) |
|---|
| 2848 | return false; |
|---|
| 2849 | |
|---|
| 2850 | if( pPrevOp ) |
|---|
| 2851 | pPrevOp->pNextOp = pOp; |
|---|
| 2852 | else |
|---|
| 2853 | hGrc->pFreeOp = pOp; |
|---|
| 2854 | |
|---|
| 2855 | pPrevOp = pOp; |
|---|
| 2856 | } |
|---|
| 2857 | |
|---|
| 2858 | if( pPrevOp ) |
|---|
| 2859 | pPrevOp->pNextOp = NULL; |
|---|
| 2860 | |
|---|
| 2861 | hGrc->ulOperationCount = ulCount; |
|---|
| 2862 | return true; |
|---|
| 2863 | } |
|---|
| 2864 | |
|---|
| 2865 | /* End of File */ |
|---|