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brfm.c

Last change on this file was 2, checked in by jglee, 11 years ago
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1	/***************************************************************************
2	* Copyright (c) 2003-2012, Broadcom Corporation
3	* All Rights Reserved
4	* Confidential Property of Broadcom Corporation
5	*
6	* THIS SOFTWARE MAY ONLY BE USED SUBJECT TO AN EXECUTED SOFTWARE LICENSE
7	* AGREEMENT BETWEEN THE USER AND BROADCOM. YOU HAVE NO RIGHT TO USE OR
8	* EXPLOIT THIS MATERIAL EXCEPT SUBJECT TO THE TERMS OF SUCH AN AGREEMENT.
9	*
10	* $brcm_Workfile: brfm.c $
11	* $brcm_Revision: Hydra_Software_Devel/92 $
12	* $brcm_Date: 3/2/12 3:31p $
13	*
14	* Module Description:
15	*
16	* Revision History:
17	*
18	* $brcm_Log: /magnum/portinginterface/rfm/7038/brfm.c $
19	*
20	* Hydra_Software_Devel/92 3/2/12 3:31p jtna
21	* SW7552-115: fix power management for OTP-disabled chips
22	*
23	* Hydra_Software_Devel/91 1/23/12 5:12p jtna
24	* SW7360-10: add 7360 rfm
25	*
26	* Hydra_Software_Devel/90 10/26/11 11:05a katrep
27	* SW7429-22:fixed compile
28	*
29	* Hydra_Software_Devel/89 9/27/11 11:54a jtna
30	* SW7429-22: add 7429 support
31	*
32	* Hydra_Software_Devel/88 9/8/11 12:10p jtna
33	* SW7552-26: adapt to change in bchp_int_id_rfm_l2.h: GISB_ERROR_INTR ->
34	* RFM_L2_GISB_ERROR_INTR
35	*
36	* Hydra_Software_Devel/87 9/1/11 5:39p jtna
37	* SW7552-115: add check for OTP bit
38	*
39	* Hydra_Software_Devel/86 5/19/11 3:35p jtna
40	* SW7552-26: add 7552 compile support
41	*
42	* Hydra_Software_Devel/85 2/7/11 11:07a jtna
43	* SW7420-16: assign BERR_TRACE() return value to a variable
44	*
45	* Hydra_Software_Devel/84 1/18/11 6:19p jtna
46	* SW7550-660: make brfm_scripts.c more stand-alone
47	*
48	* Hydra_Software_Devel/83 1/17/11 3:16p jtna
49	* SW7550-660: fix typo
50	*
51	* Hydra_Software_Devel/82 1/17/11 3:09p jtna
52	* SW7550-660: refactored RFM conditional compile definitions
53	*
54	* Hydra_Software_Devel/81 1/14/11 10:41a jtna
55	* SW7550-660: initial code clean-up
56	*
57	* Hydra_Software_Devel/80 12/20/10 5:35p jtna
58	* SW7552-6: fix 7552 support
59	*
60	* Hydra_Software_Devel/79 10/26/10 5:12p jtna
61	* SW7335-897: Coverity Defect ID:26494 USE_AFTER_FREE
62	*
63	* Hydra_Software_Devel/78 10/25/10 12:27p jtna
64	* SW7420-972: add BRFM_Standby and Resume
65	*
66	* Hydra_Software_Devel/77 9/25/10 6:07p spothana
67	* SW7420-972: Disable/Enable interrupts before entering/exiting RFM power
68	* save mode.
69	*
70	* Hydra_Software_Devel/76 9/17/10 5:44p jtna
71	* SW7420-972: move RFM PM from nexus to magnum
72	*
73	* Hydra_Software_Devel/75 8/30/10 9:39a mward
74	* SW7420-438: warning: unused variable 'reset'
75	*
76	* Hydra_Software_Devel/74 8/26/10 3:20p jtna
77	* SW7420-16: better debug logs
78	*
79	* Hydra_Software_Devel/73 8/26/10 11:23a jtna
80	* SW7420-438: limit sysclk reset to changes in RF modulation
81	*
82	* Hydra_Software_Devel/72 3/24/10 3:07p jtna
83	* SW7405-4109: added BRFM_AudioEncoding_eStereoExtDeviation
84	*
85	* Hydra_Software_Devel/71 11/13/09 2:13p jtna
86	* SW7420-438: refactor register write sequence and sysclk reset
87	*
88	* Hydra_Software_Devel/70 8/11/09 6:54p jtna
89	* PR56435: fix BDBG_MSG
90	*
91	* Hydra_Software_Devel/69 7/14/09 1:51p jtna
92	* PR56665: fix 7401/7403
93	*
94	* Hydra_Software_Devel/68 7/10/09 3:23p jtna
95	* PR56665: handle platform-dependent PM registers better
96	*
97	* Hydra_Software_Devel/66 7/8/09 5:49p jtna
98	* PR56665: refactor RFM power management
99	*
100	* Hydra_Software_Devel/65 7/8/09 4:52p jrubio
101	* PR56435: user clkgen.h for 7325
102	*
103	* Hydra_Software_Devel/64 7/6/09 7:41p jtna
104	* PR56435: leave top-level RFM clock running
105	*
106	* Hydra_Software_Devel/63 7/1/09 4:37p jtna
107	* PR56435: RFM dynamic power management support
108	*
109	* Hydra_Software_Devel/62 3/3/09 10:37a jtna
110	* PR52387: Add Pal-M and Pal-N support
111	*
112	* Hydra_Software_Devel/60 12/1/08 2:02p jtna
113	* PR45633: add 7420 support for compilation
114	*
115	* Hydra_Software_Devel/59 8/13/08 2:06p jtna
116	* PR45633: Add 7420 support
117	*
118	* Hydra_Software_Devel/58 7/11/08 10:56a jtna
119	* PR43336: Merge CRC BIST for 65nm platforms
120	*
121	* Hydra_Software_Devel/PR43336/1 6/13/08 6:55p jtna
122	* PR43336: Update CRC BIST
123	*
124	* Hydra_Software_Devel/57 6/11/08 2:02p jtna
125	* PR37968: Downgrade interrupt notification WRN to MSG
126	*
127	* Hydra_Software_Devel/56 6/5/08 11:31a jtna
128	* PR43336: Add built-in self-test for correcting bad startup states
129	*
130	* Hydra_Software_Devel/55 3/26/08 5:55p jtna
131	* PR40962: Added warning for > +12dB volume issue
132	*
133	* Hydra_Software_Devel/54 1/25/08 11:25a jtna
134	* PR34667: Merge SIF & dualBTSC support
135	*
136	* Hydra_Software_Devel/PR34667/4 1/24/08 10:51p jtna
137	* PR34667: Add support for dual BTSC encoders
138	*
139	* Hydra_Software_Devel/PR34667/3 1/23/08 1:38p jtna
140	* PR34667: Add support for dual BTSC encoders
141	*
142	* Hydra_Software_Devel/PR34667/2 1/21/08 9:00p jtna
143	* PR34667: Add support for dual BTSC encoders
144	*
145	* Hydra_Software_Devel/PR34667/1 1/16/08 6:26p jtna
146	* PR37990: Add support for SIF (Sound Intermediate Frequency) mode
147	*
148	* Hydra_Software_Devel/53 12/7/07 6:05p jtna
149	* PR37968: Fix runtime error
150	*
151	* Hydra_Software_Devel/52 12/7/07 3:50p jtna
152	* PR37968: Fix runtime error on 65nm platforms.
153	*
154	* Hydra_Software_Devel/51 12/6/07 1:09p jtna
155	* PR37968: Register new RFM Interrupts for 65nm platforms and dual BTSC.
156	* Cleaned up interrupts order in general.
157	*
158	* Hydra_Software_Devel/50 12/5/07 8:36p jtna
159	* PR37927, PR37864: Fixed support for 7325 (added NICAM support) and 7335
160	* & 7405 (incorrect interrupts)
161	*
162	* Hydra_Software_Devel/49 12/4/07 3:44p jtna
163	* PR37864: Add NICAM support for 7335
164	*
165	* Hydra_Software_Devel/48 12/4/07 11:53a jtna
166	* PR37864: Add 7335 support
167	*
168	***************************************************************************/
169	#include "bstd.h"
170	#include "brfm.h"
171	#include "brsp.h"
172	#include "bchp_rfm_clk27.h"
173	#include "bchp_rfm_grb.h"
174	#include "bchp_rfm_l2.h"
175	#include "bchp_rfm_sysclk.h"
176	#include "bchp_int_id_rfm_l2.h"
177	#if (BCHP_CHIP==7420)
178	#include "bchp_int_id_rfm_bbe_l2.h"
179	#endif
180	#include "brfm_priv.h"
181	#include "brfm_scripts.h"
182
183	#if BRFM_DUAL_DAC
184	#include "bchp_rfm_bbe_sysclk.h"
185	#include "bchp_rfm_bbe_clk27.h"
186	#include "brfm_scripts_bbe.h"
187	#if (BRFM_REVID==50)
188	#include "bchp_rfm_bbe_l2.h"
189	#endif
190	#endif /* BRFM_DUAL_DAC */
191
192	#if (BRFM_REVID>=40)
193	#if (BCHP_CHIP==7325) \|\| (BCHP_CHIP==7552) \|\| (BCHP_CHIP==7429) \|\| (BCHP_CHIP==7360)
194	#include "bchp_clkgen.h"
195	#else
196	#include "bchp_clk.h"
197	#endif
198	#endif
199
200	#ifdef BCHP_PWR_SUPPORT
201	#include "bchp_pwr.h"
202	#endif
203
204	/* Power management in RFM is done this way:
205
206	BRFM_P_PowerDown and BRFM_P_PowerUp are never called directly, but always through BRFM_P_SetPowerSaverMode,
207	which makes sure that we never power down/up only from the opposite state.
208
209	BRFM_P_PowerDown and BRFM_P_PowerUp call BCHP_PWR functions. The refcnt should never go above 1.
210
211	EnablePowerSaver gets you into low-power state. DisableRfOutput is just DAC disabled. Perhaps DisableRfOutput should
212	do the same thing as EnablePowerSaver, but I've left it as is.
213	*/
214
215	BDBG_MODULE(BRFM);
216
217	#define CHK_RETCODE(rc, func) \
218	do { \
219	if ((rc = BERR_TRACE(func)) != BERR_SUCCESS) { \
220	goto done; \
221	} \
222	} while(0)
223
224	#define DEV_MAGIC_ID ((BERR_RFM_ID<<16) \| 0xFACE)
225
226	#define MAKE_INT_ID(IntName) BCHP_INT_ID_##IntName
227	#define MAKE_INT_ENUM(IntName) BRFM_IntType_e##IntName
228
229	typedef enum
230	{
231	#if (BCHP_CHIP==7038 \|\| BCHP_CHIP==7438)
232	MAKE_INT_ENUM(GISB_ERROR_INTR), /* BRFM Interrupt Id = 0x00 */
233	MAKE_INT_ENUM(AUDIO_RFIFO_UF_INTR), /* BRFM Interrupt Id = 0x01 */
234	MAKE_INT_ENUM(AUDIO_RFIFO_OF_INTR), /* BRFM Interrupt Id = 0x02 */
235	MAKE_INT_ENUM(AUDIO_LFIFO_UF_INTR), /* BRFM Interrupt Id = 0x03 */
236	MAKE_INT_ENUM(AUDIO_LFIFO_OF_INTR), /* BRFM Interrupt Id = 0x04 */
237	MAKE_INT_ENUM(VIDEO_FIFO_UF_INTR), /* BRFM Interrupt Id = 0x05 */
238	MAKE_INT_ENUM(VIDEO_FIFO_OF_INTR), /* BRFM Interrupt Id = 0x06 */
239	MAKE_INT_ENUM(AUDIO_VIDEO_CLIP_INTR), /* BRFM Interrupt Id = 0x07 */
240	MAKE_INT_ENUM(AUDIO_LEFT_CLIP_INTR), /* BRFM Interrupt Id = 0x08 */
241	MAKE_INT_ENUM(AUDIO_RIGHT_CLIP_INTR), /* BRFM Interrupt Id = 0x09 */
242	MAKE_INT_ENUM(AUDIO_RATE_CLIP_INTR), /* BRFM Interrupt Id = 0x0A */
243	MAKE_INT_ENUM(AUDIO_LINE_LOSS_INTR), /* BRFM Interrupt Id = 0x0B */
244	MAKE_INT_ENUM(AUDIO_SUM_CLIP_INTR), /* BRFM Interrupt Id = 0x0C */
245	MAKE_INT_ENUM(AUDIO_DIFF_CLIP_INTR), /* BRFM Interrupt Id = 0x0D */
246	MAKE_INT_ENUM(AUDIO_SUMDIFF_CLIP_INTR), /* BRFM Interrupt Id = 0x0E */
247	MAKE_INT_ENUM(AUDIO_COMP_CLIP_INTR), /* BRFM Interrupt Id = 0x0F */
248	MAKE_INT_ENUM(RFIFD_FIFO_UF_INTR), /* BRFM Interrupt Id = 0x10 */
249	MAKE_INT_ENUM(RFIFD_FIFO_OF_INTR), /* BRFM Interrupt Id = 0x11 */
250	MAKE_INT_ENUM(AUDIO_RVID_FIFO_UF_INTR), /* BRFM Interrupt Id = 0x12 */
251	MAKE_INT_ENUM(AUDIO_RVID_FIFO_OF_INTR), /* BRFM Interrupt Id = 0x13 */
252	MAKE_INT_ENUM(AUDIO_LVID_FIFO_UF_INTR), /* BRFM Interrupt Id = 0x14 */
253	MAKE_INT_ENUM(AUDIO_LVID_FIFO_OF_INTR), /* BRFM Interrupt Id = 0x15 */
254
255	#elif (BCHP_CHIP==7118 \|\| BCHP_CHIP==7401 \|\| BCHP_CHIP==7403 \
256	\|\| (BCHP_CHIP==7400 && BCHP_VER < BCHP_VER_B0))
257	MAKE_INT_ENUM(GISB_ERROR_INTR), /* BRFM Interrupt Id = 0x00 */
258	MAKE_INT_ENUM(AUDIO_FIFO_UF_INTR), /* BRFM Interrupt Id = 0x01 */
259	MAKE_INT_ENUM(AUDIO_FIFO_OF_INTR), /* BRFM Interrupt Id = 0x02 */
260	MAKE_INT_ENUM(VIDEO_FIFO_UF_INTR), /* BRFM Interrupt Id = 0x03 */
261	MAKE_INT_ENUM(VIDEO_FIFO_OF_INTR), /* BRFM Interrupt Id = 0x04 */
262	MAKE_INT_ENUM(AUDIO_VIDEO_CLIP_INTR), /* BRFM Interrupt Id = 0x05 */
263	MAKE_INT_ENUM(AUDIO_LEFT_CLIP_INTR), /* BRFM Interrupt Id = 0x06 */
264	MAKE_INT_ENUM(AUDIO_RIGHT_CLIP_INTR), /* BRFM Interrupt Id = 0x07 */
265	MAKE_INT_ENUM(AUDIO_RATE_CLIP_INTR), /* BRFM Interrupt Id = 0x08 */
266	MAKE_INT_ENUM(AUDIO_LINE_LOSS_INTR), /* BRFM Interrupt Id = 0x09 */
267	MAKE_INT_ENUM(AUDIO_SUM_CLIP_INTR), /* BRFM Interrupt Id = 0x0A */
268	MAKE_INT_ENUM(AUDIO_DIFF_CLIP_INTR), /* BRFM Interrupt Id = 0x0B */
269	MAKE_INT_ENUM(AUDIO_SUMDIFF_CLIP_INTR), /* BRFM Interrupt Id = 0x0C */
270	MAKE_INT_ENUM(AUDIO_COMP_CLIP_INTR), /* BRFM Interrupt Id = 0x0D */
271	MAKE_INT_ENUM(RFIFD_FIFO_UF_INTR), /* BRFM Interrupt Id = 0x0E */
272	MAKE_INT_ENUM(RFIFD_FIFO_OF_INTR), /* BRFM Interrupt Id = 0x0F */
273	MAKE_INT_ENUM(AUDIO_VID_FIFO_UF_INTR), /* BRFM Interrupt Id = 0x10 */
274	MAKE_INT_ENUM(AUDIO_VID_FIFO_OF_INTR), /* BRFM Interrupt Id = 0x11 */
275
276	#elif (BRFM_REVID>=40)
277	MAKE_INT_ENUM(GISB_ERROR_INTR), /* BRFM Interrupt Id = 0x00 */
278	MAKE_INT_ENUM(AUDIO_FIFO_UF_INTR), /* BRFM Interrupt Id = 0x01 */
279	MAKE_INT_ENUM(AUDIO_FIFO_OF_INTR), /* BRFM Interrupt Id = 0x02 */
280	MAKE_INT_ENUM(VIDEO_FIFO_UF_INTR), /* BRFM Interrupt Id = 0x03 */
281	MAKE_INT_ENUM(VIDEO_FIFO_OF_INTR), /* BRFM Interrupt Id = 0x04 */
282	MAKE_INT_ENUM(AUDIO_VIDEO_CLIP_INTR), /* BRFM Interrupt Id = 0x05 */
283	MAKE_INT_ENUM(AUDIO_LEFT_CLIP_INTR), /* BRFM Interrupt Id = 0x06 */
284	MAKE_INT_ENUM(AUDIO_RIGHT_CLIP_INTR), /* BRFM Interrupt Id = 0x07 */
285	MAKE_INT_ENUM(AUDIO_RATE_CLIP_INTR), /* BRFM Interrupt Id = 0x08 */
286	MAKE_INT_ENUM(AUDIO_LINE_LOSS_INTR), /* BRFM Interrupt Id = 0x09 */
287	MAKE_INT_ENUM(AUDIO_SUM_CLIP_INTR), /* BRFM Interrupt Id = 0x0A */
288	MAKE_INT_ENUM(AUDIO_DIFF_CLIP_INTR), /* BRFM Interrupt Id = 0x0B */
289	MAKE_INT_ENUM(AUDIO_SUMDIFF_CLIP_INTR), /* BRFM Interrupt Id = 0x0C */
290	MAKE_INT_ENUM(AUDIO_COMP_CLIP_INTR), /* BRFM Interrupt Id = 0x0D */
291	MAKE_INT_ENUM(AUDIO_VID_FIFO_UF_INTR), /* BRFM Interrupt Id = 0x0E */
292	MAKE_INT_ENUM(AUDIO_VID_FIFO_OF_INTR), /* BRFM Interrupt Id = 0x0F */
293	MAKE_INT_ENUM(NICAM_FIFO_UF_INTR), /* BRFM Interrupt Id = 0x10 */
294	MAKE_INT_ENUM(NICAM_FIFO_OF_INTR), /* BRFM Interrupt Id = 0x11 */
295
296	#if BRFM_DUAL_DAC
297	MAKE_INT_ENUM(BBE_AUDIO_FIFO_UF_INTR), /* BRFM Interrupt Id = 0x12 */
298	MAKE_INT_ENUM(BBE_AUDIO_FIFO_OF_INTR), /* BRFM Interrupt Id = 0x13 */
299	MAKE_INT_ENUM(BBE_AUDIO_VIDEO_CLIP_INTR), /* BRFM Interrupt Id = 0x14 */
300	MAKE_INT_ENUM(BBE_AUDIO_LEFT_CLIP_INTR), /* BRFM Interrupt Id = 0x15 */
301	MAKE_INT_ENUM(BBE_AUDIO_RIGHT_CLIP_INTR), /* BRFM Interrupt Id = 0x16 */
302	MAKE_INT_ENUM(BBE_AUDIO_RATE_CLIP_INTR), /* BRFM Interrupt Id = 0x17 */
303	MAKE_INT_ENUM(BBE_AUDIO_LINE_LOSS_INTR), /* BRFM Interrupt Id = 0x18 */
304	MAKE_INT_ENUM(BBE_AUDIO_SUM_CLIP_INTR), /* BRFM Interrupt Id = 0x19 */
305	MAKE_INT_ENUM(BBE_AUDIO_DIFF_CLIP_INTR), /* BRFM Interrupt Id = 0x1A */
306	MAKE_INT_ENUM(BBE_AUDIO_SUMDIFF_CLIP_INTR), /* BRFM Interrupt Id = 0x1B */
307	MAKE_INT_ENUM(BBE_AUDIO_COMP_CLIP_INTR), /* BRFM Interrupt Id = 0x1C */
308	MAKE_INT_ENUM(BBE_AUDIO_VID_FIFO_UF_INTR), /* BRFM Interrupt Id = 0x1D */
309	MAKE_INT_ENUM(BBE_AUDIO_VID_FIFO_OF_INTR), /* BRFM Interrupt Id = 0x1E */
310	#endif
311
312	#endif /* (BRFM_REVID>=40) */
313	MAKE_INT_ENUM(Last)
314	} BRFM_IntType;
315
316	typedef struct
317	{
318	bool isPowerSaverEnable;
319	bool isOutputEnable;
320	BRFM_ModulationType modType;
321	BRFM_OutputChannel outputChannel;
322	bool isMuteEnable;
323	BRFM_AudioEncoding audioEncoding;
324	int volume;
325	const BRFM_P_ModulationInfo *pModInfo;
326	BRFM_EncoderType encType;
327	} BRFM_P_Settings;
328
329	typedef struct BRFM_P_Handle
330	{
331	uint32_t magicId; /* Used to check if structure is corrupt */
332	BCHP_Handle hChip;
333	BREG_Handle hRegister;
334	BINT_Handle hInterrupt;
335	BINT_CallbackHandle hCallback[MAKE_INT_ENUM(Last)];
336	uint32_t isCallbackDisable; /* assumes that total interrupt is less than 32 */
337	uint32_t coreOffset;
338	bool otpDisabled;
339	BRFM_P_Settings settings;
340	} BRFM_P_Handle;
341
342	/* Default module settings */
343	static const BRFM_Settings defDevSettings =
344	{
345	BRFM_SETTINGS_MODTYPE,
346	BRFM_SETTINGS_CHNBR,
347	BRFM_SETTINGS_AUDIOENCODING,
348	BRFM_SETTINGS_VOLUME,
349	BRFM_SETTINGS_ENCTYPE
350	};
351
352	/* Dual RFM core 7400 has a single register block, RFM_L2, that contains interrupts for both cores.
353	7420, on the other hand, splits these into two register blocks, RFM_L2 and RFM_BBE_L2.
354	Because some of the field names now overlap, they must be redefined. */
355	#if BCHP_CHIP==7420
356	#define BCHP_INT_ID_GISB_ERROR_INTR BCHP_INT_ID_RFM_L2_GISB_ERROR_INTR
357	#define BCHP_INT_ID_AUDIO_FIFO_UF_INTR BCHP_INT_ID_RFM_L2_AUDIO_FIFO_UF_INTR
358	#define BCHP_INT_ID_AUDIO_FIFO_OF_INTR BCHP_INT_ID_RFM_L2_AUDIO_FIFO_OF_INTR
359	#define BCHP_INT_ID_AUDIO_VID_FIFO_UF_INTR BCHP_INT_ID_RFM_L2_AUDIO_VID_FIFO_UF_INTR
360	#define BCHP_INT_ID_AUDIO_VID_FIFO_OF_INTR BCHP_INT_ID_RFM_L2_AUDIO_VID_FIFO_OF_INTR
361	#define BCHP_INT_ID_AUDIO_VIDEO_CLIP_INTR BCHP_INT_ID_RFM_L2_AUDIO_VIDEO_CLIP_INTR
362	#define BCHP_INT_ID_AUDIO_LEFT_CLIP_INTR BCHP_INT_ID_RFM_L2_AUDIO_LEFT_CLIP_INTR
363	#define BCHP_INT_ID_AUDIO_RIGHT_CLIP_INTR BCHP_INT_ID_RFM_L2_AUDIO_RIGHT_CLIP_INTR
364	#define BCHP_INT_ID_AUDIO_RATE_CLIP_INTR BCHP_INT_ID_RFM_L2_AUDIO_RATE_CLIP_INTR
365	#define BCHP_INT_ID_AUDIO_LINE_LOSS_INTR BCHP_INT_ID_RFM_L2_AUDIO_LINE_LOSS_INTR
366	#define BCHP_INT_ID_AUDIO_SUM_CLIP_INTR BCHP_INT_ID_RFM_L2_AUDIO_SUM_CLIP_INTR
367	#define BCHP_INT_ID_AUDIO_DIFF_CLIP_INTR BCHP_INT_ID_RFM_L2_AUDIO_DIFF_CLIP_INTR
368	#define BCHP_INT_ID_AUDIO_SUMDIFF_CLIP_INTR BCHP_INT_ID_RFM_L2_AUDIO_SUMDIFF_CLIP_INTR
369	#define BCHP_INT_ID_AUDIO_COMP_CLIP_INTR BCHP_INT_ID_RFM_L2_AUDIO_COMP_CLIP_INTR
370
371	#define BCHP_INT_ID_BBE_AUDIO_FIFO_UF_INTR BCHP_INT_ID_RFM_BBE_L2_AUDIO_FIFO_UF_INTR
372	#define BCHP_INT_ID_BBE_AUDIO_FIFO_OF_INTR BCHP_INT_ID_RFM_BBE_L2_AUDIO_FIFO_OF_INTR
373	#define BCHP_INT_ID_BBE_AUDIO_VIDEO_CLIP_INTR BCHP_INT_ID_RFM_BBE_L2_AUDIO_VIDEO_CLIP_INTR
374	#define BCHP_INT_ID_BBE_AUDIO_LEFT_CLIP_INTR BCHP_INT_ID_RFM_BBE_L2_AUDIO_LEFT_CLIP_INTR
375	#define BCHP_INT_ID_BBE_AUDIO_RIGHT_CLIP_INTR BCHP_INT_ID_RFM_BBE_L2_AUDIO_RIGHT_CLIP_INTR
376	#define BCHP_INT_ID_BBE_AUDIO_RATE_CLIP_INTR BCHP_INT_ID_RFM_BBE_L2_AUDIO_RATE_CLIP_INTR
377	#define BCHP_INT_ID_BBE_AUDIO_LINE_LOSS_INTR BCHP_INT_ID_RFM_BBE_L2_AUDIO_LINE_LOSS_INTR
378	#define BCHP_INT_ID_BBE_AUDIO_SUM_CLIP_INTR BCHP_INT_ID_RFM_BBE_L2_AUDIO_SUM_CLIP_INTR
379	#define BCHP_INT_ID_BBE_AUDIO_DIFF_CLIP_INTR BCHP_INT_ID_RFM_BBE_L2_AUDIO_DIFF_CLIP_INTR
380	#define BCHP_INT_ID_BBE_AUDIO_SUMDIFF_CLIP_INTR BCHP_INT_ID_RFM_BBE_L2_AUDIO_SUMDIFF_CLIP_INTR
381	#define BCHP_INT_ID_BBE_AUDIO_COMP_CLIP_INTR BCHP_INT_ID_RFM_BBE_L2_AUDIO_COMP_CLIP_INTR
382	#define BCHP_INT_ID_BBE_AUDIO_VID_FIFO_UF_INTR BCHP_INT_ID_RFM_BBE_L2_AUDIO_VID_FIFO_UF_INTR
383	#define BCHP_INT_ID_BBE_AUDIO_VID_FIFO_OF_INTR BCHP_INT_ID_RFM_BBE_L2_AUDIO_VID_FIFO_OF_INTR
384	#endif
385
386	static const BINT_Id IntId[] =
387	{
388
389	#if (BCHP_CHIP==7038 \|\| BCHP_CHIP==7438)
390	MAKE_INT_ID(GISB_ERROR_INTR), /* BRFM Interrupt Id = 0x00 */
391	MAKE_INT_ID(AUDIO_RFIFO_UF_INTR), /* BRFM Interrupt Id = 0x01 */
392	MAKE_INT_ID(AUDIO_RFIFO_OF_INTR), /* BRFM Interrupt Id = 0x02 */
393	MAKE_INT_ID(AUDIO_LFIFO_UF_INTR), /* BRFM Interrupt Id = 0x03 */
394	MAKE_INT_ID(AUDIO_LFIFO_OF_INTR), /* BRFM Interrupt Id = 0x04 */
395	MAKE_INT_ID(VIDEO_FIFO_UF_INTR), /* BRFM Interrupt Id = 0x05 */
396	MAKE_INT_ID(VIDEO_FIFO_OF_INTR), /* BRFM Interrupt Id = 0x06 */
397	MAKE_INT_ID(AUDIO_VIDEO_CLIP_INTR), /* BRFM Interrupt Id = 0x07 */
398	MAKE_INT_ID(AUDIO_LEFT_CLIP_INTR), /* BRFM Interrupt Id = 0x08 */
399	MAKE_INT_ID(AUDIO_RIGHT_CLIP_INTR), /* BRFM Interrupt Id = 0x09 */
400	MAKE_INT_ID(AUDIO_RATE_CLIP_INTR), /* BRFM Interrupt Id = 0x0A */
401	MAKE_INT_ID(AUDIO_LINE_LOSS_INTR), /* BRFM Interrupt Id = 0x0B */
402	MAKE_INT_ID(AUDIO_SUM_CLIP_INTR), /* BRFM Interrupt Id = 0x0C */
403	MAKE_INT_ID(AUDIO_DIFF_CLIP_INTR), /* BRFM Interrupt Id = 0x0D */
404	MAKE_INT_ID(AUDIO_SUMDIFF_CLIP_INTR), /* BRFM Interrupt Id = 0x0E */
405	MAKE_INT_ID(AUDIO_COMP_CLIP_INTR), /* BRFM Interrupt Id = 0x0F */
406	MAKE_INT_ID(RFIFD_FIFO_UF_INTR), /* BRFM Interrupt Id = 0x10 */
407	MAKE_INT_ID(RFIFD_FIFO_OF_INTR), /* BRFM Interrupt Id = 0x11 */
408	MAKE_INT_ID(AUDIO_RVID_FIFO_UF_INTR), /* BRFM Interrupt Id = 0x12 */
409	MAKE_INT_ID(AUDIO_RVID_FIFO_OF_INTR), /* BRFM Interrupt Id = 0x13 */
410	MAKE_INT_ID(AUDIO_LVID_FIFO_UF_INTR), /* BRFM Interrupt Id = 0x14 */
411	MAKE_INT_ID(AUDIO_LVID_FIFO_OF_INTR), /* BRFM Interrupt Id = 0x15 */
412
413	#elif (BCHP_CHIP==7118 \|\| BCHP_CHIP==7401 \|\| BCHP_CHIP==7403 \
414	\|\| (BCHP_CHIP==7400 && BCHP_VER < BCHP_VER_B0))
415	MAKE_INT_ID(GISB_ERROR_INTR), /* BRFM Interrupt Id = 0x00 */
416	MAKE_INT_ID(AUDIO_FIFO_UF_INTR), /* BRFM Interrupt Id = 0x01 */
417	MAKE_INT_ID(AUDIO_FIFO_OF_INTR), /* BRFM Interrupt Id = 0x02 */
418	MAKE_INT_ID(VIDEO_FIFO_UF_INTR), /* BRFM Interrupt Id = 0x03 */
419	MAKE_INT_ID(VIDEO_FIFO_OF_INTR), /* BRFM Interrupt Id = 0x04 */
420	MAKE_INT_ID(AUDIO_VIDEO_CLIP_INTR), /* BRFM Interrupt Id = 0x05 */
421	MAKE_INT_ID(AUDIO_LEFT_CLIP_INTR), /* BRFM Interrupt Id = 0x06 */
422	MAKE_INT_ID(AUDIO_RIGHT_CLIP_INTR), /* BRFM Interrupt Id = 0x07 */
423	MAKE_INT_ID(AUDIO_RATE_CLIP_INTR), /* BRFM Interrupt Id = 0x08 */
424	MAKE_INT_ID(AUDIO_LINE_LOSS_INTR), /* BRFM Interrupt Id = 0x09 */
425	MAKE_INT_ID(AUDIO_SUM_CLIP_INTR), /* BRFM Interrupt Id = 0x0A */
426	MAKE_INT_ID(AUDIO_DIFF_CLIP_INTR), /* BRFM Interrupt Id = 0x0B */
427	MAKE_INT_ID(AUDIO_SUMDIFF_CLIP_INTR), /* BRFM Interrupt Id = 0x0C */
428	MAKE_INT_ID(AUDIO_COMP_CLIP_INTR), /* BRFM Interrupt Id = 0x0D */
429	MAKE_INT_ID(RFIFD_FIFO_UF_INTR), /* BRFM Interrupt Id = 0x0E */
430	MAKE_INT_ID(RFIFD_FIFO_OF_INTR), /* BRFM Interrupt Id = 0x0F */
431	MAKE_INT_ID(AUDIO_VID_FIFO_UF_INTR), /* BRFM Interrupt Id = 0x10 */
432	MAKE_INT_ID(AUDIO_VID_FIFO_OF_INTR), /* BRFM Interrupt Id = 0x11 */
433
434	#elif (BRFM_REVID>=40)
435	#if (BRFM_REVID>=51) && (BCHP_CHIP != 7429) && (BCHP_CHIP != 7360)
436	MAKE_INT_ID(RFM_L2_GISB_ERROR_INTR), /* BRFM Interrupt Id = 0x00 */
437	#else
438	MAKE_INT_ID(GISB_ERROR_INTR), /* BRFM Interrupt Id = 0x00 */
439	#endif
440	MAKE_INT_ID(AUDIO_FIFO_UF_INTR), /* BRFM Interrupt Id = 0x01 */
441	MAKE_INT_ID(AUDIO_FIFO_OF_INTR), /* BRFM Interrupt Id = 0x02 */
442	MAKE_INT_ID(VIDEO_FIFO_UF_INTR), /* BRFM Interrupt Id = 0x03 */
443	MAKE_INT_ID(VIDEO_FIFO_OF_INTR), /* BRFM Interrupt Id = 0x04 */
444	MAKE_INT_ID(AUDIO_VIDEO_CLIP_INTR), /* BRFM Interrupt Id = 0x05 */
445	MAKE_INT_ID(AUDIO_LEFT_CLIP_INTR), /* BRFM Interrupt Id = 0x06 */
446	MAKE_INT_ID(AUDIO_RIGHT_CLIP_INTR), /* BRFM Interrupt Id = 0x07 */
447	MAKE_INT_ID(AUDIO_RATE_CLIP_INTR), /* BRFM Interrupt Id = 0x08 */
448	MAKE_INT_ID(AUDIO_LINE_LOSS_INTR), /* BRFM Interrupt Id = 0x09 */
449	MAKE_INT_ID(AUDIO_SUM_CLIP_INTR), /* BRFM Interrupt Id = 0x0A */
450	MAKE_INT_ID(AUDIO_DIFF_CLIP_INTR), /* BRFM Interrupt Id = 0x0B */
451	MAKE_INT_ID(AUDIO_SUMDIFF_CLIP_INTR), /* BRFM Interrupt Id = 0x0C */
452	MAKE_INT_ID(AUDIO_COMP_CLIP_INTR), /* BRFM Interrupt Id = 0x0D */
453	MAKE_INT_ID(AUDIO_VID_FIFO_UF_INTR), /* BRFM Interrupt Id = 0x0E */
454	MAKE_INT_ID(AUDIO_VID_FIFO_OF_INTR), /* BRFM Interrupt Id = 0x0F */
455	MAKE_INT_ID(NICAM_FIFO_UF_INTR), /* BRFM Interrupt Id = 0x10 */
456	MAKE_INT_ID(NICAM_FIFO_OF_INTR), /* BRFM Interrupt Id = 0x11 */
457
458	#if BRFM_DUAL_DAC
459	#if BCHP_CHIP==7420
460	MAKE_INT_ID(RFM_BBE_L2_GISB_ERROR_INTR),
461	#endif
462	MAKE_INT_ID(BBE_AUDIO_FIFO_UF_INTR), /* BRFM Interrupt Id = 0x12 or 0x01 */
463	MAKE_INT_ID(BBE_AUDIO_FIFO_OF_INTR), /* BRFM Interrupt Id = 0x13 or 0x02 */
464	MAKE_INT_ID(BBE_AUDIO_VIDEO_CLIP_INTR), /* BRFM Interrupt Id = 0x14 or 0x05 */
465	MAKE_INT_ID(BBE_AUDIO_LEFT_CLIP_INTR), /* BRFM Interrupt Id = 0x15 or 0x06 */
466	MAKE_INT_ID(BBE_AUDIO_RIGHT_CLIP_INTR), /* BRFM Interrupt Id = 0x16 or 0x07 */
467	MAKE_INT_ID(BBE_AUDIO_RATE_CLIP_INTR), /* BRFM Interrupt Id = 0x17 or 0x08 */
468	MAKE_INT_ID(BBE_AUDIO_LINE_LOSS_INTR), /* BRFM Interrupt Id = 0x18 or 0x09 */
469	MAKE_INT_ID(BBE_AUDIO_SUM_CLIP_INTR), /* BRFM Interrupt Id = 0x19 or 0x0A */
470	MAKE_INT_ID(BBE_AUDIO_DIFF_CLIP_INTR), /* BRFM Interrupt Id = 0x1A or 0x0B */
471	MAKE_INT_ID(BBE_AUDIO_SUMDIFF_CLIP_INTR), /* BRFM Interrupt Id = 0x1B or 0x0C */
472	MAKE_INT_ID(BBE_AUDIO_COMP_CLIP_INTR), /* BRFM Interrupt Id = 0x1C or 0x0D */
473	MAKE_INT_ID(BBE_AUDIO_VID_FIFO_UF_INTR), /* BRFM Interrupt Id = 0x1D or 0x10 */
474	MAKE_INT_ID(BBE_AUDIO_VID_FIFO_OF_INTR), /* BRFM Interrupt Id = 0x1E or 0x11 */
475	#endif
476	#endif
477	};
478
479	/*******************************************************************************
480	*
481	* Private functions
482	*
483	*******************************************************************************/
484	static void BRFM_HandleInterrupt_isr(
485	void pParam1, / [in] Device channel handle */
486	int parm2 /* [in] Interrupt Type, uses BRFM_IntType */
487	)
488	{
489	BERR_Code retCode = BERR_SUCCESS;
490	BRFM_Handle hDev;
491
492	hDev = (BRFM_Handle)pParam1;
493	BDBG_ASSERT(hDev);
494	switch ((BRFM_IntType) parm2)
495	{
496	#if (BCHP_CHIP==7038 \|\| BCHP_CHIP==7438)
497	case MAKE_INT_ENUM(AUDIO_RFIFO_UF_INTR):
498	case MAKE_INT_ENUM(AUDIO_RFIFO_OF_INTR):
499	case MAKE_INT_ENUM(AUDIO_LFIFO_UF_INTR):
500	case MAKE_INT_ENUM(AUDIO_LFIFO_OF_INTR):
501	case MAKE_INT_ENUM(AUDIO_RVID_FIFO_UF_INTR):
502	case MAKE_INT_ENUM(AUDIO_RVID_FIFO_OF_INTR):
503	case MAKE_INT_ENUM(AUDIO_LVID_FIFO_UF_INTR):
504	case MAKE_INT_ENUM(AUDIO_LVID_FIFO_OF_INTR):
505	#else
506	case MAKE_INT_ENUM(AUDIO_FIFO_UF_INTR):
507	case MAKE_INT_ENUM(AUDIO_FIFO_OF_INTR):
508	case MAKE_INT_ENUM(AUDIO_VID_FIFO_UF_INTR):
509	case MAKE_INT_ENUM(AUDIO_VID_FIFO_OF_INTR):
510	#endif /* common to all platforms */
511	case MAKE_INT_ENUM(VIDEO_FIFO_UF_INTR):
512	case MAKE_INT_ENUM(VIDEO_FIFO_OF_INTR):
513	case MAKE_INT_ENUM(AUDIO_VIDEO_CLIP_INTR):
514	case MAKE_INT_ENUM(AUDIO_LEFT_CLIP_INTR):
515	case MAKE_INT_ENUM(AUDIO_RIGHT_CLIP_INTR):
516	case MAKE_INT_ENUM(AUDIO_RATE_CLIP_INTR):
517	case MAKE_INT_ENUM(AUDIO_LINE_LOSS_INTR):
518	case MAKE_INT_ENUM(AUDIO_SUM_CLIP_INTR):
519	case MAKE_INT_ENUM(AUDIO_DIFF_CLIP_INTR):
520	case MAKE_INT_ENUM(AUDIO_SUMDIFF_CLIP_INTR):
521	case MAKE_INT_ENUM(AUDIO_COMP_CLIP_INTR):
522
523	#if (BRFM_REVID>=40)
524	case MAKE_INT_ENUM(NICAM_FIFO_UF_INTR):
525	case MAKE_INT_ENUM(NICAM_FIFO_OF_INTR):
526
527	/* additional interrupts for 65nm platforms with dual BTSC */
528	#if BRFM_DUAL_DAC
529	case MAKE_INT_ENUM(BBE_AUDIO_FIFO_UF_INTR):
530	case MAKE_INT_ENUM(BBE_AUDIO_FIFO_OF_INTR):
531	case MAKE_INT_ENUM(BBE_AUDIO_VIDEO_CLIP_INTR):
532	case MAKE_INT_ENUM(BBE_AUDIO_LEFT_CLIP_INTR):
533	case MAKE_INT_ENUM(BBE_AUDIO_RIGHT_CLIP_INTR):
534	case MAKE_INT_ENUM(BBE_AUDIO_RATE_CLIP_INTR):
535	case MAKE_INT_ENUM(BBE_AUDIO_LINE_LOSS_INTR):
536	case MAKE_INT_ENUM(BBE_AUDIO_SUM_CLIP_INTR):
537	case MAKE_INT_ENUM(BBE_AUDIO_DIFF_CLIP_INTR):
538	case MAKE_INT_ENUM(BBE_AUDIO_SUMDIFF_CLIP_INTR):
539	case MAKE_INT_ENUM(BBE_AUDIO_COMP_CLIP_INTR):
540	case MAKE_INT_ENUM(BBE_AUDIO_VID_FIFO_UF_INTR):
541	case MAKE_INT_ENUM(BBE_AUDIO_VID_FIFO_OF_INTR):
542	#endif
543
544	#else /* (BRFM_REVID>=40) */
545	case MAKE_INT_ENUM(RFIFD_FIFO_UF_INTR):
546	case MAKE_INT_ENUM(RFIFD_FIFO_OF_INTR):
547	#endif
548	/* Notify on logging port that an interrupt occurred */
549	BDBG_MSG(("BRFM_HandleInterrupt_isr: Interrupt Id=0x%02x, Disabling", parm2));
550	/* After the first time the interrupt comes, disable the interrupt, so
551	that the interrupts don't flood the system if the interrupt can't be cleared.
552	Interrupt will be re-enabled when the mode set, see that function in this file. */
553	CHK_RETCODE(retCode, BINT_DisableCallback_isr( hDev->hCallback[parm2]));
554	hDev->isCallbackDisable \|= (1 << parm2);
555	break;
556	case MAKE_INT_ENUM(GISB_ERROR_INTR):
557	/* Notify logging port that an interrupt occurred */
558	BDBG_ERR(("BRFM_HandleInterrupt_isr: Reset is required!"));
559	/* TODO: Resetting the RFM core may be required */
560	break;
561	default:
562	BDBG_ERR(("BRFM_HandleInterrupt_isr: Unknown Interrupt Id=0x%x!", parm2));
563	break;
564	}
565	done:
566	return;
567	}
568
569	static BERR_Code BRFM_EnableDisabledInterrupt(BRFM_Handle hDev)
570	{
571	BERR_Code retCode = BERR_SUCCESS;
572	unsigned idx;
573	uint32_t bitMask;
574
575	if (hDev->isCallbackDisable != 0) {
576	bitMask = 1;
577	for (idx=0; idx<MAKE_INT_ENUM(Last); idx++, bitMask=(bitMask << 1)) {
578	if (hDev->isCallbackDisable & bitMask) {
579	CHK_RETCODE(retCode, BINT_EnableCallback( hDev->hCallback[idx]));
580	hDev->isCallbackDisable &= ~bitMask;
581	BDBG_MSG(("BRFM: Interrupt Id=0x%02x, Re-enabling", idx));
582	}
583	}
584	}
585
586	done:
587	return retCode;
588	}
589
590	static void BRFM_P_SysclkReset(BRFM_Handle hDev)
591	{
592	uint32_t ulVal;
593	BDBG_MSG(("BRFM_P_SysclkReset"));
594	if (hDev->settings.encType == BRFM_EncoderType_singleBTSC)
595	{
596	/* Assert Reset */
597	ulVal = BREG_Read32(hDev->hRegister, BCHP_RFM_SYSCLK_RESET);
598	#if (BRFM_REVID>=40)
599	ulVal \|= BCHP_FIELD_DATA(RFM_SYSCLK_RESET, NICAM_SFT_RST, 0x01);
600	#endif
601	ulVal \|= BCHP_FIELD_DATA(RFM_SYSCLK_RESET, VFIFO_SFT_RST, 0x01);
602	ulVal \|= BCHP_FIELD_DATA(RFM_SYSCLK_RESET, AFIFO_SFT_RST, 0x01);
603	ulVal \|= BCHP_FIELD_DATA(RFM_SYSCLK_RESET, CLKGEN_SFT_RST, 0x01);
604	ulVal \|= BCHP_FIELD_DATA(RFM_SYSCLK_RESET, AM_SFT_RST, 0x01);
605	ulVal \|= BCHP_FIELD_DATA(RFM_SYSCLK_RESET, VIDEO_SFT_RST, 0x01);
606	ulVal \|= BCHP_FIELD_DATA(RFM_SYSCLK_RESET, AUDIO_SFT_RST, 0x01);
607	BREG_Write32(hDev->hRegister, BCHP_RFM_SYSCLK_RESET, ulVal);
608
609	/* Deassert Reset */
610	ulVal = BREG_Read32(hDev->hRegister, BCHP_RFM_SYSCLK_RESET);
611	#if (BRFM_REVID>=40)
612	ulVal &= BCHP_FIELD_DATA(RFM_SYSCLK_RESET, NICAM_SFT_RST, 0x00);
613	#endif
614	ulVal &= BCHP_FIELD_DATA(RFM_SYSCLK_RESET, VFIFO_SFT_RST, 0x00);
615	ulVal &= BCHP_FIELD_DATA(RFM_SYSCLK_RESET, AFIFO_SFT_RST, 0x00);
616	ulVal &= BCHP_FIELD_DATA(RFM_SYSCLK_RESET, CLKGEN_SFT_RST, 0x00);
617	ulVal &= BCHP_FIELD_DATA(RFM_SYSCLK_RESET, AM_SFT_RST, 0x00);
618	ulVal &= BCHP_FIELD_DATA(RFM_SYSCLK_RESET, VIDEO_SFT_RST, 0x00);
619	ulVal &= BCHP_FIELD_DATA(RFM_SYSCLK_RESET, AUDIO_SFT_RST, 0x00);
620	BREG_Write32(hDev->hRegister, BCHP_RFM_SYSCLK_RESET, ulVal);
621	}
622	else if (hDev->settings.encType == BRFM_EncoderType_dualBTSC)
623	{
624	#if BRFM_DUAL_DAC
625	/* Assert Reset */
626	ulVal = BREG_Read32(hDev->hRegister, BCHP_RFM_BBE_SYSCLK_RESET);
627	ulVal \|= BCHP_FIELD_DATA(RFM_BBE_SYSCLK_RESET, AFIFO_SFT_RST, 0x01);
628	ulVal \|= BCHP_FIELD_DATA(RFM_BBE_SYSCLK_RESET, AM_SFT_RST, 0x01);
629	ulVal \|= BCHP_FIELD_DATA(RFM_BBE_SYSCLK_RESET, VIDEO_SFT_RST, 0x01);
630	ulVal \|= BCHP_FIELD_DATA(RFM_BBE_SYSCLK_RESET, AUDIO_SFT_RST, 0x01);
631	BREG_Write32(hDev->hRegister, BCHP_RFM_BBE_SYSCLK_RESET, ulVal);
632
633	/* Deassert Reset */
634	ulVal = BREG_Read32(hDev->hRegister, BCHP_RFM_BBE_SYSCLK_RESET);
635	ulVal &= BCHP_FIELD_DATA(RFM_BBE_SYSCLK_RESET, AFIFO_SFT_RST, 0x00);
636	ulVal &= BCHP_FIELD_DATA(RFM_BBE_SYSCLK_RESET, AM_SFT_RST, 0x00);
637	ulVal &= BCHP_FIELD_DATA(RFM_BBE_SYSCLK_RESET, VIDEO_SFT_RST, 0x00);
638	ulVal &= BCHP_FIELD_DATA(RFM_BBE_SYSCLK_RESET, AUDIO_SFT_RST, 0x00);
639	BREG_Write32(hDev->hRegister, BCHP_RFM_BBE_SYSCLK_RESET, ulVal);
640	#endif
641	}
642	}
643
644	BERR_Code BRFM_P_CRC_BIST(BREG_Handle hRegister, BRFM_EncoderType enc);
645
646	void BRFM_P_SetTopLevelClock(BREG_Handle hReg, bool enable)
647	{
648	#if (BRFM_REVID<40) /* No PM registers */
649	BSTD_UNUSED(hReg);
650	#else
651	BREG_AtomicUpdate32(hReg, BRFM_P_CLK_PM_CTRL_BCHP, BRFM_P_CLK_PM_CTRL_MASK,
652	enable ? BRFM_P_CLK_PM_CTRL_ENABLED : !BRFM_P_CLK_PM_CTRL_ENABLED);
653	#endif
654	}
655
656	bool BRFM_P_GetTopLevelClock(BREG_Handle hReg)
657	{
658	#if (BRFM_REVID<40)
659	BSTD_UNUSED(hReg);
660	return 1; /* always on */
661	#else
662	uint32_t val;
663	val = BREG_Read32(hReg, BRFM_P_CLK_PM_CTRL_BCHP);
664	if (BCHP_GET_FIELD_DATA(val, BRFM_P_CLK_PM_CTRL_REG, BRFM_P_CLK_PM_CTRL_FIELD)==BRFM_P_CLK_PM_CTRL_ENABLED) {
665	return true;
666	}
667	else {
668	return false;
669	}
670	#endif
671	}
672
673	static void BRFM_P_PowerDown(BRFM_Handle hDev)
674	{
675	#ifdef BCHP_PWR_RESOURCE_RFM
676	BCHP_PWR_ReleaseResource(hDev->hChip, BCHP_PWR_RESOURCE_RFM);
677	#elif (BRFM_REVID<40)
678	BSTD_UNUSED(hDev);
679	#else
680	BREG_Handle hReg = hDev->hRegister;
681	uint32_t ulRegData;
682
683	/* check if top-level clock has been disabled. if disabled, it was most likely shut down via BPWR. */
684	if (BRFM_P_GetTopLevelClock(hReg)==false) {
685	BDBG_WRN(("BRFM_P_PowerDown: Power down requested while top-level RFM clock disabled"));
686	return;
687	}
688
689	/* 1 */
690	ulRegData = BREG_Read32(hReg, BCHP_RFM_SYSCLK_DACCTL);
691	ulRegData \|= BCHP_RFM_SYSCLK_DACCTL_DAC_PWRDN_MASK;
692	BREG_Write32(hReg, BCHP_RFM_SYSCLK_DACCTL, ulRegData);
693	#if BRFM_DUAL_DAC
694	/* for dual DAC RFM cores, a single call to EnablePowerSaver disables both */
695	ulRegData = BREG_Read32(hReg, BCHP_RFM_SYSCLK_DACCTL);
696	ulRegData \|= BCHP_RFM_SYSCLK_DACCTL_DAC_PWRDN_2_MASK;
697	BREG_Write32(hReg, BCHP_RFM_SYSCLK_DACCTL, ulRegData);
698	#endif
699	/* 2 */
700	ulRegData = BREG_Read32(hReg, BCHP_RFM_SYSCLK_CLKCTL);
701	ulRegData \|= BCHP_RFM_SYSCLK_CLKCTL_CLK_OFF_MASK;
702	BREG_Write32(hReg, BCHP_RFM_SYSCLK_CLKCTL, ulRegData);
703	/* 3 */
704	#if (BRFM_REVID!=51) /* no PHASEITP register for REV 5.1 */
705	ulRegData = BREG_Read32(hReg, BCHP_RFM_SYSCLK_RFM_PHASEITP_CTL);
706	ulRegData \|= BCHP_RFM_SYSCLK_RFM_PHASEITP_CTL_PHASEITP_PWRDN_MASK;
707	BREG_Write32(hReg, BCHP_RFM_SYSCLK_RFM_PHASEITP_CTL, ulRegData);
708	#endif
709	/* 4 */
710	#if (BRFM_REVID==51)
711	ulRegData = BREG_Read32(hReg, BCHP_RFM_SYSCLK_DPLL_MISC1);
712	ulRegData \|= BCHP_RFM_SYSCLK_DPLL_MISC1_REFCOMP_PWRDN_MASK \|
713	BCHP_RFM_SYSCLK_DPLL_MISC1_PWRDN_MASK;
714	BREG_Write32(hReg, BCHP_RFM_SYSCLK_DPLL_MISC1, ulRegData);
715	#else
716	ulRegData = BREG_Read32(hReg, BCHP_RFM_SYSCLK_PLL_MISC1);
717	ulRegData \|= BCHP_RFM_SYSCLK_PLL_MISC1_NDIV_PWRDN_MASK \|
718	BCHP_RFM_SYSCLK_PLL_MISC1_REFCOMP_PWRDN_MASK \|
719	BCHP_RFM_SYSCLK_PLL_MISC1_PWRDN_MASK;
720	BREG_Write32(hReg, BCHP_RFM_SYSCLK_PLL_MISC1, ulRegData);
721	#endif
722	/* 5 */
723	#if (BRFM_REVID!=51)
724	ulRegData = BREG_Read32(hReg, BCHP_RFM_SYSCLK_DACCTL);
725	ulRegData \|= BCHP_RFM_SYSCLK_DACCTL_BIAS50U_OFF_MASK \|
726	BCHP_RFM_SYSCLK_DACCTL_BIASLOG_OFF_MASK;
727	BREG_Write32(hReg, BCHP_RFM_SYSCLK_DACCTL, ulRegData);
728	#endif
729	/* 6 */
730	ulRegData = BREG_Read32(hReg, BCHP_RFM_SYSCLK_CLKCTL);
731	ulRegData \|= BCHP_RFM_SYSCLK_CLKCTL_RFMCLK_OFF_MASK \|
732	#if (BRFM_REVID!=51)
733	BCHP_RFM_SYSCLK_CLKCTL_VREG_OFF_MASK \|
734	#endif
735	BCHP_RFM_SYSCLK_CLKCTL_BGCORE_OFF_MASK;
736	BREG_Write32(hReg, BCHP_RFM_SYSCLK_CLKCTL, ulRegData);
737
738	/* leave top-level clock running (required for BINT_Open during next init) */
739
740	/* do not set settings.isOutputEnable=false, since it will trigger setting
741	all registers again in EnableRfOutput(), which is unnecessary */
742	#endif
743	}
744
745	static void BRFM_P_PowerUp(BRFM_Handle hDev, bool runCRC)
746	{
747	#ifdef BCHP_PWR_RESOURCE_RFM
748	BCHP_PWR_AcquireResource(hDev->hChip, BCHP_PWR_RESOURCE_RFM);
749	#elif (BRFM_REVID<40)
750	BSTD_UNUSED(hDev);
751	BSTD_UNUSED(runCRC);
752	#else
753	uint32_t ulRegData;
754
755	/* 1 */
756	BRFM_P_SetTopLevelClock(hDev->hRegister, true);
757
758	/* 2 */
759	ulRegData = BREG_Read32(hDev->hRegister, BCHP_RFM_SYSCLK_CLKCTL);
760	ulRegData &= ~(BCHP_RFM_SYSCLK_CLKCTL_RFMCLK_OFF_MASK \|
761	#if (BRFM_REVID!=51)
762	BCHP_RFM_SYSCLK_CLKCTL_VREG_OFF_MASK \|
763	#endif
764	BCHP_RFM_SYSCLK_CLKCTL_BGCORE_OFF_MASK);
765	BREG_Write32(hDev->hRegister, BCHP_RFM_SYSCLK_CLKCTL, ulRegData);
766	/* 3 */
767	#if (BRFM_REVID!=51) /* no PHASEITP register for REV 5.1 */
768	ulRegData = BREG_Read32(hDev->hRegister, BCHP_RFM_SYSCLK_RFM_PHASEITP_CTL);
769	ulRegData &= ~(BCHP_RFM_SYSCLK_RFM_PHASEITP_CTL_PHASEITP_PWRDN_MASK);
770	BREG_Write32(hDev->hRegister, BCHP_RFM_SYSCLK_RFM_PHASEITP_CTL, ulRegData);
771	#endif
772	/* 4 */
773	#if (BRFM_REVID==51)
774	ulRegData = BREG_Read32(hDev->hRegister, BCHP_RFM_SYSCLK_DPLL_MISC1);
775	ulRegData &= ~(BCHP_RFM_SYSCLK_DPLL_MISC1_REFCOMP_PWRDN_MASK \|
776	BCHP_RFM_SYSCLK_DPLL_MISC1_PWRDN_MASK);
777	BREG_Write32(hDev->hRegister, BCHP_RFM_SYSCLK_DPLL_MISC1, ulRegData);
778	#else
779	ulRegData = BREG_Read32(hDev->hRegister, BCHP_RFM_SYSCLK_PLL_MISC1);
780	ulRegData &= ~(BCHP_RFM_SYSCLK_PLL_MISC1_NDIV_PWRDN_MASK \|
781	BCHP_RFM_SYSCLK_PLL_MISC1_REFCOMP_PWRDN_MASK \|
782	BCHP_RFM_SYSCLK_PLL_MISC1_PWRDN_MASK);
783	BREG_Write32(hDev->hRegister, BCHP_RFM_SYSCLK_PLL_MISC1, ulRegData);
784	#endif
785	/* 5 */
786	#if (BRFM_REVID!=51)
787	ulRegData = BREG_Read32(hDev->hRegister, BCHP_RFM_SYSCLK_DACCTL);
788	ulRegData &= ~(BCHP_RFM_SYSCLK_DACCTL_BIAS50U_OFF_MASK \|
789	BCHP_RFM_SYSCLK_DACCTL_BIASLOG_OFF_MASK);
790	BREG_Write32(hDev->hRegister, BCHP_RFM_SYSCLK_DACCTL, ulRegData);
791	#endif
792	/* 6 */
793	BKNI_Sleep(1); /* wait 50us for RFM PLL to lock */
794	/* 7 */
795	ulRegData = BREG_Read32(hDev->hRegister, BCHP_RFM_SYSCLK_CLKCTL);
796	ulRegData &= ~(BCHP_RFM_SYSCLK_CLKCTL_CLK_OFF_MASK);
797	BREG_Write32(hDev->hRegister, BCHP_RFM_SYSCLK_CLKCTL, ulRegData);
798	/* 8 */
799	ulRegData = BREG_Read32(hDev->hRegister, BCHP_RFM_SYSCLK_DACCTL);
800	ulRegData &= ~(BCHP_RFM_SYSCLK_DACCTL_DAC_PWRDN_MASK);
801	BREG_Write32(hDev->hRegister, BCHP_RFM_SYSCLK_DACCTL, ulRegData);
802	#if BRFM_DUAL_DAC
803	/* for dual DAC RFM cores, power up of either core enables both */
804	ulRegData = BREG_Read32(hDev->hRegister, BCHP_RFM_SYSCLK_DACCTL);
805	ulRegData &= ~(BCHP_RFM_SYSCLK_DACCTL_DAC_PWRDN_2_MASK);
806	BREG_Write32(hDev->hRegister, BCHP_RFM_SYSCLK_DACCTL, ulRegData);
807	#endif
808	#endif /* (BRFM_REVID<40) */
809
810	#if (BRFM_REVID>=40) \|\| (defined BCHP_PWR_RESOURCE_RFM)
811	/* assert and deassert SYSCLK_RESET after every power-up */
812	BRFM_P_SysclkReset(hDev);
813
814	/* 9 */
815	if (runCRC) {
816	#if (!BRFM_DUAL_DAC)
817	BRFM_P_CRC_BIST(hDev->hRegister, hDev->settings.encType);
818	#else
819	/* since power up of either core enables both, run CRC on both DACs */
820	BRFM_P_CRC_BIST(hDev->hRegister, BRFM_EncoderType_dualBTSC);
821	#endif
822	}
823	#endif
824	}
825
826	static void BRFM_P_SetPowerSaverMode(BRFM_Handle hDev, bool bEnable /* 1==enable power saver mode */)
827	{
828	#if (BRFM_REVID>=40)
829	unsigned idx;
830	if (bEnable==true && hDev->settings.isPowerSaverEnable==false) {
831	BDBG_MSG(("BRFM_P_SetPowerSaverMode: %d->%d", hDev->settings.isPowerSaverEnable, bEnable));
832	for (idx = 0; idx < MAKE_INT_ENUM(Last); idx++) {
833	if( hDev->hCallback[idx] != NULL ) {
834	BINT_DisableCallback( hDev->hCallback[idx] );
835	}
836	}
837	BRFM_P_PowerDown(hDev);
838	}
839	else if (bEnable==false && hDev->settings.isPowerSaverEnable==true) {
840	BDBG_MSG(("BRFM_P_SetPowerSaverMode: %d->%d", hDev->settings.isPowerSaverEnable, bEnable));
841	BRFM_P_PowerUp(hDev, true);
842	for (idx = 0; idx < MAKE_INT_ENUM(Last); idx++) {
843	if( hDev->hCallback[idx] != NULL ) {
844	BINT_EnableCallback( hDev->hCallback[idx] );
845	}
846	}
847	}
848	hDev->settings.isPowerSaverEnable = bEnable;
849
850	#else
851	uint32_t ulVal1, ulVal2;
852	if (hDev->settings.isPowerSaverEnable != bEnable) {
853	ulVal1 = BREG_Read32(hDev->hRegister, BCHP_RFM_SYSCLK_CLKCTL);
854	ulVal2 = BREG_Read32(hDev->hRegister, BCHP_RFM_SYSCLK_DACCTL);
855
856	if (bEnable == true) {
857	/* power-down */
858	ulVal1 \|= BCHP_FIELD_DATA(RFM_SYSCLK_CLKCTL, PLL_OFF, 1);
859	ulVal1 \|= BCHP_FIELD_DATA(RFM_SYSCLK_CLKCTL, VREG_OFF, 1);
860	ulVal2 \|= BCHP_FIELD_DATA(RFM_SYSCLK_DACCTL, DIS_CLK, 1);
861	hDev->settings.isOutputEnable = false;
862	}
863	else {
864	/* power-up */
865	ulVal1 &= ~(BCHP_FIELD_DATA(RFM_SYSCLK_CLKCTL, PLL_OFF, 1));
866	ulVal1 &= ~(BCHP_FIELD_DATA(RFM_SYSCLK_CLKCTL, VREG_OFF, 1));
867	ulVal2 &= ~(BCHP_FIELD_DATA(RFM_SYSCLK_DACCTL, DIS_CLK, 1));
868	/* for non-65nm platforms, a call to EnableRfOutput is expected in order to set .isOutputEnable = true */
869	}
870	BREG_Write32(hDev->hRegister, BCHP_RFM_SYSCLK_CLKCTL, ulVal1);
871	BREG_Write32(hDev->hRegister, BCHP_RFM_SYSCLK_DACCTL, ulVal2);
872	hDev->settings.isPowerSaverEnable = bEnable;
873	}
874	#endif
875
876	return;
877	}
878
879	#if (BRFM_REVID<50)
880	/* dB values for range [-34, +30] dB */
881	static const uint16_t dB2Volume400[] =
882	{
883	0x0014, 0x0017, 0x001A, 0x001D, 0x0020, 0x0024, 0x0029, 0x002E,
884	0x0033, 0x003A, 0x0041, 0x0048, 0x0051, 0x005B, 0x0066, 0x0073,
885	0x0081, 0x0091, 0x00A2, 0x00B6, 0x00CC, 0x00E5, 0x0101, 0x0121,
886	0x0144, 0x016B, 0x0198, 0x01C9, 0x0201, 0x0240, 0x0286, 0x02D5,
887	0x032D, 0x0391, 0x0400, 0x047D, 0x0509, 0x05A6, 0x0657, 0x071D,
888	0x07FB, 0x08F4, 0x0A0C, 0x0B46, 0x0CA6, 0x0E31, 0x0FED, 0x11DE,
889	0x140C, 0x167E, 0x193D, 0x1C51, 0x1FC6, 0x23A6, 0x2800, 0x2CE1,
890	0x325B, 0x3880, 0x3F65, 0x4722, 0x4FCF, 0x598D, 0x647A, 0x70BC,
891	0x7E7E
892	};
893
894	#else
895	/* dB values for new range [-52, +12] dB */
896	static const uint16_t dB2Volume2000[] =
897	{
898	0x0015, 0x0017, 0x001A, 0x001D, 0x0021, 0x0025, 0x0029, 0x002E,
899	0x0034, 0x003A, 0x0041, 0x0049, 0x0052, 0x005C, 0x0067, 0x0074,
900	0x0082, 0x0092, 0x00A3, 0x00B7, 0x00CE, 0x00E7, 0x0103, 0x0123,
901	0x0146, 0x016E, 0x019B, 0x01CD, 0x0205, 0x0244, 0x028B, 0x02DA,
902	0x0333, 0x0397, 0x0407, 0x0485, 0x0512, 0x05B1, 0x0663, 0x072A,
903	0x080A, 0x0905, 0x0A1F, 0x0B5B, 0x0CBD, 0x0E4B, 0x100A, 0x11FF,
904	0x1431, 0x16A7, 0x196B, 0x1C85, 0x2000, 0x23E8, 0x2849, 0x2D34,
905	0x32B7, 0x38E8, 0x3FD9, 0x47A4, 0x5061, 0x5A30, 0x6531, 0x718A,
906	0x7F65
907	};
908	#endif
909
910	/* dB values for range [-52, 12] dB. used for NICAM volume control */
911	#if (BRFM_REVID<50)
912	static const uint16_t dB2Volume400_Nicam[] =
913	{
914	0x0052, 0x005C, 0x0068, 0x0074, 0x0082, 0x0092, 0x00A4, 0x00B8,
915	0x00CF, 0x00E8, 0x0082, 0x0092, 0x00A4, 0x005C, 0x0067, 0x0074,
916	0x0041, 0x0049, 0x0052, 0x002E, 0x0033, 0x003A, 0x0020, 0x0024,
917	0x0029, 0x002E, 0x0033, 0x003A, 0x0041, 0x0048, 0x0051, 0x005B,
918	0x0066, 0x0073, 0x0081, 0x0091, 0x00A2, 0x00B6, 0x00CC, 0x00E5,
919	0x0101, 0x0121, 0x0144, 0x016B, 0x0198, 0x01C9, 0x0201, 0x0240,
920	0x0286, 0x02D5, 0x032D, 0x0391, 0x0400, 0x047D, 0x0509, 0x05A6,
921	0x0657, 0x071D, 0x07FB, 0x08F4, 0x0A0C, 0x0B46, 0x0CA6, 0x0E31,
922	0x0FED
923	};
924
925	#else
926	static const uint16_t dB2Volume2000_Nicam[] =
927	{
928	0x0015, 0x0017, 0x001A, 0x001D, 0x0021, 0x0025, 0x0029, 0x002E,
929	0x0034, 0x003A, 0x0041, 0x0049, 0x0052, 0x005C, 0x0067, 0x0074,
930	0x0082, 0x0092, 0x00A3, 0x00B7, 0x00CE, 0x00E7, 0x0103, 0x0123,
931	0x0146, 0x016E, 0x019B, 0x01CD, 0x0205, 0x0244, 0x028B, 0x02DA,
932	0x0333, 0x0397, 0x0407, 0x0485, 0x0512, 0x05B1, 0x0663, 0x072A,
933	0x080A, 0x0905, 0x0A1F, 0x0B5B, 0x0CBD, 0x0E4B, 0x100A, 0x11FF,
934	0x1431, 0x16A7, 0x196B, 0x1C85, 0x2000, 0x23E8, 0x2849, 0x2D34,
935	0x32B7, 0x38E8, 0x3FD9, 0x47A4, 0x5061, 0x5A30, 0x6531, 0x718A,
936	0x7F65
937	};
938	#endif
939
940	void BRFM_P_CalculateVolume (
941	int volume, /* [in] requested audio volume */
942	uint16_t uLeftVal, / [out] calculated value for L audio channel */
943	uint16_t uRightVal / [out] calculated value for R audio channel */
944	)
945	{
946	int idx;
947
948	if (volume < BRFM_MIN_VOLUME) {
949	BDBG_WRN(("Volume too low (%d), setting to min", volume));
950	volume = BRFM_MIN_VOLUME;
951	}
952	else if (volume > BRFM_MAX_VOLUME) {
953	BDBG_WRN(("Volume too high (%d), setting to max", volume));
954	volume = BRFM_MAX_VOLUME;
955	}
956
957	idx = volume - BRFM_MIN_VOLUME; /* mapping -34 to 30 to a table of 0 to 63 entries */
958	#if (BRFM_REVID<50)
959	*uLeftVal=dB2Volume400[idx];
960	*uRightVal=dB2Volume400[idx];
961	#else
962	*uLeftVal=dB2Volume2000[idx];
963	*uRightVal=dB2Volume2000[idx];
964	#endif
965	}
966
967	#if (BRFM_REVID>=40)
968	void BRFM_P_CalculateNicamVolume(int volume, uint16_t *uVal)
969	{
970	int idx = volume - BRFM_MIN_VOLUME_NICAM;
971	#if (BRFM_REVID<50)
972	*uVal = dB2Volume400_Nicam[idx];
973	#else
974	*uVal = dB2Volume2000_Nicam[idx];
975	#endif
976	}
977	#endif
978
979	/* CRC Built-in Self-Test */
980	BERR_Code BRFM_P_CRC_BIST(
981	BREG_Handle hRegister, /* [in] Register handle */
982	BRFM_EncoderType enc /* [in] Encoder type */
983	)
984	{
985	/* the dual DAC case checks and corrects both DACs, but RFM isn't aware whether the user intends on using both.
986	the safe approach is to perform the BIST based on encoder type of handle */
987
988	#if (BRFM_REVID==40)
989	const int MAX_RETRY = 10;
990	int i;
991	uint32_t ulVal;
992	BERR_Code retCode = BERR_SUCCESS;
993
994	BREG_Write32( hRegister, BCHP_RFM_SYSCLK_CLKCTL, (0x11000000 \| BRFM_PLL_MULT) );
995
996	if (enc == BRFM_EncoderType_singleBTSC) { /* single DAC case */
997	for (i=0; i<MAX_RETRY; i++) {
998	BREG_Write32( hRegister, BCHP_RFM_SYSCLK_RFMPHY_BISTCNTL, 0x000103ff ); /* set BIST_EN */
999	BKNI_Sleep(10);
1000	ulVal = BREG_Read32( hRegister, BCHP_RFM_SYSCLK_RFMPHY_STATUS );
1001	BREG_Write32( hRegister, BCHP_RFM_SYSCLK_RFMPHY_BISTCNTL, 0x000003ff ); /* reset BIST_EN */
1002	if (ulVal == 0x8000fcd9) {
1003	BDBG_MSG(("BRFM_CRC_BIST: RFM_SYSCLK.RFMPHY_STATUS read PASS, retry_count = %d", i));
1004	break;
1005	}
1006	else {
1007	BDBG_MSG(("BRFM_CRC_BIST: RFM_SYSCLK.RFMPHY_STATUS read ERROR, retry_count = %d", i));
1008
1009	ulVal = BREG_Read32( hRegister, BCHP_RFM_SYSCLK_RFM_PHASEITP_CTL );
1010	ulVal &= ~BCHP_MASK( RFM_SYSCLK_RFM_PHASEITP_CTL, PHASEITP_RESET_VAL );
1011	ulVal \|= BCHP_FIELD_DATA( RFM_SYSCLK_RFM_PHASEITP_CTL, PHASEITP_RESET_VAL, 0x1 );
1012	BREG_Write32( hRegister, BCHP_RFM_SYSCLK_RFM_PHASEITP_CTL, ulVal );
1013	BKNI_Sleep(10);
1014
1015	ulVal &= ~BCHP_MASK( RFM_SYSCLK_RFM_PHASEITP_CTL, PHASEITP_RESET_VAL );
1016	ulVal \|= BCHP_FIELD_DATA( RFM_SYSCLK_RFM_PHASEITP_CTL, PHASEITP_RESET_VAL, 0x0 );
1017	BREG_Write32( hRegister, BCHP_RFM_SYSCLK_RFM_PHASEITP_CTL, ulVal );
1018
1019	BREG_Write32( hRegister, BCHP_RFM_SYSCLK_RESET, 0x0000000f );
1020	BREG_Write32( hRegister, BCHP_RFM_SYSCLK_RESET, 0x00000000 );
1021	}
1022	}
1023
1024	if (i>=MAX_RETRY) {
1025	BDBG_ERR(("RFM CRC built-in self-test has failed"));
1026	retCode = BERR_TIMEOUT;
1027	}
1028	}
1029	#if BRFM_DUAL_DAC
1030	else { /* dual DAC case */
1031	uint32_t ulVal2 = 0;
1032	for (i=0; i<MAX_RETRY; i++) {
1033	BREG_Write32( hRegister, BCHP_RFM_SYSCLK_RFMPHY_BISTCNTL, 0x010103ff ); /* set BIST_EN and BIST_EN_2 */
1034	BKNI_Sleep(10);
1035	ulVal = BREG_Read32( hRegister, BCHP_RFM_SYSCLK_RFMPHY_STATUS );
1036	ulVal2 = BREG_Read32( hRegister, BCHP_RFM_SYSCLK_RFMPHY_DAC2_CRC );
1037	BREG_Write32( hRegister, BCHP_RFM_SYSCLK_RFMPHY_BISTCNTL, 0x000003ff ); /* reset BIST_EN and BIST_EN_2 */
1038	if ((ulVal == 0x8000fcd9) && (ulVal2 == 0x0000fcd9)) {
1039	BDBG_MSG(("BRFM_CRC_BIST: RFM_SYSCLK.RFMPHY_STATUS(dual DAC) read PASS, retry_count = %d", i));
1040	break;
1041	}
1042	else {
1043	BDBG_MSG(("BRFM_CRC_BIST: RFM_SYSCLK.RFMPHY_STATUS(dual DAC) read ERROR, retry_count = %d", i));
1044
1045	ulVal = BREG_Read32( hRegister, BCHP_RFM_SYSCLK_RFM_PHASEITP_CTL );
1046	ulVal &= ~BCHP_MASK( RFM_SYSCLK_RFM_PHASEITP_CTL, PHASEITP_RESET_VAL );
1047	ulVal \|= BCHP_FIELD_DATA( RFM_SYSCLK_RFM_PHASEITP_CTL, PHASEITP_RESET_VAL, 0x1 );
1048	BREG_Write32( hRegister, BCHP_RFM_SYSCLK_RFM_PHASEITP_CTL, ulVal );
1049	BKNI_Sleep(10);
1050
1051	ulVal &= ~BCHP_MASK( RFM_SYSCLK_RFM_PHASEITP_CTL, PHASEITP_RESET_VAL );
1052	ulVal \|= BCHP_FIELD_DATA( RFM_SYSCLK_RFM_PHASEITP_CTL, PHASEITP_RESET_VAL, 0x0 );
1053	BREG_Write32( hRegister, BCHP_RFM_SYSCLK_RFM_PHASEITP_CTL, ulVal );
1054
1055	BREG_Write32( hRegister, BCHP_RFM_SYSCLK_RESET, 0x0000000f );
1056	BREG_Write32( hRegister, BCHP_RFM_BBE_SYSCLK_RESET, 0x00000007 );
1057	BREG_Write32( hRegister, BCHP_RFM_SYSCLK_RESET, 0x00000000 );
1058	BREG_Write32( hRegister, BCHP_RFM_BBE_SYSCLK_RESET, 0x00000000 );
1059	}
1060
1061	if (i>=MAX_RETRY) {
1062	BDBG_ERR(("RFM CRC built-in self-test(dual DAC) has failed"));
1063	retCode = BERR_TIMEOUT;
1064	}
1065	}
1066	}
1067	#endif /* BRFM_DUAL_DAC */
1068	return retCode;
1069
1070	#else /* (BRFM_REVID==40) */
1071	/* CRC BIST is unnecessary */
1072	BSTD_UNUSED(hRegister);
1073	BSTD_UNUSED(enc);
1074	return BERR_SUCCESS;
1075	#endif
1076	}
1077
1078	/*******************************************************************************
1079	*
1080	* Public functions
1081	*
1082	*******************************************************************************/
1083	BERR_Code BRFM_Open(BRFM_Handle phRfm, BCHP_Handle hChip, BREG_Handle hRegister, BINT_Handle hInterrupt, const BRFM_Settings pDefSettings)
1084	{
1085	BERR_Code retCode = BERR_SUCCESS;
1086	BRFM_Handle hDev;
1087	unsigned idx;
1088	bool capable = true;
1089
1090	BDBG_ENTER(BRFM_Open);
1091	/* Sanity check on the handles we've been given */
1092	BDBG_ASSERT(hChip);
1093	BDBG_ASSERT(hRegister);
1094	BDBG_ASSERT(hInterrupt);
1095
1096	/* Alloc memory from the system heap */
1097	hDev = (BRFM_Handle) BKNI_Malloc(sizeof(BRFM_P_Handle));
1098	if (hDev == NULL) {
1099	retCode = BERR_OUT_OF_SYSTEM_MEMORY;
1100	BDBG_ERR(("BRFM_Open: BKNI_malloc() failed\n"));
1101	goto done;
1102	}
1103	BKNI_Memset(hDev, 0x00, sizeof(BRFM_P_Handle));
1104
1105	#if BCHP_CHIP==7552 \|\| BCHP_CHIP==7360 /* do it only for OTP-disableable chips, to silence the BERR_TRACE on other platforms */
1106	retCode = BCHP_GetFeature(hChip, BCHP_Feature_eRfmCapable, &capable);
1107	if (retCode==BERR_SUCCESS && capable==false) {
1108	capable = false;
1109	BDBG_WRN(("BRFM_Open: OTP disabled"));
1110	}
1111	else {
1112	capable = true;
1113	}
1114	#endif
1115
1116	hDev->magicId = DEV_MAGIC_ID;
1117	hDev->hChip = hChip;
1118	hDev->hRegister = hRegister;
1119	hDev->hInterrupt = hInterrupt;
1120	hDev->coreOffset = BCHP_RFM_SYSCLK_CLKCTL;
1121	hDev->settings.volume = pDefSettings->volume;
1122	hDev->settings.audioEncoding = pDefSettings->audioEncoding;
1123	hDev->settings.modType = pDefSettings->modType;
1124	hDev->settings.encType = pDefSettings->encType;
1125	hDev->settings.outputChannel = pDefSettings->chNbr;
1126	hDev->settings.isMuteEnable = false;
1127	hDev->settings.isOutputEnable = false;
1128	hDev->settings.isPowerSaverEnable = false;
1129	hDev->otpDisabled = !capable;
1130
1131	if (hDev->otpDisabled) {
1132	goto done;
1133	}
1134	if (pDefSettings->encType == BRFM_EncoderType_singleBTSC) {
1135	BDBG_MSG(("BRFM_Open:> single BTSC"));
1136	hDev->settings.pModInfo = BRFM_P_GetModInfoPtr(hDev->settings.modType);
1137	}
1138	else if (pDefSettings->encType == BRFM_EncoderType_dualBTSC) {
1139	#if BRFM_DUAL_DAC
1140	BDBG_MSG(("BRFM_Open:> dual BTSC"));
1141	hDev->settings.pModInfo = BRFM_P_GetModInfoPtr_BBE(hDev->settings.modType);
1142	#else
1143	BDBG_ERR(("BRFM_Open: dual BTSC is not supported on this platform"));
1144	retCode = BERR_INVALID_PARAMETER;
1145	goto done;
1146	#endif
1147	}
1148	else {
1149	BDBG_ERR(("BRFM_Open: Invalid encoder type specified"));
1150	retCode = BERR_TRACE(BERR_INVALID_PARAMETER);
1151	goto done;
1152	}
1153
1154	/* Power up in case we were left in a powered down state.
1155	It is not sufficient to just turn on the top-level clock; the CRC BIST will fail */
1156	hDev->settings.isPowerSaverEnable = true; /* force a power-up */
1157	BRFM_P_SetPowerSaverMode(hDev, false);
1158
1159	/* Only enable interrupts after sysclk reset is done; this is already done in PowerUp */
1160	for (idx=0; idx<MAKE_INT_ENUM(Last); idx++) {
1161	CHK_RETCODE(retCode, BINT_CreateCallback(
1162	&(hDev->hCallback[idx]), hDev->hInterrupt, IntId[idx],
1163	BRFM_HandleInterrupt_isr, (void *) hDev, idx));
1164	CHK_RETCODE( retCode, BINT_EnableCallback(hDev->hCallback[idx]));
1165	}
1166	hDev->isCallbackDisable = 0;
1167
1168	BRFM_P_CRC_BIST(hDev->hRegister, pDefSettings->encType);
1169
1170	done:
1171	*phRfm = hDev;
1172	if (retCode != BERR_SUCCESS) {
1173	/* if we get here, we never powered on within BRFM_Open().
1174	therefore, we leave it in whatever power state it was in */
1175	if (hDev != NULL) {
1176	for (idx=0; idx<MAKE_INT_ENUM(Last); idx++) {
1177	if(hDev->hCallback[idx] != NULL) {
1178	BINT_DisableCallback(hDev->hCallback[idx]);
1179	BINT_DestroyCallback(hDev->hCallback[idx]);
1180	}
1181	}
1182	BKNI_Free(hDev);
1183	*phRfm = NULL;
1184	}
1185	}
1186	else if (capable) {
1187	BRFM_P_SetPowerSaverMode(hDev, true);
1188	}
1189
1190	BDBG_MSG(("BRFM_Open:<"));
1191	BDBG_LEAVE(BRFM_Open);
1192	return retCode;
1193	}
1194
1195	BERR_Code BRFM_Close(BRFM_Handle hDev)
1196	{
1197	BERR_Code retCode = BERR_SUCCESS;
1198	unsigned idx;
1199
1200	BDBG_ENTER(BRFM_Close);
1201	BDBG_ASSERT(hDev);
1202	BDBG_ASSERT(hDev->magicId == DEV_MAGIC_ID);
1203	if (hDev->otpDisabled) {
1204	goto free;
1205	}
1206
1207	BRFM_P_SetPowerSaverMode(hDev, false);
1208	/* check top-level clock */
1209	for (idx=0; idx<MAKE_INT_ENUM(Last); idx++) {
1210	CHK_RETCODE(retCode, BINT_DisableCallback(hDev->hCallback[idx]));
1211	CHK_RETCODE(retCode, BINT_DestroyCallback(hDev->hCallback[idx]));
1212	hDev->hCallback[idx] = NULL;
1213	}
1214
1215	/* always power down on close */
1216	BRFM_P_SetPowerSaverMode(hDev, true);
1217	free:
1218	hDev->magicId = 0x00; /* clear it to catch improper use */
1219	BKNI_Free((void *) hDev);
1220
1221	done:
1222	BDBG_LEAVE(BRFM_Close);
1223	return retCode;
1224	}
1225
1226	BERR_Code BRFM_GetDefaultSettings(BRFM_Settings *pDefSettings, BCHP_Handle hChip )
1227	{
1228	BERR_Code retCode = BERR_SUCCESS;
1229
1230	BSTD_UNUSED(hChip);
1231	BDBG_ENTER(BRFM_GetDefaultSettings);
1232
1233	*pDefSettings = defDevSettings;
1234	BDBG_LEAVE(BRFM_GetDefaultSettings);
1235	return retCode;
1236	}
1237
1238	BERR_Code BRFM_EnableRfOutput(BRFM_Handle hDev)
1239	{
1240	BERR_Code retCode = BERR_SUCCESS;
1241
1242	BDBG_ENTER(BRFM_EnableRfOutput);
1243	BDBG_ASSERT(hDev);
1244	BDBG_ASSERT(hDev->magicId == DEV_MAGIC_ID);
1245
1246	if (hDev->otpDisabled) {
1247	goto done;
1248	}
1249
1250	BRFM_P_SetPowerSaverMode(hDev, false);
1251
1252	if (hDev->settings.isOutputEnable == false) {
1253	BDBG_MSG(("BRFM_EnableRfOutput: Enable RF output on hDev(%d)", hDev->settings.encType));
1254	CHK_RETCODE (retCode, BRFM_SetModulationType(hDev,
1255	hDev->settings.modType, hDev->settings.outputChannel));
1256	}
1257
1258	done:
1259	BDBG_LEAVE(BRFM_EnableRfOutput);
1260	return retCode;
1261	}
1262
1263	BERR_Code BRFM_DisableRfOutput(BRFM_Handle hDev)
1264	{
1265	uint32_t ulVal;
1266	BERR_Code retCode = BERR_SUCCESS;
1267
1268	BDBG_ENTER(BRFM_DisableRfOutput);
1269	BDBG_ASSERT(hDev);
1270	BDBG_ASSERT(hDev->magicId == DEV_MAGIC_ID);
1271	if (hDev->otpDisabled) {
1272	goto done;
1273	}
1274
1275	if (hDev->settings.isPowerSaverEnable==true) {
1276	BDBG_MSG(("BRFM_DisableRfOutput: RFM is in power saving mode. Command ignored"));
1277	goto done; /* prevent register R/W while clock is turned off */
1278	}
1279
1280	if (hDev->settings.encType == BRFM_EncoderType_singleBTSC) {
1281	BDBG_MSG(("BRFM_DisableRfOutput: Turning off power to 1st DAC"));
1282	#if (BRFM_REVID<40)
1283	ulVal = BREG_Read32(hDev->hRegister, BCHP_RFM_SYSCLK_DACCTL);
1284	ulVal \|= BCHP_FIELD_DATA(RFM_SYSCLK_DACCTL, DIS_CLK, 1);
1285	BREG_Write32(hDev->hRegister, BCHP_RFM_SYSCLK_DACCTL, ulVal);
1286	#else
1287	ulVal = BREG_Read32(hDev->hRegister, BCHP_RFM_SYSCLK_DACCTL);
1288	ulVal \|= BCHP_FIELD_DATA(RFM_SYSCLK_DACCTL, DAC_PWRDN, 1); /* turn off power to 1st DAC */
1289	BREG_Write32(hDev->hRegister, BCHP_RFM_SYSCLK_DACCTL, ulVal);
1290	#endif
1291	}
1292	else if (hDev->settings.encType == BRFM_EncoderType_dualBTSC) {
1293	#if BRFM_DUAL_DAC
1294	BDBG_WRN(("Disabling RF output on second BTSC encoder. Reverting to single BTSC mode."));
1295	ulVal = BREG_Read32(hDev->hRegister, BCHP_RFM_SYSCLK_DACCTL);
1296	ulVal \|= BCHP_FIELD_DATA(RFM_SYSCLK_DACCTL, DAC_SEL, 0); /* set DAC output mode to differential (ie. single) */
1297	ulVal \|= BCHP_FIELD_DATA(RFM_SYSCLK_DACCTL, DAC_PWRDN_2, 1); /* turn off power to 2nd DAC */
1298	BREG_Write32(hDev->hRegister, BCHP_RFM_SYSCLK_DACCTL, ulVal);
1299	#endif
1300	}
1301
1302	hDev->settings.isOutputEnable = false;
1303	done:
1304	BDBG_LEAVE(BRFM_DisableRfOutput);
1305	return retCode;
1306	}
1307
1308	BERR_Code BRFM_SetAudioVolume(BRFM_Handle hDev, int volume)
1309	{
1310	BERR_Code retCode = BERR_SUCCESS;
1311	uint32_t ulVal = 0;
1312	uint16_t uLeftVal = 0;
1313	uint16_t uRightVal = 0;
1314
1315	BDBG_ENTER(BRFM_SetAudioVolume);
1316	BDBG_ASSERT(hDev);
1317	BDBG_ASSERT(hDev->magicId == DEV_MAGIC_ID);
1318	if (hDev->otpDisabled) {
1319	goto done;
1320	}
1321
1322	/* check for invalid request */
1323	if (hDev->settings.encType == BRFM_EncoderType_dualBTSC)
1324	{
1325	#if (!BRFM_DUAL_DAC)
1326	BDBG_ERR(("BRFM_SetAudioVolume: Second BTSC encoder is not supported on this platform!"));
1327	goto done;
1328	#endif
1329	}
1330
1331	BDBG_MSG(("BRFM_SetAudioVolume: volume %d", volume));
1332	if (volume > BRFM_MAX_VOLUME \|\| volume < BRFM_MIN_VOLUME)
1333	{
1334	retCode = BERR_TRACE(BRFM_ERR_VOLUME_RANGE);
1335	goto done;
1336	}
1337	else
1338	{
1339	if (volume > 12) /* PR40962 */
1340	{
1341	BDBG_WRN(("Poor audio quality may result if setting volume above +12dB"));
1342	BDBG_WRN(("It is recommended that you set the RFM core volume level below +12dB"));
1343	}
1344	switch (hDev->settings.audioEncoding)
1345	{
1346	case BRFM_AudioEncoding_eMono:
1347	case BRFM_AudioEncoding_eStereo:
1348	case BRFM_AudioEncoding_eStereoExtDeviation:
1349	case BRFM_AudioEncoding_eJpMono2:
1350	case BRFM_AudioEncoding_eSap:
1351	case BRFM_AudioEncoding_eJpMono1:
1352	case BRFM_AudioEncoding_eSapMono:
1353	BRFM_P_SetPowerSaverMode(hDev, false);
1354	BRFM_P_CalculateVolume(volume, &uLeftVal, &uRightVal);
1355	if (hDev->settings.encType == BRFM_EncoderType_singleBTSC)
1356	{
1357	ulVal = BREG_Read32(hDev->hRegister, BCHP_RFM_CLK27_VOLUME);
1358	ulVal &= ~BCHP_MASK(RFM_CLK27_VOLUME, LVOL);
1359	ulVal &= ~BCHP_MASK(RFM_CLK27_VOLUME, RVOL);
1360	}
1361	else if (hDev->settings.encType == BRFM_EncoderType_dualBTSC)
1362	{
1363	#if BRFM_DUAL_DAC
1364	ulVal = BREG_Read32(hDev->hRegister, BCHP_RFM_BBE_CLK27_VOLUME);
1365	ulVal &= ~BCHP_MASK(RFM_BBE_CLK27_VOLUME, LVOL);
1366	ulVal &= ~BCHP_MASK(RFM_BBE_CLK27_VOLUME, RVOL);
1367	#endif
1368	}
1369	switch (hDev->settings.audioEncoding)
1370	{
1371	case BRFM_AudioEncoding_eMono:
1372	case BRFM_AudioEncoding_eStereo:
1373	case BRFM_AudioEncoding_eStereoExtDeviation:
1374	case BRFM_AudioEncoding_eJpMono2:
1375	if (hDev->settings.encType == BRFM_EncoderType_singleBTSC)
1376	{
1377	ulVal \|= BCHP_FIELD_DATA(RFM_CLK27_VOLUME, LVOL, (uLeftVal >> 1));
1378	ulVal \|= BCHP_FIELD_DATA(RFM_CLK27_VOLUME, RVOL, (uRightVal >> 1));
1379	}
1380	else if (hDev->settings.encType == BRFM_EncoderType_dualBTSC)
1381	{
1382	#if BRFM_DUAL_DAC
1383	ulVal \|= BCHP_FIELD_DATA(RFM_BBE_CLK27_VOLUME, LVOL, (uLeftVal >> 1));
1384	ulVal \|= BCHP_FIELD_DATA(RFM_BBE_CLK27_VOLUME, RVOL, (uRightVal >> 1));
1385	#endif
1386	}
1387	break;
1388	case BRFM_AudioEncoding_eSap:
1389	if (hDev->settings.encType == BRFM_EncoderType_singleBTSC)
1390	{
1391	ulVal \|= BCHP_FIELD_DATA(RFM_CLK27_VOLUME, RVOL, uLeftVal);
1392	}
1393	else if (hDev->settings.encType == BRFM_EncoderType_dualBTSC)
1394	{
1395	#if BRFM_DUAL_DAC
1396	ulVal \|= BCHP_FIELD_DATA(RFM_BBE_CLK27_VOLUME, RVOL, uLeftVal);
1397	#endif
1398	}
1399	break;
1400	case BRFM_AudioEncoding_eJpMono1:
1401	if (hDev->settings.encType == BRFM_EncoderType_singleBTSC)
1402	{
1403	ulVal \|= BCHP_FIELD_DATA(RFM_CLK27_VOLUME, LVOL, uRightVal);
1404	}
1405	else if (hDev->settings.encType == BRFM_EncoderType_dualBTSC)
1406	{
1407	#if BRFM_DUAL_DAC
1408	ulVal \|= BCHP_FIELD_DATA(RFM_BBE_CLK27_VOLUME, LVOL, uRightVal);
1409	#endif
1410	}
1411	break;
1412	case BRFM_AudioEncoding_eSapMono:
1413	if (hDev->settings.encType == BRFM_EncoderType_singleBTSC)
1414	{
1415	ulVal \|= BCHP_FIELD_DATA(RFM_CLK27_VOLUME, LVOL, uLeftVal);
1416	ulVal \|= BCHP_FIELD_DATA(RFM_CLK27_VOLUME, RVOL, uRightVal);
1417	}
1418	else if (hDev->settings.encType == BRFM_EncoderType_dualBTSC)
1419	{
1420	#if BRFM_DUAL_DAC
1421	ulVal \|= BCHP_FIELD_DATA(RFM_BBE_CLK27_VOLUME, LVOL, uLeftVal);
1422	ulVal \|= BCHP_FIELD_DATA(RFM_BBE_CLK27_VOLUME, RVOL, uRightVal);
1423	#endif
1424	}
1425	break;
1426	default:
1427	break;
1428	}
1429	if (hDev->settings.encType == BRFM_EncoderType_singleBTSC)
1430	BREG_Write32(hDev->hRegister, BCHP_RFM_CLK27_VOLUME, ulVal);
1431	else if (hDev->settings.encType == BRFM_EncoderType_dualBTSC)
1432	{
1433	#if BRFM_DUAL_DAC
1434	BREG_Write32(hDev->hRegister, BCHP_RFM_BBE_CLK27_VOLUME, ulVal);
1435	#endif
1436	}
1437	hDev->settings.volume = volume;
1438	break;
1439
1440	case BRFM_AudioEncoding_eNicamStereo:
1441	case BRFM_AudioEncoding_eNicamDualMono:
1442	case BRFM_AudioEncoding_eNicamMono:
1443	#if (BRFM_REVID>=40)
1444	BRFM_SetNicamVolume(hDev, volume, volume);
1445	break;
1446	#else
1447	BDBG_ERR(("BRFM_SetAudioVolume: NICAM encoder is not supported"));
1448	retCode = BERR_TRACE(BERR_INVALID_PARAMETER);
1449	#endif
1450	default:
1451	BDBG_ASSERT(false);
1452	}
1453	}
1454
1455	done:
1456	BDBG_LEAVE(BRFM_SetAudioVolume);
1457	return retCode;
1458	}
1459
1460	BERR_Code BRFM_SetAudioMute(BRFM_Handle hDev, bool mute)
1461	{
1462	BERR_Code retCode = BERR_SUCCESS;
1463	uint32_t ulVal;
1464
1465	BDBG_ENTER(BRFM_SetAudioMute);
1466	BDBG_ASSERT(hDev);
1467	BDBG_ASSERT(hDev->magicId == DEV_MAGIC_ID);
1468	if (hDev->otpDisabled) {
1469	goto done;
1470	}
1471
1472	/* BRFM_P_SetPowerSaverMode( hDev, false ); / / don't call this */
1473
1474	if (mute==hDev->settings.isMuteEnable) {
1475	goto done;
1476	}
1477
1478	BDBG_MSG(("BRFM_SetAudioMute: mute %d->%d", hDev->settings.isMuteEnable, mute));
1479	if (mute) {
1480	if (hDev->settings.isPowerSaverEnable) {
1481	BDBG_MSG(("BRFM_SetAudioMute: RFM is in power saving mode. Mute command ignored"));
1482	goto done;
1483	}
1484	ulVal = 0;
1485	if (hDev->settings.encType == BRFM_EncoderType_singleBTSC) {
1486	BREG_Write32(hDev->hRegister, BCHP_RFM_CLK27_VOLUME, ulVal);
1487	}
1488	else if (hDev->settings.encType == BRFM_EncoderType_dualBTSC) {
1489	#if BRFM_DUAL_DAC
1490	BREG_Write32( hDev->hRegister, BCHP_RFM_BBE_CLK27_VOLUME, ulVal);
1491	#endif
1492	}
1493	hDev->settings.isMuteEnable = true;
1494	}
1495	else {
1496	if (hDev->settings.isPowerSaverEnable) {
1497	BDBG_MSG(("BRFM_SetAudioMute: RFM is in power saving mode. Unmute command ignored"));
1498	goto done;
1499	}
1500	CHK_RETCODE(retCode, BRFM_SetAudioVolume(hDev, hDev->settings.volume));
1501	hDev->settings.isMuteEnable = false;
1502	}
1503
1504	done:
1505	BDBG_LEAVE(BRFM_SetAudioMute);
1506	return retCode;
1507	}
1508
1509	BERR_Code BRFM_SetAudioEncoding(BRFM_Handle hDev, BRFM_AudioEncoding audioEncoding)
1510	{
1511	BERR_Code retCode = BERR_SUCCESS;
1512	uint32_t ulVal;
1513	uint16_t uEncMode=0;
1514
1515	BDBG_ENTER(BRFM_SetAudioEncoding);
1516	BDBG_ASSERT(hDev);
1517	BDBG_ASSERT(hDev->magicId == DEV_MAGIC_ID);
1518	if (hDev->otpDisabled) {
1519	goto done;
1520	}
1521
1522	BDBG_MSG(("BRFM_SetAudioEncoding: encType %d, audioEncoding %d", hDev->settings.encType, audioEncoding));
1523	switch (audioEncoding)
1524	{
1525	case BRFM_AudioEncoding_eStereo:
1526	case BRFM_AudioEncoding_eStereoExtDeviation:
1527	case BRFM_AudioEncoding_eSap:
1528	case BRFM_AudioEncoding_eSapMono:
1529	case BRFM_AudioEncoding_eJpMono1:
1530	case BRFM_AudioEncoding_eJpMono2:
1531	/* Check for valid mode, don't generate error, just a warning will do,
1532	at the every least, mono audio output will appear on the output */
1533	switch (hDev->settings.modType)
1534	{
1535	case BRFM_ModulationType_eNtscCustom:
1536	case BRFM_ModulationType_eNtscOpenCable:
1537	break;
1538	default:
1539	/* assuming modulation is either PAL or Secam */
1540	BDBG_WRN(("BRFM_SetAudioEncoding: only Mono Audio Encoding for PAL/Secam"));
1541	audioEncoding = BRFM_AudioEncoding_eMono;
1542	break;
1543	}
1544	/* Fall into next statement, not a typo */
1545	case BRFM_AudioEncoding_eMono:
1546	BRFM_P_SetPowerSaverMode(hDev, false);
1547	CHK_RETCODE(retCode, BRSP_ParseRegScript(hDev->hRegister,
1548	hDev->settings.pModInfo->setupScrAudioEncoding[audioEncoding], hDev));
1549	hDev->settings.audioEncoding = audioEncoding;
1550	if (hDev->settings.outputChannel == BRFM_OutputChannel_eBaseband)
1551	{
1552	/* Bypass the FM */
1553	/* Note that BYP_FM is 0x01 only for baseband mode and 0x00 for all other modes. The audio setup scripts, which are called
1554	right above, reset BYP_FM to 0x00, so there's no need to reset it here for non-baseband modes. */
1555	if (hDev->settings.encType == BRFM_EncoderType_singleBTSC)
1556	{
1557	BDBG_MSG(("BRFM_SetAudioEncoding: Bypass first BTSC encoder FM"));
1558	ulVal = BREG_Read32(hDev->hRegister, BCHP_RFM_CLK27_AUDIOBYP);
1559	ulVal \|= BCHP_FIELD_DATA(RFM_CLK27_AUDIOBYP, BYP_FM, 0x01);
1560	BREG_Write32(hDev->hRegister, BCHP_RFM_CLK27_AUDIOBYP, ulVal);
1561	if (audioEncoding == BRFM_AudioEncoding_eStereo \|\| audioEncoding == BRFM_AudioEncoding_eStereoExtDeviation)
1562	{
1563	ulVal = 0x00060001;
1564	BREG_Write32(hDev->hRegister, BCHP_RFM_CLK27_OVRSPCB1, ulVal);
1565	}
1566	}
1567	else if (hDev->settings.encType == BRFM_EncoderType_dualBTSC)
1568	{
1569	#if BRFM_DUAL_DAC
1570	BDBG_MSG(("BRFM_SetAudioEncoding: Bypass second BTSC encoder FM"));
1571	ulVal = BREG_Read32(hDev->hRegister, BCHP_RFM_BBE_CLK27_AUDIOBYP);
1572	ulVal \|= BCHP_FIELD_DATA(RFM_BBE_CLK27_AUDIOBYP, BYP_FM, 0x01);
1573	BREG_Write32( hDev->hRegister, BCHP_RFM_BBE_CLK27_AUDIOBYP, ulVal);
1574	if (audioEncoding == BRFM_AudioEncoding_eStereo \|\| audioEncoding == BRFM_AudioEncoding_eStereoExtDeviation)
1575	{
1576	ulVal = 0x00060001;
1577	BREG_Write32(hDev->hRegister, BCHP_RFM_BBE_CLK27_OVRSPCB1, ulVal);
1578	}
1579	#else
1580	BDBG_ERR(("BRFM_SetAudioEncoding: Second BTSC encoder is not supported on this platform!"));
1581	retCode = BERR_INVALID_PARAMETER;
1582	goto done;
1583	#endif
1584	}
1585	}
1586	CHK_RETCODE(retCode, BRFM_SetAudioMute(hDev, hDev->settings.isMuteEnable));
1587
1588	CHK_RETCODE(retCode, BRFM_SetAudioStandard(hDev, audioEncoding));
1589
1590	goto done;
1591	break;
1592
1593	/* NICAM encoding */
1594	case BRFM_AudioEncoding_eNicamStereo:
1595	uEncMode = 0;
1596	goto configureNicam;
1597	break;
1598
1599	case BRFM_AudioEncoding_eNicamDualMono:
1600	uEncMode = 1;
1601	goto configureNicam;
1602	break;
1603
1604	case BRFM_AudioEncoding_eNicamMono:
1605	uEncMode = 2;
1606	goto configureNicam;
1607	break;
1608
1609	default:
1610	BDBG_ERR(("BRFM_SetAudioEncoding: Invalid audio encoding specified!"));
1611	retCode = BERR_TRACE(BERR_INVALID_PARAMETER);
1612	goto done;
1613	break;
1614	}
1615
1616	configureNicam:
1617
1618	#if (BRFM_REVID>=40)
1619	BDBG_MSG(("BRFM_SetAudioEncoding: NICAM setup, hDev(%d), audioEncoding(%d)", hDev->settings.encType, audioEncoding));
1620	if (hDev->settings.encType == BRFM_EncoderType_dualBTSC)
1621	{
1622	BDBG_ERR(("BRFM_SetAudioEncoding: NICAM audio mode is not supported on second BTSC encoder"));
1623	retCode = BERR_TRACE(BERR_INVALID_PARAMETER);
1624	goto done; /* exit without calling anything */
1625	}
1626
1627	switch (hDev->settings.modType)
1628	{
1629	case BRFM_ModulationType_eNtscCustom:
1630	case BRFM_ModulationType_eNtscOpenCable:
1631	/* NICAM audio encoding only support in PAL/SECAM modes */
1632	BDBG_ERR(("BRFM_SetAudioEncoding: NICAM audio mode is not supported in NTSC format"));
1633	retCode = BERR_TRACE(BERR_INVALID_PARAMETER);
1634	goto done; /* exit without calling anything */
1635	break;
1636
1637	case BRFM_ModulationType_ePalBG:
1638	case BRFM_ModulationType_ePalH:
1639	retCode = BRFM_SetNicamCarrierLevel(hDev, BRFM_NicamCarrierAmpl_eNeg20p0);
1640	break;
1641
1642	case BRFM_ModulationType_ePalD:
1643	case BRFM_ModulationType_ePalDChina:
1644	retCode = BRFM_SetNicamCarrierLevel(hDev, BRFM_NicamCarrierAmpl_eNeg25p0);
1645	break;
1646
1647	case BRFM_ModulationType_ePalI:
1648	retCode = BRFM_SetNicamCarrierLevel(hDev, BRFM_NicamCarrierAmpl_eNeg20p0);
1649	break;
1650	default:
1651	break;
1652	}
1653	if (retCode)
1654	{
1655	goto done;
1656	}
1657
1658	BRFM_P_SetPowerSaverMode(hDev, false);
1659	/* NICAM audio encoding setup scripts should be called only after validating (above) that NICAM is a valid setup */
1660	CHK_RETCODE(retCode, BRSP_ParseRegScript( hDev->hRegister,
1661	hDev->settings.pModInfo->setupScrAudioEncoding[audioEncoding], hDev));
1662	hDev->settings.audioEncoding = audioEncoding;
1663
1664	/* Do not bypass the FM */
1665	ulVal = BREG_Read32(hDev->hRegister, BCHP_RFM_CLK27_AUDIOBYP);
1666	ulVal \|= BCHP_FIELD_DATA(RFM_CLK27_AUDIOBYP, BYP_FM, 0x00);
1667	BREG_Write32(hDev->hRegister, BCHP_RFM_CLK27_AUDIOBYP, ulVal);
1668
1669	CHK_RETCODE(retCode, BRFM_SetAudioMute(hDev, hDev->settings.isMuteEnable));
1670
1671	CHK_RETCODE(retCode, BRFM_SetAudioStandard(hDev, audioEncoding));
1672
1673	/* Set NICAM Encoder Mode (stereo/dual mono/mono) */
1674	ulVal = BREG_Read32(hDev->hRegister,BCHP_RFM_CLK27_NICAM_CTL);
1675	ulVal &= ~(BCHP_MASK(RFM_CLK27_NICAM_CTL, ENC_MODE));
1676	ulVal \|= BCHP_FIELD_DATA(RFM_CLK27_NICAM_CTL, ENC_MODE, uEncMode);
1677	BREG_Write32(hDev->hRegister, BCHP_RFM_CLK27_NICAM_CTL,ulVal);
1678
1679	#else
1680	BDBG_ERR(("BRFM_SetAudioEncoding: NICAM audio encoding mode is not supported"));
1681	retCode = BERR_TRACE(BERR_INVALID_PARAMETER);
1682	#endif
1683	/* TODO: RFM_SYSCLK_RESET.AUDIO_SFT_RST may need to be asserted and deasserted on an audio config change,
1684	similar to a RFM_SYSCLK_RESET that occurs at the end of BRFM_SetModulationType */
1685
1686	done:
1687	BDBG_LEAVE(BRFM_SetAudioEncoding);
1688	return( retCode );
1689	}
1690
1691	BERR_Code BRFM_SetModulationType(BRFM_Handle hDev, BRFM_ModulationType modType, BRFM_OutputChannel chNbr)
1692	{
1693	BERR_Code retCode = BERR_SUCCESS;
1694	const BRFM_P_ModulationInfo *pModInfo;
1695	/* if we change the rf modulation, then do a reset */
1696	#if (BRFM_REVID>=50)
1697	bool reset = !hDev->settings.isOutputEnable \|\| modType!=hDev->settings.modType \|\| chNbr!=hDev->settings.outputChannel;
1698	#endif
1699	BDBG_ENTER(BRFM_SetModulationType);
1700	BDBG_ASSERT(hDev);
1701	BDBG_ASSERT(hDev->magicId == DEV_MAGIC_ID);
1702	if (hDev->otpDisabled) {
1703	goto done;
1704	}
1705
1706	BDBG_MSG(("BRFM_SetModulationType:> encType %d, modType %d, ch %d", hDev->settings.encType, modType, chNbr));
1707	if (hDev->settings.encType == BRFM_EncoderType_singleBTSC) {
1708	pModInfo = BRFM_P_GetModInfoPtr(modType);
1709	}
1710	else if (hDev->settings.encType == BRFM_EncoderType_dualBTSC) {
1711	#if BRFM_DUAL_DAC
1712	pModInfo = BRFM_P_GetModInfoPtr_BBE(modType);
1713	#else
1714	BDBG_ERR(("BRFM_SetModulationType: dual BTSC is not supported on this platform"));
1715	retCode = BERR_INVALID_PARAMETER;
1716	goto done;
1717	#endif
1718	}
1719	else {
1720	BDBG_ERR(("BRFM_SetModulationType: Invalid encoder type specified"));
1721	retCode = BERR_INVALID_PARAMETER;
1722	goto done;
1723	}
1724
1725	if (pModInfo != NULL) {
1726	switch (chNbr) {
1727	case BRFM_OutputChannel_eCh3:
1728	case BRFM_OutputChannel_eCh4:
1729	if (hDev->settings.encType == BRFM_EncoderType_dualBTSC) {
1730	BDBG_WRN(("BRFM_SetModulationType: On second BTSC encoder, only NTSC baseband or SIF mode is supported."));
1731	BDBG_WRN(("BRFM_SetModulationType: Defaulting second BTSC encoder to SIF mode!"));
1732	} /* fall through */
1733	case BRFM_OutputChannel_eBaseband:
1734	if (hDev->settings.outputChannel == BRFM_OutputChannel_eBaseband &&
1735	modType != BRFM_ModulationType_eNtscOpenCable) {
1736	BDBG_WRN(("BRFM_SetModulationType: Baseband mode is only supported with NTSC modulation."));
1737	} /* fall through */
1738	case BRFM_OutputChannel_eSIF:
1739	/* Re-enable any interrupts that was disable to see if the error condition continues */
1740	BRFM_P_SetPowerSaverMode( hDev, false );
1741	CHK_RETCODE(retCode, BRFM_EnableDisabledInterrupt(hDev));
1742	CHK_RETCODE(retCode, BRSP_ParseRegScript(hDev->hRegister, pModInfo->setupScrConfig, hDev));
1743	CHK_RETCODE(retCode, BRSP_ParseRegScript(hDev->hRegister, pModInfo->setupScrCh[chNbr], hDev));
1744	hDev->settings.modType = modType;
1745	hDev->settings.pModInfo = pModInfo;
1746	hDev->settings.outputChannel = chNbr;
1747	CHK_RETCODE(retCode, BRFM_SetAudioEncoding(hDev, hDev->settings.audioEncoding));
1748	hDev->settings.isOutputEnable = true;
1749	BDBG_MSG(("BRFM_SetModulationType:< rfm enabled")); /* regardless of previous state, RFM is enabled at this point */
1750	break;
1751	default:
1752	retCode = BERR_TRACE(BERR_INVALID_PARAMETER);
1753	break;
1754	}
1755	}
1756	else {
1757	retCode = BERR_INVALID_PARAMETER;
1758	}
1759
1760	#if (BRFM_REVID>=50)
1761	/* assert and deassert a reset after a rf modulation change */
1762	if (reset) {
1763	BRFM_P_SysclkReset(hDev);
1764	}
1765	#endif
1766
1767	done:
1768	BDBG_LEAVE(BRFM_SetModulationType);
1769	return retCode;
1770	}
1771
1772	BERR_Code BRFM_EnablePowerSaver(BRFM_Handle hDev)
1773	{
1774	BERR_Code retCode = BERR_SUCCESS;
1775
1776	BDBG_ASSERT(hDev);
1777	BDBG_ASSERT(hDev->magicId == DEV_MAGIC_ID);
1778	BDBG_MSG(("BRFM_EnablePowerSaver:>"));
1779	if (hDev->otpDisabled) {
1780	goto done;
1781	}
1782
1783	#if BRFM_DUAL_DAC
1784	if (hDev->settings.encType==BRFM_EncoderType_dualBTSC) {
1785	BDBG_WRN(("BRFM_EnablePowerSaver: Power saving mode is controlled from first BTSC encoder"));
1786	return retCode;
1787	}
1788	#endif
1789	BRFM_P_SetPowerSaverMode(hDev, true);
1790	done:
1791	BDBG_MSG(("BRFM_EnablePowerSaver:<"));
1792	return retCode;
1793	}
1794
1795	BERR_Code BRFM_Standby(BRFM_Handle hDev)
1796	{
1797	BERR_Code rc = BERR_SUCCESS;
1798	if (hDev->otpDisabled) {
1799	goto done;
1800	}
1801	BRFM_P_SetPowerSaverMode(hDev, true);
1802	done:
1803	return rc;
1804	}
1805
1806	BERR_Code BRFM_Resume(BRFM_Handle hDev)
1807	{
1808	BERR_Code rc = BERR_SUCCESS;
1809	if (hDev->otpDisabled) {
1810	goto done;
1811	}
1812	BRFM_P_SetPowerSaverMode(hDev, false);
1813	done:
1814	return rc;
1815	}
1816
1817	BERR_Code BRFM_GetStatus(BRFM_Handle hDev, BRFM_Status *status)
1818	{
1819	BERR_Code retCode = BERR_SUCCESS;
1820
1821	BDBG_ENTER(BRFM_GetStatus);
1822	BDBG_ASSERT(hDev);
1823	BDBG_ASSERT(hDev->magicId == DEV_MAGIC_ID);
1824	if (hDev->otpDisabled) {
1825	goto done;
1826	}
1827
1828	if (hDev->settings.isPowerSaverEnable) {
1829	BDBG_WRN(("BRFM_GetStatus: RFM is in power saving mode. Command ignored"));
1830	goto done;
1831	}
1832
1833	status->outputChannel = hDev->settings.outputChannel;
1834	status->modType = hDev->settings.modType;
1835	status->audioEncoding = hDev->settings.audioEncoding;
1836	status->isMuteEnable = hDev->settings.isMuteEnable;
1837	status->isOutputEnable = hDev->settings.isOutputEnable;
1838	status->isPowerSaverEnable = hDev->settings.isPowerSaverEnable;
1839	status->volume = hDev->settings.volume;
1840	status->rfmStatusSignals = BREG_Read32(hDev->hRegister, BCHP_RFM_L2_CPU_STATUS);
1841
1842	done:
1843	BDBG_LEAVE(BRFM_GetStatus);
1844	return retCode;
1845	}
1846
1847	BERR_Code BRFM_SetAudioStandard(BRFM_Handle hDev, BRFM_AudioEncoding audioEncoding)
1848	{
1849	BERR_Code mrc = BERR_SUCCESS;
1850	uint32_t ulVal;
1851	if (hDev->otpDisabled) {
1852	goto done;
1853	}
1854
1855	/* check for invalid request */
1856	if (hDev->settings.encType == BRFM_EncoderType_dualBTSC)
1857	{
1858	#if (!BRFM_DUAL_DAC)
1859	BDBG_ERR(("BRFM_SetAudioStandard: Second BTSC encoder is not supported on this platform!"));
1860	goto done;
1861	#endif
1862	}
1863
1864	#if (BRFM_REVID>=40)
1865	switch (audioEncoding)
1866	{
1867	case BRFM_AudioEncoding_eStereo:
1868	case BRFM_AudioEncoding_eStereoExtDeviation:
1869	case BRFM_AudioEncoding_eSap:
1870	case BRFM_AudioEncoding_eSapMono:
1871	case BRFM_AudioEncoding_eJpMono1:
1872	case BRFM_AudioEncoding_eJpMono2:
1873	case BRFM_AudioEncoding_eMono:
1874	switch (hDev->settings.modType)
1875	{
1876	case BRFM_ModulationType_eNtscCustom:
1877	case BRFM_ModulationType_eNtscOpenCable:
1878	if (hDev->settings.encType == BRFM_EncoderType_singleBTSC)
1879	{
1880	ulVal = BREG_Read32(hDev->hRegister, BCHP_RFM_CLK27_AUDIO_STANDARD);
1881	ulVal = 0x0;
1882	BREG_Write32(hDev->hRegister, BCHP_RFM_CLK27_AUDIO_STANDARD, ulVal);
1883	}
1884	else if (hDev->settings.encType == BRFM_EncoderType_dualBTSC)
1885	{
1886	#if BRFM_DUAL_DAC
1887	ulVal = BREG_Read32(hDev->hRegister, BCHP_RFM_BBE_CLK27_AUDIO_STANDARD);
1888	ulVal = 0x0;
1889	BREG_Write32(hDev->hRegister, BCHP_RFM_BBE_CLK27_AUDIO_STANDARD, ulVal);
1890	#endif
1891	}
1892	break;
1893	case BRFM_ModulationType_ePalBG:
1894	case BRFM_ModulationType_ePalH:
1895	case BRFM_ModulationType_ePalD:
1896	case BRFM_ModulationType_ePalDChina:
1897	case BRFM_ModulationType_ePalI:
1898	case BRFM_ModulationType_ePalM:
1899	case BRFM_ModulationType_ePalN:
1900	if (hDev->settings.encType == BRFM_EncoderType_singleBTSC)
1901	{
1902	ulVal = BREG_Read32(hDev->hRegister, BCHP_RFM_CLK27_AUDIO_STANDARD);
1903	ulVal = 0x00008004;
1904	BREG_Write32(hDev->hRegister, BCHP_RFM_CLK27_AUDIO_STANDARD, ulVal);
1905	}
1906	else if (hDev->settings.encType == BRFM_EncoderType_dualBTSC)
1907	{
1908	#if BRFM_DUAL_DAC
1909	ulVal = BREG_Read32(hDev->hRegister, BCHP_RFM_BBE_CLK27_AUDIO_STANDARD);
1910	ulVal = 0x00008004;
1911	BREG_Write32(hDev->hRegister, BCHP_RFM_BBE_CLK27_AUDIO_STANDARD, ulVal);
1912	#endif
1913	}
1914	break;
1915	default:
1916	{
1917	mrc = BERR_TRACE(BERR_INVALID_PARAMETER); /* Invalid modulation type */
1918	break;
1919	}
1920	}
1921	break;
1922
1923	case BRFM_AudioEncoding_eNicamStereo:
1924	case BRFM_AudioEncoding_eNicamDualMono:
1925	case BRFM_AudioEncoding_eNicamMono:
1926
1927	switch (hDev->settings.modType)
1928	{
1929	case BRFM_ModulationType_ePalBG:
1930	case BRFM_ModulationType_ePalH:
1931	case BRFM_ModulationType_ePalD:
1932	case BRFM_ModulationType_ePalDChina:
1933	if (hDev->settings.encType == BRFM_EncoderType_singleBTSC)
1934	{
1935	ulVal = BREG_Read32(hDev->hRegister, BCHP_RFM_CLK27_AUDIO_STANDARD);
1936	ulVal = 0x00008001;
1937	BREG_Write32(hDev->hRegister, BCHP_RFM_CLK27_AUDIO_STANDARD, ulVal);
1938	}
1939	else
1940	{
1941	BDBG_WRN(("NICAM is not supported on second BTSC encoder"));
1942	}
1943	break;
1944	case BRFM_ModulationType_ePalI:
1945	if (hDev->settings.encType == BRFM_EncoderType_singleBTSC)
1946	{
1947	ulVal = BREG_Read32(hDev->hRegister, BCHP_RFM_CLK27_AUDIO_STANDARD);
1948	ulVal = 0x00008081;
1949	BREG_Write32(hDev->hRegister, BCHP_RFM_CLK27_AUDIO_STANDARD, ulVal);
1950	}
1951	else
1952	{
1953	BDBG_WRN(("NICAM is not supported on second BTSC encoder"));
1954	}
1955	break;
1956	default:
1957	{
1958	mrc = BERR_TRACE(BERR_INVALID_PARAMETER); /* Invalid modulation type */
1959	break;
1960	}
1961	}
1962	break;
1963
1964	default:
1965	{
1966	mrc = BERR_TRACE(BERR_INVALID_PARAMETER); /* Invalid audio encoding */
1967	goto done; /* suppress warning messages for not using done */
1968	break;
1969	}
1970	}
1971	#else
1972	BSTD_UNUSED(hDev);
1973	BSTD_UNUSED(audioEncoding);
1974	BSTD_UNUSED(ulVal);
1975	#endif
1976
1977	done:
1978	return mrc;
1979	}
1980
1981	#if (BRFM_REVID>=40)
1982	BERR_Code BRFM_SetNicamCarrierLevel(BRFM_Handle hDev, uint32_t eNicamCarrAmpl)
1983	{
1984	BERR_Code retCode = BERR_SUCCESS;
1985	uint32_t ulVal;
1986	if (hDev->otpDisabled) {
1987	goto done;
1988	}
1989
1990	if (eNicamCarrAmpl < BRFM_NICAM_CARR_AMPL_MIN \|\|
1991	eNicamCarrAmpl > BRFM_NICAM_CARR_AMPL_MAX)
1992	{
1993	BDBG_ERR(("NICAM carrier amplitude out of range"));
1994	retCode = BERR_TRACE(BRFM_ERR_CARR_AMPL_RANGE);
1995	goto done;
1996	}
1997
1998	ulVal = BREG_Read32(hDev->hRegister,BCHP_RFM_CLK27_NICAM_CTL);
1999	ulVal &= ~(BCHP_MASK(RFM_CLK27_NICAM_CTL, OUT_SCL));
2000	ulVal \|= BCHP_FIELD_DATA(RFM_CLK27_NICAM_CTL, OUT_SCL, eNicamCarrAmpl);
2001	BREG_Write32(hDev->hRegister, BCHP_RFM_CLK27_NICAM_CTL,ulVal);
2002
2003	done:
2004	return retCode;
2005	}
2006
2007
2008	BERR_Code BRFM_SetNicamVolume(BRFM_Handle hDev, int volumeDbLeft, int volumeDbRight)
2009	{
2010	BERR_Code retCode = BERR_SUCCESS;
2011	uint32_t ulVal;
2012	uint16_t uLeftVal;
2013	uint16_t uRightVal;
2014	if (hDev->otpDisabled) {
2015	goto done;
2016	}
2017
2018	if (volumeDbLeft > BRFM_MAX_VOLUME_NICAM \|\| volumeDbRight > BRFM_MAX_VOLUME_NICAM) {
2019	retCode = BERR_TRACE(BRFM_ERR_VOLUME_RANGE);
2020	}
2021	else {
2022	if (volumeDbLeft < BRFM_MIN_VOLUME_NICAM) {
2023	uLeftVal = 0;
2024	}
2025	else {
2026	BRFM_P_CalculateNicamVolume(volumeDbLeft, &uLeftVal);
2027	}
2028
2029	if (volumeDbRight < BRFM_MIN_VOLUME_NICAM) {
2030	uRightVal = 0;
2031	}
2032	else {
2033	BRFM_P_CalculateNicamVolume(volumeDbRight, &uRightVal);
2034	}
2035
2036	ulVal = BREG_Read32(hDev->hRegister,BCHP_RFM_CLK27_NICAM_VOLUME);
2037	ulVal &= ~(BCHP_MASK(RFM_CLK27_NICAM_VOLUME, LVOL));
2038	ulVal &= ~(BCHP_MASK(RFM_CLK27_NICAM_VOLUME, RVOL));
2039	ulVal \|= BCHP_FIELD_DATA(RFM_CLK27_NICAM_VOLUME, LVOL, uLeftVal);
2040	ulVal \|= BCHP_FIELD_DATA(RFM_CLK27_NICAM_VOLUME, RVOL, uRightVal);
2041	BREG_Write32(hDev->hRegister, BCHP_RFM_CLK27_NICAM_VOLUME,ulVal);
2042	}
2043
2044	done:
2045	return retCode;
2046	}
2047
2048	#endif
2049
2050	/* End of file */

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source: svn/trunk/newcon3bcm2_21bu/magnum/portinginterface/rfm/7552/brfm.c

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