| 1 | /*************************************************************************** |
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| 2 | * (c)2005-2012 Broadcom Corporation |
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| 3 | * |
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| 4 | * This program is the proprietary software of Broadcom Corporation and/or its licensors, |
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| 5 | * and may only be used, duplicated, modified or distributed pursuant to the terms and |
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| 6 | * conditions of a separate, written license agreement executed between you and Broadcom |
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| 7 | * (an "Authorized License"). Except as set forth in an Authorized License, Broadcom grants |
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| 8 | * no license (express or implied), right to use, or waiver of any kind with respect to the |
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| 9 | * Software, and Broadcom expressly reserves all rights in and to the Software and all |
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| 10 | * intellectual property rights therein. IF YOU HAVE NO AUTHORIZED LICENSE, THEN YOU |
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| 11 | * HAVE NO RIGHT TO USE THIS SOFTWARE IN ANY WAY, AND SHOULD IMMEDIATELY |
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| 12 | * NOTIFY BROADCOM AND DISCONTINUE ALL USE OF THE SOFTWARE. |
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| 13 | * |
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| 14 | * Except as expressly set forth in the Authorized License, |
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| 15 | * |
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| 16 | * 1. This program, including its structure, sequence and organization, constitutes the valuable trade |
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| 17 | * secrets of Broadcom, and you shall use all reasonable efforts to protect the confidentiality thereof, |
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| 18 | * and to use this information only in connection with your use of Broadcom integrated circuit products. |
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| 19 | * |
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| 20 | * 2. TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS" |
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| 21 | * AND WITH ALL FAULTS AND BROADCOM MAKES NO PROMISES, REPRESENTATIONS OR |
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| 22 | * WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH RESPECT TO |
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| 23 | * THE SOFTWARE. BROADCOM SPECIFICALLY DISCLAIMS ANY AND ALL IMPLIED WARRANTIES |
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| 24 | * OF TITLE, MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR PURPOSE, |
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| 25 | * LACK OF VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET POSSESSION |
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| 26 | * OR CORRESPONDENCE TO DESCRIPTION. YOU ASSUME THE ENTIRE RISK ARISING OUT OF |
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| 27 | * USE OR PERFORMANCE OF THE SOFTWARE. |
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| 28 | * |
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| 29 | * 3. TO THE MAXIMUM EXTENT PERMITTED BY LAW, IN NO EVENT SHALL BROADCOM OR ITS |
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| 30 | * LICENSORS BE LIABLE FOR (i) CONSEQUENTIAL, INCIDENTAL, SPECIAL, INDIRECT, OR |
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| 31 | * EXEMPLARY DAMAGES WHATSOEVER ARISING OUT OF OR IN ANY WAY RELATING TO YOUR |
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| 32 | * USE OF OR INABILITY TO USE THE SOFTWARE EVEN IF BROADCOM HAS BEEN ADVISED OF |
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| 33 | * THE POSSIBILITY OF SUCH DAMAGES; OR (ii) ANY AMOUNT IN EXCESS OF THE AMOUNT |
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| 34 | * ACTUALLY PAID FOR THE SOFTWARE ITSELF OR U.S. $1, WHICHEVER IS GREATER. THESE |
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| 35 | * LIMITATIONS SHALL APPLY NOTWITHSTANDING ANY FAILURE OF ESSENTIAL PURPOSE OF |
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| 36 | * ANY LIMITED REMEDY. |
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| 37 | * |
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| 38 | * $brcm_Workfile: btnr_tune.h $ |
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| 39 | * $brcm_Revision: 22 $ |
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| 40 | * $brcm_Date: 3/23/12 2:48p $ |
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| 41 | * |
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| 42 | * [File Description:] |
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| 43 | * |
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| 44 | * Revision History: |
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| 45 | * |
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| 46 | * $brcm_Log: /AP/ctfe/core/tnr/btnr_tune.h $ |
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| 47 | * |
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| 48 | * 22 3/23/12 2:48p farshidf |
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| 49 | * SW3128-125: FW version 4.6 |
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| 50 | * |
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| 51 | * Fw_Integration_Devel/6 3/23/12 2:46p farshidf |
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| 52 | * SW3128-125: FW version 4.6 |
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| 53 | * |
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| 54 | * Fw_Integration_Devel/AP_V4_0_TNR_DEV/1 3/12/12 6:27p farshidf |
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| 55 | * SW3462-6: merge to dev |
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| 56 | * |
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| 57 | * Fw_Integration_Devel/AP_V4_0_TNR_DEV/SW3462-6/1 2/29/12 5:34p farshidf |
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| 58 | * Sw3461-165: clean up |
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| 59 | * |
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| 60 | * Fw_Integration_Devel/5 10/14/11 12:58a farshidf |
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| 61 | * SW3461-64: fix warning |
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| 62 | * |
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| 63 | * 20 10/10/11 3:21p farshidf |
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| 64 | * SW7552-134: compile fix |
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| 65 | * |
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| 66 | * 19 9/16/11 10:06a farshidf |
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| 67 | * SW3461-1: merge to main |
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| 68 | * |
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| 69 | * Fw_Integration_Devel/4 9/16/11 9:57a farshidf |
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| 70 | * SW3461-1: merge to integ |
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| 71 | * |
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| 72 | * Fw_Integration_Devel/AP_V2_0_TNR_DEV/1 9/14/11 5:21p shchang |
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| 73 | * SW3461-1: change frequency plan |
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| 74 | * |
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| 75 | * 18 7/20/11 11:37a farshidf |
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| 76 | * SW7552-60: mereg the latest tuner code |
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| 77 | * |
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| 78 | * Fw_Integration_Devel/2 7/19/11 7:02p farshidf |
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| 79 | * SW3461-28: merge to main |
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| 80 | * |
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| 81 | * Fw_Integration_Devel/Tnr_Fw_Devel_Rc05/3 7/19/11 7:01p farshidf |
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| 82 | * SW3461-28: compile fix |
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| 83 | * |
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| 84 | * Fw_Integration_Devel/1 6/29/11 12:38p farshidf |
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| 85 | * SW3461-13: merge to integ V0.5_rc0 |
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| 86 | * |
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| 87 | * Fw_Integration_Devel/Tnr_Fw_Devel_Rc05/2 6/29/11 12:32p shchang |
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| 88 | * SW3461-1: replace 6-phase with 8-phase mixer |
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| 89 | * |
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| 90 | * Fw_Integration_Devel/Tnr_Fw_Devel_Rc05/1 6/16/11 6:05p shchang |
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| 91 | * SW3461-1: add DPM feature |
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| 92 | * |
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| 93 | * 17 6/9/11 7:03p farshidf |
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| 94 | * SW3461-1: merge to main |
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| 95 | * |
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| 96 | * SW_System_4_Integ_Test/3 6/9/11 7:02p farshidf |
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| 97 | * SW3461-1: changes from Dave |
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| 98 | * |
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| 99 | * 15 5/20/11 6:44a mpovich |
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| 100 | * SW3461-1: rename UFE (BUFE) module to TNR (BTNR). |
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| 101 | * |
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| 102 | * TNR_3461_1/1 5/19/11 5:17p mpovich |
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| 103 | * SW3461-1: Change BUFE module prefix to BTNR |
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| 104 | * |
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| 105 | * 14 3/25/11 6:32p mpovich |
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| 106 | * SW3128-1: Merge latest from TNR branch to main branch. |
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| 107 | * |
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| 108 | * TNR_3461_1/5 3/18/11 4:12p farshidf |
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| 109 | * SW3461-1: merge main |
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| 110 | * |
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| 111 | * 13 3/16/11 10:22a farshidf |
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| 112 | * SW3461-1: merge internal LNA code |
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| 113 | * |
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| 114 | * TNR_3461_1/4 3/16/11 8:13a jputnam |
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| 115 | * SW3461-1: Change default to internal LNA |
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| 116 | * |
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| 117 | * TNR_3461_1/3 3/15/11 5:56p mbsingh |
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| 118 | * SW3461-1: Fixed the frequency tables. Now all frequencies above 143.16 |
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| 119 | * work |
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| 120 | * |
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| 121 | * TNR_3461_1/2 3/14/11 8:16p lukose |
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| 122 | * SW3461-1: fix the freq table |
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| 123 | * |
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| 124 | * TNR_3461_1/1 3/14/11 7:42p lukose |
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| 125 | * SW3461-1: Update freq. table values with correct values |
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| 126 | * |
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| 127 | * 11 3/10/11 5:35p cbrooks |
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| 128 | * sw3461-1: New Code |
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| 129 | * |
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| 130 | * 10 3/9/11 9:02p cbrooks |
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| 131 | * sw3461-1:Added LNA level and RFVGA level to status |
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| 132 | * |
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| 133 | * 9 3/8/11 8:26p cbrooks |
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| 134 | * sw3461-1:new code |
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| 135 | * |
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| 136 | * 7 3/7/11 9:11p cbrooks |
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| 137 | * sw3461-1:New Code |
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| 138 | * |
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| 139 | * 6 3/6/11 6:36p cbrooks |
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| 140 | * sw3461-1:new code |
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| 141 | * |
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| 142 | * 4 3/6/11 5:58p cbrooks |
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| 143 | * SW3461-1:New TNR Code |
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| 144 | * |
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| 145 | * 3 3/2/11 5:28p farshidf |
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| 146 | * SW3461-1: remove the warning |
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| 147 | * |
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| 148 | * 2 3/1/11 12:59p cbrooks |
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| 149 | * sw3461-1:new code |
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| 150 | * |
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| 151 | * 1 2/24/11 11:27a farshidf |
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| 152 | * SW3461-1: add the initial Tuner code from Dave |
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| 153 | * |
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| 154 | ***************************************************************************/ |
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| 155 | |
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| 156 | #ifndef _BTNR_TUNE_H__ |
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| 157 | #define _BTNR_TUNE_H__ |
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| 158 | |
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| 159 | #ifdef __cplusplus |
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| 160 | extern "C" { |
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| 161 | #endif |
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| 162 | |
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| 163 | #define BTNR_ENABLE_HW_AUTO_TUNE 0 /*Enable Software Cap Select*/ |
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| 164 | #define BTNR_ENABLE_SDADC_CAL 0 /*Enable SDADC Calibration*/ |
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| 165 | |
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| 166 | |
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| 167 | #define REF_PLL_LOCK_TIMEOUT_MS 1 /*Ref PLL Lock timeout in ms [0 255]*/ |
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| 168 | #define PHY_PLL_LOCK_TIMEOUT_MS 1 /*Phy PLL Lock timeout in ms*[0 255]*/ |
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| 169 | |
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| 170 | #define MAX_LPF_VARIABLE_BW 10000000 |
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| 171 | #define MIN_LPF_VARIABLE_BW 1000000 |
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| 172 | |
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| 173 | /*Initial Values for the BTNR_Internal_Params structure*/ |
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| 174 | /*Warning!! these can be overwritten by BBS*/ |
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| 175 | #define INIT_BBS_LNA_ENABLE BTNR_Internal_Params_eEnable /*BTNR_Internal_Params_eDisable or BTNR_Internal_Params_eEnable*/ |
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| 176 | #define INIT_BBS_SDADC_INPUT BTNR_Internal_Params_SDADC_Input_eTuner /*BTNR_Internal_Params_SDADC_Input_eTuner, BTNR_Internal_Params_SDADC_Input_eTuner_wTestOut, |
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| 177 | BTNR_Internal_Params_SDADC_Input_eExtReal or BTNR_Internal_Params_SDADC_Input_eExtIQ*/ |
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| 178 | #define INIT_BBS_RFFIL_SELECT BTNR_Internal_Params_TunerRFFIL_eMOCATRAP /*BTNR_Internal_Params_TunerRFFIL_eMOCATRAP or |
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| 179 | BTNR_Internal_Params_TunerRFFIL_eTRKFIL,*/ |
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| 180 | #define INIT_BBS_HRC_ENABLE BTNR_Internal_Params_eDisable /*BTNR_Internal_Params_eDisable or BTNR_Internal_Params_eEnable*/ |
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| 181 | #define INIT_BBS_IF_FREQ 0 /*uint32_t*/ |
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| 182 | /******************************************************************************************************* |
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| 183 | * declare table for LPF parameters ********************* |
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| 184 | ********************************************************************************************************/ |
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| 185 | |
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| 186 | /*This table is in 100 KHz resolution*/ |
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| 187 | /*The BTNR_P_TunerSetRFFIL() function assumes this is 105 elements*/ |
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| 188 | #define LPF_TABLE_SIZE 71 |
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| 189 | static const uint16_t LPF_Selection_Table[LPF_TABLE_SIZE] = |
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| 190 | { |
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| 191 | 33, 35, 37, 38, 41, 42, 45, 47, 50, 52, 55, |
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| 192 | 34, 35, 36, 37, 38, 39, 40, 42, 43, 45, 47, 49, 51, 53, 54, 55, 57, 58, 61, 63, |
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| 193 | 30, 30, 31, 32, 33, 33, 33, 34, 34, 34, 35, 35, 36, 37, 38, 39, 40, 41, 42, 42, |
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| 194 | 43, 44, 44, 44, 44, 45, 46, 46, 46, 46, 48, 49, 50, 51, 51, 54, 54, 58, 58, 62 |
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| 195 | }; |
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| 196 | |
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| 197 | /******************************************************************************************************* |
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| 198 | *declare table to get FGA_RC parameters, both fixed value and variable |
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| 199 | ********************************************************************************************************/ |
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| 200 | #define FGA_RC_CTRL_LOWG_8MHz 0xA7 /*[0 255]*/ |
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| 201 | #define FGA_RC_CTRL_HIGHG_8MHz 0xC9 /*[0 255]*/ |
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| 202 | #define IFLPF_BW_SEL_8MHz 0x13 /*[0 63]*/ |
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| 203 | #define IFLPF_WBW_SEL_8MHz 0 /*0 normal: 1 wideband*/ |
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| 204 | |
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| 205 | #define FGA_RC_CTRL_LOWG_7MHz 0x96 |
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| 206 | #define FGA_RC_CTRL_HIGHG_7MHz 0xBD |
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| 207 | #define IFLPF_BW_SEL_7MHz 0x0F |
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| 208 | #define IFLPF_WBW_SEL_7MHz 0 |
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| 209 | |
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| 210 | #define FGA_RC_CTRL_LOWG_6MHz 0x7F |
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| 211 | #define FGA_RC_CTRL_HIGHG_6MHz 0xAD |
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| 212 | #define IFLPF_BW_SEL_6MHz 0x0C |
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| 213 | #define IFLPF_WBW_SEL_6MHz 0 |
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| 214 | |
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| 215 | #define FGA_RC_CTRL_LOWG_5MHz 0x62 |
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| 216 | #define FGA_RC_CTRL_HIGHG_5MHz 0x97 |
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| 217 | #define IFLPF_BW_SEL_5MHz 0x09 |
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| 218 | #define IFLPF_WBW_SEL_5MHz 0 |
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| 219 | |
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| 220 | #define FGA_RC_CTRL_LOWG_1_7MHz 0x00 |
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| 221 | #define FGA_RC_CTRL_HIGHG_1_7MHz 0x00 |
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| 222 | #define IFLPF_BW_SEL_1_7MHz 0x00 |
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| 223 | #define IFLPF_WBW_SEL_1_7MHz 0 |
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| 224 | |
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| 225 | |
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| 226 | #define FGA_RC_Table_Size 2 |
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| 227 | #define FGA_RC_Num_Tables 11 |
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| 228 | typedef struct FGA_RC_Selection_Elements_s |
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| 229 | { |
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| 230 | uint8_t FGA_RC_CNTL; |
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| 231 | }FGA_RC_Selection_Elements_t; |
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| 232 | |
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| 233 | /* declare table to get FGA_RC parameters */ |
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| 234 | static const FGA_RC_Selection_Elements_t FGA_RC_Selection_Table[FGA_RC_Num_Tables][FGA_RC_Table_Size] = |
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| 235 | { |
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| 236 | {{0},{0}}, /* <2MHz */ |
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| 237 | {{0},{84}}, /* 2MHz */ |
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| 238 | {{95},{150}}, /* 3MHz */ |
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| 239 | {{143},{184}}, /* 4MHz */ |
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| 240 | {{171},{205}}, /* 5MHz */ |
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| 241 | {{190},{217}}, /* 6MHz */ |
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| 242 | {{203},{227}}, /* 7MHz */ |
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| 243 | {{214},{235}}, /* 8MHz */ |
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| 244 | {{221},{240}}, /* 9MHz */ |
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| 245 | {{228},{245}}, /* 10MHz */ |
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| 246 | {{255},{255}} /* >10MHz */ |
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| 247 | }; |
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| 248 | |
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| 249 | |
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| 250 | /******************************************************************************************************* |
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| 251 | *declare tables for tuner LO and DDFS |
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| 252 | ********************************************************************************************************/ |
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| 253 | |
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| 254 | /*The BTNR_P_TunerSetFreq() function assumes this is 14 elements*/ |
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| 255 | #define BTNR_TUNER_LO_TABLE_SIZE 14 |
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| 256 | static const uint32_t Tuner_LO_Freq_Table[BTNR_TUNER_LO_TABLE_SIZE] = |
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| 257 | { |
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| 258 | 44790000UL, |
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| 259 | 67180000UL, |
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| 260 | 89580000UL, |
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| 261 | 91110000UL, |
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| 262 | 119440000UL, |
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| 263 | 143160000UL, |
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| 264 | 179160000UL, |
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| 265 | 200400000UL, |
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| 266 | 238880000UL, |
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| 267 | 334020000UL, |
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| 268 | 358330000UL, |
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| 269 | 537500000UL, |
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| 270 | 716660000UL, |
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| 271 | 1075000000UL |
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| 272 | }; |
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| 273 | |
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| 274 | /* tunerLoDivider used in FCW calculation |
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| 275 | * fb_divn = TNR_AFE_TNR0_03[22:15] |
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| 276 | * i_MXR_SR6p8p12p16p = TNR_AFE_TNR0_MXR_01[15:14] |
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| 277 | * i_MIXER_sel_div_ratio = TNR_AFE_TNR0_MXR_01[13:12] |
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| 278 | * i_MIXER_sel = TNR_AFE_TNR0_MXR_01[5:4] |
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| 279 | * i_MIXER_HRM_mode = TNR_AFE_TNR0_MXR_01[2] |
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| 280 | * i_MIXER_sel_MUX0p6p8p = TNR_AFE_TNR0_MXR_01[1:0] |
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| 281 | * lP_fbdivn_1p0 = TNR_AFE_TNR0_MXRPLL_03[22:15] |
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| 282 | * lP_div23_sel_1p0 = TNR_AFE_TNR0_MXRPLL_03[14]*/ |
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| 283 | |
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| 284 | typedef struct Tuner_LO_Tables_s |
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| 285 | { |
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| 286 | uint8_t M_Factor ; |
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| 287 | uint8_t i_MXR_SR6p8p12p16p ; |
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| 288 | uint8_t i_MIXER_sel_div_ratio ; |
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| 289 | uint8_t i_MIXER_sel ; |
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| 290 | uint8_t i_MIXER_HRM_mode ; |
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| 291 | uint8_t i_MIXER_sel_MUX0p6p8p ; |
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| 292 | uint8_t lP_fbdivn_1p0 ; |
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| 293 | uint8_t lP_div23_sel_1p0 ; |
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| 294 | }Tuner_VCO_Tables_t; |
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| 295 | |
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| 296 | |
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| 297 | static const Tuner_VCO_Tables_t Tuner_LO_Table[BTNR_TUNER_LO_TABLE_SIZE] = |
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| 298 | |
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| 299 | { |
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| 300 | {0x40, 0x3, 0x2, 0x3, 1, 0x0, 0x10, 1}, /* 44790000UL*/ |
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| 301 | {0x40, 0x3, 0x2, 0x3, 1, 0x0, 0x18, 0}, /* 67180000UL*/ |
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| 302 | {0x20, 0x3, 0x1, 0x3, 1, 0x0, 0x10, 1}, /* 89580000UL*/ |
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| 303 | {0x20, 0x3, 0x1, 0x3, 1, 0x0, 0x18, 0}, /* 91110000UL*/ |
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| 304 | {0x18, 0x2, 0x1, 0x2, 1, 0x0, 0x10, 1}, /* 119440000UL*/ |
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| 305 | {0x18, 0x2, 0x1, 0x2, 1, 0x0, 0x18, 0}, /* 143160000UL*/ |
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| 306 | {0x10, 0x1, 0x1, 0x1, 1, 0x3, 0x10, 1}, /* 179160000UL*/ |
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| 307 | {0x10, 0x1, 0x1, 0x1, 1, 0x3, 0x18, 0}, /* 200400000UL*/ |
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| 308 | {0x0C, 0x0, 0x1, 0x1, 1, 0x2, 0x10, 1}, /* 238880000UL*/ |
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| 309 | {0x0C, 0x0, 0x1, 0x1, 1, 0x2, 0x18, 0}, /* 334020000UL*/ |
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| 310 | {0x08, 0x0, 0x3, 0x1, 0, 0x1, 0x10, 1}, /* 358330000UL*/ |
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| 311 | {0x08, 0x0, 0x3, 0x1, 0, 0x1, 0x18, 0}, /* 537500000UL*/ |
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| 312 | {0x04, 0x0, 0x2, 0x1, 0, 0x1, 0x10, 1}, /* 716660000UL*/ |
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| 313 | {0x04, 0x0, 0x2, 0x1, 0, 0x1, 0x18, 0} /*1075000000UL*/ |
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| 314 | }; |
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| 315 | |
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| 316 | /******************************************************************************************************* |
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| 317 | *declare tables for DPM LO and DDFS |
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| 318 | ********************************************************************************************************/ |
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| 319 | |
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| 320 | /*The BTNR_P_TunerSetFreq() function assumes this is 12 elements*/ |
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| 321 | #define BTNR_DPM_LO_TABLE_SIZE 12 |
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| 322 | static const uint32_t DPM_LO_Freq_Table[BTNR_DPM_LO_TABLE_SIZE] = |
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| 323 | { |
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| 324 | 44790000UL, |
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| 325 | 67180000UL, |
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| 326 | 89580000UL, |
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| 327 | 134400000UL, |
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| 328 | 179160000UL, |
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| 329 | 268800000UL, |
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| 330 | 358330000UL, |
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| 331 | 537500000UL, |
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| 332 | 716660000UL, |
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| 333 | 1075000000UL, |
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| 334 | 1433000000UL, |
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| 335 | 2150000000UL |
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| 336 | }; |
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| 337 | |
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| 338 | /* tunerLoDivider used in FCW calculation |
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| 339 | * fb_divn = TNR_AFE_TNR0_03[22:15] |
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| 340 | * i_MXR_SR6p8p12p16p = TNR_AFE_TNR0_MXR_01[15:14] |
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| 341 | * i_MIXER_sel_div_ratio = TNR_AFE_TNR0_MXR_01[13:12] |
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| 342 | * i_MIXER_sel = TNR_AFE_TNR0_MXR_01[5:4] |
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| 343 | * i_MIXER_HRM_mode = TNR_AFE_TNR0_MXR_01[2] |
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| 344 | * i_MIXER_sel_MUX0p6p8p = TNR_AFE_TNR0_MXR_01[1:0] |
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| 345 | * lP_fbdivn_1p0 = TNR_AFE_TNR0_MXRPLL_03[22:15] |
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| 346 | * lP_div23_sel_1p0 = TNR_AFE_TNR0_MXRPLL_03[14] |
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| 347 | * logen_PreSel = TNR_AFE_TNR0_DPM_01[22:20] |
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| 348 | * logen_two = TNR_AFE_TNR0_DPM_01[6] |
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| 349 | * logen_six = TNR_AFE_TNR0_DPM_01[4]*/ |
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| 350 | |
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| 351 | typedef struct DPM_LO_Tables_s |
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| 352 | { |
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| 353 | uint8_t M_Factor ; |
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| 354 | uint8_t i_MXR_SR6p8p12p16p ; |
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| 355 | uint8_t i_MIXER_sel_div_ratio ; |
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| 356 | uint8_t i_MIXER_sel ; |
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| 357 | uint8_t i_MIXER_HRM_mode ; |
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| 358 | uint8_t i_MIXER_sel_MUX0p6p8p ; |
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| 359 | uint8_t lP_fbdivn_1p0 ; |
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| 360 | uint8_t lP_div23_sel_1p0 ; |
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| 361 | }DPM_VCO_Tables_t; |
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| 362 | |
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| 363 | |
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| 364 | static const DPM_VCO_Tables_t DPM_LO_Table[BTNR_DPM_LO_TABLE_SIZE] = |
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| 365 | |
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| 366 | { |
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| 367 | {0x40, 0x3, 0x2, 0x3, 1, 0x0, 0x10, 1}, /* 44790000UL*/ |
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| 368 | {0x40, 0x3, 0x2, 0x3, 1, 0x0, 0x18, 0}, /* 67180000UL*/ |
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| 369 | {0x20, 0x3, 0x1, 0x3, 1, 0x0, 0x10, 1}, /* 89580000UL*/ |
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| 370 | {0x20, 0x2, 0x1, 0x2, 1, 0x0, 0x18, 0}, /* 134400000UL*/ |
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| 371 | {0x10, 0x1, 0x1, 0x1, 1, 0x3, 0x10, 1}, /* 179160000UL*/ |
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| 372 | {0x10, 0x1, 0x1, 0x1, 1, 0x3, 0x18, 0}, /* 268800000UL*/ |
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| 373 | {0x0C, 0x0, 0x1, 0x1, 1, 0x2, 0x18, 0}, /* 358800000UL*/ |
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| 374 | {0x08, 0x0, 0x3, 0x1, 0, 0x1, 0x18, 0}, /* 537500000UL*/ |
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| 375 | {0x06, 0x0, 0x0, 0x1, 1, 0x2, 0x18, 0}, /* 716660000UL*/ |
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| 376 | {0x04, 0x0, 0x2, 0x1, 0, 0x1, 0x18, 0}, /*1075000000UL*/ |
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| 377 | {0x02, 0x0, 0x1, 0x1, 0, 0x1, 0x10, 1}, /*1433000000UL*/ |
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| 378 | {0x02, 0x0, 0x1, 0x1, 0, 0x1, 0x18, 0}, /*2150000000UL*/ |
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| 379 | }; |
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| 380 | /******************************************************************************************************* |
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| 381 | *declare tables for DPM |
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| 382 | ********************************************************************************************************/ |
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| 383 | |
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| 384 | /*The BTNR_P_TunerSetFreq() function assumes this is 12 elements*/ |
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| 385 | #define BTNR_DPM_TABLE_SIZE 12 |
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| 386 | static const uint32_t DPM_Freq_Table[BTNR_DPM_TABLE_SIZE] = |
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| 387 | { |
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| 388 | 44790000UL, |
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| 389 | 67180000UL, |
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| 390 | 89580000UL, |
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| 391 | 134400000UL, |
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| 392 | 179160000UL, |
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| 393 | 268800000UL, |
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| 394 | 358330000UL, |
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| 395 | 537500000UL, |
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| 396 | 716660000UL, |
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| 397 | 1075000000UL, |
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| 398 | 1433000000UL, |
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| 399 | 2150000000UL |
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| 400 | }; |
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| 401 | |
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| 402 | /* logen_PreSel = TNR_AFE_TNR0_DPM_01[22:20] |
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| 403 | * logen_two = TNR_AFE_TNR0_DPM_01[6] |
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| 404 | * logen_six = TNR_AFE_TNR0_DPM_01[4]*/ |
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| 405 | |
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| 406 | typedef struct DPM_Tables_s |
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| 407 | { |
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| 408 | uint8_t logen_PreSel ; |
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| 409 | uint8_t logen_two ; |
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| 410 | uint8_t logen_six ; |
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| 411 | }DPM_Tables_t; |
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| 412 | |
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| 413 | |
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| 414 | static const DPM_Tables_t DPM_Table[BTNR_DPM_TABLE_SIZE] = |
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| 415 | |
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| 416 | { |
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| 417 | {0x3, 0x0, 0x0}, /* 44790000UL*/ |
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| 418 | {0x3, 0x0, 0x0}, /* 67180000UL*/ |
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| 419 | {0x2, 0x0, 0x0}, /* 89580000UL*/ |
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| 420 | {0x2, 0x0, 0x0}, /* 134400000UL*/ |
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| 421 | {0x1, 0x0, 0x0}, /* 179160000UL*/ |
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| 422 | {0x1, 0x0, 0x0}, /* 268800000UL*/ |
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| 423 | {0x4, 0x0, 0x0}, /* 358800000UL*/ |
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| 424 | {0x0, 0x0, 0x0}, /* 537500000UL*/ |
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| 425 | {0x0, 0x0, 0x1}, /* 716660000UL*/ |
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| 426 | {0x1, 0x1, 0x0}, /*1075000000UL*/ |
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| 427 | {0x0, 0x1, 0x0}, /*1433000000UL*/ |
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| 428 | {0x0, 0x1, 0x0}, /*2150000000UL*/ |
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| 429 | }; |
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| 430 | |
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| 431 | /***************************************************************************** |
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| 432 | * TNR Function Prototypes Used by PI or Local |
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| 433 | *****************************************************************************/ |
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| 434 | BERR_Code BTNR_P_Tuner_Power_Control(BTNR_3x7x_Handle h); |
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| 435 | BERR_Code BTNR_P_TunerStatusReset(BTNR_3x7x_Handle h); |
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| 436 | BERR_Code BTNR_P_TunerStatus(BTNR_3x7x_Handle h); |
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| 437 | BERR_Code BTNR_P_TunerInit(BTNR_3x7x_Handle h); |
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| 438 | BERR_Code BTNR_P_TunerTune(BTNR_3x7x_Handle h); |
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| 439 | BERR_Code BTNR_P_DPM_Control(BTNR_3x7x_Handle h); |
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| 440 | BERR_Code BTNR_P_LoopThru_Control(BTNR_3x7x_Handle h); |
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| 441 | BERR_Code BTNR_P_Daisy_Control(BTNR_3x7x_Handle h); |
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| 442 | |
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| 443 | |
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| 444 | /***************************************************************************** |
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| 445 | * TNR Function Prototypes Used Local |
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| 446 | *****************************************************************************/ |
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| 447 | |
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| 448 | void BTNR_P_TunerSetRFFIL(BTNR_3x7x_Handle h); |
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| 449 | void BTNR_P_TunerSetFGA_IFLPF(BTNR_3x7x_Handle h); |
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| 450 | void BTNR_P_TunerSetFreq(BTNR_3x7x_Handle h); |
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| 451 | void BTNR_P_TunerSearchCap(BTNR_3x7x_Handle h); |
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| 452 | void BTNR_P_TunerSetADC6B(BTNR_3x7x_Handle h); |
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| 453 | void BTNR_P_TunerSetLNAAGC(BTNR_3x7x_Handle h); |
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| 454 | void BTNR_P_TunerSetRFAGC(BTNR_3x7x_Handle h); |
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| 455 | void BTNR_P_TunerSetDCO(BTNR_3x7x_Handle h); |
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| 456 | void BTNR_P_CalFlashSDADC(BTNR_3x7x_Handle h); |
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| 457 | void BTNR_P_DPMSetFreq(BTNR_3x7x_Handle h); |
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| 458 | void BTNR_P_TunerBypassRFAGC(BTNR_3x7x_Handle h); |
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| 459 | BERR_Code BTNR_P_LNAAGCCycle(BTNR_3x7x_Handle h); |
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| 460 | BERR_Code BTNR_P_Tuner_PowerUpPLL(BTNR_3x7x_Handle h); |
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| 461 | |
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| 462 | #ifdef BTNR_ENABLE_SOFTWARE_TUNE |
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| 463 | BERR_Code BTNR_P_TunerSearchCap(BTNR_3x7x_Handle h); |
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| 464 | BERR_Code BTNR_P_TunerSetCapCntlLoopParams(BTNR_3x7x_Handle h); |
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| 465 | BERR_Code BTNR_P_TunerSetCapCntl(BTNR_3x7x_Handle h); |
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| 466 | #endif |
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| 467 | |
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| 468 | #ifdef __cplusplus |
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| 469 | } |
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| 470 | #endif |
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| 471 | |
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| 472 | #endif /* _BTNR_TUNE_H__ */ |
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| 473 | |
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| 474 | |
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