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bvbi_ccd.c

Last change on this file was 2, checked in by jglee, 11 years ago
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1	/***************************************************************************
2	* Copyright (c) 2003-2009, Broadcom Corporation
3	* All Rights Reserved
4	* Confidential Property of Broadcom Corporation
5	*
6	* THIS SOFTWARE MAY ONLY BE USED SUBJECT TO AN EXECUTED SOFTWARE LICENSE
7	* AGREEMENT BETWEEN THE USER AND BROADCOM. YOU HAVE NO RIGHT TO USE OR
8	* EXPLOIT THIS MATERIAL EXCEPT SUBJECT TO THE TERMS OF SUCH AN AGREEMENT.
9	*
10	* $brcm_Workfile: bvbi_ccd.c $
11	* $brcm_Revision: Hydra_Software_Devel/2 $
12	* $brcm_Date: 12/21/09 7:04p $
13	*
14	* Module Description:
15	*
16	* Revision History:
17	*
18	* $brcm_Log: /magnum/portinginterface/vbi/7400/bvbi_ccd.c $
19	*
20	* Hydra_Software_Devel/2 12/21/09 7:04p darnstein
21	* SW7550-120: Add support for SECAM variants.
22	*
23	* Hydra_Software_Devel/1 12/3/08 8:00p darnstein
24	* PR45819:
25	*
26	***************************************************************************/
27
28	#include "bstd.h" /* standard types */
29	#include "bdbg.h" /* Dbglib */
30	#include "bkni.h" /* For critical sections */
31	#include "bvbi.h" /* VBI processing, this module. */
32	#include "bvbi_priv.h" /* VBI internal data structures */
33
34	#if (BVBI_P_NUM_VDEC >= 1)
35	#include "bchp_ccd_0.h" /* RDB info for CCD core */
36	#if (BVBI_P_NUM_VDEC >= 2)
37	#include "bchp_ccd_1.h" /* RDB info for CCD core */
38	#endif
39	#endif
40
41	BDBG_MODULE(BVBI);
42
43	/***************************************************************************
44	* Forward declarations of static (private) functions
45	***************************************************************************/
46
47	#if (BVBI_P_NUM_VDEC >= 1) / { /
48	static void BVBI_P_CC_Dec_Get_Word0 (
49	BREG_Handle hReg, uint32_t ulWord0_Base,
50	uint8_t ucRegNum, uint16_t *pusWord0 );
51	static void BVBI_P_CC_Dec_Get_Word1 (
52	BREG_Handle hReg, uint32_t ulWord0_Base,
53	uint8_t ucRegNum, uint16_t *pusWord1 );
54	static void BVBI_P_CC_Dec_Init (BREG_Handle hReg, uint32_t ulCoreOffset);
55	static BERR_Code BVBI_P_CC_Validate_Word ( uint16_t usWord );
56	#endif / } (BVBI_P_NUM_VDEC >= 1) /
57
58
59	/***************************************************************************
60	* Some private extensions to the RDB
61	***************************************************************************/
62	#define BCHP_CCD_0_Top_STATUS_ACKNOWLEDGE_DATA 0
63	#define BCHP_CCD_0_Bottom_STATUS_ACKNOWLEDGE_DATA 0
64
65
66	/***************************************************************************
67	* Implementation supporting closed caption functions that are not in API
68	***************************************************************************/
69
70	#if (BVBI_P_NUM_VDEC >= 1) / { /
71	/***************************************************************************
72	*
73	*/
74	void BVBI_P_CC_Dec_Init (BREG_Handle hReg, uint32_t ulCoreOffset)
75	{
76	uint32_t ulReg = 0x0;
77
78	BDBG_ENTER(BVBI_P_CC_Dec_Init);
79
80	BKNI_EnterCriticalSection();
81
82	BREG_Write32 (hReg, BCHP_CCD_0_Reset + ulCoreOffset, ulReg);
83
84	BKNI_LeaveCriticalSection();
85
86	BDBG_LEAVE(BVBI_P_CC_Dec_Init);
87	}
88
89	#if (BVBI_P_NUM_VDEC >= 1) / { /
90	BERR_Code BVBI_P_CC_Dec_Program (
91	BREG_Handle hReg,
92	BAVC_SourceId eSource,
93	bool bActive,
94	BFMT_VideoFmt eVideoFormat)
95	{
96	uint32_t H_Control;
97	uint32_t H_Status;
98	uint32_t H_Top;
99	uint32_t H_Bottom;
100	uint32_t H_Lock;
101	uint32_t ulControlReg;
102	uint32_t ulStatusReg;
103	uint32_t ulTopReg;
104	uint32_t ulLockReg;
105	uint32_t ulBottomReg;
106	uint16_t usTopActiveLine;
107	uint16_t usBottomActiveLine;
108	uint32_t ulCoreOffset;
109	int index;
110
111	BDBG_ENTER(BVBI_P_CC_Dec_Program);
112
113	/* Figure out which decoder core to use */
114	switch (eSource)
115	{
116	case BAVC_SourceId_eVdec0:
117	H_Control = BCHP_CCD_0_Control;
118	H_Status = BCHP_CCD_0_Status;
119	H_Top = BCHP_CCD_0_Top;
120	H_Bottom = BCHP_CCD_0_Bottom;
121	H_Lock = BCHP_CCD_0_Lock;
122	ulCoreOffset = 0x0;
123	index = 0;
124	break;
125	#if (BVBI_P_NUM_VDEC >= 2)
126	case BAVC_SourceId_eVdec1:
127	H_Control = BCHP_CCD_1_Control;
128	H_Status = BCHP_CCD_1_Status;
129	H_Top = BCHP_CCD_1_Top;
130	H_Bottom = BCHP_CCD_1_Bottom;
131	H_Lock = BCHP_CCD_1_Lock;
132	ulCoreOffset = BCHP_CCD_1_RevID - BCHP_CCD_0_RevID;
133	index = 1;
134	break;
135	#endif
136	default:
137	/* This should never happen! This parameter was checked by
138	BVBI_Decode_Create() */
139	BDBG_LEAVE(BVBI_P_CC_Dec_Program);
140	return BERR_TRACE(BERR_INVALID_PARAMETER);
141	break;
142	}
143
144	/* If user wants to turn off closed caption processing, just reset the
145	entire core. */
146	if (!bActive)
147	{
148	BVBI_P_CC_Dec_Init (hReg, ulCoreOffset);
149	BDBG_LEAVE(BVBI_P_CC_Dec_Program);
150	return BERR_SUCCESS;
151	}
152
153	BKNI_EnterCriticalSection();
154
155	/* get and set fields in the CCD control register */
156	ulControlReg = BREG_Read32 (hReg, H_Control);
157	ulControlReg &= ~(
158	BCHP_MASK (CCD_0_Control, BYTE_ORDER ) \|
159	BCHP_MASK (CCD_0_Control, SHIFT_DIRECTION ) \|
160	BCHP_MASK (CCD_0_Control, REGISTER_USE_MODE ) \|
161	BCHP_MASK (CCD_0_Control, ENABLE_CLOSED_CAPTION ) );
162	ulControlReg \|= (
163	BCHP_FIELD_ENUM (CCD_0_Control, BYTE_ORDER, LOW_BYTE_FIRST ) \|
164	BCHP_FIELD_ENUM (CCD_0_Control, SHIFT_DIRECTION, LSB2MSB ) \|
165	BCHP_FIELD_ENUM (CCD_0_Control, REGISTER_USE_MODE, SPLIT ) \|
166	BCHP_FIELD_ENUM (CCD_0_Control, ENABLE_CLOSED_CAPTION, ENABLED ) );
167
168	/* get and set fields in the CCD top register */
169	ulTopReg = BREG_Read32 (hReg, H_Top);
170	ulTopReg &= ~(
171	BCHP_MASK (CCD_0_Top, STATUS ) );
172	ulTopReg \|= (
173	BCHP_FIELD_DATA (CCD_0_Top, STATUS, 0 ) );
174
175	/* get and set fields in the CCD bottom register */
176	ulBottomReg = BREG_Read32 (hReg, H_Bottom);
177	ulBottomReg &= ~(
178	BCHP_MASK (CCD_0_Bottom, STATUS ) );
179	ulBottomReg \|= (
180	BCHP_FIELD_DATA (CCD_0_Bottom, STATUS, 0 ) );
181
182	/* Select video format */
183	switch (eVideoFormat)
184	{
185	case BFMT_VideoFmt_eNTSC:
186	case BFMT_VideoFmt_eNTSC_J:
187	/* NTSC specific settings */
188
189	usTopActiveLine = 21;
190	usBottomActiveLine = 284;
191
192	ulControlReg &= ~(
193	BCHP_MASK (CCD_0_Control, SIGNAL_THRESHOLD ) \|
194	BCHP_MASK (CCD_0_Control, PHASE_SYNC_DELAY ) \|
195	BCHP_MASK (CCD_0_Control, VIDEO_FORMAT ) );
196	ulControlReg \|= (
197	BCHP_FIELD_DATA (CCD_0_Control, SIGNAL_THRESHOLD, 0x43) \|
198	BCHP_FIELD_DATA (CCD_0_Control, PHASE_SYNC_DELAY, 0x37) \|
199	BCHP_FIELD_ENUM (CCD_0_Control, VIDEO_FORMAT, NTSC) );
200
201	ulTopReg &= ~(
202	BCHP_MASK (CCD_0_Top, VSYNC_OFFSET ) \|
203	BCHP_MASK (CCD_0_Top, ACTIVE_LINES ) );
204	ulTopReg \|= (
205	BCHP_FIELD_DATA (CCD_0_Top, VSYNC_OFFSET, 0xF ) \|
206	BCHP_FIELD_DATA (CCD_0_Top, ACTIVE_LINES,
207	(((uint16_t)1) << (usTopActiveLine - 10 - 1))));
208
209	ulBottomReg &= ~(
210	BCHP_MASK (CCD_0_Bottom, VSYNC_OFFSET ) \|
211	BCHP_MASK (CCD_0_Bottom, ACTIVE_LINES ) );
212	ulBottomReg \|= (
213	BCHP_FIELD_DATA (CCD_0_Bottom, VSYNC_OFFSET, 0xF ) \|
214	BCHP_FIELD_DATA (CCD_0_Bottom, ACTIVE_LINES,
215	(((uint16_t)1) << (usBottomActiveLine - 273 - 1))));
216
217	break;
218
219	case BFMT_VideoFmt_ePAL_B:
220	case BFMT_VideoFmt_ePAL_B1:
221	case BFMT_VideoFmt_ePAL_D:
222	case BFMT_VideoFmt_ePAL_D1:
223	case BFMT_VideoFmt_ePAL_G:
224	case BFMT_VideoFmt_ePAL_H:
225	case BFMT_VideoFmt_ePAL_K:
226	case BFMT_VideoFmt_ePAL_I:
227	case BFMT_VideoFmt_ePAL_N:
228	case BFMT_VideoFmt_ePAL_NC:
229	case BFMT_VideoFmt_eSECAM_L:
230	case BFMT_VideoFmt_eSECAM_B:
231	case BFMT_VideoFmt_eSECAM_G:
232	case BFMT_VideoFmt_eSECAM_D:
233	case BFMT_VideoFmt_eSECAM_K:
234	case BFMT_VideoFmt_eSECAM_H:
235	/* 576I settings */
236
237	usTopActiveLine = 22;
238	usBottomActiveLine = 335;
239
240	ulControlReg &= ~(
241	BCHP_MASK (CCD_0_Control, SIGNAL_THRESHOLD ) \|
242	BCHP_MASK (CCD_0_Control, PHASE_SYNC_DELAY ) \|
243	BCHP_MASK (CCD_0_Control, VIDEO_FORMAT ) );
244	ulControlReg \|= (
245	BCHP_FIELD_DATA (CCD_0_Control, SIGNAL_THRESHOLD, 0x43 ) \|
246	BCHP_FIELD_DATA (CCD_0_Control, PHASE_SYNC_DELAY, 0x37 ) \|
247	BCHP_FIELD_ENUM (CCD_0_Control, VIDEO_FORMAT, PAL ) );
248
249	ulTopReg &= ~(
250	BCHP_MASK (CCD_0_Top, VSYNC_OFFSET ) \|
251	BCHP_MASK (CCD_0_Top, ACTIVE_LINES ) );
252	ulTopReg \|= (
253	BCHP_FIELD_DATA (CCD_0_Top, VSYNC_OFFSET, 0xF ) \|
254	BCHP_FIELD_DATA (CCD_0_Top, ACTIVE_LINES,
255	(((uint16_t)1) << (usTopActiveLine - 11 - 1))));
256
257	ulBottomReg &= ~(
258	BCHP_MASK (CCD_0_Bottom, VSYNC_OFFSET ) \|
259	BCHP_MASK (CCD_0_Bottom, ACTIVE_LINES ) );
260	ulBottomReg \|= (
261	BCHP_FIELD_DATA (CCD_0_Bottom, VSYNC_OFFSET, 0xF ) \|
262	BCHP_FIELD_DATA (CCD_0_Bottom, ACTIVE_LINES,
263	(((uint16_t)1) << (usBottomActiveLine - 324 - 1))));
264
265	break;
266
267	case BFMT_VideoFmt_ePAL_M:
268	/* PAL-M specific settings */
269	usTopActiveLine = 18;
270	usBottomActiveLine = 281;
271
272	ulControlReg &= ~(
273	BCHP_MASK (CCD_0_Control, VIDEO_FORMAT ) \|
274	BCHP_MASK (CCD_0_Control, SIGNAL_THRESHOLD ) );
275	ulControlReg \|= (
276	BCHP_FIELD_ENUM (CCD_0_Control, VIDEO_FORMAT, NTSC) \|
277	BCHP_FIELD_DATA (CCD_0_Control, SIGNAL_THRESHOLD, 0x43) );
278
279	ulTopReg &= ~(
280	BCHP_MASK (CCD_0_Top, VSYNC_OFFSET ) \|
281	BCHP_MASK (CCD_0_Top, ACTIVE_LINES ) );
282	ulTopReg \|= (
283	BCHP_FIELD_DATA (CCD_0_Top, VSYNC_OFFSET, 0x0 ) \|
284	BCHP_FIELD_DATA (CCD_0_Top, ACTIVE_LINES,
285	(((uint16_t)1) << (usTopActiveLine - 10 - 1))));
286
287	ulBottomReg &= ~(
288	BCHP_MASK (CCD_0_Bottom, VSYNC_OFFSET ) \|
289	BCHP_MASK (CCD_0_Bottom, ACTIVE_LINES ) );
290	ulBottomReg \|= (
291	BCHP_FIELD_DATA (CCD_0_Bottom, VSYNC_OFFSET, 0x0 ) \|
292	BCHP_FIELD_DATA (CCD_0_Bottom, ACTIVE_LINES,
293	(((uint16_t)1) << (usBottomActiveLine - 273 - 1))));
294
295	break;
296
297	default:
298	BKNI_LeaveCriticalSection();
299	BDBG_LEAVE(BVBI_P_CC_Dec_Program);
300	return BERR_TRACE (BERR_INVALID_PARAMETER);
301	break;
302	}
303
304	/* write the three registers with updated values */
305	BREG_Write32 ( hReg, H_Control, ulControlReg );
306	BREG_Write32 ( hReg, H_Top, ulTopReg );
307	BREG_Write32 ( hReg, H_Bottom, ulBottomReg );
308
309	/* Clear the status bits */
310	ulStatusReg = (
311	BCHP_FIELD_DATA (CCD_0_Status, DATA_OVERRUN, 1 ) \|
312	BCHP_FIELD_DATA (CCD_0_Status, BF_PARITY_ERR, 1 ) \|
313	BCHP_FIELD_DATA (CCD_0_Status, TF_PARITY_ERR, 1 ) );
314	BREG_Write32 ( hReg, H_Status, ulStatusReg );
315
316	/* Program the lock register */
317	ulLockReg = BREG_Read32 ( hReg, H_Lock );
318	ulLockReg &= ~(
319	BCHP_MASK ( CCD_0_Lock, DELAY ) \|
320	BCHP_MASK ( CCD_0_Lock, STATUS ) );
321	ulLockReg \|= (
322	BCHP_FIELD_DATA ( CCD_0_Lock, DELAY, 3 ) \|
323	BCHP_FIELD_DATA ( CCD_0_Lock, STATUS, 0 ) );
324	BREG_Write32 ( hReg, H_Lock, ulLockReg);
325
326	BKNI_LeaveCriticalSection();
327	BDBG_LEAVE(BVBI_P_CC_Dec_Program);
328	return BERR_SUCCESS;
329	}
330
331	uint32_t BVBI_P_CC_Decode_Data_isr (
332	BREG_Handle hReg,
333	BAVC_SourceId eSource,
334	BAVC_Polarity polarity,
335	uint16_t *pusData)
336	{
337	/*
338	Programming note: the implementation here assumes that the bitfield layout
339	within registers is the same for all CC decoder cores in the chip.
340
341	If a chip is built that has multiple CC decoder cores that are not
342	identical, then this routine will have to be redesigned.
343	*/
344	uint32_t ulReg;
345	uint32_t H_Top;
346	uint32_t H_Bottom;
347	uint32_t H_Status;
348	uint32_t H_Data0;
349	uint16_t usStatus;
350	uint16_t usWord0;
351	uint32_t ulErrInfo = 0;
352	uint32_t status_bit1 = 0x01;
353	uint32_t status_bit2 = 0x40;
354
355	BDBG_ENTER(BVBI_P_CC_Decode_Data_isr);
356
357	switch (eSource)
358	{
359	case BAVC_SourceId_eVdec0:
360	H_Top = BCHP_CCD_0_Top;
361	H_Bottom = BCHP_CCD_0_Bottom;
362	H_Status = BCHP_CCD_0_Status;
363	H_Data0 = BCHP_CCD_0_Data0;
364	break;
365	#if (BVBI_P_NUM_VDEC > 1)
366	case BAVC_SourceId_eVdec1:
367	H_Top = BCHP_CCD_1_Top;
368	H_Bottom = BCHP_CCD_1_Bottom;
369	H_Status = BCHP_CCD_1_Status;
370	H_Data0 = BCHP_CCD_1_Data0;
371	break;
372	#endif
373	default:
374	/* This should never happen! This parameter was checked by
375	BVBI_Decode_Create() */
376	BDBG_LEAVE(BVBI_P_CC_Decode_Data_isr);
377	return (-1);
378	break;
379	}
380
381	/* If top field */
382	if (polarity == BAVC_Polarity_eTopField)
383	{
384	/* Pull status info out of the hardware */
385	ulReg = BREG_Read32 (hReg, H_Top);
386	usStatus = (uint16_t)BCHP_GET_FIELD_DATA (ulReg, CCD_0_Top, STATUS);
387
388	/* check to see if we found the top line */
389	if(usStatus & status_bit1)
390	{
391	/* read the data 0 register */
392	BVBI_P_CC_Dec_Get_Word0 (hReg, H_Data0, 0, &usWord0);
393
394	/* provide the decoded data to higher level software */
395	*pusData = usWord0;
396
397	/* Inform of parity error */
398	if ( BVBI_P_CC_Validate_Word ( usWord0 ) != BERR_SUCCESS)
399	{
400	ulErrInfo \|= BVBI_LINE_ERROR_CC_PARITY;
401	}
402
403	/* Write Closed Caption Decoder Top Register To Acknowledge Data */
404	ulReg &= ~BCHP_MASK (CCD_0_Top, STATUS );
405	/* The following should work, but it does not.
406	ulReg \|= BCHP_FIELD_DATA (CCD_0_Top, STATUS, ~usStatus );
407	*/
408	BREG_Write32 (hReg, H_Top, ulReg);
409	}
410	else
411	{
412	/* Failed to find top line, so complain */
413	ulErrInfo \|= BVBI_LINE_ERROR_CC_NODATA;
414	}
415	}
416	else /* Bottom field */
417	{
418	/* Pull status info out of the hardware */
419	ulReg = BREG_Read32 (hReg, H_Bottom);
420	usStatus = (uint16_t)BCHP_GET_FIELD_DATA (ulReg, CCD_0_Bottom, STATUS);
421
422	/* check to see if we found the bottom line */
423	if (usStatus & status_bit2)
424	{
425	/**
426	* read the data 3 register
427	* This is split mode (see hardware doc for more information
428	* on split/share mode).
429	*/
430	BVBI_P_CC_Dec_Get_Word0 (hReg, H_Data0, 3, &usWord0);
431
432	/* provide the decoded data to higher level software */
433	*pusData = usWord0;
434
435	/* Inform of parity error */
436	if ( BVBI_P_CC_Validate_Word ( usWord0 ) != BERR_SUCCESS)
437	{
438	ulErrInfo \|= BVBI_LINE_ERROR_CC_PARITY;
439	}
440
441	/* Write Closed Caption Decoder Bottom Register
442	to Acknowledge Data */
443	ulReg &= ~BCHP_MASK (CCD_0_Bottom, STATUS );
444	/* The following should work, but it does not.
445	ulReg \|= BCHP_FIELD_DATA (CCD_0_Bottom, STATUS, ~usStatus );
446	*/
447	BREG_Write32 (hReg, H_Bottom, ulReg);
448	}
449	else
450	{
451	/* Failed to find bottom line, so complain */
452	ulErrInfo \|= BVBI_LINE_ERROR_CC_NODATA;
453	}
454	}
455
456	/* Check for data overrun */
457	ulReg = BREG_Read32 ( hReg, H_Status );
458	if (BCHP_GET_FIELD_DATA (ulReg, CCD_0_Status, DATA_OVERRUN) != 0)
459	{
460	ulErrInfo \|= BVBI_LINE_ERROR_CC_OVERRUN;
461	}
462
463	/* Clear status bits */
464	ulReg &= ~(
465	BCHP_MASK ( CCD_0_Status, DATA_OVERRUN ) \|
466	BCHP_MASK ( CCD_0_Status, BF_PARITY_ERR ) \|
467	BCHP_MASK ( CCD_0_Status, TF_PARITY_ERR ) );
468	ulReg \|= (
469	BCHP_FIELD_DATA ( CCD_0_Status, DATA_OVERRUN, 1 ) \|
470	BCHP_FIELD_DATA ( CCD_0_Status, BF_PARITY_ERR, 1 ) \|
471	BCHP_FIELD_DATA ( CCD_0_Status, TF_PARITY_ERR, 1 ) );
472	BREG_Write32 ( hReg, H_Status, ulReg) ;
473
474	BDBG_LEAVE(BVBI_P_CC_Decode_Data_isr);
475	return ulErrInfo;
476	}
477	#endif / } (BVBI_P_NUM_VDEC >= 1) /
478
479
480	/***************************************************************************
481	* Static (private) functions
482	***************************************************************************/
483
484	/***************************************************************************
485	*
486	*/
487	static void BVBI_P_CC_Dec_Get_Word0 (
488	BREG_Handle hReg, uint32_t ulWord0_Base,
489	uint8_t ucRegNum, uint16_t *pusWord0 )
490	{
491	/*
492	Programming note: the implementation here assumes that the
493	bitfield layout within registers is the same as the 7038 A0
494	CCD_0_NP core.
495
496	If a chip is built that has a different CC decoder core, then
497	this routine will have to be redesigned.
498
499	Note that this routine does NOT have critical sections, but it accesses
500	registers.
501	*/
502	uint32_t ulReg = 0;
503
504	BDBG_ENTER(BVBI_P_CC_Dec_Get_Word0);
505
506	/* get data from register */
507	ulReg = BREG_Read32 (hReg,
508	ulWord0_Base + ((BCHP_CCD_0_Data1 - BCHP_CCD_0_Data0) * ucRegNum));
509
510	/* store data */
511	*pusWord0 = (uint16_t)BCHP_GET_FIELD_DATA (ulReg, CCD_0_Data0, WORD0);
512
513	BDBG_LEAVE(BVBI_P_CC_Dec_Get_Word0);
514	}
515
516	/***************************************************************************
517	*
518	*/
519	static void BVBI_P_CC_Dec_Get_Word1 (
520	BREG_Handle hReg, uint32_t ulWord1_Base,
521	uint8_t ucRegNum, uint16_t *pusWord1 )
522	{
523	/*
524	Programming note: the implementation here assumes that the
525	bitfield layout within registers is the same as the 7038 A0
526	CCD_0_NP core.
527
528	If a chip is built that has a different CC decoder core, then
529	this routine will have to be redesigned.
530
531	Note that this routine does NOT have critical sections, but it accesses
532	registers.
533	*/
534	uint32_t ulReg = 0;
535
536	BDBG_ENTER(BVBI_P_CC_Dec_Get_Word1);
537
538	/* get data from register */
539	ulReg = BREG_Read32 (hReg,
540	ulWord1_Base + ((BCHP_CCD_0_Data1 - BCHP_CCD_0_Data0) * ucRegNum));
541
542	/* store data */
543	*pusWord1 = (uint16_t)BCHP_GET_FIELD_DATA (ulReg, CCD_0_Data0, WORD1);
544
545	BDBG_LEAVE(BVBI_P_CC_Dec_Get_Word1);
546	}
547
548	/***************************************************************************
549	* Breaks up a 16-bit word into two 8-bit bytes and checks the parity bit
550	* for odd parity. If the parity of either byte is incorrect it
551	* returns BERR_UNKNOWN. Otherwise it returns BERR_SUCCESS.
552	* and returns the reassembled 16-bit word.
553	*/
554	static BERR_Code BVBI_P_CC_Validate_Word ( uint16_t usWord )
555	{
556	BERR_Code eErr = BERR_SUCCESS;
557	uint8_t ulByte0 = 0;
558	uint8_t ulByte1 = 0;
559
560	/* not NULL? (this speeds things up?) */
561	if (usWord != 0x8080)
562	{
563	/* disassemble the word */
564	ulByte0 = (uint8_t)(usWord & 0x00FF);
565	ulByte1 = (uint8_t)(usWord >> 8);
566
567	/* check if the two bytes have the proper parity */
568	if ((ulByte0 != BVBI_P_SetOddParityBit (ulByte0)) \|\|
569	(ulByte1 != BVBI_P_SetOddParityBit (ulByte1)))
570	{
571	/* This is the parity error */
572	eErr = (BERR_UNKNOWN);
573	}
574	}
575
576	/* Return error state */
577	return eErr;
578	}
579
580	#endif / } (BVBI_P_NUM_VDEC >= 1) /

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source: svn/trunk/newcon3bcm2_21bu/magnum/portinginterface/vbi/7552/bvbi_ccd.c

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