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bvbi_mcce.c

Last change on this file was 2, checked in by jglee, 11 years ago
first commit
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File size: 16.7 KB

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1	/***************************************************************************
2	* Copyright (c) 2003-2012, Broadcom Corporation
3	* All Rights Reserved
4	* Confidential Property of Broadcom Corporation
5	*
6	* THIS SOFTWARE MAY ONLY BE USED SUBJECT TO AN EXECUTED SOFTWARE LICENSE
7	* AGREEMENT BETWEEN THE USER AND BROADCOM. YOU HAVE NO RIGHT TO USE OR
8	* EXPLOIT THIS MATERIAL EXCEPT SUBJECT TO THE TERMS OF SUCH AN AGREEMENT.
9	*
10	* $brcm_Workfile: bvbi_mcce.c $
11	* $brcm_Revision: Hydra_Software_Devel/16 $
12	* $brcm_Date: 2/20/12 2:53p $
13	*
14	* Module Description:
15	*
16	* Revision History:
17	*
18	* $brcm_Log: /magnum/portinginterface/vbi/7420/bvbi_mcce.c $
19	*
20	* Hydra_Software_Devel/16 2/20/12 2:53p darnstein
21	* SW7425-2434: more detail in error messages.
22	*
23	* Hydra_Software_Devel/15 2/20/12 12:55p darnstein
24	* SW7425-2434: when an unsupported video format is entered, the BDBG
25	* error message should be informative.
26	*
27	* Hydra_Software_Devel/14 3/2/11 6:06p darnstein
28	* SW7422-261: getting PAL-M multi-line closed caption right for all
29	* chipsets .
30	*
31	* Hydra_Software_Devel/12 3/2/11 1:48p darnstein
32	* SW7422-261: line numbers for PAL-M multi-line closed caption were still
33	* wrong.
34	*
35	* Hydra_Software_Devel/11 2/25/11 2:01p darnstein
36	* SW7422-261: change line number, gain, and horizontal offset for
37	* waveform in PAL-M video.
38	*
39	* Hydra_Software_Devel/10 2/14/11 2:37p darnstein
40	* SW7422-261: Handle PAL-M the same way that NTSC is handled.
41	*
42	* Hydra_Software_Devel/9 10/28/10 6:50p darnstein
43	* SW7422-46: fix typos in previous check-in.
44	*
45	* Hydra_Software_Devel/8 10/28/10 6:14p darnstein
46	* SW7422-46: Use new SCTE features in CCE hardware core, where available.
47	*
48	* Hydra_Software_Devel/7 10/1/10 2:38p darnstein
49	* SW7422-46: Adapt to 7422 and 7425 chipsets.
50	*
51	* Hydra_Software_Devel/4 12/21/09 7:00p darnstein
52	* SW7550-120: Add support for SECAM variants.
53	*
54	* Hydra_Software_Devel/3 12/2/09 5:52p darnstein
55	* SW7401-4348: put in missing break statement in switch block.
56	*
57	* Hydra_Software_Devel/2 12/4/08 6:07p darnstein
58	* PR45819: 7420 software will now compile, but not link.
59	*
60	* Hydra_Software_Devel/1 12/3/08 8:02p darnstein
61	* PR45819:
62	*
63	***************************************************************************/
64
65	#include "bstd.h" /* standard types */
66	#include "bdbg.h" /* Dbglib */
67	#include "bkni.h" /* For critical sections */
68	#include "bvbi.h" /* VBI processing, this module. */
69	#include "bvbi_priv.h" /* VBI internal data structures */
70	#if (BVBI_P_NUM_CCE >= 1)
71	#include "bchp_cce_0.h" /* RDB info for primary CCE core */
72	#endif
73	#if (BVBI_P_NUM_CCE >= 2)
74	#include "bchp_cce_1.h" /* RDB info for secondary CCE core */
75	#endif
76	#if (BVBI_P_NUM_CCE >= 3)
77	#include "bchp_cce_2.h" /* RDB info for tertiary CCE core */
78	#endif
79	#if (BVBI_P_NUM_CCE_656 >= 1)
80	#include "bchp_cce_ancil_0.h" /* RDB info for ITU-R 656 passthrough CCE core */
81	#endif
82
83	BDBG_MODULE(BVBI);
84
85
86	/***************************************************************************
87	* Forward declarations of static (private) functions
88	***************************************************************************/
89	static uint32_t P_GetCoreOffset (bool is656, uint8_t hwCoreIndex);
90
91
92	/***************************************************************************
93	* Implementation supporting closed caption functions that are not in API
94	***************************************************************************/
95
96	BERR_Code BVBI_P_MCC_Enc_Program (
97	BREG_Handle hReg,
98	bool is656,
99	uint8_t hwCoreIndex,
100	bool bActive,
101	BFMT_VideoFmt eVideoFormat)
102	{
103	/*
104	Programming note: the implementation here assumes that the bitfield layout
105	within registers is the same for all CC encoder cores in the chip.
106
107	If a chip is built that has multiple CC encoder cores that are not
108	identical, then this routine will have to be redesigned.
109	*/
110	uint32_t ulCoreOffset;
111	uint32_t ulControlReg;
112	uint32_t ulGainDelayReg = 0;
113	uint32_t ulGain = 0;
114	uint32_t ulDelayCount = 0;
115	#if defined(BVBI_P_CCE_VER2)
116	uint32_t ulScteBaseReg = 0;
117	uint32_t ulLineTop = 0;
118	uint32_t ulLineBot = 0;
119	#endif
120
121	BDBG_ENTER(BVBI_P_MCC_Enc_Program);
122
123	/* Figure out which encoder core to use */
124	ulCoreOffset = P_GetCoreOffset (is656, hwCoreIndex);
125	if (ulCoreOffset == 0xFFFFFFFF)
126	{
127	/* This should never happen! This parameter was checked by
128	BVBI_Encode_Create() */
129	BDBG_LEAVE(BVBI_P_MCC_Enc_Program);
130	return BERR_TRACE(BERR_INVALID_PARAMETER);
131	}
132
133	/* If user wants to turn off closed caption processing, just use the
134	enable bit. */
135	if (!bActive)
136	{
137	ulControlReg =
138	BREG_Read32 ( hReg, BCHP_CCE_0_Control + ulCoreOffset );
139	ulControlReg &=
140	~BCHP_MASK (CCE_0_Control, ENABLE_CLOSED_CAPTION );
141	ulControlReg \|=
142	BCHP_FIELD_ENUM (CCE_0_Control, ENABLE_CLOSED_CAPTION, DISABLED);
143	BREG_Write32 (
144	hReg, BCHP_CCE_0_Control + ulCoreOffset, ulControlReg );
145	BDBG_LEAVE(BVBI_P_MCC_Enc_Program);
146	return BERR_SUCCESS;
147	}
148
149	/* Select video format */
150	switch (eVideoFormat)
151	{
152	case BFMT_VideoFmt_eNTSC:
153	case BFMT_VideoFmt_eNTSC_J:
154	case BFMT_VideoFmt_ePAL_M:
155	if (!is656)
156	{
157	ulGain = 0x47;
158	ulDelayCount = 0x3A;
159	}
160	#if defined(BVBI_P_CCE_VER2)
161	ulLineTop = 8;
162	ulLineBot = 271;
163	#endif
164	/* PAL_M always seems to have an issue */
165	if (eVideoFormat == BFMT_VideoFmt_ePAL_M)
166	{
167	ulGain = 0x4A;
168	ulDelayCount = 0xD;
169	}
170	break;
171
172	case BFMT_VideoFmt_ePAL_B:
173	case BFMT_VideoFmt_ePAL_B1:
174	case BFMT_VideoFmt_ePAL_D:
175	case BFMT_VideoFmt_ePAL_D1:
176	case BFMT_VideoFmt_ePAL_G:
177	case BFMT_VideoFmt_ePAL_H:
178	case BFMT_VideoFmt_ePAL_K:
179	case BFMT_VideoFmt_ePAL_I:
180	case BFMT_VideoFmt_ePAL_N:
181	case BFMT_VideoFmt_ePAL_NC:
182	case BFMT_VideoFmt_eSECAM_L:
183	case BFMT_VideoFmt_eSECAM_B:
184	case BFMT_VideoFmt_eSECAM_G:
185	case BFMT_VideoFmt_eSECAM_D:
186	case BFMT_VideoFmt_eSECAM_K:
187	case BFMT_VideoFmt_eSECAM_H:
188	/* set the format specific gain delay values, if any. */
189	if (!is656)
190	{
191	ulGain = 0x46;
192	ulDelayCount = 0x01;
193	}
194	#if defined(BVBI_P_CCE_VER2)
195	/* SCTE line origin */
196	ulLineTop = 5;
197	ulLineBot = 318;
198	#endif
199	break;
200
201	default:
202	BKNI_LeaveCriticalSection();
203	BDBG_LEAVE(BVBI_P_MCC_Enc_Program);
204	BDBG_ERR(("BVBI_MCCE: video format %d not supported", eVideoFormat));
205	return BERR_TRACE(BERR_INVALID_PARAMETER);
206	break;
207	}
208
209	BKNI_EnterCriticalSection();
210
211	/* write the gain delay register, if any. */
212	if (!is656)
213	{
214	ulGainDelayReg = BREG_Read32 (
215	hReg, BCHP_CCE_0_Gain_Delay + ulCoreOffset );
216	ulGainDelayReg &= ~(
217	BCHP_MASK ( CCE_0_Gain_Delay, GAIN ) \|
218	BCHP_MASK ( CCE_0_Gain_Delay, DELAY_COUNT ) );
219	ulGainDelayReg \|= (
220	BCHP_FIELD_DATA ( CCE_0_Gain_Delay, GAIN, ulGain) \|
221	BCHP_FIELD_DATA ( CCE_0_Gain_Delay, DELAY_COUNT, ulDelayCount) );
222	BREG_Write32 (
223	hReg, BCHP_CCE_0_Gain_Delay + ulCoreOffset, ulGainDelayReg );
224	}
225
226	#if defined(BVBI_P_CCE_VER2)
227	/* Write the SCTE base lines register */
228	ulScteBaseReg = BREG_Read32 (
229	hReg, BCHP_CCE_0_SCTE_Base_Lines + ulCoreOffset );
230	ulScteBaseReg &= ~(
231	BCHP_MASK ( CCE_0_SCTE_Base_Lines, LINE_TOP ) \|
232	BCHP_MASK ( CCE_0_SCTE_Base_Lines, LINE_BOT ) );
233	ulScteBaseReg \|= (
234	BCHP_FIELD_DATA ( CCE_0_SCTE_Base_Lines, LINE_TOP, ulLineTop) \|
235	BCHP_FIELD_DATA ( CCE_0_SCTE_Base_Lines, LINE_BOT, ulLineBot) );
236	BREG_Write32 (
237	hReg, BCHP_CCE_0_SCTE_Base_Lines +ulCoreOffset, ulScteBaseReg );
238	#endif
239
240	/* program the control register with non-format specific values */
241	ulControlReg = BREG_Read32 ( hReg, BCHP_CCE_0_Control + ulCoreOffset );
242	ulControlReg &= ~(
243	BCHP_MASK (CCE_0_Control, reserved0 )\|
244	BCHP_MASK (CCE_0_Control, reserved_for_eco1 )\|
245	#if defined(BVBI_P_CCE_VER2)
246	BCHP_MASK (CCE_0_Control, SCTE_MODE )\|
247	#endif
248	/* set parity bits so we provide the parity */
249	BCHP_MASK (CCE_0_Control, TOP_FLD_PARITY )\|
250	BCHP_MASK (CCE_0_Control, BOT_FLD_PARITY )\|
251	BCHP_MASK (CCE_0_Control, TOP_FLD_STAT )\|
252	BCHP_MASK (CCE_0_Control, BOT_FLD_STAT )\|
253	BCHP_MASK (CCE_0_Control, NULL_CHARACTER )\|
254	BCHP_MASK (CCE_0_Control, BYTEIF_ENDIAN_ORDER )\|
255	BCHP_MASK (CCE_0_Control, BYTE_SWAP )\|
256	BCHP_MASK (CCE_0_Control, SHIFT_DIRECTION )\|
257	BCHP_MASK (CCE_0_Control, reserved2 )\|
258	BCHP_MASK (CCE_0_Control, REGISTER_USE_MODE )\|
259	BCHP_MASK (CCE_0_Control, ENABLE_CLOSED_CAPTION )
260	);
261	ulControlReg \|= (
262	BCHP_FIELD_DATA(CCE_0_Control, reserved0, 0 )\|
263	BCHP_FIELD_DATA(CCE_0_Control, reserved_for_eco1, 0 )\|
264	#if defined(BVBI_P_CCE_VER2)
265	BCHP_FIELD_ENUM( CCE_0_Control, SCTE_MODE, SCTE_ON )\|
266	#endif
267	/* set parity bits so we provide the parity */
268	BCHP_FIELD_ENUM(CCE_0_Control, TOP_FLD_PARITY, AUTOMATIC )\|
269	BCHP_FIELD_ENUM(CCE_0_Control, BOT_FLD_PARITY, AUTOMATIC )\|
270	BCHP_FIELD_DATA(CCE_0_Control, TOP_FLD_STAT, 0 )\|
271	BCHP_FIELD_DATA(CCE_0_Control, BOT_FLD_STAT, 0 )\|
272	BCHP_FIELD_DATA(CCE_0_Control, NULL_CHARACTER, 0x80 )\|
273	BCHP_FIELD_ENUM(CCE_0_Control, BYTEIF_ENDIAN_ORDER, MAINTAIN )\|
274	BCHP_FIELD_ENUM(CCE_0_Control, BYTE_SWAP, LITTLE_ENDIAN)\|
275	BCHP_FIELD_ENUM(CCE_0_Control, SHIFT_DIRECTION, LSB2MSB )\|
276	BCHP_FIELD_DATA(CCE_0_Control, reserved2, 0 )\|
277	BCHP_FIELD_ENUM(CCE_0_Control, REGISTER_USE_MODE, SPLIT )\|
278	BCHP_FIELD_ENUM(CCE_0_Control, ENABLE_CLOSED_CAPTION, ENABLED )
279	);
280
281	/* Format register for PAL vs NTSC */
282	ulControlReg &= ~BCHP_MASK ( CCE_0_Control, VIDEO_FORMAT );
283	if ((eVideoFormat == BFMT_VideoFmt_eNTSC ) \|\|
284	(eVideoFormat == BFMT_VideoFmt_eNTSC_J) \|\|
285	(eVideoFormat == BFMT_VideoFmt_ePAL_M ) )
286	{
287	ulControlReg \|= BCHP_FIELD_ENUM(CCE_0_Control, VIDEO_FORMAT, NTSC);
288	}
289	else /* eVideoFormat == BFMT_VideoFmt_ePAL_whatever */
290	{
291	ulControlReg \|= BCHP_FIELD_ENUM(CCE_0_Control, VIDEO_FORMAT, PAL );
292	}
293
294	/* Write the finished control register value, finally. */
295	BREG_Write32 ( hReg, BCHP_CCE_0_Control + ulCoreOffset, ulControlReg );
296
297	BKNI_LeaveCriticalSection();
298
299	BDBG_LEAVE(BVBI_P_MCC_Enc_Program);
300	return BERR_SUCCESS;
301	}
302
303	uint32_t BVBI_P_MCC_Encode_Data_isr (
304	BREG_Handle hReg,
305	bool is656,
306	uint8_t hwCoreIndex,
307	BFMT_VideoFmt eVideoFormat,
308	BAVC_Polarity polarity,
309	bool bPR18010_bad_line_number,
310	BVBI_MCCData* pMCCData)
311	{
312	int iLine;
313	unsigned int numSet;
314	uint8_t *datum;
315	uint8_t ucRegNum;
316	uint16_t usWord;
317	uint32_t ulCoreOffset;
318	uint32_t ulDataReg;
319	uint32_t ulDataRegAddr;
320	uint32_t ulLinesRegAddr;
321	uint32_t ulLinesReg;
322	uint32_t lineMask;
323	uint32_t ulErrInfo = 0;
324
325	BDBG_ENTER(BVBI_P_MCC_Encode_Data_isr);
326
327	#if (BVBI_P_NUM_CCE_656 >= 1)
328	#else
329	BSTD_UNUSED (bPR18010_bad_line_number);
330	#endif
331
332	/* Get register offset */
333	ulCoreOffset = P_GetCoreOffset (is656, hwCoreIndex);
334	if (ulCoreOffset == 0xFFFFFFFF)
335	{
336	/* This should never happen! This parameter was checked by
337	BVBI_Encode_Create() */
338	BDBG_LEAVE(BVBI_P_MCC_Encode_Data_isr);
339	return (uint32_t)(-1);
340	}
341
342	/* Choose first data register */
343	ucRegNum = (uint8_t)(polarity == BAVC_Polarity_eTopField) ? 0 : 3;
344	ulDataRegAddr =
345	BCHP_CCE_0_Data0 + ulCoreOffset + (sizeof(uint32_t) * ucRegNum);
346
347	/* Prepare to index into user data */
348	datum = pMCCData->ucData;
349	numSet = 0;
350	lineMask = pMCCData->uhLineMask;
351	/* PAL-M always seems to cause problems */
352	if (eVideoFormat == BFMT_VideoFmt_ePAL_M)
353	lineMask >>= 3;
354
355	/* Loop over possible video lines */
356	for (iLine = 0 ; iLine < 16 ; ++iLine)
357	{
358	/* If current video line is selected */
359	if (lineMask & 0x1)
360	{
361	/* Get existing data register value */
362	ulDataReg = BREG_Read32 (hReg, ulDataRegAddr);
363
364	/* Encode VBI data back into register value */
365	usWord = *datum++;
366	usWord \|= ((uint16_t)(*datum++) << 8);
367	/* usWord = BVBI_P_SetCCParityBits_isr (usWord); */
368	if (numSet & 0x1)
369	{
370	ulDataReg &= ~BCHP_MASK (CCE_0_Data0, WORD1 );
371	ulDataReg \|= BCHP_FIELD_DATA (CCE_0_Data0, WORD1, usWord);
372	}
373	else
374	{
375	ulDataReg &= ~BCHP_MASK (CCE_0_Data0, WORD0 );
376	ulDataReg \|= BCHP_FIELD_DATA (CCE_0_Data0, WORD0, usWord);
377	}
378
379	/* Write the data register back */
380	BREG_Write32 (hReg, ulDataRegAddr, ulDataReg);
381
382	/* Advance counters */
383	if (numSet & 0x1)
384	{
385	++ucRegNum;
386	ulDataRegAddr =
387	BCHP_CCE_0_Data0 + ulCoreOffset +
388	(sizeof(uint32_t) * ucRegNum);
389	}
390	++numSet;
391
392	#if !defined(BVBI_P_CCE_VER2)
393	/* Sanity check */
394	if (numSet > 6)
395	break;
396	#endif
397	}
398
399	/* Advance */
400	lineMask >>= 1;
401	}
402
403	/* Adjust line mask for hardware oddities */
404	lineMask = pMCCData->uhLineMask;
405	/* PAL-M always seems to cause problems */
406	if (eVideoFormat == BFMT_VideoFmt_ePAL_M)
407	lineMask >>= 3;
408	#if (BVBI_P_NUM_CCE_656 >= 1)
409	if (is656)
410	{
411	if (bPR18010_bad_line_number)
412	lineMask >>= 3;
413	else
414	lineMask >>= 1;
415	}
416	#endif
417
418	/* Finally, set active lines register. */
419	#if defined(BVBI_P_CCE_VER2) / { /
420	switch (polarity)
421	{
422	case BAVC_Polarity_eTopField:
423	ulLinesRegAddr = BCHP_CCE_0_Active_Lines + ulCoreOffset;
424	ulLinesReg =
425	BREG_Read32 ( hReg, ulLinesRegAddr );
426	ulLinesReg &= ~BCHP_MASK (
427	CCE_0_Active_Lines, SCTE_ON_SCTE_TOP_ACTIVE);
428	ulLinesReg \|= BCHP_FIELD_DATA (
429	CCE_0_Active_Lines, SCTE_ON_SCTE_TOP_ACTIVE, lineMask );
430	break;
431	case BAVC_Polarity_eBotField:
432	ulLinesRegAddr = BCHP_CCE_0_Active_Lines_1 + ulCoreOffset;
433	ulLinesReg =
434	BREG_Read32 ( hReg, ulLinesRegAddr );
435	ulLinesReg &= ~BCHP_MASK (
436	CCE_0_Active_Lines_1, SCTE_BOT_ACTIVE);
437	ulLinesReg \|= BCHP_FIELD_DATA (
438	CCE_0_Active_Lines_1, SCTE_BOT_ACTIVE, lineMask );
439	break;
440	default:
441	BDBG_LEAVE(BVBI_P_MCC_Encode_Data_isr);
442	return (uint32_t)(-1);
443	break;
444	}
445	BREG_Write32 ( hReg, ulLinesRegAddr, ulLinesReg );
446	#else / } !BVBI_P_CCE_VER2 { /
447	ulLinesRegAddr = BCHP_CCE_0_Active_Lines + ulCoreOffset;
448	ulLinesReg =
449	BREG_Read32 ( hReg, ulLinesRegAddr );
450	switch (polarity)
451	{
452	case BAVC_Polarity_eTopField:
453	ulLinesReg &= ~BCHP_MASK ( CCE_0_Active_Lines, TOP_ACTIVE);
454	ulLinesReg \|= BCHP_FIELD_DATA ( CCE_0_Active_Lines, TOP_ACTIVE,
455	lineMask );
456	break;
457	case BAVC_Polarity_eBotField:
458	ulLinesReg &= ~BCHP_MASK ( CCE_0_Active_Lines, BOT_ACTIVE);
459	ulLinesReg \|= BCHP_FIELD_DATA ( CCE_0_Active_Lines, BOT_ACTIVE,
460	lineMask );
461	break;
462	default:
463	BDBG_LEAVE(BVBI_P_MCC_Encode_Data_isr);
464	return (uint32_t)(-1);
465	break;
466	}
467	BREG_Write32 ( hReg, ulLinesRegAddr, ulLinesReg );
468	#endif / } BVBI_P_CCE_VER2 /
469
470	BDBG_LEAVE(BVBI_P_MCC_Encode_Data_isr);
471	return ulErrInfo;
472	}
473
474	/***************************************************************************
475	*
476	*/
477	BERR_Code BVBI_P_MCC_Encode_Enable_isr (
478	BREG_Handle hReg,
479	bool is656,
480	uint8_t hwCoreIndex,
481	BFMT_VideoFmt eVideoFormat,
482	bool bEnable)
483	{
484	uint32_t ulCoreOffset;
485	uint32_t ulControlReg;
486
487	/* TODO: handle progressive video */
488	BSTD_UNUSED (eVideoFormat);
489
490	BDBG_ENTER(BVBI_P_MCC_Encode_Enable_isr);
491
492	/* Figure out which encoder core to use */
493	ulCoreOffset = P_GetCoreOffset (is656, hwCoreIndex);
494	if (ulCoreOffset == 0xFFFFFFFF)
495	{
496	/* This should never happen! This parameter was checked by
497	BVBI_Encode_Create() */
498	BDBG_LEAVE(BVBI_P_MCC_Encode_Enable_isr);
499	return BERR_TRACE(BERR_INVALID_PARAMETER);
500	}
501
502	ulControlReg = BREG_Read32 ( hReg, BCHP_CCE_0_Control + ulCoreOffset );
503	ulControlReg &=
504	~BCHP_MASK (CCE_0_Control, ENABLE_CLOSED_CAPTION);
505	if (bEnable)
506	{
507	ulControlReg \|=
508	BCHP_FIELD_ENUM (CCE_0_Control, ENABLE_CLOSED_CAPTION, ENABLED);
509	}
510	else
511	{
512	ulControlReg \|=
513	BCHP_FIELD_ENUM (CCE_0_Control, ENABLE_CLOSED_CAPTION, DISABLED);
514	}
515	BREG_Write32 ( hReg, BCHP_CCE_0_Control + ulCoreOffset, ulControlReg );
516
517	BDBG_LEAVE(BVBI_P_MCC_Encode_Enable_isr);
518	return BERR_SUCCESS;
519	}
520
521
522	/***************************************************************************
523	* Static (private) functions
524	***************************************************************************/
525
526	/***************************************************************************
527	*
528	*/
529	static uint32_t P_GetCoreOffset (bool is656, uint8_t hwCoreIndex)
530	{
531	uint32_t ulCoreOffset = 0xFFFFFFFF;
532
533	if (is656)
534	{
535	#if (BVBI_P_NUM_CCE_656 >= 1)
536	ulCoreOffset = (BCHP_CCE_ANCIL_0_Ancil_RevID - BCHP_CCE_0_RevID);
537	#endif
538	}
539	else
540	{
541	switch (hwCoreIndex)
542	{
543	#if (BVBI_P_NUM_CCE >= 1)
544	case 0:
545	ulCoreOffset = 0;
546	break;
547	#endif
548	#if (BVBI_P_NUM_CCE >= 2)
549	case 1:
550	ulCoreOffset = (BCHP_CCE_1_RevID - BCHP_CCE_0_RevID);
551	break;
552	#endif
553	#if (BVBI_P_NUM_CCE >= 3)
554	case 2:
555	ulCoreOffset = (BCHP_CCE_2_RevID - BCHP_CCE_0_RevID);
556	break;
557	#endif
558	default:
559	break;
560	}
561	}
562
563	return ulCoreOffset;
564	}

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source: svn/trunk/newcon3bcm2_21bu/magnum/portinginterface/vbi/7552/bvbi_mcce.c

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