source: svn/trunk/newcon3bcm2_21bu/magnum/portinginterface/xpt/7552/bxpt_mpod.c

Last change on this file was 2, checked in by jglee, 11 years ago

first commit
  • Property svn:executable set to *
File size: 21.7 KB
Line 
1 /***************************************************************************
2 *     Copyright (c) 2003-2011, Broadcom Corporation
3 *     All Rights Reserved
4 *     Confidential Property of Broadcom Corporation
5 *
6 *  THIS SOFTWARE MAY ONLY BE USED SUBJECT TO AN EXECUTED SOFTWARE LICENSE
7 *  AGREEMENT  BETWEEN THE USER AND BROADCOM.  YOU HAVE NO RIGHT TO USE OR
8 *  EXPLOIT THIS MATERIAL EXCEPT SUBJECT TO THE TERMS OF SUCH AN AGREEMENT.
9 *
10 * $brcm_Workfile: bxpt_mpod.c $
11 * $brcm_Revision: Hydra_Software_Devel/6 $
12 * $brcm_Date: 12/12/11 2:03p $
13 *
14 * Porting interface code for the data transport core.
15 *
16 * Revision History:
17 *
18 * $brcm_Log: /magnum/portinginterface/xpt/base2/bxpt_mpod.c $
19 *
20 * Hydra_Software_Devel/6   12/12/11 2:03p gmullen
21 * SW7425-1940: Force output clock rate to 27 MHz when in M-Card mode
22 *
23 * Hydra_Software_Devel/5   8/22/11 5:45p gmullen
24 * SW7231-319: Merged to Hydra branch
25 *
26 * Hydra_Software_Devel/SW7231-319/3   8/22/11 5:16p gmullen
27 * SW7231-319: Fixed compilation bugs and bad exit code check in
28 * _AddPidChannel()
29 *
30 * Hydra_Software_Devel/SW7231-319/2   8/18/11 11:26a gmullen
31 * SW7231-319: Fixed compilation error
32 *
33 * Hydra_Software_Devel/SW7231-319/1   8/16/11 2:15p gmullen
34 * SW7231-319: Initial support for B0
35 *
36 * Hydra_Software_Devel/4   4/15/11 4:49p gmullen
37 * SW7425-313: Merged to mainline
38 *
39 * Hydra_Software_Devel/SW7425-313/1   4/13/11 2:05p gmullen
40 * SW7425-313: Added parser remapping support
41 *
42 * Hydra_Software_Devel/3   10/28/10 6:01p gmullen
43 * SW7425-15: Ported files
44 *
45 * Hydra_Software_Devel/1   10/28/10 2:08p gmullen
46 * SW7422-20: Checkin ported files
47 *
48 * Hydra_Software_Devel/37   9/7/10 3:28p gmullen
49 * SW7420-1044: Merged to Hydra_Software_Devel
50 *
51 * Hydra_Software_Devel/SW7420-1044/1   9/7/10 3:20p gmullen
52 * SW7420-1044: Added BXPT_Mpod_RouteToMpodPidFiltered()
53 *
54 * Hydra_Software_Devel/36   9/16/09 10:46a gmullen
55 * SW35230-2: Removed RMXP_MPOD_MUX
56 *
57 * Hydra_Software_Devel/35   8/19/09 12:15p piyushg
58 * PR56771: Add support for 7342. Hence the previous usage
59 * of constant PARSER_REG_STEPSIZE does not work for this chip.
60 * Added new function to calculate offset.
61 *
62 * Hydra_Software_Devel/34   8/11/09 10:39a piyushg
63 * PR55216: Added initial 7340 XPT support.
64 *
65 * Hydra_Software_Devel/33   8/5/09 4:52p piyushg
66 * PR55545: Add 7125 XPT PI support
67 * Added file element "bxpt_rave_ihex.c".
68 * Added file element "bxpt_rave_ihex.h".
69 *
70 * Hydra_Software_Devel/32   7/31/09 3:22p piyushg
71 * PR56771: Add support for 7342.
72 *
73 * Hydra_Software_Devel/31   7/31/09 2:44p gmullen
74 * PR54331: Added 35130 to XPT support.
75 *
76 * Hydra_Software_Devel/30   7/14/09 10:21a piyushg
77 * PR56771: Add XPT PI code for 7342.
78 *
79 * Hydra_Software_Devel/29   6/17/09 6:46p gmullen
80 * PR56110: Added support.xpt/7550/uif_image/a0
81 *
82 * Hydra_Software_Devel/28   5/12/09 11:54a anilmm
83 * PR54832:  Add support for 7413
84 *
85 * Hydra_Software_Devel/27   4/7/09 5:25p piyushg
86 * PR52986: Add support for 7635
87 * Added directory element "7635".
88 *
89 * Hydra_Software_Devel/26   1/27/09 1:09p gmullen
90 * PR51625: Added 7336 support
91 *
92 * Hydra_Software_Devel/25   11/26/08 4:14p gmullen
93 * PR47755: Added support for 7420.
94 *
95 * Hydra_Software_Devel/24   11/23/08 4:29p gmullen
96 * PR49369: Initialized config struct in BXPT_Mpod_GetDefaultConfig()
97 *
98 * Hydra_Software_Devel/23   10/20/08 11:25a gmullen
99 * PR48130: Updated for MPOD register name change.
100 *
101 * Hydra_Software_Devel/22   9/12/08 2:20p gmullen
102 * PR46659: Added 3556/3548 B0 support
103 *
104 * Hydra_Software_Devel/21   9/11/08 11:34a piyushg
105 * PR44486: Input Interface Formatter Control Register being
106 * initialized for 3556 and 3548.
107 *
108 * Hydra_Software_Devel/20   7/7/08 11:32a gmullen
109 * PR44486: Added support to control Pod2Chip MCLK select.
110 *
111 * Hydra_Software_Devel/19   6/27/08 7:52a gmullen
112 * PR42923: BXPT_Mpod_Init didn't access HOST_RSVD_EN fields.
113 *
114 * Hydra_Software_Devel/19   6/27/08 7:51a gmullen
115 * PR42923: #if ( BCHP_CHIP == 3563 ) || (( BCHP_CHIP == 7400 ) && (
116 * BCHP_VER >= BCHP_VER_B0 )) || ( BCHP_CHIP == 7405 )  ||  ( BCHP_CHIP
117 * == 7325 ) ||  ( BCHP_CHIP == 7335 ) ||  ( BCHP_CHIP == 3548 ) ||  (
118 * BCHP_CHIP == 3556 )
119 *
120 * Hydra_Software_Devel/18   5/21/08 6:20p gmullen
121 * PR42923: Added support for S-Card mode. Updated comments for PbBand.
122 *
123 * Hydra_Software_Devel/17   5/21/08 3:38p jrubio
124 * PR42353: add 7325/7335 support to mpod
125 *
126 * Hydra_Software_Devel/16   4/10/08 5:33p gmullen
127 * PR41241: Added support for cardbus.
128 *
129 * Hydra_Software_Devel/15   3/26/08 11:23a gmullen
130 * PR38954: Added 3548 support to XPT PI.
131 *
132 * Hydra_Software_Devel/14   12/19/07 8:58a gmullen
133 * PR38184: Set MPOD_MUX_SEL only during init.
134 *
135 * Hydra_Software_Devel/13   11/28/07 11:20a gmullen
136 * PR36900: Added 7335 support
137 *
138 * Hydra_Software_Devel/12   10/30/07 3:11p gmullen
139 * PR35018: Added support for 7325
140 *
141 * Hydra_Software_Devel/11   2/14/07 1:10p gmullen
142 * PR27642: Added support for 7405.
143 *
144 * Hydra_Software_Devel/10   2/6/07 7:05p gmullen
145 * PR26217: Added B0 support.
146 *
147 * Hydra_Software_Devel/9   1/18/07 4:55p katrep
148 * PR27188: Enabled Parallel MPOD support for 7403
149 *
150 * Hydra_Software_Devel/8   11/2/06 8:40a gmullen
151 * PR23189: Added 3563 support.
152 *
153 * Hydra_Software_Devel/7   10/19/06 1:43p gmullen
154 * PR25027: Fixed compiler warning.
155 *
156 * Hydra_Software_Devel/6   9/19/06 5:30p gmullen
157 * PR24338: Parallel output support.,
158 *
159 * Hydra_Software_Devel/4   7/27/06 8:40a gmullen
160 * PR22998: Incorp requested changes. Please see Description field in PR>
161 *
162 * Hydra_Software_Devel/3   4/12/06 10:15a gmullen
163 * PR20631: Added parallel IO support
164 *
165 * Hydra_Software_Devel/2   3/31/06 4:12p gmullen
166 * PR 15309: To use MPOD, parser band must be in all-pass mode.
167 *
168 * Hydra_Software_Devel/1   7/28/05 3:40p gmullen
169 * PR15309: Initial version for building.
170 *
171 *
172 ***************************************************************************/
173
174#include "bstd.h"
175#include "bkni.h"
176#include "bxpt_priv.h"
177#include "bxpt_mpod.h"
178
179#include "bchp_xpt_mpod.h"
180#include "bchp_xpt_fe.h"
181#include "bchp_xpt_pb0.h"
182#include "bchp_xpt_bus_if.h"
183
184#include "bchp_xpt_pb1.h"
185#define PB_PARSER_STEP      ( BCHP_XPT_PB1_PARSER_CTRL2 - BCHP_XPT_PB0_PARSER_CTRL2 )
186#define IB_PARSER_STEP      ( BCHP_XPT_FE_MINI_PID_PARSER1_CTRL1 - BCHP_XPT_FE_MINI_PID_PARSER0_CTRL1 )
187
188#if( BDBG_DEBUG_BUILD == 1 )
189    BDBG_MODULE( xpt_mpod );
190#endif
191
192static BERR_Code SetOnlineState( BXPT_Handle hXpt, bool Online );
193static uint32_t GetParserCtrl1Addr( BXPT_Handle hXpt, BXPT_ParserType ParserType, unsigned ParserNum );
194static uint32_t GetParserCtrl2Addr( BXPT_Handle hXpt, BXPT_ParserType ParserType, unsigned ParserNum );
195
196void BXPT_Mpod_GetDefaultConfig(
197    BXPT_Handle hXpt,                           /* [in] Handle for this transport */
198    BXPT_Mpod_Config *Config
199    )
200{
201    BDBG_ASSERT( hXpt );
202    BDBG_ASSERT( Config );
203
204    BSTD_UNUSED( hXpt );
205
206    BKNI_Memset( Config, 0, sizeof( BXPT_Mpod_Config ));
207    Config->ByteSync = 1;
208    Config->ClkNrun = 0;
209    Config->InvertClk = 0;
210    Config->NshiftClk = 0;
211    Config->OutputInvertSync = 0;
212    Config->InputInvertSync = 0;
213
214    Config->Loopback = false;
215
216    Config->SmodeEn = false;
217    Config->HostRsvd = 0;
218    Config->HostRsvdEn = false;
219    Config->ClkDelay = 0;
220    Config->OutputInvertValid = false;
221    Config->InputInvertValid = false;
222    Config->InputInvertClk = false;
223
224    Config->BandNo = 0;
225    Config->PbBand = false;
226    Config->BandEn = false;
227    Config->TimestampInsertEn = false;
228
229    Config->ParallelEn = false;
230
231    /* Default for S-Card is 9 MHz. Not all chips support programmable output clocks. */
232    Config->OutputClockRate = BXPT_Mpod_OutputClockRate_e108;
233    Config->OutputClockDivider = BXPT_Mpod_OutputClockDivider_e12;
234}
235
236BERR_Code BXPT_Mpod_Init(
237    BXPT_Handle hXpt,                           /* [in] Handle for this transport */
238    const BXPT_Mpod_Config *Config
239    )
240{
241    uint32_t Reg;
242    unsigned ii;
243
244    BERR_Code ExitCode = BERR_SUCCESS;
245
246    BDBG_ASSERT( hXpt );
247    BDBG_ASSERT( Config );
248
249    /* MPOD Configuration Register */
250    Reg = BREG_Read32( hXpt->hRegister, BCHP_XPT_MPOD_CFG );
251    Reg &= ~(
252        BCHP_MASK( XPT_MPOD_CFG, CRC_INIT_VALUE ) |
253        BCHP_MASK( XPT_MPOD_CFG, SMODE_EN ) |
254        BCHP_MASK( XPT_MPOD_CFG, MPOD_EXT_EN ) |
255        BCHP_MASK( XPT_MPOD_CFG, MPOD_EN )
256    );
257    Reg |= (
258        BCHP_FIELD_DATA( XPT_MPOD_CFG, CRC_INIT_VALUE, 0xFF ) |
259        BCHP_FIELD_DATA( XPT_MPOD_CFG, SMODE_EN, Config->SmodeEn ) |
260        BCHP_FIELD_DATA( XPT_MPOD_CFG, MPOD_EXT_EN, Config->Loopback == true ? 0 : 1 ) |
261        BCHP_FIELD_DATA( XPT_MPOD_CFG, MPOD_EN, 0 )
262    );
263    BREG_Write32( hXpt->hRegister, BCHP_XPT_MPOD_CFG, Reg );
264
265
266    /* Output Interface Formatter Control Register */
267    Reg = BREG_Read32( hXpt->hRegister, BCHP_XPT_MPOD_OCTRL );
268    Reg &= ~(
269        BCHP_MASK( XPT_MPOD_OCTRL, HOST_RSVD ) |
270        BCHP_MASK( XPT_MPOD_OCTRL, CLK_DELAY ) |
271        BCHP_MASK( XPT_MPOD_OCTRL, HOST_RSVD_EN ) |
272        BCHP_MASK( XPT_MPOD_OCTRL, INVERT_VALID ) |
273        BCHP_MASK( XPT_MPOD_OCTRL, BYTE_SYNC ) |
274        BCHP_MASK( XPT_MPOD_OCTRL, CLK_NRUN ) |
275        BCHP_MASK( XPT_MPOD_OCTRL, INVERT_CLK ) |
276        BCHP_MASK( XPT_MPOD_OCTRL, NSHIFT_CLK ) |
277        BCHP_MASK( XPT_MPOD_OCTRL, INVERT_SYNC ) |
278        BCHP_MASK( XPT_MPOD_OCTRL, MUTE ) |
279        BCHP_MASK( XPT_MPOD_OCTRL, OUTPUT_FORMATTER_EN )
280    );
281    Reg |= (
282        BCHP_FIELD_DATA( XPT_MPOD_OCTRL, HOST_RSVD, Config->HostRsvd ) |
283        BCHP_FIELD_DATA( XPT_MPOD_OCTRL, CLK_DELAY, Config->ClkDelay ) |
284        BCHP_FIELD_DATA( XPT_MPOD_OCTRL, HOST_RSVD_EN, Config->HostRsvdEn ) |
285        BCHP_FIELD_DATA( XPT_MPOD_OCTRL, INVERT_VALID, Config->OutputInvertValid ) |
286        BCHP_FIELD_DATA( XPT_MPOD_OCTRL, BYTE_SYNC, Config->ByteSync ) |
287        BCHP_FIELD_DATA( XPT_MPOD_OCTRL, CLK_NRUN, Config->ClkNrun ) |
288        BCHP_FIELD_DATA( XPT_MPOD_OCTRL, INVERT_CLK, Config->InvertClk ) |
289        BCHP_FIELD_DATA( XPT_MPOD_OCTRL, NSHIFT_CLK, Config->NshiftClk ) |
290        BCHP_FIELD_DATA( XPT_MPOD_OCTRL, INVERT_SYNC, Config->OutputInvertSync ) |
291        BCHP_FIELD_DATA( XPT_MPOD_OCTRL, MUTE, 0 ) |
292        BCHP_FIELD_DATA( XPT_MPOD_OCTRL, OUTPUT_FORMATTER_EN, 0 )
293    );
294    BREG_Write32( hXpt->hRegister, BCHP_XPT_MPOD_OCTRL, Reg );
295
296    /* MPOD_PKT_DLY_CNT moved on some chips. */
297#ifdef BCHP_XPT_MPOD_OCTRL2_MPOD_PKT_DLY_CNT_MASK
298    {
299        BXPT_Mpod_OutputClockRate OutputClockRate;
300        BXPT_Mpod_OutputClockDivider OutputClockDivider;
301
302        if( Config->SmodeEn == false )
303        {
304            /* The MCard spec requires 27 MHz output clock, so override the user's request if we're in MCard mode. */
305            OutputClockRate = BXPT_Mpod_OutputClockRate_e108;
306            OutputClockDivider = BXPT_Mpod_OutputClockDivider_e4;
307        }
308        else
309        {
310            OutputClockRate = Config->OutputClockRate;
311            OutputClockDivider = Config->OutputClockDivider;
312        }
313
314        Reg = BREG_Read32( hXpt->hRegister, BCHP_XPT_MPOD_OCTRL2 );
315        Reg &= ~(
316            BCHP_MASK( XPT_MPOD_OCTRL2, MPOD_CLK_SEL ) |
317            BCHP_MASK( XPT_MPOD_OCTRL2, MPOD_CLK_DIV_SEL ) |
318            BCHP_MASK( XPT_MPOD_OCTRL2, MPOD_PKT_DLY_CNT ) 
319        );
320        Reg |= (
321            BCHP_FIELD_DATA( XPT_MPOD_OCTRL2, MPOD_CLK_SEL, OutputClockRate ) |
322            BCHP_FIELD_DATA( XPT_MPOD_OCTRL2, MPOD_CLK_DIV_SEL, OutputClockDivider ) |
323            BCHP_FIELD_DATA( XPT_MPOD_OCTRL2, MPOD_PKT_DLY_CNT, Config->OutputPacketDelayCount ) 
324        );
325        BREG_Write32( hXpt->hRegister, BCHP_XPT_MPOD_OCTRL2, Reg );
326    }
327#endif
328
329    /* Input Interface Formatter Control Register */
330    Reg = BREG_Read32( hXpt->hRegister, BCHP_XPT_MPOD_ICTRL );
331    Reg &= ~(
332        BCHP_MASK( XPT_MPOD_ICTRL, INVERT_VALID ) |
333        BCHP_MASK( XPT_MPOD_ICTRL, INVERT_CLK ) |
334        BCHP_MASK( XPT_MPOD_ICTRL, BAND_NO ) |
335        BCHP_MASK( XPT_MPOD_ICTRL, PB_BAND ) |
336        BCHP_MASK( XPT_MPOD_ICTRL, BAND_EN ) |
337        BCHP_MASK( XPT_MPOD_ICTRL, TIMESTAMP_INSERT_EN ) |
338        BCHP_MASK( XPT_MPOD_ICTRL, INVERT_SYNC ) |
339        BCHP_MASK( XPT_MPOD_ICTRL, MUTE ) |
340        BCHP_MASK( XPT_MPOD_ICTRL, INPUT_FORMATTER_EN )
341    );
342    Reg |= (
343        BCHP_FIELD_DATA( XPT_MPOD_ICTRL, INVERT_VALID, Config->InputInvertValid ) |
344        BCHP_FIELD_DATA( XPT_MPOD_ICTRL, INVERT_CLK, Config->InputInvertClk ) |
345        BCHP_FIELD_DATA( XPT_MPOD_ICTRL, BAND_NO, Config->BandNo ) |
346        BCHP_FIELD_DATA( XPT_MPOD_ICTRL, PB_BAND, Config->PbBand ) |
347        BCHP_FIELD_DATA( XPT_MPOD_ICTRL, BAND_EN, Config->BandEn ) |
348        BCHP_FIELD_DATA( XPT_MPOD_ICTRL, TIMESTAMP_INSERT_EN, Config->TimestampInsertEn ) |
349        BCHP_FIELD_DATA( XPT_MPOD_ICTRL, INVERT_SYNC, Config->InputInvertSync ) |
350        BCHP_FIELD_DATA( XPT_MPOD_ICTRL, MUTE, 0 ) |
351        BCHP_FIELD_DATA( XPT_MPOD_ICTRL, INPUT_FORMATTER_EN, 0 )
352    );
353    BREG_Write32( hXpt->hRegister, BCHP_XPT_MPOD_ICTRL, Reg );
354
355    /* All parsers *bypass* the interface */
356    for( ii = 0; ii < hXpt->MaxPidParsers; ii++ )
357    {
358        BXPT_Mpod_RouteToMpod( hXpt, BXPT_ParserType_eIb, ii, false );
359        BXPT_Mpod_AllPass( hXpt, BXPT_ParserType_eIb, ii, false );
360    }
361    for( ii = 0; ii < hXpt->MaxPlaybacks; ii++ )
362    {
363        BXPT_Mpod_RouteToMpod( hXpt, BXPT_ParserType_ePb, ii, false );
364        BXPT_Mpod_AllPass( hXpt, BXPT_ParserType_ePb, ii, false );
365    }
366
367    /* Enable the interface. */
368    ExitCode = SetOnlineState( hXpt, true );
369
370    return( ExitCode );
371}
372
373BERR_Code BXPT_Mpod_Shutdown(
374    BXPT_Handle hXpt                            /* [in] Handle for this transport */
375    )
376{
377    unsigned ii;
378    uint32_t Reg;
379
380    BERR_Code ExitCode = BERR_SUCCESS;
381
382    BDBG_ASSERT( hXpt );
383
384    /* Disable the interface. */
385    SetOnlineState( hXpt, false );
386
387    /* All parsers *bypass* the interface */
388    for( ii = 0; ii < hXpt->MaxPidParsers; ii++ )
389    {
390        BXPT_Mpod_RouteToMpod( hXpt, BXPT_ParserType_eIb, ii, false );
391        BXPT_Mpod_AllPass( hXpt, BXPT_ParserType_eIb, ii, false );
392    }
393    for( ii = 0; ii < hXpt->MaxPlaybacks; ii++ )
394    {
395        BXPT_Mpod_RouteToMpod( hXpt, BXPT_ParserType_ePb, ii, false );
396        BXPT_Mpod_AllPass( hXpt, BXPT_ParserType_ePb, ii, false );
397    }
398
399    Reg = BREG_Read32( hXpt->hRegister, BCHP_XPT_MPOD_CFG );
400    BREG_Write32( hXpt->hRegister, BCHP_XPT_MPOD_CFG, Reg & 0xfffffff8);
401
402    BREG_Write32( hXpt->hRegister, BCHP_XPT_MPOD_OCTRL, 0);
403    BREG_Write32( hXpt->hRegister, BCHP_XPT_MPOD_ICTRL, 0);
404
405    return( ExitCode );
406}
407
408unsigned int BXPT_Mpod_GetPodRes(
409    BXPT_Handle hXpt                /* [in] Handle for this transport */
410    )
411{
412    unsigned int Reg;
413
414    BDBG_ASSERT( hXpt );
415
416    Reg = BREG_Read32( hXpt->hRegister, BCHP_XPT_MPOD_RES_FIELD );
417    return BCHP_GET_FIELD_DATA( Reg, XPT_MPOD_RES_FIELD, POD_RES );
418}
419
420
421BERR_Code BXPT_Mpod_RouteToMpod(
422    BXPT_Handle hXpt,           /* [in] Handle for this instance of transport. */
423    BXPT_ParserType ParserType, /* [in] Playback or front-end parser */
424    unsigned ParserNum,         /* [in] Which parser to get data from */
425    bool Enable                 /* [in] Route data to the MPOD interface if true */
426    )
427{
428    uint32_t Ctrl1Addr, Ctrl2Addr, Reg;
429
430    BERR_Code ExitCode = BERR_SUCCESS;
431
432    BDBG_ASSERT( hXpt );
433
434    Ctrl1Addr = GetParserCtrl1Addr( hXpt, ParserType, ParserNum );
435    Ctrl2Addr = GetParserCtrl2Addr( hXpt, ParserType, ParserNum );
436    if( !Ctrl1Addr || !Ctrl2Addr )
437    {
438        BDBG_ERR(( "Invalid ParserNum and ParserType combination!" ));
439        ExitCode = BERR_TRACE( BERR_INVALID_PARAMETER );
440        goto Done;
441    }
442
443    /* This works since PB and FE parser control reg 2 are identical */
444    Reg = BREG_Read32( hXpt->hRegister, Ctrl1Addr );
445    Reg &= ~(
446        BCHP_MASK( XPT_FE_MINI_PID_PARSER0_CTRL1, PARSER_ALL_PASS_CTRL_PRE_MPOD )
447    );
448    Reg |= (
449        BCHP_FIELD_DATA( XPT_FE_MINI_PID_PARSER0_CTRL1, PARSER_ALL_PASS_CTRL_PRE_MPOD, Enable == true ? 1 : 0 )
450    );
451    BREG_Write32( hXpt->hRegister, Ctrl1Addr, Reg );
452
453    Reg = BREG_Read32( hXpt->hRegister, Ctrl2Addr );
454    Reg &= ~(
455        BCHP_MASK( XPT_FE_MINI_PID_PARSER0_CTRL2, MPOD_EN )
456    );
457    Reg |= (
458        BCHP_FIELD_DATA( XPT_FE_MINI_PID_PARSER0_CTRL2, MPOD_EN, Enable == true ? 1 : 0 )
459    );
460    BREG_Write32( hXpt->hRegister, Ctrl2Addr, Reg );
461
462    Done:
463    return ExitCode;
464}
465
466BERR_Code BXPT_Mpod_RouteToMpodPidFiltered(
467    BXPT_Handle hXpt,           /* [in] Handle for this instance of transport. */
468    BXPT_ParserType ParserType, /* [in] Playback or front-end parser */
469    unsigned ParserNum,         /* [in] Which parser to get data from */
470    bool MpodPidFilter,         /* [in] enable pid filtering prior to the MCARD */
471    bool ContinuityCountCheck,  /* [in] enable CC checking after the MCARD */
472    bool Enable                 /* [in] Route data to the MPOD interface if true */
473    )
474{
475    uint32_t Ctrl1Addr, Ctrl2Addr, Reg;
476
477    BERR_Code ExitCode = BERR_SUCCESS;
478
479    BDBG_ASSERT( hXpt );
480
481    BSTD_UNUSED( ContinuityCountCheck );
482    BDBG_ERR(( "ContinuityCountCheck is not supported. Control CC checking through the PID channel API" ));
483
484    Ctrl1Addr = GetParserCtrl1Addr( hXpt, ParserType, ParserNum );
485    Ctrl2Addr = GetParserCtrl2Addr( hXpt, ParserType, ParserNum );
486    if( !Ctrl1Addr || !Ctrl2Addr )
487    {
488        BDBG_ERR(( "Invalid ParserNum and ParserType combination!" ));
489        ExitCode = BERR_TRACE( BERR_INVALID_PARAMETER );
490        goto Done;
491    }
492
493    /* This works since PB and FE parser control reg 2 are identical */
494    Reg = BREG_Read32( hXpt->hRegister, Ctrl1Addr );
495    Reg &= ~(
496        BCHP_MASK( XPT_FE_MINI_PID_PARSER0_CTRL1, PARSER_ALL_PASS_CTRL_PRE_MPOD )
497    );
498    Reg |= (
499        BCHP_FIELD_DATA( XPT_FE_MINI_PID_PARSER0_CTRL1, PARSER_ALL_PASS_CTRL_PRE_MPOD, ((MpodPidFilter==false) && Enable) ? 1 : 0 )
500    );
501    BREG_Write32( hXpt->hRegister, Ctrl1Addr, Reg );
502   
503    Reg = BREG_Read32( hXpt->hRegister, Ctrl2Addr );
504    Reg &= ~(
505        BCHP_MASK( XPT_FE_MINI_PID_PARSER0_CTRL2, MPOD_EN )
506    );
507    Reg |= (
508        BCHP_FIELD_DATA( XPT_FE_MINI_PID_PARSER0_CTRL2, MPOD_EN, Enable == true ? 1 : 0 )
509    );
510    BREG_Write32( hXpt->hRegister, Ctrl2Addr, Reg );
511
512    Done:
513    return ExitCode;
514}
515
516
517BERR_Code BXPT_Mpod_AllPass(
518    BXPT_Handle hXpt,           /* [in] Handle for this instance of transport. */
519    BXPT_ParserType ParserType, /* [in] Playback or front-end parser */
520    unsigned ParserNum,         /* [in] Which parser to get data from */
521    bool Enable                 /* [in] All pass mode enabled if true, disabled if false */
522    )
523{
524    uint32_t RegAddr, Reg;
525
526    BERR_Code ExitCode = BERR_SUCCESS;
527
528    BDBG_ASSERT( hXpt );
529
530    RegAddr = GetParserCtrl2Addr( hXpt, ParserType, ParserNum );
531    if( !RegAddr )
532    {
533        BDBG_ERR(( "Invalid ParserNum and ParserType combination!" ));
534        ExitCode = BERR_TRACE( BERR_INVALID_PARAMETER );
535        goto Done;
536    }
537
538    /* This works since PB and FE parser control reg 2 are identical */
539    Reg = BREG_Read32( hXpt->hRegister, RegAddr );
540    Reg &= ~(
541        BCHP_MASK( XPT_FE_MINI_PID_PARSER0_CTRL2, PARSER_ALL_PASS_CTRL_POST_MPOD )
542    );
543    Reg |= (
544        BCHP_FIELD_DATA( XPT_FE_MINI_PID_PARSER0_CTRL2, PARSER_ALL_PASS_CTRL_POST_MPOD, Enable == true ? 1 : 0 )
545    );
546    BREG_Write32( hXpt->hRegister, RegAddr, Reg );
547
548    Done:
549    return ExitCode;
550}
551
552BERR_Code SetOnlineState(
553    BXPT_Handle hXpt,             /* [in] Handle for this transport */
554    bool Online                   /* [in] true if MPOD should be online, false otherwise */
555    )
556{
557    int Enable;
558    uint32_t Reg;
559
560    BERR_Code ExitCode = BERR_SUCCESS;
561
562    BDBG_ASSERT( hXpt );
563
564    Enable = Online == true ? 1 : 0;
565
566    /* MPOD Configuration Register */
567    Reg = BREG_Read32( hXpt->hRegister, BCHP_XPT_MPOD_CFG );
568    Reg &= ~(
569        BCHP_MASK( XPT_MPOD_CFG, MPOD_EN )
570    );
571    Reg |= (
572        BCHP_FIELD_DATA( XPT_MPOD_CFG, MPOD_EN, Enable )
573    );
574    BREG_Write32( hXpt->hRegister, BCHP_XPT_MPOD_CFG, Reg );
575
576    /* MPOD output interface register */
577    Reg = BREG_Read32( hXpt->hRegister, BCHP_XPT_MPOD_OCTRL );
578    Reg &= ~(
579        BCHP_MASK( XPT_MPOD_OCTRL, OUTPUT_FORMATTER_EN )
580    );
581    Reg |= (
582        BCHP_FIELD_DATA( XPT_MPOD_OCTRL, OUTPUT_FORMATTER_EN, Enable )
583    );
584    BREG_Write32( hXpt->hRegister, BCHP_XPT_MPOD_OCTRL, Reg );
585
586    /* MPOD input interface register */
587    Reg = BREG_Read32( hXpt->hRegister, BCHP_XPT_MPOD_ICTRL );
588    Reg &= ~(
589        BCHP_MASK( XPT_MPOD_ICTRL, INPUT_FORMATTER_EN )
590    );
591    Reg |= (
592        BCHP_FIELD_DATA( XPT_MPOD_ICTRL, INPUT_FORMATTER_EN, Enable )
593    );
594    BREG_Write32( hXpt->hRegister, BCHP_XPT_MPOD_ICTRL, Reg );
595
596    return( ExitCode );
597}
598
599uint32_t GetParserCtrl1Addr(
600    BXPT_Handle hXpt,             /* [in] Handle for this transport */
601    BXPT_ParserType ParserType,
602    unsigned ParserNum
603    )
604{
605    uint32_t Ctrl2Addr = 0;
606
607    switch( ParserType )
608    {
609        case BXPT_ParserType_eIb:
610        if( ParserNum < hXpt->MaxPidParsers )
611            Ctrl2Addr = BXPT_P_GetParserCtrlRegAddr( hXpt, ParserNum, BCHP_XPT_FE_MINI_PID_PARSER0_CTRL1 );
612        break;
613
614        case BXPT_ParserType_ePb:
615        if( ParserNum < hXpt->MaxPlaybacks )
616            Ctrl2Addr = BCHP_XPT_PB0_PARSER_CTRL1 + ( ParserNum * PB_PARSER_STEP );
617        break;
618
619        /* Return 0, tells the caller the function failed. */
620        default:
621        break;
622    }
623
624    return Ctrl2Addr;
625}
626
627uint32_t GetParserCtrl2Addr(
628    BXPT_Handle hXpt,             /* [in] Handle for this transport */
629    BXPT_ParserType ParserType,
630    unsigned ParserNum
631    )
632{
633    uint32_t Ctrl2Addr = 0;
634
635    switch( ParserType )
636    {
637        case BXPT_ParserType_eIb:
638        if( ParserNum < hXpt->MaxPidParsers )
639            Ctrl2Addr = BXPT_P_GetParserCtrlRegAddr( hXpt, ParserNum, BCHP_XPT_FE_MINI_PID_PARSER0_CTRL2 );
640        break;
641
642        case BXPT_ParserType_ePb:
643        if( ParserNum < hXpt->MaxPlaybacks )
644            Ctrl2Addr = BCHP_XPT_PB0_PARSER_CTRL2 + ( ParserNum * PB_PARSER_STEP );
645        break;
646
647        /* Return 0, tells the caller the function failed. */
648        default:
649        break;
650    }
651
652    return Ctrl2Addr;
653}
Note: See TracBrowser for help on using the repository browser.