| 1 | /*************************************************************************** |
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| 2 | * (c)2004-2011 Broadcom Corporation |
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| 3 | * |
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| 4 | * This program is the proprietary software of Broadcom Corporation and/or its licensors, |
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| 5 | * and may only be used, duplicated, modified or distributed pursuant to the terms and |
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| 6 | * conditions of a separate, written license agreement executed between you and Broadcom |
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| 7 | * (an "Authorized License"). Except as set forth in an Authorized License, Broadcom grants |
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| 8 | * no license (express or implied), right to use, or waiver of any kind with respect to the |
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| 9 | * Software, and Broadcom expressly reserves all rights in and to the Software and all |
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| 10 | * intellectual property rights therein. IF YOU HAVE NO AUTHORIZED LICENSE, THEN YOU |
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| 11 | * HAVE NO RIGHT TO USE THIS SOFTWARE IN ANY WAY, AND SHOULD IMMEDIATELY |
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| 12 | * NOTIFY BROADCOM AND DISCONTINUE ALL USE OF THE SOFTWARE. |
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| 13 | * |
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| 14 | * Except as expressly set forth in the Authorized License, |
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| 15 | * |
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| 16 | * 1. This program, including its structure, sequence and organization, constitutes the valuable trade |
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| 17 | * secrets of Broadcom, and you shall use all reasonable efforts to protect the confidentiality thereof, |
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| 18 | * and to use this information only in connection with your use of Broadcom integrated circuit products. |
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| 19 | * |
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| 20 | * 2. TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS" |
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| 21 | * AND WITH ALL FAULTS AND BROADCOM MAKES NO PROMISES, REPRESENTATIONS OR |
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| 22 | * WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH RESPECT TO |
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| 23 | * THE SOFTWARE. BROADCOM SPECIFICALLY DISCLAIMS ANY AND ALL IMPLIED WARRANTIES |
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| 24 | * OF TITLE, MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR PURPOSE, |
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| 25 | * LACK OF VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET POSSESSION |
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| 26 | * OR CORRESPONDENCE TO DESCRIPTION. YOU ASSUME THE ENTIRE RISK ARISING OUT OF |
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| 27 | * USE OR PERFORMANCE OF THE SOFTWARE. |
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| 28 | * |
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| 29 | * 3. TO THE MAXIMUM EXTENT PERMITTED BY LAW, IN NO EVENT SHALL BROADCOM OR ITS |
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| 30 | * LICENSORS BE LIABLE FOR (i) CONSEQUENTIAL, INCIDENTAL, SPECIAL, INDIRECT, OR |
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| 31 | * EXEMPLARY DAMAGES WHATSOEVER ARISING OUT OF OR IN ANY WAY RELATING TO YOUR |
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| 32 | * USE OF OR INABILITY TO USE THE SOFTWARE EVEN IF BROADCOM HAS BEEN ADVISED OF |
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| 33 | * THE POSSIBILITY OF SUCH DAMAGES; OR (ii) ANY AMOUNT IN EXCESS OF THE AMOUNT |
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| 34 | * ACTUALLY PAID FOR THE SOFTWARE ITSELF OR U.S. $1, WHICHEVER IS GREATER. THESE |
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| 35 | * LIMITATIONS SHALL APPLY NOTWITHSTANDING ANY FAILURE OF ESSENTIAL PURPOSE OF |
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| 36 | * ANY LIMITED REMEDY. |
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| 37 | * |
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| 38 | * $brcm_Workfile: nexus_gpio.h $ |
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| 39 | * $brcm_Revision: 12 $ |
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| 40 | * $brcm_Date: 7/14/11 2:11p $ |
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| 41 | * |
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| 42 | * API Description: |
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| 43 | * API name: Gpio |
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| 44 | * Specific APIs related to Gpio Control. |
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| 45 | * |
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| 46 | * Revision History: |
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| 47 | * |
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| 48 | * $brcm_Log: /nexus/modules/gpio/7405/include/nexus_gpio.h $ |
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| 49 | * |
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| 50 | * 12 7/14/11 2:11p jtna |
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| 51 | * SW7405-5414: added NEXUS_GpioSettings.maskEdgeInterrupts |
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| 52 | * |
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| 53 | * 11 5/2/11 4:03p erickson |
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| 54 | * SW7422-75: clarify use of nexus_platform_features.h for GPIO type |
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| 55 | * values |
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| 56 | * |
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| 57 | * 10 12/6/10 10:53a erickson |
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| 58 | * SW7408-146: add NEXUS_Gpio_GetPinMux |
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| 59 | * |
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| 60 | * 9 10/11/10 3:46p erickson |
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| 61 | * SW7422-75: deprecate NEXUS_GpioType. convert from sparse array to |
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| 62 | * linked list. nexus_gpio_table.c is now responsible for bounds check. |
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| 63 | * this allows us to avoid updating generic code for chip-specific GPIO |
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| 64 | * blocks. |
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| 65 | * |
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| 66 | * 8 4/19/10 4:29p erickson |
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| 67 | * SW7405-4228: use NEXUS_Gpio_Open macro and |
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| 68 | * NEXUS_Gpio_OpenAux(typeAndPin) implementation to fix linux kernel mode |
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| 69 | * proxy callbacks for GPIO |
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| 70 | * |
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| 71 | * 7 4/16/10 11:42a erickson |
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| 72 | * SW35230-124: update comments |
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| 73 | * |
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| 74 | * 6 4/5/10 3:06p jhaberf |
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| 75 | * SW35230-124: Added TV-Micro enumeration |
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| 76 | * |
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| 77 | * 5 3/18/09 11:54a jgarrett |
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| 78 | * PR 53230: Chaning default GPIO state to input for safety |
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| 79 | * |
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| 80 | * 4 2/26/08 10:49p erickson |
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| 81 | * PR35457: improved comments |
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| 82 | * |
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| 83 | * 3 1/23/08 8:36p vobadm |
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| 84 | * PR35457: update docs |
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| 85 | * |
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| 86 | * 2 1/23/08 5:16p erickson |
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| 87 | * PR35457: update docs |
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| 88 | * |
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| 89 | * 1 1/18/08 2:21p jgarrett |
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| 90 | * PR 38808: Merging to main branch |
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| 91 | * |
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| 92 | * Nexus_Devel/4 11/29/07 2:25p erickson |
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| 93 | * PR35457: doc update for 0.5 release |
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| 94 | * |
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| 95 | ***************************************************************************/ |
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| 96 | #ifndef NEXUS_GPIO_H__ |
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| 97 | #define NEXUS_GPIO_H__ |
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| 98 | |
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| 99 | #ifdef __cplusplus |
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| 100 | extern "C" { |
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| 101 | #endif |
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| 102 | |
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| 103 | /*=********************* |
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| 104 | GPIO stands for General Purpose Input/Output. |
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| 105 | GPIO pins are used for external communication to and from the chip. |
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| 106 | |
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| 107 | A GPIO pin can be configured for output or input mode. |
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| 108 | In output mode, a value can be set. |
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| 109 | In input mode, a value can be read and callback can be received (based on an interrupt) when the value changes. |
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| 110 | |
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| 111 | See nexus/examples/io/gpio.c for an example application. |
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| 112 | ***********************/ |
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| 113 | |
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| 114 | /*************************************************************************** |
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| 115 | Summary: |
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| 116 | Handle for the GPIO Interface |
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| 117 | ***************************************************************************/ |
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| 118 | typedef struct NEXUS_Gpio *NEXUS_GpioHandle; |
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| 119 | |
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| 120 | /*************************************************************************** |
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| 121 | Summary: |
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| 122 | GPIO pin type macros for first param of NEXUS_Gpio_Open(TYPE, PIN, pSettings) |
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| 123 | |
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| 124 | Description: |
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| 125 | Chip-specific GPIO types are coded as macros to nexus_platform_features.h. |
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| 126 | These types may be common across certain families of chips, but will vary among chips over time. |
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| 127 | GPIO type values must be matched against the GPIO types implemented in the chip-specific nexus_gpio_table.c file. |
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| 128 | |
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| 129 | The following macros are provided for backward-compatibility to the NEXUS_GpioType enumeration. |
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| 130 | ***************************************************************************/ |
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| 131 | #define NEXUS_GpioType unsigned |
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| 132 | #define NEXUS_GpioType_eStandard 0 |
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| 133 | #define NEXUS_GpioType_eSpecial 1 |
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| 134 | #define NEXUS_GpioType_eTvMicro 2 |
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| 135 | #define NEXUS_GpioType_eMax 3 |
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| 136 | |
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| 137 | /*************************************************************************** |
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| 138 | Summary: |
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| 139 | GPIO pin modes |
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| 140 | |
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| 141 | Description: |
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| 142 | NEXUS_GpioMode is an enumeration which represents all GPIO pin modes |
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| 143 | supported by the GPIO interface. |
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| 144 | |
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| 145 | There are three GPIO pin types. They are input, push-pull output, or |
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| 146 | open-drain output. A standard GPIO could be programmed to be any one of |
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| 147 | the three types, and a special GPIO pin could only work in type of input |
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| 148 | and open-drain output. |
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| 149 | |
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| 150 | When programmed to be type of input, it can only be read from, and will |
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| 151 | not drive the bus or the port connected to it. The value read back could |
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| 152 | 0 (low) or 1 (high). |
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| 153 | |
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| 154 | During working as type of push-pull output, it is ideally the unique |
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| 155 | driver of the connected bus or port, till the type changes. The value |
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| 156 | to drive out is either 0 (low) or 1 (high). It could change by setting |
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| 157 | the value of the GPIO pin. However, it could also be read from, in order |
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| 158 | to monitor the activity. Driving 0 out is also called pull-down, and |
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| 159 | driving 1 out is called push-up. |
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| 160 | |
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| 161 | A pin of open drain output type is typically connected to a wired-AND |
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| 162 | bus line. The line is high (1) if no one pulls it down, and if any |
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| 163 | device pulls down it becomes low (0). The application program could |
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| 164 | read it and pulling it down (and then releasing it). |
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| 165 | |
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| 166 | Please notice that the type could be dynamically changed by software. It |
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| 167 | is possible that the application program sets the GPIO pin as input type, |
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| 168 | reads a few bits, and then changes the pin type to push-pull output and |
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| 169 | then writes a few bits, and so on. |
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| 170 | |
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| 171 | Used in NEXUS_GpioSettings |
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| 172 | ***************************************************************************/ |
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| 173 | typedef enum NEXUS_GpioMode |
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| 174 | { |
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| 175 | NEXUS_GpioMode_eInput, |
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| 176 | NEXUS_GpioMode_eOutputOpenDrain, |
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| 177 | NEXUS_GpioMode_eOutputPushPull, |
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| 178 | NEXUS_GpioMode_eMax |
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| 179 | } NEXUS_GpioMode; |
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| 180 | |
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| 181 | /*************************************************************************** |
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| 182 | Summary: |
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| 183 | The GPIO pin value |
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| 184 | |
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| 185 | Description: |
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| 186 | There are two possible values Low (0) and High (0) for a GPIO pin. |
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| 187 | NEXUS_GpioValue is an enumeration which represents them. |
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| 188 | |
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| 189 | A push-pull GPIO pin could drive both 0 (low) and 1 (high) out to the |
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| 190 | bus or connection port wired to this GPIO pin. A open-drain GPIO pin |
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| 191 | could pull-down the connected AND-wired bus line (0), till it releases |
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| 192 | it (1). |
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| 193 | |
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| 194 | The value of any GPIO pin could be read at any time. If a push-pull GPIO |
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| 195 | pin is read, its value would be the value it drives out. When a open- |
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| 196 | drain GPIO pin pulls-down, the value of 0 (low) will be returned by |
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| 197 | reading. After it releases the bus, the value read from the pin depends |
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| 198 | whether there is any other device on the bus that is pulling down the |
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| 199 | bus. |
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| 200 | |
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| 201 | Used in NEXUS_GpioSettings and NEXUS_GpioStatus |
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| 202 | ***************************************************************************/ |
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| 203 | typedef enum NEXUS_GpioValue |
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| 204 | { |
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| 205 | NEXUS_GpioValue_eLow = 0, /* low, driving low out means pull-down */ |
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| 206 | NEXUS_GpioValue_eHigh = 1, /* high, driven for PushPull - released for OpenDrain */ |
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| 207 | NEXUS_GpioValue_eMax |
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| 208 | } NEXUS_GpioValue; |
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| 209 | |
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| 210 | /*************************************************************************** |
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| 211 | Summary: |
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| 212 | GPIO pin interrupt mode |
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| 213 | |
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| 214 | Description: |
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| 215 | NEXUS_GpioInterrupt is an enumeration which represents whether an |
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| 216 | interrupt is disabled or enabled for a GPIO pin, and in what condition |
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| 217 | the GPIO pin should generate interrupt if it is enabled. |
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| 218 | |
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| 219 | Some chips only support edge triggering interrupt mode. In this mode the |
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| 220 | pin fires interrupt when its value changes. By default, the interrupt will remain |
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| 221 | enabled after firing. See NEXUS_GpioSettings.maskEdgeInterrupts for another option. |
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| 222 | |
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| 223 | Besides edge triggering mode, some chips also support level |
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| 224 | triggering. This corresponds to NEXUS_GpioInterrupt_eLow and eHigh. |
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| 225 | In this mode the pin drives the interrupt bit when it has the |
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| 226 | specified value. To clear a level-triggered interrupt and reenable interrupts, |
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| 227 | the user must call NEXUS_Gpio_ClearInterrupt. |
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| 228 | |
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| 229 | Used in NEXUS_GpioSettings |
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| 230 | ***************************************************************************/ |
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| 231 | typedef enum NEXUS_GpioInterrupt |
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| 232 | { |
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| 233 | NEXUS_GpioInterrupt_eDisabled, /* No interrupt */ |
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| 234 | NEXUS_GpioInterrupt_eRisingEdge, /* Interrupt on a 0->1 transition */ |
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| 235 | NEXUS_GpioInterrupt_eFallingEdge, /* Interrupt on a 1->0 transition */ |
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| 236 | NEXUS_GpioInterrupt_eEdge, /* Interrupt on both a 0->1 and a 1->0 transition */ |
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| 237 | NEXUS_GpioInterrupt_eLow, /* Interrupt on a 0 value */ |
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| 238 | NEXUS_GpioInterrupt_eHigh, /* Interrupt on a 1 value */ |
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| 239 | NEXUS_GpioInterrupt_eMax |
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| 240 | } NEXUS_GpioInterrupt; |
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| 241 | |
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| 242 | /*************************************************************************** |
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| 243 | Summary: |
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| 244 | GPIO pin settings |
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| 245 | ***************************************************************************/ |
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| 246 | typedef struct NEXUS_GpioSettings |
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| 247 | { |
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| 248 | NEXUS_GpioMode mode; /* Set if this is an input or output pin, and what type of output pin. */ |
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| 249 | NEXUS_GpioValue value; /* Used to set the value of an output pin. */ |
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| 250 | NEXUS_GpioInterrupt interruptMode; /* Set the interrupt mode of an input pin. */ |
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| 251 | NEXUS_CallbackDesc interrupt; /* Callback when value is changed in input mode. */ |
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| 252 | bool maskEdgeInterrupts; /* If true, all GPIO interrupts will be masked when processed. The user must call NEXUS_Gpio_ClearInterrupt to unmask. |
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| 253 | If false, edge-triggered (default) are not masked. Level-triggered interrupts are always masked. */ |
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| 254 | } NEXUS_GpioSettings; |
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| 255 | |
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| 256 | /*************************************************************************** |
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| 257 | Summary: |
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| 258 | Get default settings for the structure. |
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| 259 | |
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| 260 | Description: |
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| 261 | This is required in order to make application code resilient to the addition of new structure members in the future. |
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| 262 | ***************************************************************************/ |
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| 263 | void NEXUS_Gpio_GetDefaultSettings( |
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| 264 | NEXUS_GpioType type, /* unused */ |
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| 265 | NEXUS_GpioSettings *pSettings /* [out] */ |
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| 266 | ); |
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| 267 | |
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| 268 | /*************************************************************************** |
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| 269 | Summary: |
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| 270 | Open a GPIO Pin. |
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| 271 | |
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| 272 | Description: |
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| 273 | Users should call NEXUS_Gpio_Open, not NEXUS_Gpio_OpenAux. |
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| 274 | The internal NEXUS_Gpio_OpenAux implementation is required to marshall callbacks through a proxy layer. |
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| 275 | ***************************************************************************/ |
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| 276 | #define NEXUS_Gpio_Open(NEXUS_GPIOTYPE,PIN_NUMBER,PSETTINGS) NEXUS_Gpio_OpenAux((NEXUS_GPIOTYPE)<<16|(PIN_NUMBER),PSETTINGS) |
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| 277 | |
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| 278 | NEXUS_GpioHandle NEXUS_Gpio_OpenAux( |
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| 279 | unsigned typeAndPin, /* The number and type of the pin. These values are muxed together by the |
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| 280 | NEXUS_Gpio_Open macro for kernel mode proxy support. */ |
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| 281 | const NEXUS_GpioSettings *pSettings /* additional settings for the pin */ |
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| 282 | ); |
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| 283 | |
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| 284 | /*************************************************************************** |
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| 285 | Summary: |
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| 286 | Close a GPIO Pin. |
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| 287 | ***************************************************************************/ |
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| 288 | void NEXUS_Gpio_Close( |
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| 289 | NEXUS_GpioHandle handle |
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| 290 | ); |
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| 291 | |
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| 292 | /*************************************************************************** |
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| 293 | Summary: |
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| 294 | Set the settings for a GPIO pin. |
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| 295 | ***************************************************************************/ |
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| 296 | NEXUS_Error NEXUS_Gpio_SetSettings( |
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| 297 | NEXUS_GpioHandle handle, |
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| 298 | const NEXUS_GpioSettings *pSettings |
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| 299 | ); |
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| 300 | |
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| 301 | /*************************************************************************** |
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| 302 | Summary: |
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| 303 | Get the settings for a GPIO pin. |
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| 304 | |
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| 305 | Description: |
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| 306 | This is not the same as NEXUS_Gpio_GetStatus. |
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| 307 | This returns whatever was last set with NEXUS_Gpio_SetSettings, |
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| 308 | but the value may not be the actual value on a GPIO output pin. |
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| 309 | ***************************************************************************/ |
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| 310 | void NEXUS_Gpio_GetSettings( |
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| 311 | NEXUS_GpioHandle handle, |
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| 312 | NEXUS_GpioSettings *pSettings /* [out] */ |
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| 313 | ); |
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| 314 | |
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| 315 | /*************************************************************************** |
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| 316 | Summary: |
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| 317 | Status of a GPIO pin. |
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| 318 | ***************************************************************************/ |
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| 319 | typedef struct NEXUS_GpioStatus |
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| 320 | { |
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| 321 | NEXUS_GpioValue value; /* The data value of the pin. |
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| 322 | If the pin is in output mode, this will be the value set by NEXUS_GpioSettings.value. |
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| 323 | If the pin is in input mode, this will be the current value being driven to this pin. */ |
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| 324 | bool interruptPending; /* True if the interrupt callback has fired and NEXUS_Gpio_ClearInterrupt has not been cleared. */ |
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| 325 | } NEXUS_GpioStatus; |
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| 326 | |
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| 327 | /*************************************************************************** |
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| 328 | Summary: |
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| 329 | Get the status of a GPIO pin. |
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| 330 | ***************************************************************************/ |
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| 331 | NEXUS_Error NEXUS_Gpio_GetStatus( |
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| 332 | NEXUS_GpioHandle handle, |
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| 333 | NEXUS_GpioStatus *pStatus /* [out] */ |
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| 334 | ); |
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| 335 | |
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| 336 | /*************************************************************************** |
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| 337 | Summary: |
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| 338 | Clear a pending interrupt on a GPIO pin. |
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| 339 | |
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| 340 | Description: |
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| 341 | This call must be made after the NEXUS_GpioSettings.interrupt callback to receive the next interrupt callback. |
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| 342 | ***************************************************************************/ |
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| 343 | NEXUS_Error NEXUS_Gpio_ClearInterrupt( |
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| 344 | NEXUS_GpioHandle handle |
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| 345 | ); |
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| 346 | |
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| 347 | /*************************************************************************** |
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| 348 | Summary: |
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| 349 | Get RDB pin mux information about GPIO pins |
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| 350 | |
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| 351 | Description: |
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| 352 | Example code: |
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| 353 | |
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| 354 | NEXUS_Rdb_GetGpioPinMux(1, &addr, &mask, &shift); |
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| 355 | value = NEXUS_Platform_ReadRegister(addr); |
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| 356 | value &= ~mask; // set to zero to enable GPIO |
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| 357 | NEXUS_Platform_WriteRegister(addr, value); |
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| 358 | |
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| 359 | Returns a failure if the typeAndPin is invalid. |
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| 360 | ***************************************************************************/ |
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| 361 | NEXUS_Error NEXUS_Gpio_GetPinMux( |
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| 362 | unsigned typeAndPin, /* see NEXUS_Gpio_OpenAux for definition */ |
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| 363 | uint32_t *pAddr, /* [out] pinmux register address */ |
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| 364 | uint32_t *pMask, /* [out] bit mask for pinmux register (no shift required) */ |
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| 365 | unsigned *pShift /* [out] bit shift for pinmux register */ |
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| 366 | ); |
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| 367 | |
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| 368 | #ifdef __cplusplus |
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| 369 | } |
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| 370 | #endif |
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| 371 | |
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| 372 | #endif /* #ifndef NEXUS_GPIO_H__ */ |
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