source: svn/trunk/newcon3bcm2_21bu/toolchain/mips-linux-uclibc/include/linux/mtd/nand.h

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1/*
2 *  linux/include/linux/mtd/nand.h
3 *
4 *  Copyright (c) 2000 David Woodhouse <dwmw2@mvhi.com>
5 *                     Steven J. Hill <sjhill@realitydiluted.com>
6 *                     Thomas Gleixner <tglx@linutronix.de>
7 *
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 *
13 *  Info:
14 *   Contains standard defines and IDs for NAND flash devices
15 *
16 *  Changelog:
17 *   01-31-2000 DMW     Created
18 *   09-18-2000 SJH     Moved structure out of the Disk-On-Chip drivers
19 *                      so it can be used by other NAND flash device
20 *                      drivers. I also changed the copyright since none
21 *                      of the original contents of this file are specific
22 *                      to DoC devices. David can whack me with a baseball
23 *                      bat later if I did something naughty.
24 *   10-11-2000 SJH     Added private NAND flash structure for driver
25 *   10-24-2000 SJH     Added prototype for 'nand_scan' function
26 *   10-29-2001 TG      changed nand_chip structure to support
27 *                      hardwarespecific function for accessing control lines
28 *   02-21-2002 TG      added support for different read/write adress and
29 *                      ready/busy line access function
30 *   02-26-2002 TG      added chip_delay to nand_chip structure to optimize
31 *                      command delay times for different chips
32 *   04-28-2002 TG      OOB config defines moved from nand.c to avoid duplicate
33 *                      defines in jffs2/wbuf.c
34 *   08-07-2002 TG      forced bad block location to byte 5 of OOB, even if
35 *                      CONFIG_MTD_NAND_ECC_JFFS2 is not set
36 *   08-10-2002 TG      extensions to nand_chip structure to support HW-ECC
37 *
38 *   08-29-2002 tglx    nand_chip structure: data_poi for selecting
39 *                      internal / fs-driver buffer
40 *                      support for 6byte/512byte hardware ECC
41 *                      read_ecc, write_ecc extended for different oob-layout
42 *                      oob layout selections: NAND_NONE_OOB, NAND_JFFS2_OOB,
43 *                      NAND_YAFFS_OOB
44 *  11-25-2002 tglx     Added Manufacturer code FUJITSU, NATIONAL
45 *                      Split manufacturer and device ID structures
46 *
47 *  02-08-2004 tglx     added option field to nand structure for chip anomalities
48 *  05-25-2004 tglx     added bad block table support, ST-MICRO manufacturer id
49 *                      update of nand_chip structure description
50 */
51#ifndef __LINUX_MTD_NAND_H
52#define __LINUX_MTD_NAND_H
53
54#include <linux/wait.h>
55#include <linux/mtd/mtd.h>
56
57struct mtd_info;
58/* Scan and identify a NAND device */
59extern int nand_scan (struct mtd_info *mtd, int max_chips);
60/* Free resources held by the NAND device */
61extern void nand_release (struct mtd_info *mtd);
62
63/* Read raw data from the device without ECC */
64extern int nand_read_raw (struct mtd_info *mtd, uint8_t *buf, loff_t from, size_t len, size_t ooblen);
65
66
67/* The maximum number of NAND chips in an array */
68#define NAND_MAX_CHIPS          8
69
70/* This constant declares the max. oobsize / page, which
71 * is supported now. If you add a chip with bigger oobsize/page
72 * adjust this accordingly.
73 */
74#define NAND_MAX_OOBSIZE        64
75
76/*
77 * Constants for hardware specific CLE/ALE/NCE function
78*/
79/* Select the chip by setting nCE to low */
80#define NAND_CTL_SETNCE         1
81/* Deselect the chip by setting nCE to high */
82#define NAND_CTL_CLRNCE         2
83/* Select the command latch by setting CLE to high */
84#define NAND_CTL_SETCLE         3
85/* Deselect the command latch by setting CLE to low */
86#define NAND_CTL_CLRCLE         4
87/* Select the address latch by setting ALE to high */
88#define NAND_CTL_SETALE         5
89/* Deselect the address latch by setting ALE to low */
90#define NAND_CTL_CLRALE         6
91/* Set write protection by setting WP to high. Not used! */
92#define NAND_CTL_SETWP          7
93/* Clear write protection by setting WP to low. Not used! */
94#define NAND_CTL_CLRWP          8
95
96/*
97 * Standard NAND flash commands
98 */
99#define NAND_CMD_READ0          0
100#define NAND_CMD_READ1          1
101#define NAND_CMD_PAGEPROG       0x10
102#define NAND_CMD_READOOB        0x50
103#define NAND_CMD_ERASE1         0x60
104#define NAND_CMD_STATUS         0x70
105#define NAND_CMD_STATUS_MULTI   0x71
106#define NAND_CMD_SEQIN          0x80
107#define NAND_CMD_READID         0x90
108#define NAND_CMD_ERASE2         0xd0
109#define NAND_CMD_RESET          0xff
110
111/* Extended commands for large page devices */
112#define NAND_CMD_READSTART      0x30
113#define NAND_CMD_CACHEDPROG     0x15
114
115/* Status bits */
116#define NAND_STATUS_FAIL        0x01
117#define NAND_STATUS_FAIL_N1     0x02
118#define NAND_STATUS_TRUE_READY  0x20
119#define NAND_STATUS_READY       0x40
120#define NAND_STATUS_WP          0x80
121
122/*
123 * Constants for ECC_MODES
124 */
125
126/* No ECC. Usage is not recommended ! */
127#define NAND_ECC_NONE           0
128/* Software ECC 3 byte ECC per 256 Byte data */
129#define NAND_ECC_SOFT           1
130/* Hardware ECC 3 byte ECC per 256 Byte data */
131#define NAND_ECC_HW3_256        2
132/* Hardware ECC 3 byte ECC per 512 Byte data */
133#define NAND_ECC_HW3_512        3
134/* Hardware ECC 3 byte ECC per 512 Byte data */
135#define NAND_ECC_HW6_512        4
136/* Hardware ECC 8 byte ECC per 512 Byte data */
137#define NAND_ECC_HW8_512        6
138/* Hardware ECC 12 byte ECC per 2048 Byte data */
139#define NAND_ECC_HW12_2048      7
140
141/*
142 * Constants for Hardware ECC
143*/
144/* Reset Hardware ECC for read */
145#define NAND_ECC_READ           0
146/* Reset Hardware ECC for write */
147#define NAND_ECC_WRITE          1
148/* Enable Hardware ECC before syndrom is read back from flash */
149#define NAND_ECC_READSYN        2
150
151/* Option constants for bizarre disfunctionality and real
152*  features
153*/
154/* Chip can not auto increment pages */
155#define NAND_NO_AUTOINCR        0x00000001
156/* Buswitdh is 16 bit */
157#define NAND_BUSWIDTH_16        0x00000002
158/* Device supports partial programming without padding */
159#define NAND_NO_PADDING         0x00000004
160/* Chip has cache program function */
161#define NAND_CACHEPRG           0x00000008
162/* Chip has copy back function */
163#define NAND_COPYBACK           0x00000010
164/* AND Chip which has 4 banks and a confusing page / block
165 * assignment. See Renesas datasheet for further information */
166#define NAND_IS_AND             0x00000020
167/* Chip has a array of 4 pages which can be read without
168 * additional ready /busy waits */
169#define NAND_4PAGE_ARRAY        0x00000040
170
171/* Options valid for Samsung large page devices */
172#define NAND_SAMSUNG_LP_OPTIONS \
173        (NAND_NO_PADDING | NAND_CACHEPRG | NAND_COPYBACK)
174
175/* Macros to identify the above */
176#define NAND_CANAUTOINCR(chip) (!(chip->options & NAND_NO_AUTOINCR))
177#define NAND_MUST_PAD(chip) (!(chip->options & NAND_NO_PADDING))
178#define NAND_HAS_CACHEPROG(chip) ((chip->options & NAND_CACHEPRG))
179#define NAND_HAS_COPYBACK(chip) ((chip->options & NAND_COPYBACK))
180
181/* Mask to zero out the chip options, which come from the id table */
182#define NAND_CHIPOPTIONS_MSK    (0x0000ffff & ~NAND_NO_AUTOINCR)
183
184/* Non chip related options */
185/* Use a flash based bad block table. This option is passed to the
186 * default bad block table function. */
187#define NAND_USE_FLASH_BBT      0x00010000
188/* The hw ecc generator provides a syndrome instead a ecc value on read
189 * This can only work if we have the ecc bytes directly behind the
190 * data bytes. Applies for DOC and AG-AND Renesas HW Reed Solomon generators */
191#define NAND_HWECC_SYNDROME     0x00020000
192
193
194/* Options set by nand scan */
195/* Nand scan has allocated oob_buf */
196#define NAND_OOBBUF_ALLOC       0x40000000
197/* Nand scan has allocated data_buf */
198#define NAND_DATABUF_ALLOC      0x80000000
199
200
201/*
202 * nand_state_t - chip states
203 * Enumeration for NAND flash chip state
204 */
205typedef enum {
206        FL_READY,
207        FL_READING,
208        FL_WRITING,
209        FL_ERASING,
210        FL_SYNCING,
211        FL_CACHEDPRG,
212} nand_state_t;
213
214/* Keep gcc happy */
215struct nand_chip;
216
217/**
218 * struct nand_hw_control - Control structure for hardware controller (e.g ECC generator) shared among independend devices
219 * @lock:               protection lock 
220 * @active:             the mtd device which holds the controller currently
221 */
222struct nand_hw_control {
223        spinlock_t       lock;
224        struct nand_chip *active;
225};
226
227/**
228 * struct nand_chip - NAND Private Flash Chip Data
229 * @IO_ADDR_R:          [BOARDSPECIFIC] address to read the 8 I/O lines of the flash device
230 * @IO_ADDR_W:          [BOARDSPECIFIC] address to write the 8 I/O lines of the flash device
231 * @read_byte:          [REPLACEABLE] read one byte from the chip
232 * @write_byte:         [REPLACEABLE] write one byte to the chip
233 * @read_word:          [REPLACEABLE] read one word from the chip
234 * @write_word:         [REPLACEABLE] write one word to the chip
235 * @write_buf:          [REPLACEABLE] write data from the buffer to the chip
236 * @read_buf:           [REPLACEABLE] read data from the chip into the buffer
237 * @verify_buf:         [REPLACEABLE] verify buffer contents against the chip data
238 * @select_chip:        [REPLACEABLE] select chip nr
239 * @block_bad:          [REPLACEABLE] check, if the block is bad
240 * @block_markbad:      [REPLACEABLE] mark the block bad
241 * @hwcontrol:          [BOARDSPECIFIC] hardwarespecific function for accesing control-lines
242 * @dev_ready:          [BOARDSPECIFIC] hardwarespecific function for accesing device ready/busy line
243 *                      If set to NULL no access to ready/busy is available and the ready/busy information
244 *                      is read from the chip status register
245 * @cmdfunc:            [REPLACEABLE] hardwarespecific function for writing commands to the chip
246 * @waitfunc:           [REPLACEABLE] hardwarespecific function for wait on ready
247 * @calculate_ecc:      [REPLACEABLE] function for ecc calculation or readback from ecc hardware
248 * @correct_data:       [REPLACEABLE] function for ecc correction, matching to ecc generator (sw/hw)
249 * @enable_hwecc:       [BOARDSPECIFIC] function to enable (reset) hardware ecc generator. Must only
250 *                      be provided if a hardware ECC is available
251 * @erase_cmd:          [INTERN] erase command write function, selectable due to AND support
252 * @scan_bbt:           [REPLACEABLE] function to scan bad block table
253 * @eccmode:            [BOARDSPECIFIC] mode of ecc, see defines
254 * @eccsize:            [INTERN] databytes used per ecc-calculation
255 * @eccbytes:           [INTERN] number of ecc bytes per ecc-calculation step
256 * @eccsteps:           [INTERN] number of ecc calculation steps per page
257 * @chip_delay:         [BOARDSPECIFIC] chip dependent delay for transfering data from array to read regs (tR)
258 * @chip_lock:          [INTERN] spinlock used to protect access to this structure and the chip
259 * @wq:                 [INTERN] wait queue to sleep on if a NAND operation is in progress
260 * @state:              [INTERN] the current state of the NAND device
261 * @page_shift:         [INTERN] number of address bits in a page (column address bits)
262 * @phys_erase_shift:   [INTERN] number of address bits in a physical eraseblock
263 * @bbt_erase_shift:    [INTERN] number of address bits in a bbt entry
264 * @chip_shift:         [INTERN] number of address bits in one chip
265 * @data_buf:           [INTERN] internal buffer for one page + oob
266 * @oob_buf:            [INTERN] oob buffer for one eraseblock
267 * @oobdirty:           [INTERN] indicates that oob_buf must be reinitialized
268 * @data_poi:           [INTERN] pointer to a data buffer
269 * @options:            [BOARDSPECIFIC] various chip options. They can partly be set to inform nand_scan about
270 *                      special functionality. See the defines for further explanation
271 * @badblockpos:        [INTERN] position of the bad block marker in the oob area
272 * @numchips:           [INTERN] number of physical chips
273 * @chipsize:           [INTERN] the size of one chip for multichip arrays
274 * @pagemask:           [INTERN] page number mask = number of (pages / chip) - 1
275 * @pagebuf:            [INTERN] holds the pagenumber which is currently in data_buf
276 * @autooob:            [REPLACEABLE] the default (auto)placement scheme
277 * @bbt:                [INTERN] bad block table pointer
278 * @bbt_td:             [REPLACEABLE] bad block table descriptor for flash lookup
279 * @bbt_md:             [REPLACEABLE] bad block table mirror descriptor
280 * @badblock_pattern:   [REPLACEABLE] bad block scan pattern used for initial bad block scan
281 * @controller:         [OPTIONAL] a pointer to a hardware controller structure which is shared among multiple independend devices
282 * @priv:               [OPTIONAL] pointer to private chip date
283 */
284 
285struct nand_chip {
286        void    *IO_ADDR_R;
287        void    *IO_ADDR_W;
288       
289        u_char          (*read_byte)(struct mtd_info *mtd);
290        void            (*write_byte)(struct mtd_info *mtd, u_char byte);
291        __u16           (*read_word)(struct mtd_info *mtd);
292        void            (*write_word)(struct mtd_info *mtd, __u16 word);
293       
294        void            (*write_buf)(struct mtd_info *mtd, const u_char *buf, int len);
295        void            (*read_buf)(struct mtd_info *mtd, u_char *buf, int len);
296        int             (*verify_buf)(struct mtd_info *mtd, const u_char *buf, int len);
297        void            (*select_chip)(struct mtd_info *mtd, int chip);
298        int             (*block_bad)(struct mtd_info *mtd, loff_t ofs, int getchip);
299        int             (*block_markbad)(struct mtd_info *mtd, loff_t ofs);
300        void            (*hwcontrol)(struct mtd_info *mtd, int cmd);
301        int             (*dev_ready)(struct mtd_info *mtd);
302        void            (*cmdfunc)(struct mtd_info *mtd, unsigned command, int column, int page_addr);
303        int             (*waitfunc)(struct mtd_info *mtd, struct nand_chip *this, int state);
304        int             (*calculate_ecc)(struct mtd_info *mtd, const u_char *dat, u_char *ecc_code);
305        int             (*correct_data)(struct mtd_info *mtd, u_char *dat, u_char *read_ecc, u_char *calc_ecc);
306        void            (*enable_hwecc)(struct mtd_info *mtd, int mode);
307        void            (*erase_cmd)(struct mtd_info *mtd, int page);
308        int             (*scan_bbt)(struct mtd_info *mtd);
309        int             eccmode;
310        int             eccsize;
311        int             eccbytes;
312        int             eccsteps;
313        int             chip_delay;
314        spinlock_t      chip_lock;
315        wait_queue_head_t wq;
316        nand_state_t    state;
317        int             page_shift;
318        int             phys_erase_shift;
319        int             bbt_erase_shift;
320        int             chip_shift;
321        u_char          *data_buf;
322        u_char          *oob_buf;
323        int             oobdirty;
324        u_char          *data_poi;
325        unsigned int    options;
326        int             badblockpos;
327        int             numchips;
328        unsigned long   chipsize;
329        int             pagemask;
330        int             pagebuf;
331        struct nand_oobinfo     *autooob;
332        uint8_t         *bbt;
333        struct nand_bbt_descr   *bbt_td;
334        struct nand_bbt_descr   *bbt_md;
335        struct nand_bbt_descr   *badblock_pattern;
336        struct nand_hw_control  *controller;
337        void            *priv;
338};
339
340/*
341 * NAND Flash Manufacturer ID Codes
342 */
343#define NAND_MFR_TOSHIBA        0x98
344#define NAND_MFR_SAMSUNG        0xec
345#define NAND_MFR_FUJITSU        0x04
346#define NAND_MFR_NATIONAL       0x8f
347#define NAND_MFR_RENESAS        0x07
348#define NAND_MFR_STMICRO        0x20
349
350/**
351 * struct nand_flash_dev - NAND Flash Device ID Structure
352 *
353 * @name:       Identify the device type
354 * @id:         device ID code
355 * @pagesize:   Pagesize in bytes. Either 256 or 512 or 0
356 *              If the pagesize is 0, then the real pagesize
357 *              and the eraseize are determined from the
358 *              extended id bytes in the chip
359 * @erasesize:  Size of an erase block in the flash device.
360 * @chipsize:   Total chipsize in Mega Bytes
361 * @options:    Bitfield to store chip relevant options
362 */
363struct nand_flash_dev {
364        char *name;
365        int id;
366        unsigned long pagesize;
367        unsigned long chipsize;
368        unsigned long erasesize;
369        unsigned long options;
370};
371
372/**
373 * struct nand_manufacturers - NAND Flash Manufacturer ID Structure
374 * @name:       Manufacturer name
375 * @id:         manufacturer ID code of device.
376*/
377struct nand_manufacturers {
378        int id;
379        char * name;
380};
381
382extern struct nand_flash_dev nand_flash_ids[];
383extern struct nand_manufacturers nand_manuf_ids[];
384
385/**
386 * struct nand_bbt_descr - bad block table descriptor
387 * @options:    options for this descriptor
388 * @pages:      the page(s) where we find the bbt, used with option BBT_ABSPAGE
389 *              when bbt is searched, then we store the found bbts pages here.
390 *              Its an array and supports up to 8 chips now
391 * @offs:       offset of the pattern in the oob area of the page
392 * @veroffs:    offset of the bbt version counter in the oob are of the page
393 * @version:    version read from the bbt page during scan
394 * @len:        length of the pattern, if 0 no pattern check is performed
395 * @maxblocks:  maximum number of blocks to search for a bbt. This number of
396 *              blocks is reserved at the end of the device where the tables are
397 *              written.
398 * @reserved_block_code: if non-0, this pattern denotes a reserved (rather than
399 *              bad) block in the stored bbt
400 * @pattern:    pattern to identify bad block table or factory marked good /
401 *              bad blocks, can be NULL, if len = 0
402 *
403 * Descriptor for the bad block table marker and the descriptor for the
404 * pattern which identifies good and bad blocks. The assumption is made
405 * that the pattern and the version count are always located in the oob area
406 * of the first block.
407 */
408struct nand_bbt_descr {
409        int     options;
410        int     pages[NAND_MAX_CHIPS];
411        int     offs;
412        int     veroffs;
413        uint8_t version[NAND_MAX_CHIPS];
414        int     len;
415        int     maxblocks;
416        int     reserved_block_code;
417        uint8_t *pattern;
418};
419
420/* Options for the bad block table descriptors */
421
422/* The number of bits used per block in the bbt on the device */
423#define NAND_BBT_NRBITS_MSK     0x0000000F
424#define NAND_BBT_1BIT           0x00000001
425#define NAND_BBT_2BIT           0x00000002
426#define NAND_BBT_4BIT           0x00000004
427#define NAND_BBT_8BIT           0x00000008
428/* The bad block table is in the last good block of the device */
429#define NAND_BBT_LASTBLOCK      0x00000010
430/* The bbt is at the given page, else we must scan for the bbt */
431#define NAND_BBT_ABSPAGE        0x00000020
432/* The bbt is at the given page, else we must scan for the bbt */
433#define NAND_BBT_SEARCH         0x00000040
434/* bbt is stored per chip on multichip devices */
435#define NAND_BBT_PERCHIP        0x00000080
436/* bbt has a version counter at offset veroffs */
437#define NAND_BBT_VERSION        0x00000100
438/* Create a bbt if none axists */
439#define NAND_BBT_CREATE         0x00000200
440/* Search good / bad pattern through all pages of a block */
441#define NAND_BBT_SCANALLPAGES   0x00000400
442/* Scan block empty during good / bad block scan */
443#define NAND_BBT_SCANEMPTY      0x00000800
444/* Write bbt if neccecary */
445#define NAND_BBT_WRITE          0x00001000
446/* Read and write back block contents when writing bbt */
447#define NAND_BBT_SAVECONTENT    0x00002000
448/* Search good / bad pattern on the first and the second page */
449#define NAND_BBT_SCAN2NDPAGE    0x00004000
450
451/* The maximum number of blocks to scan for a bbt */
452#define NAND_BBT_SCAN_MAXBLOCKS 4
453
454extern int nand_scan_bbt (struct mtd_info *mtd, struct nand_bbt_descr *bd);
455extern int nand_update_bbt (struct mtd_info *mtd, loff_t offs);
456extern int nand_default_bbt (struct mtd_info *mtd);
457extern int nand_isbad_bbt (struct mtd_info *mtd, loff_t offs, int allowbbt);
458extern int nand_erase_nand (struct mtd_info *mtd, struct erase_info *instr, int allowbbt);
459
460/*
461* Constants for oob configuration
462*/
463#define NAND_SMALL_BADBLOCK_POS         5
464#define NAND_LARGE_BADBLOCK_POS         0
465
466#endif /* __LINUX_MTD_NAND_H */
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