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MxL201RF.c @ 22

Last change on this file since 22 was 22, checked in by phkim, 11 years ago
phkim newcon3sk 를 kctv 로 브랜치 함
Property svn:executable set to ``*
File size: 9.7 KB

Line
1	/*
2	MxL201RF Source Code : V6.2.5.0
3
4	Copyright, Maxlinear, Inc.
5	All Rights Reserved
6
7	File Name: MxL201RF.c
8
9	Description: The source code is for MxL201RF user to quickly integrate MxL201RF into their software.
10	There are two functions the user can call to generate a array of I2C command that's require to
11	program the MxL201RF tuner. The user should pass an array pointer and an integer pointer in to the
12	function. The funciton will fill up the array with format like follow:
13
14	addr1
15	data1
16	addr2
17	data2
18	...
19
20	The user can then pass this array to their I2C function to perform progromming the tuner.
21	*/
22	/* #include "StdAfx.h" */
23
24	#include "MxL201RF_Common.h"
25	#include "MxL201RF.h"
26
27	#include <stddef.h>//csm test for NULL
28
29
30
31	UINT32 MxL201RF_Init(UINT8* pArray, /* a array pointer that store the addr and data pairs for I2C write */
32	UINT32* Array_Size, /* a integer pointer that store the number of element in above array */
33	UINT8 Mode,
34	UINT32 Xtal_Freq_Hz,
35	UINT32 IF_Freq_Hz,
36	UINT8 Invert_IF,
37	UINT8 Clk_Out_Enable,
38	UINT8 Clk_Out_Amp,
39	UINT8 Xtal_Cap
40	)
41	{
42
43	UINT32 Reg_Index=0;
44	UINT32 Array_Index=0;
45
46	/* Terrestial register settings */
47	IRVType IRV_Init[]=
48	{
49	/* { Addr, Data} */
50	{ 0x02, 0x06},
51	{ 0x03, 0x1A},
52	{ 0x04, 0x14},
53	{ 0x05, 0x0E},
54	{ 0x0C, 0x00},
55	{ 0x07, 0x01},
56	{ 0x93, 0xD7},
57	{ 0x95, 0x61},
58	{ 0xA2, 0x00},
59	{ 0x2F, 0x00},
60	{ 0x60, 0x60},
61	{ 0x70, 0x00},
62	{ 0xB9, 0x10},
63	{ 0x8E, 0x57},
64	{ 0x58, 0x08},
65	{ 0x5C, 0x00},
66	{ 0x01, 0x01}, /TOP_MASTER_ENABLE=1 /
67	{ 0, 0}
68	};
69
70	IRVType IRV_Init_Cable[]=
71	{
72	/{ Addr, Data} /
73	{ 0x02, 0x06},
74	{ 0x03, 0x1A},
75	{ 0x04, 0x14},
76	{ 0x05, 0x0E},
77	{ 0x0C, 0x00},
78	{ 0x07, 0x14},
79	{ 0x29, 0x03},
80	{ 0x45, 0x01},
81	{ 0x7A, 0xCF},
82	{ 0x7C, 0x7C},
83	{ 0x7E, 0x27},
84	{ 0x93, 0xD7},
85	{ 0x99, 0x40},
86	{ 0x2F, 0x00},
87	{ 0x60, 0x60},
88	{ 0x70, 0x00},
89	{ 0xB9, 0x10},
90	{ 0x8E, 0x57},
91	{ 0x58, 0x08},
92	{ 0x5C, 0x00},
93	{ 0x48, 0x37},
94	{ 0x55, 0x06},
95	{ 0x01, 0x01}, /TOP_MASTER_ENABLE=1 /
96	{ 0, 0}
97	};
98	/edit Init setting here /
99
100	PIRVType myIRV = NULL;
101
102	switch(Mode)
103	{
104
105	case MxL_MODE_DVBT: /DVBT Mode /
106	myIRV = IRV_Init;
107	SetIRVBit(myIRV, 0x07, 0x1F, 0x01);
108	SetIRVBit(myIRV, 0xA2, 0xFF, 0x02);
109	break;
110	case MxL_MODE_ATSC: /ATSC Mode /
111	myIRV = IRV_Init;
112	SetIRVBit(myIRV, 0x07, 0x1F, 0x02);
113	break;
114	case MxL_MODE_CAB_OPT1: /Cable Option 1 Mode /
115	myIRV = IRV_Init_Cable;
116	SetIRVBit(myIRV, 0x29, 0xFF, 0x09);
117	SetIRVBit(myIRV, 0x45, 0xFF, 0x01);
118	SetIRVBit(myIRV, 0x7A, 0xFF, 0x6F);
119	SetIRVBit(myIRV, 0x7C, 0xFF, 0x1C);
120	SetIRVBit(myIRV, 0x7E, 0xFF, 0x5A);
121	SetIRVBit(myIRV, 0x93, 0xFF, 0xF7);
122	break;
123	case MxL_MODE_CAB_STD: /Cable Standard Mode /
124	myIRV = IRV_Init_Cable;
125	SetIRVBit(myIRV, 0x45, 0xFF, 0x01);
126	SetIRVBit(myIRV, 0x7A, 0xFF, 0x6F);
127	SetIRVBit(myIRV, 0x7C, 0xFF, 0x1C);
128	SetIRVBit(myIRV, 0x7E, 0xFF, 0x7C);
129	SetIRVBit(myIRV, 0x93, 0xFF, 0xE7);
130	break;
131	default:
132	return MxL_ERR_INIT;
133	}
134
135	switch(IF_Freq_Hz)
136	{
137	case MxL_IF_4_MHZ:
138	SetIRVBit(myIRV, 0x02, 0x0F, 0x01);
139	break;
140	case MxL_IF_4_5_MHZ:
141	SetIRVBit(myIRV, 0x02, 0x0F, 0x02);
142	break;
143	case MxL_IF_4_57_MHZ:
144	SetIRVBit(myIRV, 0x02, 0x0F, 0x03);
145	break;
146	case MxL_IF_5_MHZ:
147	SetIRVBit(myIRV, 0x02, 0x0F, 0x04);
148	break;
149	case MxL_IF_5_38_MHZ:
150	SetIRVBit(myIRV, 0x02, 0x0F, 0x05);
151	break;
152	case MxL_IF_6_MHZ:
153	SetIRVBit(myIRV, 0x02, 0x0F, 0x06);
154	break;
155	case MxL_IF_6_28_MHZ:
156	SetIRVBit(myIRV, 0x02, 0x0F, 0x07);
157	break;
158	case MxL_IF_7_2_MHZ:
159	SetIRVBit(myIRV, 0x02, 0x0F, 0x08);
160	break;
161	case MxL_IF_35_25_MHZ:
162	SetIRVBit(myIRV, 0x02, 0x0F, 0x09);
163	break;
164	case MxL_IF_36_MHZ:
165	SetIRVBit(myIRV, 0x02, 0x0F, 0x0A);
166	break;
167	case MxL_IF_36_15_MHZ:
168	SetIRVBit(myIRV, 0x02, 0x0F, 0x0B);
169	break;
170	case MxL_IF_44_MHZ:
171	SetIRVBit(myIRV, 0x02, 0x0F, 0x0C);
172	break;
173	default:
174	return MxL_ERR_IF_FREQ;
175	}
176
177
178	if(Invert_IF)
179	SetIRVBit(myIRV, 0x02, 0x10, 0x10); /Invert IF/
180	else
181	SetIRVBit(myIRV, 0x02, 0x10, 0x00); /Normal IF/
182
183
184	switch(Xtal_Freq_Hz)
185	{
186	case MxL_XTAL_16_MHZ:
187	SetIRVBit(myIRV, 0x04, 0x0F, 0x00);
188	SetIRVBit(myIRV, 0x58, 0x03, 0x03);
189	SetIRVBit(myIRV, 0x5C, 0xFF, 0x36);
190	break;
191	case MxL_XTAL_20_MHZ:
192	SetIRVBit(myIRV, 0x04, 0x0F, 0x01);
193	SetIRVBit(myIRV, 0x58, 0x03, 0x03);
194	SetIRVBit(myIRV, 0x5C, 0xFF, 0x2B);
195	break;
196	case MxL_XTAL_20_25_MHZ:
197	SetIRVBit(myIRV, 0x04, 0x0F, 0x02);
198	SetIRVBit(myIRV, 0x58, 0x03, 0x03);
199	SetIRVBit(myIRV, 0x5C, 0xFF, 0x2A);
200	break;
201	case MxL_XTAL_20_48_MHZ:
202	SetIRVBit(myIRV, 0x04, 0x0F, 0x03);
203	SetIRVBit(myIRV, 0x58, 0x03, 0x03);
204	SetIRVBit(myIRV, 0x5C, 0xFF, 0x2A);
205	break;
206	case MxL_XTAL_24_MHZ:
207	SetIRVBit(myIRV, 0x04, 0x0F, 0x04);
208	SetIRVBit(myIRV, 0x58, 0x03, 0x00);
209	SetIRVBit(myIRV, 0x5C, 0xFF, 0x48);
210	break;
211	case MxL_XTAL_25_MHZ:
212	SetIRVBit(myIRV, 0x04, 0x0F, 0x05);
213	SetIRVBit(myIRV, 0x58, 0x03, 0x00);
214	SetIRVBit(myIRV, 0x5C, 0xFF, 0x45);
215	break;
216	case MxL_XTAL_25_14_MHZ:
217	SetIRVBit(myIRV, 0x04, 0x0F, 0x06);
218	SetIRVBit(myIRV, 0x58, 0x03, 0x00);
219	SetIRVBit(myIRV, 0x5C, 0xFF, 0x44);
220	break;
221	case MxL_XTAL_28_8_MHZ:
222	SetIRVBit(myIRV, 0x04, 0x0F, 0x08);
223	SetIRVBit(myIRV, 0x58, 0x03, 0x00);
224	SetIRVBit(myIRV, 0x5C, 0xFF, 0x3C);
225	break;
226	case MxL_XTAL_32_MHZ:
227	SetIRVBit(myIRV, 0x04, 0x0F, 0x09);
228	SetIRVBit(myIRV, 0x58, 0x03, 0x00);
229	SetIRVBit(myIRV, 0x5C, 0xFF, 0x36);
230	break;
231	case MxL_XTAL_40_MHZ:
232	SetIRVBit(myIRV, 0x04, 0x0F, 0x0A);
233	SetIRVBit(myIRV, 0x58, 0x03, 0x00);
234	SetIRVBit(myIRV, 0x5C, 0xFF, 0x2B);
235	break;
236	case MxL_XTAL_44_MHZ:
237	SetIRVBit(myIRV, 0x04, 0x0F, 0x0B);
238	SetIRVBit(myIRV, 0x58, 0x03, 0x02);
239	SetIRVBit(myIRV, 0x5C, 0xFF, 0x4E);
240	break;
241	case MxL_XTAL_48_MHZ:
242	SetIRVBit(myIRV, 0x04, 0x0F, 0x0C);
243	SetIRVBit(myIRV, 0x58, 0x03, 0x02);
244	SetIRVBit(myIRV, 0x5C, 0xFF, 0x48);
245	break;
246	case MxL_XTAL_49_3811_MHZ:
247	SetIRVBit(myIRV, 0x04, 0x0F, 0x0D);
248	SetIRVBit(myIRV, 0x58, 0x03, 0x02);
249	SetIRVBit(myIRV, 0x5C, 0xFF, 0x45);
250	break;
251	default:
252	return MxL_ERR_XTAL_FREQ;
253	}
254
255	if(!Clk_Out_Enable) /default is enable /
256	SetIRVBit(myIRV, 0x03, 0x10, 0x00);
257
258	/* Clk_Out_Amp */
259	SetIRVBit(myIRV, 0x03, 0x0F, Clk_Out_Amp);
260
261	/* Xtal Capacitor */
262	if (Xtal_Cap >0 && Xtal_Cap <=25)
263	SetIRVBit(myIRV, 0x05, 0xFF, Xtal_Cap);
264	else if (Xtal_Cap == 0)
265	SetIRVBit(myIRV, 0x05, 0xFF, 0x3F);
266	else
267	return MxL_ERR_INIT;
268
269
270	/* Generate one Array that Contain Data, Address */
271	while (myIRV[Reg_Index].Num \|\| myIRV[Reg_Index].Val)
272	{
273	pArray[Array_Index++] = myIRV[Reg_Index].Num;
274	pArray[Array_Index++] = myIRV[Reg_Index].Val;
275	Reg_Index++;
276	}
277
278	*Array_Size=Array_Index;
279	return MxL_OK;
280	}
281
282
283	UINT32 MxL201RF_RFTune(UINT8* pArray,
284	UINT32* Array_Size,
285	UINT32 RF_Freq,
286	UINT8 BWMHz,
287	UINT8 Mode
288	)
289
290	{
291	IRVType IRV_RFTune[]=
292	{
293	/{ Addr, Data} /
294	{ 0x10, 0x00}, /abort tune/
295	{ 0x0D, 0x15},
296	{ 0x0E, 0x40},
297	{ 0x0F, 0x0E},
298	{ 0xAB, 0x10},
299	{ 0x91, 0x00},
300	{ 0, 0}
301	};
302
303	UINT32 dig_rf_freq=0;
304	UINT32 rf_freq_MHz = 0;
305	UINT32 temp = 0 ;
306	UINT32 Reg_Index=0;
307	UINT32 Array_Index=0;
308	UINT32 i = 0;
309	UINT32 frac_divider = 1000000;
310
311	rf_freq_MHz = RF_Freq/MHz;
312
313	switch(Mode)
314	{
315	case MxL_MODE_CAB_OPT1: /* CABLE */
316	case MxL_MODE_DVBT: /* DVB-T */
317	switch(BWMHz)
318	{
319	case MxL_BW_6MHz:
320	SetIRVBit(IRV_RFTune, 0x0D, 0xFF, 0x95);
321	break;
322	case MxL_BW_7MHz:
323	SetIRVBit(IRV_RFTune, 0x0D, 0xFF, 0xAA);
324	break;
325	case MxL_BW_8MHz:
326	SetIRVBit(IRV_RFTune, 0x0D, 0xFF, 0xBF);
327	break;
328	default:
329	return MxL_ERR_RFTUNE;
330	}
331	break;
332
333	case MxL_MODE_ATSC: /ATSC /
334	SetIRVBit(IRV_RFTune, 0x0D, 0xFF, 0x99);
335	break;
336
337	case MxL_MODE_CAB_STD: /CABLE /
338	switch(BWMHz)
339	{
340	case MxL_BW_6MHz:
341	SetIRVBit(IRV_RFTune, 0x0D, 0xFF, 0x49);
342	break;
343	case MxL_BW_7MHz:
344	SetIRVBit(IRV_RFTune, 0x0D, 0xFF, 0x5A);
345	break;
346	case MxL_BW_8MHz:
347	SetIRVBit(IRV_RFTune, 0x0D, 0xFF, 0x6F);
348	break;
349	default:
350	return MxL_ERR_RFTUNE;
351	}
352	break;
353
354	default:
355	return MxL_ERR_RFTUNE;
356	}
357
358	/Convert RF frequency into 16 bits => 10 bit integer (MHz) + 6 bit fraction /
359	dig_rf_freq = RF_Freq / MHz; /Whole number portion of RF freq (in MHz) /
360	temp = RF_Freq % MHz; /Decimal portion of RF freq (in MHz) /
361	for(i=0; i<6; i++)
362	{
363	dig_rf_freq <<= 1;
364	frac_divider /=2;
365	if(temp > frac_divider) /* Carryover from decimal */
366	{
367	temp -= frac_divider;
368	dig_rf_freq++;
369	}
370	}
371
372	/add to have shift center point by 7.8124 kHz /
373	if(temp > 7812)
374	dig_rf_freq ++;
375
376	SetIRVBit(IRV_RFTune, 0x0E, 0xFF, (UINT8)dig_rf_freq);
377	SetIRVBit(IRV_RFTune, 0x0F, 0xFF, (UINT8)(dig_rf_freq>>8));
378
379	/* Updated on 2010-0508 for V6.2.5*/
380	if(Mode == MxL_MODE_CAB_STD \|\| Mode == MxL_MODE_CAB_OPT1)
381	{
382	if(RF_Freq < 333000000)
383	SetIRVBit(IRV_RFTune, 0xAB, 0xFF, 0x70);
384	else if(RF_Freq < 667000000)
385	SetIRVBit(IRV_RFTune, 0xAB, 0xFF, 0x20);
386	else
387	SetIRVBit(IRV_RFTune, 0xAB, 0xFF, 0x10);
388	}
389	else /* If Terrestrial modes ... */
390	{
391	if(RF_Freq < 444000000)
392	SetIRVBit(IRV_RFTune, 0xAB, 0xFF, 0x70);
393	else if(RF_Freq < 667000000)
394	SetIRVBit(IRV_RFTune, 0xAB, 0xFF, 0x20);
395	else
396	SetIRVBit(IRV_RFTune, 0xAB, 0xFF, 0x10);
397	}
398
399
400	if (RF_Freq <= 334000000)
401	SetIRVBit(IRV_RFTune, 0x91, 0x40, 0x40);
402	else
403	SetIRVBit(IRV_RFTune, 0x91, 0x40, 0x00);
404
405
406	/Generate one Array that Contain Data, Address /
407	while (IRV_RFTune[Reg_Index].Num \|\| IRV_RFTune[Reg_Index].Val)
408	{
409	pArray[Array_Index++] = IRV_RFTune[Reg_Index].Num;
410	pArray[Array_Index++] = IRV_RFTune[Reg_Index].Val;
411	Reg_Index++;
412	}
413
414	*Array_Size=Array_Index;
415
416	return MxL_OK;
417	}
418
419	/* ========================== Local functions called by Init and RFTune ============================ */
420	UINT32 SetIRVBit(PIRVType pIRV, UINT8 Num, UINT8 Mask, UINT8 Val)
421	{
422	while (pIRV->Num \|\| pIRV->Val)
423	{
424	if (pIRV->Num==Num)
425	{
426	pIRV->Val&=~Mask;
427	pIRV->Val\|=Val;
428	}
429	pIRV++;
430
431	}
432	return MxL_OK;
433	}
434

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source: svn/newcon3bcm2_21bu/dst/dhl/src/devices/dtqs22ddp101a/MxL201RF.c @ 22

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