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DMW_NvRam.c

Last change on this file was 76, checked in by megakiss, 10 years ago
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1	/*******************************************************************
2	* DMW_NvRam.c
3	*
4	* NvRam Access API
5	*
6	* Copyright 2003 Digital STREAM Technology, Inc.
7	* All Rights Reserved
8	*
9	* $Id: DMW_NvRam.c,v 0.42 2004 cafrii Exp $
10	*
11	********************************************************************/
12
13
14
15	#include "DMW_Platform.h"
16
17
18	#include "DHL_OSAL.h"
19	#include "DHL_NVM.h"
20	#include "DHL_DBG.h"
21
22
23	#include "DMW_Config.h"
24
25	#include "DMW_Status.h"
26	#include "DMW_DebugUtil.h"
27	#include "dmw_nvram_priv.h"
28
29	#include "DMW_Mutex.h"
30	#include "DMW_MsgQue.h"
31
32	//#include <string.h>
33
34
35	DHL_MODULE("$nvm", 0);
36
37
38	#define max(a,b) (((a) > (b)) ? (a) : (b))
39	#define min(a,b) (((a) < (b)) ? (a) : (b))
40
41
42	/*--------------------------------------------------------------
43	Configuration..
44	*/
45
46
47	#define DMW_USE_MINIMIZE_FLASH_WRITE 1
48	/* neverdai add. 080930 ÀÌ ¸ðµå°¡ 1·Î ¼³Á¤µÇ¸é counting ¶§¹®¿¡ ºÒÇÊ¿äÇÏ°Ô
49	flash°¡ Áö¿öÁö´Â °æ¿ì¸¦ ÃÖ´ëÇÑ ÁÙÀÎ´Ù.
50	cafrii 100708, ÀÌ ¸ðµå¸¦ µðÆúÆ®·Î Àû¿ëÇÏµµ·Ï ÇÔ.
51	*/
52
53	#define DMW_SIZE_COUNTING_BUF 8
54	#define DMW_MAX_COUNTING_NUM (DMW_SIZE_COUNTING_BUF*8)
55	/*8yte¸¦ Ãß°¡·Î counting¿¡ »ç¿ëÇÑ´Ù.
56	µû¶ó¼ Ç¥Çö °¡´ÉÇÑ ¼ýÀÚ´Â 88=64+1(65)°³°¡ µÈ´Ù./
57
58
59	/*------------------------------------------
60	HAL layer
61
62	EEPROM / FlashRam / etc.
63	*/
64
65	enum NVRAM_DEVICE_LOCK_ENUM
66	{
67	NVRAM_DEVICE_LOCK_EEPROM = 0,
68	NVRAM_DEVICE_LOCK_FLASH = 1,
69
70	NVRAM_DEVICE_LOCK_FLASHBUF = 2,
71	/* cafrii 040113 added
72	to increase performance, we make separate lock for flash shadow buffer*/
73	};
74
75	#define NUM_NVRAM_DEVICE_LOCK 3
76	/* ÁÖÀÇ! ÀÌ °ªÀ» º¯°æÇÏ¸é
77	nvramMutex ÀÇ ÃÊ±â°ªµµ ²À Ãß°¡ÇØ ÁÖµµ·Ï ÇÏÀÚ.*/
78
79
80
81
82
83
84	#define USE_EEPROM_INIT_AT_DMW 1
85	/*
86	EEPROM device init in MW level.
87	it is for test debugging.
88
89	Actually, eeprom driver initializes when first read() or write() function are called.
90	so, this additional init at DMW level is not required.
91	*/
92
93
94
95
96
97	#if COMMENT
98	____NvRamMutex________(){}
99	#endif
100
101
102	static DMW_MUTEX nvramMutex[NUM_NVRAM_DEVICE_LOCK] = {
103	/*
104	{ SemID, Owner, lockCnt, FailCnt, UseOsMutex, Name, flag, traceLvl }
105	*/
106	{ 0, 0, 0, 0, TRUE, "NvMtx1", OS_SEM_PRIO, FALSE, },
107	{ 0, 0, 0, 0, TRUE, "NvMtx2", OS_SEM_PRIO, FALSE, },
108	{ 0, 0, 0, 0, TRUE, "NvMtx3", OS_SEM_PRIO, FALSE, },
109	};
110
111
112	void lock_nvram_sema4(int deviceid)
113	{
114	if (deviceid < 0 \|\| deviceid >= NUM_NVRAM_DEVICE_LOCK) {
115	dprint(0, "!! lock_nvram_sema4: invalid NvRam device ID %d\n", deviceid);
116	return;
117	}
118	DMW_LockMutex(&nvramMutex[deviceid]);
119	}
120
121	void unlock_nvram_sema4(int deviceid)
122	{
123	if (deviceid < 0 \|\| deviceid >= NUM_NVRAM_DEVICE_LOCK) {
124	dprint(0, "!! lock_nvram_sema4: invalid NvRam device ID %d\n", deviceid);
125	return;
126	}
127	DMW_UnlockMutex(&nvramMutex[deviceid]);
128	}
129
130
131
132
133
134	/* ÁÖ¼Ò ¿µ¿ª
135	0x00000000 ~ 0x7fffffff : eeprom
136	0x80000000 ~ 0xffffffff : flash memory nvram ¿µ¿ª.
137	*/
138
139	/*
140	eeprom °ü·Ã ÄÚµå´Â ³ªÁß¿¡ ´Ù½Ã Á¤¸® ÇÊ¿äÇÔ.
141	¹Ýµå½Ã SUPPORT_DMW_EEPROM ÇÃ·¡±×¿Í °°ÀÌ Á¶°ÇºÎ ºôµå°¡ µÇµµ·Ï ÇÏÀÚ.
142	*/
143
144
145
146
147	#if COMMENT
148	___Flash_Util_________(){}
149	#endif
150
151	/*
152	count °ª¿¡ µû¸¥ bit map ¿¹½Ã:
153
154	0: ff ff ff ff ff ff ff ff
155	1: 7f ff ff ff ff ff ff ff
156	2: 3f ff ff ff ff ff ff ff
157	3: 1f ff ff ff ff ff ff ff
158	4: 0f ff ff ff ff ff ff ff
159	5: 07 ff ff ff ff ff ff ff
160	..
161	8: 00 ff ff ff ff ff ff ff
162	9: 00 7f ff ff ff ff ff ff
163	..
164	63: 00 00 00 00 00 00 00 01
165	64: 00 00 00 00 00 00 00 00
166
167	½ÇÁ¦·Î´Â 0 °ú 64´Â Á¤»óÀûÀÎ °ªÀ¸·Î Ãë±ÞÇÏÁö ¾Ê´Â´Ù. (Æ¯º°ÇÑ ÀÇ¹Ì·Î »ç¿ë)
168	1 ~ 63 »çÀÌÀÇ °ªÀÌ Á¤»óÀûÀÎ °ªÀÌ´Ù.
169	*/
170	static void p_set_flash_counting(int count, UINT8 *buf)
171	{
172	int i;
173	int bufIdx;
174	int bufOfs;
175
176	count%=DMW_SIZE_COUNTING_BUF*8;
177
178	bufIdx=count/8;
179	bufOfs=count%8;
180
181	for(i=0; i<bufIdx; i++) buf[i]=0;
182
183	//buf[bufIdx] = (UINT8)(0xff << bufOfs);
184	buf[bufIdx] = (UINT8)(0xff >> bufOfs); // º¸±â ÁÁ°Ô MSB ºÎÅÍ clear ÇØ °¡ÀÚ.
185
186	for(i=bufIdx+1; i<DMW_SIZE_COUNTING_BUF; i++) buf[i]=0xff;
187	}
188
189
190	static int p_get_flash_counting(UINT8 *buf)
191	{
192	int i;
193
194	for(i=0; i<DMW_SIZE_COUNTING_BUF*8; i++) {
195	if(buf[i/8]&(0x80>>(i%8))) break;
196	}
197	/neverdai comment/
198	/*¸®ÅÏÀº 0ºÎÅÍ 64±îÁöÀÇ °ªÀ» °®°Ô µÇÁö¸¸ ½ÇÁ¦·Î 0ÀÌ³ª 64°ªÀÌ ¸®ÅÏµÇ¸é
199	IsValidCount()¿¡¼ Àß¸øµÈ °ªÀ¸·Î °£ÁÖµÇ±â ¶§¹®¿¡ ÀÌ ÇÔ¼ö¿¡¼ Æ¯º°ÇÑ ¿¡·¯ Ã³¸®¸¦ ÇÒ ÇÊ¿ä°¡ ¾øÀ½*/
200
201	return i;
202	}
203
204
205	#if COMMENT
206	____Wrappter___________(){}
207	#endif
208
209	/* DHL Wrappter ÀÌ´Ù. debug message Ã³¸® ¸¸ Ãß°¡µÈ °ÍÀÓ. */
210
211	#define DMW_NVM_FLASH_ID 0
212	/* DHL¿¡¼´Â ¿©·¯°³ÀÇ flash¸¦ »ç¿ëÇÒ ¼ö ÀÖµµ·Ï id¸¦ ÁöÁ¤ÇÒ ¼ö ÀÖ°Ô µÇ¾î ÀÖÀ¸³ª,
213	DMW¿¡¼´Â ÇÏ³ªÀÇ flash ÀåÄ¡¸¸ Áö¿øÇÑ´Ù.
214	*/
215
216	void halFlashInit(UINT32 pAddr1, UINT32 pAddr2, UINT32 *pSize)
217	{
218	*pSize = DHL_NVM_FlashNvmBlockSize();
219	*pAddr1 = DHL_NVM_FlashNvmBlockAddr(0);
220	*pAddr2 = DHL_NVM_FlashNvmBlockAddr(1);
221	}
222
223	STATUS halFlashRead(UINT32 addr, UINT32 size, UINT8 *buf)
224	{
225	DHL_RESULT dhlResult = DHL_OK;
226
227	if (buf == NULL)
228	return statusInvalidArgument;
229
230	dhlResult = DHL_NVM_FlashRead(DMW_NVM_FLASH_ID, addr, buf, size);
231	if (dhlResult) {
232	dprint(0, "!! %s(%x, %d, %x): ReadFlash return %d\n", __func__,
233	addr, size, buf, dhlResult);
234	return statusFlashError;
235	}
236	return statusOK;
237	}
238
239	/* Âü°í: DHLÀÇ flash write´Â ÇÊ¿äÇÏ¸é ÀÚµ¿À¸·Î eraseÇÏ´Â ±â´ÉÀÌ Æ÷ÇÔµÇ¾î ÀÖ´Ù.
240	*/
241	STATUS halFlashWrite(UINT32 addr, UINT32 size, UINT8 *buf)
242	{
243	DHL_RESULT dhlResult = DHL_OK;
244
245	if (buf == NULL)
246	return statusInvalidArgument;
247
248	dhlResult = DHL_NVM_FlashWrite(DMW_NVM_FLASH_ID, addr, buf, size);
249	if (dhlResult) {
250	dprint(0, "!! %s(%x, %d, %x): ProgramFlash return %d\n", __func__,
251	addr, size, buf, dhlResult);
252	return statusFlashError;
253	}
254	return statusOK;
255	}
256
257	void halFlashSync(void)
258	{
259	DHL_NVM_FlashSync(DMW_NVM_FLASH_ID);
260	}
261
262
263	#if COMMENT
264	____Flash_1___________(){}
265	#endif
266
267
268
269	/* Nor Flash Support Routines*/
270
271	/*
272	Example:
273
274	Spansion compatible Flash memory map
275
276	bottom type device, uniform boot block size
277	total 4M Byte
278
279	ÀÌ flashÀÇ Æ¯Â¡:
280	1 block size = 64 K byte (can be different by vendor)
281
282	8 bit wide
283
284	400000 +------------------------------+
285	\| Block number 70 \| 64 KByte
286	\| \|
287	3F0000 +------------------------------+
288	\| Block number 69 \|
289	\| \|
290	3E0000 +------------------------------+
291	\| \|
292	\| ... \|
293	020000 +------------------------------+
294	\| Block number 8 \| 64 KByte
295	\| \|
296	010000 +==============================+ ÀÌÇÏ ¾Æ·¡ block ¸î°³´Â ÀÛÀº Å©±â·Î µÇ¾î ÀÖÀ½
297	\| Block number 7 \|
298	00E000 +------------------------------+
299	\| ... \|
300	004000 +------------------------------+
301	\| Block number 1 \|
302	002000 +------------------------------+
303	\| Block number 0 \| 8 KByte
304	000000 +------------------------------+
305
306	À§ ºí·°Áß¿¡¼ firmware ¿ëÀ¸·Î »ç¿ëÇÏÁö ¾Ê´Â µÎ°³ ºí·°À»
307	NvRam device 1À¸·Î ¼±ÅÃÇØ¼ »ç¿ë.
308
309	*/
310
311	/---------------------------------------/
312	/* Flash User parameters..*/
313
314
315	typedef struct
316	{
317	UINT32 start_addr;
318	/* ÀÌ UserblockÀÇ ½ÃÀÛ ÁÖ¼Ò..
319	ÇÃ·¡½Ã ¸Þ¸ð¸® ÀüÃ¼ ºí·° Áß¿¡¼ NvRam ÀúÀå °ø°£ ¿ëµµ·Î »ç¿ëÇÒ block address.*/
320
321	UINT32 end_addr;
322	/* ÀÌ ÁÖ¼Ò´Â ³Ñ¾î°¡¸é ¾ÈµÊ*/
323
324	} FlashUserBlockInfo;
325
326
327
328	FlashUserBlockInfo g_flashUserBlockInfo[2];
329
330
331
332
333	/----------------------------------------------------------------------------------/
334
335	#if COMMENT
336	____Flash_2___________(){}
337	#endif
338
339
340
341
342
343
344	/*******************************************************************
345	BlockÀÇ ¸Ç Ã³À½ 32 byte´Â ID record·Î¼ NvRam I/O API·Î´Â Á¢±Ù ºÒ°¡.
346	¿ÀÁ÷ halFlashXX ·çÆ¾À¸·Î update°¡´ÉÇÏ¸ç, count Á¤º¸¸¦ ºñ·ÔÇÑ Áß¿äÇÑ µ¥ÀÌÅÍ°¡ ±â·ÏµÈ´Ù.
347
348	ID record (offset 0, 32 bytes)
349
350	0 1 2 3 4 5 6 7 8 9 A B C D E F
351	+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+
352	0x0000 \|Magic\|vr\|ff\| count \| reserved \|
353	+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+
354	0x0010 \| reserved \|
355	+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+
356	\| \|
357	\| ... \|
358
359	Magic : fixed. 0xCA, 0xFE
360	vr : version.
361	Count : flash revision count
362
363
364	*******************************************************************/
365
366
367
368
369
370
371	#define FLASH_SYSTEM_VERSION 0x03
372	/*
373	flash layout ¹öÀü Á¤º¸. ±¸Á¶°¡ º¯°æµÇ¸é ÀÌ °ªµµ Áõ°¡µÇ¾î¾ß ÇÔ.
374	8 bit ¹üÀ§ ³»¿¡¼ Á¤ÀÇµÇ¾î¾ß ÇÔ. 0 ~ 0xff
375
376	0x03: 2010/7/8, for newby, »õ·Î¿î µðÀÚÀÎ. »ç½Ç layoutÀº º¯°æ ¾øÀ½.
377	0x02: 32-bit count value is used. bit-wise operation.
378	0x01: ÃÊ±â layout.
379	*/
380
381	#define SIZE_OF_ID_RECORD 32 /* block ¸Ç ¾Õ¿¡ ID·Î »ç¿ëµÇ´Â ¿¹¾àµÈ ¿µ¿ª Å©±â*/
382	#define FLASH_RESERVED_SIZE SIZE_OF_ID_RECORD
383
384	int FLASH_USER_AREA_SIZE;
385	/* ½ÇÁ¦·Î user°¡ »ç¿ëÇÒ ¼ö ÀÖ´Â flash blockÀÇ Å©±â´Â
386	¿¹¾àµÈ ¿µ¿ªÀ» Á¦¿ÜÇÑ Å©±âÀÌ´Ù.*/
387
388	UINT8 g_NvFlashMagic[4] = { 0xca, 0xfe, FLASH_SYSTEM_VERSION, 0xff};
389
390
391	#define IsValidMagic(a) \
392	(((a)[0]==g_NvFlashMagic[0]) && ((a)[1]==g_NvFlashMagic[1]) && ((a)[2]==g_NvFlashMagic[2]))
393
394	#define IsValidCount(c) (((c) >= 1) && ((c) <= DMW_MAX_COUNTING_NUM-1))
395	/* count °ªÀÌ À¯È¿ÇÑ ¹üÀ§ ÀÎÁö Ã¼Å©. */
396
397	#define InitialCount() 0
398	/* nvm format ÇÒ ¶§ÀÇ count °ª */
399	#define StartCount() 1
400	/* resetÈÄ ÃÖÃÊ count °ª. 1ºÎÅÍ ½ÃÀÛÇØ¾ß flash erase¸¦ ÃÖ¼ÒÈ ÇÒ ¼ö ÀÖÀ½ */
401
402	#define NextCount(c) (((c) >= DMW_MAX_COUNTING_NUM-1) ? 1 : (c)+1)
403	/* neverdai 080930 »ç¿ë °¡´ÉÇÑ °ªÀº 1¿¡¼ºÎÅÍ DMW_MAX_COUNTING_NUM-1ÀÌ´Ù.
404	0xff...³ª 0x00...À» »ç¿ëÇÏ´Â °ÍÀÌ ÀûÀýÄ¡ ¾Ê´Ù°í ÇÏ¸é
405	0°ú DMW_MAX_COUNTING_NUM°ªÀº »ç¿ëÇÒ ¼ö ¾øÀ¸¸ç
406	µû¶ó¼ ½ÇÁ¦ »ç¿ë °¡´ÉÇÑ count °ªÀº 1¿¡¼ºÎÅÍ DMW_MAX_COUNTING_NUM-1ÀÌ µÈ´Ù.*/
407
408	UINT8 *g_NvFlashBuffer;
409	/* shadow buffer
410	g_NvFlashBufferValid°¡ TRUEÀÎ °æ¿ì¿¡¸¸ À¯È¿ÇÏ´Ù.
411	¾ÕÀÇ ID_RECORD ºÎºÐ ¸¸ÅÀº ÀÌ ¹öÆÛ¿¡ Æ÷ÇÔµÇÁö ¾Ê´Â´Ù.
412	*/
413
414	BOOL g_NvFlashBufferValid = FALSE;
415	/* TRUEÀÏ ¶§¿¡¸¸ g_NvFlashBufferÀÇ ³»¿ëÀÌ ÀÇ¹Ì°¡ ÀÖ´Ù. */
416
417
418	BOOL g_NvFlashForceCacheDirty;
419	/* cafrii 070402 add
420	TRUE ÀÌ¸é Ç×»ó cache°¡ dirty ÇÏ´Ù°í °¡Á¤.. Å×½ºÆ® ¿ëµµ..*/
421
422	#define NVM_VERIFY_BUF_SZ 8192
423	UINT8 *g_NvVerifyBuffer;
424	/* verify¿ë ¹öÆÛ°¡ ³Ê¹« ÀÛ¾Æ¼ HAL api°¡ ³Ê¹« ºó¹øÈ÷ ½ÇÇà..
425	µð¹ö±ë ½Ã¿¡ ºÒÆíÇÏ¹Ç·Î, Å©±â¸¦ Å°¿î´Ù.
426	FlashSync ¿¡¼¸¸ »ç¿ëÇÏ´Âµ¥, ÀÌ ÀÛ¾÷Àº NwtTask¿¡¼¸¸ ½ÇÇàµÇ¹Ç·Î,
427	race condition °ÆÁ¤Àº ÇÏÁö ¾Ê¾Æµµ µÈ´Ù.
428	*/
429
430	/*----------------------------------------------------------------------------
431	FlashNvmInit
432
433	Flash¸¦ NVMÀ¸·Î »ç¿ëÇÏ±â À§ÇÑ ÃÊ±âÈ ÀÛ¾÷À» ÇÑ´Ù.
434	*/
435
436	void FlashNvmInit(void)
437	{
438	UINT32 addr1, addr2, size;
439
440	halFlashInit(&addr1, &addr2, &size);
441	DHL_ASSERT(addr1!=addr2, "flash nvm block addr invalid!");
442
443	g_flashUserBlockInfo[0].start_addr = addr1;
444	g_flashUserBlockInfo[0].end_addr = addr1 + size;
445
446	g_flashUserBlockInfo[1].start_addr = addr2;
447	g_flashUserBlockInfo[1].end_addr = addr2 + size;
448
449	dprint(0, "FlashNvmInfo: blksz 0x%x-0x%x, addr[0] 0x%x, addr[1] 0x%x\n",
450	size, FLASH_RESERVED_SIZE,
451	g_flashUserBlockInfo[0].start_addr,
452	g_flashUserBlockInfo[1].start_addr);
453
454	FLASH_USER_AREA_SIZE = size - FLASH_RESERVED_SIZE;
455
456	if (g_NvFlashBuffer == NULL)
457	g_NvFlashBuffer = DHL_OS_Malloc(FLASH_USER_AREA_SIZE);
458
459	if (g_NvVerifyBuffer == NULL)
460	g_NvVerifyBuffer = DHL_OS_Malloc(NVM_VERIFY_BUF_SZ);
461
462	DHL_ASSERT(g_NvFlashBuffer!=NULL, "flash nvm shadow buffer null");
463	DHL_ASSERT(g_NvVerifyBuffer!=NULL, "flash nvm verify buffer null");
464
465	/* flash buffer¸¦ 0ÀÌ ¾Æ´Ñ 0xff ·Î ÃÊ±âÈ ÇØ ³õÀ¸¸é
466	sync ¼Óµµ°¡ Á¶±Ý ´õ »¡¶óÁú ¼ö ÀÖ´Ù. (ÀÌ·ÐÀûÀ¸·Î..)
467	*/
468	memset(g_NvFlashBuffer, 0xff, FLASH_USER_AREA_SIZE);
469
470	/* ÀÌ shadow buffer´Â ÇÑ¹ø ÇÒ´çµÇ°í free µÇÁö ¾Ê´Â´Ù.*/
471
472	}
473
474
475	/*----------------------------------------------------------------------------
476	FlashNvmGetAvailableSize
477
478	»ç¿ëÀÚ°¡ »ç¿ë °¡´ÉÇÑ flash ¿µ¿ªÀÇ Å©±â ¸®ÅÏ. (¹ÙÀÌÆ® ´ÜÀ§)
479	*/
480	int FlashNvmGetAvailableSize()
481	{
482	return FLASH_USER_AREA_SIZE;
483	}
484
485
486	/*----------------------------------------------------------------------------
487	FlashInvalidFlashCache
488
489	Å×½ºÆ® ¿ëµµ..
490	DRAM¿¡ ÀÖ´Â Buffer Cache¸¦ invalidate ½ÃÅ²´Ù.
491	Flash read/write stress test¸¦ ÇÒ ¶§
492	±â·ÏÇÑ ´ÙÀ½¿¡ buffer¸¦ ÅëÇÏÁö ¾Ê°í ¹Ù·Î ÀÐ±â À§ÇØ¼ »ç¿ëÇÑ´Ù.
493	*/
494	void FlashNvmInvalidateCacheBuffer()
495	{
496	g_NvFlashBufferValid = FALSE;
497	}
498
499
500	/*----------------------------------------------------------------------------
501	_FlashSelectValidBlock
502
503	µÎ°³ÀÇ block Áß¿¡¼ ¾î¶² °ÍÀÌ °¡Àå validÇÑ °ÍÀÎÁö °áÁ¤ÇÏ´Â ÇÔ¼ö.
504
505	pCount´Â validÇÑ block¿¡ ±â·ÏµÇ¾î ÀÖ´Â counter °ªÀ¸·Î
506	ÀÌ °ªÀÌ ÇöÀç counter°¡ µÈ´Ù.
507	valid ÇÑ blockÀ» ¸®ÅÏÇÑ´Ù. (0 ¶Ç´Â 1)
508	validÇÑ °ÍÀÌ ÇÏ³ªµµ ¾ø´Ù¸é -1À» ¸®ÅÏÇÑ´Ù.
509	*/
510	int _FlashSelectValidBlock(UINT8 *pCount)
511	{
512	/* return block number (0 or 1) if any block is valid.*/
513	/* return -1 if both block is invalid..*/
514
515	UINT8 buf0[4+DMW_SIZE_COUNTING_BUF], buf1[4+DMW_SIZE_COUNTING_BUF];
516
517	int r0, r1;
518	UINT8 cnt0, cnt1; /* counter value to be compared..*/
519	int lvl; /* debug level */
520
521	dprint(2, "select valid flash block:\n");
522
523	r0 = halFlashRead(g_flashUserBlockInfo[0].start_addr, 4+DMW_SIZE_COUNTING_BUF, buf0);
524	r1 = halFlashRead(g_flashUserBlockInfo[1].start_addr, 4+DMW_SIZE_COUNTING_BUF, buf1);
525
526	buf0[3] = p_get_flash_counting(&buf0[4]);
527	buf1[3] = p_get_flash_counting(&buf1[4]);
528	/* comment: bufn[3] is temporary space. it is not saved in flash..*/
529
530	if (r0 == 0 &&
531	IsValidMagic(buf0) && /* check magic key*/
532	IsValidCount(buf0[3])) /* check counter*/
533	cnt0 = buf0[3];
534	else {
535	lvl = buf0[3] ? 2 : 0; // cnt==0 ´Â format¿¡ ÀÇÇÑ ÃÊ±â°ªÀÌ¹Ç·Î ¿¡·¯ »óÈ²ÀÌ ¾Æ´Ô.
536	dprint(lvl, "%s Block 0 not valid! r %d, magic %02x%02x%02x, cnt %d\n",
537	!lvl ? "!!" : " ", r0, buf0[0], buf0[1], buf0[2], buf0[3]);
538	cnt0 = 0; /* meaning "INVALID!!"*/
539	}
540
541	if (r1 == 0 &&
542	IsValidMagic(buf1) && /* check magic key*/
543	IsValidCount(buf1[3])) /* check counter*/
544	cnt1 = buf1[3];
545	else {
546	lvl = buf0[3] ? 2 : 0; // cnt==0 ´Â format¿¡ ÀÇÇÑ ÃÊ±â°ªÀÌ¹Ç·Î ¿¡·¯ »óÈ²ÀÌ ¾Æ´Ô.
547	dprint(lvl, "%s Block 1 not valid! r %d, magic %02x%02x%02x, cnt %d\n",
548	!lvl ? "!!" : " ", r1, buf1[0], buf1[1], buf1[2], buf1[3]);
549	cnt1 = 0; /* meaning "INVALID!!"*/
550	}
551
552	if (cnt0 == 0 && cnt1 == 0) { /* both block is invalid!!*/
553	dprint(2, " no valid block!\n");
554	return -1;
555	}
556
557	if (cnt0 && cnt1 == 0) {
558	/* only block 0 is valid.*/
559	dprint(2, "== only block 0 valid, magic %02x%02x%02x, cnt %d\n", buf0[0], buf0[1], buf0[2], cnt0);
560	if (pCount) *pCount = cnt0;
561	return 0;
562	}
563
564	if (cnt0 == 0 && cnt1) {
565	/* only block 1 is valid.*/
566	dprint(2, "== only block 1 valid, magic %02x%02x%02x, cnt %d\n", buf1[0], buf1[1], buf1[2], cnt1);
567	if (pCount) *pCount = cnt1;
568	return 1;
569	}
570
571	/* both blocks are valid. compare and choose newest one.. (big value)
572	this count value is wrapping if reached at end. so just numerical order is not important.
573	*/
574	dprint(2, "== block 0/1 both valid.. cnt %d/%d\n", cnt0, cnt1);
575	dprint(2, " block 0 magic %02x%02x%02x, cnt %d\n",
576	buf0[0], buf0[1], buf0[2], cnt0);
577	dprint(2, " block 1 magic %02x%02x%02x, cnt %d\n",
578	buf1[0], buf1[1], buf1[2], cnt1);
579
580	if (cnt0 < cnt1)
581	{
582	if (cnt1 - cnt0 < DMW_MAX_COUNTING_NUM/2) {
583	/* +-----------------------------------+
584	0 cnt0 cnt1 ff*/
585	if (cnt1 - cnt0 > 1)
586	dprint(0, "!! warning! cnt0 %d < cnt1 %d not adjacent! use block 1\n", cnt0, cnt1);
587	if (pCount) *pCount = cnt1;
588	return 1;
589	}
590	else { /* count 1ÀÌ ¼ýÀÚ»óÀ¸·Î´Â ´õ Å« °ªÀÌÁö¸¸ count 0°¡ ´õ ÃÖ½ÅÀÌ´Ù.*/
591	/*+-----------------------------------+
592	0 cnt0 cnt1 ff*/
593	if (cnt0 != 1 \|\| cnt1 != DMW_MAX_COUNTING_NUM-1)
594	dprint(0, "!! warning! cnt0 %d, cnt1 %d not adjacent! use block 0\n", cnt0, cnt1);
595	if (pCount) *pCount = cnt0;
596	return 0;
597	}
598	}
599	else /* cnt1 <= cnt0*/
600	{
601	if (cnt0 - cnt1 < DMW_MAX_COUNTING_NUM/2) {
602	/* +-----------------------------------+*/
603	/* 0 cnt1 cnt0 ff*/
604	if (cnt0 - cnt1 > 1)
605	dprint(0, "!! warning! cnt1 %d < cnt0 %d not adjacent! use block 1\n", cnt1, cnt0);
606	if (pCount) *pCount = cnt0;
607	return 0;
608	}
609	else { /* count 0ÀÌ ¼ýÀÚ»óÀ¸·Î´Â ´õ Å« °ªÀÌÁö¸¸ count 1°¡ ´õ ÃÖ½ÅÀÌ´Ù.*/
610	/* +-----------------------------------+*/
611	/* 0 cnt1 cnt0 ff*/
612	if (cnt1 != 1 \|\| cnt0 != DMW_MAX_COUNTING_NUM-1)
613	dprint(0, "!! warning! cnt1 %d, cnt0 %d not adjacent! use block 0\n", cnt1, cnt0);
614	if (pCount) *pCount = cnt1;
615	return 1;
616	}
617	}
618	}
619
620
621	/*****************************************************************************
622	_FlashReadSync
623
624	Flash Read³ª Write¸¦ ÇÒ¶§ Shadow buffer ³»¿ëÀÌ ¾ÆÁ÷ invalidÇÏ¸é
625	¸ÕÀú flash device·ÎºÎÅÍ buffer·Î ÀÐ¾î¿Í¼ sync¸¦ ÇÑ´Ù.
626
627	caller¿¡¼ ÀÌ¹Ì shadow buffer lockÀº µÈ »óÅÂÀÌ¹Ç·Î
628	ÀÌ ÇÔ¼ö¿¡¼´Â flash lock¸¸ ÇÑ´Ù.
629
630	*****************************************************************************/
631
632	STATUS _FlashReadSync()
633	{
634	int r, idx;
635	UINT32 base;
636	UINT8 count;
637
638	lock_nvram_sema4(NVRAM_DEVICE_LOCK_FLASH); /* flash memory*/
639
640	if (! g_NvFlashBufferValid)
641	{
642	/*
643	synchronize!*/
644
645	/dprint(2, "%s: flash shadow buffer not synchronized.. do sync now..\n", __FUNCTION__);/
646
647	idx = _FlashSelectValidBlock(&count);
648
649	if (idx != 0 && idx != 1) {
650	/* ¾ÆÁ÷ flash ICÀÇ ³»¿ëÀÌ ÀüÇô ÃÊ±âÈ°¡ µÇÁö ¾Ê¾Ò°Å³ª ¼Õ»óµÇ¾úÀ¸¹Ç·Î
651	formatÀÌ ÇÊ¿äÇÑ °æ¿ìÀÌ´Ù.*/
652
653	dprint(0, "!! %s: both block invalid.. unformatted flash block !!!!\n", __FUNCTION__);
654
655	/memset(g_NvFlashBuffer, 0, sizeof(g_NvFlashBuffer));/
656	r = statusNvRamNotFormatted;
657	goto end_of_flash_read_sync;
658	}
659
660	/* idx is block number [0/1]..
661	load flash content to shadow buffer.
662	*/
663
664	base = g_flashUserBlockInfo[idx].start_addr;
665
666	dprint(2, " %s: block %d (%x), count 0x%x\n", __FUNCTION__, idx, base, count);
667
668	r = halFlashRead(base + FLASH_RESERVED_SIZE, FLASH_USER_AREA_SIZE, g_NvFlashBuffer);
669
670	if (r) {
671	dprint(0, "!! %s: read error %d\n", __FUNCTION__, r);
672	goto end_of_flash_read_sync;
673	}
674
675	g_NvFlashBufferValid = TRUE;
676	}
677	r = statusOK;
678
679	end_of_flash_read_sync:
680
681	unlock_nvram_sema4(NVRAM_DEVICE_LOCK_FLASH); /flash memory/
682
683	return (STATUS)r;
684	}
685
686
687	/*****************************************************************************
688	FlashNvmRead
689
690	Flash Block ¿¡¼ µ¥ÀÌÅÍ ÀÐ±â.
691	»ó´ë ÁÖ¼Ò »ç¿ë..
692	addr·Î »ç¿ë°¡´ÉÇÑ °ªÀÇ ¹üÀ§: 0 ~ FLASH_USER_AREA_SIZE-1
693
694	*****************************************************************************/
695
696	STATUS FlashNvmRead(UINT32 addr, UINT32 size, UINT8 *buf)
697	{
698	int r;
699
700	lock_nvram_sema4(NVRAM_DEVICE_LOCK_FLASHBUF); /* flash shadow buffer*/
701
702	/* flash shadow buffer integrity check*/
703	if (! g_NvFlashBufferValid)
704	{
705	/* synchronize!*/
706	dprint(2, "%s: flash shadow buffer not synchronized.. do sync now..\n", __FUNCTION__);
707	r = _FlashReadSync();
708	if (r)
709	goto end_of_flash_read;
710	}
711
712	/* range check*/
713	if (addr >= (UINT32)FLASH_USER_AREA_SIZE \|\| size >= (UINT32)FLASH_USER_AREA_SIZE \|\|
714	addr + size >= (UINT32)FLASH_USER_AREA_SIZE) {
715	dprint(0, "!! %s: limit over.. addr %u, size %u, end %u\n",
716	__FUNCTION__, addr, size, addr+size);
717	r = statusOutOfRange;
718	goto end_of_flash_read;
719	}
720
721	/* actual read here! */
722	memcpy(buf, g_NvFlashBuffer + addr, size);
723	r = statusOK;
724
725	end_of_flash_read:
726
727	unlock_nvram_sema4(NVRAM_DEVICE_LOCK_FLASHBUF); /* flash shadow buffer*/
728
729	return (STATUS)r;
730
731	}
732
733	/*****************************************************************************
734	FlashNvmWrite
735
736	Flash Target Block¿¡ ±â·ÏÇÏ±â.
737	addr´Â Target Block¿¡ ´ëÇÑ »ó´ë ÁÖ¼Ò. 0 ~ FLASH_USER_AREA_SIZE-1
738
739	target blockÀº FlashOpenWrite()¿¡¼ °áÁ¤µÈ´Ù.
740	(ÀÌ ÇÔ¼ö¸¦ ºÎ¸£±â Àü¿¡ ²À ºÒ·¯¾ß ÇÔ)
741	ÀÌ ÇÔ¼ö°¡ ºÒ¸®´Â ½ÃÁ¡¿¡¼´Â ±âÁ¸ µ¥ÀÌÅÍ´Â ÀÌ¹Ì Áö¿öÁ®¼ Á¸ÀçÇÏÁö ¾Ê´Â´Ù.
742
743	ÇöÀç bufferred write ¹æ½ÄÀÌ¹Ç·Î ÀÌ ÇÔ¼ö¿¡¼ ½ÇÁ¦·Î flash writingÀº ÇÏÁö ¾Ê´Â´Ù.
744
745	*****************************************************************************/
746
747	STATUS FlashNvmWrite(UINT32 addr, UINT32 size, UINT8 *buf)
748	{
749	int r;
750
751	lock_nvram_sema4(NVRAM_DEVICE_LOCK_FLASHBUF); /* flash shadow buffer*/
752
753	/* flash shadow buffer integrity check*/
754	if (! g_NvFlashBufferValid)
755	{
756	/* synchronize!*/
757	dprint(2, "%s: flash shadow buffer not valid.. do sync now..\n", __FUNCTION__);
758	r = _FlashReadSync();
759	if (r)
760	goto end_of_flash_write;
761	}
762
763	if (addr >= (UINT32)FLASH_USER_AREA_SIZE \|\| size >= (UINT32)FLASH_USER_AREA_SIZE \|\|
764	addr + size >= (UINT32)FLASH_USER_AREA_SIZE) {
765	dprint(0, "!! %s: limit over.. addr %u, size %u, end %u\n",
766	__FUNCTION__, addr, size, addr+size);
767	r = statusOutOfRange;
768	goto end_of_flash_write;
769	}
770
771	memcpy(g_NvFlashBuffer + addr, buf, size);
772	r = statusOK;
773
774	end_of_flash_write:
775
776	unlock_nvram_sema4(NVRAM_DEVICE_LOCK_FLASHBUF); /* flash shadow buffer*/
777
778	return (STATUS)r;
779	}
780
781
782	/*****************************************************************************
783	FlashNvmSync
784
785	Flash shadow bufferÀÇ ³»¿ë°ú flash ½ÇÁ¦ ³»¿ë°ú µ¿±âÈÇÏ´Â ÇÔ¼ö
786	pPartMapList´Â flash buffer ³»¿ë Áß¿¡¼ ½ÇÁ¦·Î validÇÑ µ¥ÀÌÅÍ°¡ Á¸ÀçÇÏ´Â
787	¿µ¿ªµéÀ» ¾Ë·ÁÁÖ´Â MapÀ¸·Î¼ "¿µ¿ª" µéÀÇ array ·Î µÇ¾î ÀÖ´Ù.
788
789	NULLÀ» ÁöÁ¤ÇÏ¸é ÀüÃ¼ ¿µ¿ªÀ» updateÇÑ´Ù.
790
791	2010/7/8, part map list´Â ´õ ÀÌ»ó »ç¿ëÇÏÁö ¾ÊÀ¸¹Ç·Î ÄÚµå Á¦°Å.
792
793	*****************************************************************************/
794
795	STATUS FlashNvmSync(PartMapRange *pPartMapList)
796	{
797	#undef TMPBLKSZ
798	#define TMPBLKSZ NVM_VERIFY_BUF_SZ
799
800	STATUS r;
801	int k, n, target;
802	UINT8 count; /* flash count °ª */
803	UINT8 *source;
804	UINT32 base;
805	int size;
806
807	UINT8 tmp = g_NvVerifyBuffer; / ±â·ÏÇÑ ´ÙÀ½¿¡ Á¦´ë·Î ±â·ÏµÇ¾ú´ÂÁö Ã¼Å©ÇÒ¶§ »ç¿ëµÇ´Â ÀÓ½Ã ¹öÆÛ*/
808	int this_size, offset;
809
810	UINT8 header[4+DMW_SIZE_COUNTING_BUF]; // flash ¿µ¿ª Çì´õ Á¤º¸
811	UINT8 *pFlashShadowBuffer = NULL; // ±â·Ï ÀÛ¾÷ ¼öÇà½Ã »ç¿ëÇÏ´Â ¿øº» ¹öÆÛ º¹»çº».
812
813	dprint(2, "%s\n", __FUNCTION__);
814
815	if (! g_NvFlashBufferValid) {
816	dprint(0, "!! flash shadow buffer invalid! skip!\n");
817
818	/* ÇÑ¹øµµ Read/Write¸¦ ÇÏÁö ¾ÊÀº »óÅÂ¿¡¼ Sync¸¦ callÇÑ »óÈ².*/
819	/* ½ÇÁ¦·Î synchronize¸¦ ÇÒ data°¡ ¾øÀ¸¹Ç·Î success/fail µÑ ´Ù ÀÇ¹Ì ¾øÀ½..*/
820	return statusNotInitialized;
821	}
822
823	/*---------------------------------------------
824	Flash shadow buffer g_NvFlashBuffer µ¥ÀÌÅÍ¸¦
825	½ÇÁ¦ Flash memory ¿¡ ±â·ÏÇÑ´Ù.
826
827	shadow buffer¸¦ lockÇÏ´Â ½Ã°£À» ÃÖ¼ÒÈ ÇÏ±â À§ÇØ
828	shadow buffer ÀüÃ¼¸¦ º¹»çÇØ ³õ°í ½ÃÀÛÇÏÀÚ.
829
830	definition: UINT8 g_NvFlashBuffer[FLASH_USER_AREA_SIZE];*/
831
832	pFlashShadowBuffer = (UINT8 ) DHL_OS_Malloc(sizeof(UINT8)FLASH_USER_AREA_SIZE);
833	if (pFlashShadowBuffer == NULL) {
834	dprint(0, "!! flash shadow buffer duplicate err\n");
835	return statusOutOfMemory;
836	}
837
838	/* ÀÌÁ¦ ÀÌÈÄ ºÎÅÍ´Â ÇÔ¼ö returnÇÒ ¶§ ¸Þ¸ð¸®¸¦ ²À Free¸¦ ½ÃÄÑ¾ß ÇÔ.*/
839
840	/* duplicate with lock */
841	lock_nvram_sema4(NVRAM_DEVICE_LOCK_FLASHBUF);
842	memcpy(pFlashShadowBuffer, g_NvFlashBuffer, sizeof(UINT8)*FLASH_USER_AREA_SIZE);
843	unlock_nvram_sema4(NVRAM_DEVICE_LOCK_FLASHBUF);
844
845	/* FlashRead/Write ¿¡¼´Â FlashBuf¸¦ ¸ÕÀú lock ÇÑ ´ÙÀ½¿¡ Flash¸¦ lock ÇÏ°í ÀÖ´Ù.
846	µû¶ó¼ FlashBuf mutex¿Í Flash mutex´Â ¼·Î DeadLockÀÌ µÉ °¡´É¼ºÀÌ ÀÖ±â ¶§¹®¿¡
847	°¡´ÉÇÏ¸é ¼·Î ÁßÃ¸ÇØ¼ mutex lockÀ» ÇÏÁö ¸»µµ·Ï ÇÏÀÚ.
848
849	---------------------------------------------*/
850
851	lock_nvram_sema4(NVRAM_DEVICE_LOCK_FLASH);
852
853	/* Flash shadow buffer g_NvFlashBuffer µ¥ÀÌÅÍ¸¦ Flash¿¡ ±â·ÏÇÏ±â Àü¿¡
854	½ÇÁ¦ Flash memory ³»¿ë°ú Â÷ÀÌ°¡ ÀÖ´ÂÁö Ã¼Å©ÇÑ´Ù.
855	½ÇÁ¦ ³»¿ë°ú Â÷ÀÌ°¡ ¾ø´Ù¸é ±»ÀÌ ´Ù½Ã ±â·ÏÇÒ ÇÊ¿ä°¡ ¾ø±â ¶§¹®.
856	*/
857
858	n = _FlashSelectValidBlock(&count);
859	/* nÀº valid ÇÑ block ¹øÈ£. 0 or 1*/
860
861	if (n != 0 && n != 1) {
862	/* no valid block!!
863	compare check¸¦ ÇÒ ÇÊ¿ä°¡ ¾ø´Ù.
864	µÑ ´Ù invalid ÀÌ¹Ç·Î targetÀ¸·Î´Â ¾Æ¹«°Å³ª °í¸£¸é µÈ´Ù. 0 default*/
865	target = 0;
866	count = StartCount();
867	}
868	else
869	{
870	target = (n == 0) ? 1 : 0;
871	/* write targetÀº invalid block ¶Ç´Â µÑ Áß¿¡¼ ¿À·¡µÈ blockÀ¸·Î Á¤ÇÑ´Ù.
872	valid blockÀÌ 0ÀÌ¸é 1À» »èÁ¦ÇÏ°í 1ÀÌ validÇÏ¸é 0À» »èÁ¦ÇÑ´Ù.*/
873
874	base = g_flashUserBlockInfo[n].start_addr + FLASH_RESERVED_SIZE;
875	/* ¾ÕºÎºÐ ¿¹¾à ¿µ¿ªÀº Á¦¿ÜÇÑ´Ù.*/
876
877	size = FLASH_USER_AREA_SIZE; /* ÀüÃ¼ Å©±â.*/
878	source = pFlashShadowBuffer; /* ºñ±³ÇÒ µ¥ÀÌÅÍ Æ÷ÀÎÅÍ..*/
879
880	/dprint(2, " compare before start synching..\n");/
881
882	if (g_NvFlashForceCacheDirty) {
883	dprint(0, "!! force cache dirty flag..\n");
884	goto start_flash_sync;
885	}
886
887	// *, /, % ¿¬»êÀÚ »ç¿ëÀ» ÃÖ¼ÒÈ ÇÏµµ·Ï ·ÎÁ÷ °³¼±.
888	for (k=0; k<size; k+=TMPBLKSZ)
889	{
890	/* ÀÌ¹ø loop¿¡ ºñ±³ÇÒ Å©±â.. ¸¶Áö¸· ³¡ ºÎºÐÀÌ¸é Å©±â°¡ TMPBLKSZ ÀÌ ¾Æ´Ò¼ö ÀÖ´Ù. */
891	this_size = min(TMPBLKSZ, size-k);
892
893	r = halFlashRead(base + k, this_size, tmp);
894	if (r) {
895	dprint(0, "!! flash read err during preparing, %d\n", r);
896	goto start_flash_sync;
897	}
898	#if 0
899	if ((offset = DHL_DBG_MemCmp(&source[k], tmp, this_size)) >= 0) {
900	dprint(2, "!! mismatch found, offset [%u], buf %u != flash %u\n",
901	kTMPBLKSZ+offset, source[kTMPBLKSZ+offset], tmp[offset]);
902	goto start_flash_sync;
903	}
904	#else
905	/* ¾îµð°¡ ¾î¶»°Ô mismatch µÇ´ÂÁö ¾Ë ÇÊ¿ä°¡ ¾ø´Â °æ¿ì¿¡´Â ±×³É memcmp¸¦ */
906	/* »ç¿ëÇØ¼ ½ÇÇà ¼Óµµ¸¦ ³ôÀÌÀÚ.*/
907	if (memcmp(&source[k], tmp, this_size)) {
908	dprint(2, " flash cache dirty. sync now.. target %d\n", target);
909	goto start_flash_sync;
910	}
911	#endif
912	}
913	dprint(2, " flash cache consistent. no need to sync\n");
914	r = statusOK;
915	goto end_of_flash_sync;
916	}
917
918	start_flash_sync:
919
920	/*---------------------------------------------
921	ÀÌÁ¦ ½ÇÁ¦ flash memory¿¡ ±â·ÏÇÑ´Ù.
922
923	targetÀº »èÁ¦ÇÒ user blockÀÌ´Ù. 0 ¾Æ´Ï¸é 1 µÑÁß ÇÏ³ªÀÓ.
924	user blockÀÌ ÇÑ°³ ÀÌ»óÀÇ flash blockÀ¸·Î ÀÌ·ç¾îÁ® ÀÖÀ» ¼ö ÀÖ´Ù..
925
926	º¹¼ö°³ÀÇ flash blockÀ¸·Î ÀÌ·ç¾îÁø °æ¿ì¸¦ °£ÁÖÇØ¾ß ÇÏ¸ç,
927	ÀÌ °æ¿ì invalid blockÀÎÁö ¾Æ´ÑÁöµµ Ã¼Å©ÇØ¾ß ÇÑ´Ù.*/
928
929	dprint(2, " Target block for write: %d (%x), last count: %d\n",
930	target, g_flashUserBlockInfo[target].start_addr, count);
931
932	base = g_flashUserBlockInfo[target].start_addr + FLASH_RESERVED_SIZE;
933	/* ¾ÕºÎºÐ ¿¹¾à ¿µ¿ªÀº Á¦¿ÜÇÑ´Ù.*/
934
935	/* Áö±Ý±îÁö bufferµÈ µ¥ÀÌÅÍ ±â·Ï.*/
936	dprint(2, " write buffered data..\n");
937
938	if (1) /* ÀüÃ¼ blockÀ» ´Ù ±â·Ï..*/
939	{
940	size = FLASH_USER_AREA_SIZE; /* ÀüÃ¼ Å©±â.*/
941	source = pFlashShadowBuffer; /* ±â·ÏÇÒ µ¥ÀÌÅÍ Æ÷ÀÎÅÍ..*/
942
943	dprint(2, " update entire region, addr %x size %x src %x\n", base, size, source);
944
945	r = halFlashWrite(base, size, source);
946	if (r) {
947	dprint(0, "!! %s: halFlashWrite(%x, sz %x) err %d\n", __FUNCTION__,
948	base, size, r);
949	goto end_of_flash_sync;
950	}
951
952	dprint(2, " verification..\n");
953	for (k=0; k<size; k+=TMPBLKSZ)
954	{
955	/* ÀÌ¹ø loop¿¡ ºñ±³ÇÒ Å©±â.. ¸¶Áö¸· ³¡ ºÎºÐÀÌ¸é Å©±â°¡ TMPBLKSZ ÀÌ ¾Æ´Ò¼ö ÀÖ´Ù.*/
956	this_size = min(TMPBLKSZ, size-k);
957
958	r = halFlashRead(base + k, this_size, tmp);
959	if (r) {
960	dprint(0, "!! flash read err during verification, %d\n", r);
961	goto end_of_flash_sync;
962	}
963
964	if ((offset = DHL_DBG_MemCmp(&source[k], tmp, this_size)) >= 0) {
965	dprint(0, "!! verify err! [%u] buf %u != flash %u\n",
966	k+offset, source[k+offset], tmp[offset]);
967	r = statusError; /* statusVerifyError..*/
968	goto end_of_flash_sync;
969	}
970	} /* end verify */
971	}
972
973	/* write magic key and count */
974
975	/* µð¹ö±ë Å×½ºÆ® ¿ëÀ¸·Î, ±âÁ¸ µ¥ÀÌÅÍ¸¦ ¸ÕÀú º¸¿©ÁØ´Ù. */
976	halFlashRead(g_flashUserBlockInfo[target].start_addr, 4+DMW_SIZE_COUNTING_BUF, header);
977	dprint(2, " write magic key.. (old data: %02x%02x%02x, old cnt %d)\n",
978	header[0], header[1], header[2], p_get_flash_counting(&header[4]));
979
980	/* »õ·Î¿î °ªÀ» ÁØºñÇÏ°í ±â·ÏÇÑ´Ù. */
981	memcpy(header, g_NvFlashMagic, 4);
982	count = NextCount(count);
983	p_set_flash_counting(count, &header[4]);
984
985	base = g_flashUserBlockInfo[target].start_addr;
986
987	r = halFlashWrite(base, 4+DMW_SIZE_COUNTING_BUF, header);
988	if (r) {
989	dprint(0, "!! %s: halFlashWrite(magic, cnt %d) err %d\n", __FUNCTION__, count, r);
990	}
991
992	else
993	dprint(2, "==== Block %d (%x): new count %d updated\n", target, base, count);
994
995	/* 100422, nvram update ÈÄ flush ÇØÁØ´Ù */
996	halFlashSync();
997
998	end_of_flash_sync:
999
1000	if (pFlashShadowBuffer)
1001	DHL_OS_Free((void**)&pFlashShadowBuffer);
1002
1003	unlock_nvram_sema4(NVRAM_DEVICE_LOCK_FLASH);
1004
1005	return (STATUS)r;
1006	}
1007
1008
1009	/*------------------------------------------
1010	FlashNvmFormat
1011	*/
1012	STATUS FlashNvmFormat(void)
1013	{
1014	int r, r0;
1015	int target;
1016	UINT8 buf[4+DMW_SIZE_COUNTING_BUF]={0,0,0,0,};
1017	UINT8 cnt = 1;
1018	UINT32 base;
1019
1020	lock_nvram_sema4(NVRAM_DEVICE_LOCK_FLASH);
1021
1022	dprint(2, "%s:\n", __FUNCTION__);
1023
1024	/* µÎ blockÀ» ¸ðµÎ »èÁ¦ÇÑ´Ù.*/
1025
1026	for (target=0; target<2; target++)
1027	{
1028	base = g_flashUserBlockInfo[target].start_addr;
1029
1030	memcpy(buf, g_NvFlashMagic, 4);
1031	cnt = InitialCount();
1032	/* ÃÖÃÊÀÇ °ªÀº ¸ðµÎ 0À¸·Î ÇÑ´Ù.
1033	¾ÆÁ÷ Á¦´ë·Î µÈ µ¥ÀÌÅÍ°¡ ±â·ÏµÇÁö ¾Ê¾ÒÀ¸¹Ç·Î invalid ÇÏ´Ù´Â Á¤º¸¸¦ ³²°ÜµÖ¾ß ÇÑ´Ù. */
1034
1035	p_set_flash_counting(cnt, &buf[4]);
1036
1037	/dprint(3, " write magic key and initial count value %d\n", cnt);/
1038
1039	r = halFlashWrite(base, 4+DMW_SIZE_COUNTING_BUF, buf);
1040	if (r) {
1041	dprint(0, "!! %s: halFlashWrite(magic, cnt %d) err %d\n", __FUNCTION__, cnt, r);
1042	}
1043	else
1044	dprint(2, " Block %d (%x): new count %d updated\n", target, base, cnt);
1045	}
1046
1047	// ´ÙÀ½¹ø¿¡ _ReadSync ¸¦ ÇÏÁö ¾Ê°í ¹Ù·Î write °¡´ÉÇÏµµ·Ï..
1048	memset(g_NvFlashBuffer, 0xff, FLASH_USER_AREA_SIZE);
1049	g_NvFlashBufferValid = TRUE;
1050
1051	dprint(1, " Format completed\n");
1052	unlock_nvram_sema4(NVRAM_DEVICE_LOCK_FLASH);
1053
1054	return (STATUS)r;
1055	}
1056
1057
1058	STATUS FlashNvmCheckValid(void)
1059	{
1060	STATUS status;
1061	UINT8 buf[10];
1062
1063	/* ¸¸¾à flash cache°¡ ¼öÁ¤µÈ »óÅÂ¶ó¸é
1064	ºÎÁÖÀÇ·Î invalidate ÇÏ´Ù°¡´Â µ¥ÀÌÅÍ¸¦ ÀÒ¾î¹ö¸± °ÍÀÌ´Ù.
1065	»ç¿ë ±ÝÁö..
1066	FlashNvmInvalidateCacheBuffer();
1067	*/
1068	/* this cause flash read sync. reading ANY byte is ok.*/
1069	status = FlashNvmRead(0, 1, buf);
1070
1071	if (status) {
1072	dprint(0, "!! flash seems unformatted\n");
1073	return status;
1074	}
1075
1076	#if 0 /* bug! this is not needed and below code has error!*/
1077	if (memcmp(buf, g_NvFlashMagic, 3)) {
1078	return statusNotInitialized;
1079	}
1080	#endif
1081
1082	return statusOK;
1083	}
1084
1085
1086
1087
1088	#if COMMENT
1089	____NvRamWorkerThread_____(){}
1090	#endif
1091
1092	/*******************************************************************
1093	NvRam WorkerThread
1094	Main purpose of this task is background FlashSync..
1095
1096	********************************************************************/
1097
1098	#define NWT_TASK_PRIORITY TASK_PRI_DMW_FLASH
1099	#define NWT_STACK_SIZE 8192
1100
1101	volatile DHL_OS_TASK_ID g_NvRam_WorkerTask;
1102
1103
1104	UINT32 g_NvRam_FlashSyncCount;
1105	/*
1106	¾ÆÁ÷ test¿ëÀÓ..
1107	caller°¡ ¾ðÁ¦ flash sync°¡ Á¾·áµÇ¾ú´ÂÁö¸¦ ¾Ë¼ö ÀÖµµ·Ï count °ªÀ» Á¦°øÇÏÀÚ..
1108	*/
1109
1110	BOOL g_NvRam_FlashSyncWorking;
1111
1112
1113	typedef enum
1114	{
1115	/* NvRam Worker Task Command*/
1116
1117	NWTCMD_FlashSync = 0xB0,
1118
1119	/NWTCMD_FlashFormat, //not defined../
1120	/NWTCMD_Flashxxxx, /
1121
1122
1123	NWTCMD_Shutdown,
1124
1125	} NWTCMD;
1126
1127	/----------------------------------------------/
1128	/* User Message Queue implementation*/
1129
1130	typedef struct
1131	{
1132	NWTCMD cmd;
1133	//UINT32 param;
1134
1135	} NwtCmdMsg;
1136
1137	static const char NwtCmdName(NwtCmdMsg msg)
1138	{
1139	if (msg->cmd == NWTCMD_FlashSync) return "sync";
1140	if (msg->cmd == NWTCMD_Shutdown) return "shutdown";
1141	return "?";
1142	}
1143
1144	static DMW_MSGQUE g_NvmMsgQue;
1145
1146	#define SZ_USER_MSG_Q 50
1147
1148	//NwtCmdMsg g_NvRam_WorkerUserQ[SZ_USER_MSG_Q];
1149
1150	/* Mutex = { SemID, Owner, lockCnt, FailCnt, UseOsMutex, Name, flag, traceLvl }*/
1151	static DMW_MUTEX NwtMsgQueMutex =
1152	{ 0, 0, 0, 0, FALSE, "NwtMsgQ", OS_SEM_PRIO, 1, };
1153
1154
1155	void NwtLockMutex(BOOL bLock)
1156	{
1157	if (bLock)
1158	DMW_LockMutex(&NwtMsgQueMutex);
1159	else
1160	DMW_UnlockMutex(&NwtMsgQueMutex);
1161	}
1162
1163
1164
1165	void TestPrintUserMsgQ()
1166	{
1167	NwtLockMutex(TRUE);
1168	DMW_SYS_PrintUserMsgs(&g_NvmMsgQue, (DMW_FN_MSG_NAME)NwtCmdName);
1169	NwtLockMutex(FALSE);
1170	}
1171
1172
1173	static BOOL NwtIsSyncCmd(NwtCmdMsg *msg, UINT32 param)
1174	{
1175	return (msg->cmd == NWTCMD_FlashSync) ? TRUE : FALSE;
1176	}
1177
1178
1179	int tNvRamWorker(int arg)
1180	{
1181	NwtCmdMsg um;
1182	STATUS status;
1183	UINT32 tick;
1184	int delay = 1000/10;
1185
1186
1187	/*------------------------------
1188	command message ¹Þ´Â ºÎºÐ.
1189	------------------------------*/
1190
1191	label_loop_begin:
1192
1193	status = DMW_SYS_GetUserMsg(&g_NvmMsgQue, &um, DHL_TIMEOUT_FOREVER);
1194	if (status) {
1195	DHL_OS_Delay(delay);
1196	goto label_loop_begin;
1197	}
1198	NwtLockMutex(TRUE);
1199	g_NvRam_FlashSyncWorking = TRUE;
1200	NwtLockMutex(FALSE);
1201
1202	/*------------------------------
1203	command message Ã³¸® ºÎºÐ..
1204	------------------------------*/
1205
1206	if (um.cmd == NWTCMD_FlashSync)
1207	{
1208	int i, ptr;
1209	//UINT32 count = um.param;
1210	BOOL bFutureFlashSyncFound = FALSE;
1211
1212	dprint(2, "NWTCMD_FlashSync:\n");
1213
1214	/* We must not do flash sync whenever command receives.
1215	first, we should peek user msg Queue..
1216	*/
1217	NwtLockMutex(TRUE);
1218	bFutureFlashSyncFound = DMW_SYS_CheckSpecificMsgExist(&g_NvmMsgQue,
1219	(DMW_FN_MSG_CHECK)NwtIsSyncCmd, 0);
1220	NwtLockMutex(FALSE);
1221
1222	if (bFutureFlashSyncFound) {
1223	dprint(2, "\t!! this flash sync cmd is ignored by future FlashSync..\n");
1224	goto label_loop_begin;
1225	}
1226
1227	/* Now, do flash sync..*/
1228
1229	dprint(2, "\t--> Start flash sync (NULL)\n");
1230	tick = DHL_OS_GetMsCount();
1231	FlashNvmSync(NULL);
1232
1233	NwtLockMutex(TRUE);
1234	g_NvRam_FlashSyncCount++; /* cafrii 050413 add for provide info to caller when sync end*/
1235	g_NvRam_FlashSyncWorking = FALSE;
1236	NwtLockMutex(FALSE);
1237
1238	dprint(2, "\t<-- End flash sync (NULL), %d ms\n",
1239	(DHL_OS_GetMsCount()-tick));
1240	}
1241	else if (um.cmd == NWTCMD_Shutdown)
1242	{
1243	dprint(2, "NWTCMD_Shutdown:\n");
1244
1245	goto label_loop_end;
1246	}
1247
1248	goto label_loop_begin;
1249
1250
1251	/*------------------------------
1252	task Á¾·á.. shutdown
1253	------------------------------*/
1254
1255	label_loop_end:
1256
1257	dprint(2, "NvRam Worker task is about to shutdown..\n");
1258
1259	NwtLockMutex(TRUE);
1260	g_NvRam_FlashSyncWorking = FALSE;
1261	NwtLockMutex(FALSE);
1262
1263
1264	g_NvRam_WorkerTask = 0;
1265	DHL_OS_SelfDeleteTask();
1266
1267	return 0;
1268	}
1269
1270
1271
1272	int NwtCreateResources()
1273	{
1274	DHL_OS_TASK_ID tid;
1275
1276	if (g_NvRam_WorkerTask == 0)
1277	{
1278	dprint(2, "** create Nwt Task..\n");
1279	tid = DHL_OS_CreateTask((DHL_OS_TASKFUNCTION) tNvRamWorker, "NwtTask",
1280	NWT_TASK_PRIORITY, NWT_STACK_SIZE, 0);
1281	if (tid == (DHL_OS_TASK_ID)0) {
1282	dprint(0, "!! NwtTask spawn err!\n");
1283	return statusOutOfResource;
1284	}
1285	dprint(2, " task %x created.\n", tid);
1286	g_NvRam_WorkerTask = tid;
1287	}
1288
1289	return statusOK;
1290	}
1291
1292	STATUS NwtSendCommand(NWTCMD cmd, UINT32 param)
1293	{
1294	NwtCmdMsg um;
1295	STATUS status;
1296
1297	memset(&um, 0, sizeof(NwtCmdMsg));
1298	um.cmd = cmd;
1299	//um.param = param;
1300
1301	NwtLockMutex(TRUE);
1302	status = DMW_SYS_AddUserMsg(&g_NvmMsgQue, &um);
1303	NwtLockMutex(FALSE);
1304
1305	return status;
1306	}
1307
1308
1309
1310
1311	#if COMMENT
1312	______NvRam_API_______(){}
1313	#endif
1314
1315
1316
1317
1318
1319	/*******************************************************************
1320	NvRamInit
1321
1322	NvRamÀ» »ç¿ëÇÏ±â À§ÇØ¼ ÃÊ±âÈ¸¦ ÇÑ´Ù.
1323	½ÇÁ¦·Î format, reset µîÀÇ ÀÛ¾÷À» ÇÏ´Â °ÍÀÌ ¾Æ´Ô¿¡ À¯ÀÇ.
1324
1325	********************************************************************/
1326
1327	void NvRamInit(void)
1328	{
1329	DMW_SYS_InitMsgQue(&g_NvmMsgQue, sizeof(NwtCmdMsg), SZ_USER_MSG_Q,
1330	(DMW_FN_MSG_NAME)NwtCmdName);
1331
1332	FlashNvmInit();
1333
1334	/* eepromÀº µ¿Àû initÀ» ÇÏµµ·Ï ÀÌ¹Ì µÇ¾î ÀÖÀ¸´Ï ºÒÇÊ¿ä.*/
1335	}
1336
1337
1338	/*******************************************************************
1339	NvRamGetAvailableSize
1340
1341
1342	********************************************************************/
1343
1344	UINT32 NvRamGetAvailableSize(int device)
1345	{
1346	/------------------- device 1 -------------------/
1347
1348	if (device) /* device 1*/
1349	return FlashNvmGetAvailableSize();
1350
1351	#if SUPPORT_DMW_EEPROM
1352	return EepromGetAvailableSize();
1353	#else
1354	return 0;
1355	#endif
1356
1357	}
1358
1359
1360	/*******************************************************************
1361	NvRamCheckValid
1362
1363
1364	********************************************************************/
1365
1366	STATUS NvRamCheckValid(void)
1367	{
1368	/* eepromÀÇ °æ¿ì´Â valid check°¡ ºÒ°¡´É.*/
1369
1370	return FlashNvmCheckValid();
1371	}
1372
1373	/*******************************************************************
1374	NvRamRead
1375
1376	NvRam µ¥ÀÌÅÍ¸¦ ÀÐ´Â´Ù.
1377	device 1ÀÇ °æ¿ì (flash) shadow buffer¿Í I/O¸¦ ¼öÇà.
1378
1379	********************************************************************/
1380
1381	STATUS NvRamRead(UINT32 address, UINT32 size, UINT8 *buf)
1382	{
1383	int err;
1384
1385	if (NwtCreateResources())
1386	return statusOutOfResource;
1387
1388	if (size == 0)
1389	return statusOK;
1390
1391	/------------------- device 1 -------------------/
1392
1393	if (address & 0x80000000) /* device 1*/
1394	{
1395	err = FlashNvmRead(address & 0x7fffffff, size, buf);
1396
1397	return (STATUS)err;
1398	}
1399
1400	/------------------- device 0 -------------------/
1401
1402	#if SUPPORT_DMW_EEPROM
1403
1404	err = EepromRead(address, size, buf);
1405
1406	return err;
1407
1408	#else
1409	return statusNotImpl;
1410
1411	#endif /* SUPPORT_DMW_EEPROM*/
1412
1413	}
1414
1415
1416	/*******************************************************************
1417	NvRamWrite
1418
1419	NvRam¿¡ µ¥ÀÌÅÍ¸¦ ±â·ÏÇÑ´Ù.
1420	device 1ÀÇ °æ¿ì (flash) shadow buffer¿Í I/O¸¦ ¼öÇà.
1421
1422	********************************************************************/
1423
1424	STATUS NvRamWrite(UINT32 address, UINT32 size, UINT8 *buf)
1425	{
1426	int err;
1427
1428	if (NwtCreateResources())
1429	return statusOutOfResource;
1430
1431	if (size == 0)
1432	return statusOK;
1433
1434	/------------------- device 1 -------------------/
1435
1436	if (address & 0x80000000) /* device 1*/
1437	{
1438	err = FlashNvmWrite(address & 0x7fffffff, size, buf);
1439
1440	return (STATUS)err;
1441	}
1442
1443	/------------------- device 0 -------------------/
1444
1445	#if SUPPORT_DMW_EEPROM
1446
1447	err = EepromWrite(address, size, buf);
1448
1449	return err;
1450
1451	#else
1452	return statusNotImpl;
1453
1454	#endif /* SUPPORT_DMW_EEPROM*/
1455
1456	}
1457
1458
1459	/*******************************************************************
1460	NvRamSync
1461
1462	flash ¿µ¿ªÀÇ ÁÖ¼ÒÀÏ °æ¿ì shadow buffer ³»¿ë°ú ½ÇÁ¦
1463	device ³»¿ëÀ» ÀÏÄ¡½ÃÅ²´Ù.
1464	Áï buffer->flash·Î ±â·ÏÇÔ.
1465
1466	********************************************************************/
1467
1468	STATUS NvRamSync(UINT32 addr, PartMapRange *pPartMapList)
1469	{
1470	STATUS r;
1471
1472	if (NwtCreateResources())
1473	return statusOutOfResource;
1474
1475	if (addr & 0x80000000)
1476	{
1477	r = NwtSendCommand(NWTCMD_FlashSync, 0);
1478	dprint(2, "NvRamSync: deferred to NWT..\n");
1479	return r;
1480	}
1481
1482	#if SUPPORT_DMW_EEPROM
1483
1484	/* device 0¿¡ ´ëÇØ¼´Â sync °³³äÀÌ ¾ø´Ù.*/
1485	return statusOK;
1486
1487	#else
1488
1489	/* eeprom ±â´É ¾øÀ½.*/
1490	return statusNotImpl;
1491
1492	#endif
1493
1494	}
1495
1496
1497	/*******************************************************************
1498	NvRamIsSyncEnd
1499
1500	NvRamSync ÀÛ¾÷ÀÌ Á¾·áµÇ¼ idle »óÅÂÀÌ¸é TRUE¸¦ ¸®ÅÏ.
1501
1502	********************************************************************/
1503
1504	BOOL NvRamIsSyncEnd()
1505	{
1506	/* return TRUE if Sync is completed.*/
1507
1508	BOOL bSyncWorking;
1509
1510	NwtLockMutex(TRUE);
1511
1512	if (!DMW_SYS_UserMsgExist(&g_NvmMsgQue) && g_NvRam_FlashSyncWorking == FALSE)
1513	bSyncWorking = FALSE;
1514	else
1515	bSyncWorking = TRUE;
1516
1517	NwtLockMutex(FALSE);
1518
1519	return !bSyncWorking;
1520	}
1521
1522
1523	/*******************************************************************
1524	NvRamWaitForSyncEnd
1525
1526	NvRam Sync ÀÛ¾÷ÀÌ ÁøÇàÁßÀÏ °æ¿ì Á¾·áµÉ ¶§ ±îÁö ±â´Ù¸°´Ù.
1527
1528	********************************************************************/
1529
1530	void NvRamWaitForSyncEnd()
1531	{
1532	UINT32 ms0, ms1, ms;
1533	ms0 = ms1 = DHL_OS_GetMsCount();
1534	while (!NvRamIsSyncEnd()) {
1535	ms = DHL_OS_GetMsCount();
1536	if (ms-ms1 > 4000) {
1537	dprint(0, "!! nvm sync too slow! %u ms elapsed?\n", ms-ms0);
1538	ms1 = ms;
1539	}
1540	DHL_OS_Delay(100);
1541	}
1542	}
1543
1544
1545	/*******************************************************************
1546	NvRamInvalidateCache
1547
1548	flash shadow bufferÀÇ ³»¿ëÀ» ¹«È¿È ½ÃÅ²´Ù.
1549	ÀÌÈÄ NvRamRead/Write¸¦ ÇÒ ¶§ ´Ù½Ã device·ÎºÎÅÍ ÀÐ¾îµéÀÎ´Ù.
1550
1551	********************************************************************/
1552
1553	void NvRamInvalidateCache()
1554	{
1555	/device 0:/
1556	/EEPROM¿¡´Â cache°¡ ¾ø´Ù./
1557
1558	/* device 1:*/
1559	FlashNvmInvalidateCacheBuffer();
1560	}
1561
1562
1563	/*******************************************************************
1564	NvRamFormat
1565
1566	nvm device¸¦ Æ÷¸ËÇÑ´Ù.
1567	flash nvm¿¡¸¸ ÇØ´ç.
1568
1569	********************************************************************/
1570
1571	STATUS NvRamFormat()
1572	{
1573	NvRamWaitForSyncEnd();
1574
1575	return FlashNvmFormat();
1576	}
1577
1578
1579
1580	/*******************************************************************
1581	NvRamShutdown
1582
1583
1584	********************************************************************/
1585
1586	STATUS NvRamShutdown()
1587	{
1588	UINT32 tickStart;
1589
1590	NwtSendCommand(NWTCMD_Shutdown, 0);
1591
1592	/* shutdown µÉ ¶§±îÁö ±â´Ù·Á¾ß ÇÑ´Ù..*/
1593
1594	tickStart = DHL_OS_GetMsCount();
1595
1596	while (g_NvRam_WorkerTask && DHL_OS_GetMsCount() - tickStart < 6*1000)
1597	DHL_OS_Delay(1000/4);
1598
1599	dprint(2, "NvRamShutdown: WorkerTask %s died\n", g_NvRam_WorkerTask ? "NOT" : "");
1600
1601	return g_NvRam_WorkerTask ? statusError : statusOK;
1602	}
1603
1604
1605
1606
1607	#if COMMENT
1608	____Test___________(){}
1609	#endif
1610
1611
1612	void _dump_eeprom(int start, int size)
1613	{
1614	int i;
1615	UINT8 t[1];
1616	DHL_OS_Printf("Secret Dump of EEPROM (%x~%x)\n", start, start+size);
1617
1618	for (i=0; i<size; i++) {
1619
1620	if (i%16 == 0) DHL_OS_Printf("%04x: ", start+i);
1621
1622	t[0] = 0xff;
1623	NvRamRead(start+i, 1, t);
1624
1625	DHL_OS_Printf("%02x ", (int)t[0]);
1626
1627	if (i%16 == 7) DHL_OS_Printf(" ");
1628	else if (i%16 == 15) DHL_OS_Printf("\n");
1629	}
1630	}
1631
1632	/* NOR flash´Â local bus¿¡ ºÙ¾î ÀÖÀ¸¹Ç·Î ±»ÀÌ ¾Æ·¡ ÇÔ¼ö »ç¿ëÇÒ ÇÊ¿ä°¡ ¾ø´Ù.
1633	Shell¿¡¼ ±×³É ¾Æ·¡ ÀÔ·Â..
1634
1635	-> d 0xbb000000 + offset
1636	*/
1637
1638	void _dump_flash(UINT32 start, UINT32 size)
1639	{
1640	#define DUMP_CHUNK_SIZE 512
1641
1642	unsigned int i, k, len, r;
1643	UINT8 t[DUMP_CHUNK_SIZE];
1644
1645	//int oldflag = g_Trace_NvRamDebug;
1646	//g_Trace_NvRamDebug = 1;
1647
1648	if (start & 0xf) {
1649	size += (start & 0xf);
1650	start &= ~0xf;
1651	}
1652
1653	DHL_OS_Printf("==== Secret Dump of Flash (%x~%x) ====\n", start, start+size);
1654
1655	for (i=0; i<(size+DUMP_CHUNK_SIZE-1)/DUMP_CHUNK_SIZE; i++)
1656	{
1657	len = min(size - DUMP_CHUNK_SIZE*i, DUMP_CHUNK_SIZE);
1658
1659	r = halFlashRead(start+i*DUMP_CHUNK_SIZE, len, t);
1660	/* len Å©±â¸¸ ÀÐ¾îµµ µÇ°í, ´Ù ÀÐ¾îµµ µÇ°í..*/
1661
1662	/* display..*/
1663	for (k=0; k<len; k++)
1664	{
1665	if (k%16 == 0) DHL_OS_Printf("%7x: ", start+i*DUMP_CHUNK_SIZE+k);
1666
1667	if (r) DHL_OS_Printf(".. "); /* invalid block..*/
1668	else DHL_OS_Printf("%02x ", (int)t[k]);
1669
1670	if (k%16 == 7) DHL_OS_Printf(" ");
1671	else if (k%16 == 15) DHL_OS_Printf("\n");
1672	}
1673	}
1674	DHL_OS_Printf("\n");
1675	//g_Trace_NvRamDebug = oldflag;
1676	}
1677
1678
1679
1680
1681	#if USE_FLASH_EMULATION
1682	// flash ÀåÄ¡°¡ ¾ø´Â hardware È¯°æ¿¡¼ Å×½ºÆ®.
1683
1684
1685	#endif
1686
1687
1688
1689
1690
1691
1692	#if COMMENT
1693	____DebugSymbol_________(){}
1694	#endif
1695
1696
1697
1698	#if DMW_REGISTER_DEBUG_SYMBOL
1699
1700	static DHL_SymbolTable NvRamDebugSymbols[] =
1701	{
1702	DHL_FNC_SYM_ENTRY(NvRamIsSyncEnd),
1703	DHL_FNC_SYM_ENTRY(NvRamWaitForSyncEnd),
1704	DHL_FNC_SYM_ENTRY(NvRamFormat),
1705
1706	DHL_FNC_SYM_ENTRY(_dump_eeprom),
1707	DHL_FNC_SYM_ENTRY(_dump_flash),
1708
1709	#if SUPPORT_DMW_EEPROM
1710	DHL_FNC_SYM_ENTRY(_TestHalEepromWrite4),
1711	#endif
1712
1713	//DHL_VAR_SYM_ENTRY(g_Trace_NvRamDebug),
1714
1715	DHL_VAR_SYM_ENTRY(g_NvFlashForceCacheDirty),
1716
1717	};
1718	#endif
1719
1720
1721	void NvRamRegisterDebugSymbol()
1722	{
1723	#if DMW_REGISTER_DEBUG_SYMBOL
1724	DHL_DBG_RegisterSymbols(NvRamDebugSymbols, DHL_NUMSYMBOLS(NvRamDebugSymbols));
1725	#endif
1726	}
1727
1728
1729
1730
1731
1732	/*************************************************************************
1733	Revision history:
1734
1735	1.02 2005/4/11 _FlashSelectValidBlock ¿¡¼ cnt1<cnt0 °æ¿ì offset°è»ê ¹ö±× ¼öÁ¤ (important!!)
1736
1737	1.01 2004/12/21 DMW_FLASH_SIZE Ãß°¡.. DMW_Config.h ¿¡¼ ÁöÁ¤ÇØ¾ß ÇÔ.
1738	1.00 2004/12/09 flashBlockBase¸¦ 8MByte flash·Î ÇØ¼ Å×½ºÆ®..
1739
1740	0.45 2004/9/20 DMW_Config µµÀÔ, config »çÇ× ÀÌµ¿
1741	0.44 2004/7/27 debug print level added
1742	0.43 2004/7/23 NvRamShutdown added
1743	0.42 2004/6/11 g_NvRam_Support512EEPROM added (for testing)
1744	0.41 2004/6/7 move EEPROM type flag to eeprom.h
1745	0.4 2004/5/24 support NOR_FLASH code (require new driver)
1746	support new 512 byte size EEPROM HAL code (require new driver)
1747	add eeprom write retry code
1748	0.3 2004/1/13 NvRam worker task implemented
1749	delete USE_NVRAM_SEMA4, add new shadow buf lock sema4
1750	nvram_sema4 protection is done in more lower layer (each Flash XXX routines)
1751	0.21 2003/11/17 new flash API (shadow buffer and PartMapList support)
1752	0.2 2003/11/13 flash API (hal and batch write mechanism)
1753	0.1 2003/9/4
1754
1755	**************************************************************************/

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source: svn/newcon3bcm2_21bu/dst/dmw/src/System/DMW_NvRam.c

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