# WARNING: For multi stage bootloader to compile makefile must run from the
# bootloader directory otherwise it will not link! Please take this in to 
# consideration when modifying this makefile and build process.

# Bootloader with MemsysInitLib support. 
# Older shmoo variants are supported by the bootloader.mk. Only MemsysInitLib
# supported by this makefile.

# Project Root Directory
PROOT := $(shell cd ../../../ ; /bin/pwd)

DEBUG ?= y

# we always have to build at least 2 stage bootloader. MULTI_STAGE flag
# is no longer applicable

BLD_TARGET = bootloader

# Dram scrambling test option. A0/A1 Multistage bootloader only.
ENABLE_BOOT_SCRAMBLE_DRAM ?= n

# complie in BSP firmware
ENABLE_BSEC=n

# AVS support, default is y, but can disable for someboard which doesn't have AVS circuitry
ENABLE_AVS ?=y

include $(PROOT)/dta/build/platform.inc

MAGNUM = $(PROOT)/magnum
BSP = $(PROOT)/rockford/bsp
LIBDIR = $(PROOT)/dta/lib
DTADIR = $(PROOT)/dta
BLDDIR = $(PROOT)/dta/src/bootloader7574

CFLAGS += -ffunction-sections

CFLAGS += -DBCHP_CHIP=$(BCHP_CHIP) -DBCHP_VER=BCHP_VER_$(BCHP_VER)
CFLAGS += -DBSTD_CPU_ENDIAN=BSTD_ENDIAN_LITTLE

CFLAGS += -DMEMSYSINIT=1
ifeq ($(ENABLE_AVS),y)
CFLAGS += -DAVS_ENABLE=1
endif

ifeq ($(ENABLE_BOOT_SCRAMBLE_DRAM),y)
CFLAGS += -DBOOT_SCRAMBLE_DRAM=1
endif

# start MEMC configuration profiles and related variables
CFG_MCB0_OFFSET ?= 2176 #0x880
CFG_MEMC_0_DEV_PROFILE ?= DEFAULT
CFG_PROFILE ?= 1
ifeq ($(strip ${CFG_PROFILE}),1)
	CFG_MEMC_0_FREQ ?= 533
	CFLAGS += -DPROFILE=1
	CFLAGS += -DCPU_MDIV=8
	CFLAGS += -DAVD_MDIV=15
	CFLAGS += -DAVD_CPU_MDIV=15
	CFLAGS += -DDSP_MDIV=15
	CFLAGS += -DSCB_MDIV=12
	CFLAGS += -DMEMC_0_DDR_FREQ=533
	ifeq ($(strip ${CFG_MEMC_0_DEV_PROFILE}),DEFAULT)
		PROFILE_NAME = 1066G
	else
		PROFILE_NAME = 1066${CFG_MEMC_0_DEV_PROFILE}
	endif
endif	
ifeq ($(strip ${CFG_PROFILE}),2)
	CFG_MEMC_0_FREQ ?= 800
	CFLAGS += -DPROFILE=2
	CFLAGS += -DCPU_MDIV=6
	CFLAGS += -DAVD_MDIV=12
	CFLAGS += -DAVD_CPU_MDIV=12
	CFLAGS += -DDSP_MDIV=8
	CFLAGS += -DSCB_MDIV=12
	CFLAGS += -DMEMC_0_DDR_FREQ=800
	ifeq ($(strip ${CFG_MEMC_0_DEV_PROFILE}),DEFAULT)
		PROFILE_NAME = 1600K
	else
		PROFILE_NAME = 1600${CFG_MEMC_0_DEV_PROFILE}
	endif
endif	
ifeq ($(strip ${CFG_PROFILE}),3)
	CFG_MEMC_0_FREQ ?= 933
	CFLAGS += -DPROFILE=3
	CFLAGS += -DCPU_MDIV=5
	CFLAGS += -DAVD_MDIV=10
	CFLAGS += -DAVD_CPU_MDIV=8
	CFLAGS += -DDSP_MDIV=8
	CFLAGS += -DSCB_MDIV=11
	ifeq ($(strip ${CFG_MEMC_0_FREQ}),833)
	CFLAGS += -DMEMC_0_DDR_FREQ=833
	endif
	ifeq ($(strip ${CFG_MEMC_0_FREQ}),866)
	CFLAGS += -DMEMC_0_DDR_FREQ=866
	endif
	ifeq ($(strip ${CFG_MEMC_0_FREQ}),900)
	CFLAGS += -DMEMC_0_DDR_FREQ=900
	endif
	ifeq ($(strip ${CFG_MEMC_0_FREQ}),933)
	CFLAGS += -DMEMC_0_DDR_FREQ=933
	endif
	ifeq ($(strip ${CFG_MEMC_0_DEV_PROFILE}),DEFAULT)
		PROFILE_NAME = 1866M
	else
		PROFILE_NAME = 1866${CFG_MEMC_0_DEV_PROFILE}
	endif
endif	
ifeq ($(strip ${CFG_PROFILE}),4)
	CFG_MEMC_0_FREQ ?= 933
	CFLAGS += -DPROFILE=4
	CFLAGS += -DCPU_MDIV=4
	CFLAGS += -DAVD_MDIV=9
	CFLAGS += -DAVD_CPU_MDIV=7
	CFLAGS += -DDSP_MDIV=6
	CFLAGS += -DSCB_MDIV=9
	ifeq ($(strip ${CFG_MEMC_0_FREQ}),833)
	CFLAGS += -DMEMC_0_DDR_FREQ=833
	endif
	ifeq ($(strip ${CFG_MEMC_0_FREQ}),866)
	CFLAGS += -DMEMC_0_DDR_FREQ=866
	endif
	ifeq ($(strip ${CFG_MEMC_0_FREQ}),900)
	CFLAGS += -DMEMC_0_DDR_FREQ=900
	endif
	ifeq ($(strip ${CFG_MEMC_0_FREQ}),933)
	CFLAGS += -DMEMC_0_DDR_FREQ=933
	endif
	ifeq ($(strip ${CFG_MEMC_0_DEV_PROFILE}),DEFAULT)
		PROFILE_NAME = 1866M
	else
		PROFILE_NAME = 1866${CFG_MEMC_0_DEV_PROFILE}
	endif
endif	
ifeq ($(strip ${CFG_PROFILE}),5)
	CFG_MEMC_0_FREQ ?= 1067
	CFLAGS += -DPROFILE=5
	CFLAGS += -DCPU_MDIV=5
	CFLAGS += -DAVD_MDIV=10
	CFLAGS += -DAVD_CPU_MDIV=8
	CFLAGS += -DDSP_MDIV=8
	CFLAGS += -DSCB_MDIV=9
	ifeq ($(strip ${CFG_MEMC_0_FREQ}),966)
	CFLAGS += -DMEMC_0_DDR_FREQ=966
	endif
	ifeq ($(strip ${CFG_MEMC_0_FREQ}),1000)
	CFLAGS += -DMEMC_0_DDR_FREQ=1000
	endif
	ifeq ($(strip ${CFG_MEMC_0_FREQ}),1033)
	CFLAGS += -DMEMC_0_DDR_FREQ=1033
	endif
	ifeq ($(strip ${CFG_MEMC_0_FREQ}),1067)
	CFLAGS += -DMEMC_0_DDR_FREQ=1067
	endif
	PROFILE_NAME = 2133N
endif	
ifeq ($(strip ${CFG_PROFILE}),6)
	CFG_MEMC_0_FREQ ?= 667
	CFLAGS += -DPROFILE=6
	CFLAGS += -DCPU_MDIV=5
	CFLAGS += -DAVD_MDIV=10
	CFLAGS += -DAVD_CPU_MDIV=8
	CFLAGS += -DDSP_MDIV=8
	CFLAGS += -DSCB_MDIV=12
	CFLAGS += -DMEMC_0_DDR_FREQ=667
	ifeq ($(strip ${CFG_MEMC_0_DEV_PROFILE}),DEFAULT)
		PROFILE_NAME = 1333H
	else
		PROFILE_NAME = 1333${CFG_MEMC_0_DEV_PROFILE}
	endif
endif	

# Following defines are common for both memc0 and memc 1
CFG_MEMC_0_DEV_TECH ?= 2G
CFG_MEMC_0_DEV_WIDTH ?= 8
CFG_MEMC_0_DDR_WIDTH ?= 16

ifeq ($(strip ${CFG_MEMC_0_DDR_WIDTH}),16)
	CFLAGS += -DMEMC_0_DDR_WIDTH=MEMC_DDR_16BIT
else
	CFLAGS += -DMEMC_0_DDR_WIDTH=MEMC_DDR_32BIT
endif
CFLAGS += -DMCB0_OFFSET=$(CFG_MCB0_OFFSET)
# end MEMC configuration profiles and related variables


CFLAGS += -I$(MAGNUM)/basemodules/chp/$(BCHP_CHIP)/rdb/$(BCHP_VER_LOWER) \
	-I$(MAGNUM)/basemodules/chp \
	-I$(MAGNUM)/basemodules/std \
	-I$(MAGNUM)/basemodules/std/config \
	-I$(MAGNUM)/basemodules/std/types/ucos_ii \
	-I$(MAGNUM)/basemodules/err \
	-I$(MAGNUM)/basemodules/dbg \
	-I$(MAGNUM)/basemodules/reg \
	-I$(MAGNUM)/commonutils/lst \

CFLAGS += -I$(BSP)/bcm9$(BCHP_CHIP)/no-os/src/sde \
	-I$(BSP)/Shmoo/$(BCHP_CHIP)/memsysinitlib/include \
	-I$(BSP)/Shmoo/$(BCHP_CHIP)/memsysinitlib/src

CFLAGS += -I$(DTADIR)/src -I$(DTADIR)/src/z

ifeq ($(HAS_STANDBY),y)
CFLAGS += -DCONFIG_STANDBY -DUSERIO_ID=$(USERIO_ID)
endif

ifneq ($(DEBUG),y)
OBJTYPE := _prod
LIBTYPE := _production
endif

S1_SRC := bls1.S shmoosupport.S

ifeq ($(ENABLE_AVS),y)
AVSDIR := $(BSP)/AVS
S1_SRC += $(AVSDIR)/src/avs_start.c
CFLAGS += -I$(AVSDIR)/include -I$(BLDDIR)
SHMOO_LIB += $(AVSDIR)/$(BCHP_CHIP)/avs_lib_le$(OBJTYPE).pof
endif

SHMOO_LIB += $(BSP)/Shmoo/ddr40phy/build/memsysinitlib_2p2bld1_16bphy$(LIBTYPE)_le.a
MCB_DIR = $(BSP)/Shmoo/ddr40phy/$(BCHP_CHIP)
MCB_FILE = $(BCHP_CHIP)_$(CFG_MEMC_0_FREQ)MHz_${CFG_MEMC_0_DDR_WIDTH}b_dev${CFG_MEMC_0_DEV_TECH}x${CFG_MEMC_0_DEV_WIDTH}_DDR3_$(PROFILE_NAME)_le.mcb

XMODEM_SRC := $(DTADIR)/src/xmodem.c
Z_SRC := $(DTADIR)/src/z/adler32.c \
	$(DTADIR)/src/z/crc32.c \
	$(DTADIR)/src/z/inffast.c \
	$(DTADIR)/src/z/inflate.c \
	$(DTADIR)/src/z/inftrees.c \
	$(DTADIR)/src/z/zutil.c

BLD_SRC := bls2.S stage2.c clocks.c fast_heap.c $(XMODEM_SRC) $(Z_SRC)

ifeq (${HAS_STANDBY},y)
BLD_SRC += cir.c
endif

S1_OBJ :=  $(subst .S,.o,$(filter %.S, $(S1_SRC))) $(subst .c,.o, $(filter %.c, $(S1_SRC)))

BLD_OBJ := $(patsubst %.S,%.o,$(filter %.S,$(BLD_SRC))) $(patsubst %.s,%.o,$(filter %.s,$(BLD_SRC)))  $(patsubst %.c,%.o,$(filter %.c,$(BLD_SRC)))

BLD_DEP := $(patsubst %.o,%.d,$(filter %.o,$(BLD_OBJ))) 

LDFLAGS += -T $(BLDDIR)/bootloader2s.script --gc-sections

ifeq ($(ENABLE_BSEC),y)
BSEC_OBJ = key0data.o bsec_053_hddta.o
endif

CFLAGS := $(filter-out -nostdinc,$(CFLAGS))

all : $(BLD_TARGET).bin

$(BLD_TARGET).bin : $(BLD_TARGET).elf
	$(OBJCOPY) -S -O binary $< $@
	dd if=$(MCB_DIR)/$(MCB_FILE) of=$@ bs=1 seek=$(CFG_MCB0_OFFSET) conv=notrunc || rm $@

$(BLD_TARGET).elf : $(BLD_TARGET)_s1l.o  $(BSEC_OBJ) $(BLD_TARGET).o
	$(LD) -Map $(basename $@).map $(LDFLAGS) $^ $(LDLIBS) -o $@

clean : $(BLD_TARGET)_clean 

$(BLD_TARGET)_clean:
	$(RM) -f $(BLD_TARGET).elf $(BLD_TARGET).bin $(BLD_TARGET).map $(BLD_OBJ) $(BLD_DEP) $(S1_OBJ) $(BLD_TARGET)_s1.o $(BLD_TARGET)_s1l.o $(BLD_TARGET).o 

$(BLD_TARGET)_s1.o : $(S1_OBJ) $(SHMOO_LIB)
	$(LD) -r $(LFLAGS) $^ -o $@

$(BLD_TARGET)_s1l.o : $(BLD_TARGET)_s1.o
	$(OBJCOPY) -w -G __start -G key1 $^ $@

$(BLD_TARGET).o : $(BLD_OBJ)
	$(LD) -r $(LFLAGS) $^ -o $@

-include $(BLD_DEP)