/*************************************************************************** * Copyright (c) 2003-2006, Broadcom Corporation * All Rights Reserved * Confidential Property of Broadcom Corporation * * THIS SOFTWARE MAY ONLY BE USED SUBJECT TO AN EXECUTED SOFTWARE LICENSE * AGREEMENT BETWEEN THE USER AND BROADCOM. YOU HAVE NO RIGHT TO USE OR * EXPLOIT THIS MATERIAL EXCEPT SUBJECT TO THE TERMS OF SUCH AN AGREEMENT. * * $brcm_Workfile: $ * $brcm_Revision: $ * $brcm_Date: $ * * Module Description: * * Revision History: * * $brcm_Log: $ * ***************************************************************************/ #include "bchp_irq0.h" #include "bchp_int_id_irq0.h" #include "bint.h" #include "bchp_gio.h" #if (BCHP_CHIP==7552) #include "bchp_int_id_irq0_aon.h" #include "bchp_gio_aon.h" #endif #include "gist.h" #include "bsettop_gpio.h" BDBG_MODULE(bsettop_gpio); #define NUM_GPIO_PINS 105 #define NUM_SGPIO_PINS 6 #define NUM_AGPIO_PINS 21 #define NUM_ASGPIO_PINS 2 struct bgpio { uint32_t offset; uint32_t shift; bgpio_type type; int num; bgpio_interrupt_mode intMode; bsettop_callback user_callback; void *user_callback_context; }; struct bsettop_gpio { bool init; BINT_CallbackHandle hcallback; BINT_CallbackHandle haiocallback; bgpio_t gpios[NUM_GPIO_PINS]; bgpio_t sgpios[NUM_SGPIO_PINS]; bgpio_t agpios[NUM_AGPIO_PINS]; bgpio_t asgpios[NUM_ASGPIO_PINS]; }; static struct bsettop_gpio b_gpio; static void bgpio_p_get_offset_shift(bgpio_type type, int pin, uint32_t *offset, uint32_t *shift); bgpio_t bgpio_open(int gpio_num, const bgpio_settings *p_settings) { bgpio_t gpio = NULL; unsigned edge_conf = 0, edge_insensitive = 0, edge_level = 0, enabled = 1; uint32_t reg; #if (BCHP_CHIP==7552) int aio_pin = gpio_num; #endif if (b_gpio.init == false) { bgpio_init(); } if (!p_settings) { BDBG_ERR(("invalid setting parameter")); goto error; } #if (BCHP_CHIP==7552) if (p_settings->type == eGPIO_AStandard) aio_pin -= BGIO_PinId_eAgpio00; else if (p_settings->type == eGPIO_ASpecial) aio_pin -= BGIO_PinId_eAsgpio00; #endif if ((p_settings->type == eGPIO_Standard && gpio_num>=NUM_GPIO_PINS) || (p_settings->type == eGPIO_Special && gpio_num>=NUM_SGPIO_PINS) #if (BCHP_CHIP==7552) || (p_settings->type == eGPIO_AStandard && aio_pin >= NUM_AGPIO_PINS) || (p_settings->type == eGPIO_ASpecial && aio_pin >= NUM_ASGPIO_PINS) #endif ) { BDBG_ERR(("invalid gpio pin number")); goto error; } gpio = BKNI_Malloc(sizeof(*gpio)); if (!gpio) { BDBG_ERR(("fail to allocate gpio")); goto error; } gpio->type = p_settings->type; gpio->num = gpio_num; gpio->intMode = p_settings->intMode; gpio->user_callback = p_settings->user_callback; gpio->user_callback_context = p_settings->user_callback_context; bgpio_p_get_offset_shift(gpio->type, gpio->num, &gpio->offset, &gpio->shift); if (gpio->type == eGPIO_Standard) { b_gpio.gpios[gpio_num] = gpio; } #if (BCHP_CHIP==7552) else if (gpio->type == eGPIO_AStandard) { b_gpio.agpios[aio_pin] = gpio; } else if (gpio->type == eGPIO_ASpecial) { b_gpio.asgpios[aio_pin] = gpio; } #endif else { b_gpio.sgpios[gpio_num] = gpio; } reg = BREG_Read32(GetREG(), BCHP_GIO_IODIR_LO+gpio->offset); if (p_settings->mode == eGPIO_Input) reg |= (1<shift); else reg &= ~(1<shift); BREG_Write32(GetREG(), BCHP_GIO_IODIR_LO+gpio->offset,reg); reg = BREG_Read32(GetREG(), BCHP_GIO_ODEN_LO+gpio->offset); if (p_settings->mode == eGPIO_OutputOpenDrain) reg |= (1<shift); else reg &= ~(1<shift); BREG_Write32(GetREG(), BCHP_GIO_ODEN_LO+gpio->offset, reg); switch (p_settings->intMode) { case eGPIO_RisingEdge: edge_conf = 1; edge_insensitive = 0; edge_level = 0; break; case eGPIO_FallingEdge: edge_conf = 0; edge_insensitive = 0; edge_level = 0; break; case eGPIO_Edge: edge_conf = 0; edge_insensitive = 1; edge_level = 0; break; case eGPIO_High: edge_conf = 1; edge_insensitive = 0; edge_level = 1; break; case eGPIO_Low: edge_conf = 0; edge_insensitive = 0; edge_level = 1; break; default: enabled = 0; } if (!enabled) { reg = BREG_Read32(GetREG(), BCHP_GIO_MASK_LO+gpio->offset); reg &= ~(1<shift); BREG_Write32(GetREG(), BCHP_GIO_MASK_LO+gpio->offset, reg); } /* set edge config */ reg = BREG_Read32(GetREG(), BCHP_GIO_EC_LO+gpio->offset); if (edge_conf) reg |= (1<shift); else reg &= ~(1<shift); BREG_Write32(GetREG(), BCHP_GIO_EC_LO+gpio->offset, reg); /* set edge insensitive */ reg = BREG_Read32(GetREG(), BCHP_GIO_EI_LO+gpio->offset); if (edge_insensitive) reg |= (1<shift); else reg &= ~(1<shift); BREG_Write32(GetREG(), BCHP_GIO_EI_LO+gpio->offset, reg); /* set level */ reg = BREG_Read32(GetREG(), BCHP_GIO_LEVEL_LO+gpio->offset); if (edge_level) reg |= (1<shift); else reg &= ~(1<shift); BREG_Write32(GetREG(), BCHP_GIO_LEVEL_LO+gpio->offset, reg); /* set interrupt mask */ reg = BREG_Read32(GetREG(), BCHP_GIO_MASK_LO+gpio->offset); if (enabled) reg |= (1<shift); else reg &= ~(1<shift); BREG_Write32(GetREG(), BCHP_GIO_MASK_LO+gpio->offset, reg); error: return gpio; } void bgpio_close(bgpio_t gpio) { BDBG_ASSERT(gpio); if (gpio->type == eGPIO_Special) b_gpio.sgpios[gpio->num] = NULL; else b_gpio.gpios[gpio->num] = NULL; BKNI_Free(gpio); } /* * For level trigger interrupt, application should call this function to get additional level triggered interrupt */ void bgpio_enable_int(bgpio_t gpio) { uint32_t reg; BDBG_ASSERT(gpio); reg = BREG_Read32(GetREG(), BCHP_GIO_MASK_LO+gpio->offset); reg |= (1<shift); BREG_Write32(GetREG(), BCHP_GIO_MASK_LO+gpio->offset, reg); } static void bgpio_p_get_offset_shift(bgpio_type type, int pin, uint32_t *offset, uint32_t *shift) { if (type == eGPIO_Standard) { if (pin<32) { *offset = BCHP_GIO_ODEN_LO; *shift = pin; } else if (pin<64) { *offset = BCHP_GIO_ODEN_HI; *shift = pin-32; } else if (pin<90) { *offset = BCHP_GIO_ODEN_EXT; *shift = (pin-64) + 6; /*spio*/ } else if (pin<105) { *offset = BCHP_GIO_ODEN_EXT_HI; *shift = pin-90; } *offset = *offset - BCHP_GIO_ODEN_LO; } #if (BCHP_CHIP==7552) else if (type == eGPIO_AStandard) { *offset = BCHP_GIO_AON_ODEN_LO-BCHP_GIO_ODEN_LO; *shift = pin-BGIO_PinId_eAgpio00; } else if (type == eGPIO_ASpecial) { *offset = BCHP_GIO_AON_ODEN_EXT-BCHP_GIO_ODEN_LO; *shift = pin-BGIO_PinId_eAsgpio00; } #endif else if (type == eGPIO_Special) { *offset = BCHP_GIO_ODEN_EXT-BCHP_GIO_ODEN_LO; *shift = pin; } } static void bgpio_p_int_callback(void *pParam1, int param2) { uint32_t mask, stat; bgpio_t gpio; int i; for (i=0; ioffset); mask = BREG_Read32(GetREG(), BCHP_GIO_MASK_LO+gpio->offset); if (((stat>>gpio->shift)&1) && ((mask>>gpio->shift)&1)) { /* clear status immediately */ BREG_Write32(GetREG(), BCHP_GIO_STAT_LO+gpio->offset, 1<shift); if ((gpio->intMode == eGPIO_Low) || (gpio->intMode == eGPIO_High)) { /* mask a level interrupt to prevent continous interrupt. application should reenable it */ mask &= ~(1<shift); BREG_Write32(GetREG(), BCHP_GIO_MASK_LO+gpio->offset, mask); } if (gpio->user_callback) { (gpio->user_callback)(gpio->user_callback_context); } } } } } #ifndef BCHP_INT_ID_IRQ0_gio_irqen #define BCHP_INT_ID_IRQ0_gio_irqen BCHP_INT_ID_gio #endif void bgpio_init(void) { BKNI_Memset(&b_gpio, 0, sizeof(b_gpio)); /* disable all gpio interrupt */ BREG_Write32(GetREG(), BCHP_GIO_MASK_LO, 0); BREG_Write32(GetREG(), BCHP_GIO_STAT_LO, 0xffffffff); BREG_Write32(GetREG(), BCHP_GIO_MASK_HI, 0); BREG_Write32(GetREG(), BCHP_GIO_STAT_HI, 0xffffffff); BREG_Write32(GetREG(), BCHP_GIO_MASK_EXT, 0); BREG_Write32(GetREG(), BCHP_GIO_STAT_EXT, 0xffffffff); BREG_Write32(GetREG(), BCHP_GIO_MASK_EXT_HI, 0); BREG_Write32(GetREG(), BCHP_GIO_STAT_EXT_HI, 0xffffffff); #if (BCHP_CHIP==7552) BREG_Write32(GetREG(), BCHP_GIO_AON_MASK_LO, 0); BREG_Write32(GetREG(), BCHP_GIO_AON_STAT_LO, 0xFFFFFFFF); BREG_Write32(GetREG(), BCHP_GIO_AON_MASK_EXT,0); BREG_Write32(GetREG(), BCHP_GIO_AON_STAT_EXT, 0xFFFFFFF); BINT_CreateCallback(&b_gpio.haiocallback,GetINT(), BCHP_INT_ID_IRQ0_AON_gio_irqen, bgpio_p_int_callback, NULL, 0); BINT_EnableCallback(b_gpio.haiocallback); #endif /* attach callback */ BINT_CreateCallback(&b_gpio.hcallback,GetINT(),BCHP_INT_ID_IRQ0_gio_irqen, bgpio_p_int_callback, NULL, 0); BINT_EnableCallback(b_gpio.hcallback); b_gpio.init = true; }