source: svn/newcon3bcm2_21bu/magnum/basemodules/chp/7552/bchp_pwr_resources_7552.txt

#
# 7552 power resources
#

# AVD
AVD -> AVD0
AVD0 -> {AVD0_CLK, AVD0_PWR} 
AVD0_CLK -> HW_AVD0_CLK          
AVD0_PWR -> HW_AVD0_PWR     # AVD0 SRAM

# Audio
AUD_AIO -> {HW_VEC_AIO, HW_RAAGA}                 # VEC_AIO and RAAGA is required for register access. 
AUD_PLL0 -> {AUD_AIO, HW_AUD_PLL0, HW_RAAGA}
AUD_PLL1 -> {AUD_AIO, HW_AUD_PLL1, HW_RAAGA}

RAAGA -> {HW_RAAGA, HW_RAAGA_SRAM}
RAAGA_SRAM -> HW_RAAGA_SRAM

# Display
VDC -> {BVN, VDC_DAC, VDC_VEC, HW_HDMI_TX_CLK} # entire BVN and VEC blocks
BVN -> {HW_BVN, HW_BVN_108M, HW_BVN_SRAM}       # entire BVN block
VDC_DAC -> HW_VDC_DAC                           # DAC clocks
VDC_VEC -> {HW_VEC_AIO, HW_VEC_SRAM}            # VEC_AIO 108M, 216M and SCB clocks

#
# Transport
#
XPT -> {HW_XPT_108M, HW_XPT_XMEMIF, HW_XPT_RMX} # entire XPT block

XPT_PARSER    -> {HW_XPT_108M, HW_XPT_XMEMIF}  # input parsers
XPT_PLAYBACK  -> {HW_XPT_108M, HW_XPT_XMEMIF}  # playback channels
XPT_RAVE      -> {HW_XPT_108M, HW_XPT_XMEMIF}  # RAVE contexts
XPT_PACKETSUB -> {HW_XPT_108M, HW_XPT_XMEMIF}  # packet substitution channels
XPT_REMUX     -> {HW_XPT_108M, HW_XPT_XMEMIF, HW_XPT_RMX}     # remux

XPT_108M   -> {HW_XPT_108M, HW_XPT_SRAM}
XPT_XMEMIF -> HW_XPT_XMEMIF
XPT_SRAM -> HW_XPT_SRAM


# HDMI TX
HDMI_TX          -> {HDMI_TX_CLK, HDMI_TX_CEC}           # entire HDMI block
HDMI_TX_CLK      -> {HW_HDMI_TX_CLK, HW_HDMI_TX_SRAM}    # HDMI Clocks
HW_HDMI_TX_CLK   -> {HW_HDMI_TX_108M, HW_BVN_108M}       # 108M clock for register R/W

#HDMI_TX_TMDS     ->  HW_HDMI_TX_TMDS
HDMI_TX_CEC      -> {HW_HDMI_TX_CEC}                     # CEC and hotplug interrupts

# Others
M2MC -> HW_M2MC                              # Graphics2D
M2MC_SRAM -> HW_GFX_SRAM  # Graphics SRAM
HW_M2MC -> HW_GFX_108M             # Graphics 2D depend on 108M and SCB clock 
HSM -> DMA                                   # HSM depends on DMA and XPT
DMA -> {HW_DMA, HW_XPT_108M, HW_XPT_XMEMIF}
SMARTCARD -> {SMARTCARD0, SMARTCARD1}        # Smartcard
SMARTCARD0 -> {HW_SCD0, HW_PLL_SCD_CH0}      # Smartcard 0 depends on SCD PLL
SMARTCARD1 -> {HW_SCD1, HW_PLL_SCD_CH1}      # Smartcard 1 depends on SCD PLL
SOFTMODEM -> HW_MDM                          # disabled for now 

RFM -> {HW_RFM, HW_RFM_SRAM}            #RFM

#
# PLLs and VCXOs
#
HW_AVD0_CLK -> {HW_PLL_AVD_CH1, HW_PLL_AVD_CH2}
HW_RAAGA -> HW_PLL_AVD_CH3
#HW_M2MC -> HW_PLL_AVD_CH2
#{HW_PLL_AVD_CH0, HW_PLL_AVD_CH1, HW_PLL_AVD_CH2, HW_PLL_AVD_CH3} -> HW_PLL_AVD
{HW_PLL_AVD_CH1, HW_PLL_AVD_CH2, HW_PLL_AVD_CH3} -> HW_PLL_AVD

#{HW_VEC_AIO, HW_VDC_656_OUT} -> HW_PLL_VCXO_CH0
HW_VEC_AIO -> HW_PLL_VCXO_CH0
{HW_AUD_PLL0, HW_AUD_PLL1, HW_PLL_SCD} -> HW_PLL_VCXO_CH2
{HW_PLL_VCXO_CH0, HW_PLL_VCXO_CH2} -> HW_PLL_VCXO

{HW_PLL_SCD_CH0, HW_PLL_SCD_CH1} -> HW_PLL_SCD


# BINT_Open requires access to L2 interrupt registers after BCHP_PWR_Open turns off the CLOCK_GEN clocks.
# BPWR_Open used to guarantee this initial power requirement, but BPWR is being phased-out. 
# The BINT_OPEN node will handle this instead, by being acquired and released around the BINT_Open call.

BINT_OPEN -> {AVD, AUD_AIO, VDC, XPT, HDMI_TX, M2MC, RFM}


# MAGNUM_CONTROLLED is a special node that keeps track of resources whose power management is done in Magnum (as opposed to upper-level SW, e.g. Nexus)
# During BCHP_PWR_Open, all HW resources that are dependants of MAGNUM_CONTROLLED will be initialized (i.e. powered down)
# Upper-level SW is responsible for initializing all other HW resources

MAGNUM_CONTROLLED -> {AVD, AUD_AIO, RAAGA, VDC, XPT, HDMI_TX, SMARTCARD, RFM}