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bchp_m2mc.h

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1	/***************************************************************************
2	* Copyright (c) 1999-2012, Broadcom Corporation
3	* All Rights Reserved
4	* Confidential Property of Broadcom Corporation
5	*
6	*
7	* THIS SOFTWARE MAY ONLY BE USED SUBJECT TO AN EXECUTED SOFTWARE LICENSE
8	* AGREEMENT BETWEEN THE USER AND BROADCOM. YOU HAVE NO RIGHT TO USE OR
9	* EXPLOIT THIS MATERIAL EXCEPT SUBJECT TO THE TERMS OF SUCH AN AGREEMENT.
10	*
11	* $brcm_Workfile: bchp_m2mc.h $
12	* $brcm_Revision: Hydra_Software_Devel/2 $
13	* $brcm_Date: 2/7/12 1:32p $
14	*
15	* Module Description:
16	* DO NOT EDIT THIS FILE DIRECTLY
17	*
18	* This module was generated magically with RDB from a source description
19	* file. You must edit the source file for changes to be made to this file.
20	*
21	*
22	* Date: Generated on Tue Feb 7 10:59:54 2012
23	* MD5 Checksum d41d8cd98f00b204e9800998ecf8427e
24	*
25	* Compiled with: RDB Utility combo_header.pl
26	* RDB Parser 3.0
27	* unknown unknown
28	* Perl Interpreter 5.008008
29	* Operating System linux
30	*
31	* Revision History:
32	*
33	* $brcm_Log: /magnum/basemodules/chp/7552/rdb/b0/bchp_m2mc.h $
34	*
35	* Hydra_Software_Devel/2 2/7/12 1:32p pntruong
36	* SW7552-89: Synced up with central rdb.
37	*
38	***************************************************************************/
39
40	#ifndef BCHP_M2MC_H__
41	#define BCHP_M2MC_H__
42
43	/***************************************************************************
44	*M2MC - Memory-to-Memory Compositor_0 Registers
45	***************************************************************************/
46	#define BCHP_M2MC_REVISION 0x00450000 /* M2MC Revision register */
47	#define BCHP_M2MC_BLIT_GO 0x00450004 /* Blit GO bit */
48	#define BCHP_M2MC_SCRATCH_NOT_LIST 0x00450008 /* M2MC Scratch register (not included in DMA list structure) */
49	#define BCHP_M2MC_LIST_CTRL 0x0045000c /* RDMA Linked List Control Register */
50	#define BCHP_M2MC_LIST_STATUS 0x00450010 /* RDMA Linked List Status Register */
51	#define BCHP_M2MC_LIST_FIRST_PKT_ADDR 0x00450014 /* RDMA Linked List First Packet Address Register */
52	#define BCHP_M2MC_LIST_CURR_PKT_ADDR 0x00450018 /* RDMA Linked List Current Packet Address Register */
53	#define BCHP_M2MC_BLIT_STATUS 0x0045001c /* Blit status */
54	#define BCHP_M2MC_BLIT_SRC_ADDRESS 0x00450020 /* Blit status source feeder current address */
55	#define BCHP_M2MC_BLIT_DEST_ADDRESS 0x00450024 /* Blit status destination feeder current address */
56	#define BCHP_M2MC_BLIT_OUTPUT_ADDRESS 0x00450028 /* Blit status output feeder current address */
57	#define BCHP_M2MC_BLIT_MEM_HI 0x0045002c /* Blit memory protection address high */
58	#define BCHP_M2MC_BLIT_MEM_LO 0x00450030 /* Blit memory protection address low */
59	#define BCHP_M2MC_SCBADDRSEL 0x00450040 /* scb address map select register */
60	#define BCHP_M2MC_SCRATCH_LIST 0x00450100 /* M2MC Scratch register (Included in DMA list structure) */
61	#define BCHP_M2MC_SRC_FEEDER_ENABLE 0x00450104 /* Source plane enable */
62	#define BCHP_M2MC_SRC_SURFACE_ADDR_0 0x00450108 /* Source surface 0 address */
63	#define BCHP_M2MC_SRC_SURFACE_STRIDE_0 0x0045010c /* Source surface 0 STRIDE */
64	#define BCHP_M2MC_SRC_SURFACE_ADDR_1 0x00450110 /* Source surface 1 address */
65	#define BCHP_M2MC_SRC_SURFACE_STRIDE_1 0x00450114 /* Source surface 1 STRIDE */
66	#define BCHP_M2MC_SRC_SURFACE_0_FORMAT_DEF_1 0x00450118 /* Source pixel format 1 for surface 0 */
67	#define BCHP_M2MC_SRC_SURFACE_0_FORMAT_DEF_2 0x0045011c /* Source pixel format 2 for surface 0 */
68	#define BCHP_M2MC_SRC_SURFACE_0_FORMAT_DEF_3 0x00450120 /* Source pixel format 3 for surface 0 */
69	#define BCHP_M2MC_SRC_SURFACE_1_FORMAT_DEF_1 0x00450124 /* Source pixel format 1 for surface 1 */
70	#define BCHP_M2MC_SRC_SURFACE_1_FORMAT_DEF_2 0x00450128 /* Source pixel format 2 for surface 1 */
71	#define BCHP_M2MC_SRC_SURFACE_1_FORMAT_DEF_3 0x0045012c /* Source pixel format 3 for surface 1 */
72	#define BCHP_M2MC_SRC_W_ALPHA 0x00450130 /* Source Alpha W format */
73	#define BCHP_M2MC_SRC_CONSTANT_COLOR 0x00450134 /* Source constant color */
74	#define BCHP_M2MC_DEST_FEEDER_ENABLE 0x00450138 /* Destination plane enable */
75	#define BCHP_M2MC_DEST_SURFACE_ADDR_0 0x0045013c /* Destination surface 0 address */
76	#define BCHP_M2MC_DEST_SURFACE_STRIDE_0 0x00450140 /* Destination surface 0 STRIDE */
77	#define BCHP_M2MC_DEST_SURFACE_ADDR_1 0x00450144 /* Destination surface 1 address */
78	#define BCHP_M2MC_DEST_SURFACE_STRIDE_1 0x00450148 /* Destination surface 1 STRIDE */
79	#define BCHP_M2MC_DEST_SURFACE_FORMAT_DEF_1 0x0045014c /* Destination pixel format 1 */
80	#define BCHP_M2MC_DEST_SURFACE_FORMAT_DEF_2 0x00450150 /* Destination pixel format 2 */
81	#define BCHP_M2MC_DEST_SURFACE_FORMAT_DEF_3 0x00450154 /* Destination pixel format 3 */
82	#define BCHP_M2MC_DEST_W_ALPHA 0x00450158 /* Destination Alpha W format */
83	#define BCHP_M2MC_DEST_CONSTANT_COLOR 0x0045015c /* Destination constant color */
84	#define BCHP_M2MC_OUTPUT_FEEDER_ENABLE 0x00450160 /* Output plane enable */
85	#define BCHP_M2MC_OUTPUT_SURFACE_ADDR_0 0x00450164 /* Output surface 0 address */
86	#define BCHP_M2MC_OUTPUT_SURFACE_STRIDE_0 0x00450168 /* Output surface 0 STRIDE */
87	#define BCHP_M2MC_OUTPUT_SURFACE_ADDR_1 0x0045016c /* Output surface 1 address */
88	#define BCHP_M2MC_OUTPUT_SURFACE_STRIDE_1 0x00450170 /* Output surface 1 STRIDE */
89	#define BCHP_M2MC_OUTPUT_SURFACE_FORMAT_DEF_1 0x00450174 /* Output pixel format 1 */
90	#define BCHP_M2MC_OUTPUT_SURFACE_FORMAT_DEF_2 0x00450178 /* Output pixel format 2 */
91	#define BCHP_M2MC_OUTPUT_SURFACE_FORMAT_DEF_3 0x0045017c /* Output pixel format 3 */
92	#define BCHP_M2MC_BLIT_HEADER 0x00450180 /* Blit header and control */
93	#define BCHP_M2MC_BLIT_SRC_TOP_LEFT_0 0x00450184 /* Top left pixel coordinate in the Source surface 0. */
94	#define BCHP_M2MC_BLIT_SRC_SIZE_0 0x00450188 /* Pixel width and height of operation in Source surface 0. */
95	#define BCHP_M2MC_BLIT_SRC_TOP_LEFT_1 0x0045018c /* Top left pixel coordinate in the Source surface 1. */
96	#define BCHP_M2MC_BLIT_SRC_SIZE_1 0x00450190 /* Pixel width and height of operation in Source surface 1. */
97	#define BCHP_M2MC_BLIT_SRC_STRIPE_HEIGHT_WIDTH_0 0x00450194 /* width and height of stripe for surface 0 for the decoded frame image format. */
98	#define BCHP_M2MC_BLIT_SRC_STRIPE_HEIGHT_WIDTH_1 0x00450198 /* width and height of stripe for surface 1 for the decoded frame image format. */
99	#define BCHP_M2MC_BLIT_DEST_TOP_LEFT 0x0045019c /* Top left pixel coordinate in the Destination */
100	#define BCHP_M2MC_BLIT_DEST_SIZE 0x004501a0 /* Pixel width and height of operation in destination */
101	#define BCHP_M2MC_BLIT_OUTPUT_TOP_LEFT 0x004501a4 /* Top left pixel coordinate in the Output */
102	#define BCHP_M2MC_BLIT_OUTPUT_SIZE 0x004501a8 /* Pixel width and height of operation in the Output */
103	#define BCHP_M2MC_BLIT_INPUT_STRIPE_WIDTH_0 0x004501ac /* Pixel width of input stripe when striping for surface 0 */
104	#define BCHP_M2MC_BLIT_INPUT_STRIPE_WIDTH_1 0x004501b0 /* Pixel width of input stripe when striping for surface 1 */
105	#define BCHP_M2MC_BLIT_OUTPUT_STRIPE_WIDTH 0x004501b4 /* Pixel width of output stripe when striping */
106	#define BCHP_M2MC_BLIT_STRIPE_OVERLAP_0 0x004501b8 /* Pixel width of stripe overlap when striping for surface 0. */
107	#define BCHP_M2MC_BLIT_STRIPE_OVERLAP_1 0x004501bc /* Pixel width of stripe overlap when striping for surface 1. */
108	#define BCHP_M2MC_BLIT_CTRL 0x004501c0 /* Blit control */
109	#define BCHP_M2MC_SCALER_CTRL 0x004501c4 /* Scaler control */
110	#define BCHP_M2MC_HORIZ_AVERAGER_COUNT 0x004501c8 /* Horizontal averager control count */
111	#define BCHP_M2MC_HORIZ_AVERAGER_COEFF 0x004501cc /* Horizontal averager control coefficient */
112	#define BCHP_M2MC_VERT_AVERAGER_COUNT 0x004501d0 /* Vertical averager control count */
113	#define BCHP_M2MC_VERT_AVERAGER_COEFF 0x004501d4 /* Vertical averager control coefficient */
114	#define BCHP_M2MC_HORIZ_SCALER_0_INITIAL_PHASE 0x004501d8 /* Horizontal scaler 0 initial phase */
115	#define BCHP_M2MC_HORIZ_SCALER_0_STEP 0x004501dc /* Horizontal scaler 0 step */
116	#define BCHP_M2MC_HORIZ_SCALER_1_INITIAL_PHASE 0x004501e0 /* Horizontal scaler 1 initial phase */
117	#define BCHP_M2MC_HORIZ_SCALER_1_STEP 0x004501e4 /* Horizontal scaler 1 step */
118	#define BCHP_M2MC_VERT_SCALER_0_INITIAL_PHASE 0x004501e8 /* Vertical scaler 0 initial phase */
119	#define BCHP_M2MC_VERT_SCALER_0_STEP 0x004501ec /* Vertical scaler 0 step */
120	#define BCHP_M2MC_VERT_SCALER_1_INITIAL_PHASE 0x004501f0 /* Vertical scaler 1 initial phase */
121	#define BCHP_M2MC_VERT_SCALER_1_STEP 0x004501f4 /* Vertical scaler 1 step */
122	#define BCHP_M2MC_BLEND_COLOR_OP 0x004501f8 /* Color blend operation descriptor */
123	#define BCHP_M2MC_BLEND_ALPHA_OP 0x004501fc /* Alpha blend operation descriptor */
124	#define BCHP_M2MC_BLEND_CONSTANT_COLOR 0x00450200 /* Blend constant color */
125	#define BCHP_M2MC_BLEND_COLOR_KEY_ACTION 0x00450204 /* Action color keyed samples take in blender */
126	#define BCHP_M2MC_ROP_OPERATION 0x00450208 /* Raster operation vector */
127	#define BCHP_M2MC_ROP_PATTERN_TOP 0x0045020c /* Top half of ROP pattern */
128	#define BCHP_M2MC_ROP_PATTERN_BOTTOM 0x00450210 /* Bottom half of ROP pattern */
129	#define BCHP_M2MC_ROP_PATTERN_COLOR_0 0x00450214 /* ROP Color for 0 */
130	#define BCHP_M2MC_ROP_PATTERN_COLOR_1 0x00450218 /* ROP Color for 1 */
131	#define BCHP_M2MC_SRC_COLOR_KEY_HIGH 0x0045021c /* Source color key high */
132	#define BCHP_M2MC_SRC_COLOR_KEY_LOW 0x00450220 /* Source color key low */
133	#define BCHP_M2MC_SRC_COLOR_KEY_MASK 0x00450224 /* Source color key mask */
134	#define BCHP_M2MC_SRC_COLOR_KEY_REPLACEMENT 0x00450228 /* Source color key replacement */
135	#define BCHP_M2MC_SRC_COLOR_KEY_REPLACEMENT_MASK 0x0045022c /* Source color key replacement mask */
136	#define BCHP_M2MC_DEST_COLOR_KEY_HIGH 0x00450230 /* Destination color key high */
137	#define BCHP_M2MC_DEST_COLOR_KEY_LOW 0x00450234 /* Destination color key low */
138	#define BCHP_M2MC_DEST_COLOR_KEY_MASK 0x00450238 /* Destination color key mask */
139	#define BCHP_M2MC_DEST_COLOR_KEY_REPLACEMENT 0x0045023c /* Destination color key replacement */
140	#define BCHP_M2MC_DEST_COLOR_KEY_REPLACEMENT_MASK 0x00450240 /* Destination color key replacement mask */
141	#define BCHP_M2MC_HORIZ_FIR_0_COEFF_PHASE0_01 0x00450244 /* Horizontal Scaler 0 Poly-Phase Filter Phase 0 Coefficients */
142	#define BCHP_M2MC_HORIZ_FIR_0_COEFF_PHASE0_2 0x00450248 /* Horizontal Scaler 0 Poly-Phase Filter Phase 0 Coefficients */
143	#define BCHP_M2MC_HORIZ_FIR_0_COEFF_PHASE1_01 0x0045024c /* Horizontal Scaler 0 Poly-Phase Filter Phase 1 Coefficients */
144	#define BCHP_M2MC_HORIZ_FIR_0_COEFF_PHASE1_2 0x00450250 /* Horizontal Scaler 0 Poly-Phase Filter Phase 1 Coefficients */
145	#define BCHP_M2MC_HORIZ_FIR_1_COEFF_PHASE0_01 0x00450254 /* Horizontal Scaler 1 Poly-Phase Filter Phase 0 Coefficients */
146	#define BCHP_M2MC_HORIZ_FIR_1_COEFF_PHASE0_2 0x00450258 /* Horizontal Scaler 1 Poly-Phase Filter Phase 0 Coefficients */
147	#define BCHP_M2MC_HORIZ_FIR_1_COEFF_PHASE1_01 0x0045025c /* Horizontal Scaler 1 Poly-Phase Filter Phase 1 Coefficients */
148	#define BCHP_M2MC_HORIZ_FIR_1_COEFF_PHASE1_2 0x00450260 /* Horizontal Scaler 1 Poly-Phase Filter Phase 1 Coefficients */
149	#define BCHP_M2MC_VERT_FIR_0_COEFF_PHASE0_01 0x00450264 /* Vertical Scaler 0 Poly-Phase Filter Phase 0 Coefficients */
150	#define BCHP_M2MC_VERT_FIR_0_COEFF_PHASE0_2 0x00450268 /* Vertical Scaler 0 Poly-Phase Filter Phase 0 Coefficients */
151	#define BCHP_M2MC_VERT_FIR_0_COEFF_PHASE1_01 0x0045026c /* Vertical Scaler 0 Poly-Phase Filter Phase 1 Coefficients */
152	#define BCHP_M2MC_VERT_FIR_0_COEFF_PHASE1_2 0x00450270 /* Vertical Scaler 0 Poly-Phase Filter Phase 1 Coefficients */
153	#define BCHP_M2MC_VERT_FIR_1_COEFF_PHASE0_01 0x00450274 /* Vertical Scaler 1 Poly-Phase Filter Phase 0 Coefficients */
154	#define BCHP_M2MC_VERT_FIR_1_COEFF_PHASE0_2 0x00450278 /* Vertical Scaler 1 Poly-Phase Filter Phase 0 Coefficients */
155	#define BCHP_M2MC_VERT_FIR_1_COEFF_PHASE1_01 0x0045027c /* Vertical Scaler 1 Poly-Phase Filter Phase 1 Coefficients */
156	#define BCHP_M2MC_VERT_FIR_1_COEFF_PHASE1_2 0x00450280 /* Vertical Scaler 1 Poly-Phase Filter Phase 1 Coefficients */
157	#define BCHP_M2MC_SRC_CM_C00_C01 0x00450284 /* Color Conversion Matrix Coefficients C00 and C01 */
158	#define BCHP_M2MC_SRC_CM_C02_C03 0x00450288 /* Color Conversion Matrix Coefficients C02 and C03 */
159	#define BCHP_M2MC_SRC_CM_C04 0x0045028c /* Color Conversion Matrix Coefficients C04 */
160	#define BCHP_M2MC_SRC_CM_C10_C11 0x00450290 /* Color Conversion Matrix Coefficients C10 and C11 */
161	#define BCHP_M2MC_SRC_CM_C12_C13 0x00450294 /* Color Conversion Matrix Coefficients C12 and C13 */
162	#define BCHP_M2MC_SRC_CM_C14 0x00450298 /* Color Conversion Matrix Coefficients C14 */
163	#define BCHP_M2MC_SRC_CM_C20_C21 0x0045029c /* Color Conversion Matrix Coefficients C20 and C21 */
164	#define BCHP_M2MC_SRC_CM_C22_C23 0x004502a0 /* Color Conversion Matrix Coefficients C22 and C23 */
165	#define BCHP_M2MC_SRC_CM_C24 0x004502a4 /* Color Conversion Matrix Coefficients C24 */
166	#define BCHP_M2MC_SRC_CM_C30_C31 0x004502a8 /* Color Conversion Matrix Coefficients C30 and C31 */
167	#define BCHP_M2MC_SRC_CM_C32_C33 0x004502ac /* Color Conversion Matrix Coefficients C32 and C33 */
168	#define BCHP_M2MC_SRC_CM_C34 0x004502b0 /* Color Conversion Matrix Coefficients C34 */
169	#define BCHP_M2MC_TIMEOUT_COUNTER_CONTROL 0x004502b4 /* M2MC timeout counter control register */
170	#define BCHP_M2MC_CLK_GATE_AND_SW_INIT_CONTROL 0x004502b8 /* M2MC clock gating and software init control register */
171
172	/***************************************************************************
173	*REVISION - M2MC Revision register
174	***************************************************************************/
175	/* M2MC :: REVISION :: reserved0 [31:16] */
176	#define BCHP_M2MC_REVISION_reserved0_MASK 0xffff0000
177	#define BCHP_M2MC_REVISION_reserved0_SHIFT 16
178
179	/* M2MC :: REVISION :: MAJOR [15:08] */
180	#define BCHP_M2MC_REVISION_MAJOR_MASK 0x0000ff00
181	#define BCHP_M2MC_REVISION_MAJOR_SHIFT 8
182	#define BCHP_M2MC_REVISION_MAJOR_DEFAULT 0x00000000
183
184	/* M2MC :: REVISION :: MINOR [07:00] */
185	#define BCHP_M2MC_REVISION_MINOR_MASK 0x000000ff
186	#define BCHP_M2MC_REVISION_MINOR_SHIFT 0
187	#define BCHP_M2MC_REVISION_MINOR_DEFAULT 0x0000000b
188
189	/***************************************************************************
190	*BLIT_GO - Blit GO bit
191	***************************************************************************/
192	/* M2MC :: BLIT_GO :: reserved0 [31:01] */
193	#define BCHP_M2MC_BLIT_GO_reserved0_MASK 0xfffffffe
194	#define BCHP_M2MC_BLIT_GO_reserved0_SHIFT 1
195
196	/* M2MC :: BLIT_GO :: GO [00:00] */
197	#define BCHP_M2MC_BLIT_GO_GO_MASK 0x00000001
198	#define BCHP_M2MC_BLIT_GO_GO_SHIFT 0
199	#define BCHP_M2MC_BLIT_GO_GO_DEFAULT 0x00000000
200
201	/***************************************************************************
202	*SCRATCH_NOT_LIST - M2MC Scratch register (not included in DMA list structure)
203	***************************************************************************/
204	/* M2MC :: SCRATCH_NOT_LIST :: VALUE [31:00] */
205	#define BCHP_M2MC_SCRATCH_NOT_LIST_VALUE_MASK 0xffffffff
206	#define BCHP_M2MC_SCRATCH_NOT_LIST_VALUE_SHIFT 0
207	#define BCHP_M2MC_SCRATCH_NOT_LIST_VALUE_DEFAULT 0x00000000
208
209	/***************************************************************************
210	*LIST_CTRL - RDMA Linked List Control Register
211	***************************************************************************/
212	/* M2MC :: LIST_CTRL :: reserved0 [31:03] */
213	#define BCHP_M2MC_LIST_CTRL_reserved0_MASK 0xfffffff8
214	#define BCHP_M2MC_LIST_CTRL_reserved0_SHIFT 3
215
216	/* M2MC :: LIST_CTRL :: WAKE_MODE [02:02] */
217	#define BCHP_M2MC_LIST_CTRL_WAKE_MODE_MASK 0x00000004
218	#define BCHP_M2MC_LIST_CTRL_WAKE_MODE_SHIFT 2
219	#define BCHP_M2MC_LIST_CTRL_WAKE_MODE_DEFAULT 0x00000000
220	#define BCHP_M2MC_LIST_CTRL_WAKE_MODE_ResumeFromLast 0
221	#define BCHP_M2MC_LIST_CTRL_WAKE_MODE_ResumeFromFirst 1
222
223	/* M2MC :: LIST_CTRL :: RUN [01:01] */
224	#define BCHP_M2MC_LIST_CTRL_RUN_MASK 0x00000002
225	#define BCHP_M2MC_LIST_CTRL_RUN_SHIFT 1
226	#define BCHP_M2MC_LIST_CTRL_RUN_DEFAULT 0x00000000
227	#define BCHP_M2MC_LIST_CTRL_RUN_Stop 0
228	#define BCHP_M2MC_LIST_CTRL_RUN_Run 1
229
230	/* M2MC :: LIST_CTRL :: WAKE [00:00] */
231	#define BCHP_M2MC_LIST_CTRL_WAKE_MASK 0x00000001
232	#define BCHP_M2MC_LIST_CTRL_WAKE_SHIFT 0
233	#define BCHP_M2MC_LIST_CTRL_WAKE_DEFAULT 0x00000000
234	#define BCHP_M2MC_LIST_CTRL_WAKE_Ack 0
235	#define BCHP_M2MC_LIST_CTRL_WAKE_WakeUp 1
236
237	/***************************************************************************
238	*LIST_STATUS - RDMA Linked List Status Register
239	***************************************************************************/
240	/* M2MC :: LIST_STATUS :: reserved0 [31:02] */
241	#define BCHP_M2MC_LIST_STATUS_reserved0_MASK 0xfffffffc
242	#define BCHP_M2MC_LIST_STATUS_reserved0_SHIFT 2
243
244	/* M2MC :: LIST_STATUS :: FINISHED [01:01] */
245	#define BCHP_M2MC_LIST_STATUS_FINISHED_MASK 0x00000002
246	#define BCHP_M2MC_LIST_STATUS_FINISHED_SHIFT 1
247	#define BCHP_M2MC_LIST_STATUS_FINISHED_DEFAULT 0x00000000
248	#define BCHP_M2MC_LIST_STATUS_FINISHED_NotFinished 0
249	#define BCHP_M2MC_LIST_STATUS_FINISHED_Finished 1
250
251	/* M2MC :: LIST_STATUS :: BUSY [00:00] */
252	#define BCHP_M2MC_LIST_STATUS_BUSY_MASK 0x00000001
253	#define BCHP_M2MC_LIST_STATUS_BUSY_SHIFT 0
254	#define BCHP_M2MC_LIST_STATUS_BUSY_DEFAULT 0x00000000
255	#define BCHP_M2MC_LIST_STATUS_BUSY_Idle 0
256	#define BCHP_M2MC_LIST_STATUS_BUSY_Busy 1
257
258	/***************************************************************************
259	*LIST_FIRST_PKT_ADDR - RDMA Linked List First Packet Address Register
260	***************************************************************************/
261	/* M2MC :: LIST_FIRST_PKT_ADDR :: FIRST_PKT_ADDR [31:05] */
262	#define BCHP_M2MC_LIST_FIRST_PKT_ADDR_FIRST_PKT_ADDR_MASK 0xffffffe0
263	#define BCHP_M2MC_LIST_FIRST_PKT_ADDR_FIRST_PKT_ADDR_SHIFT 5
264	#define BCHP_M2MC_LIST_FIRST_PKT_ADDR_FIRST_PKT_ADDR_DEFAULT 0x00000000
265
266	/* M2MC :: LIST_FIRST_PKT_ADDR :: reserved0 [04:00] */
267	#define BCHP_M2MC_LIST_FIRST_PKT_ADDR_reserved0_MASK 0x0000001f
268	#define BCHP_M2MC_LIST_FIRST_PKT_ADDR_reserved0_SHIFT 0
269
270	/***************************************************************************
271	*LIST_CURR_PKT_ADDR - RDMA Linked List Current Packet Address Register
272	***************************************************************************/
273	/* M2MC :: LIST_CURR_PKT_ADDR :: CURR_PKT_ADDR [31:05] */
274	#define BCHP_M2MC_LIST_CURR_PKT_ADDR_CURR_PKT_ADDR_MASK 0xffffffe0
275	#define BCHP_M2MC_LIST_CURR_PKT_ADDR_CURR_PKT_ADDR_SHIFT 5
276	#define BCHP_M2MC_LIST_CURR_PKT_ADDR_CURR_PKT_ADDR_DEFAULT 0x00000000
277
278	/* M2MC :: LIST_CURR_PKT_ADDR :: reserved0 [04:00] */
279	#define BCHP_M2MC_LIST_CURR_PKT_ADDR_reserved0_MASK 0x0000001f
280	#define BCHP_M2MC_LIST_CURR_PKT_ADDR_reserved0_SHIFT 0
281
282	/***************************************************************************
283	*BLIT_STATUS - Blit status
284	***************************************************************************/
285	/* M2MC :: BLIT_STATUS :: reserved0 [31:25] */
286	#define BCHP_M2MC_BLIT_STATUS_reserved0_MASK 0xfe000000
287	#define BCHP_M2MC_BLIT_STATUS_reserved0_SHIFT 25
288
289	/* M2MC :: BLIT_STATUS :: RDY_FOR_SW_INIT [24:24] */
290	#define BCHP_M2MC_BLIT_STATUS_RDY_FOR_SW_INIT_MASK 0x01000000
291	#define BCHP_M2MC_BLIT_STATUS_RDY_FOR_SW_INIT_SHIFT 24
292
293	/* M2MC :: BLIT_STATUS :: reserved1 [23:17] */
294	#define BCHP_M2MC_BLIT_STATUS_reserved1_MASK 0x00fe0000
295	#define BCHP_M2MC_BLIT_STATUS_reserved1_SHIFT 17
296
297	/* M2MC :: BLIT_STATUS :: MEMORY_PROTECTION [16:16] */
298	#define BCHP_M2MC_BLIT_STATUS_MEMORY_PROTECTION_MASK 0x00010000
299	#define BCHP_M2MC_BLIT_STATUS_MEMORY_PROTECTION_SHIFT 16
300	#define BCHP_M2MC_BLIT_STATUS_MEMORY_PROTECTION_NORMAL 0
301	#define BCHP_M2MC_BLIT_STATUS_MEMORY_PROTECTION_VIOLATION 1
302
303	/* M2MC :: BLIT_STATUS :: reserved2 [15:09] */
304	#define BCHP_M2MC_BLIT_STATUS_reserved2_MASK 0x0000fe00
305	#define BCHP_M2MC_BLIT_STATUS_reserved2_SHIFT 9
306
307	/* M2MC :: BLIT_STATUS :: TIME_OUT_ERROR [08:08] */
308	#define BCHP_M2MC_BLIT_STATUS_TIME_OUT_ERROR_MASK 0x00000100
309	#define BCHP_M2MC_BLIT_STATUS_TIME_OUT_ERROR_SHIFT 8
310
311	/* M2MC :: BLIT_STATUS :: reserved3 [07:01] */
312	#define BCHP_M2MC_BLIT_STATUS_reserved3_MASK 0x000000fe
313	#define BCHP_M2MC_BLIT_STATUS_reserved3_SHIFT 1
314
315	/* M2MC :: BLIT_STATUS :: STATUS [00:00] */
316	#define BCHP_M2MC_BLIT_STATUS_STATUS_MASK 0x00000001
317	#define BCHP_M2MC_BLIT_STATUS_STATUS_SHIFT 0
318	#define BCHP_M2MC_BLIT_STATUS_STATUS_IDLE 0
319	#define BCHP_M2MC_BLIT_STATUS_STATUS_RUNNING 1
320
321	/***************************************************************************
322	*BLIT_SRC_ADDRESS - Blit status source feeder current address
323	***************************************************************************/
324	/* M2MC :: BLIT_SRC_ADDRESS :: ADDR [31:00] */
325	#define BCHP_M2MC_BLIT_SRC_ADDRESS_ADDR_MASK 0xffffffff
326	#define BCHP_M2MC_BLIT_SRC_ADDRESS_ADDR_SHIFT 0
327	#define BCHP_M2MC_BLIT_SRC_ADDRESS_ADDR_DEFAULT 0x00000000
328
329	/***************************************************************************
330	*BLIT_DEST_ADDRESS - Blit status destination feeder current address
331	***************************************************************************/
332	/* M2MC :: BLIT_DEST_ADDRESS :: ADDR [31:00] */
333	#define BCHP_M2MC_BLIT_DEST_ADDRESS_ADDR_MASK 0xffffffff
334	#define BCHP_M2MC_BLIT_DEST_ADDRESS_ADDR_SHIFT 0
335	#define BCHP_M2MC_BLIT_DEST_ADDRESS_ADDR_DEFAULT 0x00000000
336
337	/***************************************************************************
338	*BLIT_OUTPUT_ADDRESS - Blit status output feeder current address
339	***************************************************************************/
340	/* M2MC :: BLIT_OUTPUT_ADDRESS :: ADDR [31:00] */
341	#define BCHP_M2MC_BLIT_OUTPUT_ADDRESS_ADDR_MASK 0xffffffff
342	#define BCHP_M2MC_BLIT_OUTPUT_ADDRESS_ADDR_SHIFT 0
343	#define BCHP_M2MC_BLIT_OUTPUT_ADDRESS_ADDR_DEFAULT 0x00000000
344
345	/***************************************************************************
346	*BLIT_MEM_HI - Blit memory protection address high
347	***************************************************************************/
348	/* M2MC :: BLIT_MEM_HI :: ADDR [31:00] */
349	#define BCHP_M2MC_BLIT_MEM_HI_ADDR_MASK 0xffffffff
350	#define BCHP_M2MC_BLIT_MEM_HI_ADDR_SHIFT 0
351	#define BCHP_M2MC_BLIT_MEM_HI_ADDR_DEFAULT 0xffffffff
352
353	/***************************************************************************
354	*BLIT_MEM_LO - Blit memory protection address low
355	***************************************************************************/
356	/* M2MC :: BLIT_MEM_LO :: ADDR [31:00] */
357	#define BCHP_M2MC_BLIT_MEM_LO_ADDR_MASK 0xffffffff
358	#define BCHP_M2MC_BLIT_MEM_LO_ADDR_SHIFT 0
359	#define BCHP_M2MC_BLIT_MEM_LO_ADDR_DEFAULT 0x00000000
360
361	/***************************************************************************
362	*SCBADDRSEL - scb address map select register
363	***************************************************************************/
364	/* M2MC :: SCBADDRSEL :: reserved0 [31:08] */
365	#define BCHP_M2MC_SCBADDRSEL_reserved0_MASK 0xffffff00
366	#define BCHP_M2MC_SCBADDRSEL_reserved0_SHIFT 8
367
368	/* M2MC :: SCBADDRSEL :: SCB1_MS4BITS [07:04] */
369	#define BCHP_M2MC_SCBADDRSEL_SCB1_MS4BITS_MASK 0x000000f0
370	#define BCHP_M2MC_SCBADDRSEL_SCB1_MS4BITS_SHIFT 4
371	#define BCHP_M2MC_SCBADDRSEL_SCB1_MS4BITS_DEFAULT 0x0000000f
372
373	/* M2MC :: SCBADDRSEL :: SCB0_MS4BITS [03:00] */
374	#define BCHP_M2MC_SCBADDRSEL_SCB0_MS4BITS_MASK 0x0000000f
375	#define BCHP_M2MC_SCBADDRSEL_SCB0_MS4BITS_SHIFT 0
376	#define BCHP_M2MC_SCBADDRSEL_SCB0_MS4BITS_DEFAULT 0x00000005
377
378	/***************************************************************************
379	*SCRATCH_LIST - M2MC Scratch register (Included in DMA list structure)
380	***************************************************************************/
381	/* M2MC :: SCRATCH_LIST :: VALUE [31:00] */
382	#define BCHP_M2MC_SCRATCH_LIST_VALUE_MASK 0xffffffff
383	#define BCHP_M2MC_SCRATCH_LIST_VALUE_SHIFT 0
384	#define BCHP_M2MC_SCRATCH_LIST_VALUE_DEFAULT 0x00000000
385
386	/***************************************************************************
387	*SRC_FEEDER_ENABLE - Source plane enable
388	***************************************************************************/
389	/* M2MC :: SRC_FEEDER_ENABLE :: reserved0 [31:01] */
390	#define BCHP_M2MC_SRC_FEEDER_ENABLE_reserved0_MASK 0xfffffffe
391	#define BCHP_M2MC_SRC_FEEDER_ENABLE_reserved0_SHIFT 1
392
393	/* M2MC :: SRC_FEEDER_ENABLE :: ENABLE [00:00] */
394	#define BCHP_M2MC_SRC_FEEDER_ENABLE_ENABLE_MASK 0x00000001
395	#define BCHP_M2MC_SRC_FEEDER_ENABLE_ENABLE_SHIFT 0
396	#define BCHP_M2MC_SRC_FEEDER_ENABLE_ENABLE_DEFAULT 0x00000000
397	#define BCHP_M2MC_SRC_FEEDER_ENABLE_ENABLE_DISABLE 0
398	#define BCHP_M2MC_SRC_FEEDER_ENABLE_ENABLE_ENABLE 1
399
400	/***************************************************************************
401	*SRC_SURFACE_ADDR_0 - Source surface 0 address
402	***************************************************************************/
403	/* M2MC :: SRC_SURFACE_ADDR_0 :: ADDR [31:00] */
404	#define BCHP_M2MC_SRC_SURFACE_ADDR_0_ADDR_MASK 0xffffffff
405	#define BCHP_M2MC_SRC_SURFACE_ADDR_0_ADDR_SHIFT 0
406	#define BCHP_M2MC_SRC_SURFACE_ADDR_0_ADDR_DEFAULT 0x00000000
407
408	/***************************************************************************
409	*SRC_SURFACE_STRIDE_0 - Source surface 0 STRIDE
410	***************************************************************************/
411	/* M2MC :: SRC_SURFACE_STRIDE_0 :: reserved0 [31:16] */
412	#define BCHP_M2MC_SRC_SURFACE_STRIDE_0_reserved0_MASK 0xffff0000
413	#define BCHP_M2MC_SRC_SURFACE_STRIDE_0_reserved0_SHIFT 16
414
415	/* M2MC :: SRC_SURFACE_STRIDE_0 :: STRIDE [15:00] */
416	#define BCHP_M2MC_SRC_SURFACE_STRIDE_0_STRIDE_MASK 0x0000ffff
417	#define BCHP_M2MC_SRC_SURFACE_STRIDE_0_STRIDE_SHIFT 0
418	#define BCHP_M2MC_SRC_SURFACE_STRIDE_0_STRIDE_DEFAULT 0x00000000
419
420	/***************************************************************************
421	*SRC_SURFACE_ADDR_1 - Source surface 1 address
422	***************************************************************************/
423	/* M2MC :: SRC_SURFACE_ADDR_1 :: ADDR [31:00] */
424	#define BCHP_M2MC_SRC_SURFACE_ADDR_1_ADDR_MASK 0xffffffff
425	#define BCHP_M2MC_SRC_SURFACE_ADDR_1_ADDR_SHIFT 0
426	#define BCHP_M2MC_SRC_SURFACE_ADDR_1_ADDR_DEFAULT 0x00000000
427
428	/***************************************************************************
429	*SRC_SURFACE_STRIDE_1 - Source surface 1 STRIDE
430	***************************************************************************/
431	/* M2MC :: SRC_SURFACE_STRIDE_1 :: reserved0 [31:16] */
432	#define BCHP_M2MC_SRC_SURFACE_STRIDE_1_reserved0_MASK 0xffff0000
433	#define BCHP_M2MC_SRC_SURFACE_STRIDE_1_reserved0_SHIFT 16
434
435	/* M2MC :: SRC_SURFACE_STRIDE_1 :: STRIDE [15:00] */
436	#define BCHP_M2MC_SRC_SURFACE_STRIDE_1_STRIDE_MASK 0x0000ffff
437	#define BCHP_M2MC_SRC_SURFACE_STRIDE_1_STRIDE_SHIFT 0
438	#define BCHP_M2MC_SRC_SURFACE_STRIDE_1_STRIDE_DEFAULT 0x00000000
439
440	/***************************************************************************
441	*SRC_SURFACE_0_FORMAT_DEF_1 - Source pixel format 1 for surface 0
442	***************************************************************************/
443	/* M2MC :: SRC_SURFACE_0_FORMAT_DEF_1 :: reserved0 [31:20] */
444	#define BCHP_M2MC_SRC_SURFACE_0_FORMAT_DEF_1_reserved0_MASK 0xfff00000
445	#define BCHP_M2MC_SRC_SURFACE_0_FORMAT_DEF_1_reserved0_SHIFT 20
446
447	/* M2MC :: SRC_SURFACE_0_FORMAT_DEF_1 :: FORMAT_TYPE [19:16] */
448	#define BCHP_M2MC_SRC_SURFACE_0_FORMAT_DEF_1_FORMAT_TYPE_MASK 0x000f0000
449	#define BCHP_M2MC_SRC_SURFACE_0_FORMAT_DEF_1_FORMAT_TYPE_SHIFT 16
450	#define BCHP_M2MC_SRC_SURFACE_0_FORMAT_DEF_1_FORMAT_TYPE_DEFAULT 0x00000000
451
452	/* M2MC :: SRC_SURFACE_0_FORMAT_DEF_1 :: CH3_NUM_BITS [15:12] */
453	#define BCHP_M2MC_SRC_SURFACE_0_FORMAT_DEF_1_CH3_NUM_BITS_MASK 0x0000f000
454	#define BCHP_M2MC_SRC_SURFACE_0_FORMAT_DEF_1_CH3_NUM_BITS_SHIFT 12
455	#define BCHP_M2MC_SRC_SURFACE_0_FORMAT_DEF_1_CH3_NUM_BITS_DEFAULT 0x00000008
456
457	/* M2MC :: SRC_SURFACE_0_FORMAT_DEF_1 :: CH2_NUM_BITS [11:08] */
458	#define BCHP_M2MC_SRC_SURFACE_0_FORMAT_DEF_1_CH2_NUM_BITS_MASK 0x00000f00
459	#define BCHP_M2MC_SRC_SURFACE_0_FORMAT_DEF_1_CH2_NUM_BITS_SHIFT 8
460	#define BCHP_M2MC_SRC_SURFACE_0_FORMAT_DEF_1_CH2_NUM_BITS_DEFAULT 0x00000008
461
462	/* M2MC :: SRC_SURFACE_0_FORMAT_DEF_1 :: CH1_NUM_BITS [07:04] */
463	#define BCHP_M2MC_SRC_SURFACE_0_FORMAT_DEF_1_CH1_NUM_BITS_MASK 0x000000f0
464	#define BCHP_M2MC_SRC_SURFACE_0_FORMAT_DEF_1_CH1_NUM_BITS_SHIFT 4
465	#define BCHP_M2MC_SRC_SURFACE_0_FORMAT_DEF_1_CH1_NUM_BITS_DEFAULT 0x00000008
466
467	/* M2MC :: SRC_SURFACE_0_FORMAT_DEF_1 :: CH0_NUM_BITS [03:00] */
468	#define BCHP_M2MC_SRC_SURFACE_0_FORMAT_DEF_1_CH0_NUM_BITS_MASK 0x0000000f
469	#define BCHP_M2MC_SRC_SURFACE_0_FORMAT_DEF_1_CH0_NUM_BITS_SHIFT 0
470	#define BCHP_M2MC_SRC_SURFACE_0_FORMAT_DEF_1_CH0_NUM_BITS_DEFAULT 0x00000008
471
472	/***************************************************************************
473	*SRC_SURFACE_0_FORMAT_DEF_2 - Source pixel format 2 for surface 0
474	***************************************************************************/
475	/* M2MC :: SRC_SURFACE_0_FORMAT_DEF_2 :: reserved0 [31:29] */
476	#define BCHP_M2MC_SRC_SURFACE_0_FORMAT_DEF_2_reserved0_MASK 0xe0000000
477	#define BCHP_M2MC_SRC_SURFACE_0_FORMAT_DEF_2_reserved0_SHIFT 29
478
479	/* M2MC :: SRC_SURFACE_0_FORMAT_DEF_2 :: CH3_LSB_POS [28:24] */
480	#define BCHP_M2MC_SRC_SURFACE_0_FORMAT_DEF_2_CH3_LSB_POS_MASK 0x1f000000
481	#define BCHP_M2MC_SRC_SURFACE_0_FORMAT_DEF_2_CH3_LSB_POS_SHIFT 24
482	#define BCHP_M2MC_SRC_SURFACE_0_FORMAT_DEF_2_CH3_LSB_POS_DEFAULT 0x00000018
483
484	/* M2MC :: SRC_SURFACE_0_FORMAT_DEF_2 :: reserved1 [23:21] */
485	#define BCHP_M2MC_SRC_SURFACE_0_FORMAT_DEF_2_reserved1_MASK 0x00e00000
486	#define BCHP_M2MC_SRC_SURFACE_0_FORMAT_DEF_2_reserved1_SHIFT 21
487
488	/* M2MC :: SRC_SURFACE_0_FORMAT_DEF_2 :: CH2_LSB_POS [20:16] */
489	#define BCHP_M2MC_SRC_SURFACE_0_FORMAT_DEF_2_CH2_LSB_POS_MASK 0x001f0000
490	#define BCHP_M2MC_SRC_SURFACE_0_FORMAT_DEF_2_CH2_LSB_POS_SHIFT 16
491	#define BCHP_M2MC_SRC_SURFACE_0_FORMAT_DEF_2_CH2_LSB_POS_DEFAULT 0x00000010
492
493	/* M2MC :: SRC_SURFACE_0_FORMAT_DEF_2 :: reserved2 [15:13] */
494	#define BCHP_M2MC_SRC_SURFACE_0_FORMAT_DEF_2_reserved2_MASK 0x0000e000
495	#define BCHP_M2MC_SRC_SURFACE_0_FORMAT_DEF_2_reserved2_SHIFT 13
496
497	/* M2MC :: SRC_SURFACE_0_FORMAT_DEF_2 :: CH1_LSB_POS [12:08] */
498	#define BCHP_M2MC_SRC_SURFACE_0_FORMAT_DEF_2_CH1_LSB_POS_MASK 0x00001f00
499	#define BCHP_M2MC_SRC_SURFACE_0_FORMAT_DEF_2_CH1_LSB_POS_SHIFT 8
500	#define BCHP_M2MC_SRC_SURFACE_0_FORMAT_DEF_2_CH1_LSB_POS_DEFAULT 0x00000008
501
502	/* M2MC :: SRC_SURFACE_0_FORMAT_DEF_2 :: reserved3 [07:05] */
503	#define BCHP_M2MC_SRC_SURFACE_0_FORMAT_DEF_2_reserved3_MASK 0x000000e0
504	#define BCHP_M2MC_SRC_SURFACE_0_FORMAT_DEF_2_reserved3_SHIFT 5
505
506	/* M2MC :: SRC_SURFACE_0_FORMAT_DEF_2 :: CH0_LSB_POS [04:00] */
507	#define BCHP_M2MC_SRC_SURFACE_0_FORMAT_DEF_2_CH0_LSB_POS_MASK 0x0000001f
508	#define BCHP_M2MC_SRC_SURFACE_0_FORMAT_DEF_2_CH0_LSB_POS_SHIFT 0
509	#define BCHP_M2MC_SRC_SURFACE_0_FORMAT_DEF_2_CH0_LSB_POS_DEFAULT 0x00000000
510
511	/***************************************************************************
512	*SRC_SURFACE_0_FORMAT_DEF_3 - Source pixel format 3 for surface 0
513	***************************************************************************/
514	/* M2MC :: SRC_SURFACE_0_FORMAT_DEF_3 :: reserved0 [31:23] */
515	#define BCHP_M2MC_SRC_SURFACE_0_FORMAT_DEF_3_reserved0_MASK 0xff800000
516	#define BCHP_M2MC_SRC_SURFACE_0_FORMAT_DEF_3_reserved0_SHIFT 23
517
518	/* M2MC :: SRC_SURFACE_0_FORMAT_DEF_3 :: RANGE_EXP_MAP_SCALE_FACTOR_C [22:18] */
519	#define BCHP_M2MC_SRC_SURFACE_0_FORMAT_DEF_3_RANGE_EXP_MAP_SCALE_FACTOR_C_MASK 0x007c0000
520	#define BCHP_M2MC_SRC_SURFACE_0_FORMAT_DEF_3_RANGE_EXP_MAP_SCALE_FACTOR_C_SHIFT 18
521	#define BCHP_M2MC_SRC_SURFACE_0_FORMAT_DEF_3_RANGE_EXP_MAP_SCALE_FACTOR_C_DEFAULT 0x00000008
522
523	/* M2MC :: SRC_SURFACE_0_FORMAT_DEF_3 :: RANGE_EXP_MAP_SCALE_FACTOR_Y [17:13] */
524	#define BCHP_M2MC_SRC_SURFACE_0_FORMAT_DEF_3_RANGE_EXP_MAP_SCALE_FACTOR_Y_MASK 0x0003e000
525	#define BCHP_M2MC_SRC_SURFACE_0_FORMAT_DEF_3_RANGE_EXP_MAP_SCALE_FACTOR_Y_SHIFT 13
526	#define BCHP_M2MC_SRC_SURFACE_0_FORMAT_DEF_3_RANGE_EXP_MAP_SCALE_FACTOR_Y_DEFAULT 0x00000008
527
528	/* M2MC :: SRC_SURFACE_0_FORMAT_DEF_3 :: CH3_DISABLE [12:12] */
529	#define BCHP_M2MC_SRC_SURFACE_0_FORMAT_DEF_3_CH3_DISABLE_MASK 0x00001000
530	#define BCHP_M2MC_SRC_SURFACE_0_FORMAT_DEF_3_CH3_DISABLE_SHIFT 12
531	#define BCHP_M2MC_SRC_SURFACE_0_FORMAT_DEF_3_CH3_DISABLE_DEFAULT 0x00000000
532
533	/* M2MC :: SRC_SURFACE_0_FORMAT_DEF_3 :: CH2_DISABLE [11:11] */
534	#define BCHP_M2MC_SRC_SURFACE_0_FORMAT_DEF_3_CH2_DISABLE_MASK 0x00000800
535	#define BCHP_M2MC_SRC_SURFACE_0_FORMAT_DEF_3_CH2_DISABLE_SHIFT 11
536	#define BCHP_M2MC_SRC_SURFACE_0_FORMAT_DEF_3_CH2_DISABLE_DEFAULT 0x00000000
537
538	/* M2MC :: SRC_SURFACE_0_FORMAT_DEF_3 :: CH1_DISABLE [10:10] */
539	#define BCHP_M2MC_SRC_SURFACE_0_FORMAT_DEF_3_CH1_DISABLE_MASK 0x00000400
540	#define BCHP_M2MC_SRC_SURFACE_0_FORMAT_DEF_3_CH1_DISABLE_SHIFT 10
541	#define BCHP_M2MC_SRC_SURFACE_0_FORMAT_DEF_3_CH1_DISABLE_DEFAULT 0x00000000
542
543	/* M2MC :: SRC_SURFACE_0_FORMAT_DEF_3 :: CH0_DISABLE [09:09] */
544	#define BCHP_M2MC_SRC_SURFACE_0_FORMAT_DEF_3_CH0_DISABLE_MASK 0x00000200
545	#define BCHP_M2MC_SRC_SURFACE_0_FORMAT_DEF_3_CH0_DISABLE_SHIFT 9
546	#define BCHP_M2MC_SRC_SURFACE_0_FORMAT_DEF_3_CH0_DISABLE_DEFAULT 0x00000000
547
548	/* M2MC :: SRC_SURFACE_0_FORMAT_DEF_3 :: ZERO_PAD [08:08] */
549	#define BCHP_M2MC_SRC_SURFACE_0_FORMAT_DEF_3_ZERO_PAD_MASK 0x00000100
550	#define BCHP_M2MC_SRC_SURFACE_0_FORMAT_DEF_3_ZERO_PAD_SHIFT 8
551	#define BCHP_M2MC_SRC_SURFACE_0_FORMAT_DEF_3_ZERO_PAD_DEFAULT 0x00000000
552	#define BCHP_M2MC_SRC_SURFACE_0_FORMAT_DEF_3_ZERO_PAD_ZERO_PAD 1
553	#define BCHP_M2MC_SRC_SURFACE_0_FORMAT_DEF_3_ZERO_PAD_REPLICATE 0
554
555	/* M2MC :: SRC_SURFACE_0_FORMAT_DEF_3 :: reserved1 [07:05] */
556	#define BCHP_M2MC_SRC_SURFACE_0_FORMAT_DEF_3_reserved1_MASK 0x000000e0
557	#define BCHP_M2MC_SRC_SURFACE_0_FORMAT_DEF_3_reserved1_SHIFT 5
558
559	/* M2MC :: SRC_SURFACE_0_FORMAT_DEF_3 :: PALETTE_BYPASS [04:04] */
560	#define BCHP_M2MC_SRC_SURFACE_0_FORMAT_DEF_3_PALETTE_BYPASS_MASK 0x00000010
561	#define BCHP_M2MC_SRC_SURFACE_0_FORMAT_DEF_3_PALETTE_BYPASS_SHIFT 4
562	#define BCHP_M2MC_SRC_SURFACE_0_FORMAT_DEF_3_PALETTE_BYPASS_DEFAULT 0x00000000
563	#define BCHP_M2MC_SRC_SURFACE_0_FORMAT_DEF_3_PALETTE_BYPASS_DONT_LOOKUP 0
564	#define BCHP_M2MC_SRC_SURFACE_0_FORMAT_DEF_3_PALETTE_BYPASS_LOOKUP 1
565
566	/* M2MC :: SRC_SURFACE_0_FORMAT_DEF_3 :: reserved2 [03:01] */
567	#define BCHP_M2MC_SRC_SURFACE_0_FORMAT_DEF_3_reserved2_MASK 0x0000000e
568	#define BCHP_M2MC_SRC_SURFACE_0_FORMAT_DEF_3_reserved2_SHIFT 1
569
570	/* M2MC :: SRC_SURFACE_0_FORMAT_DEF_3 :: CHROMA_FILTER [00:00] */
571	#define BCHP_M2MC_SRC_SURFACE_0_FORMAT_DEF_3_CHROMA_FILTER_MASK 0x00000001
572	#define BCHP_M2MC_SRC_SURFACE_0_FORMAT_DEF_3_CHROMA_FILTER_SHIFT 0
573	#define BCHP_M2MC_SRC_SURFACE_0_FORMAT_DEF_3_CHROMA_FILTER_DEFAULT 0x00000000
574	#define BCHP_M2MC_SRC_SURFACE_0_FORMAT_DEF_3_CHROMA_FILTER_REPLICATE 0
575	#define BCHP_M2MC_SRC_SURFACE_0_FORMAT_DEF_3_CHROMA_FILTER_FILTER 1
576
577	/***************************************************************************
578	*SRC_SURFACE_1_FORMAT_DEF_1 - Source pixel format 1 for surface 1
579	***************************************************************************/
580	/* M2MC :: SRC_SURFACE_1_FORMAT_DEF_1 :: reserved0 [31:20] */
581	#define BCHP_M2MC_SRC_SURFACE_1_FORMAT_DEF_1_reserved0_MASK 0xfff00000
582	#define BCHP_M2MC_SRC_SURFACE_1_FORMAT_DEF_1_reserved0_SHIFT 20
583
584	/* M2MC :: SRC_SURFACE_1_FORMAT_DEF_1 :: FORMAT_TYPE [19:16] */
585	#define BCHP_M2MC_SRC_SURFACE_1_FORMAT_DEF_1_FORMAT_TYPE_MASK 0x000f0000
586	#define BCHP_M2MC_SRC_SURFACE_1_FORMAT_DEF_1_FORMAT_TYPE_SHIFT 16
587	#define BCHP_M2MC_SRC_SURFACE_1_FORMAT_DEF_1_FORMAT_TYPE_DEFAULT 0x00000000
588
589	/* M2MC :: SRC_SURFACE_1_FORMAT_DEF_1 :: CH3_NUM_BITS [15:12] */
590	#define BCHP_M2MC_SRC_SURFACE_1_FORMAT_DEF_1_CH3_NUM_BITS_MASK 0x0000f000
591	#define BCHP_M2MC_SRC_SURFACE_1_FORMAT_DEF_1_CH3_NUM_BITS_SHIFT 12
592	#define BCHP_M2MC_SRC_SURFACE_1_FORMAT_DEF_1_CH3_NUM_BITS_DEFAULT 0x00000008
593
594	/* M2MC :: SRC_SURFACE_1_FORMAT_DEF_1 :: CH2_NUM_BITS [11:08] */
595	#define BCHP_M2MC_SRC_SURFACE_1_FORMAT_DEF_1_CH2_NUM_BITS_MASK 0x00000f00
596	#define BCHP_M2MC_SRC_SURFACE_1_FORMAT_DEF_1_CH2_NUM_BITS_SHIFT 8
597	#define BCHP_M2MC_SRC_SURFACE_1_FORMAT_DEF_1_CH2_NUM_BITS_DEFAULT 0x00000008
598
599	/* M2MC :: SRC_SURFACE_1_FORMAT_DEF_1 :: CH1_NUM_BITS [07:04] */
600	#define BCHP_M2MC_SRC_SURFACE_1_FORMAT_DEF_1_CH1_NUM_BITS_MASK 0x000000f0
601	#define BCHP_M2MC_SRC_SURFACE_1_FORMAT_DEF_1_CH1_NUM_BITS_SHIFT 4
602	#define BCHP_M2MC_SRC_SURFACE_1_FORMAT_DEF_1_CH1_NUM_BITS_DEFAULT 0x00000008
603
604	/* M2MC :: SRC_SURFACE_1_FORMAT_DEF_1 :: CH0_NUM_BITS [03:00] */
605	#define BCHP_M2MC_SRC_SURFACE_1_FORMAT_DEF_1_CH0_NUM_BITS_MASK 0x0000000f
606	#define BCHP_M2MC_SRC_SURFACE_1_FORMAT_DEF_1_CH0_NUM_BITS_SHIFT 0
607	#define BCHP_M2MC_SRC_SURFACE_1_FORMAT_DEF_1_CH0_NUM_BITS_DEFAULT 0x00000008
608
609	/***************************************************************************
610	*SRC_SURFACE_1_FORMAT_DEF_2 - Source pixel format 2 for surface 1
611	***************************************************************************/
612	/* M2MC :: SRC_SURFACE_1_FORMAT_DEF_2 :: reserved0 [31:29] */
613	#define BCHP_M2MC_SRC_SURFACE_1_FORMAT_DEF_2_reserved0_MASK 0xe0000000
614	#define BCHP_M2MC_SRC_SURFACE_1_FORMAT_DEF_2_reserved0_SHIFT 29
615
616	/* M2MC :: SRC_SURFACE_1_FORMAT_DEF_2 :: CH3_LSB_POS [28:24] */
617	#define BCHP_M2MC_SRC_SURFACE_1_FORMAT_DEF_2_CH3_LSB_POS_MASK 0x1f000000
618	#define BCHP_M2MC_SRC_SURFACE_1_FORMAT_DEF_2_CH3_LSB_POS_SHIFT 24
619	#define BCHP_M2MC_SRC_SURFACE_1_FORMAT_DEF_2_CH3_LSB_POS_DEFAULT 0x00000018
620
621	/* M2MC :: SRC_SURFACE_1_FORMAT_DEF_2 :: reserved1 [23:21] */
622	#define BCHP_M2MC_SRC_SURFACE_1_FORMAT_DEF_2_reserved1_MASK 0x00e00000
623	#define BCHP_M2MC_SRC_SURFACE_1_FORMAT_DEF_2_reserved1_SHIFT 21
624
625	/* M2MC :: SRC_SURFACE_1_FORMAT_DEF_2 :: CH2_LSB_POS [20:16] */
626	#define BCHP_M2MC_SRC_SURFACE_1_FORMAT_DEF_2_CH2_LSB_POS_MASK 0x001f0000
627	#define BCHP_M2MC_SRC_SURFACE_1_FORMAT_DEF_2_CH2_LSB_POS_SHIFT 16
628	#define BCHP_M2MC_SRC_SURFACE_1_FORMAT_DEF_2_CH2_LSB_POS_DEFAULT 0x00000010
629
630	/* M2MC :: SRC_SURFACE_1_FORMAT_DEF_2 :: reserved2 [15:13] */
631	#define BCHP_M2MC_SRC_SURFACE_1_FORMAT_DEF_2_reserved2_MASK 0x0000e000
632	#define BCHP_M2MC_SRC_SURFACE_1_FORMAT_DEF_2_reserved2_SHIFT 13
633
634	/* M2MC :: SRC_SURFACE_1_FORMAT_DEF_2 :: CH1_LSB_POS [12:08] */
635	#define BCHP_M2MC_SRC_SURFACE_1_FORMAT_DEF_2_CH1_LSB_POS_MASK 0x00001f00
636	#define BCHP_M2MC_SRC_SURFACE_1_FORMAT_DEF_2_CH1_LSB_POS_SHIFT 8
637	#define BCHP_M2MC_SRC_SURFACE_1_FORMAT_DEF_2_CH1_LSB_POS_DEFAULT 0x00000008
638
639	/* M2MC :: SRC_SURFACE_1_FORMAT_DEF_2 :: reserved3 [07:05] */
640	#define BCHP_M2MC_SRC_SURFACE_1_FORMAT_DEF_2_reserved3_MASK 0x000000e0
641	#define BCHP_M2MC_SRC_SURFACE_1_FORMAT_DEF_2_reserved3_SHIFT 5
642
643	/* M2MC :: SRC_SURFACE_1_FORMAT_DEF_2 :: CH0_LSB_POS [04:00] */
644	#define BCHP_M2MC_SRC_SURFACE_1_FORMAT_DEF_2_CH0_LSB_POS_MASK 0x0000001f
645	#define BCHP_M2MC_SRC_SURFACE_1_FORMAT_DEF_2_CH0_LSB_POS_SHIFT 0
646	#define BCHP_M2MC_SRC_SURFACE_1_FORMAT_DEF_2_CH0_LSB_POS_DEFAULT 0x00000000
647
648	/***************************************************************************
649	*SRC_SURFACE_1_FORMAT_DEF_3 - Source pixel format 3 for surface 1
650	***************************************************************************/
651	/* M2MC :: SRC_SURFACE_1_FORMAT_DEF_3 :: reserved0 [31:23] */
652	#define BCHP_M2MC_SRC_SURFACE_1_FORMAT_DEF_3_reserved0_MASK 0xff800000
653	#define BCHP_M2MC_SRC_SURFACE_1_FORMAT_DEF_3_reserved0_SHIFT 23
654
655	/* M2MC :: SRC_SURFACE_1_FORMAT_DEF_3 :: RANGE_EXP_MAP_SCALE_FACTOR_C [22:18] */
656	#define BCHP_M2MC_SRC_SURFACE_1_FORMAT_DEF_3_RANGE_EXP_MAP_SCALE_FACTOR_C_MASK 0x007c0000
657	#define BCHP_M2MC_SRC_SURFACE_1_FORMAT_DEF_3_RANGE_EXP_MAP_SCALE_FACTOR_C_SHIFT 18
658	#define BCHP_M2MC_SRC_SURFACE_1_FORMAT_DEF_3_RANGE_EXP_MAP_SCALE_FACTOR_C_DEFAULT 0x00000008
659
660	/* M2MC :: SRC_SURFACE_1_FORMAT_DEF_3 :: RANGE_EXP_MAP_SCALE_FACTOR_Y [17:13] */
661	#define BCHP_M2MC_SRC_SURFACE_1_FORMAT_DEF_3_RANGE_EXP_MAP_SCALE_FACTOR_Y_MASK 0x0003e000
662	#define BCHP_M2MC_SRC_SURFACE_1_FORMAT_DEF_3_RANGE_EXP_MAP_SCALE_FACTOR_Y_SHIFT 13
663	#define BCHP_M2MC_SRC_SURFACE_1_FORMAT_DEF_3_RANGE_EXP_MAP_SCALE_FACTOR_Y_DEFAULT 0x00000008
664
665	/* M2MC :: SRC_SURFACE_1_FORMAT_DEF_3 :: CH3_DISABLE [12:12] */
666	#define BCHP_M2MC_SRC_SURFACE_1_FORMAT_DEF_3_CH3_DISABLE_MASK 0x00001000
667	#define BCHP_M2MC_SRC_SURFACE_1_FORMAT_DEF_3_CH3_DISABLE_SHIFT 12
668	#define BCHP_M2MC_SRC_SURFACE_1_FORMAT_DEF_3_CH3_DISABLE_DEFAULT 0x00000000
669
670	/* M2MC :: SRC_SURFACE_1_FORMAT_DEF_3 :: CH2_DISABLE [11:11] */
671	#define BCHP_M2MC_SRC_SURFACE_1_FORMAT_DEF_3_CH2_DISABLE_MASK 0x00000800
672	#define BCHP_M2MC_SRC_SURFACE_1_FORMAT_DEF_3_CH2_DISABLE_SHIFT 11
673	#define BCHP_M2MC_SRC_SURFACE_1_FORMAT_DEF_3_CH2_DISABLE_DEFAULT 0x00000000
674
675	/* M2MC :: SRC_SURFACE_1_FORMAT_DEF_3 :: CH1_DISABLE [10:10] */
676	#define BCHP_M2MC_SRC_SURFACE_1_FORMAT_DEF_3_CH1_DISABLE_MASK 0x00000400
677	#define BCHP_M2MC_SRC_SURFACE_1_FORMAT_DEF_3_CH1_DISABLE_SHIFT 10
678	#define BCHP_M2MC_SRC_SURFACE_1_FORMAT_DEF_3_CH1_DISABLE_DEFAULT 0x00000000
679
680	/* M2MC :: SRC_SURFACE_1_FORMAT_DEF_3 :: CH0_DISABLE [09:09] */
681	#define BCHP_M2MC_SRC_SURFACE_1_FORMAT_DEF_3_CH0_DISABLE_MASK 0x00000200
682	#define BCHP_M2MC_SRC_SURFACE_1_FORMAT_DEF_3_CH0_DISABLE_SHIFT 9
683	#define BCHP_M2MC_SRC_SURFACE_1_FORMAT_DEF_3_CH0_DISABLE_DEFAULT 0x00000000
684
685	/* M2MC :: SRC_SURFACE_1_FORMAT_DEF_3 :: ZERO_PAD [08:08] */
686	#define BCHP_M2MC_SRC_SURFACE_1_FORMAT_DEF_3_ZERO_PAD_MASK 0x00000100
687	#define BCHP_M2MC_SRC_SURFACE_1_FORMAT_DEF_3_ZERO_PAD_SHIFT 8
688	#define BCHP_M2MC_SRC_SURFACE_1_FORMAT_DEF_3_ZERO_PAD_DEFAULT 0x00000000
689	#define BCHP_M2MC_SRC_SURFACE_1_FORMAT_DEF_3_ZERO_PAD_ZERO_PAD 1
690	#define BCHP_M2MC_SRC_SURFACE_1_FORMAT_DEF_3_ZERO_PAD_REPLICATE 0
691
692	/* M2MC :: SRC_SURFACE_1_FORMAT_DEF_3 :: reserved1 [07:05] */
693	#define BCHP_M2MC_SRC_SURFACE_1_FORMAT_DEF_3_reserved1_MASK 0x000000e0
694	#define BCHP_M2MC_SRC_SURFACE_1_FORMAT_DEF_3_reserved1_SHIFT 5
695
696	/* M2MC :: SRC_SURFACE_1_FORMAT_DEF_3 :: PALETTE_BYPASS [04:04] */
697	#define BCHP_M2MC_SRC_SURFACE_1_FORMAT_DEF_3_PALETTE_BYPASS_MASK 0x00000010
698	#define BCHP_M2MC_SRC_SURFACE_1_FORMAT_DEF_3_PALETTE_BYPASS_SHIFT 4
699	#define BCHP_M2MC_SRC_SURFACE_1_FORMAT_DEF_3_PALETTE_BYPASS_DEFAULT 0x00000000
700	#define BCHP_M2MC_SRC_SURFACE_1_FORMAT_DEF_3_PALETTE_BYPASS_DONT_LOOKUP 0
701	#define BCHP_M2MC_SRC_SURFACE_1_FORMAT_DEF_3_PALETTE_BYPASS_LOOKUP 1
702
703	/* M2MC :: SRC_SURFACE_1_FORMAT_DEF_3 :: reserved2 [03:01] */
704	#define BCHP_M2MC_SRC_SURFACE_1_FORMAT_DEF_3_reserved2_MASK 0x0000000e
705	#define BCHP_M2MC_SRC_SURFACE_1_FORMAT_DEF_3_reserved2_SHIFT 1
706
707	/* M2MC :: SRC_SURFACE_1_FORMAT_DEF_3 :: CHROMA_FILTER [00:00] */
708	#define BCHP_M2MC_SRC_SURFACE_1_FORMAT_DEF_3_CHROMA_FILTER_MASK 0x00000001
709	#define BCHP_M2MC_SRC_SURFACE_1_FORMAT_DEF_3_CHROMA_FILTER_SHIFT 0
710	#define BCHP_M2MC_SRC_SURFACE_1_FORMAT_DEF_3_CHROMA_FILTER_DEFAULT 0x00000000
711	#define BCHP_M2MC_SRC_SURFACE_1_FORMAT_DEF_3_CHROMA_FILTER_REPLICATE 0
712	#define BCHP_M2MC_SRC_SURFACE_1_FORMAT_DEF_3_CHROMA_FILTER_FILTER 1
713
714	/***************************************************************************
715	*SRC_W_ALPHA - Source Alpha W format
716	***************************************************************************/
717	/* M2MC :: SRC_W_ALPHA :: reserved0 [31:24] */
718	#define BCHP_M2MC_SRC_W_ALPHA_reserved0_MASK 0xff000000
719	#define BCHP_M2MC_SRC_W_ALPHA_reserved0_SHIFT 24
720
721	/* M2MC :: SRC_W_ALPHA :: W1_ALPHA [23:16] */
722	#define BCHP_M2MC_SRC_W_ALPHA_W1_ALPHA_MASK 0x00ff0000
723	#define BCHP_M2MC_SRC_W_ALPHA_W1_ALPHA_SHIFT 16
724
725	/* M2MC :: SRC_W_ALPHA :: reserved1 [15:08] */
726	#define BCHP_M2MC_SRC_W_ALPHA_reserved1_MASK 0x0000ff00
727	#define BCHP_M2MC_SRC_W_ALPHA_reserved1_SHIFT 8
728
729	/* M2MC :: SRC_W_ALPHA :: W0_ALPHA [07:00] */
730	#define BCHP_M2MC_SRC_W_ALPHA_W0_ALPHA_MASK 0x000000ff
731	#define BCHP_M2MC_SRC_W_ALPHA_W0_ALPHA_SHIFT 0
732
733	/***************************************************************************
734	*SRC_CONSTANT_COLOR - Source constant color
735	***************************************************************************/
736	/* M2MC :: SRC_CONSTANT_COLOR :: ALPHA [31:24] */
737	#define BCHP_M2MC_SRC_CONSTANT_COLOR_ALPHA_MASK 0xff000000
738	#define BCHP_M2MC_SRC_CONSTANT_COLOR_ALPHA_SHIFT 24
739
740	/* M2MC :: SRC_CONSTANT_COLOR :: RED [23:16] */
741	#define BCHP_M2MC_SRC_CONSTANT_COLOR_RED_MASK 0x00ff0000
742	#define BCHP_M2MC_SRC_CONSTANT_COLOR_RED_SHIFT 16
743
744	/* M2MC :: SRC_CONSTANT_COLOR :: GREEN [15:08] */
745	#define BCHP_M2MC_SRC_CONSTANT_COLOR_GREEN_MASK 0x0000ff00
746	#define BCHP_M2MC_SRC_CONSTANT_COLOR_GREEN_SHIFT 8
747
748	/* M2MC :: SRC_CONSTANT_COLOR :: BLUE [07:00] */
749	#define BCHP_M2MC_SRC_CONSTANT_COLOR_BLUE_MASK 0x000000ff
750	#define BCHP_M2MC_SRC_CONSTANT_COLOR_BLUE_SHIFT 0
751
752	/***************************************************************************
753	*DEST_FEEDER_ENABLE - Destination plane enable
754	***************************************************************************/
755	/* M2MC :: DEST_FEEDER_ENABLE :: reserved0 [31:01] */
756	#define BCHP_M2MC_DEST_FEEDER_ENABLE_reserved0_MASK 0xfffffffe
757	#define BCHP_M2MC_DEST_FEEDER_ENABLE_reserved0_SHIFT 1
758
759	/* M2MC :: DEST_FEEDER_ENABLE :: ENABLE [00:00] */
760	#define BCHP_M2MC_DEST_FEEDER_ENABLE_ENABLE_MASK 0x00000001
761	#define BCHP_M2MC_DEST_FEEDER_ENABLE_ENABLE_SHIFT 0
762	#define BCHP_M2MC_DEST_FEEDER_ENABLE_ENABLE_DEFAULT 0x00000000
763	#define BCHP_M2MC_DEST_FEEDER_ENABLE_ENABLE_DISABLE 0
764	#define BCHP_M2MC_DEST_FEEDER_ENABLE_ENABLE_ENABLE 1
765
766	/***************************************************************************
767	*DEST_SURFACE_ADDR_0 - Destination surface 0 address
768	***************************************************************************/
769	/* M2MC :: DEST_SURFACE_ADDR_0 :: ADDR [31:00] */
770	#define BCHP_M2MC_DEST_SURFACE_ADDR_0_ADDR_MASK 0xffffffff
771	#define BCHP_M2MC_DEST_SURFACE_ADDR_0_ADDR_SHIFT 0
772	#define BCHP_M2MC_DEST_SURFACE_ADDR_0_ADDR_DEFAULT 0x00000000
773
774	/***************************************************************************
775	*DEST_SURFACE_STRIDE_0 - Destination surface 0 STRIDE
776	***************************************************************************/
777	/* M2MC :: DEST_SURFACE_STRIDE_0 :: reserved0 [31:16] */
778	#define BCHP_M2MC_DEST_SURFACE_STRIDE_0_reserved0_MASK 0xffff0000
779	#define BCHP_M2MC_DEST_SURFACE_STRIDE_0_reserved0_SHIFT 16
780
781	/* M2MC :: DEST_SURFACE_STRIDE_0 :: STRIDE [15:00] */
782	#define BCHP_M2MC_DEST_SURFACE_STRIDE_0_STRIDE_MASK 0x0000ffff
783	#define BCHP_M2MC_DEST_SURFACE_STRIDE_0_STRIDE_SHIFT 0
784	#define BCHP_M2MC_DEST_SURFACE_STRIDE_0_STRIDE_DEFAULT 0x00000000
785
786	/***************************************************************************
787	*DEST_SURFACE_ADDR_1 - Destination surface 1 address
788	***************************************************************************/
789	/* M2MC :: DEST_SURFACE_ADDR_1 :: ADDR [31:00] */
790	#define BCHP_M2MC_DEST_SURFACE_ADDR_1_ADDR_MASK 0xffffffff
791	#define BCHP_M2MC_DEST_SURFACE_ADDR_1_ADDR_SHIFT 0
792	#define BCHP_M2MC_DEST_SURFACE_ADDR_1_ADDR_DEFAULT 0x00000000
793
794	/***************************************************************************
795	*DEST_SURFACE_STRIDE_1 - Destination surface 1 STRIDE
796	***************************************************************************/
797	/* M2MC :: DEST_SURFACE_STRIDE_1 :: reserved0 [31:16] */
798	#define BCHP_M2MC_DEST_SURFACE_STRIDE_1_reserved0_MASK 0xffff0000
799	#define BCHP_M2MC_DEST_SURFACE_STRIDE_1_reserved0_SHIFT 16
800
801	/* M2MC :: DEST_SURFACE_STRIDE_1 :: STRIDE [15:00] */
802	#define BCHP_M2MC_DEST_SURFACE_STRIDE_1_STRIDE_MASK 0x0000ffff
803	#define BCHP_M2MC_DEST_SURFACE_STRIDE_1_STRIDE_SHIFT 0
804	#define BCHP_M2MC_DEST_SURFACE_STRIDE_1_STRIDE_DEFAULT 0x00000000
805
806	/***************************************************************************
807	*DEST_SURFACE_FORMAT_DEF_1 - Destination pixel format 1
808	***************************************************************************/
809	/* M2MC :: DEST_SURFACE_FORMAT_DEF_1 :: reserved0 [31:19] */
810	#define BCHP_M2MC_DEST_SURFACE_FORMAT_DEF_1_reserved0_MASK 0xfff80000
811	#define BCHP_M2MC_DEST_SURFACE_FORMAT_DEF_1_reserved0_SHIFT 19
812
813	/* M2MC :: DEST_SURFACE_FORMAT_DEF_1 :: FORMAT_TYPE [18:16] */
814	#define BCHP_M2MC_DEST_SURFACE_FORMAT_DEF_1_FORMAT_TYPE_MASK 0x00070000
815	#define BCHP_M2MC_DEST_SURFACE_FORMAT_DEF_1_FORMAT_TYPE_SHIFT 16
816	#define BCHP_M2MC_DEST_SURFACE_FORMAT_DEF_1_FORMAT_TYPE_DEFAULT 0x00000000
817
818	/* M2MC :: DEST_SURFACE_FORMAT_DEF_1 :: CH3_NUM_BITS [15:12] */
819	#define BCHP_M2MC_DEST_SURFACE_FORMAT_DEF_1_CH3_NUM_BITS_MASK 0x0000f000
820	#define BCHP_M2MC_DEST_SURFACE_FORMAT_DEF_1_CH3_NUM_BITS_SHIFT 12
821	#define BCHP_M2MC_DEST_SURFACE_FORMAT_DEF_1_CH3_NUM_BITS_DEFAULT 0x00000008
822
823	/* M2MC :: DEST_SURFACE_FORMAT_DEF_1 :: CH2_NUM_BITS [11:08] */
824	#define BCHP_M2MC_DEST_SURFACE_FORMAT_DEF_1_CH2_NUM_BITS_MASK 0x00000f00
825	#define BCHP_M2MC_DEST_SURFACE_FORMAT_DEF_1_CH2_NUM_BITS_SHIFT 8
826	#define BCHP_M2MC_DEST_SURFACE_FORMAT_DEF_1_CH2_NUM_BITS_DEFAULT 0x00000008
827
828	/* M2MC :: DEST_SURFACE_FORMAT_DEF_1 :: CH1_NUM_BITS [07:04] */
829	#define BCHP_M2MC_DEST_SURFACE_FORMAT_DEF_1_CH1_NUM_BITS_MASK 0x000000f0
830	#define BCHP_M2MC_DEST_SURFACE_FORMAT_DEF_1_CH1_NUM_BITS_SHIFT 4
831	#define BCHP_M2MC_DEST_SURFACE_FORMAT_DEF_1_CH1_NUM_BITS_DEFAULT 0x00000008
832
833	/* M2MC :: DEST_SURFACE_FORMAT_DEF_1 :: CH0_NUM_BITS [03:00] */
834	#define BCHP_M2MC_DEST_SURFACE_FORMAT_DEF_1_CH0_NUM_BITS_MASK 0x0000000f
835	#define BCHP_M2MC_DEST_SURFACE_FORMAT_DEF_1_CH0_NUM_BITS_SHIFT 0
836	#define BCHP_M2MC_DEST_SURFACE_FORMAT_DEF_1_CH0_NUM_BITS_DEFAULT 0x00000008
837
838	/***************************************************************************
839	*DEST_SURFACE_FORMAT_DEF_2 - Destination pixel format 2
840	***************************************************************************/
841	/* M2MC :: DEST_SURFACE_FORMAT_DEF_2 :: reserved0 [31:29] */
842	#define BCHP_M2MC_DEST_SURFACE_FORMAT_DEF_2_reserved0_MASK 0xe0000000
843	#define BCHP_M2MC_DEST_SURFACE_FORMAT_DEF_2_reserved0_SHIFT 29
844
845	/* M2MC :: DEST_SURFACE_FORMAT_DEF_2 :: CH3_LSB_POS [28:24] */
846	#define BCHP_M2MC_DEST_SURFACE_FORMAT_DEF_2_CH3_LSB_POS_MASK 0x1f000000
847	#define BCHP_M2MC_DEST_SURFACE_FORMAT_DEF_2_CH3_LSB_POS_SHIFT 24
848	#define BCHP_M2MC_DEST_SURFACE_FORMAT_DEF_2_CH3_LSB_POS_DEFAULT 0x00000018
849
850	/* M2MC :: DEST_SURFACE_FORMAT_DEF_2 :: reserved1 [23:21] */
851	#define BCHP_M2MC_DEST_SURFACE_FORMAT_DEF_2_reserved1_MASK 0x00e00000
852	#define BCHP_M2MC_DEST_SURFACE_FORMAT_DEF_2_reserved1_SHIFT 21
853
854	/* M2MC :: DEST_SURFACE_FORMAT_DEF_2 :: CH2_LSB_POS [20:16] */
855	#define BCHP_M2MC_DEST_SURFACE_FORMAT_DEF_2_CH2_LSB_POS_MASK 0x001f0000
856	#define BCHP_M2MC_DEST_SURFACE_FORMAT_DEF_2_CH2_LSB_POS_SHIFT 16
857	#define BCHP_M2MC_DEST_SURFACE_FORMAT_DEF_2_CH2_LSB_POS_DEFAULT 0x00000010
858
859	/* M2MC :: DEST_SURFACE_FORMAT_DEF_2 :: reserved2 [15:13] */
860	#define BCHP_M2MC_DEST_SURFACE_FORMAT_DEF_2_reserved2_MASK 0x0000e000
861	#define BCHP_M2MC_DEST_SURFACE_FORMAT_DEF_2_reserved2_SHIFT 13
862
863	/* M2MC :: DEST_SURFACE_FORMAT_DEF_2 :: CH1_LSB_POS [12:08] */
864	#define BCHP_M2MC_DEST_SURFACE_FORMAT_DEF_2_CH1_LSB_POS_MASK 0x00001f00
865	#define BCHP_M2MC_DEST_SURFACE_FORMAT_DEF_2_CH1_LSB_POS_SHIFT 8
866	#define BCHP_M2MC_DEST_SURFACE_FORMAT_DEF_2_CH1_LSB_POS_DEFAULT 0x00000008
867
868	/* M2MC :: DEST_SURFACE_FORMAT_DEF_2 :: reserved3 [07:05] */
869	#define BCHP_M2MC_DEST_SURFACE_FORMAT_DEF_2_reserved3_MASK 0x000000e0
870	#define BCHP_M2MC_DEST_SURFACE_FORMAT_DEF_2_reserved3_SHIFT 5
871
872	/* M2MC :: DEST_SURFACE_FORMAT_DEF_2 :: CH0_LSB_POS [04:00] */
873	#define BCHP_M2MC_DEST_SURFACE_FORMAT_DEF_2_CH0_LSB_POS_MASK 0x0000001f
874	#define BCHP_M2MC_DEST_SURFACE_FORMAT_DEF_2_CH0_LSB_POS_SHIFT 0
875	#define BCHP_M2MC_DEST_SURFACE_FORMAT_DEF_2_CH0_LSB_POS_DEFAULT 0x00000000
876
877	/***************************************************************************
878	*DEST_SURFACE_FORMAT_DEF_3 - Destination pixel format 3
879	***************************************************************************/
880	/* M2MC :: DEST_SURFACE_FORMAT_DEF_3 :: reserved0 [31:13] */
881	#define BCHP_M2MC_DEST_SURFACE_FORMAT_DEF_3_reserved0_MASK 0xffffe000
882	#define BCHP_M2MC_DEST_SURFACE_FORMAT_DEF_3_reserved0_SHIFT 13
883
884	/* M2MC :: DEST_SURFACE_FORMAT_DEF_3 :: CH3_DISABLE [12:12] */
885	#define BCHP_M2MC_DEST_SURFACE_FORMAT_DEF_3_CH3_DISABLE_MASK 0x00001000
886	#define BCHP_M2MC_DEST_SURFACE_FORMAT_DEF_3_CH3_DISABLE_SHIFT 12
887	#define BCHP_M2MC_DEST_SURFACE_FORMAT_DEF_3_CH3_DISABLE_DEFAULT 0x00000000
888
889	/* M2MC :: DEST_SURFACE_FORMAT_DEF_3 :: CH2_DISABLE [11:11] */
890	#define BCHP_M2MC_DEST_SURFACE_FORMAT_DEF_3_CH2_DISABLE_MASK 0x00000800
891	#define BCHP_M2MC_DEST_SURFACE_FORMAT_DEF_3_CH2_DISABLE_SHIFT 11
892	#define BCHP_M2MC_DEST_SURFACE_FORMAT_DEF_3_CH2_DISABLE_DEFAULT 0x00000000
893
894	/* M2MC :: DEST_SURFACE_FORMAT_DEF_3 :: CH1_DISABLE [10:10] */
895	#define BCHP_M2MC_DEST_SURFACE_FORMAT_DEF_3_CH1_DISABLE_MASK 0x00000400
896	#define BCHP_M2MC_DEST_SURFACE_FORMAT_DEF_3_CH1_DISABLE_SHIFT 10
897	#define BCHP_M2MC_DEST_SURFACE_FORMAT_DEF_3_CH1_DISABLE_DEFAULT 0x00000000
898
899	/* M2MC :: DEST_SURFACE_FORMAT_DEF_3 :: CH0_DISABLE [09:09] */
900	#define BCHP_M2MC_DEST_SURFACE_FORMAT_DEF_3_CH0_DISABLE_MASK 0x00000200
901	#define BCHP_M2MC_DEST_SURFACE_FORMAT_DEF_3_CH0_DISABLE_SHIFT 9
902	#define BCHP_M2MC_DEST_SURFACE_FORMAT_DEF_3_CH0_DISABLE_DEFAULT 0x00000000
903
904	/* M2MC :: DEST_SURFACE_FORMAT_DEF_3 :: ZERO_PAD [08:08] */
905	#define BCHP_M2MC_DEST_SURFACE_FORMAT_DEF_3_ZERO_PAD_MASK 0x00000100
906	#define BCHP_M2MC_DEST_SURFACE_FORMAT_DEF_3_ZERO_PAD_SHIFT 8
907	#define BCHP_M2MC_DEST_SURFACE_FORMAT_DEF_3_ZERO_PAD_DEFAULT 0x00000000
908	#define BCHP_M2MC_DEST_SURFACE_FORMAT_DEF_3_ZERO_PAD_ZERO_PAD 1
909	#define BCHP_M2MC_DEST_SURFACE_FORMAT_DEF_3_ZERO_PAD_REPLICATE 0
910
911	/* M2MC :: DEST_SURFACE_FORMAT_DEF_3 :: reserved1 [07:05] */
912	#define BCHP_M2MC_DEST_SURFACE_FORMAT_DEF_3_reserved1_MASK 0x000000e0
913	#define BCHP_M2MC_DEST_SURFACE_FORMAT_DEF_3_reserved1_SHIFT 5
914
915	/* M2MC :: DEST_SURFACE_FORMAT_DEF_3 :: PALETTE_BYPASS [04:04] */
916	#define BCHP_M2MC_DEST_SURFACE_FORMAT_DEF_3_PALETTE_BYPASS_MASK 0x00000010
917	#define BCHP_M2MC_DEST_SURFACE_FORMAT_DEF_3_PALETTE_BYPASS_SHIFT 4
918	#define BCHP_M2MC_DEST_SURFACE_FORMAT_DEF_3_PALETTE_BYPASS_DEFAULT 0x00000000
919	#define BCHP_M2MC_DEST_SURFACE_FORMAT_DEF_3_PALETTE_BYPASS_DONT_LOOKUP 0
920	#define BCHP_M2MC_DEST_SURFACE_FORMAT_DEF_3_PALETTE_BYPASS_LOOKUP 1
921
922	/* M2MC :: DEST_SURFACE_FORMAT_DEF_3 :: reserved2 [03:01] */
923	#define BCHP_M2MC_DEST_SURFACE_FORMAT_DEF_3_reserved2_MASK 0x0000000e
924	#define BCHP_M2MC_DEST_SURFACE_FORMAT_DEF_3_reserved2_SHIFT 1
925
926	/* M2MC :: DEST_SURFACE_FORMAT_DEF_3 :: CHROMA_FILTER [00:00] */
927	#define BCHP_M2MC_DEST_SURFACE_FORMAT_DEF_3_CHROMA_FILTER_MASK 0x00000001
928	#define BCHP_M2MC_DEST_SURFACE_FORMAT_DEF_3_CHROMA_FILTER_SHIFT 0
929	#define BCHP_M2MC_DEST_SURFACE_FORMAT_DEF_3_CHROMA_FILTER_DEFAULT 0x00000000
930	#define BCHP_M2MC_DEST_SURFACE_FORMAT_DEF_3_CHROMA_FILTER_REPLICATE 0
931	#define BCHP_M2MC_DEST_SURFACE_FORMAT_DEF_3_CHROMA_FILTER_FILTER 1
932
933	/***************************************************************************
934	*DEST_W_ALPHA - Destination Alpha W format
935	***************************************************************************/
936	/* M2MC :: DEST_W_ALPHA :: reserved0 [31:24] */
937	#define BCHP_M2MC_DEST_W_ALPHA_reserved0_MASK 0xff000000
938	#define BCHP_M2MC_DEST_W_ALPHA_reserved0_SHIFT 24
939
940	/* M2MC :: DEST_W_ALPHA :: W1_ALPHA [23:16] */
941	#define BCHP_M2MC_DEST_W_ALPHA_W1_ALPHA_MASK 0x00ff0000
942	#define BCHP_M2MC_DEST_W_ALPHA_W1_ALPHA_SHIFT 16
943
944	/* M2MC :: DEST_W_ALPHA :: reserved1 [15:08] */
945	#define BCHP_M2MC_DEST_W_ALPHA_reserved1_MASK 0x0000ff00
946	#define BCHP_M2MC_DEST_W_ALPHA_reserved1_SHIFT 8
947
948	/* M2MC :: DEST_W_ALPHA :: W0_ALPHA [07:00] */
949	#define BCHP_M2MC_DEST_W_ALPHA_W0_ALPHA_MASK 0x000000ff
950	#define BCHP_M2MC_DEST_W_ALPHA_W0_ALPHA_SHIFT 0
951
952	/***************************************************************************
953	*DEST_CONSTANT_COLOR - Destination constant color
954	***************************************************************************/
955	/* M2MC :: DEST_CONSTANT_COLOR :: ALPHA [31:24] */
956	#define BCHP_M2MC_DEST_CONSTANT_COLOR_ALPHA_MASK 0xff000000
957	#define BCHP_M2MC_DEST_CONSTANT_COLOR_ALPHA_SHIFT 24
958
959	/* M2MC :: DEST_CONSTANT_COLOR :: RED [23:16] */
960	#define BCHP_M2MC_DEST_CONSTANT_COLOR_RED_MASK 0x00ff0000
961	#define BCHP_M2MC_DEST_CONSTANT_COLOR_RED_SHIFT 16
962
963	/* M2MC :: DEST_CONSTANT_COLOR :: GREEN [15:08] */
964	#define BCHP_M2MC_DEST_CONSTANT_COLOR_GREEN_MASK 0x0000ff00
965	#define BCHP_M2MC_DEST_CONSTANT_COLOR_GREEN_SHIFT 8
966
967	/* M2MC :: DEST_CONSTANT_COLOR :: BLUE [07:00] */
968	#define BCHP_M2MC_DEST_CONSTANT_COLOR_BLUE_MASK 0x000000ff
969	#define BCHP_M2MC_DEST_CONSTANT_COLOR_BLUE_SHIFT 0
970
971	/***************************************************************************
972	*OUTPUT_FEEDER_ENABLE - Output plane enable
973	***************************************************************************/
974	/* M2MC :: OUTPUT_FEEDER_ENABLE :: reserved0 [31:01] */
975	#define BCHP_M2MC_OUTPUT_FEEDER_ENABLE_reserved0_MASK 0xfffffffe
976	#define BCHP_M2MC_OUTPUT_FEEDER_ENABLE_reserved0_SHIFT 1
977
978	/* M2MC :: OUTPUT_FEEDER_ENABLE :: ENABLE [00:00] */
979	#define BCHP_M2MC_OUTPUT_FEEDER_ENABLE_ENABLE_MASK 0x00000001
980	#define BCHP_M2MC_OUTPUT_FEEDER_ENABLE_ENABLE_SHIFT 0
981	#define BCHP_M2MC_OUTPUT_FEEDER_ENABLE_ENABLE_DEFAULT 0x00000000
982	#define BCHP_M2MC_OUTPUT_FEEDER_ENABLE_ENABLE_DISABLE 0
983	#define BCHP_M2MC_OUTPUT_FEEDER_ENABLE_ENABLE_ENABLE 1
984
985	/***************************************************************************
986	*OUTPUT_SURFACE_ADDR_0 - Output surface 0 address
987	***************************************************************************/
988	/* M2MC :: OUTPUT_SURFACE_ADDR_0 :: ADDR [31:00] */
989	#define BCHP_M2MC_OUTPUT_SURFACE_ADDR_0_ADDR_MASK 0xffffffff
990	#define BCHP_M2MC_OUTPUT_SURFACE_ADDR_0_ADDR_SHIFT 0
991	#define BCHP_M2MC_OUTPUT_SURFACE_ADDR_0_ADDR_DEFAULT 0x00000000
992
993	/***************************************************************************
994	*OUTPUT_SURFACE_STRIDE_0 - Output surface 0 STRIDE
995	***************************************************************************/
996	/* M2MC :: OUTPUT_SURFACE_STRIDE_0 :: reserved0 [31:16] */
997	#define BCHP_M2MC_OUTPUT_SURFACE_STRIDE_0_reserved0_MASK 0xffff0000
998	#define BCHP_M2MC_OUTPUT_SURFACE_STRIDE_0_reserved0_SHIFT 16
999
1000	/* M2MC :: OUTPUT_SURFACE_STRIDE_0 :: STRIDE [15:00] */
1001	#define BCHP_M2MC_OUTPUT_SURFACE_STRIDE_0_STRIDE_MASK 0x0000ffff
1002	#define BCHP_M2MC_OUTPUT_SURFACE_STRIDE_0_STRIDE_SHIFT 0
1003	#define BCHP_M2MC_OUTPUT_SURFACE_STRIDE_0_STRIDE_DEFAULT 0x00000000
1004
1005	/***************************************************************************
1006	*OUTPUT_SURFACE_ADDR_1 - Output surface 1 address
1007	***************************************************************************/
1008	/* M2MC :: OUTPUT_SURFACE_ADDR_1 :: ADDR [31:00] */
1009	#define BCHP_M2MC_OUTPUT_SURFACE_ADDR_1_ADDR_MASK 0xffffffff
1010	#define BCHP_M2MC_OUTPUT_SURFACE_ADDR_1_ADDR_SHIFT 0
1011	#define BCHP_M2MC_OUTPUT_SURFACE_ADDR_1_ADDR_DEFAULT 0x00000000
1012
1013	/***************************************************************************
1014	*OUTPUT_SURFACE_STRIDE_1 - Output surface 1 STRIDE
1015	***************************************************************************/
1016	/* M2MC :: OUTPUT_SURFACE_STRIDE_1 :: reserved0 [31:16] */
1017	#define BCHP_M2MC_OUTPUT_SURFACE_STRIDE_1_reserved0_MASK 0xffff0000
1018	#define BCHP_M2MC_OUTPUT_SURFACE_STRIDE_1_reserved0_SHIFT 16
1019
1020	/* M2MC :: OUTPUT_SURFACE_STRIDE_1 :: STRIDE [15:00] */
1021	#define BCHP_M2MC_OUTPUT_SURFACE_STRIDE_1_STRIDE_MASK 0x0000ffff
1022	#define BCHP_M2MC_OUTPUT_SURFACE_STRIDE_1_STRIDE_SHIFT 0
1023	#define BCHP_M2MC_OUTPUT_SURFACE_STRIDE_1_STRIDE_DEFAULT 0x00000000
1024
1025	/***************************************************************************
1026	*OUTPUT_SURFACE_FORMAT_DEF_1 - Output pixel format 1
1027	***************************************************************************/
1028	/* M2MC :: OUTPUT_SURFACE_FORMAT_DEF_1 :: reserved0 [31:19] */
1029	#define BCHP_M2MC_OUTPUT_SURFACE_FORMAT_DEF_1_reserved0_MASK 0xfff80000
1030	#define BCHP_M2MC_OUTPUT_SURFACE_FORMAT_DEF_1_reserved0_SHIFT 19
1031
1032	/* M2MC :: OUTPUT_SURFACE_FORMAT_DEF_1 :: FORMAT_TYPE [18:16] */
1033	#define BCHP_M2MC_OUTPUT_SURFACE_FORMAT_DEF_1_FORMAT_TYPE_MASK 0x00070000
1034	#define BCHP_M2MC_OUTPUT_SURFACE_FORMAT_DEF_1_FORMAT_TYPE_SHIFT 16
1035	#define BCHP_M2MC_OUTPUT_SURFACE_FORMAT_DEF_1_FORMAT_TYPE_DEFAULT 0x00000000
1036
1037	/* M2MC :: OUTPUT_SURFACE_FORMAT_DEF_1 :: CH3_NUM_BITS [15:12] */
1038	#define BCHP_M2MC_OUTPUT_SURFACE_FORMAT_DEF_1_CH3_NUM_BITS_MASK 0x0000f000
1039	#define BCHP_M2MC_OUTPUT_SURFACE_FORMAT_DEF_1_CH3_NUM_BITS_SHIFT 12
1040	#define BCHP_M2MC_OUTPUT_SURFACE_FORMAT_DEF_1_CH3_NUM_BITS_DEFAULT 0x00000008
1041
1042	/* M2MC :: OUTPUT_SURFACE_FORMAT_DEF_1 :: CH2_NUM_BITS [11:08] */
1043	#define BCHP_M2MC_OUTPUT_SURFACE_FORMAT_DEF_1_CH2_NUM_BITS_MASK 0x00000f00
1044	#define BCHP_M2MC_OUTPUT_SURFACE_FORMAT_DEF_1_CH2_NUM_BITS_SHIFT 8
1045	#define BCHP_M2MC_OUTPUT_SURFACE_FORMAT_DEF_1_CH2_NUM_BITS_DEFAULT 0x00000008
1046
1047	/* M2MC :: OUTPUT_SURFACE_FORMAT_DEF_1 :: CH1_NUM_BITS [07:04] */
1048	#define BCHP_M2MC_OUTPUT_SURFACE_FORMAT_DEF_1_CH1_NUM_BITS_MASK 0x000000f0
1049	#define BCHP_M2MC_OUTPUT_SURFACE_FORMAT_DEF_1_CH1_NUM_BITS_SHIFT 4
1050	#define BCHP_M2MC_OUTPUT_SURFACE_FORMAT_DEF_1_CH1_NUM_BITS_DEFAULT 0x00000008
1051
1052	/* M2MC :: OUTPUT_SURFACE_FORMAT_DEF_1 :: CH0_NUM_BITS [03:00] */
1053	#define BCHP_M2MC_OUTPUT_SURFACE_FORMAT_DEF_1_CH0_NUM_BITS_MASK 0x0000000f
1054	#define BCHP_M2MC_OUTPUT_SURFACE_FORMAT_DEF_1_CH0_NUM_BITS_SHIFT 0
1055	#define BCHP_M2MC_OUTPUT_SURFACE_FORMAT_DEF_1_CH0_NUM_BITS_DEFAULT 0x00000008
1056
1057	/***************************************************************************
1058	*OUTPUT_SURFACE_FORMAT_DEF_2 - Output pixel format 2
1059	***************************************************************************/
1060	/* M2MC :: OUTPUT_SURFACE_FORMAT_DEF_2 :: reserved0 [31:29] */
1061	#define BCHP_M2MC_OUTPUT_SURFACE_FORMAT_DEF_2_reserved0_MASK 0xe0000000
1062	#define BCHP_M2MC_OUTPUT_SURFACE_FORMAT_DEF_2_reserved0_SHIFT 29
1063
1064	/* M2MC :: OUTPUT_SURFACE_FORMAT_DEF_2 :: CH3_LSB_POS [28:24] */
1065	#define BCHP_M2MC_OUTPUT_SURFACE_FORMAT_DEF_2_CH3_LSB_POS_MASK 0x1f000000
1066	#define BCHP_M2MC_OUTPUT_SURFACE_FORMAT_DEF_2_CH3_LSB_POS_SHIFT 24
1067	#define BCHP_M2MC_OUTPUT_SURFACE_FORMAT_DEF_2_CH3_LSB_POS_DEFAULT 0x00000018
1068
1069	/* M2MC :: OUTPUT_SURFACE_FORMAT_DEF_2 :: reserved1 [23:21] */
1070	#define BCHP_M2MC_OUTPUT_SURFACE_FORMAT_DEF_2_reserved1_MASK 0x00e00000
1071	#define BCHP_M2MC_OUTPUT_SURFACE_FORMAT_DEF_2_reserved1_SHIFT 21
1072
1073	/* M2MC :: OUTPUT_SURFACE_FORMAT_DEF_2 :: CH2_LSB_POS [20:16] */
1074	#define BCHP_M2MC_OUTPUT_SURFACE_FORMAT_DEF_2_CH2_LSB_POS_MASK 0x001f0000
1075	#define BCHP_M2MC_OUTPUT_SURFACE_FORMAT_DEF_2_CH2_LSB_POS_SHIFT 16
1076	#define BCHP_M2MC_OUTPUT_SURFACE_FORMAT_DEF_2_CH2_LSB_POS_DEFAULT 0x00000010
1077
1078	/* M2MC :: OUTPUT_SURFACE_FORMAT_DEF_2 :: reserved2 [15:13] */
1079	#define BCHP_M2MC_OUTPUT_SURFACE_FORMAT_DEF_2_reserved2_MASK 0x0000e000
1080	#define BCHP_M2MC_OUTPUT_SURFACE_FORMAT_DEF_2_reserved2_SHIFT 13
1081
1082	/* M2MC :: OUTPUT_SURFACE_FORMAT_DEF_2 :: CH1_LSB_POS [12:08] */
1083	#define BCHP_M2MC_OUTPUT_SURFACE_FORMAT_DEF_2_CH1_LSB_POS_MASK 0x00001f00
1084	#define BCHP_M2MC_OUTPUT_SURFACE_FORMAT_DEF_2_CH1_LSB_POS_SHIFT 8
1085	#define BCHP_M2MC_OUTPUT_SURFACE_FORMAT_DEF_2_CH1_LSB_POS_DEFAULT 0x00000008
1086
1087	/* M2MC :: OUTPUT_SURFACE_FORMAT_DEF_2 :: reserved3 [07:05] */
1088	#define BCHP_M2MC_OUTPUT_SURFACE_FORMAT_DEF_2_reserved3_MASK 0x000000e0
1089	#define BCHP_M2MC_OUTPUT_SURFACE_FORMAT_DEF_2_reserved3_SHIFT 5
1090
1091	/* M2MC :: OUTPUT_SURFACE_FORMAT_DEF_2 :: CH0_LSB_POS [04:00] */
1092	#define BCHP_M2MC_OUTPUT_SURFACE_FORMAT_DEF_2_CH0_LSB_POS_MASK 0x0000001f
1093	#define BCHP_M2MC_OUTPUT_SURFACE_FORMAT_DEF_2_CH0_LSB_POS_SHIFT 0
1094	#define BCHP_M2MC_OUTPUT_SURFACE_FORMAT_DEF_2_CH0_LSB_POS_DEFAULT 0x00000000
1095
1096	/***************************************************************************
1097	*OUTPUT_SURFACE_FORMAT_DEF_3 - Output pixel format 3
1098	***************************************************************************/
1099	/* M2MC :: OUTPUT_SURFACE_FORMAT_DEF_3 :: reserved0 [31:17] */
1100	#define BCHP_M2MC_OUTPUT_SURFACE_FORMAT_DEF_3_reserved0_MASK 0xfffe0000
1101	#define BCHP_M2MC_OUTPUT_SURFACE_FORMAT_DEF_3_reserved0_SHIFT 17
1102
1103	/* M2MC :: OUTPUT_SURFACE_FORMAT_DEF_3 :: DITHER_ENABLE [16:16] */
1104	#define BCHP_M2MC_OUTPUT_SURFACE_FORMAT_DEF_3_DITHER_ENABLE_MASK 0x00010000
1105	#define BCHP_M2MC_OUTPUT_SURFACE_FORMAT_DEF_3_DITHER_ENABLE_SHIFT 16
1106	#define BCHP_M2MC_OUTPUT_SURFACE_FORMAT_DEF_3_DITHER_ENABLE_DEFAULT 0x00000000
1107	#define BCHP_M2MC_OUTPUT_SURFACE_FORMAT_DEF_3_DITHER_ENABLE_DISABLE 0
1108	#define BCHP_M2MC_OUTPUT_SURFACE_FORMAT_DEF_3_DITHER_ENABLE_ENABLE 1
1109
1110	/* M2MC :: OUTPUT_SURFACE_FORMAT_DEF_3 :: reserved1 [15:02] */
1111	#define BCHP_M2MC_OUTPUT_SURFACE_FORMAT_DEF_3_reserved1_MASK 0x0000fffc
1112	#define BCHP_M2MC_OUTPUT_SURFACE_FORMAT_DEF_3_reserved1_SHIFT 2
1113
1114	/* M2MC :: OUTPUT_SURFACE_FORMAT_DEF_3 :: CHROMA_FILTER [01:00] */
1115	#define BCHP_M2MC_OUTPUT_SURFACE_FORMAT_DEF_3_CHROMA_FILTER_MASK 0x00000003
1116	#define BCHP_M2MC_OUTPUT_SURFACE_FORMAT_DEF_3_CHROMA_FILTER_SHIFT 0
1117	#define BCHP_M2MC_OUTPUT_SURFACE_FORMAT_DEF_3_CHROMA_FILTER_DEFAULT 0x00000000
1118	#define BCHP_M2MC_OUTPUT_SURFACE_FORMAT_DEF_3_CHROMA_FILTER_FILTER 0
1119	#define BCHP_M2MC_OUTPUT_SURFACE_FORMAT_DEF_3_CHROMA_FILTER_FIRST 1
1120	#define BCHP_M2MC_OUTPUT_SURFACE_FORMAT_DEF_3_CHROMA_FILTER_SECOND 2
1121
1122	/***************************************************************************
1123	*BLIT_HEADER - Blit header and control
1124	***************************************************************************/
1125	/* M2MC :: BLIT_HEADER :: SRC_SCALER_ENABLE [31:31] */
1126	#define BCHP_M2MC_BLIT_HEADER_SRC_SCALER_ENABLE_MASK 0x80000000
1127	#define BCHP_M2MC_BLIT_HEADER_SRC_SCALER_ENABLE_SHIFT 31
1128	#define BCHP_M2MC_BLIT_HEADER_SRC_SCALER_ENABLE_DEFAULT 0x00000000
1129	#define BCHP_M2MC_BLIT_HEADER_SRC_SCALER_ENABLE_DISABLE 0
1130	#define BCHP_M2MC_BLIT_HEADER_SRC_SCALER_ENABLE_ENABLE 1
1131
1132	/* M2MC :: BLIT_HEADER :: reserved0 [30:25] */
1133	#define BCHP_M2MC_BLIT_HEADER_reserved0_MASK 0x7e000000
1134	#define BCHP_M2MC_BLIT_HEADER_reserved0_SHIFT 25
1135
1136	/* M2MC :: BLIT_HEADER :: DEST_COLOR_KEY_ENABLE [24:24] */
1137	#define BCHP_M2MC_BLIT_HEADER_DEST_COLOR_KEY_ENABLE_MASK 0x01000000
1138	#define BCHP_M2MC_BLIT_HEADER_DEST_COLOR_KEY_ENABLE_SHIFT 24
1139	#define BCHP_M2MC_BLIT_HEADER_DEST_COLOR_KEY_ENABLE_DEFAULT 0x00000000
1140	#define BCHP_M2MC_BLIT_HEADER_DEST_COLOR_KEY_ENABLE_DISABLE 0
1141	#define BCHP_M2MC_BLIT_HEADER_DEST_COLOR_KEY_ENABLE_ENABLE 1
1142
1143	/* M2MC :: BLIT_HEADER :: SRC_COLOR_MATRIX_ROUNDING [23:23] */
1144	#define BCHP_M2MC_BLIT_HEADER_SRC_COLOR_MATRIX_ROUNDING_MASK 0x00800000
1145	#define BCHP_M2MC_BLIT_HEADER_SRC_COLOR_MATRIX_ROUNDING_SHIFT 23
1146	#define BCHP_M2MC_BLIT_HEADER_SRC_COLOR_MATRIX_ROUNDING_DEFAULT 0x00000000
1147	#define BCHP_M2MC_BLIT_HEADER_SRC_COLOR_MATRIX_ROUNDING_TRUNCATE 0
1148	#define BCHP_M2MC_BLIT_HEADER_SRC_COLOR_MATRIX_ROUNDING_NEAREST 1
1149
1150	/* M2MC :: BLIT_HEADER :: SRC_COLOR_MATRIX_ENABLE [22:22] */
1151	#define BCHP_M2MC_BLIT_HEADER_SRC_COLOR_MATRIX_ENABLE_MASK 0x00400000
1152	#define BCHP_M2MC_BLIT_HEADER_SRC_COLOR_MATRIX_ENABLE_SHIFT 22
1153	#define BCHP_M2MC_BLIT_HEADER_SRC_COLOR_MATRIX_ENABLE_DEFAULT 0x00000000
1154	#define BCHP_M2MC_BLIT_HEADER_SRC_COLOR_MATRIX_ENABLE_DISABLE 0
1155	#define BCHP_M2MC_BLIT_HEADER_SRC_COLOR_MATRIX_ENABLE_ENABLE 1
1156
1157	/* M2MC :: BLIT_HEADER :: SRC_COLOR_KEY_ENABLE [21:21] */
1158	#define BCHP_M2MC_BLIT_HEADER_SRC_COLOR_KEY_ENABLE_MASK 0x00200000
1159	#define BCHP_M2MC_BLIT_HEADER_SRC_COLOR_KEY_ENABLE_SHIFT 21
1160	#define BCHP_M2MC_BLIT_HEADER_SRC_COLOR_KEY_ENABLE_DEFAULT 0x00000000
1161	#define BCHP_M2MC_BLIT_HEADER_SRC_COLOR_KEY_ENABLE_DISABLE 0
1162	#define BCHP_M2MC_BLIT_HEADER_SRC_COLOR_KEY_ENABLE_ENABLE 1
1163
1164	/* M2MC :: BLIT_HEADER :: DEST_COLOR_KEY_COMPARE [20:20] */
1165	#define BCHP_M2MC_BLIT_HEADER_DEST_COLOR_KEY_COMPARE_MASK 0x00100000
1166	#define BCHP_M2MC_BLIT_HEADER_DEST_COLOR_KEY_COMPARE_SHIFT 20
1167	#define BCHP_M2MC_BLIT_HEADER_DEST_COLOR_KEY_COMPARE_DEFAULT 0x00000000
1168	#define BCHP_M2MC_BLIT_HEADER_DEST_COLOR_KEY_COMPARE_INCLUSIVE 0
1169	#define BCHP_M2MC_BLIT_HEADER_DEST_COLOR_KEY_COMPARE_EXCUSIVE 1
1170
1171	/* M2MC :: BLIT_HEADER :: SRC_COLOR_KEY_COMPARE [19:19] */
1172	#define BCHP_M2MC_BLIT_HEADER_SRC_COLOR_KEY_COMPARE_MASK 0x00080000
1173	#define BCHP_M2MC_BLIT_HEADER_SRC_COLOR_KEY_COMPARE_SHIFT 19
1174	#define BCHP_M2MC_BLIT_HEADER_SRC_COLOR_KEY_COMPARE_DEFAULT 0x00000000
1175	#define BCHP_M2MC_BLIT_HEADER_SRC_COLOR_KEY_COMPARE_INCLUSIVE 0
1176	#define BCHP_M2MC_BLIT_HEADER_SRC_COLOR_KEY_COMPARE_EXCUSIVE 1
1177
1178	/* M2MC :: BLIT_HEADER :: CBAR_SRC_COLOR [18:16] */
1179	#define BCHP_M2MC_BLIT_HEADER_CBAR_SRC_COLOR_MASK 0x00070000
1180	#define BCHP_M2MC_BLIT_HEADER_CBAR_SRC_COLOR_SHIFT 16
1181	#define BCHP_M2MC_BLIT_HEADER_CBAR_SRC_COLOR_DEFAULT 0x00000002
1182	#define BCHP_M2MC_BLIT_HEADER_CBAR_SRC_COLOR_SCALE_THEN_KEY_THEN_MATRIX 0
1183	#define BCHP_M2MC_BLIT_HEADER_CBAR_SRC_COLOR_SCALE_THEN_MATRIX_THEN_KEY 1
1184	#define BCHP_M2MC_BLIT_HEADER_CBAR_SRC_COLOR_KEY_THEN_MATRIX_THEN_SCALE 2
1185	#define BCHP_M2MC_BLIT_HEADER_CBAR_SRC_COLOR_KEY_THEN_SCALE_THEN_MATRIX 3
1186	#define BCHP_M2MC_BLIT_HEADER_CBAR_SRC_COLOR_MATRIX_THEN_SCALE_THEN_KEY 4
1187	#define BCHP_M2MC_BLIT_HEADER_CBAR_SRC_COLOR_MATRIX_THEN_KEY_THEN_SCALE 5
1188	#define BCHP_M2MC_BLIT_HEADER_CBAR_SRC_COLOR_BYPASS_ALL 6
1189
1190	/* M2MC :: BLIT_HEADER :: REGISTER_DMA_EVENT_ENABLE [15:15] */
1191	#define BCHP_M2MC_BLIT_HEADER_REGISTER_DMA_EVENT_ENABLE_MASK 0x00008000
1192	#define BCHP_M2MC_BLIT_HEADER_REGISTER_DMA_EVENT_ENABLE_SHIFT 15
1193	#define BCHP_M2MC_BLIT_HEADER_REGISTER_DMA_EVENT_ENABLE_DEFAULT 0x00000000
1194
1195	/* M2MC :: BLIT_HEADER :: INTERRUPT_ENABLE [14:14] */
1196	#define BCHP_M2MC_BLIT_HEADER_INTERRUPT_ENABLE_MASK 0x00004000
1197	#define BCHP_M2MC_BLIT_HEADER_INTERRUPT_ENABLE_SHIFT 14
1198	#define BCHP_M2MC_BLIT_HEADER_INTERRUPT_ENABLE_DEFAULT 0x00000000
1199
1200	/* M2MC :: BLIT_HEADER :: reserved1 [13:01] */
1201	#define BCHP_M2MC_BLIT_HEADER_reserved1_MASK 0x00003ffe
1202	#define BCHP_M2MC_BLIT_HEADER_reserved1_SHIFT 1
1203
1204	/* M2MC :: BLIT_HEADER :: FOLLOW_SRC_CLUT_PTR [00:00] */
1205	#define BCHP_M2MC_BLIT_HEADER_FOLLOW_SRC_CLUT_PTR_MASK 0x00000001
1206	#define BCHP_M2MC_BLIT_HEADER_FOLLOW_SRC_CLUT_PTR_SHIFT 0
1207	#define BCHP_M2MC_BLIT_HEADER_FOLLOW_SRC_CLUT_PTR_DEFAULT 0x00000000
1208	#define BCHP_M2MC_BLIT_HEADER_FOLLOW_SRC_CLUT_PTR_DISABLE 0
1209	#define BCHP_M2MC_BLIT_HEADER_FOLLOW_SRC_CLUT_PTR_ENABLE 1
1210
1211	/***************************************************************************
1212	*BLIT_SRC_TOP_LEFT_0 - Top left pixel coordinate in the Source surface 0.
1213	***************************************************************************/
1214	/* M2MC :: BLIT_SRC_TOP_LEFT_0 :: reserved0 [31:29] */
1215	#define BCHP_M2MC_BLIT_SRC_TOP_LEFT_0_reserved0_MASK 0xe0000000
1216	#define BCHP_M2MC_BLIT_SRC_TOP_LEFT_0_reserved0_SHIFT 29
1217
1218	/* M2MC :: BLIT_SRC_TOP_LEFT_0 :: TOP [28:16] */
1219	#define BCHP_M2MC_BLIT_SRC_TOP_LEFT_0_TOP_MASK 0x1fff0000
1220	#define BCHP_M2MC_BLIT_SRC_TOP_LEFT_0_TOP_SHIFT 16
1221	#define BCHP_M2MC_BLIT_SRC_TOP_LEFT_0_TOP_DEFAULT 0x00000000
1222
1223	/* M2MC :: BLIT_SRC_TOP_LEFT_0 :: reserved1 [15:13] */
1224	#define BCHP_M2MC_BLIT_SRC_TOP_LEFT_0_reserved1_MASK 0x0000e000
1225	#define BCHP_M2MC_BLIT_SRC_TOP_LEFT_0_reserved1_SHIFT 13
1226
1227	/* M2MC :: BLIT_SRC_TOP_LEFT_0 :: LEFT [12:00] */
1228	#define BCHP_M2MC_BLIT_SRC_TOP_LEFT_0_LEFT_MASK 0x00001fff
1229	#define BCHP_M2MC_BLIT_SRC_TOP_LEFT_0_LEFT_SHIFT 0
1230	#define BCHP_M2MC_BLIT_SRC_TOP_LEFT_0_LEFT_DEFAULT 0x00000000
1231
1232	/***************************************************************************
1233	*BLIT_SRC_SIZE_0 - Pixel width and height of operation in Source surface 0.
1234	***************************************************************************/
1235	/* M2MC :: BLIT_SRC_SIZE_0 :: reserved0 [31:29] */
1236	#define BCHP_M2MC_BLIT_SRC_SIZE_0_reserved0_MASK 0xe0000000
1237	#define BCHP_M2MC_BLIT_SRC_SIZE_0_reserved0_SHIFT 29
1238
1239	/* M2MC :: BLIT_SRC_SIZE_0 :: SURFACE_WIDTH [28:16] */
1240	#define BCHP_M2MC_BLIT_SRC_SIZE_0_SURFACE_WIDTH_MASK 0x1fff0000
1241	#define BCHP_M2MC_BLIT_SRC_SIZE_0_SURFACE_WIDTH_SHIFT 16
1242	#define BCHP_M2MC_BLIT_SRC_SIZE_0_SURFACE_WIDTH_DEFAULT 0x00000001
1243
1244	/* M2MC :: BLIT_SRC_SIZE_0 :: reserved1 [15:13] */
1245	#define BCHP_M2MC_BLIT_SRC_SIZE_0_reserved1_MASK 0x0000e000
1246	#define BCHP_M2MC_BLIT_SRC_SIZE_0_reserved1_SHIFT 13
1247
1248	/* M2MC :: BLIT_SRC_SIZE_0 :: SURFACE_HEIGHT [12:00] */
1249	#define BCHP_M2MC_BLIT_SRC_SIZE_0_SURFACE_HEIGHT_MASK 0x00001fff
1250	#define BCHP_M2MC_BLIT_SRC_SIZE_0_SURFACE_HEIGHT_SHIFT 0
1251	#define BCHP_M2MC_BLIT_SRC_SIZE_0_SURFACE_HEIGHT_DEFAULT 0x00000001
1252
1253	/***************************************************************************
1254	*BLIT_SRC_TOP_LEFT_1 - Top left pixel coordinate in the Source surface 1.
1255	***************************************************************************/
1256	/* M2MC :: BLIT_SRC_TOP_LEFT_1 :: reserved0 [31:29] */
1257	#define BCHP_M2MC_BLIT_SRC_TOP_LEFT_1_reserved0_MASK 0xe0000000
1258	#define BCHP_M2MC_BLIT_SRC_TOP_LEFT_1_reserved0_SHIFT 29
1259
1260	/* M2MC :: BLIT_SRC_TOP_LEFT_1 :: TOP [28:16] */
1261	#define BCHP_M2MC_BLIT_SRC_TOP_LEFT_1_TOP_MASK 0x1fff0000
1262	#define BCHP_M2MC_BLIT_SRC_TOP_LEFT_1_TOP_SHIFT 16
1263	#define BCHP_M2MC_BLIT_SRC_TOP_LEFT_1_TOP_DEFAULT 0x00000000
1264
1265	/* M2MC :: BLIT_SRC_TOP_LEFT_1 :: reserved1 [15:13] */
1266	#define BCHP_M2MC_BLIT_SRC_TOP_LEFT_1_reserved1_MASK 0x0000e000
1267	#define BCHP_M2MC_BLIT_SRC_TOP_LEFT_1_reserved1_SHIFT 13
1268
1269	/* M2MC :: BLIT_SRC_TOP_LEFT_1 :: LEFT [12:00] */
1270	#define BCHP_M2MC_BLIT_SRC_TOP_LEFT_1_LEFT_MASK 0x00001fff
1271	#define BCHP_M2MC_BLIT_SRC_TOP_LEFT_1_LEFT_SHIFT 0
1272	#define BCHP_M2MC_BLIT_SRC_TOP_LEFT_1_LEFT_DEFAULT 0x00000000
1273
1274	/***************************************************************************
1275	*BLIT_SRC_SIZE_1 - Pixel width and height of operation in Source surface 1.
1276	***************************************************************************/
1277	/* M2MC :: BLIT_SRC_SIZE_1 :: reserved0 [31:29] */
1278	#define BCHP_M2MC_BLIT_SRC_SIZE_1_reserved0_MASK 0xe0000000
1279	#define BCHP_M2MC_BLIT_SRC_SIZE_1_reserved0_SHIFT 29
1280
1281	/* M2MC :: BLIT_SRC_SIZE_1 :: SURFACE_WIDTH [28:16] */
1282	#define BCHP_M2MC_BLIT_SRC_SIZE_1_SURFACE_WIDTH_MASK 0x1fff0000
1283	#define BCHP_M2MC_BLIT_SRC_SIZE_1_SURFACE_WIDTH_SHIFT 16
1284	#define BCHP_M2MC_BLIT_SRC_SIZE_1_SURFACE_WIDTH_DEFAULT 0x00000001
1285
1286	/* M2MC :: BLIT_SRC_SIZE_1 :: reserved1 [15:13] */
1287	#define BCHP_M2MC_BLIT_SRC_SIZE_1_reserved1_MASK 0x0000e000
1288	#define BCHP_M2MC_BLIT_SRC_SIZE_1_reserved1_SHIFT 13
1289
1290	/* M2MC :: BLIT_SRC_SIZE_1 :: SURFACE_HEIGHT [12:00] */
1291	#define BCHP_M2MC_BLIT_SRC_SIZE_1_SURFACE_HEIGHT_MASK 0x00001fff
1292	#define BCHP_M2MC_BLIT_SRC_SIZE_1_SURFACE_HEIGHT_SHIFT 0
1293	#define BCHP_M2MC_BLIT_SRC_SIZE_1_SURFACE_HEIGHT_DEFAULT 0x00000001
1294
1295	/***************************************************************************
1296	*BLIT_SRC_STRIPE_HEIGHT_WIDTH_0 - width and height of stripe for surface 0 for the decoded frame image format.
1297	***************************************************************************/
1298	/* M2MC :: BLIT_SRC_STRIPE_HEIGHT_WIDTH_0 :: reserved0 [31:30] */
1299	#define BCHP_M2MC_BLIT_SRC_STRIPE_HEIGHT_WIDTH_0_reserved0_MASK 0xc0000000
1300	#define BCHP_M2MC_BLIT_SRC_STRIPE_HEIGHT_WIDTH_0_reserved0_SHIFT 30
1301
1302	/* M2MC :: BLIT_SRC_STRIPE_HEIGHT_WIDTH_0 :: STRIPE_HEIGHT [29:16] */
1303	#define BCHP_M2MC_BLIT_SRC_STRIPE_HEIGHT_WIDTH_0_STRIPE_HEIGHT_MASK 0x3fff0000
1304	#define BCHP_M2MC_BLIT_SRC_STRIPE_HEIGHT_WIDTH_0_STRIPE_HEIGHT_SHIFT 16
1305	#define BCHP_M2MC_BLIT_SRC_STRIPE_HEIGHT_WIDTH_0_STRIPE_HEIGHT_DEFAULT 0x00000040
1306
1307	/* M2MC :: BLIT_SRC_STRIPE_HEIGHT_WIDTH_0 :: reserved1 [15:01] */
1308	#define BCHP_M2MC_BLIT_SRC_STRIPE_HEIGHT_WIDTH_0_reserved1_MASK 0x0000fffe
1309	#define BCHP_M2MC_BLIT_SRC_STRIPE_HEIGHT_WIDTH_0_reserved1_SHIFT 1
1310
1311	/* M2MC :: BLIT_SRC_STRIPE_HEIGHT_WIDTH_0 :: STRIPE_WIDTH [00:00] */
1312	#define BCHP_M2MC_BLIT_SRC_STRIPE_HEIGHT_WIDTH_0_STRIPE_WIDTH_MASK 0x00000001
1313	#define BCHP_M2MC_BLIT_SRC_STRIPE_HEIGHT_WIDTH_0_STRIPE_WIDTH_SHIFT 0
1314	#define BCHP_M2MC_BLIT_SRC_STRIPE_HEIGHT_WIDTH_0_STRIPE_WIDTH_DEFAULT 0x00000000
1315
1316	/***************************************************************************
1317	*BLIT_SRC_STRIPE_HEIGHT_WIDTH_1 - width and height of stripe for surface 1 for the decoded frame image format.
1318	***************************************************************************/
1319	/* M2MC :: BLIT_SRC_STRIPE_HEIGHT_WIDTH_1 :: reserved0 [31:30] */
1320	#define BCHP_M2MC_BLIT_SRC_STRIPE_HEIGHT_WIDTH_1_reserved0_MASK 0xc0000000
1321	#define BCHP_M2MC_BLIT_SRC_STRIPE_HEIGHT_WIDTH_1_reserved0_SHIFT 30
1322
1323	/* M2MC :: BLIT_SRC_STRIPE_HEIGHT_WIDTH_1 :: STRIPE_HEIGHT [29:16] */
1324	#define BCHP_M2MC_BLIT_SRC_STRIPE_HEIGHT_WIDTH_1_STRIPE_HEIGHT_MASK 0x3fff0000
1325	#define BCHP_M2MC_BLIT_SRC_STRIPE_HEIGHT_WIDTH_1_STRIPE_HEIGHT_SHIFT 16
1326	#define BCHP_M2MC_BLIT_SRC_STRIPE_HEIGHT_WIDTH_1_STRIPE_HEIGHT_DEFAULT 0x00000040
1327
1328	/* M2MC :: BLIT_SRC_STRIPE_HEIGHT_WIDTH_1 :: reserved1 [15:01] */
1329	#define BCHP_M2MC_BLIT_SRC_STRIPE_HEIGHT_WIDTH_1_reserved1_MASK 0x0000fffe
1330	#define BCHP_M2MC_BLIT_SRC_STRIPE_HEIGHT_WIDTH_1_reserved1_SHIFT 1
1331
1332	/* M2MC :: BLIT_SRC_STRIPE_HEIGHT_WIDTH_1 :: STRIPE_WIDTH [00:00] */
1333	#define BCHP_M2MC_BLIT_SRC_STRIPE_HEIGHT_WIDTH_1_STRIPE_WIDTH_MASK 0x00000001
1334	#define BCHP_M2MC_BLIT_SRC_STRIPE_HEIGHT_WIDTH_1_STRIPE_WIDTH_SHIFT 0
1335	#define BCHP_M2MC_BLIT_SRC_STRIPE_HEIGHT_WIDTH_1_STRIPE_WIDTH_DEFAULT 0x00000000
1336
1337	/***************************************************************************
1338	*BLIT_DEST_TOP_LEFT - Top left pixel coordinate in the Destination
1339	***************************************************************************/
1340	/* M2MC :: BLIT_DEST_TOP_LEFT :: reserved0 [31:29] */
1341	#define BCHP_M2MC_BLIT_DEST_TOP_LEFT_reserved0_MASK 0xe0000000
1342	#define BCHP_M2MC_BLIT_DEST_TOP_LEFT_reserved0_SHIFT 29
1343
1344	/* M2MC :: BLIT_DEST_TOP_LEFT :: TOP [28:16] */
1345	#define BCHP_M2MC_BLIT_DEST_TOP_LEFT_TOP_MASK 0x1fff0000
1346	#define BCHP_M2MC_BLIT_DEST_TOP_LEFT_TOP_SHIFT 16
1347	#define BCHP_M2MC_BLIT_DEST_TOP_LEFT_TOP_DEFAULT 0x00000000
1348
1349	/* M2MC :: BLIT_DEST_TOP_LEFT :: reserved1 [15:13] */
1350	#define BCHP_M2MC_BLIT_DEST_TOP_LEFT_reserved1_MASK 0x0000e000
1351	#define BCHP_M2MC_BLIT_DEST_TOP_LEFT_reserved1_SHIFT 13
1352
1353	/* M2MC :: BLIT_DEST_TOP_LEFT :: LEFT [12:00] */
1354	#define BCHP_M2MC_BLIT_DEST_TOP_LEFT_LEFT_MASK 0x00001fff
1355	#define BCHP_M2MC_BLIT_DEST_TOP_LEFT_LEFT_SHIFT 0
1356	#define BCHP_M2MC_BLIT_DEST_TOP_LEFT_LEFT_DEFAULT 0x00000000
1357
1358	/***************************************************************************
1359	*BLIT_DEST_SIZE - Pixel width and height of operation in destination
1360	***************************************************************************/
1361	/* M2MC :: BLIT_DEST_SIZE :: reserved0 [31:29] */
1362	#define BCHP_M2MC_BLIT_DEST_SIZE_reserved0_MASK 0xe0000000
1363	#define BCHP_M2MC_BLIT_DEST_SIZE_reserved0_SHIFT 29
1364
1365	/* M2MC :: BLIT_DEST_SIZE :: SURFACE_WIDTH [28:16] */
1366	#define BCHP_M2MC_BLIT_DEST_SIZE_SURFACE_WIDTH_MASK 0x1fff0000
1367	#define BCHP_M2MC_BLIT_DEST_SIZE_SURFACE_WIDTH_SHIFT 16
1368	#define BCHP_M2MC_BLIT_DEST_SIZE_SURFACE_WIDTH_DEFAULT 0x00000001
1369
1370	/* M2MC :: BLIT_DEST_SIZE :: reserved1 [15:13] */
1371	#define BCHP_M2MC_BLIT_DEST_SIZE_reserved1_MASK 0x0000e000
1372	#define BCHP_M2MC_BLIT_DEST_SIZE_reserved1_SHIFT 13
1373
1374	/* M2MC :: BLIT_DEST_SIZE :: SURFACE_HEIGHT [12:00] */
1375	#define BCHP_M2MC_BLIT_DEST_SIZE_SURFACE_HEIGHT_MASK 0x00001fff
1376	#define BCHP_M2MC_BLIT_DEST_SIZE_SURFACE_HEIGHT_SHIFT 0
1377	#define BCHP_M2MC_BLIT_DEST_SIZE_SURFACE_HEIGHT_DEFAULT 0x00000001
1378
1379	/***************************************************************************
1380	*BLIT_OUTPUT_TOP_LEFT - Top left pixel coordinate in the Output
1381	***************************************************************************/
1382	/* M2MC :: BLIT_OUTPUT_TOP_LEFT :: reserved0 [31:29] */
1383	#define BCHP_M2MC_BLIT_OUTPUT_TOP_LEFT_reserved0_MASK 0xe0000000
1384	#define BCHP_M2MC_BLIT_OUTPUT_TOP_LEFT_reserved0_SHIFT 29
1385
1386	/* M2MC :: BLIT_OUTPUT_TOP_LEFT :: TOP [28:16] */
1387	#define BCHP_M2MC_BLIT_OUTPUT_TOP_LEFT_TOP_MASK 0x1fff0000
1388	#define BCHP_M2MC_BLIT_OUTPUT_TOP_LEFT_TOP_SHIFT 16
1389	#define BCHP_M2MC_BLIT_OUTPUT_TOP_LEFT_TOP_DEFAULT 0x00000000
1390
1391	/* M2MC :: BLIT_OUTPUT_TOP_LEFT :: reserved1 [15:13] */
1392	#define BCHP_M2MC_BLIT_OUTPUT_TOP_LEFT_reserved1_MASK 0x0000e000
1393	#define BCHP_M2MC_BLIT_OUTPUT_TOP_LEFT_reserved1_SHIFT 13
1394
1395	/* M2MC :: BLIT_OUTPUT_TOP_LEFT :: LEFT [12:00] */
1396	#define BCHP_M2MC_BLIT_OUTPUT_TOP_LEFT_LEFT_MASK 0x00001fff
1397	#define BCHP_M2MC_BLIT_OUTPUT_TOP_LEFT_LEFT_SHIFT 0
1398	#define BCHP_M2MC_BLIT_OUTPUT_TOP_LEFT_LEFT_DEFAULT 0x00000000
1399
1400	/***************************************************************************
1401	*BLIT_OUTPUT_SIZE - Pixel width and height of operation in the Output
1402	***************************************************************************/
1403	/* M2MC :: BLIT_OUTPUT_SIZE :: reserved0 [31:29] */
1404	#define BCHP_M2MC_BLIT_OUTPUT_SIZE_reserved0_MASK 0xe0000000
1405	#define BCHP_M2MC_BLIT_OUTPUT_SIZE_reserved0_SHIFT 29
1406
1407	/* M2MC :: BLIT_OUTPUT_SIZE :: SURFACE_WIDTH [28:16] */
1408	#define BCHP_M2MC_BLIT_OUTPUT_SIZE_SURFACE_WIDTH_MASK 0x1fff0000
1409	#define BCHP_M2MC_BLIT_OUTPUT_SIZE_SURFACE_WIDTH_SHIFT 16
1410	#define BCHP_M2MC_BLIT_OUTPUT_SIZE_SURFACE_WIDTH_DEFAULT 0x00000001
1411
1412	/* M2MC :: BLIT_OUTPUT_SIZE :: reserved1 [15:13] */
1413	#define BCHP_M2MC_BLIT_OUTPUT_SIZE_reserved1_MASK 0x0000e000
1414	#define BCHP_M2MC_BLIT_OUTPUT_SIZE_reserved1_SHIFT 13
1415
1416	/* M2MC :: BLIT_OUTPUT_SIZE :: SURFACE_HEIGHT [12:00] */
1417	#define BCHP_M2MC_BLIT_OUTPUT_SIZE_SURFACE_HEIGHT_MASK 0x00001fff
1418	#define BCHP_M2MC_BLIT_OUTPUT_SIZE_SURFACE_HEIGHT_SHIFT 0
1419	#define BCHP_M2MC_BLIT_OUTPUT_SIZE_SURFACE_HEIGHT_DEFAULT 0x00000001
1420
1421	/***************************************************************************
1422	*BLIT_INPUT_STRIPE_WIDTH_0 - Pixel width of input stripe when striping for surface 0
1423	***************************************************************************/
1424	/* M2MC :: BLIT_INPUT_STRIPE_WIDTH_0 :: reserved0 [31:28] */
1425	#define BCHP_M2MC_BLIT_INPUT_STRIPE_WIDTH_0_reserved0_MASK 0xf0000000
1426	#define BCHP_M2MC_BLIT_INPUT_STRIPE_WIDTH_0_reserved0_SHIFT 28
1427
1428	/* M2MC :: BLIT_INPUT_STRIPE_WIDTH_0 :: STRIPE_WIDTH [27:00] */
1429	#define BCHP_M2MC_BLIT_INPUT_STRIPE_WIDTH_0_STRIPE_WIDTH_MASK 0x0fffffff
1430	#define BCHP_M2MC_BLIT_INPUT_STRIPE_WIDTH_0_STRIPE_WIDTH_SHIFT 0
1431
1432	/***************************************************************************
1433	*BLIT_INPUT_STRIPE_WIDTH_1 - Pixel width of input stripe when striping for surface 1
1434	***************************************************************************/
1435	/* M2MC :: BLIT_INPUT_STRIPE_WIDTH_1 :: reserved0 [31:28] */
1436	#define BCHP_M2MC_BLIT_INPUT_STRIPE_WIDTH_1_reserved0_MASK 0xf0000000
1437	#define BCHP_M2MC_BLIT_INPUT_STRIPE_WIDTH_1_reserved0_SHIFT 28
1438
1439	/* M2MC :: BLIT_INPUT_STRIPE_WIDTH_1 :: STRIPE_WIDTH [27:00] */
1440	#define BCHP_M2MC_BLIT_INPUT_STRIPE_WIDTH_1_STRIPE_WIDTH_MASK 0x0fffffff
1441	#define BCHP_M2MC_BLIT_INPUT_STRIPE_WIDTH_1_STRIPE_WIDTH_SHIFT 0
1442
1443	/***************************************************************************
1444	*BLIT_OUTPUT_STRIPE_WIDTH - Pixel width of output stripe when striping
1445	***************************************************************************/
1446	/* M2MC :: BLIT_OUTPUT_STRIPE_WIDTH :: reserved0 [31:12] */
1447	#define BCHP_M2MC_BLIT_OUTPUT_STRIPE_WIDTH_reserved0_MASK 0xfffff000
1448	#define BCHP_M2MC_BLIT_OUTPUT_STRIPE_WIDTH_reserved0_SHIFT 12
1449
1450	/* M2MC :: BLIT_OUTPUT_STRIPE_WIDTH :: STRIPE_WIDTH [11:00] */
1451	#define BCHP_M2MC_BLIT_OUTPUT_STRIPE_WIDTH_STRIPE_WIDTH_MASK 0x00000fff
1452	#define BCHP_M2MC_BLIT_OUTPUT_STRIPE_WIDTH_STRIPE_WIDTH_SHIFT 0
1453	#define BCHP_M2MC_BLIT_OUTPUT_STRIPE_WIDTH_STRIPE_WIDTH_DEFAULT 0x00000040
1454
1455	/***************************************************************************
1456	*BLIT_STRIPE_OVERLAP_0 - Pixel width of stripe overlap when striping for surface 0.
1457	***************************************************************************/
1458	/* M2MC :: BLIT_STRIPE_OVERLAP_0 :: reserved0 [31:12] */
1459	#define BCHP_M2MC_BLIT_STRIPE_OVERLAP_0_reserved0_MASK 0xfffff000
1460	#define BCHP_M2MC_BLIT_STRIPE_OVERLAP_0_reserved0_SHIFT 12
1461
1462	/* M2MC :: BLIT_STRIPE_OVERLAP_0 :: STRIPE_WIDTH [11:00] */
1463	#define BCHP_M2MC_BLIT_STRIPE_OVERLAP_0_STRIPE_WIDTH_MASK 0x00000fff
1464	#define BCHP_M2MC_BLIT_STRIPE_OVERLAP_0_STRIPE_WIDTH_SHIFT 0
1465	#define BCHP_M2MC_BLIT_STRIPE_OVERLAP_0_STRIPE_WIDTH_DEFAULT 0x00000040
1466
1467	/***************************************************************************
1468	*BLIT_STRIPE_OVERLAP_1 - Pixel width of stripe overlap when striping for surface 1.
1469	***************************************************************************/
1470	/* M2MC :: BLIT_STRIPE_OVERLAP_1 :: reserved0 [31:12] */
1471	#define BCHP_M2MC_BLIT_STRIPE_OVERLAP_1_reserved0_MASK 0xfffff000
1472	#define BCHP_M2MC_BLIT_STRIPE_OVERLAP_1_reserved0_SHIFT 12
1473
1474	/* M2MC :: BLIT_STRIPE_OVERLAP_1 :: STRIPE_WIDTH [11:00] */
1475	#define BCHP_M2MC_BLIT_STRIPE_OVERLAP_1_STRIPE_WIDTH_MASK 0x00000fff
1476	#define BCHP_M2MC_BLIT_STRIPE_OVERLAP_1_STRIPE_WIDTH_SHIFT 0
1477	#define BCHP_M2MC_BLIT_STRIPE_OVERLAP_1_STRIPE_WIDTH_DEFAULT 0x00000040
1478
1479	/***************************************************************************
1480	*BLIT_CTRL - Blit control
1481	***************************************************************************/
1482	/* M2MC :: BLIT_CTRL :: reserved0 [31:17] */
1483	#define BCHP_M2MC_BLIT_CTRL_reserved0_MASK 0xfffe0000
1484	#define BCHP_M2MC_BLIT_CTRL_reserved0_SHIFT 17
1485
1486	/* M2MC :: BLIT_CTRL :: STRIPE_ENABLE [16:16] */
1487	#define BCHP_M2MC_BLIT_CTRL_STRIPE_ENABLE_MASK 0x00010000
1488	#define BCHP_M2MC_BLIT_CTRL_STRIPE_ENABLE_SHIFT 16
1489	#define BCHP_M2MC_BLIT_CTRL_STRIPE_ENABLE_DEFAULT 0x00000000
1490	#define BCHP_M2MC_BLIT_CTRL_STRIPE_ENABLE_DISABLE 0
1491	#define BCHP_M2MC_BLIT_CTRL_STRIPE_ENABLE_ENABLE 1
1492
1493	/* M2MC :: BLIT_CTRL :: reserved1 [15:06] */
1494	#define BCHP_M2MC_BLIT_CTRL_reserved1_MASK 0x0000ffc0
1495	#define BCHP_M2MC_BLIT_CTRL_reserved1_SHIFT 6
1496
1497	/* M2MC :: BLIT_CTRL :: OUTPUT_V_DIRECTION [05:05] */
1498	#define BCHP_M2MC_BLIT_CTRL_OUTPUT_V_DIRECTION_MASK 0x00000020
1499	#define BCHP_M2MC_BLIT_CTRL_OUTPUT_V_DIRECTION_SHIFT 5
1500	#define BCHP_M2MC_BLIT_CTRL_OUTPUT_V_DIRECTION_DEFAULT 0x00000000
1501	#define BCHP_M2MC_BLIT_CTRL_OUTPUT_V_DIRECTION_BOTTOM_TO_TOP 1
1502	#define BCHP_M2MC_BLIT_CTRL_OUTPUT_V_DIRECTION_TOP_TO_BOTTOM 0
1503
1504	/* M2MC :: BLIT_CTRL :: OUTPUT_H_DIRECTION [04:04] */
1505	#define BCHP_M2MC_BLIT_CTRL_OUTPUT_H_DIRECTION_MASK 0x00000010
1506	#define BCHP_M2MC_BLIT_CTRL_OUTPUT_H_DIRECTION_SHIFT 4
1507	#define BCHP_M2MC_BLIT_CTRL_OUTPUT_H_DIRECTION_DEFAULT 0x00000000
1508	#define BCHP_M2MC_BLIT_CTRL_OUTPUT_H_DIRECTION_RIGHT_TO_LEFT 1
1509	#define BCHP_M2MC_BLIT_CTRL_OUTPUT_H_DIRECTION_LEFT_TO_RIGHT 0
1510
1511	/* M2MC :: BLIT_CTRL :: DEST_V_DIRECTION [03:03] */
1512	#define BCHP_M2MC_BLIT_CTRL_DEST_V_DIRECTION_MASK 0x00000008
1513	#define BCHP_M2MC_BLIT_CTRL_DEST_V_DIRECTION_SHIFT 3
1514	#define BCHP_M2MC_BLIT_CTRL_DEST_V_DIRECTION_DEFAULT 0x00000000
1515	#define BCHP_M2MC_BLIT_CTRL_DEST_V_DIRECTION_BOTTOM_TO_TOP 1
1516	#define BCHP_M2MC_BLIT_CTRL_DEST_V_DIRECTION_TOP_TO_BOTTOM 0
1517
1518	/* M2MC :: BLIT_CTRL :: DEST_H_DIRECTION [02:02] */
1519	#define BCHP_M2MC_BLIT_CTRL_DEST_H_DIRECTION_MASK 0x00000004
1520	#define BCHP_M2MC_BLIT_CTRL_DEST_H_DIRECTION_SHIFT 2
1521	#define BCHP_M2MC_BLIT_CTRL_DEST_H_DIRECTION_DEFAULT 0x00000000
1522	#define BCHP_M2MC_BLIT_CTRL_DEST_H_DIRECTION_RIGHT_TO_LEFT 1
1523	#define BCHP_M2MC_BLIT_CTRL_DEST_H_DIRECTION_LEFT_TO_RIGHT 0
1524
1525	/* M2MC :: BLIT_CTRL :: SRC_V_DIRECTION [01:01] */
1526	#define BCHP_M2MC_BLIT_CTRL_SRC_V_DIRECTION_MASK 0x00000002
1527	#define BCHP_M2MC_BLIT_CTRL_SRC_V_DIRECTION_SHIFT 1
1528	#define BCHP_M2MC_BLIT_CTRL_SRC_V_DIRECTION_DEFAULT 0x00000000
1529	#define BCHP_M2MC_BLIT_CTRL_SRC_V_DIRECTION_BOTTOM_TO_TOP 1
1530	#define BCHP_M2MC_BLIT_CTRL_SRC_V_DIRECTION_TOP_TO_BOTTOM 0
1531
1532	/* M2MC :: BLIT_CTRL :: SRC_H_DIRECTION [00:00] */
1533	#define BCHP_M2MC_BLIT_CTRL_SRC_H_DIRECTION_MASK 0x00000001
1534	#define BCHP_M2MC_BLIT_CTRL_SRC_H_DIRECTION_SHIFT 0
1535	#define BCHP_M2MC_BLIT_CTRL_SRC_H_DIRECTION_DEFAULT 0x00000000
1536	#define BCHP_M2MC_BLIT_CTRL_SRC_H_DIRECTION_RIGHT_TO_LEFT 1
1537	#define BCHP_M2MC_BLIT_CTRL_SRC_H_DIRECTION_LEFT_TO_RIGHT 0
1538
1539	/***************************************************************************
1540	*SCALER_CTRL - Scaler control
1541	***************************************************************************/
1542	/* M2MC :: SCALER_CTRL :: reserved0 [31:29] */
1543	#define BCHP_M2MC_SCALER_CTRL_reserved0_MASK 0xe0000000
1544	#define BCHP_M2MC_SCALER_CTRL_reserved0_SHIFT 29
1545
1546	/* M2MC :: SCALER_CTRL :: ALPHA_PRE_MULTIPLY_ENABLE [28:28] */
1547	#define BCHP_M2MC_SCALER_CTRL_ALPHA_PRE_MULTIPLY_ENABLE_MASK 0x10000000
1548	#define BCHP_M2MC_SCALER_CTRL_ALPHA_PRE_MULTIPLY_ENABLE_SHIFT 28
1549	#define BCHP_M2MC_SCALER_CTRL_ALPHA_PRE_MULTIPLY_ENABLE_DEFAULT 0x00000000
1550	#define BCHP_M2MC_SCALER_CTRL_ALPHA_PRE_MULTIPLY_ENABLE_DISABLE 0
1551	#define BCHP_M2MC_SCALER_CTRL_ALPHA_PRE_MULTIPLY_ENABLE_ENABLE 1
1552
1553	/* M2MC :: SCALER_CTRL :: ALPHA_PRE_MULTIPLY_OFFSET_EN [27:27] */
1554	#define BCHP_M2MC_SCALER_CTRL_ALPHA_PRE_MULTIPLY_OFFSET_EN_MASK 0x08000000
1555	#define BCHP_M2MC_SCALER_CTRL_ALPHA_PRE_MULTIPLY_OFFSET_EN_SHIFT 27
1556	#define BCHP_M2MC_SCALER_CTRL_ALPHA_PRE_MULTIPLY_OFFSET_EN_DEFAULT 0x00000000
1557	#define BCHP_M2MC_SCALER_CTRL_ALPHA_PRE_MULTIPLY_OFFSET_EN_DISABLE 0
1558	#define BCHP_M2MC_SCALER_CTRL_ALPHA_PRE_MULTIPLY_OFFSET_EN_ENABLE 1
1559
1560	/* M2MC :: SCALER_CTRL :: CLUT_SCALE_MODE [26:26] */
1561	#define BCHP_M2MC_SCALER_CTRL_CLUT_SCALE_MODE_MASK 0x04000000
1562	#define BCHP_M2MC_SCALER_CTRL_CLUT_SCALE_MODE_SHIFT 26
1563	#define BCHP_M2MC_SCALER_CTRL_CLUT_SCALE_MODE_DEFAULT 0x00000000
1564	#define BCHP_M2MC_SCALER_CTRL_CLUT_SCALE_MODE_DISABLE 0
1565	#define BCHP_M2MC_SCALER_CTRL_CLUT_SCALE_MODE_ENABLE 1
1566
1567	/* M2MC :: SCALER_CTRL :: ALPHA_PRE_MULTIPLY [25:25] */
1568	#define BCHP_M2MC_SCALER_CTRL_ALPHA_PRE_MULTIPLY_MASK 0x02000000
1569	#define BCHP_M2MC_SCALER_CTRL_ALPHA_PRE_MULTIPLY_SHIFT 25
1570	#define BCHP_M2MC_SCALER_CTRL_ALPHA_PRE_MULTIPLY_DEFAULT 0x00000000
1571	#define BCHP_M2MC_SCALER_CTRL_ALPHA_PRE_MULTIPLY_DISABLE 0
1572	#define BCHP_M2MC_SCALER_CTRL_ALPHA_PRE_MULTIPLY_ENABLE 1
1573
1574	/* M2MC :: SCALER_CTRL :: OFFSET_ADJUST [24:24] */
1575	#define BCHP_M2MC_SCALER_CTRL_OFFSET_ADJUST_MASK 0x01000000
1576	#define BCHP_M2MC_SCALER_CTRL_OFFSET_ADJUST_SHIFT 24
1577	#define BCHP_M2MC_SCALER_CTRL_OFFSET_ADJUST_DEFAULT 0x00000000
1578	#define BCHP_M2MC_SCALER_CTRL_OFFSET_ADJUST_DISABLE 0
1579	#define BCHP_M2MC_SCALER_CTRL_OFFSET_ADJUST_ENABLE 1
1580
1581	/* M2MC :: SCALER_CTRL :: reserved1 [23:17] */
1582	#define BCHP_M2MC_SCALER_CTRL_reserved1_MASK 0x00fe0000
1583	#define BCHP_M2MC_SCALER_CTRL_reserved1_SHIFT 17
1584
1585	/* M2MC :: SCALER_CTRL :: ROUNDING_MODE [16:16] */
1586	#define BCHP_M2MC_SCALER_CTRL_ROUNDING_MODE_MASK 0x00010000
1587	#define BCHP_M2MC_SCALER_CTRL_ROUNDING_MODE_SHIFT 16
1588	#define BCHP_M2MC_SCALER_CTRL_ROUNDING_MODE_DEFAULT 0x00000000
1589	#define BCHP_M2MC_SCALER_CTRL_ROUNDING_MODE_TRUNCATE 0
1590	#define BCHP_M2MC_SCALER_CTRL_ROUNDING_MODE_NEAREST 1
1591
1592	/* M2MC :: SCALER_CTRL :: reserved2 [15:05] */
1593	#define BCHP_M2MC_SCALER_CTRL_reserved2_MASK 0x0000ffe0
1594	#define BCHP_M2MC_SCALER_CTRL_reserved2_SHIFT 5
1595
1596	/* M2MC :: SCALER_CTRL :: HORIZ_SCALER_ENABLE [04:04] */
1597	#define BCHP_M2MC_SCALER_CTRL_HORIZ_SCALER_ENABLE_MASK 0x00000010
1598	#define BCHP_M2MC_SCALER_CTRL_HORIZ_SCALER_ENABLE_SHIFT 4
1599	#define BCHP_M2MC_SCALER_CTRL_HORIZ_SCALER_ENABLE_DEFAULT 0x00000000
1600	#define BCHP_M2MC_SCALER_CTRL_HORIZ_SCALER_ENABLE_DISABLE 0
1601	#define BCHP_M2MC_SCALER_CTRL_HORIZ_SCALER_ENABLE_ENABLE 1
1602
1603	/* M2MC :: SCALER_CTRL :: reserved3 [03:03] */
1604	#define BCHP_M2MC_SCALER_CTRL_reserved3_MASK 0x00000008
1605	#define BCHP_M2MC_SCALER_CTRL_reserved3_SHIFT 3
1606
1607	/* M2MC :: SCALER_CTRL :: VERT_SCALER_ENABLE [02:02] */
1608	#define BCHP_M2MC_SCALER_CTRL_VERT_SCALER_ENABLE_MASK 0x00000004
1609	#define BCHP_M2MC_SCALER_CTRL_VERT_SCALER_ENABLE_SHIFT 2
1610	#define BCHP_M2MC_SCALER_CTRL_VERT_SCALER_ENABLE_DEFAULT 0x00000000
1611	#define BCHP_M2MC_SCALER_CTRL_VERT_SCALER_ENABLE_DISABLE 0
1612	#define BCHP_M2MC_SCALER_CTRL_VERT_SCALER_ENABLE_ENABLE 1
1613
1614	/* M2MC :: SCALER_CTRL :: SCALER_ORDER [01:01] */
1615	#define BCHP_M2MC_SCALER_CTRL_SCALER_ORDER_MASK 0x00000002
1616	#define BCHP_M2MC_SCALER_CTRL_SCALER_ORDER_SHIFT 1
1617	#define BCHP_M2MC_SCALER_CTRL_SCALER_ORDER_DEFAULT 0x00000000
1618	#define BCHP_M2MC_SCALER_CTRL_SCALER_ORDER_VERT_THEN_HORIZ 0
1619	#define BCHP_M2MC_SCALER_CTRL_SCALER_ORDER_HORIZ_THEN_VERT 1
1620
1621	/* M2MC :: SCALER_CTRL :: reserved4 [00:00] */
1622	#define BCHP_M2MC_SCALER_CTRL_reserved4_MASK 0x00000001
1623	#define BCHP_M2MC_SCALER_CTRL_reserved4_SHIFT 0
1624
1625	/***************************************************************************
1626	*HORIZ_AVERAGER_COUNT - Horizontal averager control count
1627	***************************************************************************/
1628	/* M2MC :: HORIZ_AVERAGER_COUNT :: reserved0 [31:01] */
1629	#define BCHP_M2MC_HORIZ_AVERAGER_COUNT_reserved0_MASK 0xfffffffe
1630	#define BCHP_M2MC_HORIZ_AVERAGER_COUNT_reserved0_SHIFT 1
1631
1632	/* M2MC :: HORIZ_AVERAGER_COUNT :: DUMMY_COUNT [00:00] */
1633	#define BCHP_M2MC_HORIZ_AVERAGER_COUNT_DUMMY_COUNT_MASK 0x00000001
1634	#define BCHP_M2MC_HORIZ_AVERAGER_COUNT_DUMMY_COUNT_SHIFT 0
1635
1636	/***************************************************************************
1637	*HORIZ_AVERAGER_COEFF - Horizontal averager control coefficient
1638	***************************************************************************/
1639	/* M2MC :: HORIZ_AVERAGER_COEFF :: reserved0 [31:01] */
1640	#define BCHP_M2MC_HORIZ_AVERAGER_COEFF_reserved0_MASK 0xfffffffe
1641	#define BCHP_M2MC_HORIZ_AVERAGER_COEFF_reserved0_SHIFT 1
1642
1643	/* M2MC :: HORIZ_AVERAGER_COEFF :: DUMMY_COEFF [00:00] */
1644	#define BCHP_M2MC_HORIZ_AVERAGER_COEFF_DUMMY_COEFF_MASK 0x00000001
1645	#define BCHP_M2MC_HORIZ_AVERAGER_COEFF_DUMMY_COEFF_SHIFT 0
1646
1647	/***************************************************************************
1648	*VERT_AVERAGER_COUNT - Vertical averager control count
1649	***************************************************************************/
1650	/* M2MC :: VERT_AVERAGER_COUNT :: reserved0 [31:01] */
1651	#define BCHP_M2MC_VERT_AVERAGER_COUNT_reserved0_MASK 0xfffffffe
1652	#define BCHP_M2MC_VERT_AVERAGER_COUNT_reserved0_SHIFT 1
1653
1654	/* M2MC :: VERT_AVERAGER_COUNT :: DUMMY_COUNT [00:00] */
1655	#define BCHP_M2MC_VERT_AVERAGER_COUNT_DUMMY_COUNT_MASK 0x00000001
1656	#define BCHP_M2MC_VERT_AVERAGER_COUNT_DUMMY_COUNT_SHIFT 0
1657
1658	/***************************************************************************
1659	*VERT_AVERAGER_COEFF - Vertical averager control coefficient
1660	***************************************************************************/
1661	/* M2MC :: VERT_AVERAGER_COEFF :: reserved0 [31:01] */
1662	#define BCHP_M2MC_VERT_AVERAGER_COEFF_reserved0_MASK 0xfffffffe
1663	#define BCHP_M2MC_VERT_AVERAGER_COEFF_reserved0_SHIFT 1
1664
1665	/* M2MC :: VERT_AVERAGER_COEFF :: DUMMY_COEFF [00:00] */
1666	#define BCHP_M2MC_VERT_AVERAGER_COEFF_DUMMY_COEFF_MASK 0x00000001
1667	#define BCHP_M2MC_VERT_AVERAGER_COEFF_DUMMY_COEFF_SHIFT 0
1668
1669	/***************************************************************************
1670	*HORIZ_SCALER_0_INITIAL_PHASE - Horizontal scaler 0 initial phase
1671	***************************************************************************/
1672	/* M2MC :: HORIZ_SCALER_0_INITIAL_PHASE :: reserved0 [31:24] */
1673	#define BCHP_M2MC_HORIZ_SCALER_0_INITIAL_PHASE_reserved0_MASK 0xff000000
1674	#define BCHP_M2MC_HORIZ_SCALER_0_INITIAL_PHASE_reserved0_SHIFT 24
1675
1676	/* M2MC :: HORIZ_SCALER_0_INITIAL_PHASE :: PHASE [23:00] */
1677	#define BCHP_M2MC_HORIZ_SCALER_0_INITIAL_PHASE_PHASE_MASK 0x00ffffff
1678	#define BCHP_M2MC_HORIZ_SCALER_0_INITIAL_PHASE_PHASE_SHIFT 0
1679	#define BCHP_M2MC_HORIZ_SCALER_0_INITIAL_PHASE_PHASE_DEFAULT 0x00000000
1680
1681	/***************************************************************************
1682	*HORIZ_SCALER_0_STEP - Horizontal scaler 0 step
1683	***************************************************************************/
1684	/* M2MC :: HORIZ_SCALER_0_STEP :: reserved0 [31:24] */
1685	#define BCHP_M2MC_HORIZ_SCALER_0_STEP_reserved0_MASK 0xff000000
1686	#define BCHP_M2MC_HORIZ_SCALER_0_STEP_reserved0_SHIFT 24
1687
1688	/* M2MC :: HORIZ_SCALER_0_STEP :: STEP [23:00] */
1689	#define BCHP_M2MC_HORIZ_SCALER_0_STEP_STEP_MASK 0x00ffffff
1690	#define BCHP_M2MC_HORIZ_SCALER_0_STEP_STEP_SHIFT 0
1691	#define BCHP_M2MC_HORIZ_SCALER_0_STEP_STEP_DEFAULT 0x00100000
1692
1693	/***************************************************************************
1694	*HORIZ_SCALER_1_INITIAL_PHASE - Horizontal scaler 1 initial phase
1695	***************************************************************************/
1696	/* M2MC :: HORIZ_SCALER_1_INITIAL_PHASE :: reserved0 [31:24] */
1697	#define BCHP_M2MC_HORIZ_SCALER_1_INITIAL_PHASE_reserved0_MASK 0xff000000
1698	#define BCHP_M2MC_HORIZ_SCALER_1_INITIAL_PHASE_reserved0_SHIFT 24
1699
1700	/* M2MC :: HORIZ_SCALER_1_INITIAL_PHASE :: PHASE [23:00] */
1701	#define BCHP_M2MC_HORIZ_SCALER_1_INITIAL_PHASE_PHASE_MASK 0x00ffffff
1702	#define BCHP_M2MC_HORIZ_SCALER_1_INITIAL_PHASE_PHASE_SHIFT 0
1703	#define BCHP_M2MC_HORIZ_SCALER_1_INITIAL_PHASE_PHASE_DEFAULT 0x00000000
1704
1705	/***************************************************************************
1706	*HORIZ_SCALER_1_STEP - Horizontal scaler 1 step
1707	***************************************************************************/
1708	/* M2MC :: HORIZ_SCALER_1_STEP :: reserved0 [31:24] */
1709	#define BCHP_M2MC_HORIZ_SCALER_1_STEP_reserved0_MASK 0xff000000
1710	#define BCHP_M2MC_HORIZ_SCALER_1_STEP_reserved0_SHIFT 24
1711
1712	/* M2MC :: HORIZ_SCALER_1_STEP :: STEP [23:00] */
1713	#define BCHP_M2MC_HORIZ_SCALER_1_STEP_STEP_MASK 0x00ffffff
1714	#define BCHP_M2MC_HORIZ_SCALER_1_STEP_STEP_SHIFT 0
1715	#define BCHP_M2MC_HORIZ_SCALER_1_STEP_STEP_DEFAULT 0x00100000
1716
1717	/***************************************************************************
1718	*VERT_SCALER_0_INITIAL_PHASE - Vertical scaler 0 initial phase
1719	***************************************************************************/
1720	/* M2MC :: VERT_SCALER_0_INITIAL_PHASE :: reserved0 [31:24] */
1721	#define BCHP_M2MC_VERT_SCALER_0_INITIAL_PHASE_reserved0_MASK 0xff000000
1722	#define BCHP_M2MC_VERT_SCALER_0_INITIAL_PHASE_reserved0_SHIFT 24
1723
1724	/* M2MC :: VERT_SCALER_0_INITIAL_PHASE :: PHASE [23:00] */
1725	#define BCHP_M2MC_VERT_SCALER_0_INITIAL_PHASE_PHASE_MASK 0x00ffffff
1726	#define BCHP_M2MC_VERT_SCALER_0_INITIAL_PHASE_PHASE_SHIFT 0
1727	#define BCHP_M2MC_VERT_SCALER_0_INITIAL_PHASE_PHASE_DEFAULT 0x00000000
1728
1729	/***************************************************************************
1730	*VERT_SCALER_0_STEP - Vertical scaler 0 step
1731	***************************************************************************/
1732	/* M2MC :: VERT_SCALER_0_STEP :: reserved0 [31:24] */
1733	#define BCHP_M2MC_VERT_SCALER_0_STEP_reserved0_MASK 0xff000000
1734	#define BCHP_M2MC_VERT_SCALER_0_STEP_reserved0_SHIFT 24
1735
1736	/* M2MC :: VERT_SCALER_0_STEP :: STEP [23:00] */
1737	#define BCHP_M2MC_VERT_SCALER_0_STEP_STEP_MASK 0x00ffffff
1738	#define BCHP_M2MC_VERT_SCALER_0_STEP_STEP_SHIFT 0
1739	#define BCHP_M2MC_VERT_SCALER_0_STEP_STEP_DEFAULT 0x00100000
1740
1741	/***************************************************************************
1742	*VERT_SCALER_1_INITIAL_PHASE - Vertical scaler 1 initial phase
1743	***************************************************************************/
1744	/* M2MC :: VERT_SCALER_1_INITIAL_PHASE :: reserved0 [31:24] */
1745	#define BCHP_M2MC_VERT_SCALER_1_INITIAL_PHASE_reserved0_MASK 0xff000000
1746	#define BCHP_M2MC_VERT_SCALER_1_INITIAL_PHASE_reserved0_SHIFT 24
1747
1748	/* M2MC :: VERT_SCALER_1_INITIAL_PHASE :: PHASE [23:00] */
1749	#define BCHP_M2MC_VERT_SCALER_1_INITIAL_PHASE_PHASE_MASK 0x00ffffff
1750	#define BCHP_M2MC_VERT_SCALER_1_INITIAL_PHASE_PHASE_SHIFT 0
1751	#define BCHP_M2MC_VERT_SCALER_1_INITIAL_PHASE_PHASE_DEFAULT 0x00000000
1752
1753	/***************************************************************************
1754	*VERT_SCALER_1_STEP - Vertical scaler 1 step
1755	***************************************************************************/
1756	/* M2MC :: VERT_SCALER_1_STEP :: reserved0 [31:24] */
1757	#define BCHP_M2MC_VERT_SCALER_1_STEP_reserved0_MASK 0xff000000
1758	#define BCHP_M2MC_VERT_SCALER_1_STEP_reserved0_SHIFT 24
1759
1760	/* M2MC :: VERT_SCALER_1_STEP :: STEP [23:00] */
1761	#define BCHP_M2MC_VERT_SCALER_1_STEP_STEP_MASK 0x00ffffff
1762	#define BCHP_M2MC_VERT_SCALER_1_STEP_STEP_SHIFT 0
1763	#define BCHP_M2MC_VERT_SCALER_1_STEP_STEP_DEFAULT 0x00100000
1764
1765	/***************************************************************************
1766	*BLEND_COLOR_OP - Color blend operation descriptor
1767	***************************************************************************/
1768	/* M2MC :: BLEND_COLOR_OP :: reserved0 [31:27] */
1769	#define BCHP_M2MC_BLEND_COLOR_OP_reserved0_MASK 0xf8000000
1770	#define BCHP_M2MC_BLEND_COLOR_OP_reserved0_SHIFT 27
1771
1772	/* M2MC :: BLEND_COLOR_OP :: SUBTRACT_E [26:26] */
1773	#define BCHP_M2MC_BLEND_COLOR_OP_SUBTRACT_E_MASK 0x04000000
1774	#define BCHP_M2MC_BLEND_COLOR_OP_SUBTRACT_E_SHIFT 26
1775	#define BCHP_M2MC_BLEND_COLOR_OP_SUBTRACT_E_DEFAULT 0x00000000
1776
1777	/* M2MC :: BLEND_COLOR_OP :: OP_E_INV [25:25] */
1778	#define BCHP_M2MC_BLEND_COLOR_OP_OP_E_INV_MASK 0x02000000
1779	#define BCHP_M2MC_BLEND_COLOR_OP_OP_E_INV_SHIFT 25
1780	#define BCHP_M2MC_BLEND_COLOR_OP_OP_E_INV_DEFAULT 0x00000000
1781
1782	/* M2MC :: BLEND_COLOR_OP :: reserved1 [24:24] */
1783	#define BCHP_M2MC_BLEND_COLOR_OP_reserved1_MASK 0x01000000
1784	#define BCHP_M2MC_BLEND_COLOR_OP_reserved1_SHIFT 24
1785
1786	/* M2MC :: BLEND_COLOR_OP :: OP_E [23:21] */
1787	#define BCHP_M2MC_BLEND_COLOR_OP_OP_E_MASK 0x00e00000
1788	#define BCHP_M2MC_BLEND_COLOR_OP_OP_E_SHIFT 21
1789	#define BCHP_M2MC_BLEND_COLOR_OP_OP_E_DEFAULT 0x00000000
1790	#define BCHP_M2MC_BLEND_COLOR_OP_OP_E_ZERO 0
1791	#define BCHP_M2MC_BLEND_COLOR_OP_OP_E_SOURCE_COLOR 1
1792	#define BCHP_M2MC_BLEND_COLOR_OP_OP_E_DEST_COLOR 2
1793	#define BCHP_M2MC_BLEND_COLOR_OP_OP_E_CONSTANT_COLOR 3
1794	#define BCHP_M2MC_BLEND_COLOR_OP_OP_E_HALF 4
1795	#define BCHP_M2MC_BLEND_COLOR_OP_OP_E_SOURCE_ALPHA 5
1796	#define BCHP_M2MC_BLEND_COLOR_OP_OP_E_DEST_ALPHA 6
1797	#define BCHP_M2MC_BLEND_COLOR_OP_OP_E_CONSTANT_ALPHA 7
1798
1799	/* M2MC :: BLEND_COLOR_OP :: SUBTRACT_CD [20:20] */
1800	#define BCHP_M2MC_BLEND_COLOR_OP_SUBTRACT_CD_MASK 0x00100000
1801	#define BCHP_M2MC_BLEND_COLOR_OP_SUBTRACT_CD_SHIFT 20
1802	#define BCHP_M2MC_BLEND_COLOR_OP_SUBTRACT_CD_DEFAULT 0x00000000
1803
1804	/* M2MC :: BLEND_COLOR_OP :: OP_D_INV [19:19] */
1805	#define BCHP_M2MC_BLEND_COLOR_OP_OP_D_INV_MASK 0x00080000
1806	#define BCHP_M2MC_BLEND_COLOR_OP_OP_D_INV_SHIFT 19
1807	#define BCHP_M2MC_BLEND_COLOR_OP_OP_D_INV_DEFAULT 0x00000000
1808
1809	/* M2MC :: BLEND_COLOR_OP :: reserved2 [18:18] */
1810	#define BCHP_M2MC_BLEND_COLOR_OP_reserved2_MASK 0x00040000
1811	#define BCHP_M2MC_BLEND_COLOR_OP_reserved2_SHIFT 18
1812
1813	/* M2MC :: BLEND_COLOR_OP :: OP_D [17:15] */
1814	#define BCHP_M2MC_BLEND_COLOR_OP_OP_D_MASK 0x00038000
1815	#define BCHP_M2MC_BLEND_COLOR_OP_OP_D_SHIFT 15
1816	#define BCHP_M2MC_BLEND_COLOR_OP_OP_D_DEFAULT 0x00000000
1817	#define BCHP_M2MC_BLEND_COLOR_OP_OP_D_ZERO 0
1818	#define BCHP_M2MC_BLEND_COLOR_OP_OP_D_SOURCE_COLOR 1
1819	#define BCHP_M2MC_BLEND_COLOR_OP_OP_D_DEST_COLOR 2
1820	#define BCHP_M2MC_BLEND_COLOR_OP_OP_D_CONSTANT_COLOR 3
1821	#define BCHP_M2MC_BLEND_COLOR_OP_OP_D_HALF 4
1822	#define BCHP_M2MC_BLEND_COLOR_OP_OP_D_SOURCE_ALPHA 5
1823	#define BCHP_M2MC_BLEND_COLOR_OP_OP_D_DEST_ALPHA 6
1824	#define BCHP_M2MC_BLEND_COLOR_OP_OP_D_CONSTANT_ALPHA 7
1825
1826	/* M2MC :: BLEND_COLOR_OP :: OP_C_INV [14:14] */
1827	#define BCHP_M2MC_BLEND_COLOR_OP_OP_C_INV_MASK 0x00004000
1828	#define BCHP_M2MC_BLEND_COLOR_OP_OP_C_INV_SHIFT 14
1829	#define BCHP_M2MC_BLEND_COLOR_OP_OP_C_INV_DEFAULT 0x00000000
1830
1831	/* M2MC :: BLEND_COLOR_OP :: reserved3 [13:13] */
1832	#define BCHP_M2MC_BLEND_COLOR_OP_reserved3_MASK 0x00002000
1833	#define BCHP_M2MC_BLEND_COLOR_OP_reserved3_SHIFT 13
1834
1835	/* M2MC :: BLEND_COLOR_OP :: OP_C [12:10] */
1836	#define BCHP_M2MC_BLEND_COLOR_OP_OP_C_MASK 0x00001c00
1837	#define BCHP_M2MC_BLEND_COLOR_OP_OP_C_SHIFT 10
1838	#define BCHP_M2MC_BLEND_COLOR_OP_OP_C_DEFAULT 0x00000000
1839	#define BCHP_M2MC_BLEND_COLOR_OP_OP_C_ZERO 0
1840	#define BCHP_M2MC_BLEND_COLOR_OP_OP_C_SOURCE_COLOR 1
1841	#define BCHP_M2MC_BLEND_COLOR_OP_OP_C_DEST_COLOR 2
1842	#define BCHP_M2MC_BLEND_COLOR_OP_OP_C_CONSTANT_COLOR 3
1843	#define BCHP_M2MC_BLEND_COLOR_OP_OP_C_HALF 4
1844	#define BCHP_M2MC_BLEND_COLOR_OP_OP_C_SOURCE_ALPHA 5
1845	#define BCHP_M2MC_BLEND_COLOR_OP_OP_C_DEST_ALPHA 6
1846	#define BCHP_M2MC_BLEND_COLOR_OP_OP_C_CONSTANT_ALPHA 7
1847
1848	/* M2MC :: BLEND_COLOR_OP :: OP_B_INV [09:09] */
1849	#define BCHP_M2MC_BLEND_COLOR_OP_OP_B_INV_MASK 0x00000200
1850	#define BCHP_M2MC_BLEND_COLOR_OP_OP_B_INV_SHIFT 9
1851	#define BCHP_M2MC_BLEND_COLOR_OP_OP_B_INV_DEFAULT 0x00000000
1852
1853	/* M2MC :: BLEND_COLOR_OP :: reserved4 [08:08] */
1854	#define BCHP_M2MC_BLEND_COLOR_OP_reserved4_MASK 0x00000100
1855	#define BCHP_M2MC_BLEND_COLOR_OP_reserved4_SHIFT 8
1856
1857	/* M2MC :: BLEND_COLOR_OP :: OP_B [07:05] */
1858	#define BCHP_M2MC_BLEND_COLOR_OP_OP_B_MASK 0x000000e0
1859	#define BCHP_M2MC_BLEND_COLOR_OP_OP_B_SHIFT 5
1860	#define BCHP_M2MC_BLEND_COLOR_OP_OP_B_DEFAULT 0x00000000
1861	#define BCHP_M2MC_BLEND_COLOR_OP_OP_B_ZERO 0
1862	#define BCHP_M2MC_BLEND_COLOR_OP_OP_B_SOURCE_COLOR 1
1863	#define BCHP_M2MC_BLEND_COLOR_OP_OP_B_DEST_COLOR 2
1864	#define BCHP_M2MC_BLEND_COLOR_OP_OP_B_CONSTANT_COLOR 3
1865	#define BCHP_M2MC_BLEND_COLOR_OP_OP_B_HALF 4
1866	#define BCHP_M2MC_BLEND_COLOR_OP_OP_B_SOURCE_ALPHA 5
1867	#define BCHP_M2MC_BLEND_COLOR_OP_OP_B_DEST_ALPHA 6
1868	#define BCHP_M2MC_BLEND_COLOR_OP_OP_B_CONSTANT_ALPHA 7
1869
1870	/* M2MC :: BLEND_COLOR_OP :: OP_A_INV [04:04] */
1871	#define BCHP_M2MC_BLEND_COLOR_OP_OP_A_INV_MASK 0x00000010
1872	#define BCHP_M2MC_BLEND_COLOR_OP_OP_A_INV_SHIFT 4
1873	#define BCHP_M2MC_BLEND_COLOR_OP_OP_A_INV_DEFAULT 0x00000000
1874
1875	/* M2MC :: BLEND_COLOR_OP :: reserved5 [03:03] */
1876	#define BCHP_M2MC_BLEND_COLOR_OP_reserved5_MASK 0x00000008
1877	#define BCHP_M2MC_BLEND_COLOR_OP_reserved5_SHIFT 3
1878
1879	/* M2MC :: BLEND_COLOR_OP :: OP_A [02:00] */
1880	#define BCHP_M2MC_BLEND_COLOR_OP_OP_A_MASK 0x00000007
1881	#define BCHP_M2MC_BLEND_COLOR_OP_OP_A_SHIFT 0
1882	#define BCHP_M2MC_BLEND_COLOR_OP_OP_A_DEFAULT 0x00000000
1883	#define BCHP_M2MC_BLEND_COLOR_OP_OP_A_ZERO 0
1884	#define BCHP_M2MC_BLEND_COLOR_OP_OP_A_SOURCE_COLOR 1
1885	#define BCHP_M2MC_BLEND_COLOR_OP_OP_A_DEST_COLOR 2
1886	#define BCHP_M2MC_BLEND_COLOR_OP_OP_A_CONSTANT_COLOR 3
1887	#define BCHP_M2MC_BLEND_COLOR_OP_OP_A_HALF 4
1888	#define BCHP_M2MC_BLEND_COLOR_OP_OP_A_SOURCE_ALPHA 5
1889	#define BCHP_M2MC_BLEND_COLOR_OP_OP_A_DEST_ALPHA 6
1890	#define BCHP_M2MC_BLEND_COLOR_OP_OP_A_CONSTANT_ALPHA 7
1891
1892	/***************************************************************************
1893	*BLEND_ALPHA_OP - Alpha blend operation descriptor
1894	***************************************************************************/
1895	/* M2MC :: BLEND_ALPHA_OP :: reserved0 [31:27] */
1896	#define BCHP_M2MC_BLEND_ALPHA_OP_reserved0_MASK 0xf8000000
1897	#define BCHP_M2MC_BLEND_ALPHA_OP_reserved0_SHIFT 27
1898
1899	/* M2MC :: BLEND_ALPHA_OP :: SUBTRACT_E [26:26] */
1900	#define BCHP_M2MC_BLEND_ALPHA_OP_SUBTRACT_E_MASK 0x04000000
1901	#define BCHP_M2MC_BLEND_ALPHA_OP_SUBTRACT_E_SHIFT 26
1902	#define BCHP_M2MC_BLEND_ALPHA_OP_SUBTRACT_E_DEFAULT 0x00000000
1903
1904	/* M2MC :: BLEND_ALPHA_OP :: OP_E_INV [25:25] */
1905	#define BCHP_M2MC_BLEND_ALPHA_OP_OP_E_INV_MASK 0x02000000
1906	#define BCHP_M2MC_BLEND_ALPHA_OP_OP_E_INV_SHIFT 25
1907	#define BCHP_M2MC_BLEND_ALPHA_OP_OP_E_INV_DEFAULT 0x00000000
1908
1909	/* M2MC :: BLEND_ALPHA_OP :: reserved1 [24:24] */
1910	#define BCHP_M2MC_BLEND_ALPHA_OP_reserved1_MASK 0x01000000
1911	#define BCHP_M2MC_BLEND_ALPHA_OP_reserved1_SHIFT 24
1912
1913	/* M2MC :: BLEND_ALPHA_OP :: OP_E [23:21] */
1914	#define BCHP_M2MC_BLEND_ALPHA_OP_OP_E_MASK 0x00e00000
1915	#define BCHP_M2MC_BLEND_ALPHA_OP_OP_E_SHIFT 21
1916	#define BCHP_M2MC_BLEND_ALPHA_OP_OP_E_DEFAULT 0x00000000
1917	#define BCHP_M2MC_BLEND_ALPHA_OP_OP_E_ZERO 0
1918	#define BCHP_M2MC_BLEND_ALPHA_OP_OP_E_HALF 4
1919	#define BCHP_M2MC_BLEND_ALPHA_OP_OP_E_SOURCE_ALPHA 5
1920	#define BCHP_M2MC_BLEND_ALPHA_OP_OP_E_DEST_ALPHA 6
1921	#define BCHP_M2MC_BLEND_ALPHA_OP_OP_E_CONSTANT_ALPHA 7
1922
1923	/* M2MC :: BLEND_ALPHA_OP :: SUBTRACT_CD [20:20] */
1924	#define BCHP_M2MC_BLEND_ALPHA_OP_SUBTRACT_CD_MASK 0x00100000
1925	#define BCHP_M2MC_BLEND_ALPHA_OP_SUBTRACT_CD_SHIFT 20
1926	#define BCHP_M2MC_BLEND_ALPHA_OP_SUBTRACT_CD_DEFAULT 0x00000000
1927
1928	/* M2MC :: BLEND_ALPHA_OP :: OP_D_INV [19:19] */
1929	#define BCHP_M2MC_BLEND_ALPHA_OP_OP_D_INV_MASK 0x00080000
1930	#define BCHP_M2MC_BLEND_ALPHA_OP_OP_D_INV_SHIFT 19
1931	#define BCHP_M2MC_BLEND_ALPHA_OP_OP_D_INV_DEFAULT 0x00000000
1932
1933	/* M2MC :: BLEND_ALPHA_OP :: reserved2 [18:18] */
1934	#define BCHP_M2MC_BLEND_ALPHA_OP_reserved2_MASK 0x00040000
1935	#define BCHP_M2MC_BLEND_ALPHA_OP_reserved2_SHIFT 18
1936
1937	/* M2MC :: BLEND_ALPHA_OP :: OP_D [17:15] */
1938	#define BCHP_M2MC_BLEND_ALPHA_OP_OP_D_MASK 0x00038000
1939	#define BCHP_M2MC_BLEND_ALPHA_OP_OP_D_SHIFT 15
1940	#define BCHP_M2MC_BLEND_ALPHA_OP_OP_D_DEFAULT 0x00000000
1941	#define BCHP_M2MC_BLEND_ALPHA_OP_OP_D_ZERO 0
1942	#define BCHP_M2MC_BLEND_ALPHA_OP_OP_D_HALF 4
1943	#define BCHP_M2MC_BLEND_ALPHA_OP_OP_D_SOURCE_ALPHA 5
1944	#define BCHP_M2MC_BLEND_ALPHA_OP_OP_D_DEST_ALPHA 6
1945	#define BCHP_M2MC_BLEND_ALPHA_OP_OP_D_CONSTANT_ALPHA 7
1946
1947	/* M2MC :: BLEND_ALPHA_OP :: OP_C_INV [14:14] */
1948	#define BCHP_M2MC_BLEND_ALPHA_OP_OP_C_INV_MASK 0x00004000
1949	#define BCHP_M2MC_BLEND_ALPHA_OP_OP_C_INV_SHIFT 14
1950	#define BCHP_M2MC_BLEND_ALPHA_OP_OP_C_INV_DEFAULT 0x00000000
1951
1952	/* M2MC :: BLEND_ALPHA_OP :: reserved3 [13:13] */
1953	#define BCHP_M2MC_BLEND_ALPHA_OP_reserved3_MASK 0x00002000
1954	#define BCHP_M2MC_BLEND_ALPHA_OP_reserved3_SHIFT 13
1955
1956	/* M2MC :: BLEND_ALPHA_OP :: OP_C [12:10] */
1957	#define BCHP_M2MC_BLEND_ALPHA_OP_OP_C_MASK 0x00001c00
1958	#define BCHP_M2MC_BLEND_ALPHA_OP_OP_C_SHIFT 10
1959	#define BCHP_M2MC_BLEND_ALPHA_OP_OP_C_DEFAULT 0x00000000
1960	#define BCHP_M2MC_BLEND_ALPHA_OP_OP_C_ZERO 0
1961	#define BCHP_M2MC_BLEND_ALPHA_OP_OP_C_HALF 4
1962	#define BCHP_M2MC_BLEND_ALPHA_OP_OP_C_SOURCE_ALPHA 5
1963	#define BCHP_M2MC_BLEND_ALPHA_OP_OP_C_DEST_ALPHA 6
1964	#define BCHP_M2MC_BLEND_ALPHA_OP_OP_C_CONSTANT_ALPHA 7
1965
1966	/* M2MC :: BLEND_ALPHA_OP :: OP_B_INV [09:09] */
1967	#define BCHP_M2MC_BLEND_ALPHA_OP_OP_B_INV_MASK 0x00000200
1968	#define BCHP_M2MC_BLEND_ALPHA_OP_OP_B_INV_SHIFT 9
1969	#define BCHP_M2MC_BLEND_ALPHA_OP_OP_B_INV_DEFAULT 0x00000000
1970
1971	/* M2MC :: BLEND_ALPHA_OP :: reserved4 [08:08] */
1972	#define BCHP_M2MC_BLEND_ALPHA_OP_reserved4_MASK 0x00000100
1973	#define BCHP_M2MC_BLEND_ALPHA_OP_reserved4_SHIFT 8
1974
1975	/* M2MC :: BLEND_ALPHA_OP :: OP_B [07:05] */
1976	#define BCHP_M2MC_BLEND_ALPHA_OP_OP_B_MASK 0x000000e0
1977	#define BCHP_M2MC_BLEND_ALPHA_OP_OP_B_SHIFT 5
1978	#define BCHP_M2MC_BLEND_ALPHA_OP_OP_B_DEFAULT 0x00000000
1979	#define BCHP_M2MC_BLEND_ALPHA_OP_OP_B_ZERO 0
1980	#define BCHP_M2MC_BLEND_ALPHA_OP_OP_B_HALF 4
1981	#define BCHP_M2MC_BLEND_ALPHA_OP_OP_B_SOURCE_ALPHA 5
1982	#define BCHP_M2MC_BLEND_ALPHA_OP_OP_B_DEST_ALPHA 6
1983	#define BCHP_M2MC_BLEND_ALPHA_OP_OP_B_CONSTANT_ALPHA 7
1984
1985	/* M2MC :: BLEND_ALPHA_OP :: OP_A_INV [04:04] */
1986	#define BCHP_M2MC_BLEND_ALPHA_OP_OP_A_INV_MASK 0x00000010
1987	#define BCHP_M2MC_BLEND_ALPHA_OP_OP_A_INV_SHIFT 4
1988	#define BCHP_M2MC_BLEND_ALPHA_OP_OP_A_INV_DEFAULT 0x00000000
1989
1990	/* M2MC :: BLEND_ALPHA_OP :: reserved5 [03:03] */
1991	#define BCHP_M2MC_BLEND_ALPHA_OP_reserved5_MASK 0x00000008
1992	#define BCHP_M2MC_BLEND_ALPHA_OP_reserved5_SHIFT 3
1993
1994	/* M2MC :: BLEND_ALPHA_OP :: OP_A [02:00] */
1995	#define BCHP_M2MC_BLEND_ALPHA_OP_OP_A_MASK 0x00000007
1996	#define BCHP_M2MC_BLEND_ALPHA_OP_OP_A_SHIFT 0
1997	#define BCHP_M2MC_BLEND_ALPHA_OP_OP_A_DEFAULT 0x00000000
1998	#define BCHP_M2MC_BLEND_ALPHA_OP_OP_A_ZERO 0
1999	#define BCHP_M2MC_BLEND_ALPHA_OP_OP_A_HALF 4
2000	#define BCHP_M2MC_BLEND_ALPHA_OP_OP_A_SOURCE_ALPHA 5
2001	#define BCHP_M2MC_BLEND_ALPHA_OP_OP_A_DEST_ALPHA 6
2002	#define BCHP_M2MC_BLEND_ALPHA_OP_OP_A_CONSTANT_ALPHA 7
2003
2004	/***************************************************************************
2005	*BLEND_CONSTANT_COLOR - Blend constant color
2006	***************************************************************************/
2007	/* M2MC :: BLEND_CONSTANT_COLOR :: ALPHA [31:24] */
2008	#define BCHP_M2MC_BLEND_CONSTANT_COLOR_ALPHA_MASK 0xff000000
2009	#define BCHP_M2MC_BLEND_CONSTANT_COLOR_ALPHA_SHIFT 24
2010
2011	/* M2MC :: BLEND_CONSTANT_COLOR :: RED [23:16] */
2012	#define BCHP_M2MC_BLEND_CONSTANT_COLOR_RED_MASK 0x00ff0000
2013	#define BCHP_M2MC_BLEND_CONSTANT_COLOR_RED_SHIFT 16
2014
2015	/* M2MC :: BLEND_CONSTANT_COLOR :: GREEN [15:08] */
2016	#define BCHP_M2MC_BLEND_CONSTANT_COLOR_GREEN_MASK 0x0000ff00
2017	#define BCHP_M2MC_BLEND_CONSTANT_COLOR_GREEN_SHIFT 8
2018
2019	/* M2MC :: BLEND_CONSTANT_COLOR :: BLUE [07:00] */
2020	#define BCHP_M2MC_BLEND_CONSTANT_COLOR_BLUE_MASK 0x000000ff
2021	#define BCHP_M2MC_BLEND_CONSTANT_COLOR_BLUE_SHIFT 0
2022
2023	/***************************************************************************
2024	*BLEND_COLOR_KEY_ACTION - Action color keyed samples take in blender
2025	***************************************************************************/
2026	/* M2MC :: BLEND_COLOR_KEY_ACTION :: reserved0 [31:08] */
2027	#define BCHP_M2MC_BLEND_COLOR_KEY_ACTION_reserved0_MASK 0xffffff00
2028	#define BCHP_M2MC_BLEND_COLOR_KEY_ACTION_reserved0_SHIFT 8
2029
2030	/* M2MC :: BLEND_COLOR_KEY_ACTION :: ACTION_NOT_SRC_NOT_DEST [07:06] */
2031	#define BCHP_M2MC_BLEND_COLOR_KEY_ACTION_ACTION_NOT_SRC_NOT_DEST_MASK 0x000000c0
2032	#define BCHP_M2MC_BLEND_COLOR_KEY_ACTION_ACTION_NOT_SRC_NOT_DEST_SHIFT 6
2033	#define BCHP_M2MC_BLEND_COLOR_KEY_ACTION_ACTION_NOT_SRC_NOT_DEST_DEFAULT 0x00000000
2034	#define BCHP_M2MC_BLEND_COLOR_KEY_ACTION_ACTION_NOT_SRC_NOT_DEST_TAKE_SOURCE 0
2035	#define BCHP_M2MC_BLEND_COLOR_KEY_ACTION_ACTION_NOT_SRC_NOT_DEST_TAKE_BLEND 1
2036	#define BCHP_M2MC_BLEND_COLOR_KEY_ACTION_ACTION_NOT_SRC_NOT_DEST_TAKE_DEST 2
2037	#define BCHP_M2MC_BLEND_COLOR_KEY_ACTION_ACTION_NOT_SRC_NOT_DEST_TAKE_ROP 3
2038
2039	/* M2MC :: BLEND_COLOR_KEY_ACTION :: ACTION_NOT_SRC_DEST [05:04] */
2040	#define BCHP_M2MC_BLEND_COLOR_KEY_ACTION_ACTION_NOT_SRC_DEST_MASK 0x00000030
2041	#define BCHP_M2MC_BLEND_COLOR_KEY_ACTION_ACTION_NOT_SRC_DEST_SHIFT 4
2042	#define BCHP_M2MC_BLEND_COLOR_KEY_ACTION_ACTION_NOT_SRC_DEST_DEFAULT 0x00000000
2043	#define BCHP_M2MC_BLEND_COLOR_KEY_ACTION_ACTION_NOT_SRC_DEST_TAKE_SOURCE 0
2044	#define BCHP_M2MC_BLEND_COLOR_KEY_ACTION_ACTION_NOT_SRC_DEST_TAKE_BLEND 1
2045	#define BCHP_M2MC_BLEND_COLOR_KEY_ACTION_ACTION_NOT_SRC_DEST_TAKE_DEST 2
2046	#define BCHP_M2MC_BLEND_COLOR_KEY_ACTION_ACTION_NOT_SRC_DEST_TAKE_ROP 3
2047
2048	/* M2MC :: BLEND_COLOR_KEY_ACTION :: ACTION_SRC_NOT_DEST [03:02] */
2049	#define BCHP_M2MC_BLEND_COLOR_KEY_ACTION_ACTION_SRC_NOT_DEST_MASK 0x0000000c
2050	#define BCHP_M2MC_BLEND_COLOR_KEY_ACTION_ACTION_SRC_NOT_DEST_SHIFT 2
2051	#define BCHP_M2MC_BLEND_COLOR_KEY_ACTION_ACTION_SRC_NOT_DEST_DEFAULT 0x00000000
2052	#define BCHP_M2MC_BLEND_COLOR_KEY_ACTION_ACTION_SRC_NOT_DEST_TAKE_SOURCE 0
2053	#define BCHP_M2MC_BLEND_COLOR_KEY_ACTION_ACTION_SRC_NOT_DEST_TAKE_BLEND 1
2054	#define BCHP_M2MC_BLEND_COLOR_KEY_ACTION_ACTION_SRC_NOT_DEST_TAKE_DEST 2
2055	#define BCHP_M2MC_BLEND_COLOR_KEY_ACTION_ACTION_SRC_NOT_DEST_TAKE_ROP 3
2056
2057	/* M2MC :: BLEND_COLOR_KEY_ACTION :: ACTION_SRC_DEST [01:00] */
2058	#define BCHP_M2MC_BLEND_COLOR_KEY_ACTION_ACTION_SRC_DEST_MASK 0x00000003
2059	#define BCHP_M2MC_BLEND_COLOR_KEY_ACTION_ACTION_SRC_DEST_SHIFT 0
2060	#define BCHP_M2MC_BLEND_COLOR_KEY_ACTION_ACTION_SRC_DEST_DEFAULT 0x00000000
2061	#define BCHP_M2MC_BLEND_COLOR_KEY_ACTION_ACTION_SRC_DEST_TAKE_SOURCE 0
2062	#define BCHP_M2MC_BLEND_COLOR_KEY_ACTION_ACTION_SRC_DEST_TAKE_BLEND 1
2063	#define BCHP_M2MC_BLEND_COLOR_KEY_ACTION_ACTION_SRC_DEST_TAKE_DEST 2
2064	#define BCHP_M2MC_BLEND_COLOR_KEY_ACTION_ACTION_SRC_DEST_TAKE_ROP 3
2065
2066	/***************************************************************************
2067	*ROP_OPERATION - Raster operation vector
2068	***************************************************************************/
2069	/* M2MC :: ROP_OPERATION :: reserved0 [31:08] */
2070	#define BCHP_M2MC_ROP_OPERATION_reserved0_MASK 0xffffff00
2071	#define BCHP_M2MC_ROP_OPERATION_reserved0_SHIFT 8
2072
2073	/* M2MC :: ROP_OPERATION :: VECTOR [07:00] */
2074	#define BCHP_M2MC_ROP_OPERATION_VECTOR_MASK 0x000000ff
2075	#define BCHP_M2MC_ROP_OPERATION_VECTOR_SHIFT 0
2076	#define BCHP_M2MC_ROP_OPERATION_VECTOR_DEFAULT 0x00000000
2077
2078	/***************************************************************************
2079	*ROP_PATTERN_TOP - Top half of ROP pattern
2080	***************************************************************************/
2081	/* M2MC :: ROP_PATTERN_TOP :: PATTERN [31:00] */
2082	#define BCHP_M2MC_ROP_PATTERN_TOP_PATTERN_MASK 0xffffffff
2083	#define BCHP_M2MC_ROP_PATTERN_TOP_PATTERN_SHIFT 0
2084
2085	/***************************************************************************
2086	*ROP_PATTERN_BOTTOM - Bottom half of ROP pattern
2087	***************************************************************************/
2088	/* M2MC :: ROP_PATTERN_BOTTOM :: PATTERN [31:00] */
2089	#define BCHP_M2MC_ROP_PATTERN_BOTTOM_PATTERN_MASK 0xffffffff
2090	#define BCHP_M2MC_ROP_PATTERN_BOTTOM_PATTERN_SHIFT 0
2091
2092	/***************************************************************************
2093	*ROP_PATTERN_COLOR_0 - ROP Color for 0
2094	***************************************************************************/
2095	/* M2MC :: ROP_PATTERN_COLOR_0 :: ALPHA [31:24] */
2096	#define BCHP_M2MC_ROP_PATTERN_COLOR_0_ALPHA_MASK 0xff000000
2097	#define BCHP_M2MC_ROP_PATTERN_COLOR_0_ALPHA_SHIFT 24
2098
2099	/* M2MC :: ROP_PATTERN_COLOR_0 :: RED [23:16] */
2100	#define BCHP_M2MC_ROP_PATTERN_COLOR_0_RED_MASK 0x00ff0000
2101	#define BCHP_M2MC_ROP_PATTERN_COLOR_0_RED_SHIFT 16
2102
2103	/* M2MC :: ROP_PATTERN_COLOR_0 :: GREEN [15:08] */
2104	#define BCHP_M2MC_ROP_PATTERN_COLOR_0_GREEN_MASK 0x0000ff00
2105	#define BCHP_M2MC_ROP_PATTERN_COLOR_0_GREEN_SHIFT 8
2106
2107	/* M2MC :: ROP_PATTERN_COLOR_0 :: BLUE [07:00] */
2108	#define BCHP_M2MC_ROP_PATTERN_COLOR_0_BLUE_MASK 0x000000ff
2109	#define BCHP_M2MC_ROP_PATTERN_COLOR_0_BLUE_SHIFT 0
2110
2111	/***************************************************************************
2112	*ROP_PATTERN_COLOR_1 - ROP Color for 1
2113	***************************************************************************/
2114	/* M2MC :: ROP_PATTERN_COLOR_1 :: ALPHA [31:24] */
2115	#define BCHP_M2MC_ROP_PATTERN_COLOR_1_ALPHA_MASK 0xff000000
2116	#define BCHP_M2MC_ROP_PATTERN_COLOR_1_ALPHA_SHIFT 24
2117
2118	/* M2MC :: ROP_PATTERN_COLOR_1 :: RED [23:16] */
2119	#define BCHP_M2MC_ROP_PATTERN_COLOR_1_RED_MASK 0x00ff0000
2120	#define BCHP_M2MC_ROP_PATTERN_COLOR_1_RED_SHIFT 16
2121
2122	/* M2MC :: ROP_PATTERN_COLOR_1 :: GREEN [15:08] */
2123	#define BCHP_M2MC_ROP_PATTERN_COLOR_1_GREEN_MASK 0x0000ff00
2124	#define BCHP_M2MC_ROP_PATTERN_COLOR_1_GREEN_SHIFT 8
2125
2126	/* M2MC :: ROP_PATTERN_COLOR_1 :: BLUE [07:00] */
2127	#define BCHP_M2MC_ROP_PATTERN_COLOR_1_BLUE_MASK 0x000000ff
2128	#define BCHP_M2MC_ROP_PATTERN_COLOR_1_BLUE_SHIFT 0
2129
2130	/***************************************************************************
2131	*SRC_COLOR_KEY_HIGH - Source color key high
2132	***************************************************************************/
2133	/* M2MC :: SRC_COLOR_KEY_HIGH :: ALPHA [31:24] */
2134	#define BCHP_M2MC_SRC_COLOR_KEY_HIGH_ALPHA_MASK 0xff000000
2135	#define BCHP_M2MC_SRC_COLOR_KEY_HIGH_ALPHA_SHIFT 24
2136
2137	/* M2MC :: SRC_COLOR_KEY_HIGH :: RED [23:16] */
2138	#define BCHP_M2MC_SRC_COLOR_KEY_HIGH_RED_MASK 0x00ff0000
2139	#define BCHP_M2MC_SRC_COLOR_KEY_HIGH_RED_SHIFT 16
2140
2141	/* M2MC :: SRC_COLOR_KEY_HIGH :: GREEN [15:08] */
2142	#define BCHP_M2MC_SRC_COLOR_KEY_HIGH_GREEN_MASK 0x0000ff00
2143	#define BCHP_M2MC_SRC_COLOR_KEY_HIGH_GREEN_SHIFT 8
2144
2145	/* M2MC :: SRC_COLOR_KEY_HIGH :: BLUE [07:00] */
2146	#define BCHP_M2MC_SRC_COLOR_KEY_HIGH_BLUE_MASK 0x000000ff
2147	#define BCHP_M2MC_SRC_COLOR_KEY_HIGH_BLUE_SHIFT 0
2148
2149	/***************************************************************************
2150	*SRC_COLOR_KEY_LOW - Source color key low
2151	***************************************************************************/
2152	/* M2MC :: SRC_COLOR_KEY_LOW :: ALPHA [31:24] */
2153	#define BCHP_M2MC_SRC_COLOR_KEY_LOW_ALPHA_MASK 0xff000000
2154	#define BCHP_M2MC_SRC_COLOR_KEY_LOW_ALPHA_SHIFT 24
2155
2156	/* M2MC :: SRC_COLOR_KEY_LOW :: RED [23:16] */
2157	#define BCHP_M2MC_SRC_COLOR_KEY_LOW_RED_MASK 0x00ff0000
2158	#define BCHP_M2MC_SRC_COLOR_KEY_LOW_RED_SHIFT 16
2159
2160	/* M2MC :: SRC_COLOR_KEY_LOW :: GREEN [15:08] */
2161	#define BCHP_M2MC_SRC_COLOR_KEY_LOW_GREEN_MASK 0x0000ff00
2162	#define BCHP_M2MC_SRC_COLOR_KEY_LOW_GREEN_SHIFT 8
2163
2164	/* M2MC :: SRC_COLOR_KEY_LOW :: BLUE [07:00] */
2165	#define BCHP_M2MC_SRC_COLOR_KEY_LOW_BLUE_MASK 0x000000ff
2166	#define BCHP_M2MC_SRC_COLOR_KEY_LOW_BLUE_SHIFT 0
2167
2168	/***************************************************************************
2169	*SRC_COLOR_KEY_MASK - Source color key mask
2170	***************************************************************************/
2171	/* M2MC :: SRC_COLOR_KEY_MASK :: ALPHA [31:24] */
2172	#define BCHP_M2MC_SRC_COLOR_KEY_MASK_ALPHA_MASK 0xff000000
2173	#define BCHP_M2MC_SRC_COLOR_KEY_MASK_ALPHA_SHIFT 24
2174
2175	/* M2MC :: SRC_COLOR_KEY_MASK :: RED [23:16] */
2176	#define BCHP_M2MC_SRC_COLOR_KEY_MASK_RED_MASK 0x00ff0000
2177	#define BCHP_M2MC_SRC_COLOR_KEY_MASK_RED_SHIFT 16
2178
2179	/* M2MC :: SRC_COLOR_KEY_MASK :: GREEN [15:08] */
2180	#define BCHP_M2MC_SRC_COLOR_KEY_MASK_GREEN_MASK 0x0000ff00
2181	#define BCHP_M2MC_SRC_COLOR_KEY_MASK_GREEN_SHIFT 8
2182
2183	/* M2MC :: SRC_COLOR_KEY_MASK :: BLUE [07:00] */
2184	#define BCHP_M2MC_SRC_COLOR_KEY_MASK_BLUE_MASK 0x000000ff
2185	#define BCHP_M2MC_SRC_COLOR_KEY_MASK_BLUE_SHIFT 0
2186
2187	/***************************************************************************
2188	*SRC_COLOR_KEY_REPLACEMENT - Source color key replacement
2189	***************************************************************************/
2190	/* M2MC :: SRC_COLOR_KEY_REPLACEMENT :: ALPHA [31:24] */
2191	#define BCHP_M2MC_SRC_COLOR_KEY_REPLACEMENT_ALPHA_MASK 0xff000000
2192	#define BCHP_M2MC_SRC_COLOR_KEY_REPLACEMENT_ALPHA_SHIFT 24
2193
2194	/* M2MC :: SRC_COLOR_KEY_REPLACEMENT :: RED [23:16] */
2195	#define BCHP_M2MC_SRC_COLOR_KEY_REPLACEMENT_RED_MASK 0x00ff0000
2196	#define BCHP_M2MC_SRC_COLOR_KEY_REPLACEMENT_RED_SHIFT 16
2197
2198	/* M2MC :: SRC_COLOR_KEY_REPLACEMENT :: GREEN [15:08] */
2199	#define BCHP_M2MC_SRC_COLOR_KEY_REPLACEMENT_GREEN_MASK 0x0000ff00
2200	#define BCHP_M2MC_SRC_COLOR_KEY_REPLACEMENT_GREEN_SHIFT 8
2201
2202	/* M2MC :: SRC_COLOR_KEY_REPLACEMENT :: BLUE [07:00] */
2203	#define BCHP_M2MC_SRC_COLOR_KEY_REPLACEMENT_BLUE_MASK 0x000000ff
2204	#define BCHP_M2MC_SRC_COLOR_KEY_REPLACEMENT_BLUE_SHIFT 0
2205
2206	/***************************************************************************
2207	*SRC_COLOR_KEY_REPLACEMENT_MASK - Source color key replacement mask
2208	***************************************************************************/
2209	/* M2MC :: SRC_COLOR_KEY_REPLACEMENT_MASK :: ALPHA [31:24] */
2210	#define BCHP_M2MC_SRC_COLOR_KEY_REPLACEMENT_MASK_ALPHA_MASK 0xff000000
2211	#define BCHP_M2MC_SRC_COLOR_KEY_REPLACEMENT_MASK_ALPHA_SHIFT 24
2212
2213	/* M2MC :: SRC_COLOR_KEY_REPLACEMENT_MASK :: RED [23:16] */
2214	#define BCHP_M2MC_SRC_COLOR_KEY_REPLACEMENT_MASK_RED_MASK 0x00ff0000
2215	#define BCHP_M2MC_SRC_COLOR_KEY_REPLACEMENT_MASK_RED_SHIFT 16
2216
2217	/* M2MC :: SRC_COLOR_KEY_REPLACEMENT_MASK :: GREEN [15:08] */
2218	#define BCHP_M2MC_SRC_COLOR_KEY_REPLACEMENT_MASK_GREEN_MASK 0x0000ff00
2219	#define BCHP_M2MC_SRC_COLOR_KEY_REPLACEMENT_MASK_GREEN_SHIFT 8
2220
2221	/* M2MC :: SRC_COLOR_KEY_REPLACEMENT_MASK :: BLUE [07:00] */
2222	#define BCHP_M2MC_SRC_COLOR_KEY_REPLACEMENT_MASK_BLUE_MASK 0x000000ff
2223	#define BCHP_M2MC_SRC_COLOR_KEY_REPLACEMENT_MASK_BLUE_SHIFT 0
2224
2225	/***************************************************************************
2226	*DEST_COLOR_KEY_HIGH - Destination color key high
2227	***************************************************************************/
2228	/* M2MC :: DEST_COLOR_KEY_HIGH :: ALPHA [31:24] */
2229	#define BCHP_M2MC_DEST_COLOR_KEY_HIGH_ALPHA_MASK 0xff000000
2230	#define BCHP_M2MC_DEST_COLOR_KEY_HIGH_ALPHA_SHIFT 24
2231
2232	/* M2MC :: DEST_COLOR_KEY_HIGH :: RED [23:16] */
2233	#define BCHP_M2MC_DEST_COLOR_KEY_HIGH_RED_MASK 0x00ff0000
2234	#define BCHP_M2MC_DEST_COLOR_KEY_HIGH_RED_SHIFT 16
2235
2236	/* M2MC :: DEST_COLOR_KEY_HIGH :: GREEN [15:08] */
2237	#define BCHP_M2MC_DEST_COLOR_KEY_HIGH_GREEN_MASK 0x0000ff00
2238	#define BCHP_M2MC_DEST_COLOR_KEY_HIGH_GREEN_SHIFT 8
2239
2240	/* M2MC :: DEST_COLOR_KEY_HIGH :: BLUE [07:00] */
2241	#define BCHP_M2MC_DEST_COLOR_KEY_HIGH_BLUE_MASK 0x000000ff
2242	#define BCHP_M2MC_DEST_COLOR_KEY_HIGH_BLUE_SHIFT 0
2243
2244	/***************************************************************************
2245	*DEST_COLOR_KEY_LOW - Destination color key low
2246	***************************************************************************/
2247	/* M2MC :: DEST_COLOR_KEY_LOW :: ALPHA [31:24] */
2248	#define BCHP_M2MC_DEST_COLOR_KEY_LOW_ALPHA_MASK 0xff000000
2249	#define BCHP_M2MC_DEST_COLOR_KEY_LOW_ALPHA_SHIFT 24
2250
2251	/* M2MC :: DEST_COLOR_KEY_LOW :: RED [23:16] */
2252	#define BCHP_M2MC_DEST_COLOR_KEY_LOW_RED_MASK 0x00ff0000
2253	#define BCHP_M2MC_DEST_COLOR_KEY_LOW_RED_SHIFT 16
2254
2255	/* M2MC :: DEST_COLOR_KEY_LOW :: GREEN [15:08] */
2256	#define BCHP_M2MC_DEST_COLOR_KEY_LOW_GREEN_MASK 0x0000ff00
2257	#define BCHP_M2MC_DEST_COLOR_KEY_LOW_GREEN_SHIFT 8
2258
2259	/* M2MC :: DEST_COLOR_KEY_LOW :: BLUE [07:00] */
2260	#define BCHP_M2MC_DEST_COLOR_KEY_LOW_BLUE_MASK 0x000000ff
2261	#define BCHP_M2MC_DEST_COLOR_KEY_LOW_BLUE_SHIFT 0
2262
2263	/***************************************************************************
2264	*DEST_COLOR_KEY_MASK - Destination color key mask
2265	***************************************************************************/
2266	/* M2MC :: DEST_COLOR_KEY_MASK :: ALPHA [31:24] */
2267	#define BCHP_M2MC_DEST_COLOR_KEY_MASK_ALPHA_MASK 0xff000000
2268	#define BCHP_M2MC_DEST_COLOR_KEY_MASK_ALPHA_SHIFT 24
2269
2270	/* M2MC :: DEST_COLOR_KEY_MASK :: RED [23:16] */
2271	#define BCHP_M2MC_DEST_COLOR_KEY_MASK_RED_MASK 0x00ff0000
2272	#define BCHP_M2MC_DEST_COLOR_KEY_MASK_RED_SHIFT 16
2273
2274	/* M2MC :: DEST_COLOR_KEY_MASK :: GREEN [15:08] */
2275	#define BCHP_M2MC_DEST_COLOR_KEY_MASK_GREEN_MASK 0x0000ff00
2276	#define BCHP_M2MC_DEST_COLOR_KEY_MASK_GREEN_SHIFT 8
2277
2278	/* M2MC :: DEST_COLOR_KEY_MASK :: BLUE [07:00] */
2279	#define BCHP_M2MC_DEST_COLOR_KEY_MASK_BLUE_MASK 0x000000ff
2280	#define BCHP_M2MC_DEST_COLOR_KEY_MASK_BLUE_SHIFT 0
2281
2282	/***************************************************************************
2283	*DEST_COLOR_KEY_REPLACEMENT - Destination color key replacement
2284	***************************************************************************/
2285	/* M2MC :: DEST_COLOR_KEY_REPLACEMENT :: ALPHA [31:24] */
2286	#define BCHP_M2MC_DEST_COLOR_KEY_REPLACEMENT_ALPHA_MASK 0xff000000
2287	#define BCHP_M2MC_DEST_COLOR_KEY_REPLACEMENT_ALPHA_SHIFT 24
2288
2289	/* M2MC :: DEST_COLOR_KEY_REPLACEMENT :: RED [23:16] */
2290	#define BCHP_M2MC_DEST_COLOR_KEY_REPLACEMENT_RED_MASK 0x00ff0000
2291	#define BCHP_M2MC_DEST_COLOR_KEY_REPLACEMENT_RED_SHIFT 16
2292
2293	/* M2MC :: DEST_COLOR_KEY_REPLACEMENT :: GREEN [15:08] */
2294	#define BCHP_M2MC_DEST_COLOR_KEY_REPLACEMENT_GREEN_MASK 0x0000ff00
2295	#define BCHP_M2MC_DEST_COLOR_KEY_REPLACEMENT_GREEN_SHIFT 8
2296
2297	/* M2MC :: DEST_COLOR_KEY_REPLACEMENT :: BLUE [07:00] */
2298	#define BCHP_M2MC_DEST_COLOR_KEY_REPLACEMENT_BLUE_MASK 0x000000ff
2299	#define BCHP_M2MC_DEST_COLOR_KEY_REPLACEMENT_BLUE_SHIFT 0
2300
2301	/***************************************************************************
2302	*DEST_COLOR_KEY_REPLACEMENT_MASK - Destination color key replacement mask
2303	***************************************************************************/
2304	/* M2MC :: DEST_COLOR_KEY_REPLACEMENT_MASK :: ALPHA [31:24] */
2305	#define BCHP_M2MC_DEST_COLOR_KEY_REPLACEMENT_MASK_ALPHA_MASK 0xff000000
2306	#define BCHP_M2MC_DEST_COLOR_KEY_REPLACEMENT_MASK_ALPHA_SHIFT 24
2307
2308	/* M2MC :: DEST_COLOR_KEY_REPLACEMENT_MASK :: RED [23:16] */
2309	#define BCHP_M2MC_DEST_COLOR_KEY_REPLACEMENT_MASK_RED_MASK 0x00ff0000
2310	#define BCHP_M2MC_DEST_COLOR_KEY_REPLACEMENT_MASK_RED_SHIFT 16
2311
2312	/* M2MC :: DEST_COLOR_KEY_REPLACEMENT_MASK :: GREEN [15:08] */
2313	#define BCHP_M2MC_DEST_COLOR_KEY_REPLACEMENT_MASK_GREEN_MASK 0x0000ff00
2314	#define BCHP_M2MC_DEST_COLOR_KEY_REPLACEMENT_MASK_GREEN_SHIFT 8
2315
2316	/* M2MC :: DEST_COLOR_KEY_REPLACEMENT_MASK :: BLUE [07:00] */
2317	#define BCHP_M2MC_DEST_COLOR_KEY_REPLACEMENT_MASK_BLUE_MASK 0x000000ff
2318	#define BCHP_M2MC_DEST_COLOR_KEY_REPLACEMENT_MASK_BLUE_SHIFT 0
2319
2320	/***************************************************************************
2321	*HORIZ_FIR_0_COEFF_PHASE0_01 - Horizontal Scaler 0 Poly-Phase Filter Phase 0 Coefficients
2322	***************************************************************************/
2323	/* M2MC :: HORIZ_FIR_0_COEFF_PHASE0_01 :: reserved0 [31:28] */
2324	#define BCHP_M2MC_HORIZ_FIR_0_COEFF_PHASE0_01_reserved0_MASK 0xf0000000
2325	#define BCHP_M2MC_HORIZ_FIR_0_COEFF_PHASE0_01_reserved0_SHIFT 28
2326
2327	/* M2MC :: HORIZ_FIR_0_COEFF_PHASE0_01 :: COEFF_0 [27:18] */
2328	#define BCHP_M2MC_HORIZ_FIR_0_COEFF_PHASE0_01_COEFF_0_MASK 0x0ffc0000
2329	#define BCHP_M2MC_HORIZ_FIR_0_COEFF_PHASE0_01_COEFF_0_SHIFT 18
2330
2331	/* M2MC :: HORIZ_FIR_0_COEFF_PHASE0_01 :: reserved1 [17:12] */
2332	#define BCHP_M2MC_HORIZ_FIR_0_COEFF_PHASE0_01_reserved1_MASK 0x0003f000
2333	#define BCHP_M2MC_HORIZ_FIR_0_COEFF_PHASE0_01_reserved1_SHIFT 12
2334
2335	/* M2MC :: HORIZ_FIR_0_COEFF_PHASE0_01 :: COEFF_1 [11:02] */
2336	#define BCHP_M2MC_HORIZ_FIR_0_COEFF_PHASE0_01_COEFF_1_MASK 0x00000ffc
2337	#define BCHP_M2MC_HORIZ_FIR_0_COEFF_PHASE0_01_COEFF_1_SHIFT 2
2338
2339	/* M2MC :: HORIZ_FIR_0_COEFF_PHASE0_01 :: reserved2 [01:00] */
2340	#define BCHP_M2MC_HORIZ_FIR_0_COEFF_PHASE0_01_reserved2_MASK 0x00000003
2341	#define BCHP_M2MC_HORIZ_FIR_0_COEFF_PHASE0_01_reserved2_SHIFT 0
2342
2343	/***************************************************************************
2344	*HORIZ_FIR_0_COEFF_PHASE0_2 - Horizontal Scaler 0 Poly-Phase Filter Phase 0 Coefficients
2345	***************************************************************************/
2346	/* M2MC :: HORIZ_FIR_0_COEFF_PHASE0_2 :: reserved0 [31:12] */
2347	#define BCHP_M2MC_HORIZ_FIR_0_COEFF_PHASE0_2_reserved0_MASK 0xfffff000
2348	#define BCHP_M2MC_HORIZ_FIR_0_COEFF_PHASE0_2_reserved0_SHIFT 12
2349
2350	/* M2MC :: HORIZ_FIR_0_COEFF_PHASE0_2 :: COEFF_2 [11:02] */
2351	#define BCHP_M2MC_HORIZ_FIR_0_COEFF_PHASE0_2_COEFF_2_MASK 0x00000ffc
2352	#define BCHP_M2MC_HORIZ_FIR_0_COEFF_PHASE0_2_COEFF_2_SHIFT 2
2353
2354	/* M2MC :: HORIZ_FIR_0_COEFF_PHASE0_2 :: reserved1 [01:00] */
2355	#define BCHP_M2MC_HORIZ_FIR_0_COEFF_PHASE0_2_reserved1_MASK 0x00000003
2356	#define BCHP_M2MC_HORIZ_FIR_0_COEFF_PHASE0_2_reserved1_SHIFT 0
2357
2358	/***************************************************************************
2359	*HORIZ_FIR_0_COEFF_PHASE1_01 - Horizontal Scaler 0 Poly-Phase Filter Phase 1 Coefficients
2360	***************************************************************************/
2361	/* M2MC :: HORIZ_FIR_0_COEFF_PHASE1_01 :: reserved0 [31:28] */
2362	#define BCHP_M2MC_HORIZ_FIR_0_COEFF_PHASE1_01_reserved0_MASK 0xf0000000
2363	#define BCHP_M2MC_HORIZ_FIR_0_COEFF_PHASE1_01_reserved0_SHIFT 28
2364
2365	/* M2MC :: HORIZ_FIR_0_COEFF_PHASE1_01 :: COEFF_0 [27:18] */
2366	#define BCHP_M2MC_HORIZ_FIR_0_COEFF_PHASE1_01_COEFF_0_MASK 0x0ffc0000
2367	#define BCHP_M2MC_HORIZ_FIR_0_COEFF_PHASE1_01_COEFF_0_SHIFT 18
2368
2369	/* M2MC :: HORIZ_FIR_0_COEFF_PHASE1_01 :: reserved1 [17:12] */
2370	#define BCHP_M2MC_HORIZ_FIR_0_COEFF_PHASE1_01_reserved1_MASK 0x0003f000
2371	#define BCHP_M2MC_HORIZ_FIR_0_COEFF_PHASE1_01_reserved1_SHIFT 12
2372
2373	/* M2MC :: HORIZ_FIR_0_COEFF_PHASE1_01 :: COEFF_1 [11:02] */
2374	#define BCHP_M2MC_HORIZ_FIR_0_COEFF_PHASE1_01_COEFF_1_MASK 0x00000ffc
2375	#define BCHP_M2MC_HORIZ_FIR_0_COEFF_PHASE1_01_COEFF_1_SHIFT 2
2376
2377	/* M2MC :: HORIZ_FIR_0_COEFF_PHASE1_01 :: reserved2 [01:00] */
2378	#define BCHP_M2MC_HORIZ_FIR_0_COEFF_PHASE1_01_reserved2_MASK 0x00000003
2379	#define BCHP_M2MC_HORIZ_FIR_0_COEFF_PHASE1_01_reserved2_SHIFT 0
2380
2381	/***************************************************************************
2382	*HORIZ_FIR_0_COEFF_PHASE1_2 - Horizontal Scaler 0 Poly-Phase Filter Phase 1 Coefficients
2383	***************************************************************************/
2384	/* M2MC :: HORIZ_FIR_0_COEFF_PHASE1_2 :: reserved0 [31:12] */
2385	#define BCHP_M2MC_HORIZ_FIR_0_COEFF_PHASE1_2_reserved0_MASK 0xfffff000
2386	#define BCHP_M2MC_HORIZ_FIR_0_COEFF_PHASE1_2_reserved0_SHIFT 12
2387
2388	/* M2MC :: HORIZ_FIR_0_COEFF_PHASE1_2 :: COEFF_2 [11:02] */
2389	#define BCHP_M2MC_HORIZ_FIR_0_COEFF_PHASE1_2_COEFF_2_MASK 0x00000ffc
2390	#define BCHP_M2MC_HORIZ_FIR_0_COEFF_PHASE1_2_COEFF_2_SHIFT 2
2391
2392	/* M2MC :: HORIZ_FIR_0_COEFF_PHASE1_2 :: reserved1 [01:00] */
2393	#define BCHP_M2MC_HORIZ_FIR_0_COEFF_PHASE1_2_reserved1_MASK 0x00000003
2394	#define BCHP_M2MC_HORIZ_FIR_0_COEFF_PHASE1_2_reserved1_SHIFT 0
2395
2396	/***************************************************************************
2397	*HORIZ_FIR_1_COEFF_PHASE0_01 - Horizontal Scaler 1 Poly-Phase Filter Phase 0 Coefficients
2398	***************************************************************************/
2399	/* M2MC :: HORIZ_FIR_1_COEFF_PHASE0_01 :: reserved0 [31:28] */
2400	#define BCHP_M2MC_HORIZ_FIR_1_COEFF_PHASE0_01_reserved0_MASK 0xf0000000
2401	#define BCHP_M2MC_HORIZ_FIR_1_COEFF_PHASE0_01_reserved0_SHIFT 28
2402
2403	/* M2MC :: HORIZ_FIR_1_COEFF_PHASE0_01 :: COEFF_0 [27:18] */
2404	#define BCHP_M2MC_HORIZ_FIR_1_COEFF_PHASE0_01_COEFF_0_MASK 0x0ffc0000
2405	#define BCHP_M2MC_HORIZ_FIR_1_COEFF_PHASE0_01_COEFF_0_SHIFT 18
2406
2407	/* M2MC :: HORIZ_FIR_1_COEFF_PHASE0_01 :: reserved1 [17:12] */
2408	#define BCHP_M2MC_HORIZ_FIR_1_COEFF_PHASE0_01_reserved1_MASK 0x0003f000
2409	#define BCHP_M2MC_HORIZ_FIR_1_COEFF_PHASE0_01_reserved1_SHIFT 12
2410
2411	/* M2MC :: HORIZ_FIR_1_COEFF_PHASE0_01 :: COEFF_1 [11:02] */
2412	#define BCHP_M2MC_HORIZ_FIR_1_COEFF_PHASE0_01_COEFF_1_MASK 0x00000ffc
2413	#define BCHP_M2MC_HORIZ_FIR_1_COEFF_PHASE0_01_COEFF_1_SHIFT 2
2414
2415	/* M2MC :: HORIZ_FIR_1_COEFF_PHASE0_01 :: reserved2 [01:00] */
2416	#define BCHP_M2MC_HORIZ_FIR_1_COEFF_PHASE0_01_reserved2_MASK 0x00000003
2417	#define BCHP_M2MC_HORIZ_FIR_1_COEFF_PHASE0_01_reserved2_SHIFT 0
2418
2419	/***************************************************************************
2420	*HORIZ_FIR_1_COEFF_PHASE0_2 - Horizontal Scaler 1 Poly-Phase Filter Phase 0 Coefficients
2421	***************************************************************************/
2422	/* M2MC :: HORIZ_FIR_1_COEFF_PHASE0_2 :: reserved0 [31:12] */
2423	#define BCHP_M2MC_HORIZ_FIR_1_COEFF_PHASE0_2_reserved0_MASK 0xfffff000
2424	#define BCHP_M2MC_HORIZ_FIR_1_COEFF_PHASE0_2_reserved0_SHIFT 12
2425
2426	/* M2MC :: HORIZ_FIR_1_COEFF_PHASE0_2 :: COEFF_2 [11:02] */
2427	#define BCHP_M2MC_HORIZ_FIR_1_COEFF_PHASE0_2_COEFF_2_MASK 0x00000ffc
2428	#define BCHP_M2MC_HORIZ_FIR_1_COEFF_PHASE0_2_COEFF_2_SHIFT 2
2429
2430	/* M2MC :: HORIZ_FIR_1_COEFF_PHASE0_2 :: reserved1 [01:00] */
2431	#define BCHP_M2MC_HORIZ_FIR_1_COEFF_PHASE0_2_reserved1_MASK 0x00000003
2432	#define BCHP_M2MC_HORIZ_FIR_1_COEFF_PHASE0_2_reserved1_SHIFT 0
2433
2434	/***************************************************************************
2435	*HORIZ_FIR_1_COEFF_PHASE1_01 - Horizontal Scaler 1 Poly-Phase Filter Phase 1 Coefficients
2436	***************************************************************************/
2437	/* M2MC :: HORIZ_FIR_1_COEFF_PHASE1_01 :: reserved0 [31:28] */
2438	#define BCHP_M2MC_HORIZ_FIR_1_COEFF_PHASE1_01_reserved0_MASK 0xf0000000
2439	#define BCHP_M2MC_HORIZ_FIR_1_COEFF_PHASE1_01_reserved0_SHIFT 28
2440
2441	/* M2MC :: HORIZ_FIR_1_COEFF_PHASE1_01 :: COEFF_0 [27:18] */
2442	#define BCHP_M2MC_HORIZ_FIR_1_COEFF_PHASE1_01_COEFF_0_MASK 0x0ffc0000
2443	#define BCHP_M2MC_HORIZ_FIR_1_COEFF_PHASE1_01_COEFF_0_SHIFT 18
2444
2445	/* M2MC :: HORIZ_FIR_1_COEFF_PHASE1_01 :: reserved1 [17:12] */
2446	#define BCHP_M2MC_HORIZ_FIR_1_COEFF_PHASE1_01_reserved1_MASK 0x0003f000
2447	#define BCHP_M2MC_HORIZ_FIR_1_COEFF_PHASE1_01_reserved1_SHIFT 12
2448
2449	/* M2MC :: HORIZ_FIR_1_COEFF_PHASE1_01 :: COEFF_1 [11:02] */
2450	#define BCHP_M2MC_HORIZ_FIR_1_COEFF_PHASE1_01_COEFF_1_MASK 0x00000ffc
2451	#define BCHP_M2MC_HORIZ_FIR_1_COEFF_PHASE1_01_COEFF_1_SHIFT 2
2452
2453	/* M2MC :: HORIZ_FIR_1_COEFF_PHASE1_01 :: reserved2 [01:00] */
2454	#define BCHP_M2MC_HORIZ_FIR_1_COEFF_PHASE1_01_reserved2_MASK 0x00000003
2455	#define BCHP_M2MC_HORIZ_FIR_1_COEFF_PHASE1_01_reserved2_SHIFT 0
2456
2457	/***************************************************************************
2458	*HORIZ_FIR_1_COEFF_PHASE1_2 - Horizontal Scaler 1 Poly-Phase Filter Phase 1 Coefficients
2459	***************************************************************************/
2460	/* M2MC :: HORIZ_FIR_1_COEFF_PHASE1_2 :: reserved0 [31:12] */
2461	#define BCHP_M2MC_HORIZ_FIR_1_COEFF_PHASE1_2_reserved0_MASK 0xfffff000
2462	#define BCHP_M2MC_HORIZ_FIR_1_COEFF_PHASE1_2_reserved0_SHIFT 12
2463
2464	/* M2MC :: HORIZ_FIR_1_COEFF_PHASE1_2 :: COEFF_2 [11:02] */
2465	#define BCHP_M2MC_HORIZ_FIR_1_COEFF_PHASE1_2_COEFF_2_MASK 0x00000ffc
2466	#define BCHP_M2MC_HORIZ_FIR_1_COEFF_PHASE1_2_COEFF_2_SHIFT 2
2467
2468	/* M2MC :: HORIZ_FIR_1_COEFF_PHASE1_2 :: reserved1 [01:00] */
2469	#define BCHP_M2MC_HORIZ_FIR_1_COEFF_PHASE1_2_reserved1_MASK 0x00000003
2470	#define BCHP_M2MC_HORIZ_FIR_1_COEFF_PHASE1_2_reserved1_SHIFT 0
2471
2472	/***************************************************************************
2473	*VERT_FIR_0_COEFF_PHASE0_01 - Vertical Scaler 0 Poly-Phase Filter Phase 0 Coefficients
2474	***************************************************************************/
2475	/* M2MC :: VERT_FIR_0_COEFF_PHASE0_01 :: reserved0 [31:28] */
2476	#define BCHP_M2MC_VERT_FIR_0_COEFF_PHASE0_01_reserved0_MASK 0xf0000000
2477	#define BCHP_M2MC_VERT_FIR_0_COEFF_PHASE0_01_reserved0_SHIFT 28
2478
2479	/* M2MC :: VERT_FIR_0_COEFF_PHASE0_01 :: COEFF_0 [27:18] */
2480	#define BCHP_M2MC_VERT_FIR_0_COEFF_PHASE0_01_COEFF_0_MASK 0x0ffc0000
2481	#define BCHP_M2MC_VERT_FIR_0_COEFF_PHASE0_01_COEFF_0_SHIFT 18
2482
2483	/* M2MC :: VERT_FIR_0_COEFF_PHASE0_01 :: reserved1 [17:12] */
2484	#define BCHP_M2MC_VERT_FIR_0_COEFF_PHASE0_01_reserved1_MASK 0x0003f000
2485	#define BCHP_M2MC_VERT_FIR_0_COEFF_PHASE0_01_reserved1_SHIFT 12
2486
2487	/* M2MC :: VERT_FIR_0_COEFF_PHASE0_01 :: COEFF_1 [11:02] */
2488	#define BCHP_M2MC_VERT_FIR_0_COEFF_PHASE0_01_COEFF_1_MASK 0x00000ffc
2489	#define BCHP_M2MC_VERT_FIR_0_COEFF_PHASE0_01_COEFF_1_SHIFT 2
2490
2491	/* M2MC :: VERT_FIR_0_COEFF_PHASE0_01 :: reserved2 [01:00] */
2492	#define BCHP_M2MC_VERT_FIR_0_COEFF_PHASE0_01_reserved2_MASK 0x00000003
2493	#define BCHP_M2MC_VERT_FIR_0_COEFF_PHASE0_01_reserved2_SHIFT 0
2494
2495	/***************************************************************************
2496	*VERT_FIR_0_COEFF_PHASE0_2 - Vertical Scaler 0 Poly-Phase Filter Phase 0 Coefficients
2497	***************************************************************************/
2498	/* M2MC :: VERT_FIR_0_COEFF_PHASE0_2 :: reserved0 [31:12] */
2499	#define BCHP_M2MC_VERT_FIR_0_COEFF_PHASE0_2_reserved0_MASK 0xfffff000
2500	#define BCHP_M2MC_VERT_FIR_0_COEFF_PHASE0_2_reserved0_SHIFT 12
2501
2502	/* M2MC :: VERT_FIR_0_COEFF_PHASE0_2 :: COEFF_2 [11:02] */
2503	#define BCHP_M2MC_VERT_FIR_0_COEFF_PHASE0_2_COEFF_2_MASK 0x00000ffc
2504	#define BCHP_M2MC_VERT_FIR_0_COEFF_PHASE0_2_COEFF_2_SHIFT 2
2505
2506	/* M2MC :: VERT_FIR_0_COEFF_PHASE0_2 :: reserved1 [01:00] */
2507	#define BCHP_M2MC_VERT_FIR_0_COEFF_PHASE0_2_reserved1_MASK 0x00000003
2508	#define BCHP_M2MC_VERT_FIR_0_COEFF_PHASE0_2_reserved1_SHIFT 0
2509
2510	/***************************************************************************
2511	*VERT_FIR_0_COEFF_PHASE1_01 - Vertical Scaler 0 Poly-Phase Filter Phase 1 Coefficients
2512	***************************************************************************/
2513	/* M2MC :: VERT_FIR_0_COEFF_PHASE1_01 :: reserved0 [31:28] */
2514	#define BCHP_M2MC_VERT_FIR_0_COEFF_PHASE1_01_reserved0_MASK 0xf0000000
2515	#define BCHP_M2MC_VERT_FIR_0_COEFF_PHASE1_01_reserved0_SHIFT 28
2516
2517	/* M2MC :: VERT_FIR_0_COEFF_PHASE1_01 :: COEFF_0 [27:18] */
2518	#define BCHP_M2MC_VERT_FIR_0_COEFF_PHASE1_01_COEFF_0_MASK 0x0ffc0000
2519	#define BCHP_M2MC_VERT_FIR_0_COEFF_PHASE1_01_COEFF_0_SHIFT 18
2520
2521	/* M2MC :: VERT_FIR_0_COEFF_PHASE1_01 :: reserved1 [17:12] */
2522	#define BCHP_M2MC_VERT_FIR_0_COEFF_PHASE1_01_reserved1_MASK 0x0003f000
2523	#define BCHP_M2MC_VERT_FIR_0_COEFF_PHASE1_01_reserved1_SHIFT 12
2524
2525	/* M2MC :: VERT_FIR_0_COEFF_PHASE1_01 :: COEFF_1 [11:02] */
2526	#define BCHP_M2MC_VERT_FIR_0_COEFF_PHASE1_01_COEFF_1_MASK 0x00000ffc
2527	#define BCHP_M2MC_VERT_FIR_0_COEFF_PHASE1_01_COEFF_1_SHIFT 2
2528
2529	/* M2MC :: VERT_FIR_0_COEFF_PHASE1_01 :: reserved2 [01:00] */
2530	#define BCHP_M2MC_VERT_FIR_0_COEFF_PHASE1_01_reserved2_MASK 0x00000003
2531	#define BCHP_M2MC_VERT_FIR_0_COEFF_PHASE1_01_reserved2_SHIFT 0
2532
2533	/***************************************************************************
2534	*VERT_FIR_0_COEFF_PHASE1_2 - Vertical Scaler 0 Poly-Phase Filter Phase 1 Coefficients
2535	***************************************************************************/
2536	/* M2MC :: VERT_FIR_0_COEFF_PHASE1_2 :: reserved0 [31:12] */
2537	#define BCHP_M2MC_VERT_FIR_0_COEFF_PHASE1_2_reserved0_MASK 0xfffff000
2538	#define BCHP_M2MC_VERT_FIR_0_COEFF_PHASE1_2_reserved0_SHIFT 12
2539
2540	/* M2MC :: VERT_FIR_0_COEFF_PHASE1_2 :: COEFF_2 [11:02] */
2541	#define BCHP_M2MC_VERT_FIR_0_COEFF_PHASE1_2_COEFF_2_MASK 0x00000ffc
2542	#define BCHP_M2MC_VERT_FIR_0_COEFF_PHASE1_2_COEFF_2_SHIFT 2
2543
2544	/* M2MC :: VERT_FIR_0_COEFF_PHASE1_2 :: reserved1 [01:00] */
2545	#define BCHP_M2MC_VERT_FIR_0_COEFF_PHASE1_2_reserved1_MASK 0x00000003
2546	#define BCHP_M2MC_VERT_FIR_0_COEFF_PHASE1_2_reserved1_SHIFT 0
2547
2548	/***************************************************************************
2549	*VERT_FIR_1_COEFF_PHASE0_01 - Vertical Scaler 1 Poly-Phase Filter Phase 0 Coefficients
2550	***************************************************************************/
2551	/* M2MC :: VERT_FIR_1_COEFF_PHASE0_01 :: reserved0 [31:28] */
2552	#define BCHP_M2MC_VERT_FIR_1_COEFF_PHASE0_01_reserved0_MASK 0xf0000000
2553	#define BCHP_M2MC_VERT_FIR_1_COEFF_PHASE0_01_reserved0_SHIFT 28
2554
2555	/* M2MC :: VERT_FIR_1_COEFF_PHASE0_01 :: COEFF_0 [27:18] */
2556	#define BCHP_M2MC_VERT_FIR_1_COEFF_PHASE0_01_COEFF_0_MASK 0x0ffc0000
2557	#define BCHP_M2MC_VERT_FIR_1_COEFF_PHASE0_01_COEFF_0_SHIFT 18
2558
2559	/* M2MC :: VERT_FIR_1_COEFF_PHASE0_01 :: reserved1 [17:12] */
2560	#define BCHP_M2MC_VERT_FIR_1_COEFF_PHASE0_01_reserved1_MASK 0x0003f000
2561	#define BCHP_M2MC_VERT_FIR_1_COEFF_PHASE0_01_reserved1_SHIFT 12
2562
2563	/* M2MC :: VERT_FIR_1_COEFF_PHASE0_01 :: COEFF_1 [11:02] */
2564	#define BCHP_M2MC_VERT_FIR_1_COEFF_PHASE0_01_COEFF_1_MASK 0x00000ffc
2565	#define BCHP_M2MC_VERT_FIR_1_COEFF_PHASE0_01_COEFF_1_SHIFT 2
2566
2567	/* M2MC :: VERT_FIR_1_COEFF_PHASE0_01 :: reserved2 [01:00] */
2568	#define BCHP_M2MC_VERT_FIR_1_COEFF_PHASE0_01_reserved2_MASK 0x00000003
2569	#define BCHP_M2MC_VERT_FIR_1_COEFF_PHASE0_01_reserved2_SHIFT 0
2570
2571	/***************************************************************************
2572	*VERT_FIR_1_COEFF_PHASE0_2 - Vertical Scaler 1 Poly-Phase Filter Phase 0 Coefficients
2573	***************************************************************************/
2574	/* M2MC :: VERT_FIR_1_COEFF_PHASE0_2 :: reserved0 [31:12] */
2575	#define BCHP_M2MC_VERT_FIR_1_COEFF_PHASE0_2_reserved0_MASK 0xfffff000
2576	#define BCHP_M2MC_VERT_FIR_1_COEFF_PHASE0_2_reserved0_SHIFT 12
2577
2578	/* M2MC :: VERT_FIR_1_COEFF_PHASE0_2 :: COEFF_2 [11:02] */
2579	#define BCHP_M2MC_VERT_FIR_1_COEFF_PHASE0_2_COEFF_2_MASK 0x00000ffc
2580	#define BCHP_M2MC_VERT_FIR_1_COEFF_PHASE0_2_COEFF_2_SHIFT 2
2581
2582	/* M2MC :: VERT_FIR_1_COEFF_PHASE0_2 :: reserved1 [01:00] */
2583	#define BCHP_M2MC_VERT_FIR_1_COEFF_PHASE0_2_reserved1_MASK 0x00000003
2584	#define BCHP_M2MC_VERT_FIR_1_COEFF_PHASE0_2_reserved1_SHIFT 0
2585
2586	/***************************************************************************
2587	*VERT_FIR_1_COEFF_PHASE1_01 - Vertical Scaler 1 Poly-Phase Filter Phase 1 Coefficients
2588	***************************************************************************/
2589	/* M2MC :: VERT_FIR_1_COEFF_PHASE1_01 :: reserved0 [31:28] */
2590	#define BCHP_M2MC_VERT_FIR_1_COEFF_PHASE1_01_reserved0_MASK 0xf0000000
2591	#define BCHP_M2MC_VERT_FIR_1_COEFF_PHASE1_01_reserved0_SHIFT 28
2592
2593	/* M2MC :: VERT_FIR_1_COEFF_PHASE1_01 :: COEFF_0 [27:18] */
2594	#define BCHP_M2MC_VERT_FIR_1_COEFF_PHASE1_01_COEFF_0_MASK 0x0ffc0000
2595	#define BCHP_M2MC_VERT_FIR_1_COEFF_PHASE1_01_COEFF_0_SHIFT 18
2596
2597	/* M2MC :: VERT_FIR_1_COEFF_PHASE1_01 :: reserved1 [17:12] */
2598	#define BCHP_M2MC_VERT_FIR_1_COEFF_PHASE1_01_reserved1_MASK 0x0003f000
2599	#define BCHP_M2MC_VERT_FIR_1_COEFF_PHASE1_01_reserved1_SHIFT 12
2600
2601	/* M2MC :: VERT_FIR_1_COEFF_PHASE1_01 :: COEFF_1 [11:02] */
2602	#define BCHP_M2MC_VERT_FIR_1_COEFF_PHASE1_01_COEFF_1_MASK 0x00000ffc
2603	#define BCHP_M2MC_VERT_FIR_1_COEFF_PHASE1_01_COEFF_1_SHIFT 2
2604
2605	/* M2MC :: VERT_FIR_1_COEFF_PHASE1_01 :: reserved2 [01:00] */
2606	#define BCHP_M2MC_VERT_FIR_1_COEFF_PHASE1_01_reserved2_MASK 0x00000003
2607	#define BCHP_M2MC_VERT_FIR_1_COEFF_PHASE1_01_reserved2_SHIFT 0
2608
2609	/***************************************************************************
2610	*VERT_FIR_1_COEFF_PHASE1_2 - Vertical Scaler 1 Poly-Phase Filter Phase 1 Coefficients
2611	***************************************************************************/
2612	/* M2MC :: VERT_FIR_1_COEFF_PHASE1_2 :: reserved0 [31:12] */
2613	#define BCHP_M2MC_VERT_FIR_1_COEFF_PHASE1_2_reserved0_MASK 0xfffff000
2614	#define BCHP_M2MC_VERT_FIR_1_COEFF_PHASE1_2_reserved0_SHIFT 12
2615
2616	/* M2MC :: VERT_FIR_1_COEFF_PHASE1_2 :: COEFF_2 [11:02] */
2617	#define BCHP_M2MC_VERT_FIR_1_COEFF_PHASE1_2_COEFF_2_MASK 0x00000ffc
2618	#define BCHP_M2MC_VERT_FIR_1_COEFF_PHASE1_2_COEFF_2_SHIFT 2
2619
2620	/* M2MC :: VERT_FIR_1_COEFF_PHASE1_2 :: reserved1 [01:00] */
2621	#define BCHP_M2MC_VERT_FIR_1_COEFF_PHASE1_2_reserved1_MASK 0x00000003
2622	#define BCHP_M2MC_VERT_FIR_1_COEFF_PHASE1_2_reserved1_SHIFT 0
2623
2624	/***************************************************************************
2625	*SRC_CM_C00_C01 - Color Conversion Matrix Coefficients C00 and C01
2626	***************************************************************************/
2627	/* M2MC :: SRC_CM_C00_C01 :: reserved0 [31:30] */
2628	#define BCHP_M2MC_SRC_CM_C00_C01_reserved0_MASK 0xc0000000
2629	#define BCHP_M2MC_SRC_CM_C00_C01_reserved0_SHIFT 30
2630
2631	/* M2MC :: SRC_CM_C00_C01 :: CM_C00 [29:16] */
2632	#define BCHP_M2MC_SRC_CM_C00_C01_CM_C00_MASK 0x3fff0000
2633	#define BCHP_M2MC_SRC_CM_C00_C01_CM_C00_SHIFT 16
2634
2635	/* M2MC :: SRC_CM_C00_C01 :: reserved1 [15:14] */
2636	#define BCHP_M2MC_SRC_CM_C00_C01_reserved1_MASK 0x0000c000
2637	#define BCHP_M2MC_SRC_CM_C00_C01_reserved1_SHIFT 14
2638
2639	/* M2MC :: SRC_CM_C00_C01 :: CM_C01 [13:00] */
2640	#define BCHP_M2MC_SRC_CM_C00_C01_CM_C01_MASK 0x00003fff
2641	#define BCHP_M2MC_SRC_CM_C00_C01_CM_C01_SHIFT 0
2642
2643	/***************************************************************************
2644	*SRC_CM_C02_C03 - Color Conversion Matrix Coefficients C02 and C03
2645	***************************************************************************/
2646	/* M2MC :: SRC_CM_C02_C03 :: reserved0 [31:30] */
2647	#define BCHP_M2MC_SRC_CM_C02_C03_reserved0_MASK 0xc0000000
2648	#define BCHP_M2MC_SRC_CM_C02_C03_reserved0_SHIFT 30
2649
2650	/* M2MC :: SRC_CM_C02_C03 :: CM_C02 [29:16] */
2651	#define BCHP_M2MC_SRC_CM_C02_C03_CM_C02_MASK 0x3fff0000
2652	#define BCHP_M2MC_SRC_CM_C02_C03_CM_C02_SHIFT 16
2653
2654	/* M2MC :: SRC_CM_C02_C03 :: reserved1 [15:14] */
2655	#define BCHP_M2MC_SRC_CM_C02_C03_reserved1_MASK 0x0000c000
2656	#define BCHP_M2MC_SRC_CM_C02_C03_reserved1_SHIFT 14
2657
2658	/* M2MC :: SRC_CM_C02_C03 :: CM_C03 [13:00] */
2659	#define BCHP_M2MC_SRC_CM_C02_C03_CM_C03_MASK 0x00003fff
2660	#define BCHP_M2MC_SRC_CM_C02_C03_CM_C03_SHIFT 0
2661
2662	/***************************************************************************
2663	*SRC_CM_C04 - Color Conversion Matrix Coefficients C04
2664	***************************************************************************/
2665	/* M2MC :: SRC_CM_C04 :: reserved0 [31:14] */
2666	#define BCHP_M2MC_SRC_CM_C04_reserved0_MASK 0xffffc000
2667	#define BCHP_M2MC_SRC_CM_C04_reserved0_SHIFT 14
2668
2669	/* M2MC :: SRC_CM_C04 :: CM_C04 [13:00] */
2670	#define BCHP_M2MC_SRC_CM_C04_CM_C04_MASK 0x00003fff
2671	#define BCHP_M2MC_SRC_CM_C04_CM_C04_SHIFT 0
2672
2673	/***************************************************************************
2674	*SRC_CM_C10_C11 - Color Conversion Matrix Coefficients C10 and C11
2675	***************************************************************************/
2676	/* M2MC :: SRC_CM_C10_C11 :: reserved0 [31:30] */
2677	#define BCHP_M2MC_SRC_CM_C10_C11_reserved0_MASK 0xc0000000
2678	#define BCHP_M2MC_SRC_CM_C10_C11_reserved0_SHIFT 30
2679
2680	/* M2MC :: SRC_CM_C10_C11 :: CM_C10 [29:16] */
2681	#define BCHP_M2MC_SRC_CM_C10_C11_CM_C10_MASK 0x3fff0000
2682	#define BCHP_M2MC_SRC_CM_C10_C11_CM_C10_SHIFT 16
2683
2684	/* M2MC :: SRC_CM_C10_C11 :: reserved1 [15:14] */
2685	#define BCHP_M2MC_SRC_CM_C10_C11_reserved1_MASK 0x0000c000
2686	#define BCHP_M2MC_SRC_CM_C10_C11_reserved1_SHIFT 14
2687
2688	/* M2MC :: SRC_CM_C10_C11 :: CM_C11 [13:00] */
2689	#define BCHP_M2MC_SRC_CM_C10_C11_CM_C11_MASK 0x00003fff
2690	#define BCHP_M2MC_SRC_CM_C10_C11_CM_C11_SHIFT 0
2691
2692	/***************************************************************************
2693	*SRC_CM_C12_C13 - Color Conversion Matrix Coefficients C12 and C13
2694	***************************************************************************/
2695	/* M2MC :: SRC_CM_C12_C13 :: reserved0 [31:30] */
2696	#define BCHP_M2MC_SRC_CM_C12_C13_reserved0_MASK 0xc0000000
2697	#define BCHP_M2MC_SRC_CM_C12_C13_reserved0_SHIFT 30
2698
2699	/* M2MC :: SRC_CM_C12_C13 :: CM_C12 [29:16] */
2700	#define BCHP_M2MC_SRC_CM_C12_C13_CM_C12_MASK 0x3fff0000
2701	#define BCHP_M2MC_SRC_CM_C12_C13_CM_C12_SHIFT 16
2702
2703	/* M2MC :: SRC_CM_C12_C13 :: reserved1 [15:14] */
2704	#define BCHP_M2MC_SRC_CM_C12_C13_reserved1_MASK 0x0000c000
2705	#define BCHP_M2MC_SRC_CM_C12_C13_reserved1_SHIFT 14
2706
2707	/* M2MC :: SRC_CM_C12_C13 :: CM_C13 [13:00] */
2708	#define BCHP_M2MC_SRC_CM_C12_C13_CM_C13_MASK 0x00003fff
2709	#define BCHP_M2MC_SRC_CM_C12_C13_CM_C13_SHIFT 0
2710
2711	/***************************************************************************
2712	*SRC_CM_C14 - Color Conversion Matrix Coefficients C14
2713	***************************************************************************/
2714	/* M2MC :: SRC_CM_C14 :: reserved0 [31:14] */
2715	#define BCHP_M2MC_SRC_CM_C14_reserved0_MASK 0xffffc000
2716	#define BCHP_M2MC_SRC_CM_C14_reserved0_SHIFT 14
2717
2718	/* M2MC :: SRC_CM_C14 :: CM_C14 [13:00] */
2719	#define BCHP_M2MC_SRC_CM_C14_CM_C14_MASK 0x00003fff
2720	#define BCHP_M2MC_SRC_CM_C14_CM_C14_SHIFT 0
2721
2722	/***************************************************************************
2723	*SRC_CM_C20_C21 - Color Conversion Matrix Coefficients C20 and C21
2724	***************************************************************************/
2725	/* M2MC :: SRC_CM_C20_C21 :: reserved0 [31:30] */
2726	#define BCHP_M2MC_SRC_CM_C20_C21_reserved0_MASK 0xc0000000
2727	#define BCHP_M2MC_SRC_CM_C20_C21_reserved0_SHIFT 30
2728
2729	/* M2MC :: SRC_CM_C20_C21 :: CM_C20 [29:16] */
2730	#define BCHP_M2MC_SRC_CM_C20_C21_CM_C20_MASK 0x3fff0000
2731	#define BCHP_M2MC_SRC_CM_C20_C21_CM_C20_SHIFT 16
2732
2733	/* M2MC :: SRC_CM_C20_C21 :: reserved1 [15:14] */
2734	#define BCHP_M2MC_SRC_CM_C20_C21_reserved1_MASK 0x0000c000
2735	#define BCHP_M2MC_SRC_CM_C20_C21_reserved1_SHIFT 14
2736
2737	/* M2MC :: SRC_CM_C20_C21 :: CM_C21 [13:00] */
2738	#define BCHP_M2MC_SRC_CM_C20_C21_CM_C21_MASK 0x00003fff
2739	#define BCHP_M2MC_SRC_CM_C20_C21_CM_C21_SHIFT 0
2740
2741	/***************************************************************************
2742	*SRC_CM_C22_C23 - Color Conversion Matrix Coefficients C22 and C23
2743	***************************************************************************/
2744	/* M2MC :: SRC_CM_C22_C23 :: reserved0 [31:30] */
2745	#define BCHP_M2MC_SRC_CM_C22_C23_reserved0_MASK 0xc0000000
2746	#define BCHP_M2MC_SRC_CM_C22_C23_reserved0_SHIFT 30
2747
2748	/* M2MC :: SRC_CM_C22_C23 :: CM_C22 [29:16] */
2749	#define BCHP_M2MC_SRC_CM_C22_C23_CM_C22_MASK 0x3fff0000
2750	#define BCHP_M2MC_SRC_CM_C22_C23_CM_C22_SHIFT 16
2751
2752	/* M2MC :: SRC_CM_C22_C23 :: reserved1 [15:14] */
2753	#define BCHP_M2MC_SRC_CM_C22_C23_reserved1_MASK 0x0000c000
2754	#define BCHP_M2MC_SRC_CM_C22_C23_reserved1_SHIFT 14
2755
2756	/* M2MC :: SRC_CM_C22_C23 :: CM_C23 [13:00] */
2757	#define BCHP_M2MC_SRC_CM_C22_C23_CM_C23_MASK 0x00003fff
2758	#define BCHP_M2MC_SRC_CM_C22_C23_CM_C23_SHIFT 0
2759
2760	/***************************************************************************
2761	*SRC_CM_C24 - Color Conversion Matrix Coefficients C24
2762	***************************************************************************/
2763	/* M2MC :: SRC_CM_C24 :: reserved0 [31:14] */
2764	#define BCHP_M2MC_SRC_CM_C24_reserved0_MASK 0xffffc000
2765	#define BCHP_M2MC_SRC_CM_C24_reserved0_SHIFT 14
2766
2767	/* M2MC :: SRC_CM_C24 :: CM_C24 [13:00] */
2768	#define BCHP_M2MC_SRC_CM_C24_CM_C24_MASK 0x00003fff
2769	#define BCHP_M2MC_SRC_CM_C24_CM_C24_SHIFT 0
2770
2771	/***************************************************************************
2772	*SRC_CM_C30_C31 - Color Conversion Matrix Coefficients C30 and C31
2773	***************************************************************************/
2774	/* M2MC :: SRC_CM_C30_C31 :: reserved0 [31:30] */
2775	#define BCHP_M2MC_SRC_CM_C30_C31_reserved0_MASK 0xc0000000
2776	#define BCHP_M2MC_SRC_CM_C30_C31_reserved0_SHIFT 30
2777
2778	/* M2MC :: SRC_CM_C30_C31 :: CM_C30 [29:16] */
2779	#define BCHP_M2MC_SRC_CM_C30_C31_CM_C30_MASK 0x3fff0000
2780	#define BCHP_M2MC_SRC_CM_C30_C31_CM_C30_SHIFT 16
2781
2782	/* M2MC :: SRC_CM_C30_C31 :: reserved1 [15:14] */
2783	#define BCHP_M2MC_SRC_CM_C30_C31_reserved1_MASK 0x0000c000
2784	#define BCHP_M2MC_SRC_CM_C30_C31_reserved1_SHIFT 14
2785
2786	/* M2MC :: SRC_CM_C30_C31 :: CM_C31 [13:00] */
2787	#define BCHP_M2MC_SRC_CM_C30_C31_CM_C31_MASK 0x00003fff
2788	#define BCHP_M2MC_SRC_CM_C30_C31_CM_C31_SHIFT 0
2789
2790	/***************************************************************************
2791	*SRC_CM_C32_C33 - Color Conversion Matrix Coefficients C32 and C33
2792	***************************************************************************/
2793	/* M2MC :: SRC_CM_C32_C33 :: reserved0 [31:30] */
2794	#define BCHP_M2MC_SRC_CM_C32_C33_reserved0_MASK 0xc0000000
2795	#define BCHP_M2MC_SRC_CM_C32_C33_reserved0_SHIFT 30
2796
2797	/* M2MC :: SRC_CM_C32_C33 :: CM_C32 [29:16] */
2798	#define BCHP_M2MC_SRC_CM_C32_C33_CM_C32_MASK 0x3fff0000
2799	#define BCHP_M2MC_SRC_CM_C32_C33_CM_C32_SHIFT 16
2800
2801	/* M2MC :: SRC_CM_C32_C33 :: reserved1 [15:14] */
2802	#define BCHP_M2MC_SRC_CM_C32_C33_reserved1_MASK 0x0000c000
2803	#define BCHP_M2MC_SRC_CM_C32_C33_reserved1_SHIFT 14
2804
2805	/* M2MC :: SRC_CM_C32_C33 :: CM_C33 [13:00] */
2806	#define BCHP_M2MC_SRC_CM_C32_C33_CM_C33_MASK 0x00003fff
2807	#define BCHP_M2MC_SRC_CM_C32_C33_CM_C33_SHIFT 0
2808
2809	/***************************************************************************
2810	*SRC_CM_C34 - Color Conversion Matrix Coefficients C34
2811	***************************************************************************/
2812	/* M2MC :: SRC_CM_C34 :: reserved0 [31:14] */
2813	#define BCHP_M2MC_SRC_CM_C34_reserved0_MASK 0xffffc000
2814	#define BCHP_M2MC_SRC_CM_C34_reserved0_SHIFT 14
2815
2816	/* M2MC :: SRC_CM_C34 :: CM_C34 [13:00] */
2817	#define BCHP_M2MC_SRC_CM_C34_CM_C34_MASK 0x00003fff
2818	#define BCHP_M2MC_SRC_CM_C34_CM_C34_SHIFT 0
2819
2820	/***************************************************************************
2821	*TIMEOUT_COUNTER_CONTROL - M2MC timeout counter control register
2822	***************************************************************************/
2823	/* M2MC :: TIMEOUT_COUNTER_CONTROL :: TIMEOUT_COUNTER_ENABLE [31:31] */
2824	#define BCHP_M2MC_TIMEOUT_COUNTER_CONTROL_TIMEOUT_COUNTER_ENABLE_MASK 0x80000000
2825	#define BCHP_M2MC_TIMEOUT_COUNTER_CONTROL_TIMEOUT_COUNTER_ENABLE_SHIFT 31
2826	#define BCHP_M2MC_TIMEOUT_COUNTER_CONTROL_TIMEOUT_COUNTER_ENABLE_DEFAULT 0x00000000
2827	#define BCHP_M2MC_TIMEOUT_COUNTER_CONTROL_TIMEOUT_COUNTER_ENABLE_DISABLE 0
2828	#define BCHP_M2MC_TIMEOUT_COUNTER_CONTROL_TIMEOUT_COUNTER_ENABLE_ENABLE 1
2829
2830	/* M2MC :: TIMEOUT_COUNTER_CONTROL :: TIMEOUT_COUNT_VALUE [30:00] */
2831	#define BCHP_M2MC_TIMEOUT_COUNTER_CONTROL_TIMEOUT_COUNT_VALUE_MASK 0x7fffffff
2832	#define BCHP_M2MC_TIMEOUT_COUNTER_CONTROL_TIMEOUT_COUNT_VALUE_SHIFT 0
2833
2834	/***************************************************************************
2835	*CLK_GATE_AND_SW_INIT_CONTROL - M2MC clock gating and software init control register
2836	***************************************************************************/
2837	/* M2MC :: CLK_GATE_AND_SW_INIT_CONTROL :: reserved0 [31:09] */
2838	#define BCHP_M2MC_CLK_GATE_AND_SW_INIT_CONTROL_reserved0_MASK 0xfffffe00
2839	#define BCHP_M2MC_CLK_GATE_AND_SW_INIT_CONTROL_reserved0_SHIFT 9
2840
2841	/* M2MC :: CLK_GATE_AND_SW_INIT_CONTROL :: INTER_BLT_CLK_GATE_ENABLE [08:08] */
2842	#define BCHP_M2MC_CLK_GATE_AND_SW_INIT_CONTROL_INTER_BLT_CLK_GATE_ENABLE_MASK 0x00000100
2843	#define BCHP_M2MC_CLK_GATE_AND_SW_INIT_CONTROL_INTER_BLT_CLK_GATE_ENABLE_SHIFT 8
2844	#define BCHP_M2MC_CLK_GATE_AND_SW_INIT_CONTROL_INTER_BLT_CLK_GATE_ENABLE_DEFAULT 0x00000000
2845
2846	/* M2MC :: CLK_GATE_AND_SW_INIT_CONTROL :: reserved1 [07:01] */
2847	#define BCHP_M2MC_CLK_GATE_AND_SW_INIT_CONTROL_reserved1_MASK 0x000000fe
2848	#define BCHP_M2MC_CLK_GATE_AND_SW_INIT_CONTROL_reserved1_SHIFT 1
2849
2850	/* M2MC :: CLK_GATE_AND_SW_INIT_CONTROL :: START_SW_INIT [00:00] */
2851	#define BCHP_M2MC_CLK_GATE_AND_SW_INIT_CONTROL_START_SW_INIT_MASK 0x00000001
2852	#define BCHP_M2MC_CLK_GATE_AND_SW_INIT_CONTROL_START_SW_INIT_SHIFT 0
2853	#define BCHP_M2MC_CLK_GATE_AND_SW_INIT_CONTROL_START_SW_INIT_DEFAULT 0x00000000
2854
2855	/***************************************************************************
2856	*SRC_CLUT_ENTRY_%i - Source CLUT RAM entry 000..255
2857	***************************************************************************/
2858	#define BCHP_M2MC_SRC_CLUT_ENTRY_i_ARRAY_BASE 0x00450400
2859	#define BCHP_M2MC_SRC_CLUT_ENTRY_i_ARRAY_START 0
2860	#define BCHP_M2MC_SRC_CLUT_ENTRY_i_ARRAY_END 255
2861	#define BCHP_M2MC_SRC_CLUT_ENTRY_i_ARRAY_ELEMENT_SIZE 32
2862
2863	/***************************************************************************
2864	*SRC_CLUT_ENTRY_%i - Source CLUT RAM entry 000..255
2865	***************************************************************************/
2866	/* M2MC :: SRC_CLUT_ENTRY_i :: ALPHA [31:24] */
2867	#define BCHP_M2MC_SRC_CLUT_ENTRY_i_ALPHA_MASK 0xff000000
2868	#define BCHP_M2MC_SRC_CLUT_ENTRY_i_ALPHA_SHIFT 24
2869
2870	/* M2MC :: SRC_CLUT_ENTRY_i :: RED [23:16] */
2871	#define BCHP_M2MC_SRC_CLUT_ENTRY_i_RED_MASK 0x00ff0000
2872	#define BCHP_M2MC_SRC_CLUT_ENTRY_i_RED_SHIFT 16
2873
2874	/* M2MC :: SRC_CLUT_ENTRY_i :: GREEN [15:08] */
2875	#define BCHP_M2MC_SRC_CLUT_ENTRY_i_GREEN_MASK 0x0000ff00
2876	#define BCHP_M2MC_SRC_CLUT_ENTRY_i_GREEN_SHIFT 8
2877
2878	/* M2MC :: SRC_CLUT_ENTRY_i :: BLUE [07:00] */
2879	#define BCHP_M2MC_SRC_CLUT_ENTRY_i_BLUE_MASK 0x000000ff
2880	#define BCHP_M2MC_SRC_CLUT_ENTRY_i_BLUE_SHIFT 0
2881
2882
2883	#endif /* #ifndef BCHP_M2MC_H__ */
2884
2885	/* End of File */

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source: svn/newcon3bcm2_21bu/magnum/basemodules/chp/7552/rdb/b0/bchp_m2mc.h

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