| 1 | /*************************************************************************** |
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| 2 | * Copyright (c) 1999-2012, Broadcom Corporation |
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| 3 | * All Rights Reserved |
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| 4 | * Confidential Property of Broadcom Corporation |
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| 5 | * |
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| 6 | * |
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| 7 | * THIS SOFTWARE MAY ONLY BE USED SUBJECT TO AN EXECUTED SOFTWARE LICENSE |
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| 8 | * AGREEMENT BETWEEN THE USER AND BROADCOM. YOU HAVE NO RIGHT TO USE OR |
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| 9 | * EXPLOIT THIS MATERIAL EXCEPT SUBJECT TO THE TERMS OF SUCH AN AGREEMENT. |
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| 10 | * |
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| 11 | * $brcm_Workfile: bchp_misc.h $ |
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| 12 | * $brcm_Revision: Hydra_Software_Devel/2 $ |
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| 13 | * $brcm_Date: 2/7/12 1:35p $ |
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| 14 | * |
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| 15 | * Module Description: |
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| 16 | * DO NOT EDIT THIS FILE DIRECTLY |
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| 17 | * |
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| 18 | * This module was generated magically with RDB from a source description |
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| 19 | * file. You must edit the source file for changes to be made to this file. |
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| 20 | * |
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| 21 | * |
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| 22 | * Date: Generated on Tue Feb 7 10:59:54 2012 |
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| 23 | * MD5 Checksum d41d8cd98f00b204e9800998ecf8427e |
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| 24 | * |
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| 25 | * Compiled with: RDB Utility combo_header.pl |
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| 26 | * RDB Parser 3.0 |
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| 27 | * unknown unknown |
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| 28 | * Perl Interpreter 5.008008 |
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| 29 | * Operating System linux |
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| 30 | * |
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| 31 | * Revision History: |
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| 32 | * |
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| 33 | * $brcm_Log: /magnum/basemodules/chp/7552/rdb/b0/bchp_misc.h $ |
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| 34 | * |
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| 35 | * Hydra_Software_Devel/2 2/7/12 1:35p pntruong |
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| 36 | * SW7552-89: Synced up with central rdb. |
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| 37 | * |
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| 38 | ***************************************************************************/ |
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| 39 | |
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| 40 | #ifndef BCHP_MISC_H__ |
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| 41 | #define BCHP_MISC_H__ |
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| 42 | |
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| 43 | /*************************************************************************** |
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| 44 | *MISC - VEC Registers |
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| 45 | ***************************************************************************/ |
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| 46 | #define BCHP_MISC_MISC_REVISION_ID 0x00680000 /* Revision ID Register */ |
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| 47 | #define BCHP_MISC_DAC_0_CFG 0x00680004 /* Config register for DAC_0 */ |
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| 48 | #define BCHP_MISC_DAC_1_CFG 0x00680008 /* Config register for DAC_1 */ |
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| 49 | #define BCHP_MISC_DAC_2_CFG 0x0068000c /* Config register for DAC_2 */ |
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| 50 | #define BCHP_MISC_DAC_3_CFG 0x00680010 /* Config register for DAC_3 */ |
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| 51 | #define BCHP_MISC_SYNC_0_CFG 0x00680014 /* Config Register for Sync Port 0 */ |
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| 52 | #define BCHP_MISC_SYNC_1_CFG 0x00680018 /* Config Register for Sync Port 1 */ |
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| 53 | #define BCHP_MISC_RFM_0_CFG 0x0068001c /* Config Register for RF Port 0 */ |
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| 54 | #define BCHP_MISC_RFM_0_SYNC_0_CFG 0x00680020 /* Sync Config Register 0 for RF Port 0 */ |
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| 55 | #define BCHP_MISC_IT_0_MASTER_SEL 0x00680024 /* Master Select for IT_0 */ |
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| 56 | #define BCHP_MISC_IT_1_MASTER_SEL 0x00680028 /* Master Select for IT_1 */ |
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| 57 | #define BCHP_MISC_DVI_DTG_0_MASTER_SEL 0x0068002c /* Master Select for DVI DTG_0 */ |
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| 58 | #define BCHP_MISC_DVI_0_SA_CONFIG 0x00680030 /* SA config for DVI 0 */ |
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| 59 | #define BCHP_MISC_DVI_0_SA_CH0_STATUS 0x00680034 /* SA status for channel 0 for DVI 0 */ |
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| 60 | #define BCHP_MISC_DVI_0_SA_CH1_STATUS 0x00680038 /* SA status for channel 1 for DVI 0 */ |
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| 61 | #define BCHP_MISC_DVI_0_SA_CH2_STATUS 0x0068003c /* SA status for channel 2 for DVI 0 */ |
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| 62 | #define BCHP_MISC_ADC_CTRL_0 0x00680040 /* ADC control register for DAC0 */ |
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| 63 | #define BCHP_MISC_DAC_BIAS_CTRL_0 0x00680044 /* DAC bais control register for DAC0 */ |
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| 64 | #define BCHP_MISC_DAC_CAL_CTRL_0 0x00680048 /* DAC calibration control register for DAC0 */ |
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| 65 | #define BCHP_MISC_DAC_CAL_ADC_DATA_0 0x0068004c /* DAC calibration cal ADC data register for DAC0 */ |
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| 66 | #define BCHP_MISC_DAC_ADC_DATA_0 0x00680050 /* DAC calibration adc data register for DAC0 */ |
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| 67 | #define BCHP_MISC_DAC_CTRL_0 0x00680054 /* DAC control register for DAC0 */ |
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| 68 | #define BCHP_MISC_DAC_DETECT_CTRL_0 0x00680058 /* DAC CABLE DETECT control register for DAC0 */ |
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| 69 | #define BCHP_MISC_DAC_DETECT_EN_0 0x0068005c /* DAC CABLE DETECT Enable register for DAC0 */ |
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| 70 | #define BCHP_MISC_DAC_DETECT_SYNC_CTRL_0 0x00680060 /* DAC sync present register */ |
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| 71 | #define BCHP_MISC_DAC_SQWAVE_LEVEL_0 0x00680064 /* Square Wave levels for cable detect */ |
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| 72 | #define BCHP_MISC_DAC_DETECT_TIMING_0 0x00680068 /* Cable Detect timing control register */ |
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| 73 | #define BCHP_MISC_DAC_CABLE_STATUS_0 0x0068006c /* DAC cable connect status */ |
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| 74 | #define BCHP_MISC_DAC_CABLE_DETECT_DEBUG_0 0x00680070 /* Dac Cable detect debug register */ |
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| 75 | #define BCHP_MISC_DAC_CRC_CTRL 0x00680074 /* Dac CRC control register */ |
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| 76 | #define BCHP_MISC_DAC_CRC_VALUE 0x00680078 /* DAC CRC value register */ |
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| 77 | #define BCHP_MISC_DAC_CRC_STATUS 0x0068007c /* DAC CRC status register */ |
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| 78 | |
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| 79 | /*************************************************************************** |
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| 80 | *MISC_REVISION_ID - Revision ID Register |
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| 81 | ***************************************************************************/ |
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| 82 | /* MISC :: MISC_REVISION_ID :: reserved0 [31:16] */ |
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| 83 | #define BCHP_MISC_MISC_REVISION_ID_reserved0_MASK 0xffff0000 |
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| 84 | #define BCHP_MISC_MISC_REVISION_ID_reserved0_SHIFT 16 |
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| 85 | |
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| 86 | /* MISC :: MISC_REVISION_ID :: REVISION_ID [15:00] */ |
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| 87 | #define BCHP_MISC_MISC_REVISION_ID_REVISION_ID_MASK 0x0000ffff |
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| 88 | #define BCHP_MISC_MISC_REVISION_ID_REVISION_ID_SHIFT 0 |
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| 89 | #define BCHP_MISC_MISC_REVISION_ID_REVISION_ID_DEFAULT 0x00005200 |
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| 90 | |
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| 91 | /*************************************************************************** |
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| 92 | *DAC_0_CFG - Config register for DAC_0 |
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| 93 | ***************************************************************************/ |
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| 94 | /* MISC :: DAC_0_CFG :: reserved0 [31:26] */ |
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| 95 | #define BCHP_MISC_DAC_0_CFG_reserved0_MASK 0xfc000000 |
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| 96 | #define BCHP_MISC_DAC_0_CFG_reserved0_SHIFT 26 |
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| 97 | |
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| 98 | /* MISC :: DAC_0_CFG :: CONST [25:16] */ |
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| 99 | #define BCHP_MISC_DAC_0_CFG_CONST_MASK 0x03ff0000 |
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| 100 | #define BCHP_MISC_DAC_0_CFG_CONST_SHIFT 16 |
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| 101 | #define BCHP_MISC_DAC_0_CFG_CONST_DEFAULT 0x00000000 |
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| 102 | |
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| 103 | /* MISC :: DAC_0_CFG :: reserved1 [15:13] */ |
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| 104 | #define BCHP_MISC_DAC_0_CFG_reserved1_MASK 0x0000e000 |
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| 105 | #define BCHP_MISC_DAC_0_CFG_reserved1_SHIFT 13 |
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| 106 | |
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| 107 | /* MISC :: DAC_0_CFG :: SINC [12:12] */ |
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| 108 | #define BCHP_MISC_DAC_0_CFG_SINC_MASK 0x00001000 |
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| 109 | #define BCHP_MISC_DAC_0_CFG_SINC_SHIFT 12 |
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| 110 | #define BCHP_MISC_DAC_0_CFG_SINC_DEFAULT 0x00000001 |
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| 111 | #define BCHP_MISC_DAC_0_CFG_SINC_ON 1 |
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| 112 | #define BCHP_MISC_DAC_0_CFG_SINC_OFF 0 |
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| 113 | |
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| 114 | /* MISC :: DAC_0_CFG :: DELAY [11:08] */ |
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| 115 | #define BCHP_MISC_DAC_0_CFG_DELAY_MASK 0x00000f00 |
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| 116 | #define BCHP_MISC_DAC_0_CFG_DELAY_SHIFT 8 |
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| 117 | #define BCHP_MISC_DAC_0_CFG_DELAY_DEFAULT 0x00000000 |
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| 118 | |
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| 119 | /* MISC :: DAC_0_CFG :: SEL [07:00] */ |
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| 120 | #define BCHP_MISC_DAC_0_CFG_SEL_MASK 0x000000ff |
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| 121 | #define BCHP_MISC_DAC_0_CFG_SEL_SHIFT 0 |
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| 122 | #define BCHP_MISC_DAC_0_CFG_SEL_DEFAULT 0x00000007 |
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| 123 | #define BCHP_MISC_DAC_0_CFG_SEL_SDSRC_0_CH0 0 |
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| 124 | #define BCHP_MISC_DAC_0_CFG_SEL_SDSRC_0_CH1 1 |
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| 125 | #define BCHP_MISC_DAC_0_CFG_SEL_SDSRC_0_CH2 2 |
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| 126 | #define BCHP_MISC_DAC_0_CFG_SEL_HDSRC_0_CH0 3 |
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| 127 | #define BCHP_MISC_DAC_0_CFG_SEL_HDSRC_0_CH1 4 |
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| 128 | #define BCHP_MISC_DAC_0_CFG_SEL_HDSRC_0_CH2 5 |
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| 129 | #define BCHP_MISC_DAC_0_CFG_SEL_GRPD_0_CVBS 6 |
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| 130 | #define BCHP_MISC_DAC_0_CFG_SEL_CONST 7 |
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| 131 | |
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| 132 | /*************************************************************************** |
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| 133 | *DAC_1_CFG - Config register for DAC_1 |
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| 134 | ***************************************************************************/ |
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| 135 | /* MISC :: DAC_1_CFG :: reserved0 [31:26] */ |
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| 136 | #define BCHP_MISC_DAC_1_CFG_reserved0_MASK 0xfc000000 |
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| 137 | #define BCHP_MISC_DAC_1_CFG_reserved0_SHIFT 26 |
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| 138 | |
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| 139 | /* MISC :: DAC_1_CFG :: CONST [25:16] */ |
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| 140 | #define BCHP_MISC_DAC_1_CFG_CONST_MASK 0x03ff0000 |
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| 141 | #define BCHP_MISC_DAC_1_CFG_CONST_SHIFT 16 |
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| 142 | #define BCHP_MISC_DAC_1_CFG_CONST_DEFAULT 0x00000000 |
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| 143 | |
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| 144 | /* MISC :: DAC_1_CFG :: reserved1 [15:13] */ |
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| 145 | #define BCHP_MISC_DAC_1_CFG_reserved1_MASK 0x0000e000 |
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| 146 | #define BCHP_MISC_DAC_1_CFG_reserved1_SHIFT 13 |
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| 147 | |
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| 148 | /* MISC :: DAC_1_CFG :: SINC [12:12] */ |
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| 149 | #define BCHP_MISC_DAC_1_CFG_SINC_MASK 0x00001000 |
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| 150 | #define BCHP_MISC_DAC_1_CFG_SINC_SHIFT 12 |
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| 151 | #define BCHP_MISC_DAC_1_CFG_SINC_DEFAULT 0x00000001 |
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| 152 | #define BCHP_MISC_DAC_1_CFG_SINC_ON 1 |
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| 153 | #define BCHP_MISC_DAC_1_CFG_SINC_OFF 0 |
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| 154 | |
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| 155 | /* MISC :: DAC_1_CFG :: DELAY [11:08] */ |
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| 156 | #define BCHP_MISC_DAC_1_CFG_DELAY_MASK 0x00000f00 |
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| 157 | #define BCHP_MISC_DAC_1_CFG_DELAY_SHIFT 8 |
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| 158 | #define BCHP_MISC_DAC_1_CFG_DELAY_DEFAULT 0x00000000 |
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| 159 | |
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| 160 | /* MISC :: DAC_1_CFG :: SEL [07:00] */ |
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| 161 | #define BCHP_MISC_DAC_1_CFG_SEL_MASK 0x000000ff |
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| 162 | #define BCHP_MISC_DAC_1_CFG_SEL_SHIFT 0 |
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| 163 | #define BCHP_MISC_DAC_1_CFG_SEL_DEFAULT 0x00000007 |
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| 164 | #define BCHP_MISC_DAC_1_CFG_SEL_SDSRC_0_CH0 0 |
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| 165 | #define BCHP_MISC_DAC_1_CFG_SEL_SDSRC_0_CH1 1 |
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| 166 | #define BCHP_MISC_DAC_1_CFG_SEL_SDSRC_0_CH2 2 |
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| 167 | #define BCHP_MISC_DAC_1_CFG_SEL_HDSRC_0_CH0 3 |
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| 168 | #define BCHP_MISC_DAC_1_CFG_SEL_HDSRC_0_CH1 4 |
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| 169 | #define BCHP_MISC_DAC_1_CFG_SEL_HDSRC_0_CH2 5 |
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| 170 | #define BCHP_MISC_DAC_1_CFG_SEL_GRPD_0_CVBS 6 |
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| 171 | #define BCHP_MISC_DAC_1_CFG_SEL_CONST 7 |
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| 172 | |
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| 173 | /*************************************************************************** |
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| 174 | *DAC_2_CFG - Config register for DAC_2 |
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| 175 | ***************************************************************************/ |
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| 176 | /* MISC :: DAC_2_CFG :: reserved0 [31:26] */ |
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| 177 | #define BCHP_MISC_DAC_2_CFG_reserved0_MASK 0xfc000000 |
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| 178 | #define BCHP_MISC_DAC_2_CFG_reserved0_SHIFT 26 |
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| 179 | |
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| 180 | /* MISC :: DAC_2_CFG :: CONST [25:16] */ |
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| 181 | #define BCHP_MISC_DAC_2_CFG_CONST_MASK 0x03ff0000 |
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| 182 | #define BCHP_MISC_DAC_2_CFG_CONST_SHIFT 16 |
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| 183 | #define BCHP_MISC_DAC_2_CFG_CONST_DEFAULT 0x00000000 |
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| 184 | |
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| 185 | /* MISC :: DAC_2_CFG :: reserved1 [15:13] */ |
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| 186 | #define BCHP_MISC_DAC_2_CFG_reserved1_MASK 0x0000e000 |
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| 187 | #define BCHP_MISC_DAC_2_CFG_reserved1_SHIFT 13 |
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| 188 | |
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| 189 | /* MISC :: DAC_2_CFG :: SINC [12:12] */ |
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| 190 | #define BCHP_MISC_DAC_2_CFG_SINC_MASK 0x00001000 |
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| 191 | #define BCHP_MISC_DAC_2_CFG_SINC_SHIFT 12 |
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| 192 | #define BCHP_MISC_DAC_2_CFG_SINC_DEFAULT 0x00000001 |
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| 193 | #define BCHP_MISC_DAC_2_CFG_SINC_ON 1 |
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| 194 | #define BCHP_MISC_DAC_2_CFG_SINC_OFF 0 |
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| 195 | |
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| 196 | /* MISC :: DAC_2_CFG :: DELAY [11:08] */ |
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| 197 | #define BCHP_MISC_DAC_2_CFG_DELAY_MASK 0x00000f00 |
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| 198 | #define BCHP_MISC_DAC_2_CFG_DELAY_SHIFT 8 |
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| 199 | #define BCHP_MISC_DAC_2_CFG_DELAY_DEFAULT 0x00000000 |
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| 200 | |
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| 201 | /* MISC :: DAC_2_CFG :: SEL [07:00] */ |
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| 202 | #define BCHP_MISC_DAC_2_CFG_SEL_MASK 0x000000ff |
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| 203 | #define BCHP_MISC_DAC_2_CFG_SEL_SHIFT 0 |
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| 204 | #define BCHP_MISC_DAC_2_CFG_SEL_DEFAULT 0x00000007 |
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| 205 | #define BCHP_MISC_DAC_2_CFG_SEL_SDSRC_0_CH0 0 |
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| 206 | #define BCHP_MISC_DAC_2_CFG_SEL_SDSRC_0_CH1 1 |
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| 207 | #define BCHP_MISC_DAC_2_CFG_SEL_SDSRC_0_CH2 2 |
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| 208 | #define BCHP_MISC_DAC_2_CFG_SEL_HDSRC_0_CH0 3 |
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| 209 | #define BCHP_MISC_DAC_2_CFG_SEL_HDSRC_0_CH1 4 |
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| 210 | #define BCHP_MISC_DAC_2_CFG_SEL_HDSRC_0_CH2 5 |
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| 211 | #define BCHP_MISC_DAC_2_CFG_SEL_GRPD_0_CVBS 6 |
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| 212 | #define BCHP_MISC_DAC_2_CFG_SEL_CONST 7 |
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| 213 | |
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| 214 | /*************************************************************************** |
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| 215 | *DAC_3_CFG - Config register for DAC_3 |
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| 216 | ***************************************************************************/ |
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| 217 | /* MISC :: DAC_3_CFG :: reserved0 [31:26] */ |
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| 218 | #define BCHP_MISC_DAC_3_CFG_reserved0_MASK 0xfc000000 |
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| 219 | #define BCHP_MISC_DAC_3_CFG_reserved0_SHIFT 26 |
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| 220 | |
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| 221 | /* MISC :: DAC_3_CFG :: CONST [25:16] */ |
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| 222 | #define BCHP_MISC_DAC_3_CFG_CONST_MASK 0x03ff0000 |
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| 223 | #define BCHP_MISC_DAC_3_CFG_CONST_SHIFT 16 |
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| 224 | #define BCHP_MISC_DAC_3_CFG_CONST_DEFAULT 0x00000000 |
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| 225 | |
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| 226 | /* MISC :: DAC_3_CFG :: reserved1 [15:13] */ |
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| 227 | #define BCHP_MISC_DAC_3_CFG_reserved1_MASK 0x0000e000 |
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| 228 | #define BCHP_MISC_DAC_3_CFG_reserved1_SHIFT 13 |
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| 229 | |
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| 230 | /* MISC :: DAC_3_CFG :: SINC [12:12] */ |
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| 231 | #define BCHP_MISC_DAC_3_CFG_SINC_MASK 0x00001000 |
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| 232 | #define BCHP_MISC_DAC_3_CFG_SINC_SHIFT 12 |
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| 233 | #define BCHP_MISC_DAC_3_CFG_SINC_DEFAULT 0x00000001 |
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| 234 | #define BCHP_MISC_DAC_3_CFG_SINC_ON 1 |
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| 235 | #define BCHP_MISC_DAC_3_CFG_SINC_OFF 0 |
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| 236 | |
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| 237 | /* MISC :: DAC_3_CFG :: DELAY [11:08] */ |
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| 238 | #define BCHP_MISC_DAC_3_CFG_DELAY_MASK 0x00000f00 |
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| 239 | #define BCHP_MISC_DAC_3_CFG_DELAY_SHIFT 8 |
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| 240 | #define BCHP_MISC_DAC_3_CFG_DELAY_DEFAULT 0x00000000 |
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| 241 | |
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| 242 | /* MISC :: DAC_3_CFG :: SEL [07:00] */ |
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| 243 | #define BCHP_MISC_DAC_3_CFG_SEL_MASK 0x000000ff |
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| 244 | #define BCHP_MISC_DAC_3_CFG_SEL_SHIFT 0 |
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| 245 | #define BCHP_MISC_DAC_3_CFG_SEL_DEFAULT 0x00000007 |
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| 246 | #define BCHP_MISC_DAC_3_CFG_SEL_SDSRC_0_CH0 0 |
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| 247 | #define BCHP_MISC_DAC_3_CFG_SEL_SDSRC_0_CH1 1 |
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| 248 | #define BCHP_MISC_DAC_3_CFG_SEL_SDSRC_0_CH2 2 |
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| 249 | #define BCHP_MISC_DAC_3_CFG_SEL_HDSRC_0_CH0 3 |
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| 250 | #define BCHP_MISC_DAC_3_CFG_SEL_HDSRC_0_CH1 4 |
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| 251 | #define BCHP_MISC_DAC_3_CFG_SEL_HDSRC_0_CH2 5 |
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| 252 | #define BCHP_MISC_DAC_3_CFG_SEL_GRPD_0_CVBS 6 |
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| 253 | #define BCHP_MISC_DAC_3_CFG_SEL_CONST 7 |
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| 254 | |
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| 255 | /*************************************************************************** |
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| 256 | *SYNC_0_CFG - Config Register for Sync Port 0 |
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| 257 | ***************************************************************************/ |
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| 258 | /* MISC :: SYNC_0_CFG :: reserved0 [31:16] */ |
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| 259 | #define BCHP_MISC_SYNC_0_CFG_reserved0_MASK 0xffff0000 |
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| 260 | #define BCHP_MISC_SYNC_0_CFG_reserved0_SHIFT 16 |
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| 261 | |
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| 262 | /* MISC :: SYNC_0_CFG :: VS_DELAY [15:12] */ |
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| 263 | #define BCHP_MISC_SYNC_0_CFG_VS_DELAY_MASK 0x0000f000 |
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| 264 | #define BCHP_MISC_SYNC_0_CFG_VS_DELAY_SHIFT 12 |
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| 265 | #define BCHP_MISC_SYNC_0_CFG_VS_DELAY_DEFAULT 0x00000000 |
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| 266 | |
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| 267 | /* MISC :: SYNC_0_CFG :: HS_DELAY [11:08] */ |
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| 268 | #define BCHP_MISC_SYNC_0_CFG_HS_DELAY_MASK 0x00000f00 |
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| 269 | #define BCHP_MISC_SYNC_0_CFG_HS_DELAY_SHIFT 8 |
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| 270 | #define BCHP_MISC_SYNC_0_CFG_HS_DELAY_DEFAULT 0x00000000 |
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| 271 | |
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| 272 | /* MISC :: SYNC_0_CFG :: SEL [07:00] */ |
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| 273 | #define BCHP_MISC_SYNC_0_CFG_SEL_MASK 0x000000ff |
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| 274 | #define BCHP_MISC_SYNC_0_CFG_SEL_SHIFT 0 |
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| 275 | #define BCHP_MISC_SYNC_0_CFG_SEL_DEFAULT 0x00000000 |
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| 276 | #define BCHP_MISC_SYNC_0_CFG_SEL_SDSRC_0 0 |
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| 277 | |
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| 278 | /*************************************************************************** |
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| 279 | *SYNC_1_CFG - Config Register for Sync Port 1 |
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| 280 | ***************************************************************************/ |
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| 281 | /* MISC :: SYNC_1_CFG :: reserved0 [31:16] */ |
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| 282 | #define BCHP_MISC_SYNC_1_CFG_reserved0_MASK 0xffff0000 |
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| 283 | #define BCHP_MISC_SYNC_1_CFG_reserved0_SHIFT 16 |
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| 284 | |
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| 285 | /* MISC :: SYNC_1_CFG :: VS_DELAY [15:12] */ |
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| 286 | #define BCHP_MISC_SYNC_1_CFG_VS_DELAY_MASK 0x0000f000 |
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| 287 | #define BCHP_MISC_SYNC_1_CFG_VS_DELAY_SHIFT 12 |
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| 288 | #define BCHP_MISC_SYNC_1_CFG_VS_DELAY_DEFAULT 0x00000000 |
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| 289 | |
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| 290 | /* MISC :: SYNC_1_CFG :: HS_DELAY [11:08] */ |
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| 291 | #define BCHP_MISC_SYNC_1_CFG_HS_DELAY_MASK 0x00000f00 |
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| 292 | #define BCHP_MISC_SYNC_1_CFG_HS_DELAY_SHIFT 8 |
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| 293 | #define BCHP_MISC_SYNC_1_CFG_HS_DELAY_DEFAULT 0x00000000 |
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| 294 | |
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| 295 | /* MISC :: SYNC_1_CFG :: SEL [07:00] */ |
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| 296 | #define BCHP_MISC_SYNC_1_CFG_SEL_MASK 0x000000ff |
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| 297 | #define BCHP_MISC_SYNC_1_CFG_SEL_SHIFT 0 |
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| 298 | #define BCHP_MISC_SYNC_1_CFG_SEL_DEFAULT 0x00000000 |
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| 299 | #define BCHP_MISC_SYNC_1_CFG_SEL_SDSRC_0 0 |
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| 300 | |
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| 301 | /*************************************************************************** |
|---|
| 302 | *RFM_0_CFG - Config Register for RF Port 0 |
|---|
| 303 | ***************************************************************************/ |
|---|
| 304 | /* MISC :: RFM_0_CFG :: reserved0 [31:19] */ |
|---|
| 305 | #define BCHP_MISC_RFM_0_CFG_reserved0_MASK 0xfff80000 |
|---|
| 306 | #define BCHP_MISC_RFM_0_CFG_reserved0_SHIFT 19 |
|---|
| 307 | |
|---|
| 308 | /* MISC :: RFM_0_CFG :: CONST [18:08] */ |
|---|
| 309 | #define BCHP_MISC_RFM_0_CFG_CONST_MASK 0x0007ff00 |
|---|
| 310 | #define BCHP_MISC_RFM_0_CFG_CONST_SHIFT 8 |
|---|
| 311 | |
|---|
| 312 | /* MISC :: RFM_0_CFG :: SEL [07:00] */ |
|---|
| 313 | #define BCHP_MISC_RFM_0_CFG_SEL_MASK 0x000000ff |
|---|
| 314 | #define BCHP_MISC_RFM_0_CFG_SEL_SHIFT 0 |
|---|
| 315 | #define BCHP_MISC_RFM_0_CFG_SEL_DEFAULT 0x00000000 |
|---|
| 316 | #define BCHP_MISC_RFM_0_CFG_SEL_SDSRC_0 0 |
|---|
| 317 | #define BCHP_MISC_RFM_0_CFG_SEL_CONST 1 |
|---|
| 318 | |
|---|
| 319 | /*************************************************************************** |
|---|
| 320 | *RFM_0_SYNC_0_CFG - Sync Config Register 0 for RF Port 0 |
|---|
| 321 | ***************************************************************************/ |
|---|
| 322 | /* MISC :: RFM_0_SYNC_0_CFG :: reserved0 [31:04] */ |
|---|
| 323 | #define BCHP_MISC_RFM_0_SYNC_0_CFG_reserved0_MASK 0xfffffff0 |
|---|
| 324 | #define BCHP_MISC_RFM_0_SYNC_0_CFG_reserved0_SHIFT 4 |
|---|
| 325 | |
|---|
| 326 | /* MISC :: RFM_0_SYNC_0_CFG :: SEL [03:00] */ |
|---|
| 327 | #define BCHP_MISC_RFM_0_SYNC_0_CFG_SEL_MASK 0x0000000f |
|---|
| 328 | #define BCHP_MISC_RFM_0_SYNC_0_CFG_SEL_SHIFT 0 |
|---|
| 329 | #define BCHP_MISC_RFM_0_SYNC_0_CFG_SEL_DEFAULT 0x00000000 |
|---|
| 330 | #define BCHP_MISC_RFM_0_SYNC_0_CFG_SEL_SDSRC_0 0 |
|---|
| 331 | |
|---|
| 332 | /*************************************************************************** |
|---|
| 333 | *IT_0_MASTER_SEL - Master Select for IT_0 |
|---|
| 334 | ***************************************************************************/ |
|---|
| 335 | /* MISC :: IT_0_MASTER_SEL :: reserved0 [31:02] */ |
|---|
| 336 | #define BCHP_MISC_IT_0_MASTER_SEL_reserved0_MASK 0xfffffffc |
|---|
| 337 | #define BCHP_MISC_IT_0_MASTER_SEL_reserved0_SHIFT 2 |
|---|
| 338 | |
|---|
| 339 | /* MISC :: IT_0_MASTER_SEL :: SELECT [01:00] */ |
|---|
| 340 | #define BCHP_MISC_IT_0_MASTER_SEL_SELECT_MASK 0x00000003 |
|---|
| 341 | #define BCHP_MISC_IT_0_MASTER_SEL_SELECT_SHIFT 0 |
|---|
| 342 | #define BCHP_MISC_IT_0_MASTER_SEL_SELECT_DEFAULT 0x00000000 |
|---|
| 343 | #define BCHP_MISC_IT_0_MASTER_SEL_SELECT_IT_0 0 |
|---|
| 344 | #define BCHP_MISC_IT_0_MASTER_SEL_SELECT_IT_1 1 |
|---|
| 345 | #define BCHP_MISC_IT_0_MASTER_SEL_SELECT_DVI_DTG_0 2 |
|---|
| 346 | |
|---|
| 347 | /*************************************************************************** |
|---|
| 348 | *IT_1_MASTER_SEL - Master Select for IT_1 |
|---|
| 349 | ***************************************************************************/ |
|---|
| 350 | /* MISC :: IT_1_MASTER_SEL :: reserved0 [31:02] */ |
|---|
| 351 | #define BCHP_MISC_IT_1_MASTER_SEL_reserved0_MASK 0xfffffffc |
|---|
| 352 | #define BCHP_MISC_IT_1_MASTER_SEL_reserved0_SHIFT 2 |
|---|
| 353 | |
|---|
| 354 | /* MISC :: IT_1_MASTER_SEL :: SELECT [01:00] */ |
|---|
| 355 | #define BCHP_MISC_IT_1_MASTER_SEL_SELECT_MASK 0x00000003 |
|---|
| 356 | #define BCHP_MISC_IT_1_MASTER_SEL_SELECT_SHIFT 0 |
|---|
| 357 | #define BCHP_MISC_IT_1_MASTER_SEL_SELECT_DEFAULT 0x00000000 |
|---|
| 358 | #define BCHP_MISC_IT_1_MASTER_SEL_SELECT_IT_0 0 |
|---|
| 359 | #define BCHP_MISC_IT_1_MASTER_SEL_SELECT_IT_1 1 |
|---|
| 360 | #define BCHP_MISC_IT_1_MASTER_SEL_SELECT_DVI_DTG_0 2 |
|---|
| 361 | |
|---|
| 362 | /*************************************************************************** |
|---|
| 363 | *DVI_DTG_0_MASTER_SEL - Master Select for DVI DTG_0 |
|---|
| 364 | ***************************************************************************/ |
|---|
| 365 | /* MISC :: DVI_DTG_0_MASTER_SEL :: reserved0 [31:03] */ |
|---|
| 366 | #define BCHP_MISC_DVI_DTG_0_MASTER_SEL_reserved0_MASK 0xfffffff8 |
|---|
| 367 | #define BCHP_MISC_DVI_DTG_0_MASTER_SEL_reserved0_SHIFT 3 |
|---|
| 368 | |
|---|
| 369 | /* MISC :: DVI_DTG_0_MASTER_SEL :: FREERUN [02:02] */ |
|---|
| 370 | #define BCHP_MISC_DVI_DTG_0_MASTER_SEL_FREERUN_MASK 0x00000004 |
|---|
| 371 | #define BCHP_MISC_DVI_DTG_0_MASTER_SEL_FREERUN_SHIFT 2 |
|---|
| 372 | #define BCHP_MISC_DVI_DTG_0_MASTER_SEL_FREERUN_DEFAULT 0x00000000 |
|---|
| 373 | |
|---|
| 374 | /* MISC :: DVI_DTG_0_MASTER_SEL :: SELECT [01:00] */ |
|---|
| 375 | #define BCHP_MISC_DVI_DTG_0_MASTER_SEL_SELECT_MASK 0x00000003 |
|---|
| 376 | #define BCHP_MISC_DVI_DTG_0_MASTER_SEL_SELECT_SHIFT 0 |
|---|
| 377 | #define BCHP_MISC_DVI_DTG_0_MASTER_SEL_SELECT_DEFAULT 0x00000000 |
|---|
| 378 | #define BCHP_MISC_DVI_DTG_0_MASTER_SEL_SELECT_IT_0 0 |
|---|
| 379 | #define BCHP_MISC_DVI_DTG_0_MASTER_SEL_SELECT_IT_1 1 |
|---|
| 380 | #define BCHP_MISC_DVI_DTG_0_MASTER_SEL_SELECT_DVI_DTG_0 2 |
|---|
| 381 | |
|---|
| 382 | /*************************************************************************** |
|---|
| 383 | *DVI_0_SA_CONFIG - SA config for DVI 0 |
|---|
| 384 | ***************************************************************************/ |
|---|
| 385 | /* MISC :: DVI_0_SA_CONFIG :: reserved0 [31:11] */ |
|---|
| 386 | #define BCHP_MISC_DVI_0_SA_CONFIG_reserved0_MASK 0xfffff800 |
|---|
| 387 | #define BCHP_MISC_DVI_0_SA_CONFIG_reserved0_SHIFT 11 |
|---|
| 388 | |
|---|
| 389 | /* MISC :: DVI_0_SA_CONFIG :: EDGE_SELECT [10:09] */ |
|---|
| 390 | #define BCHP_MISC_DVI_0_SA_CONFIG_EDGE_SELECT_MASK 0x00000600 |
|---|
| 391 | #define BCHP_MISC_DVI_0_SA_CONFIG_EDGE_SELECT_SHIFT 9 |
|---|
| 392 | #define BCHP_MISC_DVI_0_SA_CONFIG_EDGE_SELECT_DEFAULT 0x00000000 |
|---|
| 393 | #define BCHP_MISC_DVI_0_SA_CONFIG_EDGE_SELECT_RISE_EDGE 0 |
|---|
| 394 | #define BCHP_MISC_DVI_0_SA_CONFIG_EDGE_SELECT_FALL_EDGE 1 |
|---|
| 395 | #define BCHP_MISC_DVI_0_SA_CONFIG_EDGE_SELECT_BOTH_EDGES 2 |
|---|
| 396 | #define BCHP_MISC_DVI_0_SA_CONFIG_EDGE_SELECT_NOT_DEFINED 3 |
|---|
| 397 | |
|---|
| 398 | /* MISC :: DVI_0_SA_CONFIG :: SA_CH0_EN [08:08] */ |
|---|
| 399 | #define BCHP_MISC_DVI_0_SA_CONFIG_SA_CH0_EN_MASK 0x00000100 |
|---|
| 400 | #define BCHP_MISC_DVI_0_SA_CONFIG_SA_CH0_EN_SHIFT 8 |
|---|
| 401 | #define BCHP_MISC_DVI_0_SA_CONFIG_SA_CH0_EN_DEFAULT 0x00000000 |
|---|
| 402 | #define BCHP_MISC_DVI_0_SA_CONFIG_SA_CH0_EN_ON 1 |
|---|
| 403 | #define BCHP_MISC_DVI_0_SA_CONFIG_SA_CH0_EN_OFF 0 |
|---|
| 404 | |
|---|
| 405 | /* MISC :: DVI_0_SA_CONFIG :: SA_CH1_EN [07:07] */ |
|---|
| 406 | #define BCHP_MISC_DVI_0_SA_CONFIG_SA_CH1_EN_MASK 0x00000080 |
|---|
| 407 | #define BCHP_MISC_DVI_0_SA_CONFIG_SA_CH1_EN_SHIFT 7 |
|---|
| 408 | #define BCHP_MISC_DVI_0_SA_CONFIG_SA_CH1_EN_DEFAULT 0x00000000 |
|---|
| 409 | #define BCHP_MISC_DVI_0_SA_CONFIG_SA_CH1_EN_ON 1 |
|---|
| 410 | #define BCHP_MISC_DVI_0_SA_CONFIG_SA_CH1_EN_OFF 0 |
|---|
| 411 | |
|---|
| 412 | /* MISC :: DVI_0_SA_CONFIG :: SA_CH2_EN [06:06] */ |
|---|
| 413 | #define BCHP_MISC_DVI_0_SA_CONFIG_SA_CH2_EN_MASK 0x00000040 |
|---|
| 414 | #define BCHP_MISC_DVI_0_SA_CONFIG_SA_CH2_EN_SHIFT 6 |
|---|
| 415 | #define BCHP_MISC_DVI_0_SA_CONFIG_SA_CH2_EN_DEFAULT 0x00000000 |
|---|
| 416 | #define BCHP_MISC_DVI_0_SA_CONFIG_SA_CH2_EN_ON 1 |
|---|
| 417 | #define BCHP_MISC_DVI_0_SA_CONFIG_SA_CH2_EN_OFF 0 |
|---|
| 418 | |
|---|
| 419 | /* MISC :: DVI_0_SA_CONFIG :: SA_CH0_CLEAR [05:05] */ |
|---|
| 420 | #define BCHP_MISC_DVI_0_SA_CONFIG_SA_CH0_CLEAR_MASK 0x00000020 |
|---|
| 421 | #define BCHP_MISC_DVI_0_SA_CONFIG_SA_CH0_CLEAR_SHIFT 5 |
|---|
| 422 | #define BCHP_MISC_DVI_0_SA_CONFIG_SA_CH0_CLEAR_DEFAULT 0x00000000 |
|---|
| 423 | #define BCHP_MISC_DVI_0_SA_CONFIG_SA_CH0_CLEAR_ON 1 |
|---|
| 424 | #define BCHP_MISC_DVI_0_SA_CONFIG_SA_CH0_CLEAR_OFF 0 |
|---|
| 425 | |
|---|
| 426 | /* MISC :: DVI_0_SA_CONFIG :: SA_CH1_CLEAR [04:04] */ |
|---|
| 427 | #define BCHP_MISC_DVI_0_SA_CONFIG_SA_CH1_CLEAR_MASK 0x00000010 |
|---|
| 428 | #define BCHP_MISC_DVI_0_SA_CONFIG_SA_CH1_CLEAR_SHIFT 4 |
|---|
| 429 | #define BCHP_MISC_DVI_0_SA_CONFIG_SA_CH1_CLEAR_DEFAULT 0x00000000 |
|---|
| 430 | #define BCHP_MISC_DVI_0_SA_CONFIG_SA_CH1_CLEAR_ON 1 |
|---|
| 431 | #define BCHP_MISC_DVI_0_SA_CONFIG_SA_CH1_CLEAR_OFF 0 |
|---|
| 432 | |
|---|
| 433 | /* MISC :: DVI_0_SA_CONFIG :: SA_CH2_CLEAR [03:03] */ |
|---|
| 434 | #define BCHP_MISC_DVI_0_SA_CONFIG_SA_CH2_CLEAR_MASK 0x00000008 |
|---|
| 435 | #define BCHP_MISC_DVI_0_SA_CONFIG_SA_CH2_CLEAR_SHIFT 3 |
|---|
| 436 | #define BCHP_MISC_DVI_0_SA_CONFIG_SA_CH2_CLEAR_DEFAULT 0x00000000 |
|---|
| 437 | #define BCHP_MISC_DVI_0_SA_CONFIG_SA_CH2_CLEAR_ON 1 |
|---|
| 438 | #define BCHP_MISC_DVI_0_SA_CONFIG_SA_CH2_CLEAR_OFF 0 |
|---|
| 439 | |
|---|
| 440 | /* MISC :: DVI_0_SA_CONFIG :: SA_PROBE_RATE [02:00] */ |
|---|
| 441 | #define BCHP_MISC_DVI_0_SA_CONFIG_SA_PROBE_RATE_MASK 0x00000007 |
|---|
| 442 | #define BCHP_MISC_DVI_0_SA_CONFIG_SA_PROBE_RATE_SHIFT 0 |
|---|
| 443 | #define BCHP_MISC_DVI_0_SA_CONFIG_SA_PROBE_RATE_DEFAULT 0x00000001 |
|---|
| 444 | #define BCHP_MISC_DVI_0_SA_CONFIG_SA_PROBE_RATE_ZERO 0 |
|---|
| 445 | #define BCHP_MISC_DVI_0_SA_CONFIG_SA_PROBE_RATE_PER_WINDOW 1 |
|---|
| 446 | #define BCHP_MISC_DVI_0_SA_CONFIG_SA_PROBE_RATE_PER_2WINDOWS 2 |
|---|
| 447 | #define BCHP_MISC_DVI_0_SA_CONFIG_SA_PROBE_RATE_PER_3WINDOWS 3 |
|---|
| 448 | #define BCHP_MISC_DVI_0_SA_CONFIG_SA_PROBE_RATE_PER_4WINDOWS 4 |
|---|
| 449 | #define BCHP_MISC_DVI_0_SA_CONFIG_SA_PROBE_RATE_PER_5WINDOWS 5 |
|---|
| 450 | #define BCHP_MISC_DVI_0_SA_CONFIG_SA_PROBE_RATE_PER_6WINDOWS 6 |
|---|
| 451 | #define BCHP_MISC_DVI_0_SA_CONFIG_SA_PROBE_RATE_PER_7WINDOWS 7 |
|---|
| 452 | |
|---|
| 453 | /*************************************************************************** |
|---|
| 454 | *DVI_0_SA_CH0_STATUS - SA status for channel 0 for DVI 0 |
|---|
| 455 | ***************************************************************************/ |
|---|
| 456 | /* MISC :: DVI_0_SA_CH0_STATUS :: STATUS [31:00] */ |
|---|
| 457 | #define BCHP_MISC_DVI_0_SA_CH0_STATUS_STATUS_MASK 0xffffffff |
|---|
| 458 | #define BCHP_MISC_DVI_0_SA_CH0_STATUS_STATUS_SHIFT 0 |
|---|
| 459 | |
|---|
| 460 | /*************************************************************************** |
|---|
| 461 | *DVI_0_SA_CH1_STATUS - SA status for channel 1 for DVI 0 |
|---|
| 462 | ***************************************************************************/ |
|---|
| 463 | /* MISC :: DVI_0_SA_CH1_STATUS :: STATUS [31:00] */ |
|---|
| 464 | #define BCHP_MISC_DVI_0_SA_CH1_STATUS_STATUS_MASK 0xffffffff |
|---|
| 465 | #define BCHP_MISC_DVI_0_SA_CH1_STATUS_STATUS_SHIFT 0 |
|---|
| 466 | |
|---|
| 467 | /*************************************************************************** |
|---|
| 468 | *DVI_0_SA_CH2_STATUS - SA status for channel 2 for DVI 0 |
|---|
| 469 | ***************************************************************************/ |
|---|
| 470 | /* MISC :: DVI_0_SA_CH2_STATUS :: STATUS [31:00] */ |
|---|
| 471 | #define BCHP_MISC_DVI_0_SA_CH2_STATUS_STATUS_MASK 0xffffffff |
|---|
| 472 | #define BCHP_MISC_DVI_0_SA_CH2_STATUS_STATUS_SHIFT 0 |
|---|
| 473 | |
|---|
| 474 | /*************************************************************************** |
|---|
| 475 | *ADC_CTRL_0 - ADC control register for DAC0 |
|---|
| 476 | ***************************************************************************/ |
|---|
| 477 | /* MISC :: ADC_CTRL_0 :: reserved0 [31:09] */ |
|---|
| 478 | #define BCHP_MISC_ADC_CTRL_0_reserved0_MASK 0xfffffe00 |
|---|
| 479 | #define BCHP_MISC_ADC_CTRL_0_reserved0_SHIFT 9 |
|---|
| 480 | |
|---|
| 481 | /* MISC :: ADC_CTRL_0 :: RESETB [08:08] */ |
|---|
| 482 | #define BCHP_MISC_ADC_CTRL_0_RESETB_MASK 0x00000100 |
|---|
| 483 | #define BCHP_MISC_ADC_CTRL_0_RESETB_SHIFT 8 |
|---|
| 484 | #define BCHP_MISC_ADC_CTRL_0_RESETB_DEFAULT 0x00000001 |
|---|
| 485 | |
|---|
| 486 | /* MISC :: ADC_CTRL_0 :: CTRL [07:04] */ |
|---|
| 487 | #define BCHP_MISC_ADC_CTRL_0_CTRL_MASK 0x000000f0 |
|---|
| 488 | #define BCHP_MISC_ADC_CTRL_0_CTRL_SHIFT 4 |
|---|
| 489 | #define BCHP_MISC_ADC_CTRL_0_CTRL_DEFAULT 0x00000000 |
|---|
| 490 | |
|---|
| 491 | /* MISC :: ADC_CTRL_0 :: MUX_MODE [03:03] */ |
|---|
| 492 | #define BCHP_MISC_ADC_CTRL_0_MUX_MODE_MASK 0x00000008 |
|---|
| 493 | #define BCHP_MISC_ADC_CTRL_0_MUX_MODE_SHIFT 3 |
|---|
| 494 | #define BCHP_MISC_ADC_CTRL_0_MUX_MODE_DEFAULT 0x00000001 |
|---|
| 495 | #define BCHP_MISC_ADC_CTRL_0_MUX_MODE_T_N_H 0 |
|---|
| 496 | #define BCHP_MISC_ADC_CTRL_0_MUX_MODE_SCALED 1 |
|---|
| 497 | |
|---|
| 498 | /* MISC :: ADC_CTRL_0 :: CH_SEL [02:01] */ |
|---|
| 499 | #define BCHP_MISC_ADC_CTRL_0_CH_SEL_MASK 0x00000006 |
|---|
| 500 | #define BCHP_MISC_ADC_CTRL_0_CH_SEL_SHIFT 1 |
|---|
| 501 | #define BCHP_MISC_ADC_CTRL_0_CH_SEL_DEFAULT 0x00000000 |
|---|
| 502 | #define BCHP_MISC_ADC_CTRL_0_CH_SEL_DAC0 0 |
|---|
| 503 | #define BCHP_MISC_ADC_CTRL_0_CH_SEL_DAC1 1 |
|---|
| 504 | #define BCHP_MISC_ADC_CTRL_0_CH_SEL_DAC2 2 |
|---|
| 505 | #define BCHP_MISC_ADC_CTRL_0_CH_SEL_DAC3 3 |
|---|
| 506 | |
|---|
| 507 | /* MISC :: ADC_CTRL_0 :: PWRDN [00:00] */ |
|---|
| 508 | #define BCHP_MISC_ADC_CTRL_0_PWRDN_MASK 0x00000001 |
|---|
| 509 | #define BCHP_MISC_ADC_CTRL_0_PWRDN_SHIFT 0 |
|---|
| 510 | #define BCHP_MISC_ADC_CTRL_0_PWRDN_DEFAULT 0x00000000 |
|---|
| 511 | |
|---|
| 512 | /*************************************************************************** |
|---|
| 513 | *DAC_BIAS_CTRL_0 - DAC bais control register for DAC0 |
|---|
| 514 | ***************************************************************************/ |
|---|
| 515 | /* MISC :: DAC_BIAS_CTRL_0 :: TBD3 [31:31] */ |
|---|
| 516 | #define BCHP_MISC_DAC_BIAS_CTRL_0_TBD3_MASK 0x80000000 |
|---|
| 517 | #define BCHP_MISC_DAC_BIAS_CTRL_0_TBD3_SHIFT 31 |
|---|
| 518 | |
|---|
| 519 | /* MISC :: DAC_BIAS_CTRL_0 :: DAC3_SCALE_LP [30:30] */ |
|---|
| 520 | #define BCHP_MISC_DAC_BIAS_CTRL_0_DAC3_SCALE_LP_MASK 0x40000000 |
|---|
| 521 | #define BCHP_MISC_DAC_BIAS_CTRL_0_DAC3_SCALE_LP_SHIFT 30 |
|---|
| 522 | #define BCHP_MISC_DAC_BIAS_CTRL_0_DAC3_SCALE_LP_DEFAULT 0x00000000 |
|---|
| 523 | |
|---|
| 524 | /* MISC :: DAC_BIAS_CTRL_0 :: DAC3_SCALE_SEL [29:28] */ |
|---|
| 525 | #define BCHP_MISC_DAC_BIAS_CTRL_0_DAC3_SCALE_SEL_MASK 0x30000000 |
|---|
| 526 | #define BCHP_MISC_DAC_BIAS_CTRL_0_DAC3_SCALE_SEL_SHIFT 28 |
|---|
| 527 | #define BCHP_MISC_DAC_BIAS_CTRL_0_DAC3_SCALE_SEL_DEFAULT 0x00000003 |
|---|
| 528 | #define BCHP_MISC_DAC_BIAS_CTRL_0_DAC3_SCALE_SEL_SCALE_0 0 |
|---|
| 529 | #define BCHP_MISC_DAC_BIAS_CTRL_0_DAC3_SCALE_SEL_SCALE_1 1 |
|---|
| 530 | #define BCHP_MISC_DAC_BIAS_CTRL_0_DAC3_SCALE_SEL_SCALE_2 2 |
|---|
| 531 | #define BCHP_MISC_DAC_BIAS_CTRL_0_DAC3_SCALE_SEL_SCALE_3 3 |
|---|
| 532 | |
|---|
| 533 | /* MISC :: DAC_BIAS_CTRL_0 :: TBD2 [27:27] */ |
|---|
| 534 | #define BCHP_MISC_DAC_BIAS_CTRL_0_TBD2_MASK 0x08000000 |
|---|
| 535 | #define BCHP_MISC_DAC_BIAS_CTRL_0_TBD2_SHIFT 27 |
|---|
| 536 | |
|---|
| 537 | /* MISC :: DAC_BIAS_CTRL_0 :: DAC2_SCALE_LP [26:26] */ |
|---|
| 538 | #define BCHP_MISC_DAC_BIAS_CTRL_0_DAC2_SCALE_LP_MASK 0x04000000 |
|---|
| 539 | #define BCHP_MISC_DAC_BIAS_CTRL_0_DAC2_SCALE_LP_SHIFT 26 |
|---|
| 540 | #define BCHP_MISC_DAC_BIAS_CTRL_0_DAC2_SCALE_LP_DEFAULT 0x00000000 |
|---|
| 541 | |
|---|
| 542 | /* MISC :: DAC_BIAS_CTRL_0 :: DAC2_SCALE_SEL [25:24] */ |
|---|
| 543 | #define BCHP_MISC_DAC_BIAS_CTRL_0_DAC2_SCALE_SEL_MASK 0x03000000 |
|---|
| 544 | #define BCHP_MISC_DAC_BIAS_CTRL_0_DAC2_SCALE_SEL_SHIFT 24 |
|---|
| 545 | #define BCHP_MISC_DAC_BIAS_CTRL_0_DAC2_SCALE_SEL_DEFAULT 0x00000003 |
|---|
| 546 | #define BCHP_MISC_DAC_BIAS_CTRL_0_DAC2_SCALE_SEL_SCALE_0 0 |
|---|
| 547 | #define BCHP_MISC_DAC_BIAS_CTRL_0_DAC2_SCALE_SEL_SCALE_1 1 |
|---|
| 548 | #define BCHP_MISC_DAC_BIAS_CTRL_0_DAC2_SCALE_SEL_SCALE_2 2 |
|---|
| 549 | #define BCHP_MISC_DAC_BIAS_CTRL_0_DAC2_SCALE_SEL_SCALE_3 3 |
|---|
| 550 | |
|---|
| 551 | /* MISC :: DAC_BIAS_CTRL_0 :: TBD1 [23:23] */ |
|---|
| 552 | #define BCHP_MISC_DAC_BIAS_CTRL_0_TBD1_MASK 0x00800000 |
|---|
| 553 | #define BCHP_MISC_DAC_BIAS_CTRL_0_TBD1_SHIFT 23 |
|---|
| 554 | |
|---|
| 555 | /* MISC :: DAC_BIAS_CTRL_0 :: DAC1_SCALE_LP [22:22] */ |
|---|
| 556 | #define BCHP_MISC_DAC_BIAS_CTRL_0_DAC1_SCALE_LP_MASK 0x00400000 |
|---|
| 557 | #define BCHP_MISC_DAC_BIAS_CTRL_0_DAC1_SCALE_LP_SHIFT 22 |
|---|
| 558 | #define BCHP_MISC_DAC_BIAS_CTRL_0_DAC1_SCALE_LP_DEFAULT 0x00000000 |
|---|
| 559 | |
|---|
| 560 | /* MISC :: DAC_BIAS_CTRL_0 :: DAC1_SCALE_SEL [21:20] */ |
|---|
| 561 | #define BCHP_MISC_DAC_BIAS_CTRL_0_DAC1_SCALE_SEL_MASK 0x00300000 |
|---|
| 562 | #define BCHP_MISC_DAC_BIAS_CTRL_0_DAC1_SCALE_SEL_SHIFT 20 |
|---|
| 563 | #define BCHP_MISC_DAC_BIAS_CTRL_0_DAC1_SCALE_SEL_DEFAULT 0x00000003 |
|---|
| 564 | #define BCHP_MISC_DAC_BIAS_CTRL_0_DAC1_SCALE_SEL_SCALE_0 0 |
|---|
| 565 | #define BCHP_MISC_DAC_BIAS_CTRL_0_DAC1_SCALE_SEL_SCALE_1 1 |
|---|
| 566 | #define BCHP_MISC_DAC_BIAS_CTRL_0_DAC1_SCALE_SEL_SCALE_2 2 |
|---|
| 567 | #define BCHP_MISC_DAC_BIAS_CTRL_0_DAC1_SCALE_SEL_SCALE_3 3 |
|---|
| 568 | |
|---|
| 569 | /* MISC :: DAC_BIAS_CTRL_0 :: TBD0 [19:19] */ |
|---|
| 570 | #define BCHP_MISC_DAC_BIAS_CTRL_0_TBD0_MASK 0x00080000 |
|---|
| 571 | #define BCHP_MISC_DAC_BIAS_CTRL_0_TBD0_SHIFT 19 |
|---|
| 572 | |
|---|
| 573 | /* MISC :: DAC_BIAS_CTRL_0 :: DAC0_SCALE_LP [18:18] */ |
|---|
| 574 | #define BCHP_MISC_DAC_BIAS_CTRL_0_DAC0_SCALE_LP_MASK 0x00040000 |
|---|
| 575 | #define BCHP_MISC_DAC_BIAS_CTRL_0_DAC0_SCALE_LP_SHIFT 18 |
|---|
| 576 | #define BCHP_MISC_DAC_BIAS_CTRL_0_DAC0_SCALE_LP_DEFAULT 0x00000000 |
|---|
| 577 | |
|---|
| 578 | /* MISC :: DAC_BIAS_CTRL_0 :: DAC0_SCALE_SEL [17:16] */ |
|---|
| 579 | #define BCHP_MISC_DAC_BIAS_CTRL_0_DAC0_SCALE_SEL_MASK 0x00030000 |
|---|
| 580 | #define BCHP_MISC_DAC_BIAS_CTRL_0_DAC0_SCALE_SEL_SHIFT 16 |
|---|
| 581 | #define BCHP_MISC_DAC_BIAS_CTRL_0_DAC0_SCALE_SEL_DEFAULT 0x00000003 |
|---|
| 582 | #define BCHP_MISC_DAC_BIAS_CTRL_0_DAC0_SCALE_SEL_SCALE_0 0 |
|---|
| 583 | #define BCHP_MISC_DAC_BIAS_CTRL_0_DAC0_SCALE_SEL_SCALE_1 1 |
|---|
| 584 | #define BCHP_MISC_DAC_BIAS_CTRL_0_DAC0_SCALE_SEL_SCALE_2 2 |
|---|
| 585 | #define BCHP_MISC_DAC_BIAS_CTRL_0_DAC0_SCALE_SEL_SCALE_3 3 |
|---|
| 586 | |
|---|
| 587 | /* MISC :: DAC_BIAS_CTRL_0 :: GAIN_ADJ [15:08] */ |
|---|
| 588 | #define BCHP_MISC_DAC_BIAS_CTRL_0_GAIN_ADJ_MASK 0x0000ff00 |
|---|
| 589 | #define BCHP_MISC_DAC_BIAS_CTRL_0_GAIN_ADJ_SHIFT 8 |
|---|
| 590 | #define BCHP_MISC_DAC_BIAS_CTRL_0_GAIN_ADJ_DEFAULT 0x00000000 |
|---|
| 591 | |
|---|
| 592 | /* MISC :: DAC_BIAS_CTRL_0 :: GAIN_OVERRIDE [07:07] */ |
|---|
| 593 | #define BCHP_MISC_DAC_BIAS_CTRL_0_GAIN_OVERRIDE_MASK 0x00000080 |
|---|
| 594 | #define BCHP_MISC_DAC_BIAS_CTRL_0_GAIN_OVERRIDE_SHIFT 7 |
|---|
| 595 | #define BCHP_MISC_DAC_BIAS_CTRL_0_GAIN_OVERRIDE_DEFAULT 0x00000000 |
|---|
| 596 | |
|---|
| 597 | /* MISC :: DAC_BIAS_CTRL_0 :: REG_ADJ [06:04] */ |
|---|
| 598 | #define BCHP_MISC_DAC_BIAS_CTRL_0_REG_ADJ_MASK 0x00000070 |
|---|
| 599 | #define BCHP_MISC_DAC_BIAS_CTRL_0_REG_ADJ_SHIFT 4 |
|---|
| 600 | #define BCHP_MISC_DAC_BIAS_CTRL_0_REG_ADJ_DEFAULT 0x00000000 |
|---|
| 601 | |
|---|
| 602 | /* MISC :: DAC_BIAS_CTRL_0 :: BG_ADJ [03:01] */ |
|---|
| 603 | #define BCHP_MISC_DAC_BIAS_CTRL_0_BG_ADJ_MASK 0x0000000e |
|---|
| 604 | #define BCHP_MISC_DAC_BIAS_CTRL_0_BG_ADJ_SHIFT 1 |
|---|
| 605 | #define BCHP_MISC_DAC_BIAS_CTRL_0_BG_ADJ_DEFAULT 0x00000000 |
|---|
| 606 | |
|---|
| 607 | /* MISC :: DAC_BIAS_CTRL_0 :: PWRDN [00:00] */ |
|---|
| 608 | #define BCHP_MISC_DAC_BIAS_CTRL_0_PWRDN_MASK 0x00000001 |
|---|
| 609 | #define BCHP_MISC_DAC_BIAS_CTRL_0_PWRDN_SHIFT 0 |
|---|
| 610 | #define BCHP_MISC_DAC_BIAS_CTRL_0_PWRDN_DEFAULT 0x00000000 |
|---|
| 611 | |
|---|
| 612 | /*************************************************************************** |
|---|
| 613 | *DAC_CAL_CTRL_0 - DAC calibration control register for DAC0 |
|---|
| 614 | ***************************************************************************/ |
|---|
| 615 | /* MISC :: DAC_CAL_CTRL_0 :: MAX_TARGET_DELTA [31:26] */ |
|---|
| 616 | #define BCHP_MISC_DAC_CAL_CTRL_0_MAX_TARGET_DELTA_MASK 0xfc000000 |
|---|
| 617 | #define BCHP_MISC_DAC_CAL_CTRL_0_MAX_TARGET_DELTA_SHIFT 26 |
|---|
| 618 | #define BCHP_MISC_DAC_CAL_CTRL_0_MAX_TARGET_DELTA_DEFAULT 0x00000002 |
|---|
| 619 | |
|---|
| 620 | /* MISC :: DAC_CAL_CTRL_0 :: ADC_MAX_VAL [25:16] */ |
|---|
| 621 | #define BCHP_MISC_DAC_CAL_CTRL_0_ADC_MAX_VAL_MASK 0x03ff0000 |
|---|
| 622 | #define BCHP_MISC_DAC_CAL_CTRL_0_ADC_MAX_VAL_SHIFT 16 |
|---|
| 623 | #define BCHP_MISC_DAC_CAL_CTRL_0_ADC_MAX_VAL_DEFAULT 0x000003ff |
|---|
| 624 | |
|---|
| 625 | /* MISC :: DAC_CAL_CTRL_0 :: COUNT [15:14] */ |
|---|
| 626 | #define BCHP_MISC_DAC_CAL_CTRL_0_COUNT_MASK 0x0000c000 |
|---|
| 627 | #define BCHP_MISC_DAC_CAL_CTRL_0_COUNT_SHIFT 14 |
|---|
| 628 | #define BCHP_MISC_DAC_CAL_CTRL_0_COUNT_DEFAULT 0x00000001 |
|---|
| 629 | |
|---|
| 630 | /* MISC :: DAC_CAL_CTRL_0 :: STEP_DLY [13:10] */ |
|---|
| 631 | #define BCHP_MISC_DAC_CAL_CTRL_0_STEP_DLY_MASK 0x00003c00 |
|---|
| 632 | #define BCHP_MISC_DAC_CAL_CTRL_0_STEP_DLY_SHIFT 10 |
|---|
| 633 | #define BCHP_MISC_DAC_CAL_CTRL_0_STEP_DLY_DEFAULT 0x00000000 |
|---|
| 634 | |
|---|
| 635 | /* MISC :: DAC_CAL_CTRL_0 :: TARGET_VAL [09:00] */ |
|---|
| 636 | #define BCHP_MISC_DAC_CAL_CTRL_0_TARGET_VAL_MASK 0x000003ff |
|---|
| 637 | #define BCHP_MISC_DAC_CAL_CTRL_0_TARGET_VAL_SHIFT 0 |
|---|
| 638 | #define BCHP_MISC_DAC_CAL_CTRL_0_TARGET_VAL_DEFAULT 0x00000000 |
|---|
| 639 | |
|---|
| 640 | /*************************************************************************** |
|---|
| 641 | *DAC_CAL_ADC_DATA_0 - DAC calibration cal ADC data register for DAC0 |
|---|
| 642 | ***************************************************************************/ |
|---|
| 643 | /* MISC :: DAC_CAL_ADC_DATA_0 :: reserved0 [31:30] */ |
|---|
| 644 | #define BCHP_MISC_DAC_CAL_ADC_DATA_0_reserved0_MASK 0xc0000000 |
|---|
| 645 | #define BCHP_MISC_DAC_CAL_ADC_DATA_0_reserved0_SHIFT 30 |
|---|
| 646 | |
|---|
| 647 | /* MISC :: DAC_CAL_ADC_DATA_0 :: HIGH [29:20] */ |
|---|
| 648 | #define BCHP_MISC_DAC_CAL_ADC_DATA_0_HIGH_MASK 0x3ff00000 |
|---|
| 649 | #define BCHP_MISC_DAC_CAL_ADC_DATA_0_HIGH_SHIFT 20 |
|---|
| 650 | #define BCHP_MISC_DAC_CAL_ADC_DATA_0_HIGH_DEFAULT 0x00000000 |
|---|
| 651 | |
|---|
| 652 | /* MISC :: DAC_CAL_ADC_DATA_0 :: LOW [19:10] */ |
|---|
| 653 | #define BCHP_MISC_DAC_CAL_ADC_DATA_0_LOW_MASK 0x000ffc00 |
|---|
| 654 | #define BCHP_MISC_DAC_CAL_ADC_DATA_0_LOW_SHIFT 10 |
|---|
| 655 | #define BCHP_MISC_DAC_CAL_ADC_DATA_0_LOW_DEFAULT 0x00000000 |
|---|
| 656 | |
|---|
| 657 | /* MISC :: DAC_CAL_ADC_DATA_0 :: DIFF [09:00] */ |
|---|
| 658 | #define BCHP_MISC_DAC_CAL_ADC_DATA_0_DIFF_MASK 0x000003ff |
|---|
| 659 | #define BCHP_MISC_DAC_CAL_ADC_DATA_0_DIFF_SHIFT 0 |
|---|
| 660 | #define BCHP_MISC_DAC_CAL_ADC_DATA_0_DIFF_DEFAULT 0x00000000 |
|---|
| 661 | |
|---|
| 662 | /*************************************************************************** |
|---|
| 663 | *DAC_ADC_DATA_0 - DAC calibration adc data register for DAC0 |
|---|
| 664 | ***************************************************************************/ |
|---|
| 665 | /* MISC :: DAC_ADC_DATA_0 :: reserved0 [31:10] */ |
|---|
| 666 | #define BCHP_MISC_DAC_ADC_DATA_0_reserved0_MASK 0xfffffc00 |
|---|
| 667 | #define BCHP_MISC_DAC_ADC_DATA_0_reserved0_SHIFT 10 |
|---|
| 668 | |
|---|
| 669 | /* MISC :: DAC_ADC_DATA_0 :: VAL [09:00] */ |
|---|
| 670 | #define BCHP_MISC_DAC_ADC_DATA_0_VAL_MASK 0x000003ff |
|---|
| 671 | #define BCHP_MISC_DAC_ADC_DATA_0_VAL_SHIFT 0 |
|---|
| 672 | #define BCHP_MISC_DAC_ADC_DATA_0_VAL_DEFAULT 0x00000000 |
|---|
| 673 | |
|---|
| 674 | /*************************************************************************** |
|---|
| 675 | *DAC_CTRL_0 - DAC control register for DAC0 |
|---|
| 676 | ***************************************************************************/ |
|---|
| 677 | /* MISC :: DAC_CTRL_0 :: reserved0 [31:20] */ |
|---|
| 678 | #define BCHP_MISC_DAC_CTRL_0_reserved0_MASK 0xfff00000 |
|---|
| 679 | #define BCHP_MISC_DAC_CTRL_0_reserved0_SHIFT 20 |
|---|
| 680 | |
|---|
| 681 | /* MISC :: DAC_CTRL_0 :: DAC3_RSTB [19:19] */ |
|---|
| 682 | #define BCHP_MISC_DAC_CTRL_0_DAC3_RSTB_MASK 0x00080000 |
|---|
| 683 | #define BCHP_MISC_DAC_CTRL_0_DAC3_RSTB_SHIFT 19 |
|---|
| 684 | #define BCHP_MISC_DAC_CTRL_0_DAC3_RSTB_DEFAULT 0x00000001 |
|---|
| 685 | |
|---|
| 686 | /* MISC :: DAC_CTRL_0 :: DAC2_RSTB [18:18] */ |
|---|
| 687 | #define BCHP_MISC_DAC_CTRL_0_DAC2_RSTB_MASK 0x00040000 |
|---|
| 688 | #define BCHP_MISC_DAC_CTRL_0_DAC2_RSTB_SHIFT 18 |
|---|
| 689 | #define BCHP_MISC_DAC_CTRL_0_DAC2_RSTB_DEFAULT 0x00000001 |
|---|
| 690 | |
|---|
| 691 | /* MISC :: DAC_CTRL_0 :: DAC1_RSTB [17:17] */ |
|---|
| 692 | #define BCHP_MISC_DAC_CTRL_0_DAC1_RSTB_MASK 0x00020000 |
|---|
| 693 | #define BCHP_MISC_DAC_CTRL_0_DAC1_RSTB_SHIFT 17 |
|---|
| 694 | #define BCHP_MISC_DAC_CTRL_0_DAC1_RSTB_DEFAULT 0x00000001 |
|---|
| 695 | |
|---|
| 696 | /* MISC :: DAC_CTRL_0 :: DAC0_RSTB [16:16] */ |
|---|
| 697 | #define BCHP_MISC_DAC_CTRL_0_DAC0_RSTB_MASK 0x00010000 |
|---|
| 698 | #define BCHP_MISC_DAC_CTRL_0_DAC0_RSTB_SHIFT 16 |
|---|
| 699 | #define BCHP_MISC_DAC_CTRL_0_DAC0_RSTB_DEFAULT 0x00000001 |
|---|
| 700 | |
|---|
| 701 | /* MISC :: DAC_CTRL_0 :: TBD [15:15] */ |
|---|
| 702 | #define BCHP_MISC_DAC_CTRL_0_TBD_MASK 0x00008000 |
|---|
| 703 | #define BCHP_MISC_DAC_CTRL_0_TBD_SHIFT 15 |
|---|
| 704 | #define BCHP_MISC_DAC_CTRL_0_TBD_DEFAULT 0x00000000 |
|---|
| 705 | |
|---|
| 706 | /* MISC :: DAC_CTRL_0 :: PRBS_LENGTH [14:11] */ |
|---|
| 707 | #define BCHP_MISC_DAC_CTRL_0_PRBS_LENGTH_MASK 0x00007800 |
|---|
| 708 | #define BCHP_MISC_DAC_CTRL_0_PRBS_LENGTH_SHIFT 11 |
|---|
| 709 | |
|---|
| 710 | /* MISC :: DAC_CTRL_0 :: PRBS_MODE [10:10] */ |
|---|
| 711 | #define BCHP_MISC_DAC_CTRL_0_PRBS_MODE_MASK 0x00000400 |
|---|
| 712 | #define BCHP_MISC_DAC_CTRL_0_PRBS_MODE_SHIFT 10 |
|---|
| 713 | #define BCHP_MISC_DAC_CTRL_0_PRBS_MODE_DEFAULT 0x00000000 |
|---|
| 714 | #define BCHP_MISC_DAC_CTRL_0_PRBS_MODE_PRBS 0 |
|---|
| 715 | #define BCHP_MISC_DAC_CTRL_0_PRBS_MODE_CYC_B_SHIFT 1 |
|---|
| 716 | |
|---|
| 717 | /* MISC :: DAC_CTRL_0 :: DISABLE_PRBS [09:09] */ |
|---|
| 718 | #define BCHP_MISC_DAC_CTRL_0_DISABLE_PRBS_MASK 0x00000200 |
|---|
| 719 | #define BCHP_MISC_DAC_CTRL_0_DISABLE_PRBS_SHIFT 9 |
|---|
| 720 | #define BCHP_MISC_DAC_CTRL_0_DISABLE_PRBS_DEFAULT 0x00000000 |
|---|
| 721 | #define BCHP_MISC_DAC_CTRL_0_DISABLE_PRBS_DIS 1 |
|---|
| 722 | #define BCHP_MISC_DAC_CTRL_0_DISABLE_PRBS_EN 0 |
|---|
| 723 | |
|---|
| 724 | /* MISC :: DAC_CTRL_0 :: DISABLE_SCRAMBLER [08:08] */ |
|---|
| 725 | #define BCHP_MISC_DAC_CTRL_0_DISABLE_SCRAMBLER_MASK 0x00000100 |
|---|
| 726 | #define BCHP_MISC_DAC_CTRL_0_DISABLE_SCRAMBLER_SHIFT 8 |
|---|
| 727 | #define BCHP_MISC_DAC_CTRL_0_DISABLE_SCRAMBLER_DEFAULT 0x00000000 |
|---|
| 728 | #define BCHP_MISC_DAC_CTRL_0_DISABLE_SCRAMBLER_DIS 1 |
|---|
| 729 | #define BCHP_MISC_DAC_CTRL_0_DISABLE_SCRAMBLER_EN 0 |
|---|
| 730 | |
|---|
| 731 | /* MISC :: DAC_CTRL_0 :: DAC3_FORMAT [07:07] */ |
|---|
| 732 | #define BCHP_MISC_DAC_CTRL_0_DAC3_FORMAT_MASK 0x00000080 |
|---|
| 733 | #define BCHP_MISC_DAC_CTRL_0_DAC3_FORMAT_SHIFT 7 |
|---|
| 734 | #define BCHP_MISC_DAC_CTRL_0_DAC3_FORMAT_DEFAULT 0x00000000 |
|---|
| 735 | |
|---|
| 736 | /* MISC :: DAC_CTRL_0 :: DAC2_FORMAT [06:06] */ |
|---|
| 737 | #define BCHP_MISC_DAC_CTRL_0_DAC2_FORMAT_MASK 0x00000040 |
|---|
| 738 | #define BCHP_MISC_DAC_CTRL_0_DAC2_FORMAT_SHIFT 6 |
|---|
| 739 | #define BCHP_MISC_DAC_CTRL_0_DAC2_FORMAT_DEFAULT 0x00000000 |
|---|
| 740 | |
|---|
| 741 | /* MISC :: DAC_CTRL_0 :: DAC1_FORMAT [05:05] */ |
|---|
| 742 | #define BCHP_MISC_DAC_CTRL_0_DAC1_FORMAT_MASK 0x00000020 |
|---|
| 743 | #define BCHP_MISC_DAC_CTRL_0_DAC1_FORMAT_SHIFT 5 |
|---|
| 744 | #define BCHP_MISC_DAC_CTRL_0_DAC1_FORMAT_DEFAULT 0x00000000 |
|---|
| 745 | |
|---|
| 746 | /* MISC :: DAC_CTRL_0 :: DAC0_FORMAT [04:04] */ |
|---|
| 747 | #define BCHP_MISC_DAC_CTRL_0_DAC0_FORMAT_MASK 0x00000010 |
|---|
| 748 | #define BCHP_MISC_DAC_CTRL_0_DAC0_FORMAT_SHIFT 4 |
|---|
| 749 | #define BCHP_MISC_DAC_CTRL_0_DAC0_FORMAT_DEFAULT 0x00000000 |
|---|
| 750 | |
|---|
| 751 | /* MISC :: DAC_CTRL_0 :: DAC3_PWRDN [03:03] */ |
|---|
| 752 | #define BCHP_MISC_DAC_CTRL_0_DAC3_PWRDN_MASK 0x00000008 |
|---|
| 753 | #define BCHP_MISC_DAC_CTRL_0_DAC3_PWRDN_SHIFT 3 |
|---|
| 754 | #define BCHP_MISC_DAC_CTRL_0_DAC3_PWRDN_DEFAULT 0x00000000 |
|---|
| 755 | |
|---|
| 756 | /* MISC :: DAC_CTRL_0 :: DAC2_PWRDN [02:02] */ |
|---|
| 757 | #define BCHP_MISC_DAC_CTRL_0_DAC2_PWRDN_MASK 0x00000004 |
|---|
| 758 | #define BCHP_MISC_DAC_CTRL_0_DAC2_PWRDN_SHIFT 2 |
|---|
| 759 | #define BCHP_MISC_DAC_CTRL_0_DAC2_PWRDN_DEFAULT 0x00000000 |
|---|
| 760 | |
|---|
| 761 | /* MISC :: DAC_CTRL_0 :: DAC1_PWRDN [01:01] */ |
|---|
| 762 | #define BCHP_MISC_DAC_CTRL_0_DAC1_PWRDN_MASK 0x00000002 |
|---|
| 763 | #define BCHP_MISC_DAC_CTRL_0_DAC1_PWRDN_SHIFT 1 |
|---|
| 764 | #define BCHP_MISC_DAC_CTRL_0_DAC1_PWRDN_DEFAULT 0x00000000 |
|---|
| 765 | |
|---|
| 766 | /* MISC :: DAC_CTRL_0 :: DAC0_PWRDN [00:00] */ |
|---|
| 767 | #define BCHP_MISC_DAC_CTRL_0_DAC0_PWRDN_MASK 0x00000001 |
|---|
| 768 | #define BCHP_MISC_DAC_CTRL_0_DAC0_PWRDN_SHIFT 0 |
|---|
| 769 | #define BCHP_MISC_DAC_CTRL_0_DAC0_PWRDN_DEFAULT 0x00000000 |
|---|
| 770 | |
|---|
| 771 | /*************************************************************************** |
|---|
| 772 | *DAC_DETECT_CTRL_0 - DAC CABLE DETECT control register for DAC0 |
|---|
| 773 | ***************************************************************************/ |
|---|
| 774 | /* MISC :: DAC_DETECT_CTRL_0 :: PLUGIN_CNT [31:28] */ |
|---|
| 775 | #define BCHP_MISC_DAC_DETECT_CTRL_0_PLUGIN_CNT_MASK 0xf0000000 |
|---|
| 776 | #define BCHP_MISC_DAC_DETECT_CTRL_0_PLUGIN_CNT_SHIFT 28 |
|---|
| 777 | #define BCHP_MISC_DAC_DETECT_CTRL_0_PLUGIN_CNT_DEFAULT 0x00000002 |
|---|
| 778 | |
|---|
| 779 | /* MISC :: DAC_DETECT_CTRL_0 :: PLUGOUT_CNT [27:24] */ |
|---|
| 780 | #define BCHP_MISC_DAC_DETECT_CTRL_0_PLUGOUT_CNT_MASK 0x0f000000 |
|---|
| 781 | #define BCHP_MISC_DAC_DETECT_CTRL_0_PLUGOUT_CNT_SHIFT 24 |
|---|
| 782 | #define BCHP_MISC_DAC_DETECT_CTRL_0_PLUGOUT_CNT_DEFAULT 0x00000002 |
|---|
| 783 | |
|---|
| 784 | /* MISC :: DAC_DETECT_CTRL_0 :: PLUGOUT_THRESHOLD [23:14] */ |
|---|
| 785 | #define BCHP_MISC_DAC_DETECT_CTRL_0_PLUGOUT_THRESHOLD_MASK 0x00ffc000 |
|---|
| 786 | #define BCHP_MISC_DAC_DETECT_CTRL_0_PLUGOUT_THRESHOLD_SHIFT 14 |
|---|
| 787 | #define BCHP_MISC_DAC_DETECT_CTRL_0_PLUGOUT_THRESHOLD_DEFAULT 0x00000300 |
|---|
| 788 | |
|---|
| 789 | /* MISC :: DAC_DETECT_CTRL_0 :: STEP_DLY [13:10] */ |
|---|
| 790 | #define BCHP_MISC_DAC_DETECT_CTRL_0_STEP_DLY_MASK 0x00003c00 |
|---|
| 791 | #define BCHP_MISC_DAC_DETECT_CTRL_0_STEP_DLY_SHIFT 10 |
|---|
| 792 | #define BCHP_MISC_DAC_DETECT_CTRL_0_STEP_DLY_DEFAULT 0x00000002 |
|---|
| 793 | |
|---|
| 794 | /* MISC :: DAC_DETECT_CTRL_0 :: PLUGIN_THRESHOLD [09:00] */ |
|---|
| 795 | #define BCHP_MISC_DAC_DETECT_CTRL_0_PLUGIN_THRESHOLD_MASK 0x000003ff |
|---|
| 796 | #define BCHP_MISC_DAC_DETECT_CTRL_0_PLUGIN_THRESHOLD_SHIFT 0 |
|---|
| 797 | #define BCHP_MISC_DAC_DETECT_CTRL_0_PLUGIN_THRESHOLD_DEFAULT 0x00000300 |
|---|
| 798 | |
|---|
| 799 | /*************************************************************************** |
|---|
| 800 | *DAC_DETECT_EN_0 - DAC CABLE DETECT Enable register for DAC0 |
|---|
| 801 | ***************************************************************************/ |
|---|
| 802 | /* MISC :: DAC_DETECT_EN_0 :: reserved0 [31:06] */ |
|---|
| 803 | #define BCHP_MISC_DAC_DETECT_EN_0_reserved0_MASK 0xffffffc0 |
|---|
| 804 | #define BCHP_MISC_DAC_DETECT_EN_0_reserved0_SHIFT 6 |
|---|
| 805 | |
|---|
| 806 | /* MISC :: DAC_DETECT_EN_0 :: USE_STEP_DLY [05:05] */ |
|---|
| 807 | #define BCHP_MISC_DAC_DETECT_EN_0_USE_STEP_DLY_MASK 0x00000020 |
|---|
| 808 | #define BCHP_MISC_DAC_DETECT_EN_0_USE_STEP_DLY_SHIFT 5 |
|---|
| 809 | #define BCHP_MISC_DAC_DETECT_EN_0_USE_STEP_DLY_DEFAULT 0x00000000 |
|---|
| 810 | |
|---|
| 811 | /* MISC :: DAC_DETECT_EN_0 :: SW_CALIBRATE [04:04] */ |
|---|
| 812 | #define BCHP_MISC_DAC_DETECT_EN_0_SW_CALIBRATE_MASK 0x00000010 |
|---|
| 813 | #define BCHP_MISC_DAC_DETECT_EN_0_SW_CALIBRATE_SHIFT 4 |
|---|
| 814 | #define BCHP_MISC_DAC_DETECT_EN_0_SW_CALIBRATE_DEFAULT 0x00000000 |
|---|
| 815 | |
|---|
| 816 | /* MISC :: DAC_DETECT_EN_0 :: CALIBRATE [03:03] */ |
|---|
| 817 | #define BCHP_MISC_DAC_DETECT_EN_0_CALIBRATE_MASK 0x00000008 |
|---|
| 818 | #define BCHP_MISC_DAC_DETECT_EN_0_CALIBRATE_SHIFT 3 |
|---|
| 819 | #define BCHP_MISC_DAC_DETECT_EN_0_CALIBRATE_DEFAULT 0x00000000 |
|---|
| 820 | |
|---|
| 821 | /* MISC :: DAC_DETECT_EN_0 :: PLUGOUT_DETECT [02:02] */ |
|---|
| 822 | #define BCHP_MISC_DAC_DETECT_EN_0_PLUGOUT_DETECT_MASK 0x00000004 |
|---|
| 823 | #define BCHP_MISC_DAC_DETECT_EN_0_PLUGOUT_DETECT_SHIFT 2 |
|---|
| 824 | #define BCHP_MISC_DAC_DETECT_EN_0_PLUGOUT_DETECT_DEFAULT 0x00000000 |
|---|
| 825 | |
|---|
| 826 | /* MISC :: DAC_DETECT_EN_0 :: PLUGIN_DETECT [01:01] */ |
|---|
| 827 | #define BCHP_MISC_DAC_DETECT_EN_0_PLUGIN_DETECT_MASK 0x00000002 |
|---|
| 828 | #define BCHP_MISC_DAC_DETECT_EN_0_PLUGIN_DETECT_SHIFT 1 |
|---|
| 829 | #define BCHP_MISC_DAC_DETECT_EN_0_PLUGIN_DETECT_DEFAULT 0x00000000 |
|---|
| 830 | |
|---|
| 831 | /* MISC :: DAC_DETECT_EN_0 :: AUTO_DETECT [00:00] */ |
|---|
| 832 | #define BCHP_MISC_DAC_DETECT_EN_0_AUTO_DETECT_MASK 0x00000001 |
|---|
| 833 | #define BCHP_MISC_DAC_DETECT_EN_0_AUTO_DETECT_SHIFT 0 |
|---|
| 834 | #define BCHP_MISC_DAC_DETECT_EN_0_AUTO_DETECT_DEFAULT 0x00000000 |
|---|
| 835 | |
|---|
| 836 | /*************************************************************************** |
|---|
| 837 | *DAC_DETECT_SYNC_CTRL_0 - DAC sync present register |
|---|
| 838 | ***************************************************************************/ |
|---|
| 839 | /* MISC :: DAC_DETECT_SYNC_CTRL_0 :: reserved0 [31:12] */ |
|---|
| 840 | #define BCHP_MISC_DAC_DETECT_SYNC_CTRL_0_reserved0_MASK 0xfffff000 |
|---|
| 841 | #define BCHP_MISC_DAC_DETECT_SYNC_CTRL_0_reserved0_SHIFT 12 |
|---|
| 842 | |
|---|
| 843 | /* MISC :: DAC_DETECT_SYNC_CTRL_0 :: DAC3_SYNC_SOURCE [11:10] */ |
|---|
| 844 | #define BCHP_MISC_DAC_DETECT_SYNC_CTRL_0_DAC3_SYNC_SOURCE_MASK 0x00000c00 |
|---|
| 845 | #define BCHP_MISC_DAC_DETECT_SYNC_CTRL_0_DAC3_SYNC_SOURCE_SHIFT 10 |
|---|
| 846 | #define BCHP_MISC_DAC_DETECT_SYNC_CTRL_0_DAC3_SYNC_SOURCE_DEFAULT 0x00000000 |
|---|
| 847 | #define BCHP_MISC_DAC_DETECT_SYNC_CTRL_0_DAC3_SYNC_SOURCE_DAC0 0 |
|---|
| 848 | #define BCHP_MISC_DAC_DETECT_SYNC_CTRL_0_DAC3_SYNC_SOURCE_DAC1 1 |
|---|
| 849 | #define BCHP_MISC_DAC_DETECT_SYNC_CTRL_0_DAC3_SYNC_SOURCE_DAC2 2 |
|---|
| 850 | #define BCHP_MISC_DAC_DETECT_SYNC_CTRL_0_DAC3_SYNC_SOURCE_DAC3 3 |
|---|
| 851 | |
|---|
| 852 | /* MISC :: DAC_DETECT_SYNC_CTRL_0 :: DAC2_SYNC_SOURCE [09:08] */ |
|---|
| 853 | #define BCHP_MISC_DAC_DETECT_SYNC_CTRL_0_DAC2_SYNC_SOURCE_MASK 0x00000300 |
|---|
| 854 | #define BCHP_MISC_DAC_DETECT_SYNC_CTRL_0_DAC2_SYNC_SOURCE_SHIFT 8 |
|---|
| 855 | #define BCHP_MISC_DAC_DETECT_SYNC_CTRL_0_DAC2_SYNC_SOURCE_DEFAULT 0x00000000 |
|---|
| 856 | #define BCHP_MISC_DAC_DETECT_SYNC_CTRL_0_DAC2_SYNC_SOURCE_DAC0 0 |
|---|
| 857 | #define BCHP_MISC_DAC_DETECT_SYNC_CTRL_0_DAC2_SYNC_SOURCE_DAC1 1 |
|---|
| 858 | #define BCHP_MISC_DAC_DETECT_SYNC_CTRL_0_DAC2_SYNC_SOURCE_DAC2 2 |
|---|
| 859 | #define BCHP_MISC_DAC_DETECT_SYNC_CTRL_0_DAC2_SYNC_SOURCE_DAC3 3 |
|---|
| 860 | |
|---|
| 861 | /* MISC :: DAC_DETECT_SYNC_CTRL_0 :: DAC1_SYNC_SOURCE [07:06] */ |
|---|
| 862 | #define BCHP_MISC_DAC_DETECT_SYNC_CTRL_0_DAC1_SYNC_SOURCE_MASK 0x000000c0 |
|---|
| 863 | #define BCHP_MISC_DAC_DETECT_SYNC_CTRL_0_DAC1_SYNC_SOURCE_SHIFT 6 |
|---|
| 864 | #define BCHP_MISC_DAC_DETECT_SYNC_CTRL_0_DAC1_SYNC_SOURCE_DEFAULT 0x00000000 |
|---|
| 865 | #define BCHP_MISC_DAC_DETECT_SYNC_CTRL_0_DAC1_SYNC_SOURCE_DAC0 0 |
|---|
| 866 | #define BCHP_MISC_DAC_DETECT_SYNC_CTRL_0_DAC1_SYNC_SOURCE_DAC1 1 |
|---|
| 867 | #define BCHP_MISC_DAC_DETECT_SYNC_CTRL_0_DAC1_SYNC_SOURCE_DAC2 2 |
|---|
| 868 | #define BCHP_MISC_DAC_DETECT_SYNC_CTRL_0_DAC1_SYNC_SOURCE_DAC3 3 |
|---|
| 869 | |
|---|
| 870 | /* MISC :: DAC_DETECT_SYNC_CTRL_0 :: DAC0_SYNC_SOURCE [05:04] */ |
|---|
| 871 | #define BCHP_MISC_DAC_DETECT_SYNC_CTRL_0_DAC0_SYNC_SOURCE_MASK 0x00000030 |
|---|
| 872 | #define BCHP_MISC_DAC_DETECT_SYNC_CTRL_0_DAC0_SYNC_SOURCE_SHIFT 4 |
|---|
| 873 | #define BCHP_MISC_DAC_DETECT_SYNC_CTRL_0_DAC0_SYNC_SOURCE_DEFAULT 0x00000000 |
|---|
| 874 | #define BCHP_MISC_DAC_DETECT_SYNC_CTRL_0_DAC0_SYNC_SOURCE_DAC0 0 |
|---|
| 875 | #define BCHP_MISC_DAC_DETECT_SYNC_CTRL_0_DAC0_SYNC_SOURCE_DAC1 1 |
|---|
| 876 | #define BCHP_MISC_DAC_DETECT_SYNC_CTRL_0_DAC0_SYNC_SOURCE_DAC2 2 |
|---|
| 877 | #define BCHP_MISC_DAC_DETECT_SYNC_CTRL_0_DAC0_SYNC_SOURCE_DAC3 3 |
|---|
| 878 | |
|---|
| 879 | /* MISC :: DAC_DETECT_SYNC_CTRL_0 :: DAC3_SYNC_EN [03:03] */ |
|---|
| 880 | #define BCHP_MISC_DAC_DETECT_SYNC_CTRL_0_DAC3_SYNC_EN_MASK 0x00000008 |
|---|
| 881 | #define BCHP_MISC_DAC_DETECT_SYNC_CTRL_0_DAC3_SYNC_EN_SHIFT 3 |
|---|
| 882 | #define BCHP_MISC_DAC_DETECT_SYNC_CTRL_0_DAC3_SYNC_EN_DEFAULT 0x00000000 |
|---|
| 883 | |
|---|
| 884 | /* MISC :: DAC_DETECT_SYNC_CTRL_0 :: DAC2_SYNC_EN [02:02] */ |
|---|
| 885 | #define BCHP_MISC_DAC_DETECT_SYNC_CTRL_0_DAC2_SYNC_EN_MASK 0x00000004 |
|---|
| 886 | #define BCHP_MISC_DAC_DETECT_SYNC_CTRL_0_DAC2_SYNC_EN_SHIFT 2 |
|---|
| 887 | #define BCHP_MISC_DAC_DETECT_SYNC_CTRL_0_DAC2_SYNC_EN_DEFAULT 0x00000000 |
|---|
| 888 | |
|---|
| 889 | /* MISC :: DAC_DETECT_SYNC_CTRL_0 :: DAC1_SYNC_EN [01:01] */ |
|---|
| 890 | #define BCHP_MISC_DAC_DETECT_SYNC_CTRL_0_DAC1_SYNC_EN_MASK 0x00000002 |
|---|
| 891 | #define BCHP_MISC_DAC_DETECT_SYNC_CTRL_0_DAC1_SYNC_EN_SHIFT 1 |
|---|
| 892 | #define BCHP_MISC_DAC_DETECT_SYNC_CTRL_0_DAC1_SYNC_EN_DEFAULT 0x00000000 |
|---|
| 893 | |
|---|
| 894 | /* MISC :: DAC_DETECT_SYNC_CTRL_0 :: DAC0_SYNC_EN [00:00] */ |
|---|
| 895 | #define BCHP_MISC_DAC_DETECT_SYNC_CTRL_0_DAC0_SYNC_EN_MASK 0x00000001 |
|---|
| 896 | #define BCHP_MISC_DAC_DETECT_SYNC_CTRL_0_DAC0_SYNC_EN_SHIFT 0 |
|---|
| 897 | #define BCHP_MISC_DAC_DETECT_SYNC_CTRL_0_DAC0_SYNC_EN_DEFAULT 0x00000000 |
|---|
| 898 | |
|---|
| 899 | /*************************************************************************** |
|---|
| 900 | *DAC_SQWAVE_LEVEL_0 - Square Wave levels for cable detect |
|---|
| 901 | ***************************************************************************/ |
|---|
| 902 | /* MISC :: DAC_SQWAVE_LEVEL_0 :: reserved0 [31:22] */ |
|---|
| 903 | #define BCHP_MISC_DAC_SQWAVE_LEVEL_0_reserved0_MASK 0xffc00000 |
|---|
| 904 | #define BCHP_MISC_DAC_SQWAVE_LEVEL_0_reserved0_SHIFT 22 |
|---|
| 905 | |
|---|
| 906 | /* MISC :: DAC_SQWAVE_LEVEL_0 :: HIGH [21:12] */ |
|---|
| 907 | #define BCHP_MISC_DAC_SQWAVE_LEVEL_0_HIGH_MASK 0x003ff000 |
|---|
| 908 | #define BCHP_MISC_DAC_SQWAVE_LEVEL_0_HIGH_SHIFT 12 |
|---|
| 909 | #define BCHP_MISC_DAC_SQWAVE_LEVEL_0_HIGH_DEFAULT 0x00000320 |
|---|
| 910 | |
|---|
| 911 | /* MISC :: DAC_SQWAVE_LEVEL_0 :: reserved1 [11:10] */ |
|---|
| 912 | #define BCHP_MISC_DAC_SQWAVE_LEVEL_0_reserved1_MASK 0x00000c00 |
|---|
| 913 | #define BCHP_MISC_DAC_SQWAVE_LEVEL_0_reserved1_SHIFT 10 |
|---|
| 914 | |
|---|
| 915 | /* MISC :: DAC_SQWAVE_LEVEL_0 :: LOW [09:00] */ |
|---|
| 916 | #define BCHP_MISC_DAC_SQWAVE_LEVEL_0_LOW_MASK 0x000003ff |
|---|
| 917 | #define BCHP_MISC_DAC_SQWAVE_LEVEL_0_LOW_SHIFT 0 |
|---|
| 918 | #define BCHP_MISC_DAC_SQWAVE_LEVEL_0_LOW_DEFAULT 0x00000010 |
|---|
| 919 | |
|---|
| 920 | /*************************************************************************** |
|---|
| 921 | *DAC_DETECT_TIMING_0 - Cable Detect timing control register |
|---|
| 922 | ***************************************************************************/ |
|---|
| 923 | /* MISC :: DAC_DETECT_TIMING_0 :: reserved_for_eco0 [31:28] */ |
|---|
| 924 | #define BCHP_MISC_DAC_DETECT_TIMING_0_reserved_for_eco0_MASK 0xf0000000 |
|---|
| 925 | #define BCHP_MISC_DAC_DETECT_TIMING_0_reserved_for_eco0_SHIFT 28 |
|---|
| 926 | #define BCHP_MISC_DAC_DETECT_TIMING_0_reserved_for_eco0_DEFAULT 0x00000000 |
|---|
| 927 | |
|---|
| 928 | /* MISC :: DAC_DETECT_TIMING_0 :: ADC_VALID_DLY [27:24] */ |
|---|
| 929 | #define BCHP_MISC_DAC_DETECT_TIMING_0_ADC_VALID_DLY_MASK 0x0f000000 |
|---|
| 930 | #define BCHP_MISC_DAC_DETECT_TIMING_0_ADC_VALID_DLY_SHIFT 24 |
|---|
| 931 | #define BCHP_MISC_DAC_DETECT_TIMING_0_ADC_VALID_DLY_DEFAULT 0x00000002 |
|---|
| 932 | |
|---|
| 933 | /* MISC :: DAC_DETECT_TIMING_0 :: ADC_RST_DLY [23:16] */ |
|---|
| 934 | #define BCHP_MISC_DAC_DETECT_TIMING_0_ADC_RST_DLY_MASK 0x00ff0000 |
|---|
| 935 | #define BCHP_MISC_DAC_DETECT_TIMING_0_ADC_RST_DLY_SHIFT 16 |
|---|
| 936 | #define BCHP_MISC_DAC_DETECT_TIMING_0_ADC_RST_DLY_DEFAULT 0x00000004 |
|---|
| 937 | |
|---|
| 938 | /* MISC :: DAC_DETECT_TIMING_0 :: STRB_WIDTH [15:08] */ |
|---|
| 939 | #define BCHP_MISC_DAC_DETECT_TIMING_0_STRB_WIDTH_MASK 0x0000ff00 |
|---|
| 940 | #define BCHP_MISC_DAC_DETECT_TIMING_0_STRB_WIDTH_SHIFT 8 |
|---|
| 941 | #define BCHP_MISC_DAC_DETECT_TIMING_0_STRB_WIDTH_DEFAULT 0x00000004 |
|---|
| 942 | |
|---|
| 943 | /* MISC :: DAC_DETECT_TIMING_0 :: STRB_DLY [07:00] */ |
|---|
| 944 | #define BCHP_MISC_DAC_DETECT_TIMING_0_STRB_DLY_MASK 0x000000ff |
|---|
| 945 | #define BCHP_MISC_DAC_DETECT_TIMING_0_STRB_DLY_SHIFT 0 |
|---|
| 946 | #define BCHP_MISC_DAC_DETECT_TIMING_0_STRB_DLY_DEFAULT 0x00000004 |
|---|
| 947 | |
|---|
| 948 | /*************************************************************************** |
|---|
| 949 | *DAC_CABLE_STATUS_0 - DAC cable connect status |
|---|
| 950 | ***************************************************************************/ |
|---|
| 951 | /* MISC :: DAC_CABLE_STATUS_0 :: reserved0 [31:05] */ |
|---|
| 952 | #define BCHP_MISC_DAC_CABLE_STATUS_0_reserved0_MASK 0xffffffe0 |
|---|
| 953 | #define BCHP_MISC_DAC_CABLE_STATUS_0_reserved0_SHIFT 5 |
|---|
| 954 | |
|---|
| 955 | /* MISC :: DAC_CABLE_STATUS_0 :: CALIBRATED [04:04] */ |
|---|
| 956 | #define BCHP_MISC_DAC_CABLE_STATUS_0_CALIBRATED_MASK 0x00000010 |
|---|
| 957 | #define BCHP_MISC_DAC_CABLE_STATUS_0_CALIBRATED_SHIFT 4 |
|---|
| 958 | #define BCHP_MISC_DAC_CABLE_STATUS_0_CALIBRATED_DEFAULT 0x00000000 |
|---|
| 959 | |
|---|
| 960 | /* MISC :: DAC_CABLE_STATUS_0 :: DAC3_CONNECTED [03:03] */ |
|---|
| 961 | #define BCHP_MISC_DAC_CABLE_STATUS_0_DAC3_CONNECTED_MASK 0x00000008 |
|---|
| 962 | #define BCHP_MISC_DAC_CABLE_STATUS_0_DAC3_CONNECTED_SHIFT 3 |
|---|
| 963 | #define BCHP_MISC_DAC_CABLE_STATUS_0_DAC3_CONNECTED_DEFAULT 0x00000000 |
|---|
| 964 | |
|---|
| 965 | /* MISC :: DAC_CABLE_STATUS_0 :: DAC2_CONNECTED [02:02] */ |
|---|
| 966 | #define BCHP_MISC_DAC_CABLE_STATUS_0_DAC2_CONNECTED_MASK 0x00000004 |
|---|
| 967 | #define BCHP_MISC_DAC_CABLE_STATUS_0_DAC2_CONNECTED_SHIFT 2 |
|---|
| 968 | #define BCHP_MISC_DAC_CABLE_STATUS_0_DAC2_CONNECTED_DEFAULT 0x00000000 |
|---|
| 969 | |
|---|
| 970 | /* MISC :: DAC_CABLE_STATUS_0 :: DAC1_CONNECTED [01:01] */ |
|---|
| 971 | #define BCHP_MISC_DAC_CABLE_STATUS_0_DAC1_CONNECTED_MASK 0x00000002 |
|---|
| 972 | #define BCHP_MISC_DAC_CABLE_STATUS_0_DAC1_CONNECTED_SHIFT 1 |
|---|
| 973 | #define BCHP_MISC_DAC_CABLE_STATUS_0_DAC1_CONNECTED_DEFAULT 0x00000000 |
|---|
| 974 | |
|---|
| 975 | /* MISC :: DAC_CABLE_STATUS_0 :: DAC0_CONNECTED [00:00] */ |
|---|
| 976 | #define BCHP_MISC_DAC_CABLE_STATUS_0_DAC0_CONNECTED_MASK 0x00000001 |
|---|
| 977 | #define BCHP_MISC_DAC_CABLE_STATUS_0_DAC0_CONNECTED_SHIFT 0 |
|---|
| 978 | #define BCHP_MISC_DAC_CABLE_STATUS_0_DAC0_CONNECTED_DEFAULT 0x00000000 |
|---|
| 979 | |
|---|
| 980 | /*************************************************************************** |
|---|
| 981 | *DAC_CABLE_DETECT_DEBUG_0 - Dac Cable detect debug register |
|---|
| 982 | ***************************************************************************/ |
|---|
| 983 | /* MISC :: DAC_CABLE_DETECT_DEBUG_0 :: reserved0 [31:29] */ |
|---|
| 984 | #define BCHP_MISC_DAC_CABLE_DETECT_DEBUG_0_reserved0_MASK 0xe0000000 |
|---|
| 985 | #define BCHP_MISC_DAC_CABLE_DETECT_DEBUG_0_reserved0_SHIFT 29 |
|---|
| 986 | |
|---|
| 987 | /* MISC :: DAC_CABLE_DETECT_DEBUG_0 :: CAL_STATE [28:27] */ |
|---|
| 988 | #define BCHP_MISC_DAC_CABLE_DETECT_DEBUG_0_CAL_STATE_MASK 0x18000000 |
|---|
| 989 | #define BCHP_MISC_DAC_CABLE_DETECT_DEBUG_0_CAL_STATE_SHIFT 27 |
|---|
| 990 | #define BCHP_MISC_DAC_CABLE_DETECT_DEBUG_0_CAL_STATE_DEFAULT 0x00000000 |
|---|
| 991 | |
|---|
| 992 | /* MISC :: DAC_CABLE_DETECT_DEBUG_0 :: TOP_STATE [26:24] */ |
|---|
| 993 | #define BCHP_MISC_DAC_CABLE_DETECT_DEBUG_0_TOP_STATE_MASK 0x07000000 |
|---|
| 994 | #define BCHP_MISC_DAC_CABLE_DETECT_DEBUG_0_TOP_STATE_SHIFT 24 |
|---|
| 995 | #define BCHP_MISC_DAC_CABLE_DETECT_DEBUG_0_TOP_STATE_DEFAULT 0x00000000 |
|---|
| 996 | |
|---|
| 997 | /* MISC :: DAC_CABLE_DETECT_DEBUG_0 :: SDAC_STATE [23:21] */ |
|---|
| 998 | #define BCHP_MISC_DAC_CABLE_DETECT_DEBUG_0_SDAC_STATE_MASK 0x00e00000 |
|---|
| 999 | #define BCHP_MISC_DAC_CABLE_DETECT_DEBUG_0_SDAC_STATE_SHIFT 21 |
|---|
| 1000 | #define BCHP_MISC_DAC_CABLE_DETECT_DEBUG_0_SDAC_STATE_DEFAULT 0x00000000 |
|---|
| 1001 | |
|---|
| 1002 | /* MISC :: DAC_CABLE_DETECT_DEBUG_0 :: ADC_CYCLE_STATE [20:18] */ |
|---|
| 1003 | #define BCHP_MISC_DAC_CABLE_DETECT_DEBUG_0_ADC_CYCLE_STATE_MASK 0x001c0000 |
|---|
| 1004 | #define BCHP_MISC_DAC_CABLE_DETECT_DEBUG_0_ADC_CYCLE_STATE_SHIFT 18 |
|---|
| 1005 | #define BCHP_MISC_DAC_CABLE_DETECT_DEBUG_0_ADC_CYCLE_STATE_DEFAULT 0x00000000 |
|---|
| 1006 | |
|---|
| 1007 | /* MISC :: DAC_CABLE_DETECT_DEBUG_0 :: SQWAVE_STATE [17:15] */ |
|---|
| 1008 | #define BCHP_MISC_DAC_CABLE_DETECT_DEBUG_0_SQWAVE_STATE_MASK 0x00038000 |
|---|
| 1009 | #define BCHP_MISC_DAC_CABLE_DETECT_DEBUG_0_SQWAVE_STATE_SHIFT 15 |
|---|
| 1010 | #define BCHP_MISC_DAC_CABLE_DETECT_DEBUG_0_SQWAVE_STATE_DEFAULT 0x00000000 |
|---|
| 1011 | |
|---|
| 1012 | /* MISC :: DAC_CABLE_DETECT_DEBUG_0 :: GAIN_ADJ_OUT [14:07] */ |
|---|
| 1013 | #define BCHP_MISC_DAC_CABLE_DETECT_DEBUG_0_GAIN_ADJ_OUT_MASK 0x00007f80 |
|---|
| 1014 | #define BCHP_MISC_DAC_CABLE_DETECT_DEBUG_0_GAIN_ADJ_OUT_SHIFT 7 |
|---|
| 1015 | #define BCHP_MISC_DAC_CABLE_DETECT_DEBUG_0_GAIN_ADJ_OUT_DEFAULT 0x00000000 |
|---|
| 1016 | |
|---|
| 1017 | /* MISC :: DAC_CABLE_DETECT_DEBUG_0 :: LOW_POWER_EN [06:03] */ |
|---|
| 1018 | #define BCHP_MISC_DAC_CABLE_DETECT_DEBUG_0_LOW_POWER_EN_MASK 0x00000078 |
|---|
| 1019 | #define BCHP_MISC_DAC_CABLE_DETECT_DEBUG_0_LOW_POWER_EN_SHIFT 3 |
|---|
| 1020 | #define BCHP_MISC_DAC_CABLE_DETECT_DEBUG_0_LOW_POWER_EN_DEFAULT 0x00000000 |
|---|
| 1021 | |
|---|
| 1022 | /* MISC :: DAC_CABLE_DETECT_DEBUG_0 :: MUX_MODE [02:02] */ |
|---|
| 1023 | #define BCHP_MISC_DAC_CABLE_DETECT_DEBUG_0_MUX_MODE_MASK 0x00000004 |
|---|
| 1024 | #define BCHP_MISC_DAC_CABLE_DETECT_DEBUG_0_MUX_MODE_SHIFT 2 |
|---|
| 1025 | #define BCHP_MISC_DAC_CABLE_DETECT_DEBUG_0_MUX_MODE_DEFAULT 0x00000000 |
|---|
| 1026 | |
|---|
| 1027 | /* MISC :: DAC_CABLE_DETECT_DEBUG_0 :: CH_SEL [01:00] */ |
|---|
| 1028 | #define BCHP_MISC_DAC_CABLE_DETECT_DEBUG_0_CH_SEL_MASK 0x00000003 |
|---|
| 1029 | #define BCHP_MISC_DAC_CABLE_DETECT_DEBUG_0_CH_SEL_SHIFT 0 |
|---|
| 1030 | #define BCHP_MISC_DAC_CABLE_DETECT_DEBUG_0_CH_SEL_DEFAULT 0x00000000 |
|---|
| 1031 | |
|---|
| 1032 | /*************************************************************************** |
|---|
| 1033 | *DAC_CRC_CTRL - Dac CRC control register |
|---|
| 1034 | ***************************************************************************/ |
|---|
| 1035 | /* MISC :: DAC_CRC_CTRL :: reserved0 [31:22] */ |
|---|
| 1036 | #define BCHP_MISC_DAC_CRC_CTRL_reserved0_MASK 0xffc00000 |
|---|
| 1037 | #define BCHP_MISC_DAC_CRC_CTRL_reserved0_SHIFT 22 |
|---|
| 1038 | |
|---|
| 1039 | /* MISC :: DAC_CRC_CTRL :: COUNT [21:06] */ |
|---|
| 1040 | #define BCHP_MISC_DAC_CRC_CTRL_COUNT_MASK 0x003fffc0 |
|---|
| 1041 | #define BCHP_MISC_DAC_CRC_CTRL_COUNT_SHIFT 6 |
|---|
| 1042 | #define BCHP_MISC_DAC_CRC_CTRL_COUNT_DEFAULT 0x00000000 |
|---|
| 1043 | |
|---|
| 1044 | /* MISC :: DAC_CRC_CTRL :: START [05:05] */ |
|---|
| 1045 | #define BCHP_MISC_DAC_CRC_CTRL_START_MASK 0x00000020 |
|---|
| 1046 | #define BCHP_MISC_DAC_CRC_CTRL_START_SHIFT 5 |
|---|
| 1047 | #define BCHP_MISC_DAC_CRC_CTRL_START_DEFAULT 0x00000000 |
|---|
| 1048 | |
|---|
| 1049 | /* MISC :: DAC_CRC_CTRL :: DAC_SEL [04:02] */ |
|---|
| 1050 | #define BCHP_MISC_DAC_CRC_CTRL_DAC_SEL_MASK 0x0000001c |
|---|
| 1051 | #define BCHP_MISC_DAC_CRC_CTRL_DAC_SEL_SHIFT 2 |
|---|
| 1052 | #define BCHP_MISC_DAC_CRC_CTRL_DAC_SEL_DEFAULT 0x00000000 |
|---|
| 1053 | |
|---|
| 1054 | /* MISC :: DAC_CRC_CTRL :: MODE [01:01] */ |
|---|
| 1055 | #define BCHP_MISC_DAC_CRC_CTRL_MODE_MASK 0x00000002 |
|---|
| 1056 | #define BCHP_MISC_DAC_CRC_CTRL_MODE_SHIFT 1 |
|---|
| 1057 | #define BCHP_MISC_DAC_CRC_CTRL_MODE_DEFAULT 0x00000000 |
|---|
| 1058 | #define BCHP_MISC_DAC_CRC_CTRL_MODE_SINGLE 0 |
|---|
| 1059 | #define BCHP_MISC_DAC_CRC_CTRL_MODE_CONTINUOUS 1 |
|---|
| 1060 | |
|---|
| 1061 | /* MISC :: DAC_CRC_CTRL :: EN [00:00] */ |
|---|
| 1062 | #define BCHP_MISC_DAC_CRC_CTRL_EN_MASK 0x00000001 |
|---|
| 1063 | #define BCHP_MISC_DAC_CRC_CTRL_EN_SHIFT 0 |
|---|
| 1064 | #define BCHP_MISC_DAC_CRC_CTRL_EN_DEFAULT 0x00000000 |
|---|
| 1065 | |
|---|
| 1066 | /*************************************************************************** |
|---|
| 1067 | *DAC_CRC_VALUE - DAC CRC value register |
|---|
| 1068 | ***************************************************************************/ |
|---|
| 1069 | /* MISC :: DAC_CRC_VALUE :: VALUE [31:00] */ |
|---|
| 1070 | #define BCHP_MISC_DAC_CRC_VALUE_VALUE_MASK 0xffffffff |
|---|
| 1071 | #define BCHP_MISC_DAC_CRC_VALUE_VALUE_SHIFT 0 |
|---|
| 1072 | #define BCHP_MISC_DAC_CRC_VALUE_VALUE_DEFAULT 0x00000000 |
|---|
| 1073 | |
|---|
| 1074 | /*************************************************************************** |
|---|
| 1075 | *DAC_CRC_STATUS - DAC CRC status register |
|---|
| 1076 | ***************************************************************************/ |
|---|
| 1077 | /* MISC :: DAC_CRC_STATUS :: reserved0 [31:02] */ |
|---|
| 1078 | #define BCHP_MISC_DAC_CRC_STATUS_reserved0_MASK 0xfffffffc |
|---|
| 1079 | #define BCHP_MISC_DAC_CRC_STATUS_reserved0_SHIFT 2 |
|---|
| 1080 | |
|---|
| 1081 | /* MISC :: DAC_CRC_STATUS :: VALID [01:01] */ |
|---|
| 1082 | #define BCHP_MISC_DAC_CRC_STATUS_VALID_MASK 0x00000002 |
|---|
| 1083 | #define BCHP_MISC_DAC_CRC_STATUS_VALID_SHIFT 1 |
|---|
| 1084 | #define BCHP_MISC_DAC_CRC_STATUS_VALID_DEFAULT 0x00000000 |
|---|
| 1085 | |
|---|
| 1086 | /* MISC :: DAC_CRC_STATUS :: MATCHING [00:00] */ |
|---|
| 1087 | #define BCHP_MISC_DAC_CRC_STATUS_MATCHING_MASK 0x00000001 |
|---|
| 1088 | #define BCHP_MISC_DAC_CRC_STATUS_MATCHING_SHIFT 0 |
|---|
| 1089 | #define BCHP_MISC_DAC_CRC_STATUS_MATCHING_DEFAULT 0x00000000 |
|---|
| 1090 | |
|---|
| 1091 | #endif /* #ifndef BCHP_MISC_H__ */ |
|---|
| 1092 | |
|---|
| 1093 | /* End of File */ |
|---|
