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bchp_oob.h

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1	/***************************************************************************
2	* Copyright (c) 1999-2012, Broadcom Corporation
3	* All Rights Reserved
4	* Confidential Property of Broadcom Corporation
5	*
6	*
7	* THIS SOFTWARE MAY ONLY BE USED SUBJECT TO AN EXECUTED SOFTWARE LICENSE
8	* AGREEMENT BETWEEN THE USER AND BROADCOM. YOU HAVE NO RIGHT TO USE OR
9	* EXPLOIT THIS MATERIAL EXCEPT SUBJECT TO THE TERMS OF SUCH AN AGREEMENT.
10	*
11	* $brcm_Workfile: bchp_oob.h $
12	* $brcm_Revision: Hydra_Software_Devel/2 $
13	* $brcm_Date: 2/7/12 1:36p $
14	*
15	* Module Description:
16	* DO NOT EDIT THIS FILE DIRECTLY
17	*
18	* This module was generated magically with RDB from a source description
19	* file. You must edit the source file for changes to be made to this file.
20	*
21	*
22	* Date: Generated on Tue Feb 7 10:59:53 2012
23	* MD5 Checksum d41d8cd98f00b204e9800998ecf8427e
24	*
25	* Compiled with: RDB Utility combo_header.pl
26	* RDB Parser 3.0
27	* unknown unknown
28	* Perl Interpreter 5.008008
29	* Operating System linux
30	*
31	* Revision History:
32	*
33	* $brcm_Log: /magnum/basemodules/chp/7552/rdb/b0/bchp_oob.h $
34	*
35	* Hydra_Software_Devel/2 2/7/12 1:36p pntruong
36	* SW7552-89: Synced up with central rdb.
37	*
38	***************************************************************************/
39
40	#ifndef BCHP_OOB_H__
41	#define BCHP_OOB_H__
42
43	/***************************************************************************
44	*OOB - Out of Band Receiver Registers
45	***************************************************************************/
46	#define BCHP_OOB_REVID 0x00c20000 /* Out-of-Band Macrocell Revision ID */
47	#define BCHP_OOB_CONFIG 0x00c20004 /* Out-of-Band Configuration Register */
48	#define BCHP_OOB_IRQST 0x00c20008 /* Out-of-Band Interrupt Status Register */
49	#define BCHP_OOB_RST 0x00c2000c /* Out-of-Band Reset Register */
50	#define BCHP_OOB_BYP 0x00c20010 /* Out-of-Band Bypass Register */
51	#define BCHP_OOB_CTRL1 0x00c20014 /* Out-of-Band Control1 Register */
52	#define BCHP_OOB_CTRL2 0x00c20018 /* Out-of-Band Control2 Register */
53	#define BCHP_OOB_CTRL3 0x00c2001c /* Out-of-Band Control3 Register */
54	#define BCHP_OOB_CTRL4 0x00c20020 /* Out-of-Band Control4 Register */
55	#define BCHP_OOB_CTRL5 0x00c20024 /* Out-of-Band Control5 Register */
56	#define BCHP_OOB_CTRL6 0x00c20028 /* Control6 Register */
57	#define BCHP_OOB_STF0 0x00c2002c /* Out-of-Band Store FFE Coefficient #0 (newest precursor) Register */
58	#define BCHP_OOB_STF1 0x00c20030 /* Out-of-Band Store FFE Coefficient #1 (main tap) Register */
59	#define BCHP_OOB_LDF0 0x00c20034 /* Out-of-Band Load FFE Coefficient #0 (newest precursor) Register */
60	#define BCHP_OOB_LDF1 0x00c20038 /* Out-of-Band Load FFE Coefficient #1 (main tap) Register */
61	#define BCHP_OOB_STD0 0x00c2003c /* Out-of-Band Store DFE Coefficient #0 (first postcursor) Register */
62	#define BCHP_OOB_STD1 0x00c20040 /* Out-of-Band Store DFE Coefficient #1 (second postcursor) Register */
63	#define BCHP_OOB_LDD0 0x00c20044 /* Out-of-Band Load DFE Coefficient #0 (first postcursor) Register */
64	#define BCHP_OOB_LDD1 0x00c20048 /* Out-of-Band Load DFE Coefficient #1 (second postcursor) Register */
65	#define BCHP_OOB_LDSFT 0x00c2004c /* Out-of-Band Load the Current Soft Decision Register */
66	#define BCHP_OOB_STSNRT 0x00c20050 /* Out-of-Band Store QPSK SNR High/Low Threshold Value Register */
67	#define BCHP_OOB_STSNRE 0x00c20054 /* Out-of-Band Store QPSK SNR Estimate Register */
68	#define BCHP_OOB_STSNRC 0x00c20058 /* Out-of-Band Store QPSK SNR Control Value Register */
69	#define BCHP_OOB_LDSNRE 0x00c2005c /* Out-of-Band Load QPSK SNR Estimate Register */
70	#define BCHP_OOB_STATHR 0x00c20060 /* Out-of-Band Store the AGC Loop Threshold Register */
71	#define BCHP_OOB_STABW 0x00c20064 /* Out-of-Band Store the IF and Tuner AGC Loop Bandwidth Register */
72	#define BCHP_OOB_STAII 0x00c20068 /* Out-of-Band Store the IF AGC Integrator Register */
73	#define BCHP_OOB_STAIT 0x00c2006c /* Out-of-Band Store the Tuner AGC Integrator Register */
74	#define BCHP_OOB_STAGI 0x00c20070 /* Out-of-Band Store the IF AGC Gain Threshold Register (28 bits) */
75	#define BCHP_OOB_STAGT 0x00c20074 /* Out-of-Band Store the Tuner AGC Gain Threshold Register (28 bits) */
76	#define BCHP_OOB_STADEL 0x00c20078 /* Out-of-Band Store the General Purpose Delta-Sigma Gain Control Register */
77	#define BCHP_OOB_LDADSI 0x00c2007c /* Out-of-Band Load the AGC IF Loop Delta-Sigma Register */
78	#define BCHP_OOB_LDADST 0x00c20080 /* Out-of-Band Load the AGC Tuner Loop Delta-Sigma Register */
79	#define BCHP_OOB_LDAII 0x00c20084 /* Out-of-Band Load the IF AGC Integrator Content Register */
80	#define BCHP_OOB_LDALI 0x00c20088 /* Out-of-Band Load the AGC Leaking Integrator Content Register */
81	#define BCHP_OOB_LDAIT 0x00c2008c /* Out-of-Band Load the Tuner AGC Integrator Content Register */
82	#define BCHP_OOB_LDAGI 0x00c20090 /* Out-of-Band Load the IF AGC Gain Threshold Register (28 bits) */
83	#define BCHP_OOB_LDAGT 0x00c20094 /* Out-of-Band Load the Tuner AGC Gain Threshold Register (28 bits) */
84	#define BCHP_OOB_LDADEL 0x00c20098 /* Out-of-Band Load the General Purpose Delta-Sigma Gain Control Register */
85	#define BCHP_OOB_STBRLC 0x00c2009c /* Out-of-Band Store the Baud Recovery Loop Linear Coefficient Register */
86	#define BCHP_OOB_STBRIC 0x00c200a0 /* Out-of-Band Store the Baud Recovery Loop Integrator Coefficient Register */
87	#define BCHP_OOB_STBRI 0x00c200a4 /* Out-of-Band Store the Baud Recovery Loop Integrator Content Register */
88	#define BCHP_OOB_STBFOS 0x00c200a8 /* Out-of-Band Store the Baud Recovery Loop Frequency Offset Register */
89	#define BCHP_OOB_STBEN 0x00c200ac /* Out-of-Band Store the Baud Recovery Loop Enable Register */
90	#define BCHP_OOB_LDBRFO 0x00c200b4 /* Out-of-Band Load the Baud Recovery Loop Filter Output Register */
91	#define BCHP_OOB_LDBNCO 0x00c200b8 /* Out-of-Band Load the Baud Recovery Loop NCO Content Register */
92	#define BCHP_OOB_LDBRI 0x00c200bc /* Out-of-Band Load the Baud Recovery Loop Integrator Content Register */
93	#define BCHP_OOB_STDRLC 0x00c200c0 /* Out-of-Band Store Front Derotator Linear Filter Coefficient Register */
94	#define BCHP_OOB_STDRIC 0x00c200c4 /* Out-of-Band Store Front Derotator Integrator Filter Coefficient Register */
95	#define BCHP_OOB_STDRI 0x00c200c8 /* Out-of-Band Store Front Derotator Integrator Content Register */
96	#define BCHP_OOB_STDRSP 0x00c200cc /* Out-of-Band Store Front Derotator Sweep Control Register */
97	#define BCHP_OOB_STDRPA 0x00c200d0 /* Out-of-Band Store Front Derotator Phase Accumulator Content Register */
98	#define BCHP_OOB_STD2I 0x00c200d4 /* Out-of-Band Store Back Derotator Integrator Content Register */
99	#define BCHP_OOB_STD2IC 0x00c200d8 /* Out-of-Band Store Back Derotator Integrator Coefficient Register */
100	#define BCHP_OOB_STD2LC 0x00c200dc /* Out-of-Band Store Back Derotator Linear Coefficient Register */
101	#define BCHP_OOB_STD2PA 0x00c200e0 /* Out-of-Band Store Back Derotator Phase Accumulator Register */
102	#define BCHP_OOB_LDDRFO 0x00c200e4 /* Out-of-Band Load Front Derotator Filter Output Register */
103	#define BCHP_OOB_LDDRPA 0x00c200e8 /* Out-of-Band Load Front Derotator Phase Accumulator Content Register */
104	#define BCHP_OOB_LDDRI 0x00c200ec /* Out-of-Band Load Front Derotator Integrator Content Register */
105	#define BCHP_OOB_LDD2FO 0x00c200f0 /* Out-of-Band Load Back Derotator Filter Output Register */
106	#define BCHP_OOB_LDD2PA 0x00c200f4 /* Out-of-Band Load Back Derotator Phase Accumulator Content Register */
107	#define BCHP_OOB_LDD2I 0x00c200f8 /* Out-of-Band Load Back Derotator Integrator Content Register */
108	#define BCHP_OOB_STCLP 0x00c20104 /* Out-of-Band Store ADC Clip Counter Value Register */
109	#define BCHP_OOB_LDCLP 0x00c20110 /* Out-of-Band Load ADC Clip Counter Value Register */
110	#define BCHP_OOB_STLPST 0x00c20114 /* Out-of-Band Store Test Values Register */
111	#define BCHP_OOB_STFECL 0x00c20118 /* Out-of-Band Store FEC Lower Control Register */
112	#define BCHP_OOB_STFECH 0x00c2011c /* Out-of-Band Store FEC Upper Control Register */
113	#define BCHP_OOB_STIDLEC 0x00c20120 /* Out-of-Band Store FEC IDLE Cell Count Register */
114	#define BCHP_OOB_STUERC 0x00c20124 /* Out-of-Band Store FEC UER Counter Register */
115	#define BCHP_OOB_STATMC 0x00c20128 /* Out-of-Band Store ATM_CELL_TOTAL_COUNT Test Value Register (BCM_USE) */
116	#define BCHP_OOB_STRSB 0x00c2012c /* Out-of-Band Store RS_BYTE_CORRECTION_COUNT Test Value Register (BCM_USE) */
117	#define BCHP_OOB_STHEC 0x00c20130 /* Out-of-Band Store HEC_ERROR_COUNT Test Value Register (BCM_USE) */
118	#define BCHP_OOB_STATML 0x00c20134 /* Out-of-Band Store ATM_CELL_LOSS_COUNT Test Value Register (BCM_USE) */
119	#define BCHP_OOB_STSL 0x00c20138 /* Out-of-Band Store SL_ESF_CRC_ERROR_COUNT Test Value Register (BCM_USE) */
120	#define BCHP_OOB_STSF 0x00c2013c /* Out-of-Band Store SF_ESF_TOTAL_COUNT Test Value Register (BCM_USE) */
121	#define BCHP_OOB_STRXC 0x00c20140 /* Out-of-Band Store Rx_CRC_ERROR_COUNT Test Value Register (BCM_USE) */
122	#define BCHP_OOB_STPAR 0x00c20144 /* Out-of-Band Store Mbit PARITY_ERROR_COUNT Test Value Register (BCM_USE) */
123	#define BCHP_OOB_LDFECL 0x00c20148 /* Out-of-Band Load FEC Lower Control Register */
124	#define BCHP_OOB_LDFECH 0x00c2014c /* Out-of-Band Store FEC Upper Control Register */
125	#define BCHP_OOB_LDIDLEC 0x00c20150 /* Out-of-Band Load FEC IDLE Cell Count Register */
126	#define BCHP_OOB_LDUERC 0x00c20154 /* Out-of-Band Load FEC UER Counter Register */
127	#define BCHP_OOB_LDATMC 0x00c20158 /* Out-of-Band Load ATM_CELL_TOTAL_COUNT Test Value Register (BCM_USE) */
128	#define BCHP_OOB_LDRSB 0x00c2015c /* Out-of-Band Load RS_BYTE_CORRECTION_COUNT Test Value Register (BCM_USE) */
129	#define BCHP_OOB_LDHEC 0x00c20160 /* Out-of-Band Load HEC_ERROR_COUNT Test Value Register (BCM_USE) */
130	#define BCHP_OOB_LDATML 0x00c20164 /* Out-of-Band Load ATM_CELL_LOSS_COUNT Test Value Register (BCM_USE) */
131	#define BCHP_OOB_LDSL 0x00c20168 /* Out-of-Band Load SL_ESF_CRC_ERROR_COUNT Test Value Register (BCM_USE) */
132	#define BCHP_OOB_LDSF 0x00c2016c /* Out-of-Band Load SF_ESF_TOTAL_COUNT Test Value Register (BCM_USE) */
133	#define BCHP_OOB_LDRXC 0x00c20170 /* Out-of-Band Load Rx_CRC_ERROR_COUNT Test Value Register (BCM_USE) */
134	#define BCHP_OOB_LDPAR 0x00c20174 /* Out-of-Band Load Mbit PARITY_ERROR_COUNT Test Value Register (BCM_USE) */
135	#define BCHP_OOB_STBERTT 0x00c20178 /* Out-of-Band Store On-Chip BERT Integration Period and Threshold Register */
136	#define BCHP_OOB_LDBERTT 0x00c2017c /* Out-of-Band Load On-Chip BERT Integration Period and Threshold Register */
137	#define BCHP_OOB_LDBERTC 0x00c20180 /* Out-of-Band Load On-Chip BERT Error Counter Value Register */
138	#define BCHP_OOB_STDCC 0x00c20184 /* Out-of-Band Store DC Canceller Integrator Value Register */
139	#define BCHP_OOB_LDDCC 0x00c20188 /* Out-of-Band Load DC Canceller Integrator Value Register */
140	#define BCHP_OOB_STFLA 0x00c2018c /* Out-of-Band Store the 18-bit Lock Accumulator Register */
141	#define BCHP_OOB_STFLTH 0x00c20190 /* Out-of-Band Store the 6-bit Lock Indicator Threshold1 and Threshold2 Values Register */
142	#define BCHP_OOB_LDFLA 0x00c20194 /* Out-of-Band Load the 18-bit Lock Accumulator Register */
143	#define BCHP_OOB_IRQSTA2C 0x00c20198 /* Out-of-Band IRQ to CPU Status Register */
144	#define BCHP_OOB_IRQSET2C 0x00c2019c /* Out-of-Band Set IRQ to CPU Register */
145	#define BCHP_OOB_IRQCLR2C 0x00c201a0 /* Out-of-Band CLear IRQ to CPU Register */
146	#define BCHP_OOB_IRQMSK2C 0x00c201a4 /* Out-of-Band IRQ to CPU Mask Register */
147	#define BCHP_OOB_IRQMST2C 0x00c201a8 /* Out-of-Band IRQ to CPU Mask Set Register */
148	#define BCHP_OOB_IRQMCL2C 0x00c201ac /* Out-of-Band IRQ to CPU Mask Clear Register */
149	#define BCHP_OOB_IRQSTA2P 0x00c201b0 /* Out-of-Band IRQ to PCI Status Register */
150	#define BCHP_OOB_IRQSET2P 0x00c201b4 /* Out-of-Band Set IRQ to PCI Register */
151	#define BCHP_OOB_IRQCLR2P 0x00c201b8 /* Out-of-Band CLear IRQ to PCI Register */
152	#define BCHP_OOB_IRQMSK2P 0x00c201bc /* Out-of-Band IRQ to PCI Mask Register */
153	#define BCHP_OOB_IRQMST2P 0x00c201c0 /* Out-of-Band IRQ to PCI Mask Set Register */
154	#define BCHP_OOB_IRQMCL2P 0x00c201c4 /* Out-of-Band IRQ to PCI Mask Clear Register */
155	#define BCHP_OOB_TEST_OUTPUT_CTRL 0x00c201c8 /* Out-of-Band output control for testing */
156	#define BCHP_OOB_TEST_FEC_OUT 0x00c201cc /* Out-of-Band FEC output value for testing */
157	#define BCHP_OOB_TEST_FCW_OUT 0x00c201d0 /* Out-of-Band FCW output value for testing */
158	#define BCHP_OOB_SERIAL_OUTPUT_CTRL 0x00c201d4 /* Out-of_Band Serial Output Control to XPT and POD */
159	#define BCHP_OOB_IRQSTA2A 0x00c201d8 /* Out-of-Band IRQ to AP Status Register */
160	#define BCHP_OOB_IRQSET2A 0x00c201dc /* Out-of-Band Set IRQ to AP Register */
161	#define BCHP_OOB_IRQCLR2A 0x00c201e0 /* Out-of-Band CLear IRQ to AP Register */
162	#define BCHP_OOB_IRQMSK2A 0x00c201e4 /* Out-of-Band IRQ to AP Mask Register */
163	#define BCHP_OOB_IRQMST2A 0x00c201e8 /* Out-of-Band IRQ to AP Mask Set Register */
164	#define BCHP_OOB_IRQMCL2A 0x00c201ec /* Out-of-Band IRQ to AP Mask Clear Register */
165	#define BCHP_OOB_FCW_SCALE 0x00c201f0 /* Out-of-Band FCW Output Scaling */
166	#define BCHP_OOB_DAGC_LEAKY 0x00c201f4 /* Out-of-Band DAGC Leaky Integrator value */
167	#define BCHP_OOB_DAGC_LPINT 0x00c201f8 /* Out-of-Band DAGC Loop Integrator value */
168
169	/***************************************************************************
170	*REVID - Out-of-Band Macrocell Revision ID
171	***************************************************************************/
172	/* OOB :: REVID :: reserved0 [31:16] */
173	#define BCHP_OOB_REVID_reserved0_MASK 0xffff0000
174	#define BCHP_OOB_REVID_reserved0_SHIFT 16
175
176	/* OOB :: REVID :: REVID [15:00] */
177	#define BCHP_OOB_REVID_REVID_MASK 0x0000ffff
178	#define BCHP_OOB_REVID_REVID_SHIFT 0
179
180	/***************************************************************************
181	*CONFIG - Out-of-Band Configuration Register
182	***************************************************************************/
183	/* OOB :: CONFIG :: reserved0 [31:28] */
184	#define BCHP_OOB_CONFIG_reserved0_MASK 0xf0000000
185	#define BCHP_OOB_CONFIG_reserved0_SHIFT 28
186
187	/* OOB :: CONFIG :: RCVRBYP_EDGE [27:27] */
188	#define BCHP_OOB_CONFIG_RCVRBYP_EDGE_MASK 0x08000000
189	#define BCHP_OOB_CONFIG_RCVRBYP_EDGE_SHIFT 27
190	#define BCHP_OOB_CONFIG_RCVRBYP_EDGE_DEFAULT 0x00000000
191
192	/* OOB :: CONFIG :: RCVRBYP_DSWAP [26:26] */
193	#define BCHP_OOB_CONFIG_RCVRBYP_DSWAP_MASK 0x04000000
194	#define BCHP_OOB_CONFIG_RCVRBYP_DSWAP_SHIFT 26
195	#define BCHP_OOB_CONFIG_RCVRBYP_DSWAP_DEFAULT 0x00000000
196
197	/* OOB :: CONFIG :: RCVRBYP_DINV [25:24] */
198	#define BCHP_OOB_CONFIG_RCVRBYP_DINV_MASK 0x03000000
199	#define BCHP_OOB_CONFIG_RCVRBYP_DINV_SHIFT 24
200	#define BCHP_OOB_CONFIG_RCVRBYP_DINV_DEFAULT 0x00000000
201
202	/* OOB :: CONFIG :: OB_CLK_SEL [23:23] */
203	#define BCHP_OOB_CONFIG_OB_CLK_SEL_MASK 0x00800000
204	#define BCHP_OOB_CONFIG_OB_CLK_SEL_SHIFT 23
205	#define BCHP_OOB_CONFIG_OB_CLK_SEL_DEFAULT 0x00000001
206
207	/* OOB :: CONFIG :: US_CLK_DIV [22:20] */
208	#define BCHP_OOB_CONFIG_US_CLK_DIV_MASK 0x00700000
209	#define BCHP_OOB_CONFIG_US_CLK_DIV_SHIFT 20
210	#define BCHP_OOB_CONFIG_US_CLK_DIV_DEFAULT 0x00000004
211
212	/* OOB :: CONFIG :: reserved1 [19:17] */
213	#define BCHP_OOB_CONFIG_reserved1_MASK 0x000e0000
214	#define BCHP_OOB_CONFIG_reserved1_SHIFT 17
215
216	/* OOB :: CONFIG :: Posted_RW [16:16] */
217	#define BCHP_OOB_CONFIG_Posted_RW_MASK 0x00010000
218	#define BCHP_OOB_CONFIG_Posted_RW_SHIFT 16
219	#define BCHP_OOB_CONFIG_Posted_RW_DEFAULT 0x00000001
220
221	/* OOB :: CONFIG :: reserved2 [15:09] */
222	#define BCHP_OOB_CONFIG_reserved2_MASK 0x0000fe00
223	#define BCHP_OOB_CONFIG_reserved2_SHIFT 9
224
225	/* OOB :: CONFIG :: W_DONE_M [08:08] */
226	#define BCHP_OOB_CONFIG_W_DONE_M_MASK 0x00000100
227	#define BCHP_OOB_CONFIG_W_DONE_M_SHIFT 8
228	#define BCHP_OOB_CONFIG_W_DONE_M_DEFAULT 0x00000000
229
230	/* OOB :: CONFIG :: R_DONE_M [07:07] */
231	#define BCHP_OOB_CONFIG_R_DONE_M_MASK 0x00000080
232	#define BCHP_OOB_CONFIG_R_DONE_M_SHIFT 7
233	#define BCHP_OOB_CONFIG_R_DONE_M_DEFAULT 0x00000000
234
235	/* OOB :: CONFIG :: DONE_M [06:06] */
236	#define BCHP_OOB_CONFIG_DONE_M_MASK 0x00000040
237	#define BCHP_OOB_CONFIG_DONE_M_SHIFT 6
238	#define BCHP_OOB_CONFIG_DONE_M_DEFAULT 0x00000000
239
240	/* OOB :: CONFIG :: FLI_IM [05:05] */
241	#define BCHP_OOB_CONFIG_FLI_IM_MASK 0x00000020
242	#define BCHP_OOB_CONFIG_FLI_IM_SHIFT 5
243	#define BCHP_OOB_CONFIG_FLI_IM_DEFAULT 0x00000000
244
245	/* OOB :: CONFIG :: FLI_LM [04:04] */
246	#define BCHP_OOB_CONFIG_FLI_LM_MASK 0x00000010
247	#define BCHP_OOB_CONFIG_FLI_LM_SHIFT 4
248	#define BCHP_OOB_CONFIG_FLI_LM_DEFAULT 0x00000000
249
250	/* OOB :: CONFIG :: FEC_IM [03:03] */
251	#define BCHP_OOB_CONFIG_FEC_IM_MASK 0x00000008
252	#define BCHP_OOB_CONFIG_FEC_IM_SHIFT 3
253	#define BCHP_OOB_CONFIG_FEC_IM_DEFAULT 0x00000000
254
255	/* OOB :: CONFIG :: FEC_LM [02:02] */
256	#define BCHP_OOB_CONFIG_FEC_LM_MASK 0x00000004
257	#define BCHP_OOB_CONFIG_FEC_LM_SHIFT 2
258	#define BCHP_OOB_CONFIG_FEC_LM_DEFAULT 0x00000000
259
260	/* OOB :: CONFIG :: SNR_IM [01:01] */
261	#define BCHP_OOB_CONFIG_SNR_IM_MASK 0x00000002
262	#define BCHP_OOB_CONFIG_SNR_IM_SHIFT 1
263	#define BCHP_OOB_CONFIG_SNR_IM_DEFAULT 0x00000000
264
265	/* OOB :: CONFIG :: SNR_LM [00:00] */
266	#define BCHP_OOB_CONFIG_SNR_LM_MASK 0x00000001
267	#define BCHP_OOB_CONFIG_SNR_LM_SHIFT 0
268	#define BCHP_OOB_CONFIG_SNR_LM_DEFAULT 0x00000000
269
270	/***************************************************************************
271	*IRQST - Out-of-Band Interrupt Status Register
272	***************************************************************************/
273	/* OOB :: IRQST :: reserved0 [31:06] */
274	#define BCHP_OOB_IRQST_reserved0_MASK 0xffffffc0
275	#define BCHP_OOB_IRQST_reserved0_SHIFT 6
276
277	/* OOB :: IRQST :: FLI_IS [05:05] */
278	#define BCHP_OOB_IRQST_FLI_IS_MASK 0x00000020
279	#define BCHP_OOB_IRQST_FLI_IS_SHIFT 5
280	#define BCHP_OOB_IRQST_FLI_IS_DEFAULT 0x00000000
281
282	/* OOB :: IRQST :: FLI_LS [04:04] */
283	#define BCHP_OOB_IRQST_FLI_LS_MASK 0x00000010
284	#define BCHP_OOB_IRQST_FLI_LS_SHIFT 4
285	#define BCHP_OOB_IRQST_FLI_LS_DEFAULT 0x00000000
286
287	/* OOB :: IRQST :: FEC_IS [03:03] */
288	#define BCHP_OOB_IRQST_FEC_IS_MASK 0x00000008
289	#define BCHP_OOB_IRQST_FEC_IS_SHIFT 3
290	#define BCHP_OOB_IRQST_FEC_IS_DEFAULT 0x00000000
291
292	/* OOB :: IRQST :: FEC_LS [02:02] */
293	#define BCHP_OOB_IRQST_FEC_LS_MASK 0x00000004
294	#define BCHP_OOB_IRQST_FEC_LS_SHIFT 2
295	#define BCHP_OOB_IRQST_FEC_LS_DEFAULT 0x00000000
296
297	/* OOB :: IRQST :: SNR_IS [01:01] */
298	#define BCHP_OOB_IRQST_SNR_IS_MASK 0x00000002
299	#define BCHP_OOB_IRQST_SNR_IS_SHIFT 1
300	#define BCHP_OOB_IRQST_SNR_IS_DEFAULT 0x00000000
301
302	/* OOB :: IRQST :: SNR_LS [00:00] */
303	#define BCHP_OOB_IRQST_SNR_LS_MASK 0x00000001
304	#define BCHP_OOB_IRQST_SNR_LS_SHIFT 0
305	#define BCHP_OOB_IRQST_SNR_LS_DEFAULT 0x00000000
306
307	/***************************************************************************
308	*RST - Out-of-Band Reset Register
309	***************************************************************************/
310	/* OOB :: RST :: reserved0 [31:01] */
311	#define BCHP_OOB_RST_reserved0_MASK 0xfffffffe
312	#define BCHP_OOB_RST_reserved0_SHIFT 1
313
314	/* OOB :: RST :: DAGC0 [00:00] */
315	#define BCHP_OOB_RST_DAGC0_MASK 0x00000001
316	#define BCHP_OOB_RST_DAGC0_SHIFT 0
317	#define BCHP_OOB_RST_DAGC0_DEFAULT 0x00000000
318
319	/***************************************************************************
320	*BYP - Out-of-Band Bypass Register
321	***************************************************************************/
322	/* OOB :: BYP :: reserved0 [31:02] */
323	#define BCHP_OOB_BYP_reserved0_MASK 0xfffffffc
324	#define BCHP_OOB_BYP_reserved0_SHIFT 2
325
326	/* OOB :: BYP :: ACI [01:01] */
327	#define BCHP_OOB_BYP_ACI_MASK 0x00000002
328	#define BCHP_OOB_BYP_ACI_SHIFT 1
329	#define BCHP_OOB_BYP_ACI_DEFAULT 0x00000000
330
331	/* OOB :: BYP :: DAGC0_LA [00:00] */
332	#define BCHP_OOB_BYP_DAGC0_LA_MASK 0x00000001
333	#define BCHP_OOB_BYP_DAGC0_LA_SHIFT 0
334	#define BCHP_OOB_BYP_DAGC0_LA_DEFAULT 0x00000001
335
336	/***************************************************************************
337	*CTRL1 - Out-of-Band Control1 Register
338	***************************************************************************/
339	/* OOB :: CTRL1 :: SFTRST [31:31] */
340	#define BCHP_OOB_CTRL1_SFTRST_MASK 0x80000000
341	#define BCHP_OOB_CTRL1_SFTRST_SHIFT 31
342	#define BCHP_OOB_CTRL1_SFTRST_DEFAULT 0x00000000
343
344	/* OOB :: CTRL1 :: FECRST [30:30] */
345	#define BCHP_OOB_CTRL1_FECRST_MASK 0x40000000
346	#define BCHP_OOB_CTRL1_FECRST_SHIFT 30
347	#define BCHP_OOB_CTRL1_FECRST_DEFAULT 0x00000001
348
349	/* OOB :: CTRL1 :: FFRST [29:29] */
350	#define BCHP_OOB_CTRL1_FFRST_MASK 0x20000000
351	#define BCHP_OOB_CTRL1_FFRST_SHIFT 29
352	#define BCHP_OOB_CTRL1_FFRST_DEFAULT 0x00000000
353
354	/* OOB :: CTRL1 :: reserved0 [28:28] */
355	#define BCHP_OOB_CTRL1_reserved0_MASK 0x10000000
356	#define BCHP_OOB_CTRL1_reserved0_SHIFT 28
357
358	/* OOB :: CTRL1 :: SNRRST [27:27] */
359	#define BCHP_OOB_CTRL1_SNRRST_MASK 0x08000000
360	#define BCHP_OOB_CTRL1_SNRRST_SHIFT 27
361	#define BCHP_OOB_CTRL1_SNRRST_DEFAULT 0x00000000
362
363	/* OOB :: CTRL1 :: DRLRST [26:26] */
364	#define BCHP_OOB_CTRL1_DRLRST_MASK 0x04000000
365	#define BCHP_OOB_CTRL1_DRLRST_SHIFT 26
366	#define BCHP_OOB_CTRL1_DRLRST_DEFAULT 0x00000000
367
368	/* OOB :: CTRL1 :: BRLRST [25:25] */
369	#define BCHP_OOB_CTRL1_BRLRST_MASK 0x02000000
370	#define BCHP_OOB_CTRL1_BRLRST_SHIFT 25
371	#define BCHP_OOB_CTRL1_BRLRST_DEFAULT 0x00000000
372
373	/* OOB :: CTRL1 :: AGLRST [24:24] */
374	#define BCHP_OOB_CTRL1_AGLRST_MASK 0x01000000
375	#define BCHP_OOB_CTRL1_AGLRST_SHIFT 24
376	#define BCHP_OOB_CTRL1_AGLRST_DEFAULT 0x00000000
377
378	/* OOB :: CTRL1 :: DAGC0_FRZ [23:23] */
379	#define BCHP_OOB_CTRL1_DAGC0_FRZ_MASK 0x00800000
380	#define BCHP_OOB_CTRL1_DAGC0_FRZ_SHIFT 23
381	#define BCHP_OOB_CTRL1_DAGC0_FRZ_DEFAULT 0x00000000
382
383	/* OOB :: CTRL1 :: FFRZR [22:22] */
384	#define BCHP_OOB_CTRL1_FFRZR_MASK 0x00400000
385	#define BCHP_OOB_CTRL1_FFRZR_SHIFT 22
386	#define BCHP_OOB_CTRL1_FFRZR_DEFAULT 0x00000000
387
388	/* OOB :: CTRL1 :: FFRZI [21:21] */
389	#define BCHP_OOB_CTRL1_FFRZI_MASK 0x00200000
390	#define BCHP_OOB_CTRL1_FFRZI_SHIFT 21
391	#define BCHP_OOB_CTRL1_FFRZI_DEFAULT 0x00000000
392
393	/* OOB :: CTRL1 :: FFRZ [20:20] */
394	#define BCHP_OOB_CTRL1_FFRZ_MASK 0x00100000
395	#define BCHP_OOB_CTRL1_FFRZ_SHIFT 20
396	#define BCHP_OOB_CTRL1_FFRZ_DEFAULT 0x00000000
397
398	/* OOB :: CTRL1 :: DFRZ [19:19] */
399	#define BCHP_OOB_CTRL1_DFRZ_MASK 0x00080000
400	#define BCHP_OOB_CTRL1_DFRZ_SHIFT 19
401	#define BCHP_OOB_CTRL1_DFRZ_DEFAULT 0x00000000
402
403	/* OOB :: CTRL1 :: DRLFRZ [18:18] */
404	#define BCHP_OOB_CTRL1_DRLFRZ_MASK 0x00040000
405	#define BCHP_OOB_CTRL1_DRLFRZ_SHIFT 18
406	#define BCHP_OOB_CTRL1_DRLFRZ_DEFAULT 0x00000000
407
408	/* OOB :: CTRL1 :: BRLFRZ [17:17] */
409	#define BCHP_OOB_CTRL1_BRLFRZ_MASK 0x00020000
410	#define BCHP_OOB_CTRL1_BRLFRZ_SHIFT 17
411	#define BCHP_OOB_CTRL1_BRLFRZ_DEFAULT 0x00000000
412
413	/* OOB :: CTRL1 :: AGLFRZ [16:16] */
414	#define BCHP_OOB_CTRL1_AGLFRZ_MASK 0x00010000
415	#define BCHP_OOB_CTRL1_AGLFRZ_SHIFT 16
416	#define BCHP_OOB_CTRL1_AGLFRZ_DEFAULT 0x00000000
417
418	/* OOB :: CTRL1 :: NYQ_SEL [15:14] */
419	#define BCHP_OOB_CTRL1_NYQ_SEL_MASK 0x0000c000
420	#define BCHP_OOB_CTRL1_NYQ_SEL_SHIFT 14
421	#define BCHP_OOB_CTRL1_NYQ_SEL_DEFAULT 0x00000000
422
423	/* OOB :: CTRL1 :: ACI_SEL [13:12] */
424	#define BCHP_OOB_CTRL1_ACI_SEL_MASK 0x00003000
425	#define BCHP_OOB_CTRL1_ACI_SEL_SHIFT 12
426	#define BCHP_OOB_CTRL1_ACI_SEL_DEFAULT 0x00000000
427
428	/* OOB :: CTRL1 :: FSTP [11:10] */
429	#define BCHP_OOB_CTRL1_FSTP_MASK 0x00000c00
430	#define BCHP_OOB_CTRL1_FSTP_SHIFT 10
431	#define BCHP_OOB_CTRL1_FSTP_DEFAULT 0x00000001
432
433	/* OOB :: CTRL1 :: DSTP [09:08] */
434	#define BCHP_OOB_CTRL1_DSTP_MASK 0x00000300
435	#define BCHP_OOB_CTRL1_DSTP_SHIFT 8
436	#define BCHP_OOB_CTRL1_DSTP_DEFAULT 0x00000001
437
438	/* OOB :: CTRL1 :: reserved1 [07:07] */
439	#define BCHP_OOB_CTRL1_reserved1_MASK 0x00000080
440	#define BCHP_OOB_CTRL1_reserved1_SHIFT 7
441
442	/* OOB :: CTRL1 :: VIDBYP [06:06] */
443	#define BCHP_OOB_CTRL1_VIDBYP_MASK 0x00000040
444	#define BCHP_OOB_CTRL1_VIDBYP_SHIFT 6
445	#define BCHP_OOB_CTRL1_VIDBYP_DEFAULT 0x00000000
446
447	/* OOB :: CTRL1 :: HBBYP [05:05] */
448	#define BCHP_OOB_CTRL1_HBBYP_MASK 0x00000020
449	#define BCHP_OOB_CTRL1_HBBYP_SHIFT 5
450	#define BCHP_OOB_CTRL1_HBBYP_DEFAULT 0x00000000
451
452	/* OOB :: CTRL1 :: NYQBP [04:04] */
453	#define BCHP_OOB_CTRL1_NYQBP_MASK 0x00000010
454	#define BCHP_OOB_CTRL1_NYQBP_SHIFT 4
455	#define BCHP_OOB_CTRL1_NYQBP_DEFAULT 0x00000000
456
457	/* OOB :: CTRL1 :: ADINV [03:03] */
458	#define BCHP_OOB_CTRL1_ADINV_MASK 0x00000008
459	#define BCHP_OOB_CTRL1_ADINV_SHIFT 3
460	#define BCHP_OOB_CTRL1_ADINV_DEFAULT 0x00000000
461
462	/* OOB :: CTRL1 :: EQBYP [02:02] */
463	#define BCHP_OOB_CTRL1_EQBYP_MASK 0x00000004
464	#define BCHP_OOB_CTRL1_EQBYP_SHIFT 2
465	#define BCHP_OOB_CTRL1_EQBYP_DEFAULT 0x00000000
466
467	/* OOB :: CTRL1 :: DRBYP [01:01] */
468	#define BCHP_OOB_CTRL1_DRBYP_MASK 0x00000002
469	#define BCHP_OOB_CTRL1_DRBYP_SHIFT 1
470	#define BCHP_OOB_CTRL1_DRBYP_DEFAULT 0x00000000
471
472	/* OOB :: CTRL1 :: FILBYP [00:00] */
473	#define BCHP_OOB_CTRL1_FILBYP_MASK 0x00000001
474	#define BCHP_OOB_CTRL1_FILBYP_SHIFT 0
475	#define BCHP_OOB_CTRL1_FILBYP_DEFAULT 0x00000000
476
477	/***************************************************************************
478	*CTRL2 - Out-of-Band Control2 Register
479	***************************************************************************/
480	/* OOB :: CTRL2 :: reserved0 [31:24] */
481	#define BCHP_OOB_CTRL2_reserved0_MASK 0xff000000
482	#define BCHP_OOB_CTRL2_reserved0_SHIFT 24
483
484	/* OOB :: CTRL2 :: RTFMT [23:23] */
485	#define BCHP_OOB_CTRL2_RTFMT_MASK 0x00800000
486	#define BCHP_OOB_CTRL2_RTFMT_SHIFT 23
487	#define BCHP_OOB_CTRL2_RTFMT_DEFAULT 0x00000000
488
489	/* OOB :: CTRL2 :: RTS [22:20] */
490	#define BCHP_OOB_CTRL2_RTS_MASK 0x00700000
491	#define BCHP_OOB_CTRL2_RTS_SHIFT 20
492	#define BCHP_OOB_CTRL2_RTS_DEFAULT 0x00000000
493
494	/* OOB :: CTRL2 :: reserved1 [19:19] */
495	#define BCHP_OOB_CTRL2_reserved1_MASK 0x00080000
496	#define BCHP_OOB_CTRL2_reserved1_SHIFT 19
497
498	/* OOB :: CTRL2 :: OFMT [18:18] */
499	#define BCHP_OOB_CTRL2_OFMT_MASK 0x00040000
500	#define BCHP_OOB_CTRL2_OFMT_SHIFT 18
501	#define BCHP_OOB_CTRL2_OFMT_DEFAULT 0x00000000
502
503	/* OOB :: CTRL2 :: IFMT [17:17] */
504	#define BCHP_OOB_CTRL2_IFMT_MASK 0x00020000
505	#define BCHP_OOB_CTRL2_IFMT_SHIFT 17
506	#define BCHP_OOB_CTRL2_IFMT_DEFAULT 0x00000000
507
508	/* OOB :: CTRL2 :: ADB [16:16] */
509	#define BCHP_OOB_CTRL2_ADB_MASK 0x00010000
510	#define BCHP_OOB_CTRL2_ADB_SHIFT 16
511	#define BCHP_OOB_CTRL2_ADB_DEFAULT 0x00000001
512
513	/* OOB :: CTRL2 :: GATECK [15:15] */
514	#define BCHP_OOB_CTRL2_GATECK_MASK 0x00008000
515	#define BCHP_OOB_CTRL2_GATECK_SHIFT 15
516	#define BCHP_OOB_CTRL2_GATECK_DEFAULT 0x00000000
517
518	/* OOB :: CTRL2 :: INVCK [14:14] */
519	#define BCHP_OOB_CTRL2_INVCK_MASK 0x00004000
520	#define BCHP_OOB_CTRL2_INVCK_SHIFT 14
521	#define BCHP_OOB_CTRL2_INVCK_DEFAULT 0x00000000
522
523	/* OOB :: CTRL2 :: reserved2 [13:11] */
524	#define BCHP_OOB_CTRL2_reserved2_MASK 0x00003800
525	#define BCHP_OOB_CTRL2_reserved2_SHIFT 11
526
527	/* OOB :: CTRL2 :: CNTTST [10:10] */
528	#define BCHP_OOB_CTRL2_CNTTST_MASK 0x00000400
529	#define BCHP_OOB_CTRL2_CNTTST_SHIFT 10
530	#define BCHP_OOB_CTRL2_CNTTST_DEFAULT 0x00000000
531
532	/* OOB :: CTRL2 :: MAIN [09:09] */
533	#define BCHP_OOB_CTRL2_MAIN_MASK 0x00000200
534	#define BCHP_OOB_CTRL2_MAIN_SHIFT 9
535	#define BCHP_OOB_CTRL2_MAIN_DEFAULT 0x00000001
536
537	/* OOB :: CTRL2 :: reserved3 [08:07] */
538	#define BCHP_OOB_CTRL2_reserved3_MASK 0x00000180
539	#define BCHP_OOB_CTRL2_reserved3_SHIFT 7
540
541	/* OOB :: CTRL2 :: DVCOUT [06:06] */
542	#define BCHP_OOB_CTRL2_DVCOUT_MASK 0x00000040
543	#define BCHP_OOB_CTRL2_DVCOUT_SHIFT 6
544	#define BCHP_OOB_CTRL2_DVCOUT_DEFAULT 0x00000000
545
546	/* OOB :: CTRL2 :: DVCON [05:05] */
547	#define BCHP_OOB_CTRL2_DVCON_MASK 0x00000020
548	#define BCHP_OOB_CTRL2_DVCON_SHIFT 5
549	#define BCHP_OOB_CTRL2_DVCON_DEFAULT 0x00000000
550
551	/* OOB :: CTRL2 :: OBPWR [04:04] */
552	#define BCHP_OOB_CTRL2_OBPWR_MASK 0x00000010
553	#define BCHP_OOB_CTRL2_OBPWR_SHIFT 4
554	#define BCHP_OOB_CTRL2_OBPWR_DEFAULT 0x00000000
555
556	/* OOB :: CTRL2 :: TST_SEL [03:02] */
557	#define BCHP_OOB_CTRL2_TST_SEL_MASK 0x0000000c
558	#define BCHP_OOB_CTRL2_TST_SEL_SHIFT 2
559	#define BCHP_OOB_CTRL2_TST_SEL_DEFAULT 0x00000000
560
561	/* OOB :: CTRL2 :: OBBYP [01:01] */
562	#define BCHP_OOB_CTRL2_OBBYP_MASK 0x00000002
563	#define BCHP_OOB_CTRL2_OBBYP_SHIFT 1
564	#define BCHP_OOB_CTRL2_OBBYP_DEFAULT 0x00000000
565
566	/* OOB :: CTRL2 :: RSFS [00:00] */
567	#define BCHP_OOB_CTRL2_RSFS_MASK 0x00000001
568	#define BCHP_OOB_CTRL2_RSFS_SHIFT 0
569	#define BCHP_OOB_CTRL2_RSFS_DEFAULT 0x00000000
570
571	/***************************************************************************
572	*CTRL3 - Out-of-Band Control3 Register
573	***************************************************************************/
574	/* OOB :: CTRL3 :: RCVSEL [31:31] */
575	#define BCHP_OOB_CTRL3_RCVSEL_MASK 0x80000000
576	#define BCHP_OOB_CTRL3_RCVSEL_SHIFT 31
577	#define BCHP_OOB_CTRL3_RCVSEL_DEFAULT 0x00000000
578
579	/* OOB :: CTRL3 :: BERINV [30:30] */
580	#define BCHP_OOB_CTRL3_BERINV_MASK 0x40000000
581	#define BCHP_OOB_CTRL3_BERINV_SHIFT 30
582	#define BCHP_OOB_CTRL3_BERINV_DEFAULT 0x00000000
583
584	/* OOB :: CTRL3 :: BERSRC [29:28] */
585	#define BCHP_OOB_CTRL3_BERSRC_MASK 0x30000000
586	#define BCHP_OOB_CTRL3_BERSRC_SHIFT 28
587	#define BCHP_OOB_CTRL3_BERSRC_DEFAULT 0x00000000
588
589	/* OOB :: CTRL3 :: BERPSV [27:27] */
590	#define BCHP_OOB_CTRL3_BERPSV_MASK 0x08000000
591	#define BCHP_OOB_CTRL3_BERPSV_SHIFT 27
592	#define BCHP_OOB_CTRL3_BERPSV_DEFAULT 0x00000000
593
594	/* OOB :: CTRL3 :: BERMOD [26:26] */
595	#define BCHP_OOB_CTRL3_BERMOD_MASK 0x04000000
596	#define BCHP_OOB_CTRL3_BERMOD_SHIFT 26
597	#define BCHP_OOB_CTRL3_BERMOD_DEFAULT 0x00000000
598
599	/* OOB :: CTRL3 :: BERCEN [25:25] */
600	#define BCHP_OOB_CTRL3_BERCEN_MASK 0x02000000
601	#define BCHP_OOB_CTRL3_BERCEN_SHIFT 25
602	#define BCHP_OOB_CTRL3_BERCEN_DEFAULT 0x00000000
603
604	/* OOB :: CTRL3 :: BERSEQ [24:24] */
605	#define BCHP_OOB_CTRL3_BERSEQ_MASK 0x01000000
606	#define BCHP_OOB_CTRL3_BERSEQ_SHIFT 24
607	#define BCHP_OOB_CTRL3_BERSEQ_DEFAULT 0x00000000
608
609	/* OOB :: CTRL3 :: BERDLYDIS [23:23] */
610	#define BCHP_OOB_CTRL3_BERDLYDIS_MASK 0x00800000
611	#define BCHP_OOB_CTRL3_BERDLYDIS_SHIFT 23
612	#define BCHP_OOB_CTRL3_BERDLYDIS_DEFAULT 0x00000000
613
614	/* OOB :: CTRL3 :: reserved0 [22:20] */
615	#define BCHP_OOB_CTRL3_reserved0_MASK 0x00700000
616	#define BCHP_OOB_CTRL3_reserved0_SHIFT 20
617
618	/* OOB :: CTRL3 :: BERSYN [19:19] */
619	#define BCHP_OOB_CTRL3_BERSYN_MASK 0x00080000
620	#define BCHP_OOB_CTRL3_BERSYN_SHIFT 19
621	#define BCHP_OOB_CTRL3_BERSYN_DEFAULT 0x00000000
622
623	/* OOB :: CTRL3 :: BERROT [18:16] */
624	#define BCHP_OOB_CTRL3_BERROT_MASK 0x00070000
625	#define BCHP_OOB_CTRL3_BERROT_SHIFT 16
626	#define BCHP_OOB_CTRL3_BERROT_DEFAULT 0x00000000
627
628	/* OOB :: CTRL3 :: RSVD1 [15:15] */
629	#define BCHP_OOB_CTRL3_RSVD1_MASK 0x00008000
630	#define BCHP_OOB_CTRL3_RSVD1_SHIFT 15
631	#define BCHP_OOB_CTRL3_RSVD1_DEFAULT 0x00000000
632
633	/* OOB :: CTRL3 :: ENCLP [14:14] */
634	#define BCHP_OOB_CTRL3_ENCLP_MASK 0x00004000
635	#define BCHP_OOB_CTRL3_ENCLP_SHIFT 14
636	#define BCHP_OOB_CTRL3_ENCLP_DEFAULT 0x00000000
637
638	/* OOB :: CTRL3 :: GAIN0 [13:12] */
639	#define BCHP_OOB_CTRL3_GAIN0_MASK 0x00003000
640	#define BCHP_OOB_CTRL3_GAIN0_SHIFT 12
641	#define BCHP_OOB_CTRL3_GAIN0_DEFAULT 0x00000001
642
643	/* OOB :: CTRL3 :: DCCBW [11:10] */
644	#define BCHP_OOB_CTRL3_DCCBW_MASK 0x00000c00
645	#define BCHP_OOB_CTRL3_DCCBW_SHIFT 10
646	#define BCHP_OOB_CTRL3_DCCBW_DEFAULT 0x00000000
647
648	/* OOB :: CTRL3 :: DCCBYP [09:09] */
649	#define BCHP_OOB_CTRL3_DCCBYP_MASK 0x00000200
650	#define BCHP_OOB_CTRL3_DCCBYP_SHIFT 9
651	#define BCHP_OOB_CTRL3_DCCBYP_DEFAULT 0x00000000
652
653	/* OOB :: CTRL3 :: DCCFRZ [08:08] */
654	#define BCHP_OOB_CTRL3_DCCFRZ_MASK 0x00000100
655	#define BCHP_OOB_CTRL3_DCCFRZ_SHIFT 8
656	#define BCHP_OOB_CTRL3_DCCFRZ_DEFAULT 0x00000000
657
658	/* OOB :: CTRL3 :: AGCDT [07:07] */
659	#define BCHP_OOB_CTRL3_AGCDT_MASK 0x00000080
660	#define BCHP_OOB_CTRL3_AGCDT_SHIFT 7
661	#define BCHP_OOB_CTRL3_AGCDT_DEFAULT 0x00000001
662
663	/* OOB :: CTRL3 :: AGCIT [06:06] */
664	#define BCHP_OOB_CTRL3_AGCIT_MASK 0x00000040
665	#define BCHP_OOB_CTRL3_AGCIT_SHIFT 6
666	#define BCHP_OOB_CTRL3_AGCIT_DEFAULT 0x00000001
667
668	/* OOB :: CTRL3 :: AGCDIS [05:05] */
669	#define BCHP_OOB_CTRL3_AGCDIS_MASK 0x00000020
670	#define BCHP_OOB_CTRL3_AGCDIS_SHIFT 5
671	#define BCHP_OOB_CTRL3_AGCDIS_DEFAULT 0x00000000
672
673	/* OOB :: CTRL3 :: AGCOD [04:04] */
674	#define BCHP_OOB_CTRL3_AGCOD_MASK 0x00000010
675	#define BCHP_OOB_CTRL3_AGCOD_SHIFT 4
676	#define BCHP_OOB_CTRL3_AGCOD_DEFAULT 0x00000000
677
678	/* OOB :: CTRL3 :: AGTPOS [03:03] */
679	#define BCHP_OOB_CTRL3_AGTPOS_MASK 0x00000008
680	#define BCHP_OOB_CTRL3_AGTPOS_SHIFT 3
681	#define BCHP_OOB_CTRL3_AGTPOS_DEFAULT 0x00000001
682
683	/* OOB :: CTRL3 :: AGF [02:02] */
684	#define BCHP_OOB_CTRL3_AGF_MASK 0x00000004
685	#define BCHP_OOB_CTRL3_AGF_SHIFT 2
686	#define BCHP_OOB_CTRL3_AGF_DEFAULT 0x00000001
687
688	/* OOB :: CTRL3 :: AGTZ [01:01] */
689	#define BCHP_OOB_CTRL3_AGTZ_MASK 0x00000002
690	#define BCHP_OOB_CTRL3_AGTZ_SHIFT 1
691	#define BCHP_OOB_CTRL3_AGTZ_DEFAULT 0x00000000
692
693	/* OOB :: CTRL3 :: AGIZ [00:00] */
694	#define BCHP_OOB_CTRL3_AGIZ_MASK 0x00000001
695	#define BCHP_OOB_CTRL3_AGIZ_SHIFT 0
696	#define BCHP_OOB_CTRL3_AGIZ_DEFAULT 0x00000000
697
698	/***************************************************************************
699	*CTRL4 - Out-of-Band Control4 Register
700	***************************************************************************/
701	/* OOB :: CTRL4 :: RSVD2 [31:31] */
702	#define BCHP_OOB_CTRL4_RSVD2_MASK 0x80000000
703	#define BCHP_OOB_CTRL4_RSVD2_SHIFT 31
704	#define BCHP_OOB_CTRL4_RSVD2_DEFAULT 0x00000000
705
706	/* OOB :: CTRL4 :: reserved0 [30:29] */
707	#define BCHP_OOB_CTRL4_reserved0_MASK 0x60000000
708	#define BCHP_OOB_CTRL4_reserved0_SHIFT 29
709
710	/* OOB :: CTRL4 :: INVBCK [28:28] */
711	#define BCHP_OOB_CTRL4_INVBCK_MASK 0x10000000
712	#define BCHP_OOB_CTRL4_INVBCK_SHIFT 28
713	#define BCHP_OOB_CTRL4_INVBCK_DEFAULT 0x00000000
714
715	/* OOB :: CTRL4 :: reserved1 [27:24] */
716	#define BCHP_OOB_CTRL4_reserved1_MASK 0x0f000000
717	#define BCHP_OOB_CTRL4_reserved1_SHIFT 24
718
719	/* OOB :: CTRL4 :: RSVD3 [23:20] */
720	#define BCHP_OOB_CTRL4_RSVD3_MASK 0x00f00000
721	#define BCHP_OOB_CTRL4_RSVD3_SHIFT 20
722	#define BCHP_OOB_CTRL4_RSVD3_DEFAULT 0x00000000
723
724	/* OOB :: CTRL4 :: DRBW [19:19] */
725	#define BCHP_OOB_CTRL4_DRBW_MASK 0x00080000
726	#define BCHP_OOB_CTRL4_DRBW_SHIFT 19
727	#define BCHP_OOB_CTRL4_DRBW_DEFAULT 0x00000000
728
729	/* OOB :: CTRL4 :: D2LEAK [18:18] */
730	#define BCHP_OOB_CTRL4_D2LEAK_MASK 0x00040000
731	#define BCHP_OOB_CTRL4_D2LEAK_SHIFT 18
732	#define BCHP_OOB_CTRL4_D2LEAK_DEFAULT 0x00000000
733
734	/* OOB :: CTRL4 :: DR2BYP [17:17] */
735	#define BCHP_OOB_CTRL4_DR2BYP_MASK 0x00020000
736	#define BCHP_OOB_CTRL4_DR2BYP_SHIFT 17
737	#define BCHP_OOB_CTRL4_DR2BYP_DEFAULT 0x00000001
738
739	/* OOB :: CTRL4 :: DR2FRZ [16:16] */
740	#define BCHP_OOB_CTRL4_DR2FRZ_MASK 0x00010000
741	#define BCHP_OOB_CTRL4_DR2FRZ_SHIFT 16
742	#define BCHP_OOB_CTRL4_DR2FRZ_DEFAULT 0x00000001
743
744	/* OOB :: CTRL4 :: reserved2 [15:12] */
745	#define BCHP_OOB_CTRL4_reserved2_MASK 0x0000f000
746	#define BCHP_OOB_CTRL4_reserved2_SHIFT 12
747
748	/* OOB :: CTRL4 :: FLSTS [11:11] */
749	#define BCHP_OOB_CTRL4_FLSTS_MASK 0x00000800
750	#define BCHP_OOB_CTRL4_FLSTS_SHIFT 11
751	#define BCHP_OOB_CTRL4_FLSTS_DEFAULT 0x00000000
752
753	/* OOB :: CTRL4 :: FLEN [10:10] */
754	#define BCHP_OOB_CTRL4_FLEN_MASK 0x00000400
755	#define BCHP_OOB_CTRL4_FLEN_SHIFT 10
756	#define BCHP_OOB_CTRL4_FLEN_DEFAULT 0x00000001
757
758	/* OOB :: CTRL4 :: FLTC [09:08] */
759	#define BCHP_OOB_CTRL4_FLTC_MASK 0x00000300
760	#define BCHP_OOB_CTRL4_FLTC_SHIFT 8
761	#define BCHP_OOB_CTRL4_FLTC_DEFAULT 0x00000002
762
763	/* OOB :: CTRL4 :: reserved3 [07:03] */
764	#define BCHP_OOB_CTRL4_reserved3_MASK 0x000000f8
765	#define BCHP_OOB_CTRL4_reserved3_SHIFT 3
766
767	/* OOB :: CTRL4 :: DR2RST [02:02] */
768	#define BCHP_OOB_CTRL4_DR2RST_MASK 0x00000004
769	#define BCHP_OOB_CTRL4_DR2RST_SHIFT 2
770	#define BCHP_OOB_CTRL4_DR2RST_DEFAULT 0x00000000
771
772	/* OOB :: CTRL4 :: FLIRST [01:01] */
773	#define BCHP_OOB_CTRL4_FLIRST_MASK 0x00000002
774	#define BCHP_OOB_CTRL4_FLIRST_SHIFT 1
775	#define BCHP_OOB_CTRL4_FLIRST_DEFAULT 0x00000000
776
777	/* OOB :: CTRL4 :: DCCRST [00:00] */
778	#define BCHP_OOB_CTRL4_DCCRST_MASK 0x00000001
779	#define BCHP_OOB_CTRL4_DCCRST_SHIFT 0
780	#define BCHP_OOB_CTRL4_DCCRST_DEFAULT 0x00000000
781
782	/***************************************************************************
783	*CTRL5 - Out-of-Band Control5 Register
784	***************************************************************************/
785	/* OOB :: CTRL5 :: GAIN1 [31:30] */
786	#define BCHP_OOB_CTRL5_GAIN1_MASK 0xc0000000
787	#define BCHP_OOB_CTRL5_GAIN1_SHIFT 30
788	#define BCHP_OOB_CTRL5_GAIN1_DEFAULT 0x00000000
789
790	/* OOB :: CTRL5 :: GAIN2 [29:28] */
791	#define BCHP_OOB_CTRL5_GAIN2_MASK 0x30000000
792	#define BCHP_OOB_CTRL5_GAIN2_SHIFT 28
793	#define BCHP_OOB_CTRL5_GAIN2_DEFAULT 0x00000000
794
795	/* OOB :: CTRL5 :: RSCNT [27:27] */
796	#define BCHP_OOB_CTRL5_RSCNT_MASK 0x08000000
797	#define BCHP_OOB_CTRL5_RSCNT_SHIFT 27
798	#define BCHP_OOB_CTRL5_RSCNT_DEFAULT 0x00000000
799
800	/* OOB :: CTRL5 :: INVRCK [26:26] */
801	#define BCHP_OOB_CTRL5_INVRCK_MASK 0x04000000
802	#define BCHP_OOB_CTRL5_INVRCK_SHIFT 26
803	#define BCHP_OOB_CTRL5_INVRCK_DEFAULT 0x00000000
804
805	/* OOB :: CTRL5 :: PSVSEL [25:25] */
806	#define BCHP_OOB_CTRL5_PSVSEL_MASK 0x02000000
807	#define BCHP_OOB_CTRL5_PSVSEL_SHIFT 25
808	#define BCHP_OOB_CTRL5_PSVSEL_DEFAULT 0x00000000
809
810	/* OOB :: CTRL5 :: FECBYP [24:24] */
811	#define BCHP_OOB_CTRL5_FECBYP_MASK 0x01000000
812	#define BCHP_OOB_CTRL5_FECBYP_SHIFT 24
813	#define BCHP_OOB_CTRL5_FECBYP_DEFAULT 0x00000000
814
815	/* OOB :: CTRL5 :: PGACKINV [23:23] */
816	#define BCHP_OOB_CTRL5_PGACKINV_MASK 0x00800000
817	#define BCHP_OOB_CTRL5_PGACKINV_SHIFT 23
818	#define BCHP_OOB_CTRL5_PGACKINV_DEFAULT 0x00000000
819
820	/* OOB :: CTRL5 :: PGABYP [22:22] */
821	#define BCHP_OOB_CTRL5_PGABYP_MASK 0x00400000
822	#define BCHP_OOB_CTRL5_PGABYP_SHIFT 22
823	#define BCHP_OOB_CTRL5_PGABYP_DEFAULT 0x00000001
824
825	/* OOB :: CTRL5 :: PGAGAIN [21:16] */
826	#define BCHP_OOB_CTRL5_PGAGAIN_MASK 0x003f0000
827	#define BCHP_OOB_CTRL5_PGAGAIN_SHIFT 16
828	#define BCHP_OOB_CTRL5_PGAGAIN_DEFAULT 0x00000000
829
830	/* OOB :: CTRL5 :: reserved0 [15:04] */
831	#define BCHP_OOB_CTRL5_reserved0_MASK 0x0000fff0
832	#define BCHP_OOB_CTRL5_reserved0_SHIFT 4
833
834	/* OOB :: CTRL5 :: RSVD7 [03:02] */
835	#define BCHP_OOB_CTRL5_RSVD7_MASK 0x0000000c
836	#define BCHP_OOB_CTRL5_RSVD7_SHIFT 2
837	#define BCHP_OOB_CTRL5_RSVD7_DEFAULT 0x00000000
838
839	/* OOB :: CTRL5 :: reserved1 [01:00] */
840	#define BCHP_OOB_CTRL5_reserved1_MASK 0x00000003
841	#define BCHP_OOB_CTRL5_reserved1_SHIFT 0
842
843	/***************************************************************************
844	*CTRL6 - Control6 Register
845	***************************************************************************/
846	/* OOB :: CTRL6 :: DAGC0_LA_BETA [31:28] */
847	#define BCHP_OOB_CTRL6_DAGC0_LA_BETA_MASK 0xf0000000
848	#define BCHP_OOB_CTRL6_DAGC0_LA_BETA_SHIFT 28
849	#define BCHP_OOB_CTRL6_DAGC0_LA_BETA_DEFAULT 0x00000000
850
851	/* OOB :: CTRL6 :: DAGC0_K [27:23] */
852	#define BCHP_OOB_CTRL6_DAGC0_K_MASK 0x0f800000
853	#define BCHP_OOB_CTRL6_DAGC0_K_SHIFT 23
854	#define BCHP_OOB_CTRL6_DAGC0_K_DEFAULT 0x0000000a
855
856	/* OOB :: CTRL6 :: DAGC0_THRESH [22:08] */
857	#define BCHP_OOB_CTRL6_DAGC0_THRESH_MASK 0x007fff00
858	#define BCHP_OOB_CTRL6_DAGC0_THRESH_SHIFT 8
859	#define BCHP_OOB_CTRL6_DAGC0_THRESH_DEFAULT 0x00000400
860
861	/* OOB :: CTRL6 :: RSVD7 [07:06] */
862	#define BCHP_OOB_CTRL6_RSVD7_MASK 0x000000c0
863	#define BCHP_OOB_CTRL6_RSVD7_SHIFT 6
864	#define BCHP_OOB_CTRL6_RSVD7_DEFAULT 0x00000000
865
866	/* OOB :: CTRL6 :: DIAG [05:04] */
867	#define BCHP_OOB_CTRL6_DIAG_MASK 0x00000030
868	#define BCHP_OOB_CTRL6_DIAG_SHIFT 4
869	#define BCHP_OOB_CTRL6_DIAG_DEFAULT 0x00000000
870
871	/* OOB :: CTRL6 :: reserved0 [03:02] */
872	#define BCHP_OOB_CTRL6_reserved0_MASK 0x0000000c
873	#define BCHP_OOB_CTRL6_reserved0_SHIFT 2
874
875	/* OOB :: CTRL6 :: DLYFECIN [01:01] */
876	#define BCHP_OOB_CTRL6_DLYFECIN_MASK 0x00000002
877	#define BCHP_OOB_CTRL6_DLYFECIN_SHIFT 1
878	#define BCHP_OOB_CTRL6_DLYFECIN_DEFAULT 0x00000000
879
880	/* OOB :: CTRL6 :: ECCRCLR [00:00] */
881	#define BCHP_OOB_CTRL6_ECCRCLR_MASK 0x00000001
882	#define BCHP_OOB_CTRL6_ECCRCLR_SHIFT 0
883	#define BCHP_OOB_CTRL6_ECCRCLR_DEFAULT 0x00000001
884
885	/***************************************************************************
886	*STF0 - Out-of-Band Store FFE Coefficient #0 (newest precursor) Register
887	***************************************************************************/
888	/* OOB :: STF0 :: OOB_STF0_0 [31:24] */
889	#define BCHP_OOB_STF0_OOB_STF0_0_MASK 0xff000000
890	#define BCHP_OOB_STF0_OOB_STF0_0_SHIFT 24
891	#define BCHP_OOB_STF0_OOB_STF0_0_DEFAULT 0x00000000
892
893	/* OOB :: STF0 :: reserved0 [23:20] */
894	#define BCHP_OOB_STF0_reserved0_MASK 0x00f00000
895	#define BCHP_OOB_STF0_reserved0_SHIFT 20
896
897	/* OOB :: STF0 :: OOB_STF0_1 [19:16] */
898	#define BCHP_OOB_STF0_OOB_STF0_1_MASK 0x000f0000
899	#define BCHP_OOB_STF0_OOB_STF0_1_SHIFT 16
900	#define BCHP_OOB_STF0_OOB_STF0_1_DEFAULT 0x00000000
901
902	/* OOB :: STF0 :: OOB_STF0_2 [15:08] */
903	#define BCHP_OOB_STF0_OOB_STF0_2_MASK 0x0000ff00
904	#define BCHP_OOB_STF0_OOB_STF0_2_SHIFT 8
905	#define BCHP_OOB_STF0_OOB_STF0_2_DEFAULT 0x00000000
906
907	/* OOB :: STF0 :: reserved1 [07:04] */
908	#define BCHP_OOB_STF0_reserved1_MASK 0x000000f0
909	#define BCHP_OOB_STF0_reserved1_SHIFT 4
910
911	/* OOB :: STF0 :: OOB_STF0_3 [03:00] */
912	#define BCHP_OOB_STF0_OOB_STF0_3_MASK 0x0000000f
913	#define BCHP_OOB_STF0_OOB_STF0_3_SHIFT 0
914	#define BCHP_OOB_STF0_OOB_STF0_3_DEFAULT 0x00000000
915
916	/***************************************************************************
917	*STF1 - Out-of-Band Store FFE Coefficient #1 (main tap) Register
918	***************************************************************************/
919	/* OOB :: STF1 :: OOB_STF1_0 [31:24] */
920	#define BCHP_OOB_STF1_OOB_STF1_0_MASK 0xff000000
921	#define BCHP_OOB_STF1_OOB_STF1_0_SHIFT 24
922	#define BCHP_OOB_STF1_OOB_STF1_0_DEFAULT 0x00000040
923
924	/* OOB :: STF1 :: reserved0 [23:20] */
925	#define BCHP_OOB_STF1_reserved0_MASK 0x00f00000
926	#define BCHP_OOB_STF1_reserved0_SHIFT 20
927
928	/* OOB :: STF1 :: OOB_STF1_1 [19:16] */
929	#define BCHP_OOB_STF1_OOB_STF1_1_MASK 0x000f0000
930	#define BCHP_OOB_STF1_OOB_STF1_1_SHIFT 16
931	#define BCHP_OOB_STF1_OOB_STF1_1_DEFAULT 0x00000000
932
933	/* OOB :: STF1 :: OOB_STF1_2 [15:08] */
934	#define BCHP_OOB_STF1_OOB_STF1_2_MASK 0x0000ff00
935	#define BCHP_OOB_STF1_OOB_STF1_2_SHIFT 8
936	#define BCHP_OOB_STF1_OOB_STF1_2_DEFAULT 0x00000000
937
938	/* OOB :: STF1 :: reserved1 [07:04] */
939	#define BCHP_OOB_STF1_reserved1_MASK 0x000000f0
940	#define BCHP_OOB_STF1_reserved1_SHIFT 4
941
942	/* OOB :: STF1 :: OOB_STF1_3 [03:00] */
943	#define BCHP_OOB_STF1_OOB_STF1_3_MASK 0x0000000f
944	#define BCHP_OOB_STF1_OOB_STF1_3_SHIFT 0
945	#define BCHP_OOB_STF1_OOB_STF1_3_DEFAULT 0x00000000
946
947	/***************************************************************************
948	*LDF0 - Out-of-Band Load FFE Coefficient #0 (newest precursor) Register
949	***************************************************************************/
950	/* OOB :: LDF0 :: OOB_LDF0_0 [31:24] */
951	#define BCHP_OOB_LDF0_OOB_LDF0_0_MASK 0xff000000
952	#define BCHP_OOB_LDF0_OOB_LDF0_0_SHIFT 24
953	#define BCHP_OOB_LDF0_OOB_LDF0_0_DEFAULT 0x00000000
954
955	/* OOB :: LDF0 :: reserved0 [23:20] */
956	#define BCHP_OOB_LDF0_reserved0_MASK 0x00f00000
957	#define BCHP_OOB_LDF0_reserved0_SHIFT 20
958
959	/* OOB :: LDF0 :: OOB_LDF0_1 [19:16] */
960	#define BCHP_OOB_LDF0_OOB_LDF0_1_MASK 0x000f0000
961	#define BCHP_OOB_LDF0_OOB_LDF0_1_SHIFT 16
962	#define BCHP_OOB_LDF0_OOB_LDF0_1_DEFAULT 0x00000000
963
964	/* OOB :: LDF0 :: OOB_LDF0_2 [15:08] */
965	#define BCHP_OOB_LDF0_OOB_LDF0_2_MASK 0x0000ff00
966	#define BCHP_OOB_LDF0_OOB_LDF0_2_SHIFT 8
967	#define BCHP_OOB_LDF0_OOB_LDF0_2_DEFAULT 0x00000000
968
969	/* OOB :: LDF0 :: reserved1 [07:04] */
970	#define BCHP_OOB_LDF0_reserved1_MASK 0x000000f0
971	#define BCHP_OOB_LDF0_reserved1_SHIFT 4
972
973	/* OOB :: LDF0 :: OOB_LDF0_3 [03:00] */
974	#define BCHP_OOB_LDF0_OOB_LDF0_3_MASK 0x0000000f
975	#define BCHP_OOB_LDF0_OOB_LDF0_3_SHIFT 0
976	#define BCHP_OOB_LDF0_OOB_LDF0_3_DEFAULT 0x00000000
977
978	/***************************************************************************
979	*LDF1 - Out-of-Band Load FFE Coefficient #1 (main tap) Register
980	***************************************************************************/
981	/* OOB :: LDF1 :: OOB_LDF1_0 [31:24] */
982	#define BCHP_OOB_LDF1_OOB_LDF1_0_MASK 0xff000000
983	#define BCHP_OOB_LDF1_OOB_LDF1_0_SHIFT 24
984	#define BCHP_OOB_LDF1_OOB_LDF1_0_DEFAULT 0x00000040
985
986	/* OOB :: LDF1 :: reserved0 [23:20] */
987	#define BCHP_OOB_LDF1_reserved0_MASK 0x00f00000
988	#define BCHP_OOB_LDF1_reserved0_SHIFT 20
989
990	/* OOB :: LDF1 :: OOB_LDF1_1 [19:16] */
991	#define BCHP_OOB_LDF1_OOB_LDF1_1_MASK 0x000f0000
992	#define BCHP_OOB_LDF1_OOB_LDF1_1_SHIFT 16
993	#define BCHP_OOB_LDF1_OOB_LDF1_1_DEFAULT 0x00000000
994
995	/* OOB :: LDF1 :: OOB_LDF1_2 [15:08] */
996	#define BCHP_OOB_LDF1_OOB_LDF1_2_MASK 0x0000ff00
997	#define BCHP_OOB_LDF1_OOB_LDF1_2_SHIFT 8
998	#define BCHP_OOB_LDF1_OOB_LDF1_2_DEFAULT 0x00000000
999
1000	/* OOB :: LDF1 :: reserved1 [07:04] */
1001	#define BCHP_OOB_LDF1_reserved1_MASK 0x000000f0
1002	#define BCHP_OOB_LDF1_reserved1_SHIFT 4
1003
1004	/* OOB :: LDF1 :: OOB_LDF1_3 [03:00] */
1005	#define BCHP_OOB_LDF1_OOB_LDF1_3_MASK 0x0000000f
1006	#define BCHP_OOB_LDF1_OOB_LDF1_3_SHIFT 0
1007	#define BCHP_OOB_LDF1_OOB_LDF1_3_DEFAULT 0x00000000
1008
1009	/***************************************************************************
1010	*STD0 - Out-of-Band Store DFE Coefficient #0 (first postcursor) Register
1011	***************************************************************************/
1012	/* OOB :: STD0 :: OOB_STD0_0 [31:24] */
1013	#define BCHP_OOB_STD0_OOB_STD0_0_MASK 0xff000000
1014	#define BCHP_OOB_STD0_OOB_STD0_0_SHIFT 24
1015	#define BCHP_OOB_STD0_OOB_STD0_0_DEFAULT 0x000000ff
1016
1017	/* OOB :: STD0 :: reserved0 [23:20] */
1018	#define BCHP_OOB_STD0_reserved0_MASK 0x00f00000
1019	#define BCHP_OOB_STD0_reserved0_SHIFT 20
1020
1021	/* OOB :: STD0 :: OOB_STD0_1 [19:16] */
1022	#define BCHP_OOB_STD0_OOB_STD0_1_MASK 0x000f0000
1023	#define BCHP_OOB_STD0_OOB_STD0_1_SHIFT 16
1024	#define BCHP_OOB_STD0_OOB_STD0_1_DEFAULT 0x0000000f
1025
1026	/* OOB :: STD0 :: OOB_STD0_2 [15:08] */
1027	#define BCHP_OOB_STD0_OOB_STD0_2_MASK 0x0000ff00
1028	#define BCHP_OOB_STD0_OOB_STD0_2_SHIFT 8
1029	#define BCHP_OOB_STD0_OOB_STD0_2_DEFAULT 0x000000ff
1030
1031	/* OOB :: STD0 :: reserved1 [07:04] */
1032	#define BCHP_OOB_STD0_reserved1_MASK 0x000000f0
1033	#define BCHP_OOB_STD0_reserved1_SHIFT 4
1034
1035	/* OOB :: STD0 :: OOB_STD0_3 [03:00] */
1036	#define BCHP_OOB_STD0_OOB_STD0_3_MASK 0x0000000f
1037	#define BCHP_OOB_STD0_OOB_STD0_3_SHIFT 0
1038	#define BCHP_OOB_STD0_OOB_STD0_3_DEFAULT 0x0000000f
1039
1040	/***************************************************************************
1041	*STD1 - Out-of-Band Store DFE Coefficient #1 (second postcursor) Register
1042	***************************************************************************/
1043	/* OOB :: STD1 :: OOB_STD1_0 [31:24] */
1044	#define BCHP_OOB_STD1_OOB_STD1_0_MASK 0xff000000
1045	#define BCHP_OOB_STD1_OOB_STD1_0_SHIFT 24
1046	#define BCHP_OOB_STD1_OOB_STD1_0_DEFAULT 0x000000ff
1047
1048	/* OOB :: STD1 :: reserved0 [23:20] */
1049	#define BCHP_OOB_STD1_reserved0_MASK 0x00f00000
1050	#define BCHP_OOB_STD1_reserved0_SHIFT 20
1051
1052	/* OOB :: STD1 :: OOB_STD1_1 [19:16] */
1053	#define BCHP_OOB_STD1_OOB_STD1_1_MASK 0x000f0000
1054	#define BCHP_OOB_STD1_OOB_STD1_1_SHIFT 16
1055	#define BCHP_OOB_STD1_OOB_STD1_1_DEFAULT 0x0000000f
1056
1057	/* OOB :: STD1 :: OOB_STD1_2 [15:08] */
1058	#define BCHP_OOB_STD1_OOB_STD1_2_MASK 0x0000ff00
1059	#define BCHP_OOB_STD1_OOB_STD1_2_SHIFT 8
1060	#define BCHP_OOB_STD1_OOB_STD1_2_DEFAULT 0x000000ff
1061
1062	/* OOB :: STD1 :: reserved1 [07:04] */
1063	#define BCHP_OOB_STD1_reserved1_MASK 0x000000f0
1064	#define BCHP_OOB_STD1_reserved1_SHIFT 4
1065
1066	/* OOB :: STD1 :: OOB_STD1_3 [03:00] */
1067	#define BCHP_OOB_STD1_OOB_STD1_3_MASK 0x0000000f
1068	#define BCHP_OOB_STD1_OOB_STD1_3_SHIFT 0
1069	#define BCHP_OOB_STD1_OOB_STD1_3_DEFAULT 0x0000000f
1070
1071	/***************************************************************************
1072	*LDD0 - Out-of-Band Load DFE Coefficient #0 (first postcursor) Register
1073	***************************************************************************/
1074	/* OOB :: LDD0 :: OOB_LDD0_0 [31:24] */
1075	#define BCHP_OOB_LDD0_OOB_LDD0_0_MASK 0xff000000
1076	#define BCHP_OOB_LDD0_OOB_LDD0_0_SHIFT 24
1077	#define BCHP_OOB_LDD0_OOB_LDD0_0_DEFAULT 0x000000ff
1078
1079	/* OOB :: LDD0 :: reserved0 [23:20] */
1080	#define BCHP_OOB_LDD0_reserved0_MASK 0x00f00000
1081	#define BCHP_OOB_LDD0_reserved0_SHIFT 20
1082
1083	/* OOB :: LDD0 :: OOB_LDD0_1 [19:16] */
1084	#define BCHP_OOB_LDD0_OOB_LDD0_1_MASK 0x000f0000
1085	#define BCHP_OOB_LDD0_OOB_LDD0_1_SHIFT 16
1086	#define BCHP_OOB_LDD0_OOB_LDD0_1_DEFAULT 0x0000000f
1087
1088	/* OOB :: LDD0 :: OOB_LDD0_2 [15:08] */
1089	#define BCHP_OOB_LDD0_OOB_LDD0_2_MASK 0x0000ff00
1090	#define BCHP_OOB_LDD0_OOB_LDD0_2_SHIFT 8
1091	#define BCHP_OOB_LDD0_OOB_LDD0_2_DEFAULT 0x000000ff
1092
1093	/* OOB :: LDD0 :: reserved1 [07:04] */
1094	#define BCHP_OOB_LDD0_reserved1_MASK 0x000000f0
1095	#define BCHP_OOB_LDD0_reserved1_SHIFT 4
1096
1097	/* OOB :: LDD0 :: OOB_LDD0_3 [03:00] */
1098	#define BCHP_OOB_LDD0_OOB_LDD0_3_MASK 0x0000000f
1099	#define BCHP_OOB_LDD0_OOB_LDD0_3_SHIFT 0
1100	#define BCHP_OOB_LDD0_OOB_LDD0_3_DEFAULT 0x0000000f
1101
1102	/***************************************************************************
1103	*LDD1 - Out-of-Band Load DFE Coefficient #1 (second postcursor) Register
1104	***************************************************************************/
1105	/* OOB :: LDD1 :: OOB_LDD1_0 [31:24] */
1106	#define BCHP_OOB_LDD1_OOB_LDD1_0_MASK 0xff000000
1107	#define BCHP_OOB_LDD1_OOB_LDD1_0_SHIFT 24
1108	#define BCHP_OOB_LDD1_OOB_LDD1_0_DEFAULT 0x000000ff
1109
1110	/* OOB :: LDD1 :: reserved0 [23:20] */
1111	#define BCHP_OOB_LDD1_reserved0_MASK 0x00f00000
1112	#define BCHP_OOB_LDD1_reserved0_SHIFT 20
1113
1114	/* OOB :: LDD1 :: OOB_LDD1_1 [19:16] */
1115	#define BCHP_OOB_LDD1_OOB_LDD1_1_MASK 0x000f0000
1116	#define BCHP_OOB_LDD1_OOB_LDD1_1_SHIFT 16
1117	#define BCHP_OOB_LDD1_OOB_LDD1_1_DEFAULT 0x0000000f
1118
1119	/* OOB :: LDD1 :: OOB_LDD1_2 [15:08] */
1120	#define BCHP_OOB_LDD1_OOB_LDD1_2_MASK 0x0000ff00
1121	#define BCHP_OOB_LDD1_OOB_LDD1_2_SHIFT 8
1122	#define BCHP_OOB_LDD1_OOB_LDD1_2_DEFAULT 0x000000ff
1123
1124	/* OOB :: LDD1 :: reserved1 [07:04] */
1125	#define BCHP_OOB_LDD1_reserved1_MASK 0x000000f0
1126	#define BCHP_OOB_LDD1_reserved1_SHIFT 4
1127
1128	/* OOB :: LDD1 :: OOB_LDD1_3 [03:00] */
1129	#define BCHP_OOB_LDD1_OOB_LDD1_3_MASK 0x0000000f
1130	#define BCHP_OOB_LDD1_OOB_LDD1_3_SHIFT 0
1131	#define BCHP_OOB_LDD1_OOB_LDD1_3_DEFAULT 0x0000000f
1132
1133	/***************************************************************************
1134	*LDSFT - Out-of-Band Load the Current Soft Decision Register
1135	***************************************************************************/
1136	/* OOB :: LDSFT :: OOB_LDSFT_0 [31:24] */
1137	#define BCHP_OOB_LDSFT_OOB_LDSFT_0_MASK 0xff000000
1138	#define BCHP_OOB_LDSFT_OOB_LDSFT_0_SHIFT 24
1139	#define BCHP_OOB_LDSFT_OOB_LDSFT_0_DEFAULT 0x00000080
1140
1141	/* OOB :: LDSFT :: OOB_LDSFT_1 [23:16] */
1142	#define BCHP_OOB_LDSFT_OOB_LDSFT_1_MASK 0x00ff0000
1143	#define BCHP_OOB_LDSFT_OOB_LDSFT_1_SHIFT 16
1144	#define BCHP_OOB_LDSFT_OOB_LDSFT_1_DEFAULT 0x00000000
1145
1146	/* OOB :: LDSFT :: reserved0 [15:00] */
1147	#define BCHP_OOB_LDSFT_reserved0_MASK 0x0000ffff
1148	#define BCHP_OOB_LDSFT_reserved0_SHIFT 0
1149
1150	/***************************************************************************
1151	*STSNRT - Out-of-Band Store QPSK SNR High/Low Threshold Value Register
1152	***************************************************************************/
1153	/* OOB :: STSNRT :: OOB_STSNRT_0 [31:24] */
1154	#define BCHP_OOB_STSNRT_OOB_STSNRT_0_MASK 0xff000000
1155	#define BCHP_OOB_STSNRT_OOB_STSNRT_0_SHIFT 24
1156
1157	/* OOB :: STSNRT :: OOB_STSNRT_1 [23:16] */
1158	#define BCHP_OOB_STSNRT_OOB_STSNRT_1_MASK 0x00ff0000
1159	#define BCHP_OOB_STSNRT_OOB_STSNRT_1_SHIFT 16
1160
1161	/* OOB :: STSNRT :: OOB_STSNRT_2 [15:08] */
1162	#define BCHP_OOB_STSNRT_OOB_STSNRT_2_MASK 0x0000ff00
1163	#define BCHP_OOB_STSNRT_OOB_STSNRT_2_SHIFT 8
1164
1165	/* OOB :: STSNRT :: reserved0 [07:00] */
1166	#define BCHP_OOB_STSNRT_reserved0_MASK 0x000000ff
1167	#define BCHP_OOB_STSNRT_reserved0_SHIFT 0
1168
1169	/***************************************************************************
1170	*STSNRE - Out-of-Band Store QPSK SNR Estimate Register
1171	***************************************************************************/
1172	/* OOB :: STSNRE :: OOB_STSNRE_0 [31:24] */
1173	#define BCHP_OOB_STSNRE_OOB_STSNRE_0_MASK 0xff000000
1174	#define BCHP_OOB_STSNRE_OOB_STSNRE_0_SHIFT 24
1175
1176	/* OOB :: STSNRE :: OOB_STSNRE_1 [23:16] */
1177	#define BCHP_OOB_STSNRE_OOB_STSNRE_1_MASK 0x00ff0000
1178	#define BCHP_OOB_STSNRE_OOB_STSNRE_1_SHIFT 16
1179
1180	/* OOB :: STSNRE :: OOB_STSNRE_2 [15:08] */
1181	#define BCHP_OOB_STSNRE_OOB_STSNRE_2_MASK 0x0000ff00
1182	#define BCHP_OOB_STSNRE_OOB_STSNRE_2_SHIFT 8
1183
1184	/* OOB :: STSNRE :: reserved0 [07:00] */
1185	#define BCHP_OOB_STSNRE_reserved0_MASK 0x000000ff
1186	#define BCHP_OOB_STSNRE_reserved0_SHIFT 0
1187
1188	/***************************************************************************
1189	*STSNRC - Out-of-Band Store QPSK SNR Control Value Register
1190	***************************************************************************/
1191	/* OOB :: STSNRC :: reserved0 [31:27] */
1192	#define BCHP_OOB_STSNRC_reserved0_MASK 0xf8000000
1193	#define BCHP_OOB_STSNRC_reserved0_SHIFT 27
1194
1195	/* OOB :: STSNRC :: OOB_STSNRC_LTHR [26:26] */
1196	#define BCHP_OOB_STSNRC_OOB_STSNRC_LTHR_MASK 0x04000000
1197	#define BCHP_OOB_STSNRC_OOB_STSNRC_LTHR_SHIFT 26
1198	#define BCHP_OOB_STSNRC_OOB_STSNRC_LTHR_DEFAULT 0x00000000
1199
1200	/* OOB :: STSNRC :: OOB_STSNRC_TC [25:24] */
1201	#define BCHP_OOB_STSNRC_OOB_STSNRC_TC_MASK 0x03000000
1202	#define BCHP_OOB_STSNRC_OOB_STSNRC_TC_SHIFT 24
1203	#define BCHP_OOB_STSNRC_OOB_STSNRC_TC_DEFAULT 0x00000002
1204
1205	/* OOB :: STSNRC :: reserved1 [23:00] */
1206	#define BCHP_OOB_STSNRC_reserved1_MASK 0x00ffffff
1207	#define BCHP_OOB_STSNRC_reserved1_SHIFT 0
1208
1209	/***************************************************************************
1210	*LDSNRE - Out-of-Band Load QPSK SNR Estimate Register
1211	***************************************************************************/
1212	/* OOB :: LDSNRE :: OOB_LDSNRE_0 [31:24] */
1213	#define BCHP_OOB_LDSNRE_OOB_LDSNRE_0_MASK 0xff000000
1214	#define BCHP_OOB_LDSNRE_OOB_LDSNRE_0_SHIFT 24
1215
1216	/* OOB :: LDSNRE :: OOB_LDSNRE_1 [23:16] */
1217	#define BCHP_OOB_LDSNRE_OOB_LDSNRE_1_MASK 0x00ff0000
1218	#define BCHP_OOB_LDSNRE_OOB_LDSNRE_1_SHIFT 16
1219
1220	/* OOB :: LDSNRE :: OOB_LDSNRE_2 [15:08] */
1221	#define BCHP_OOB_LDSNRE_OOB_LDSNRE_2_MASK 0x0000ff00
1222	#define BCHP_OOB_LDSNRE_OOB_LDSNRE_2_SHIFT 8
1223
1224	/* OOB :: LDSNRE :: reserved0 [07:00] */
1225	#define BCHP_OOB_LDSNRE_reserved0_MASK 0x000000ff
1226	#define BCHP_OOB_LDSNRE_reserved0_SHIFT 0
1227
1228	/***************************************************************************
1229	*STATHR - Out-of-Band Store the AGC Loop Threshold Register
1230	***************************************************************************/
1231	/* OOB :: STATHR :: OOB_STATHR_0 [31:24] */
1232	#define BCHP_OOB_STATHR_OOB_STATHR_0_MASK 0xff000000
1233	#define BCHP_OOB_STATHR_OOB_STATHR_0_SHIFT 24
1234	#define BCHP_OOB_STATHR_OOB_STATHR_0_DEFAULT 0x000000ff
1235
1236	/* OOB :: STATHR :: OOB_STATHR_1 [23:16] */
1237	#define BCHP_OOB_STATHR_OOB_STATHR_1_MASK 0x00ff0000
1238	#define BCHP_OOB_STATHR_OOB_STATHR_1_SHIFT 16
1239	#define BCHP_OOB_STATHR_OOB_STATHR_1_DEFAULT 0x000000ff
1240
1241	/* OOB :: STATHR :: reserved0 [15:00] */
1242	#define BCHP_OOB_STATHR_reserved0_MASK 0x0000ffff
1243	#define BCHP_OOB_STATHR_reserved0_SHIFT 0
1244
1245	/***************************************************************************
1246	*STABW - Out-of-Band Store the IF and Tuner AGC Loop Bandwidth Register
1247	***************************************************************************/
1248	/* OOB :: STABW :: reserved0 [31:29] */
1249	#define BCHP_OOB_STABW_reserved0_MASK 0xe0000000
1250	#define BCHP_OOB_STABW_reserved0_SHIFT 29
1251
1252	/* OOB :: STABW :: OOB_STABW_0 [28:24] */
1253	#define BCHP_OOB_STABW_OOB_STABW_0_MASK 0x1f000000
1254	#define BCHP_OOB_STABW_OOB_STABW_0_SHIFT 24
1255	#define BCHP_OOB_STABW_OOB_STABW_0_DEFAULT 0x00000000
1256
1257	/* OOB :: STABW :: reserved1 [23:21] */
1258	#define BCHP_OOB_STABW_reserved1_MASK 0x00e00000
1259	#define BCHP_OOB_STABW_reserved1_SHIFT 21
1260
1261	/* OOB :: STABW :: OOB_STABW_1 [20:16] */
1262	#define BCHP_OOB_STABW_OOB_STABW_1_MASK 0x001f0000
1263	#define BCHP_OOB_STABW_OOB_STABW_1_SHIFT 16
1264	#define BCHP_OOB_STABW_OOB_STABW_1_DEFAULT 0x00000000
1265
1266	/* OOB :: STABW :: reserved2 [15:00] */
1267	#define BCHP_OOB_STABW_reserved2_MASK 0x0000ffff
1268	#define BCHP_OOB_STABW_reserved2_SHIFT 0
1269
1270	/***************************************************************************
1271	*STAII - Out-of-Band Store the IF AGC Integrator Register
1272	***************************************************************************/
1273	/* OOB :: STAII :: OOB_STAII_0 [31:24] */
1274	#define BCHP_OOB_STAII_OOB_STAII_0_MASK 0xff000000
1275	#define BCHP_OOB_STAII_OOB_STAII_0_SHIFT 24
1276
1277	/* OOB :: STAII :: OOB_STAII_1 [23:16] */
1278	#define BCHP_OOB_STAII_OOB_STAII_1_MASK 0x00ff0000
1279	#define BCHP_OOB_STAII_OOB_STAII_1_SHIFT 16
1280
1281	/* OOB :: STAII :: OOB_STAII_2 [15:08] */
1282	#define BCHP_OOB_STAII_OOB_STAII_2_MASK 0x0000ff00
1283	#define BCHP_OOB_STAII_OOB_STAII_2_SHIFT 8
1284
1285	/* OOB :: STAII :: reserved0 [07:00] */
1286	#define BCHP_OOB_STAII_reserved0_MASK 0x000000ff
1287	#define BCHP_OOB_STAII_reserved0_SHIFT 0
1288
1289	/***************************************************************************
1290	*STAIT - Out-of-Band Store the Tuner AGC Integrator Register
1291	***************************************************************************/
1292	/* OOB :: STAIT :: OOB_STAIT_0 [31:24] */
1293	#define BCHP_OOB_STAIT_OOB_STAIT_0_MASK 0xff000000
1294	#define BCHP_OOB_STAIT_OOB_STAIT_0_SHIFT 24
1295	#define BCHP_OOB_STAIT_OOB_STAIT_0_DEFAULT 0x000000ff
1296
1297	/* OOB :: STAIT :: OOB_STAIT_1 [23:16] */
1298	#define BCHP_OOB_STAIT_OOB_STAIT_1_MASK 0x00ff0000
1299	#define BCHP_OOB_STAIT_OOB_STAIT_1_SHIFT 16
1300	#define BCHP_OOB_STAIT_OOB_STAIT_1_DEFAULT 0x000000ff
1301
1302	/* OOB :: STAIT :: OOB_STAIT_2 [15:08] */
1303	#define BCHP_OOB_STAIT_OOB_STAIT_2_MASK 0x0000ff00
1304	#define BCHP_OOB_STAIT_OOB_STAIT_2_SHIFT 8
1305	#define BCHP_OOB_STAIT_OOB_STAIT_2_DEFAULT 0x000000ff
1306
1307	/* OOB :: STAIT :: reserved0 [07:00] */
1308	#define BCHP_OOB_STAIT_reserved0_MASK 0x000000ff
1309	#define BCHP_OOB_STAIT_reserved0_SHIFT 0
1310
1311	/***************************************************************************
1312	*STAGI - Out-of-Band Store the IF AGC Gain Threshold Register (28 bits)
1313	***************************************************************************/
1314	/* OOB :: STAGI :: OOB_STAGI_0 [31:24] */
1315	#define BCHP_OOB_STAGI_OOB_STAGI_0_MASK 0xff000000
1316	#define BCHP_OOB_STAGI_OOB_STAGI_0_SHIFT 24
1317	#define BCHP_OOB_STAGI_OOB_STAGI_0_DEFAULT 0x00000000
1318
1319	/* OOB :: STAGI :: OOB_STAGI_1 [23:16] */
1320	#define BCHP_OOB_STAGI_OOB_STAGI_1_MASK 0x00ff0000
1321	#define BCHP_OOB_STAGI_OOB_STAGI_1_SHIFT 16
1322	#define BCHP_OOB_STAGI_OOB_STAGI_1_DEFAULT 0x00000000
1323
1324	/* OOB :: STAGI :: OOB_STAGI_2 [15:08] */
1325	#define BCHP_OOB_STAGI_OOB_STAGI_2_MASK 0x0000ff00
1326	#define BCHP_OOB_STAGI_OOB_STAGI_2_SHIFT 8
1327	#define BCHP_OOB_STAGI_OOB_STAGI_2_DEFAULT 0x00000000
1328
1329	/* OOB :: STAGI :: OOB_STAGI_3 [07:00] */
1330	#define BCHP_OOB_STAGI_OOB_STAGI_3_MASK 0x000000ff
1331	#define BCHP_OOB_STAGI_OOB_STAGI_3_SHIFT 0
1332	#define BCHP_OOB_STAGI_OOB_STAGI_3_DEFAULT 0x00000000
1333
1334	/***************************************************************************
1335	*STAGT - Out-of-Band Store the Tuner AGC Gain Threshold Register (28 bits)
1336	***************************************************************************/
1337	/* OOB :: STAGT :: OOB_STAGT_0 [31:24] */
1338	#define BCHP_OOB_STAGT_OOB_STAGT_0_MASK 0xff000000
1339	#define BCHP_OOB_STAGT_OOB_STAGT_0_SHIFT 24
1340	#define BCHP_OOB_STAGT_OOB_STAGT_0_DEFAULT 0x000000ff
1341
1342	/* OOB :: STAGT :: OOB_STAGT_1 [23:16] */
1343	#define BCHP_OOB_STAGT_OOB_STAGT_1_MASK 0x00ff0000
1344	#define BCHP_OOB_STAGT_OOB_STAGT_1_SHIFT 16
1345	#define BCHP_OOB_STAGT_OOB_STAGT_1_DEFAULT 0x000000ff
1346
1347	/* OOB :: STAGT :: OOB_STAGT_2 [15:08] */
1348	#define BCHP_OOB_STAGT_OOB_STAGT_2_MASK 0x0000ff00
1349	#define BCHP_OOB_STAGT_OOB_STAGT_2_SHIFT 8
1350	#define BCHP_OOB_STAGT_OOB_STAGT_2_DEFAULT 0x000000ff
1351
1352	/* OOB :: STAGT :: OOB_STAGT_3 [07:00] */
1353	#define BCHP_OOB_STAGT_OOB_STAGT_3_MASK 0x000000ff
1354	#define BCHP_OOB_STAGT_OOB_STAGT_3_SHIFT 0
1355	#define BCHP_OOB_STAGT_OOB_STAGT_3_DEFAULT 0x000000f0
1356
1357	/***************************************************************************
1358	*STADEL - Out-of-Band Store the General Purpose Delta-Sigma Gain Control Register
1359	***************************************************************************/
1360	/* OOB :: STADEL :: OOB_STADEL_0_invert [31:31] */
1361	#define BCHP_OOB_STADEL_OOB_STADEL_0_invert_MASK 0x80000000
1362	#define BCHP_OOB_STADEL_OOB_STADEL_0_invert_SHIFT 31
1363
1364	/* OOB :: STADEL :: OOB_STADEL_0_GDS [30:24] */
1365	#define BCHP_OOB_STADEL_OOB_STADEL_0_GDS_MASK 0x7f000000
1366	#define BCHP_OOB_STADEL_OOB_STADEL_0_GDS_SHIFT 24
1367
1368	/* OOB :: STADEL :: OOB_STADEL_1_GDS [23:16] */
1369	#define BCHP_OOB_STADEL_OOB_STADEL_1_GDS_MASK 0x00ff0000
1370	#define BCHP_OOB_STADEL_OOB_STADEL_1_GDS_SHIFT 16
1371
1372	/* OOB :: STADEL :: reserved0 [15:00] */
1373	#define BCHP_OOB_STADEL_reserved0_MASK 0x0000ffff
1374	#define BCHP_OOB_STADEL_reserved0_SHIFT 0
1375
1376	/***************************************************************************
1377	*LDADSI - Out-of-Band Load the AGC IF Loop Delta-Sigma Register
1378	***************************************************************************/
1379	/* OOB :: LDADSI :: OOB_LDADSI_0 [31:24] */
1380	#define BCHP_OOB_LDADSI_OOB_LDADSI_0_MASK 0xff000000
1381	#define BCHP_OOB_LDADSI_OOB_LDADSI_0_SHIFT 24
1382
1383	/* OOB :: LDADSI :: OOB_LDADSI_1 [23:16] */
1384	#define BCHP_OOB_LDADSI_OOB_LDADSI_1_MASK 0x00ff0000
1385	#define BCHP_OOB_LDADSI_OOB_LDADSI_1_SHIFT 16
1386
1387	/* OOB :: LDADSI :: reserved0 [15:00] */
1388	#define BCHP_OOB_LDADSI_reserved0_MASK 0x0000ffff
1389	#define BCHP_OOB_LDADSI_reserved0_SHIFT 0
1390
1391	/***************************************************************************
1392	*LDADST - Out-of-Band Load the AGC Tuner Loop Delta-Sigma Register
1393	***************************************************************************/
1394	/* OOB :: LDADST :: OOB_LDADST_0 [31:24] */
1395	#define BCHP_OOB_LDADST_OOB_LDADST_0_MASK 0xff000000
1396	#define BCHP_OOB_LDADST_OOB_LDADST_0_SHIFT 24
1397
1398	/* OOB :: LDADST :: OOB_LDADST_1 [23:16] */
1399	#define BCHP_OOB_LDADST_OOB_LDADST_1_MASK 0x00ff0000
1400	#define BCHP_OOB_LDADST_OOB_LDADST_1_SHIFT 16
1401
1402	/* OOB :: LDADST :: reserved0 [15:00] */
1403	#define BCHP_OOB_LDADST_reserved0_MASK 0x0000ffff
1404	#define BCHP_OOB_LDADST_reserved0_SHIFT 0
1405
1406	/***************************************************************************
1407	*LDAII - Out-of-Band Load the IF AGC Integrator Content Register
1408	***************************************************************************/
1409	/* OOB :: LDAII :: OOB_LDAII_0 [31:24] */
1410	#define BCHP_OOB_LDAII_OOB_LDAII_0_MASK 0xff000000
1411	#define BCHP_OOB_LDAII_OOB_LDAII_0_SHIFT 24
1412
1413	/* OOB :: LDAII :: OOB_LDAII_1 [23:16] */
1414	#define BCHP_OOB_LDAII_OOB_LDAII_1_MASK 0x00ff0000
1415	#define BCHP_OOB_LDAII_OOB_LDAII_1_SHIFT 16
1416
1417	/* OOB :: LDAII :: OOB_LDAII_2 [15:08] */
1418	#define BCHP_OOB_LDAII_OOB_LDAII_2_MASK 0x0000ff00
1419	#define BCHP_OOB_LDAII_OOB_LDAII_2_SHIFT 8
1420
1421	/* OOB :: LDAII :: reserved0 [07:00] */
1422	#define BCHP_OOB_LDAII_reserved0_MASK 0x000000ff
1423	#define BCHP_OOB_LDAII_reserved0_SHIFT 0
1424
1425	/***************************************************************************
1426	*LDALI - Out-of-Band Load the AGC Leaking Integrator Content Register
1427	***************************************************************************/
1428	/* OOB :: LDALI :: OOB_LDALI_0 [31:24] */
1429	#define BCHP_OOB_LDALI_OOB_LDALI_0_MASK 0xff000000
1430	#define BCHP_OOB_LDALI_OOB_LDALI_0_SHIFT 24
1431	#define BCHP_OOB_LDALI_OOB_LDALI_0_DEFAULT 0x00000040
1432
1433	/* OOB :: LDALI :: OOB_LDALI_1 [23:16] */
1434	#define BCHP_OOB_LDALI_OOB_LDALI_1_MASK 0x00ff0000
1435	#define BCHP_OOB_LDALI_OOB_LDALI_1_SHIFT 16
1436	#define BCHP_OOB_LDALI_OOB_LDALI_1_DEFAULT 0x00000000
1437
1438	/* OOB :: LDALI :: reserved0 [15:00] */
1439	#define BCHP_OOB_LDALI_reserved0_MASK 0x0000ffff
1440	#define BCHP_OOB_LDALI_reserved0_SHIFT 0
1441
1442	/***************************************************************************
1443	*LDAIT - Out-of-Band Load the Tuner AGC Integrator Content Register
1444	***************************************************************************/
1445	/* OOB :: LDAIT :: OOB_LDAIT_0 [31:24] */
1446	#define BCHP_OOB_LDAIT_OOB_LDAIT_0_MASK 0xff000000
1447	#define BCHP_OOB_LDAIT_OOB_LDAIT_0_SHIFT 24
1448	#define BCHP_OOB_LDAIT_OOB_LDAIT_0_DEFAULT 0x000000ff
1449
1450	/* OOB :: LDAIT :: OOB_LDAIT_1 [23:16] */
1451	#define BCHP_OOB_LDAIT_OOB_LDAIT_1_MASK 0x00ff0000
1452	#define BCHP_OOB_LDAIT_OOB_LDAIT_1_SHIFT 16
1453	#define BCHP_OOB_LDAIT_OOB_LDAIT_1_DEFAULT 0x000000ff
1454
1455	/* OOB :: LDAIT :: OOB_LDAIT_2 [15:08] */
1456	#define BCHP_OOB_LDAIT_OOB_LDAIT_2_MASK 0x0000ff00
1457	#define BCHP_OOB_LDAIT_OOB_LDAIT_2_SHIFT 8
1458	#define BCHP_OOB_LDAIT_OOB_LDAIT_2_DEFAULT 0x000000ff
1459
1460	/* OOB :: LDAIT :: reserved0 [07:00] */
1461	#define BCHP_OOB_LDAIT_reserved0_MASK 0x000000ff
1462	#define BCHP_OOB_LDAIT_reserved0_SHIFT 0
1463
1464	/***************************************************************************
1465	*LDAGI - Out-of-Band Load the IF AGC Gain Threshold Register (28 bits)
1466	***************************************************************************/
1467	/* OOB :: LDAGI :: OOB_LDAGI_0 [31:24] */
1468	#define BCHP_OOB_LDAGI_OOB_LDAGI_0_MASK 0xff000000
1469	#define BCHP_OOB_LDAGI_OOB_LDAGI_0_SHIFT 24
1470
1471	/* OOB :: LDAGI :: OOB_LDAGI_1 [23:16] */
1472	#define BCHP_OOB_LDAGI_OOB_LDAGI_1_MASK 0x00ff0000
1473	#define BCHP_OOB_LDAGI_OOB_LDAGI_1_SHIFT 16
1474
1475	/* OOB :: LDAGI :: OOB_LDAGI_2 [15:08] */
1476	#define BCHP_OOB_LDAGI_OOB_LDAGI_2_MASK 0x0000ff00
1477	#define BCHP_OOB_LDAGI_OOB_LDAGI_2_SHIFT 8
1478
1479	/* OOB :: LDAGI :: OOB_LDAGI_3 [07:00] */
1480	#define BCHP_OOB_LDAGI_OOB_LDAGI_3_MASK 0x000000ff
1481	#define BCHP_OOB_LDAGI_OOB_LDAGI_3_SHIFT 0
1482
1483	/***************************************************************************
1484	*LDAGT - Out-of-Band Load the Tuner AGC Gain Threshold Register (28 bits)
1485	***************************************************************************/
1486	/* OOB :: LDAGT :: OOB_LDAGT_0 [31:24] */
1487	#define BCHP_OOB_LDAGT_OOB_LDAGT_0_MASK 0xff000000
1488	#define BCHP_OOB_LDAGT_OOB_LDAGT_0_SHIFT 24
1489	#define BCHP_OOB_LDAGT_OOB_LDAGT_0_DEFAULT 0x000000ff
1490
1491	/* OOB :: LDAGT :: OOB_LDAGT_1 [23:16] */
1492	#define BCHP_OOB_LDAGT_OOB_LDAGT_1_MASK 0x00ff0000
1493	#define BCHP_OOB_LDAGT_OOB_LDAGT_1_SHIFT 16
1494	#define BCHP_OOB_LDAGT_OOB_LDAGT_1_DEFAULT 0x000000ff
1495
1496	/* OOB :: LDAGT :: OOB_LDAGT_2 [15:08] */
1497	#define BCHP_OOB_LDAGT_OOB_LDAGT_2_MASK 0x0000ff00
1498	#define BCHP_OOB_LDAGT_OOB_LDAGT_2_SHIFT 8
1499	#define BCHP_OOB_LDAGT_OOB_LDAGT_2_DEFAULT 0x000000ff
1500
1501	/* OOB :: LDAGT :: OOB_LDAGT_3 [07:00] */
1502	#define BCHP_OOB_LDAGT_OOB_LDAGT_3_MASK 0x000000ff
1503	#define BCHP_OOB_LDAGT_OOB_LDAGT_3_SHIFT 0
1504	#define BCHP_OOB_LDAGT_OOB_LDAGT_3_DEFAULT 0x000000f0
1505
1506	/***************************************************************************
1507	*LDADEL - Out-of-Band Load the General Purpose Delta-Sigma Gain Control Register
1508	***************************************************************************/
1509	/* OOB :: LDADEL :: OOB_LDADEL_0_invert [31:31] */
1510	#define BCHP_OOB_LDADEL_OOB_LDADEL_0_invert_MASK 0x80000000
1511	#define BCHP_OOB_LDADEL_OOB_LDADEL_0_invert_SHIFT 31
1512
1513	/* OOB :: LDADEL :: OOB_LDADEL_0_GDS [30:24] */
1514	#define BCHP_OOB_LDADEL_OOB_LDADEL_0_GDS_MASK 0x7f000000
1515	#define BCHP_OOB_LDADEL_OOB_LDADEL_0_GDS_SHIFT 24
1516
1517	/* OOB :: LDADEL :: OOB_LDADEL_1_GDS [23:16] */
1518	#define BCHP_OOB_LDADEL_OOB_LDADEL_1_GDS_MASK 0x00ff0000
1519	#define BCHP_OOB_LDADEL_OOB_LDADEL_1_GDS_SHIFT 16
1520
1521	/* OOB :: LDADEL :: reserved0 [15:00] */
1522	#define BCHP_OOB_LDADEL_reserved0_MASK 0x0000ffff
1523	#define BCHP_OOB_LDADEL_reserved0_SHIFT 0
1524
1525	/***************************************************************************
1526	*STBRLC - Out-of-Band Store the Baud Recovery Loop Linear Coefficient Register
1527	***************************************************************************/
1528	/* OOB :: STBRLC :: OOB_STBRLC_0 [31:24] */
1529	#define BCHP_OOB_STBRLC_OOB_STBRLC_0_MASK 0xff000000
1530	#define BCHP_OOB_STBRLC_OOB_STBRLC_0_SHIFT 24
1531	#define BCHP_OOB_STBRLC_OOB_STBRLC_0_DEFAULT 0x000000ff
1532
1533	/* OOB :: STBRLC :: OOB_STBRLC_1 [23:16] */
1534	#define BCHP_OOB_STBRLC_OOB_STBRLC_1_MASK 0x00ff0000
1535	#define BCHP_OOB_STBRLC_OOB_STBRLC_1_SHIFT 16
1536	#define BCHP_OOB_STBRLC_OOB_STBRLC_1_DEFAULT 0x000000ff
1537
1538	/* OOB :: STBRLC :: OOB_STBRLC_2 [15:08] */
1539	#define BCHP_OOB_STBRLC_OOB_STBRLC_2_MASK 0x0000ff00
1540	#define BCHP_OOB_STBRLC_OOB_STBRLC_2_SHIFT 8
1541	#define BCHP_OOB_STBRLC_OOB_STBRLC_2_DEFAULT 0x000000ff
1542
1543	/* OOB :: STBRLC :: reserved0 [07:00] */
1544	#define BCHP_OOB_STBRLC_reserved0_MASK 0x000000ff
1545	#define BCHP_OOB_STBRLC_reserved0_SHIFT 0
1546
1547	/***************************************************************************
1548	*STBRIC - Out-of-Band Store the Baud Recovery Loop Integrator Coefficient Register
1549	***************************************************************************/
1550	/* OOB :: STBRIC :: OOB_STBRIC_0 [31:24] */
1551	#define BCHP_OOB_STBRIC_OOB_STBRIC_0_MASK 0xff000000
1552	#define BCHP_OOB_STBRIC_OOB_STBRIC_0_SHIFT 24
1553	#define BCHP_OOB_STBRIC_OOB_STBRIC_0_DEFAULT 0x000000ff
1554
1555	/* OOB :: STBRIC :: OOB_STBRIC_1 [23:16] */
1556	#define BCHP_OOB_STBRIC_OOB_STBRIC_1_MASK 0x00ff0000
1557	#define BCHP_OOB_STBRIC_OOB_STBRIC_1_SHIFT 16
1558	#define BCHP_OOB_STBRIC_OOB_STBRIC_1_DEFAULT 0x000000ff
1559
1560	/* OOB :: STBRIC :: OOB_STBRIC_2 [15:08] */
1561	#define BCHP_OOB_STBRIC_OOB_STBRIC_2_MASK 0x0000ff00
1562	#define BCHP_OOB_STBRIC_OOB_STBRIC_2_SHIFT 8
1563	#define BCHP_OOB_STBRIC_OOB_STBRIC_2_DEFAULT 0x000000ff
1564
1565	/* OOB :: STBRIC :: OOB_STBRIC_3 [07:00] */
1566	#define BCHP_OOB_STBRIC_OOB_STBRIC_3_MASK 0x000000ff
1567	#define BCHP_OOB_STBRIC_OOB_STBRIC_3_SHIFT 0
1568	#define BCHP_OOB_STBRIC_OOB_STBRIC_3_DEFAULT 0x000000ff
1569
1570	/***************************************************************************
1571	*STBRI - Out-of-Band Store the Baud Recovery Loop Integrator Content Register
1572	***************************************************************************/
1573	/* OOB :: STBRI :: OOB_STBRI_0 [31:24] */
1574	#define BCHP_OOB_STBRI_OOB_STBRI_0_MASK 0xff000000
1575	#define BCHP_OOB_STBRI_OOB_STBRI_0_SHIFT 24
1576
1577	/* OOB :: STBRI :: OOB_STBRI_1 [23:16] */
1578	#define BCHP_OOB_STBRI_OOB_STBRI_1_MASK 0x00ff0000
1579	#define BCHP_OOB_STBRI_OOB_STBRI_1_SHIFT 16
1580
1581	/* OOB :: STBRI :: OOB_STBRI_2 [15:08] */
1582	#define BCHP_OOB_STBRI_OOB_STBRI_2_MASK 0x0000ff00
1583	#define BCHP_OOB_STBRI_OOB_STBRI_2_SHIFT 8
1584
1585	/* OOB :: STBRI :: OOB_STBRI_3 [07:00] */
1586	#define BCHP_OOB_STBRI_OOB_STBRI_3_MASK 0x000000ff
1587	#define BCHP_OOB_STBRI_OOB_STBRI_3_SHIFT 0
1588
1589	/***************************************************************************
1590	*STBFOS - Out-of-Band Store the Baud Recovery Loop Frequency Offset Register
1591	***************************************************************************/
1592	/* OOB :: STBFOS :: OOB_STBFOS_0 [31:24] */
1593	#define BCHP_OOB_STBFOS_OOB_STBFOS_0_MASK 0xff000000
1594	#define BCHP_OOB_STBFOS_OOB_STBFOS_0_SHIFT 24
1595
1596	/* OOB :: STBFOS :: OOB_STBFOS_1 [23:16] */
1597	#define BCHP_OOB_STBFOS_OOB_STBFOS_1_MASK 0x00ff0000
1598	#define BCHP_OOB_STBFOS_OOB_STBFOS_1_SHIFT 16
1599
1600	/* OOB :: STBFOS :: OOB_STBFOS_2 [15:08] */
1601	#define BCHP_OOB_STBFOS_OOB_STBFOS_2_MASK 0x0000ff00
1602	#define BCHP_OOB_STBFOS_OOB_STBFOS_2_SHIFT 8
1603
1604	/* OOB :: STBFOS :: reserved0 [07:00] */
1605	#define BCHP_OOB_STBFOS_reserved0_MASK 0x000000ff
1606	#define BCHP_OOB_STBFOS_reserved0_SHIFT 0
1607
1608	/***************************************************************************
1609	*STBEN - Out-of-Band Store the Baud Recovery Loop Enable Register
1610	***************************************************************************/
1611	/* OOB :: STBEN :: reserved0 [31:25] */
1612	#define BCHP_OOB_STBEN_reserved0_MASK 0xfe000000
1613	#define BCHP_OOB_STBEN_reserved0_SHIFT 25
1614
1615	/* OOB :: STBEN :: OOB_STBEN_BAUDEN [24:24] */
1616	#define BCHP_OOB_STBEN_OOB_STBEN_BAUDEN_MASK 0x01000000
1617	#define BCHP_OOB_STBEN_OOB_STBEN_BAUDEN_SHIFT 24
1618	#define BCHP_OOB_STBEN_OOB_STBEN_BAUDEN_DEFAULT 0x00000000
1619
1620	/* OOB :: STBEN :: reserved1 [23:00] */
1621	#define BCHP_OOB_STBEN_reserved1_MASK 0x00ffffff
1622	#define BCHP_OOB_STBEN_reserved1_SHIFT 0
1623
1624	/***************************************************************************
1625	*LDBRFO - Out-of-Band Load the Baud Recovery Loop Filter Output Register
1626	***************************************************************************/
1627	/* OOB :: LDBRFO :: OOB_LDBRFO_0 [31:24] */
1628	#define BCHP_OOB_LDBRFO_OOB_LDBRFO_0_MASK 0xff000000
1629	#define BCHP_OOB_LDBRFO_OOB_LDBRFO_0_SHIFT 24
1630	#define BCHP_OOB_LDBRFO_OOB_LDBRFO_0_DEFAULT 0x00000080
1631
1632	/* OOB :: LDBRFO :: OOB_LDBRFO_1 [23:16] */
1633	#define BCHP_OOB_LDBRFO_OOB_LDBRFO_1_MASK 0x00ff0000
1634	#define BCHP_OOB_LDBRFO_OOB_LDBRFO_1_SHIFT 16
1635	#define BCHP_OOB_LDBRFO_OOB_LDBRFO_1_DEFAULT 0x00000000
1636
1637	/* OOB :: LDBRFO :: OOB_LDBRFO_2 [15:08] */
1638	#define BCHP_OOB_LDBRFO_OOB_LDBRFO_2_MASK 0x0000ff00
1639	#define BCHP_OOB_LDBRFO_OOB_LDBRFO_2_SHIFT 8
1640	#define BCHP_OOB_LDBRFO_OOB_LDBRFO_2_DEFAULT 0x00000000
1641
1642	/* OOB :: LDBRFO :: reserved0 [07:00] */
1643	#define BCHP_OOB_LDBRFO_reserved0_MASK 0x000000ff
1644	#define BCHP_OOB_LDBRFO_reserved0_SHIFT 0
1645
1646	/***************************************************************************
1647	*LDBNCO - Out-of-Band Load the Baud Recovery Loop NCO Content Register
1648	***************************************************************************/
1649	/* OOB :: LDBNCO :: OOB_LDBNCO_0 [31:24] */
1650	#define BCHP_OOB_LDBNCO_OOB_LDBNCO_0_MASK 0xff000000
1651	#define BCHP_OOB_LDBNCO_OOB_LDBNCO_0_SHIFT 24
1652
1653	/* OOB :: LDBNCO :: OOB_LDBNCO_1 [23:16] */
1654	#define BCHP_OOB_LDBNCO_OOB_LDBNCO_1_MASK 0x00ff0000
1655	#define BCHP_OOB_LDBNCO_OOB_LDBNCO_1_SHIFT 16
1656
1657	/* OOB :: LDBNCO :: OOB_LDBNCO_2 [15:08] */
1658	#define BCHP_OOB_LDBNCO_OOB_LDBNCO_2_MASK 0x0000ff00
1659	#define BCHP_OOB_LDBNCO_OOB_LDBNCO_2_SHIFT 8
1660
1661	/* OOB :: LDBNCO :: OOB_LDBNCO_3 [07:00] */
1662	#define BCHP_OOB_LDBNCO_OOB_LDBNCO_3_MASK 0x000000ff
1663	#define BCHP_OOB_LDBNCO_OOB_LDBNCO_3_SHIFT 0
1664
1665	/***************************************************************************
1666	*LDBRI - Out-of-Band Load the Baud Recovery Loop Integrator Content Register
1667	***************************************************************************/
1668	/* OOB :: LDBRI :: OOB_LDBRI_0 [31:24] */
1669	#define BCHP_OOB_LDBRI_OOB_LDBRI_0_MASK 0xff000000
1670	#define BCHP_OOB_LDBRI_OOB_LDBRI_0_SHIFT 24
1671
1672	/* OOB :: LDBRI :: OOB_LDBRI_1 [23:16] */
1673	#define BCHP_OOB_LDBRI_OOB_LDBRI_1_MASK 0x00ff0000
1674	#define BCHP_OOB_LDBRI_OOB_LDBRI_1_SHIFT 16
1675
1676	/* OOB :: LDBRI :: OOB_LDBRI_2 [15:08] */
1677	#define BCHP_OOB_LDBRI_OOB_LDBRI_2_MASK 0x0000ff00
1678	#define BCHP_OOB_LDBRI_OOB_LDBRI_2_SHIFT 8
1679
1680	/* OOB :: LDBRI :: OOB_LDBRI_3 [07:00] */
1681	#define BCHP_OOB_LDBRI_OOB_LDBRI_3_MASK 0x000000ff
1682	#define BCHP_OOB_LDBRI_OOB_LDBRI_3_SHIFT 0
1683
1684	/***************************************************************************
1685	*STDRLC - Out-of-Band Store Front Derotator Linear Filter Coefficient Register
1686	***************************************************************************/
1687	/* OOB :: STDRLC :: OOB_STDRLC_0 [31:24] */
1688	#define BCHP_OOB_STDRLC_OOB_STDRLC_0_MASK 0xff000000
1689	#define BCHP_OOB_STDRLC_OOB_STDRLC_0_SHIFT 24
1690	#define BCHP_OOB_STDRLC_OOB_STDRLC_0_DEFAULT 0x00000000
1691
1692	/* OOB :: STDRLC :: reserved0 [23:00] */
1693	#define BCHP_OOB_STDRLC_reserved0_MASK 0x00ffffff
1694	#define BCHP_OOB_STDRLC_reserved0_SHIFT 0
1695
1696	/***************************************************************************
1697	*STDRIC - Out-of-Band Store Front Derotator Integrator Filter Coefficient Register
1698	***************************************************************************/
1699	/* OOB :: STDRIC :: OOB_STDRIC_0 [31:24] */
1700	#define BCHP_OOB_STDRIC_OOB_STDRIC_0_MASK 0xff000000
1701	#define BCHP_OOB_STDRIC_OOB_STDRIC_0_SHIFT 24
1702	#define BCHP_OOB_STDRIC_OOB_STDRIC_0_DEFAULT 0x00000000
1703
1704	/* OOB :: STDRIC :: reserved0 [23:00] */
1705	#define BCHP_OOB_STDRIC_reserved0_MASK 0x00ffffff
1706	#define BCHP_OOB_STDRIC_reserved0_SHIFT 0
1707
1708	/***************************************************************************
1709	*STDRI - Out-of-Band Store Front Derotator Integrator Content Register
1710	***************************************************************************/
1711	/* OOB :: STDRI :: OOB_STDRI_0 [31:24] */
1712	#define BCHP_OOB_STDRI_OOB_STDRI_0_MASK 0xff000000
1713	#define BCHP_OOB_STDRI_OOB_STDRI_0_SHIFT 24
1714
1715	/* OOB :: STDRI :: OOB_STDRI_1 [23:16] */
1716	#define BCHP_OOB_STDRI_OOB_STDRI_1_MASK 0x00ff0000
1717	#define BCHP_OOB_STDRI_OOB_STDRI_1_SHIFT 16
1718
1719	/* OOB :: STDRI :: OOB_STDRI_2 [15:08] */
1720	#define BCHP_OOB_STDRI_OOB_STDRI_2_MASK 0x0000ff00
1721	#define BCHP_OOB_STDRI_OOB_STDRI_2_SHIFT 8
1722
1723	/* OOB :: STDRI :: reserved0 [07:00] */
1724	#define BCHP_OOB_STDRI_reserved0_MASK 0x000000ff
1725	#define BCHP_OOB_STDRI_reserved0_SHIFT 0
1726
1727	/***************************************************************************
1728	*STDRSP - Out-of-Band Store Front Derotator Sweep Control Register
1729	***************************************************************************/
1730	/* OOB :: STDRSP :: reserved0 [31:29] */
1731	#define BCHP_OOB_STDRSP_reserved0_MASK 0xe0000000
1732	#define BCHP_OOB_STDRSP_reserved0_SHIFT 29
1733
1734	/* OOB :: STDRSP :: OOB_STDRSP_SWPS [28:28] */
1735	#define BCHP_OOB_STDRSP_OOB_STDRSP_SWPS_MASK 0x10000000
1736	#define BCHP_OOB_STDRSP_OOB_STDRSP_SWPS_SHIFT 28
1737	#define BCHP_OOB_STDRSP_OOB_STDRSP_SWPS_DEFAULT 0x00000000
1738
1739	/* OOB :: STDRSP :: OOB_STDRSP_SWPEN [27:27] */
1740	#define BCHP_OOB_STDRSP_OOB_STDRSP_SWPEN_MASK 0x08000000
1741	#define BCHP_OOB_STDRSP_OOB_STDRSP_SWPEN_SHIFT 27
1742	#define BCHP_OOB_STDRSP_OOB_STDRSP_SWPEN_DEFAULT 0x00000000
1743
1744	/* OOB :: STDRSP :: OOB_STDRSP_SWPRATE [26:24] */
1745	#define BCHP_OOB_STDRSP_OOB_STDRSP_SWPRATE_MASK 0x07000000
1746	#define BCHP_OOB_STDRSP_OOB_STDRSP_SWPRATE_SHIFT 24
1747	#define BCHP_OOB_STDRSP_OOB_STDRSP_SWPRATE_DEFAULT 0x00000000
1748
1749	/* OOB :: STDRSP :: OOB_STDRSP_FREQEN [23:23] */
1750	#define BCHP_OOB_STDRSP_OOB_STDRSP_FREQEN_MASK 0x00800000
1751	#define BCHP_OOB_STDRSP_OOB_STDRSP_FREQEN_SHIFT 23
1752	#define BCHP_OOB_STDRSP_OOB_STDRSP_FREQEN_DEFAULT 0x00000000
1753
1754	/* OOB :: STDRSP :: reserved1 [22:22] */
1755	#define BCHP_OOB_STDRSP_reserved1_MASK 0x00400000
1756	#define BCHP_OOB_STDRSP_reserved1_SHIFT 22
1757
1758	/* OOB :: STDRSP :: OOB_STDRSP_FTHRESH [21:16] */
1759	#define BCHP_OOB_STDRSP_OOB_STDRSP_FTHRESH_MASK 0x003f0000
1760	#define BCHP_OOB_STDRSP_OOB_STDRSP_FTHRESH_SHIFT 16
1761	#define BCHP_OOB_STDRSP_OOB_STDRSP_FTHRESH_DEFAULT 0x00000000
1762
1763	/* OOB :: STDRSP :: reserved2 [15:00] */
1764	#define BCHP_OOB_STDRSP_reserved2_MASK 0x0000ffff
1765	#define BCHP_OOB_STDRSP_reserved2_SHIFT 0
1766
1767	/***************************************************************************
1768	*STDRPA - Out-of-Band Store Front Derotator Phase Accumulator Content Register
1769	***************************************************************************/
1770	/* OOB :: STDRPA :: OOB_STDRPA_0 [31:24] */
1771	#define BCHP_OOB_STDRPA_OOB_STDRPA_0_MASK 0xff000000
1772	#define BCHP_OOB_STDRPA_OOB_STDRPA_0_SHIFT 24
1773
1774	/* OOB :: STDRPA :: OOB_STDRPA_1 [23:16] */
1775	#define BCHP_OOB_STDRPA_OOB_STDRPA_1_MASK 0x00ff0000
1776	#define BCHP_OOB_STDRPA_OOB_STDRPA_1_SHIFT 16
1777
1778	/* OOB :: STDRPA :: reserved0 [15:00] */
1779	#define BCHP_OOB_STDRPA_reserved0_MASK 0x0000ffff
1780	#define BCHP_OOB_STDRPA_reserved0_SHIFT 0
1781
1782	/***************************************************************************
1783	*STD2I - Out-of-Band Store Back Derotator Integrator Content Register
1784	***************************************************************************/
1785	/* OOB :: STD2I :: OOB_STD2I [31:06] */
1786	#define BCHP_OOB_STD2I_OOB_STD2I_MASK 0xffffffc0
1787	#define BCHP_OOB_STD2I_OOB_STD2I_SHIFT 6
1788
1789	/* OOB :: STD2I :: reserved0 [05:00] */
1790	#define BCHP_OOB_STD2I_reserved0_MASK 0x0000003f
1791	#define BCHP_OOB_STD2I_reserved0_SHIFT 0
1792
1793	/***************************************************************************
1794	*STD2IC - Out-of-Band Store Back Derotator Integrator Coefficient Register
1795	***************************************************************************/
1796	/* OOB :: STD2IC :: OOB_STD2IC_0 [31:24] */
1797	#define BCHP_OOB_STD2IC_OOB_STD2IC_0_MASK 0xff000000
1798	#define BCHP_OOB_STD2IC_OOB_STD2IC_0_SHIFT 24
1799	#define BCHP_OOB_STD2IC_OOB_STD2IC_0_DEFAULT 0x00000000
1800
1801	/* OOB :: STD2IC :: reserved0 [23:00] */
1802	#define BCHP_OOB_STD2IC_reserved0_MASK 0x00ffffff
1803	#define BCHP_OOB_STD2IC_reserved0_SHIFT 0
1804
1805	/***************************************************************************
1806	*STD2LC - Out-of-Band Store Back Derotator Linear Coefficient Register
1807	***************************************************************************/
1808	/* OOB :: STD2LC :: OOB_STD2LC_0 [31:24] */
1809	#define BCHP_OOB_STD2LC_OOB_STD2LC_0_MASK 0xff000000
1810	#define BCHP_OOB_STD2LC_OOB_STD2LC_0_SHIFT 24
1811	#define BCHP_OOB_STD2LC_OOB_STD2LC_0_DEFAULT 0x00000000
1812
1813	/* OOB :: STD2LC :: reserved0 [23:00] */
1814	#define BCHP_OOB_STD2LC_reserved0_MASK 0x00ffffff
1815	#define BCHP_OOB_STD2LC_reserved0_SHIFT 0
1816
1817	/***************************************************************************
1818	*STD2PA - Out-of-Band Store Back Derotator Phase Accumulator Register
1819	***************************************************************************/
1820	/* OOB :: STD2PA :: OOB_STD2PA_0 [31:24] */
1821	#define BCHP_OOB_STD2PA_OOB_STD2PA_0_MASK 0xff000000
1822	#define BCHP_OOB_STD2PA_OOB_STD2PA_0_SHIFT 24
1823
1824	/* OOB :: STD2PA :: OOB_STD2PA_1 [23:16] */
1825	#define BCHP_OOB_STD2PA_OOB_STD2PA_1_MASK 0x00ff0000
1826	#define BCHP_OOB_STD2PA_OOB_STD2PA_1_SHIFT 16
1827
1828	/* OOB :: STD2PA :: OOB_STD2PA_2 [15:14] */
1829	#define BCHP_OOB_STD2PA_OOB_STD2PA_2_MASK 0x0000c000
1830	#define BCHP_OOB_STD2PA_OOB_STD2PA_2_SHIFT 14
1831
1832	/* OOB :: STD2PA :: reserved0 [13:00] */
1833	#define BCHP_OOB_STD2PA_reserved0_MASK 0x00003fff
1834	#define BCHP_OOB_STD2PA_reserved0_SHIFT 0
1835
1836	/***************************************************************************
1837	*LDDRFO - Out-of-Band Load Front Derotator Filter Output Register
1838	***************************************************************************/
1839	/* OOB :: LDDRFO :: OOB_LDDRFO_0 [31:24] */
1840	#define BCHP_OOB_LDDRFO_OOB_LDDRFO_0_MASK 0xff000000
1841	#define BCHP_OOB_LDDRFO_OOB_LDDRFO_0_SHIFT 24
1842
1843	/* OOB :: LDDRFO :: OOB_LDDRFO_1 [23:16] */
1844	#define BCHP_OOB_LDDRFO_OOB_LDDRFO_1_MASK 0x00ff0000
1845	#define BCHP_OOB_LDDRFO_OOB_LDDRFO_1_SHIFT 16
1846
1847	/* OOB :: LDDRFO :: reserved0 [15:00] */
1848	#define BCHP_OOB_LDDRFO_reserved0_MASK 0x0000ffff
1849	#define BCHP_OOB_LDDRFO_reserved0_SHIFT 0
1850
1851	/***************************************************************************
1852	*LDDRPA - Out-of-Band Load Front Derotator Phase Accumulator Content Register
1853	***************************************************************************/
1854	/* OOB :: LDDRPA :: OOB_LDDRPA_0 [31:24] */
1855	#define BCHP_OOB_LDDRPA_OOB_LDDRPA_0_MASK 0xff000000
1856	#define BCHP_OOB_LDDRPA_OOB_LDDRPA_0_SHIFT 24
1857
1858	/* OOB :: LDDRPA :: OOB_LDDRPA_1 [23:16] */
1859	#define BCHP_OOB_LDDRPA_OOB_LDDRPA_1_MASK 0x00ff0000
1860	#define BCHP_OOB_LDDRPA_OOB_LDDRPA_1_SHIFT 16
1861
1862	/* OOB :: LDDRPA :: reserved0 [15:00] */
1863	#define BCHP_OOB_LDDRPA_reserved0_MASK 0x0000ffff
1864	#define BCHP_OOB_LDDRPA_reserved0_SHIFT 0
1865
1866	/***************************************************************************
1867	*LDDRI - Out-of-Band Load Front Derotator Integrator Content Register
1868	***************************************************************************/
1869	/* OOB :: LDDRI :: OOB_LDDRI_0 [31:24] */
1870	#define BCHP_OOB_LDDRI_OOB_LDDRI_0_MASK 0xff000000
1871	#define BCHP_OOB_LDDRI_OOB_LDDRI_0_SHIFT 24
1872
1873	/* OOB :: LDDRI :: OOB_LDDRI_1 [23:16] */
1874	#define BCHP_OOB_LDDRI_OOB_LDDRI_1_MASK 0x00ff0000
1875	#define BCHP_OOB_LDDRI_OOB_LDDRI_1_SHIFT 16
1876
1877	/* OOB :: LDDRI :: OOB_LDDRI_2 [15:08] */
1878	#define BCHP_OOB_LDDRI_OOB_LDDRI_2_MASK 0x0000ff00
1879	#define BCHP_OOB_LDDRI_OOB_LDDRI_2_SHIFT 8
1880
1881	/* OOB :: LDDRI :: reserved0 [07:00] */
1882	#define BCHP_OOB_LDDRI_reserved0_MASK 0x000000ff
1883	#define BCHP_OOB_LDDRI_reserved0_SHIFT 0
1884
1885	/***************************************************************************
1886	*LDD2FO - Out-of-Band Load Back Derotator Filter Output Register
1887	***************************************************************************/
1888	/* OOB :: LDD2FO :: OOB_LDD2FO_0 [31:24] */
1889	#define BCHP_OOB_LDD2FO_OOB_LDD2FO_0_MASK 0xff000000
1890	#define BCHP_OOB_LDD2FO_OOB_LDD2FO_0_SHIFT 24
1891
1892	/* OOB :: LDD2FO :: OOB_LDD2FO_1 [23:16] */
1893	#define BCHP_OOB_LDD2FO_OOB_LDD2FO_1_MASK 0x00ff0000
1894	#define BCHP_OOB_LDD2FO_OOB_LDD2FO_1_SHIFT 16
1895
1896	/* OOB :: LDD2FO :: reserved0 [15:00] */
1897	#define BCHP_OOB_LDD2FO_reserved0_MASK 0x0000ffff
1898	#define BCHP_OOB_LDD2FO_reserved0_SHIFT 0
1899
1900	/***************************************************************************
1901	*LDD2PA - Out-of-Band Load Back Derotator Phase Accumulator Content Register
1902	***************************************************************************/
1903	/* OOB :: LDD2PA :: OOB_LDD2PA_0 [31:24] */
1904	#define BCHP_OOB_LDD2PA_OOB_LDD2PA_0_MASK 0xff000000
1905	#define BCHP_OOB_LDD2PA_OOB_LDD2PA_0_SHIFT 24
1906
1907	/* OOB :: LDD2PA :: OOB_LDD2PA_1 [23:16] */
1908	#define BCHP_OOB_LDD2PA_OOB_LDD2PA_1_MASK 0x00ff0000
1909	#define BCHP_OOB_LDD2PA_OOB_LDD2PA_1_SHIFT 16
1910
1911	/* OOB :: LDD2PA :: OOB_LDD2PA_2 [15:14] */
1912	#define BCHP_OOB_LDD2PA_OOB_LDD2PA_2_MASK 0x0000c000
1913	#define BCHP_OOB_LDD2PA_OOB_LDD2PA_2_SHIFT 14
1914
1915	/* OOB :: LDD2PA :: reserved0 [13:00] */
1916	#define BCHP_OOB_LDD2PA_reserved0_MASK 0x00003fff
1917	#define BCHP_OOB_LDD2PA_reserved0_SHIFT 0
1918
1919	/***************************************************************************
1920	*LDD2I - Out-of-Band Load Back Derotator Integrator Content Register
1921	***************************************************************************/
1922	/* OOB :: LDD2I :: OOB_LDD2I_0 [31:24] */
1923	#define BCHP_OOB_LDD2I_OOB_LDD2I_0_MASK 0xff000000
1924	#define BCHP_OOB_LDD2I_OOB_LDD2I_0_SHIFT 24
1925
1926	/* OOB :: LDD2I :: OOB_LDD2I_1 [23:16] */
1927	#define BCHP_OOB_LDD2I_OOB_LDD2I_1_MASK 0x00ff0000
1928	#define BCHP_OOB_LDD2I_OOB_LDD2I_1_SHIFT 16
1929
1930	/* OOB :: LDD2I :: OOB_LDD2I_2 [15:08] */
1931	#define BCHP_OOB_LDD2I_OOB_LDD2I_2_MASK 0x0000ff00
1932	#define BCHP_OOB_LDD2I_OOB_LDD2I_2_SHIFT 8
1933
1934	/* OOB :: LDD2I :: OOB_LDD2I_3 [07:06] */
1935	#define BCHP_OOB_LDD2I_OOB_LDD2I_3_MASK 0x000000c0
1936	#define BCHP_OOB_LDD2I_OOB_LDD2I_3_SHIFT 6
1937
1938	/* OOB :: LDD2I :: reserved0 [05:00] */
1939	#define BCHP_OOB_LDD2I_reserved0_MASK 0x0000003f
1940	#define BCHP_OOB_LDD2I_reserved0_SHIFT 0
1941
1942	/***************************************************************************
1943	*STCLP - Out-of-Band Store ADC Clip Counter Value Register
1944	***************************************************************************/
1945	/* OOB :: STCLP :: OOB_STCLP_0 [31:24] */
1946	#define BCHP_OOB_STCLP_OOB_STCLP_0_MASK 0xff000000
1947	#define BCHP_OOB_STCLP_OOB_STCLP_0_SHIFT 24
1948
1949	/* OOB :: STCLP :: OOB_STCLP_1 [23:16] */
1950	#define BCHP_OOB_STCLP_OOB_STCLP_1_MASK 0x00ff0000
1951	#define BCHP_OOB_STCLP_OOB_STCLP_1_SHIFT 16
1952
1953	/* OOB :: STCLP :: OOB_STCLP_2 [15:08] */
1954	#define BCHP_OOB_STCLP_OOB_STCLP_2_MASK 0x0000ff00
1955	#define BCHP_OOB_STCLP_OOB_STCLP_2_SHIFT 8
1956
1957	/* OOB :: STCLP :: reserved0 [07:00] */
1958	#define BCHP_OOB_STCLP_reserved0_MASK 0x000000ff
1959	#define BCHP_OOB_STCLP_reserved0_SHIFT 0
1960
1961	/***************************************************************************
1962	*LDCLP - Out-of-Band Load ADC Clip Counter Value Register
1963	***************************************************************************/
1964	/* OOB :: LDCLP :: OOB_LDCLP_0 [31:24] */
1965	#define BCHP_OOB_LDCLP_OOB_LDCLP_0_MASK 0xff000000
1966	#define BCHP_OOB_LDCLP_OOB_LDCLP_0_SHIFT 24
1967
1968	/* OOB :: LDCLP :: OOB_LDCLP_1 [23:16] */
1969	#define BCHP_OOB_LDCLP_OOB_LDCLP_1_MASK 0x00ff0000
1970	#define BCHP_OOB_LDCLP_OOB_LDCLP_1_SHIFT 16
1971
1972	/* OOB :: LDCLP :: OOB_LDCLP_2 [15:08] */
1973	#define BCHP_OOB_LDCLP_OOB_LDCLP_2_MASK 0x0000ff00
1974	#define BCHP_OOB_LDCLP_OOB_LDCLP_2_SHIFT 8
1975
1976	/* OOB :: LDCLP :: reserved0 [07:00] */
1977	#define BCHP_OOB_LDCLP_reserved0_MASK 0x000000ff
1978	#define BCHP_OOB_LDCLP_reserved0_SHIFT 0
1979
1980	/***************************************************************************
1981	*STLPST - Out-of-Band Store Test Values Register
1982	***************************************************************************/
1983	/* OOB :: STLPST :: OOB_STLPST_0 [31:24] */
1984	#define BCHP_OOB_STLPST_OOB_STLPST_0_MASK 0xff000000
1985	#define BCHP_OOB_STLPST_OOB_STLPST_0_SHIFT 24
1986
1987	/* OOB :: STLPST :: reserved0 [23:00] */
1988	#define BCHP_OOB_STLPST_reserved0_MASK 0x00ffffff
1989	#define BCHP_OOB_STLPST_reserved0_SHIFT 0
1990
1991	/***************************************************************************
1992	*STFECL - Out-of-Band Store FEC Lower Control Register
1993	***************************************************************************/
1994	/* OOB :: STFECL :: OOB_STFECL_0 [31:24] */
1995	#define BCHP_OOB_STFECL_OOB_STFECL_0_MASK 0xff000000
1996	#define BCHP_OOB_STFECL_OOB_STFECL_0_SHIFT 24
1997	#define BCHP_OOB_STFECL_OOB_STFECL_0_DEFAULT 0x00000005
1998
1999	/* OOB :: STFECL :: OOB_STFECL_1 [23:16] */
2000	#define BCHP_OOB_STFECL_OOB_STFECL_1_MASK 0x00ff0000
2001	#define BCHP_OOB_STFECL_OOB_STFECL_1_SHIFT 16
2002	#define BCHP_OOB_STFECL_OOB_STFECL_1_DEFAULT 0x00000053
2003
2004	/* OOB :: STFECL :: OOB_STFECL_2 [15:08] */
2005	#define BCHP_OOB_STFECL_OOB_STFECL_2_MASK 0x0000ff00
2006	#define BCHP_OOB_STFECL_OOB_STFECL_2_SHIFT 8
2007	#define BCHP_OOB_STFECL_OOB_STFECL_2_DEFAULT 0x00000021
2008
2009	/* OOB :: STFECL :: reserved0 [07:00] */
2010	#define BCHP_OOB_STFECL_reserved0_MASK 0x000000ff
2011	#define BCHP_OOB_STFECL_reserved0_SHIFT 0
2012
2013	/***************************************************************************
2014	*STFECH - Out-of-Band Store FEC Upper Control Register
2015	***************************************************************************/
2016	/* OOB :: STFECH :: OOB_STFECH_0 [31:24] */
2017	#define BCHP_OOB_STFECH_OOB_STFECH_0_MASK 0xff000000
2018	#define BCHP_OOB_STFECH_OOB_STFECH_0_SHIFT 24
2019	#define BCHP_OOB_STFECH_OOB_STFECH_0_DEFAULT 0x00000005
2020
2021	/* OOB :: STFECH :: OOB_STFECH_1 [23:16] */
2022	#define BCHP_OOB_STFECH_OOB_STFECH_1_MASK 0x00ff0000
2023	#define BCHP_OOB_STFECH_OOB_STFECH_1_SHIFT 16
2024	#define BCHP_OOB_STFECH_OOB_STFECH_1_DEFAULT 0x00000007
2025
2026	/* OOB :: STFECH :: reserved0 [15:00] */
2027	#define BCHP_OOB_STFECH_reserved0_MASK 0x0000ffff
2028	#define BCHP_OOB_STFECH_reserved0_SHIFT 0
2029
2030	/***************************************************************************
2031	*STIDLEC - Out-of-Band Store FEC IDLE Cell Count Register
2032	***************************************************************************/
2033	/* OOB :: STIDLEC :: OOB_STIDLEC_0 [31:24] */
2034	#define BCHP_OOB_STIDLEC_OOB_STIDLEC_0_MASK 0xff000000
2035	#define BCHP_OOB_STIDLEC_OOB_STIDLEC_0_SHIFT 24
2036
2037	/* OOB :: STIDLEC :: OOB_STIDLEC_1 [23:16] */
2038	#define BCHP_OOB_STIDLEC_OOB_STIDLEC_1_MASK 0x00ff0000
2039	#define BCHP_OOB_STIDLEC_OOB_STIDLEC_1_SHIFT 16
2040
2041	/* OOB :: STIDLEC :: OOB_STIDLEC_2 [15:08] */
2042	#define BCHP_OOB_STIDLEC_OOB_STIDLEC_2_MASK 0x0000ff00
2043	#define BCHP_OOB_STIDLEC_OOB_STIDLEC_2_SHIFT 8
2044
2045	/* OOB :: STIDLEC :: OOB_STIDLEC_3 [07:00] */
2046	#define BCHP_OOB_STIDLEC_OOB_STIDLEC_3_MASK 0x000000ff
2047	#define BCHP_OOB_STIDLEC_OOB_STIDLEC_3_SHIFT 0
2048
2049	/***************************************************************************
2050	*STUERC - Out-of-Band Store FEC UER Counter Register
2051	***************************************************************************/
2052	/* OOB :: STUERC :: reserved0 [31:24] */
2053	#define BCHP_OOB_STUERC_reserved0_MASK 0xff000000
2054	#define BCHP_OOB_STUERC_reserved0_SHIFT 24
2055
2056	/* OOB :: STUERC :: OOB_STUERC_0 [23:16] */
2057	#define BCHP_OOB_STUERC_OOB_STUERC_0_MASK 0x00ff0000
2058	#define BCHP_OOB_STUERC_OOB_STUERC_0_SHIFT 16
2059
2060	/* OOB :: STUERC :: OOB_STUERC_1 [15:08] */
2061	#define BCHP_OOB_STUERC_OOB_STUERC_1_MASK 0x0000ff00
2062	#define BCHP_OOB_STUERC_OOB_STUERC_1_SHIFT 8
2063
2064	/* OOB :: STUERC :: reserved1 [07:00] */
2065	#define BCHP_OOB_STUERC_reserved1_MASK 0x000000ff
2066	#define BCHP_OOB_STUERC_reserved1_SHIFT 0
2067
2068	/***************************************************************************
2069	*STATMC - Out-of-Band Store ATM_CELL_TOTAL_COUNT Test Value Register (BCM_USE)
2070	***************************************************************************/
2071	/* OOB :: STATMC :: OOB_STATMC_0 [31:24] */
2072	#define BCHP_OOB_STATMC_OOB_STATMC_0_MASK 0xff000000
2073	#define BCHP_OOB_STATMC_OOB_STATMC_0_SHIFT 24
2074
2075	/* OOB :: STATMC :: OOB_STATMC_1 [23:16] */
2076	#define BCHP_OOB_STATMC_OOB_STATMC_1_MASK 0x00ff0000
2077	#define BCHP_OOB_STATMC_OOB_STATMC_1_SHIFT 16
2078
2079	/* OOB :: STATMC :: OOB_STATMC_2 [15:08] */
2080	#define BCHP_OOB_STATMC_OOB_STATMC_2_MASK 0x0000ff00
2081	#define BCHP_OOB_STATMC_OOB_STATMC_2_SHIFT 8
2082
2083	/* OOB :: STATMC :: OOB_STATMC_3 [07:00] */
2084	#define BCHP_OOB_STATMC_OOB_STATMC_3_MASK 0x000000ff
2085	#define BCHP_OOB_STATMC_OOB_STATMC_3_SHIFT 0
2086
2087	/***************************************************************************
2088	*STRSB - Out-of-Band Store RS_BYTE_CORRECTION_COUNT Test Value Register (BCM_USE)
2089	***************************************************************************/
2090	/* OOB :: STRSB :: OOB_STRSB_0 [31:24] */
2091	#define BCHP_OOB_STRSB_OOB_STRSB_0_MASK 0xff000000
2092	#define BCHP_OOB_STRSB_OOB_STRSB_0_SHIFT 24
2093
2094	/* OOB :: STRSB :: OOB_STRSB_1 [23:16] */
2095	#define BCHP_OOB_STRSB_OOB_STRSB_1_MASK 0x00ff0000
2096	#define BCHP_OOB_STRSB_OOB_STRSB_1_SHIFT 16
2097
2098	/* OOB :: STRSB :: reserved0 [15:00] */
2099	#define BCHP_OOB_STRSB_reserved0_MASK 0x0000ffff
2100	#define BCHP_OOB_STRSB_reserved0_SHIFT 0
2101
2102	/***************************************************************************
2103	*STHEC - Out-of-Band Store HEC_ERROR_COUNT Test Value Register (BCM_USE)
2104	***************************************************************************/
2105	/* OOB :: STHEC :: OOB_STHEC_0 [31:24] */
2106	#define BCHP_OOB_STHEC_OOB_STHEC_0_MASK 0xff000000
2107	#define BCHP_OOB_STHEC_OOB_STHEC_0_SHIFT 24
2108
2109	/* OOB :: STHEC :: OOB_STHEC_1 [23:16] */
2110	#define BCHP_OOB_STHEC_OOB_STHEC_1_MASK 0x00ff0000
2111	#define BCHP_OOB_STHEC_OOB_STHEC_1_SHIFT 16
2112
2113	/* OOB :: STHEC :: reserved0 [15:00] */
2114	#define BCHP_OOB_STHEC_reserved0_MASK 0x0000ffff
2115	#define BCHP_OOB_STHEC_reserved0_SHIFT 0
2116
2117	/***************************************************************************
2118	*STATML - Out-of-Band Store ATM_CELL_LOSS_COUNT Test Value Register (BCM_USE)
2119	***************************************************************************/
2120	/* OOB :: STATML :: OOB_STATML_0 [31:24] */
2121	#define BCHP_OOB_STATML_OOB_STATML_0_MASK 0xff000000
2122	#define BCHP_OOB_STATML_OOB_STATML_0_SHIFT 24
2123
2124	/* OOB :: STATML :: OOB_STATML_1 [23:16] */
2125	#define BCHP_OOB_STATML_OOB_STATML_1_MASK 0x00ff0000
2126	#define BCHP_OOB_STATML_OOB_STATML_1_SHIFT 16
2127
2128	/* OOB :: STATML :: reserved0 [15:00] */
2129	#define BCHP_OOB_STATML_reserved0_MASK 0x0000ffff
2130	#define BCHP_OOB_STATML_reserved0_SHIFT 0
2131
2132	/***************************************************************************
2133	*STSL - Out-of-Band Store SL_ESF_CRC_ERROR_COUNT Test Value Register (BCM_USE)
2134	***************************************************************************/
2135	/* OOB :: STSL :: OOB_STSL_0 [31:24] */
2136	#define BCHP_OOB_STSL_OOB_STSL_0_MASK 0xff000000
2137	#define BCHP_OOB_STSL_OOB_STSL_0_SHIFT 24
2138
2139	/* OOB :: STSL :: OOB_STSL_1 [23:16] */
2140	#define BCHP_OOB_STSL_OOB_STSL_1_MASK 0x00ff0000
2141	#define BCHP_OOB_STSL_OOB_STSL_1_SHIFT 16
2142
2143	/* OOB :: STSL :: reserved0 [15:00] */
2144	#define BCHP_OOB_STSL_reserved0_MASK 0x0000ffff
2145	#define BCHP_OOB_STSL_reserved0_SHIFT 0
2146
2147	/***************************************************************************
2148	*STSF - Out-of-Band Store SF_ESF_TOTAL_COUNT Test Value Register (BCM_USE)
2149	***************************************************************************/
2150	/* OOB :: STSF :: OOB_STSF_0 [31:24] */
2151	#define BCHP_OOB_STSF_OOB_STSF_0_MASK 0xff000000
2152	#define BCHP_OOB_STSF_OOB_STSF_0_SHIFT 24
2153
2154	/* OOB :: STSF :: OOB_STSF_1 [23:16] */
2155	#define BCHP_OOB_STSF_OOB_STSF_1_MASK 0x00ff0000
2156	#define BCHP_OOB_STSF_OOB_STSF_1_SHIFT 16
2157
2158	/* OOB :: STSF :: OOB_STSF_2 [15:08] */
2159	#define BCHP_OOB_STSF_OOB_STSF_2_MASK 0x0000ff00
2160	#define BCHP_OOB_STSF_OOB_STSF_2_SHIFT 8
2161
2162	/* OOB :: STSF :: OOB_STSF_3 [07:00] */
2163	#define BCHP_OOB_STSF_OOB_STSF_3_MASK 0x000000ff
2164	#define BCHP_OOB_STSF_OOB_STSF_3_SHIFT 0
2165
2166	/***************************************************************************
2167	*STRXC - Out-of-Band Store Rx_CRC_ERROR_COUNT Test Value Register (BCM_USE)
2168	***************************************************************************/
2169	/* OOB :: STRXC :: OOB_STRXC_0 [31:24] */
2170	#define BCHP_OOB_STRXC_OOB_STRXC_0_MASK 0xff000000
2171	#define BCHP_OOB_STRXC_OOB_STRXC_0_SHIFT 24
2172
2173	/* OOB :: STRXC :: OOB_STRXC_1 [23:16] */
2174	#define BCHP_OOB_STRXC_OOB_STRXC_1_MASK 0x00ff0000
2175	#define BCHP_OOB_STRXC_OOB_STRXC_1_SHIFT 16
2176
2177	/* OOB :: STRXC :: reserved0 [15:00] */
2178	#define BCHP_OOB_STRXC_reserved0_MASK 0x0000ffff
2179	#define BCHP_OOB_STRXC_reserved0_SHIFT 0
2180
2181	/***************************************************************************
2182	*STPAR - Out-of-Band Store Mbit PARITY_ERROR_COUNT Test Value Register (BCM_USE)
2183	***************************************************************************/
2184	/* OOB :: STPAR :: OOB_STPAR_0 [31:24] */
2185	#define BCHP_OOB_STPAR_OOB_STPAR_0_MASK 0xff000000
2186	#define BCHP_OOB_STPAR_OOB_STPAR_0_SHIFT 24
2187
2188	/* OOB :: STPAR :: OOB_STPAR_1 [23:16] */
2189	#define BCHP_OOB_STPAR_OOB_STPAR_1_MASK 0x00ff0000
2190	#define BCHP_OOB_STPAR_OOB_STPAR_1_SHIFT 16
2191
2192	/* OOB :: STPAR :: reserved0 [15:00] */
2193	#define BCHP_OOB_STPAR_reserved0_MASK 0x0000ffff
2194	#define BCHP_OOB_STPAR_reserved0_SHIFT 0
2195
2196	/***************************************************************************
2197	*LDFECL - Out-of-Band Load FEC Lower Control Register
2198	***************************************************************************/
2199	/* OOB :: LDFECL :: OOB_LDFECL_0 [31:24] */
2200	#define BCHP_OOB_LDFECL_OOB_LDFECL_0_MASK 0xff000000
2201	#define BCHP_OOB_LDFECL_OOB_LDFECL_0_SHIFT 24
2202	#define BCHP_OOB_LDFECL_OOB_LDFECL_0_DEFAULT 0x00000005
2203
2204	/* OOB :: LDFECL :: OOB_LDFECL_1 [23:16] */
2205	#define BCHP_OOB_LDFECL_OOB_LDFECL_1_MASK 0x00ff0000
2206	#define BCHP_OOB_LDFECL_OOB_LDFECL_1_SHIFT 16
2207	#define BCHP_OOB_LDFECL_OOB_LDFECL_1_DEFAULT 0x00000053
2208
2209	/* OOB :: LDFECL :: OOB_LDFECL_2 [15:08] */
2210	#define BCHP_OOB_LDFECL_OOB_LDFECL_2_MASK 0x0000ff00
2211	#define BCHP_OOB_LDFECL_OOB_LDFECL_2_SHIFT 8
2212	#define BCHP_OOB_LDFECL_OOB_LDFECL_2_DEFAULT 0x00000021
2213
2214	/* OOB :: LDFECL :: reserved0 [07:00] */
2215	#define BCHP_OOB_LDFECL_reserved0_MASK 0x000000ff
2216	#define BCHP_OOB_LDFECL_reserved0_SHIFT 0
2217
2218	/***************************************************************************
2219	*LDFECH - Out-of-Band Store FEC Upper Control Register
2220	***************************************************************************/
2221	/* OOB :: LDFECH :: OOB_LDFECH_0 [31:24] */
2222	#define BCHP_OOB_LDFECH_OOB_LDFECH_0_MASK 0xff000000
2223	#define BCHP_OOB_LDFECH_OOB_LDFECH_0_SHIFT 24
2224	#define BCHP_OOB_LDFECH_OOB_LDFECH_0_DEFAULT 0x00000005
2225
2226	/* OOB :: LDFECH :: OOB_LDFECH_1 [23:16] */
2227	#define BCHP_OOB_LDFECH_OOB_LDFECH_1_MASK 0x00ff0000
2228	#define BCHP_OOB_LDFECH_OOB_LDFECH_1_SHIFT 16
2229	#define BCHP_OOB_LDFECH_OOB_LDFECH_1_DEFAULT 0x00000007
2230
2231	/* OOB :: LDFECH :: reserved0 [15:00] */
2232	#define BCHP_OOB_LDFECH_reserved0_MASK 0x0000ffff
2233	#define BCHP_OOB_LDFECH_reserved0_SHIFT 0
2234
2235	/***************************************************************************
2236	*LDIDLEC - Out-of-Band Load FEC IDLE Cell Count Register
2237	***************************************************************************/
2238	/* OOB :: LDIDLEC :: OOB_LDIDLEC_0 [31:24] */
2239	#define BCHP_OOB_LDIDLEC_OOB_LDIDLEC_0_MASK 0xff000000
2240	#define BCHP_OOB_LDIDLEC_OOB_LDIDLEC_0_SHIFT 24
2241
2242	/* OOB :: LDIDLEC :: OOB_LDIDLEC_1 [23:16] */
2243	#define BCHP_OOB_LDIDLEC_OOB_LDIDLEC_1_MASK 0x00ff0000
2244	#define BCHP_OOB_LDIDLEC_OOB_LDIDLEC_1_SHIFT 16
2245
2246	/* OOB :: LDIDLEC :: OOB_LDIDLEC_2 [15:08] */
2247	#define BCHP_OOB_LDIDLEC_OOB_LDIDLEC_2_MASK 0x0000ff00
2248	#define BCHP_OOB_LDIDLEC_OOB_LDIDLEC_2_SHIFT 8
2249
2250	/* OOB :: LDIDLEC :: OOB_LDIDLEC_3 [07:00] */
2251	#define BCHP_OOB_LDIDLEC_OOB_LDIDLEC_3_MASK 0x000000ff
2252	#define BCHP_OOB_LDIDLEC_OOB_LDIDLEC_3_SHIFT 0
2253
2254	/***************************************************************************
2255	*LDUERC - Out-of-Band Load FEC UER Counter Register
2256	***************************************************************************/
2257	/* OOB :: LDUERC :: OOB_LDUERC_0 [31:24] */
2258	#define BCHP_OOB_LDUERC_OOB_LDUERC_0_MASK 0xff000000
2259	#define BCHP_OOB_LDUERC_OOB_LDUERC_0_SHIFT 24
2260
2261	/* OOB :: LDUERC :: OOB_LDUERC_1 [23:16] */
2262	#define BCHP_OOB_LDUERC_OOB_LDUERC_1_MASK 0x00ff0000
2263	#define BCHP_OOB_LDUERC_OOB_LDUERC_1_SHIFT 16
2264
2265	/* OOB :: LDUERC :: OOB_LDUERC_2 [15:08] */
2266	#define BCHP_OOB_LDUERC_OOB_LDUERC_2_MASK 0x0000ff00
2267	#define BCHP_OOB_LDUERC_OOB_LDUERC_2_SHIFT 8
2268
2269	/* OOB :: LDUERC :: OOB_LDUERC_3 [07:00] */
2270	#define BCHP_OOB_LDUERC_OOB_LDUERC_3_MASK 0x000000ff
2271	#define BCHP_OOB_LDUERC_OOB_LDUERC_3_SHIFT 0
2272
2273	/***************************************************************************
2274	*LDATMC - Out-of-Band Load ATM_CELL_TOTAL_COUNT Test Value Register (BCM_USE)
2275	***************************************************************************/
2276	/* OOB :: LDATMC :: OOB_LDATMC_0 [31:24] */
2277	#define BCHP_OOB_LDATMC_OOB_LDATMC_0_MASK 0xff000000
2278	#define BCHP_OOB_LDATMC_OOB_LDATMC_0_SHIFT 24
2279
2280	/* OOB :: LDATMC :: OOB_LDATMC_1 [23:16] */
2281	#define BCHP_OOB_LDATMC_OOB_LDATMC_1_MASK 0x00ff0000
2282	#define BCHP_OOB_LDATMC_OOB_LDATMC_1_SHIFT 16
2283
2284	/* OOB :: LDATMC :: OOB_LDATMC_2 [15:08] */
2285	#define BCHP_OOB_LDATMC_OOB_LDATMC_2_MASK 0x0000ff00
2286	#define BCHP_OOB_LDATMC_OOB_LDATMC_2_SHIFT 8
2287
2288	/* OOB :: LDATMC :: OOB_LDATMC_3 [07:00] */
2289	#define BCHP_OOB_LDATMC_OOB_LDATMC_3_MASK 0x000000ff
2290	#define BCHP_OOB_LDATMC_OOB_LDATMC_3_SHIFT 0
2291
2292	/***************************************************************************
2293	*LDRSB - Out-of-Band Load RS_BYTE_CORRECTION_COUNT Test Value Register (BCM_USE)
2294	***************************************************************************/
2295	/* OOB :: LDRSB :: OOB_LDRSB_0 [31:24] */
2296	#define BCHP_OOB_LDRSB_OOB_LDRSB_0_MASK 0xff000000
2297	#define BCHP_OOB_LDRSB_OOB_LDRSB_0_SHIFT 24
2298
2299	/* OOB :: LDRSB :: OOB_LDRSB_1 [23:16] */
2300	#define BCHP_OOB_LDRSB_OOB_LDRSB_1_MASK 0x00ff0000
2301	#define BCHP_OOB_LDRSB_OOB_LDRSB_1_SHIFT 16
2302
2303	/* OOB :: LDRSB :: reserved0 [15:00] */
2304	#define BCHP_OOB_LDRSB_reserved0_MASK 0x0000ffff
2305	#define BCHP_OOB_LDRSB_reserved0_SHIFT 0
2306
2307	/***************************************************************************
2308	*LDHEC - Out-of-Band Load HEC_ERROR_COUNT Test Value Register (BCM_USE)
2309	***************************************************************************/
2310	/* OOB :: LDHEC :: OOB_LDHEC_0 [31:24] */
2311	#define BCHP_OOB_LDHEC_OOB_LDHEC_0_MASK 0xff000000
2312	#define BCHP_OOB_LDHEC_OOB_LDHEC_0_SHIFT 24
2313
2314	/* OOB :: LDHEC :: OOB_LDHEC_1 [23:16] */
2315	#define BCHP_OOB_LDHEC_OOB_LDHEC_1_MASK 0x00ff0000
2316	#define BCHP_OOB_LDHEC_OOB_LDHEC_1_SHIFT 16
2317
2318	/* OOB :: LDHEC :: reserved0 [15:00] */
2319	#define BCHP_OOB_LDHEC_reserved0_MASK 0x0000ffff
2320	#define BCHP_OOB_LDHEC_reserved0_SHIFT 0
2321
2322	/***************************************************************************
2323	*LDATML - Out-of-Band Load ATM_CELL_LOSS_COUNT Test Value Register (BCM_USE)
2324	***************************************************************************/
2325	/* OOB :: LDATML :: OOB_LDATML_0 [31:24] */
2326	#define BCHP_OOB_LDATML_OOB_LDATML_0_MASK 0xff000000
2327	#define BCHP_OOB_LDATML_OOB_LDATML_0_SHIFT 24
2328
2329	/* OOB :: LDATML :: OOB_LDATML_1 [23:16] */
2330	#define BCHP_OOB_LDATML_OOB_LDATML_1_MASK 0x00ff0000
2331	#define BCHP_OOB_LDATML_OOB_LDATML_1_SHIFT 16
2332
2333	/* OOB :: LDATML :: reserved0 [15:00] */
2334	#define BCHP_OOB_LDATML_reserved0_MASK 0x0000ffff
2335	#define BCHP_OOB_LDATML_reserved0_SHIFT 0
2336
2337	/***************************************************************************
2338	*LDSL - Out-of-Band Load SL_ESF_CRC_ERROR_COUNT Test Value Register (BCM_USE)
2339	***************************************************************************/
2340	/* OOB :: LDSL :: OOB_LDSL_0 [31:24] */
2341	#define BCHP_OOB_LDSL_OOB_LDSL_0_MASK 0xff000000
2342	#define BCHP_OOB_LDSL_OOB_LDSL_0_SHIFT 24
2343
2344	/* OOB :: LDSL :: OOB_LDSL_1 [23:16] */
2345	#define BCHP_OOB_LDSL_OOB_LDSL_1_MASK 0x00ff0000
2346	#define BCHP_OOB_LDSL_OOB_LDSL_1_SHIFT 16
2347
2348	/* OOB :: LDSL :: reserved0 [15:00] */
2349	#define BCHP_OOB_LDSL_reserved0_MASK 0x0000ffff
2350	#define BCHP_OOB_LDSL_reserved0_SHIFT 0
2351
2352	/***************************************************************************
2353	*LDSF - Out-of-Band Load SF_ESF_TOTAL_COUNT Test Value Register (BCM_USE)
2354	***************************************************************************/
2355	/* OOB :: LDSF :: OOB_LDSF_0 [31:24] */
2356	#define BCHP_OOB_LDSF_OOB_LDSF_0_MASK 0xff000000
2357	#define BCHP_OOB_LDSF_OOB_LDSF_0_SHIFT 24
2358
2359	/* OOB :: LDSF :: OOB_LDSF_1 [23:16] */
2360	#define BCHP_OOB_LDSF_OOB_LDSF_1_MASK 0x00ff0000
2361	#define BCHP_OOB_LDSF_OOB_LDSF_1_SHIFT 16
2362
2363	/* OOB :: LDSF :: OOB_LDSF_2 [15:08] */
2364	#define BCHP_OOB_LDSF_OOB_LDSF_2_MASK 0x0000ff00
2365	#define BCHP_OOB_LDSF_OOB_LDSF_2_SHIFT 8
2366
2367	/* OOB :: LDSF :: OOB_LDSF_3 [07:00] */
2368	#define BCHP_OOB_LDSF_OOB_LDSF_3_MASK 0x000000ff
2369	#define BCHP_OOB_LDSF_OOB_LDSF_3_SHIFT 0
2370
2371	/***************************************************************************
2372	*LDRXC - Out-of-Band Load Rx_CRC_ERROR_COUNT Test Value Register (BCM_USE)
2373	***************************************************************************/
2374	/* OOB :: LDRXC :: OOB_LDRXC_0 [31:24] */
2375	#define BCHP_OOB_LDRXC_OOB_LDRXC_0_MASK 0xff000000
2376	#define BCHP_OOB_LDRXC_OOB_LDRXC_0_SHIFT 24
2377
2378	/* OOB :: LDRXC :: OOB_LDRXC_1 [23:16] */
2379	#define BCHP_OOB_LDRXC_OOB_LDRXC_1_MASK 0x00ff0000
2380	#define BCHP_OOB_LDRXC_OOB_LDRXC_1_SHIFT 16
2381
2382	/* OOB :: LDRXC :: reserved0 [15:00] */
2383	#define BCHP_OOB_LDRXC_reserved0_MASK 0x0000ffff
2384	#define BCHP_OOB_LDRXC_reserved0_SHIFT 0
2385
2386	/***************************************************************************
2387	*LDPAR - Out-of-Band Load Mbit PARITY_ERROR_COUNT Test Value Register (BCM_USE)
2388	***************************************************************************/
2389	/* OOB :: LDPAR :: OOB_LDPAR_0 [31:24] */
2390	#define BCHP_OOB_LDPAR_OOB_LDPAR_0_MASK 0xff000000
2391	#define BCHP_OOB_LDPAR_OOB_LDPAR_0_SHIFT 24
2392
2393	/* OOB :: LDPAR :: OOB_LDPAR_1 [23:16] */
2394	#define BCHP_OOB_LDPAR_OOB_LDPAR_1_MASK 0x00ff0000
2395	#define BCHP_OOB_LDPAR_OOB_LDPAR_1_SHIFT 16
2396
2397	/* OOB :: LDPAR :: reserved0 [15:00] */
2398	#define BCHP_OOB_LDPAR_reserved0_MASK 0x0000ffff
2399	#define BCHP_OOB_LDPAR_reserved0_SHIFT 0
2400
2401	/***************************************************************************
2402	*STBERTT - Out-of-Band Store On-Chip BERT Integration Period and Threshold Register
2403	***************************************************************************/
2404	/* OOB :: STBERTT :: OOB_STBERTT_0 [31:24] */
2405	#define BCHP_OOB_STBERTT_OOB_STBERTT_0_MASK 0xff000000
2406	#define BCHP_OOB_STBERTT_OOB_STBERTT_0_SHIFT 24
2407
2408	/* OOB :: STBERTT :: OOB_STBERTT_1 [23:16] */
2409	#define BCHP_OOB_STBERTT_OOB_STBERTT_1_MASK 0x00ff0000
2410	#define BCHP_OOB_STBERTT_OOB_STBERTT_1_SHIFT 16
2411
2412	/* OOB :: STBERTT :: OOB_STBERTT_2 [15:08] */
2413	#define BCHP_OOB_STBERTT_OOB_STBERTT_2_MASK 0x0000ff00
2414	#define BCHP_OOB_STBERTT_OOB_STBERTT_2_SHIFT 8
2415
2416	/* OOB :: STBERTT :: OOB_STBERTT_3 [07:00] */
2417	#define BCHP_OOB_STBERTT_OOB_STBERTT_3_MASK 0x000000ff
2418	#define BCHP_OOB_STBERTT_OOB_STBERTT_3_SHIFT 0
2419
2420	/***************************************************************************
2421	*LDBERTT - Out-of-Band Load On-Chip BERT Integration Period and Threshold Register
2422	***************************************************************************/
2423	/* OOB :: LDBERTT :: OOB_LDBERTT_0 [31:24] */
2424	#define BCHP_OOB_LDBERTT_OOB_LDBERTT_0_MASK 0xff000000
2425	#define BCHP_OOB_LDBERTT_OOB_LDBERTT_0_SHIFT 24
2426
2427	/* OOB :: LDBERTT :: OOB_LDBERTT_1 [23:16] */
2428	#define BCHP_OOB_LDBERTT_OOB_LDBERTT_1_MASK 0x00ff0000
2429	#define BCHP_OOB_LDBERTT_OOB_LDBERTT_1_SHIFT 16
2430
2431	/* OOB :: LDBERTT :: OOB_LDBERTT_2 [15:08] */
2432	#define BCHP_OOB_LDBERTT_OOB_LDBERTT_2_MASK 0x0000ff00
2433	#define BCHP_OOB_LDBERTT_OOB_LDBERTT_2_SHIFT 8
2434
2435	/* OOB :: LDBERTT :: OOB_LDBERTT_3 [07:00] */
2436	#define BCHP_OOB_LDBERTT_OOB_LDBERTT_3_MASK 0x000000ff
2437	#define BCHP_OOB_LDBERTT_OOB_LDBERTT_3_SHIFT 0
2438
2439	/***************************************************************************
2440	*LDBERTC - Out-of-Band Load On-Chip BERT Error Counter Value Register
2441	***************************************************************************/
2442	/* OOB :: LDBERTC :: OOB_LDBERTC_0 [31:24] */
2443	#define BCHP_OOB_LDBERTC_OOB_LDBERTC_0_MASK 0xff000000
2444	#define BCHP_OOB_LDBERTC_OOB_LDBERTC_0_SHIFT 24
2445
2446	/* OOB :: LDBERTC :: OOB_LDBERTC_1 [23:16] */
2447	#define BCHP_OOB_LDBERTC_OOB_LDBERTC_1_MASK 0x00ff0000
2448	#define BCHP_OOB_LDBERTC_OOB_LDBERTC_1_SHIFT 16
2449
2450	/* OOB :: LDBERTC :: OOB_LDBERTC_2 [15:08] */
2451	#define BCHP_OOB_LDBERTC_OOB_LDBERTC_2_MASK 0x0000ff00
2452	#define BCHP_OOB_LDBERTC_OOB_LDBERTC_2_SHIFT 8
2453
2454	/* OOB :: LDBERTC :: OOB_LDBERTC_3 [07:00] */
2455	#define BCHP_OOB_LDBERTC_OOB_LDBERTC_3_MASK 0x000000ff
2456	#define BCHP_OOB_LDBERTC_OOB_LDBERTC_3_SHIFT 0
2457
2458	/***************************************************************************
2459	*STDCC - Out-of-Band Store DC Canceller Integrator Value Register
2460	***************************************************************************/
2461	/* OOB :: STDCC :: OOB_STDCC_0 [31:24] */
2462	#define BCHP_OOB_STDCC_OOB_STDCC_0_MASK 0xff000000
2463	#define BCHP_OOB_STDCC_OOB_STDCC_0_SHIFT 24
2464
2465	/* OOB :: STDCC :: OOB_STDCC_1 [23:16] */
2466	#define BCHP_OOB_STDCC_OOB_STDCC_1_MASK 0x00ff0000
2467	#define BCHP_OOB_STDCC_OOB_STDCC_1_SHIFT 16
2468
2469	/* OOB :: STDCC :: reserved0 [15:00] */
2470	#define BCHP_OOB_STDCC_reserved0_MASK 0x0000ffff
2471	#define BCHP_OOB_STDCC_reserved0_SHIFT 0
2472
2473	/***************************************************************************
2474	*LDDCC - Out-of-Band Load DC Canceller Integrator Value Register
2475	***************************************************************************/
2476	/* OOB :: LDDCC :: OOB_LDDCC_0 [31:24] */
2477	#define BCHP_OOB_LDDCC_OOB_LDDCC_0_MASK 0xff000000
2478	#define BCHP_OOB_LDDCC_OOB_LDDCC_0_SHIFT 24
2479
2480	/* OOB :: LDDCC :: OOB_LDDCC_1 [23:16] */
2481	#define BCHP_OOB_LDDCC_OOB_LDDCC_1_MASK 0x00ff0000
2482	#define BCHP_OOB_LDDCC_OOB_LDDCC_1_SHIFT 16
2483
2484	/* OOB :: LDDCC :: reserved0 [15:00] */
2485	#define BCHP_OOB_LDDCC_reserved0_MASK 0x0000ffff
2486	#define BCHP_OOB_LDDCC_reserved0_SHIFT 0
2487
2488	/***************************************************************************
2489	*STFLA - Out-of-Band Store the 18-bit Lock Accumulator Register
2490	***************************************************************************/
2491	/* OOB :: STFLA :: OOB_STFLA_0 [31:24] */
2492	#define BCHP_OOB_STFLA_OOB_STFLA_0_MASK 0xff000000
2493	#define BCHP_OOB_STFLA_OOB_STFLA_0_SHIFT 24
2494
2495	/* OOB :: STFLA :: OOB_STFLA_1 [23:16] */
2496	#define BCHP_OOB_STFLA_OOB_STFLA_1_MASK 0x00ff0000
2497	#define BCHP_OOB_STFLA_OOB_STFLA_1_SHIFT 16
2498
2499	/* OOB :: STFLA :: OOB_STFLA_2 [15:08] */
2500	#define BCHP_OOB_STFLA_OOB_STFLA_2_MASK 0x0000ff00
2501	#define BCHP_OOB_STFLA_OOB_STFLA_2_SHIFT 8
2502
2503	/* OOB :: STFLA :: reserved0 [07:00] */
2504	#define BCHP_OOB_STFLA_reserved0_MASK 0x000000ff
2505	#define BCHP_OOB_STFLA_reserved0_SHIFT 0
2506
2507	/***************************************************************************
2508	*STFLTH - Out-of-Band Store the 6-bit Lock Indicator Threshold1 and Threshold2 Values Register
2509	***************************************************************************/
2510	/* OOB :: STFLTH :: OOB_STFLTH_0 [31:24] */
2511	#define BCHP_OOB_STFLTH_OOB_STFLTH_0_MASK 0xff000000
2512	#define BCHP_OOB_STFLTH_OOB_STFLTH_0_SHIFT 24
2513	#define BCHP_OOB_STFLTH_OOB_STFLTH_0_DEFAULT 0x0000000e
2514
2515	/* OOB :: STFLTH :: OOB_STFLTH_1 [23:16] */
2516	#define BCHP_OOB_STFLTH_OOB_STFLTH_1_MASK 0x00ff0000
2517	#define BCHP_OOB_STFLTH_OOB_STFLTH_1_SHIFT 16
2518	#define BCHP_OOB_STFLTH_OOB_STFLTH_1_DEFAULT 0x00000006
2519
2520	/* OOB :: STFLTH :: reserved0 [15:00] */
2521	#define BCHP_OOB_STFLTH_reserved0_MASK 0x0000ffff
2522	#define BCHP_OOB_STFLTH_reserved0_SHIFT 0
2523
2524	/***************************************************************************
2525	*LDFLA - Out-of-Band Load the 18-bit Lock Accumulator Register
2526	***************************************************************************/
2527	/* OOB :: LDFLA :: OOB_LDFLA_0 [31:24] */
2528	#define BCHP_OOB_LDFLA_OOB_LDFLA_0_MASK 0xff000000
2529	#define BCHP_OOB_LDFLA_OOB_LDFLA_0_SHIFT 24
2530
2531	/* OOB :: LDFLA :: OOB_LDFLA_1 [23:16] */
2532	#define BCHP_OOB_LDFLA_OOB_LDFLA_1_MASK 0x00ff0000
2533	#define BCHP_OOB_LDFLA_OOB_LDFLA_1_SHIFT 16
2534
2535	/* OOB :: LDFLA :: OOB_LDFLA_2 [15:08] */
2536	#define BCHP_OOB_LDFLA_OOB_LDFLA_2_MASK 0x0000ff00
2537	#define BCHP_OOB_LDFLA_OOB_LDFLA_2_SHIFT 8
2538
2539	/* OOB :: LDFLA :: reserved0 [07:00] */
2540	#define BCHP_OOB_LDFLA_reserved0_MASK 0x000000ff
2541	#define BCHP_OOB_LDFLA_reserved0_SHIFT 0
2542
2543	/***************************************************************************
2544	*IRQSTA2C - Out-of-Band IRQ to CPU Status Register
2545	***************************************************************************/
2546	/* OOB :: IRQSTA2C :: reserved0 [31:06] */
2547	#define BCHP_OOB_IRQSTA2C_reserved0_MASK 0xffffffc0
2548	#define BCHP_OOB_IRQSTA2C_reserved0_SHIFT 6
2549
2550	/* OOB :: IRQSTA2C :: FLI_IS_2C [05:05] */
2551	#define BCHP_OOB_IRQSTA2C_FLI_IS_2C_MASK 0x00000020
2552	#define BCHP_OOB_IRQSTA2C_FLI_IS_2C_SHIFT 5
2553	#define BCHP_OOB_IRQSTA2C_FLI_IS_2C_DEFAULT 0x00000000
2554
2555	/* OOB :: IRQSTA2C :: FLI_LS_2C [04:04] */
2556	#define BCHP_OOB_IRQSTA2C_FLI_LS_2C_MASK 0x00000010
2557	#define BCHP_OOB_IRQSTA2C_FLI_LS_2C_SHIFT 4
2558	#define BCHP_OOB_IRQSTA2C_FLI_LS_2C_DEFAULT 0x00000000
2559
2560	/* OOB :: IRQSTA2C :: FEC_IS_2C [03:03] */
2561	#define BCHP_OOB_IRQSTA2C_FEC_IS_2C_MASK 0x00000008
2562	#define BCHP_OOB_IRQSTA2C_FEC_IS_2C_SHIFT 3
2563	#define BCHP_OOB_IRQSTA2C_FEC_IS_2C_DEFAULT 0x00000000
2564
2565	/* OOB :: IRQSTA2C :: FEC_LS_2C [02:02] */
2566	#define BCHP_OOB_IRQSTA2C_FEC_LS_2C_MASK 0x00000004
2567	#define BCHP_OOB_IRQSTA2C_FEC_LS_2C_SHIFT 2
2568	#define BCHP_OOB_IRQSTA2C_FEC_LS_2C_DEFAULT 0x00000000
2569
2570	/* OOB :: IRQSTA2C :: SNR_IS_2C [01:01] */
2571	#define BCHP_OOB_IRQSTA2C_SNR_IS_2C_MASK 0x00000002
2572	#define BCHP_OOB_IRQSTA2C_SNR_IS_2C_SHIFT 1
2573	#define BCHP_OOB_IRQSTA2C_SNR_IS_2C_DEFAULT 0x00000000
2574
2575	/* OOB :: IRQSTA2C :: SNR_LS_2C [00:00] */
2576	#define BCHP_OOB_IRQSTA2C_SNR_LS_2C_MASK 0x00000001
2577	#define BCHP_OOB_IRQSTA2C_SNR_LS_2C_SHIFT 0
2578	#define BCHP_OOB_IRQSTA2C_SNR_LS_2C_DEFAULT 0x00000000
2579
2580	/***************************************************************************
2581	*IRQSET2C - Out-of-Band Set IRQ to CPU Register
2582	***************************************************************************/
2583	/* OOB :: IRQSET2C :: reserved0 [31:06] */
2584	#define BCHP_OOB_IRQSET2C_reserved0_MASK 0xffffffc0
2585	#define BCHP_OOB_IRQSET2C_reserved0_SHIFT 6
2586
2587	/* OOB :: IRQSET2C :: FLI_IS_S2C [05:05] */
2588	#define BCHP_OOB_IRQSET2C_FLI_IS_S2C_MASK 0x00000020
2589	#define BCHP_OOB_IRQSET2C_FLI_IS_S2C_SHIFT 5
2590	#define BCHP_OOB_IRQSET2C_FLI_IS_S2C_DEFAULT 0x00000000
2591
2592	/* OOB :: IRQSET2C :: FLI_LS_S2C [04:04] */
2593	#define BCHP_OOB_IRQSET2C_FLI_LS_S2C_MASK 0x00000010
2594	#define BCHP_OOB_IRQSET2C_FLI_LS_S2C_SHIFT 4
2595	#define BCHP_OOB_IRQSET2C_FLI_LS_S2C_DEFAULT 0x00000000
2596
2597	/* OOB :: IRQSET2C :: FEC_IS_S2C [03:03] */
2598	#define BCHP_OOB_IRQSET2C_FEC_IS_S2C_MASK 0x00000008
2599	#define BCHP_OOB_IRQSET2C_FEC_IS_S2C_SHIFT 3
2600	#define BCHP_OOB_IRQSET2C_FEC_IS_S2C_DEFAULT 0x00000000
2601
2602	/* OOB :: IRQSET2C :: FEC_LS_S2C [02:02] */
2603	#define BCHP_OOB_IRQSET2C_FEC_LS_S2C_MASK 0x00000004
2604	#define BCHP_OOB_IRQSET2C_FEC_LS_S2C_SHIFT 2
2605	#define BCHP_OOB_IRQSET2C_FEC_LS_S2C_DEFAULT 0x00000000
2606
2607	/* OOB :: IRQSET2C :: SNR_IS_S2C [01:01] */
2608	#define BCHP_OOB_IRQSET2C_SNR_IS_S2C_MASK 0x00000002
2609	#define BCHP_OOB_IRQSET2C_SNR_IS_S2C_SHIFT 1
2610	#define BCHP_OOB_IRQSET2C_SNR_IS_S2C_DEFAULT 0x00000000
2611
2612	/* OOB :: IRQSET2C :: SNR_LS_S2C [00:00] */
2613	#define BCHP_OOB_IRQSET2C_SNR_LS_S2C_MASK 0x00000001
2614	#define BCHP_OOB_IRQSET2C_SNR_LS_S2C_SHIFT 0
2615	#define BCHP_OOB_IRQSET2C_SNR_LS_S2C_DEFAULT 0x00000000
2616
2617	/***************************************************************************
2618	*IRQCLR2C - Out-of-Band CLear IRQ to CPU Register
2619	***************************************************************************/
2620	/* OOB :: IRQCLR2C :: reserved0 [31:06] */
2621	#define BCHP_OOB_IRQCLR2C_reserved0_MASK 0xffffffc0
2622	#define BCHP_OOB_IRQCLR2C_reserved0_SHIFT 6
2623
2624	/* OOB :: IRQCLR2C :: FLI_IS_C2C [05:05] */
2625	#define BCHP_OOB_IRQCLR2C_FLI_IS_C2C_MASK 0x00000020
2626	#define BCHP_OOB_IRQCLR2C_FLI_IS_C2C_SHIFT 5
2627	#define BCHP_OOB_IRQCLR2C_FLI_IS_C2C_DEFAULT 0x00000000
2628
2629	/* OOB :: IRQCLR2C :: FLI_LS_C2C [04:04] */
2630	#define BCHP_OOB_IRQCLR2C_FLI_LS_C2C_MASK 0x00000010
2631	#define BCHP_OOB_IRQCLR2C_FLI_LS_C2C_SHIFT 4
2632	#define BCHP_OOB_IRQCLR2C_FLI_LS_C2C_DEFAULT 0x00000000
2633
2634	/* OOB :: IRQCLR2C :: FEC_IS_C2C [03:03] */
2635	#define BCHP_OOB_IRQCLR2C_FEC_IS_C2C_MASK 0x00000008
2636	#define BCHP_OOB_IRQCLR2C_FEC_IS_C2C_SHIFT 3
2637	#define BCHP_OOB_IRQCLR2C_FEC_IS_C2C_DEFAULT 0x00000000
2638
2639	/* OOB :: IRQCLR2C :: FEC_LS_C2C [02:02] */
2640	#define BCHP_OOB_IRQCLR2C_FEC_LS_C2C_MASK 0x00000004
2641	#define BCHP_OOB_IRQCLR2C_FEC_LS_C2C_SHIFT 2
2642	#define BCHP_OOB_IRQCLR2C_FEC_LS_C2C_DEFAULT 0x00000000
2643
2644	/* OOB :: IRQCLR2C :: SNR_IS_C2C [01:01] */
2645	#define BCHP_OOB_IRQCLR2C_SNR_IS_C2C_MASK 0x00000002
2646	#define BCHP_OOB_IRQCLR2C_SNR_IS_C2C_SHIFT 1
2647	#define BCHP_OOB_IRQCLR2C_SNR_IS_C2C_DEFAULT 0x00000000
2648
2649	/* OOB :: IRQCLR2C :: SNR_LS_C2C [00:00] */
2650	#define BCHP_OOB_IRQCLR2C_SNR_LS_C2C_MASK 0x00000001
2651	#define BCHP_OOB_IRQCLR2C_SNR_LS_C2C_SHIFT 0
2652	#define BCHP_OOB_IRQCLR2C_SNR_LS_C2C_DEFAULT 0x00000000
2653
2654	/***************************************************************************
2655	*IRQMSK2C - Out-of-Band IRQ to CPU Mask Register
2656	***************************************************************************/
2657	/* OOB :: IRQMSK2C :: reserved0 [31:06] */
2658	#define BCHP_OOB_IRQMSK2C_reserved0_MASK 0xffffffc0
2659	#define BCHP_OOB_IRQMSK2C_reserved0_SHIFT 6
2660
2661	/* OOB :: IRQMSK2C :: FLI_IS_M2C [05:05] */
2662	#define BCHP_OOB_IRQMSK2C_FLI_IS_M2C_MASK 0x00000020
2663	#define BCHP_OOB_IRQMSK2C_FLI_IS_M2C_SHIFT 5
2664	#define BCHP_OOB_IRQMSK2C_FLI_IS_M2C_DEFAULT 0x00000001
2665
2666	/* OOB :: IRQMSK2C :: FLI_LS_M2C [04:04] */
2667	#define BCHP_OOB_IRQMSK2C_FLI_LS_M2C_MASK 0x00000010
2668	#define BCHP_OOB_IRQMSK2C_FLI_LS_M2C_SHIFT 4
2669	#define BCHP_OOB_IRQMSK2C_FLI_LS_M2C_DEFAULT 0x00000001
2670
2671	/* OOB :: IRQMSK2C :: FEC_IS_M2C [03:03] */
2672	#define BCHP_OOB_IRQMSK2C_FEC_IS_M2C_MASK 0x00000008
2673	#define BCHP_OOB_IRQMSK2C_FEC_IS_M2C_SHIFT 3
2674	#define BCHP_OOB_IRQMSK2C_FEC_IS_M2C_DEFAULT 0x00000001
2675
2676	/* OOB :: IRQMSK2C :: FEC_LS_M2C [02:02] */
2677	#define BCHP_OOB_IRQMSK2C_FEC_LS_M2C_MASK 0x00000004
2678	#define BCHP_OOB_IRQMSK2C_FEC_LS_M2C_SHIFT 2
2679	#define BCHP_OOB_IRQMSK2C_FEC_LS_M2C_DEFAULT 0x00000001
2680
2681	/* OOB :: IRQMSK2C :: SNR_IS_M2C [01:01] */
2682	#define BCHP_OOB_IRQMSK2C_SNR_IS_M2C_MASK 0x00000002
2683	#define BCHP_OOB_IRQMSK2C_SNR_IS_M2C_SHIFT 1
2684	#define BCHP_OOB_IRQMSK2C_SNR_IS_M2C_DEFAULT 0x00000001
2685
2686	/* OOB :: IRQMSK2C :: SNR_LS_M2C [00:00] */
2687	#define BCHP_OOB_IRQMSK2C_SNR_LS_M2C_MASK 0x00000001
2688	#define BCHP_OOB_IRQMSK2C_SNR_LS_M2C_SHIFT 0
2689	#define BCHP_OOB_IRQMSK2C_SNR_LS_M2C_DEFAULT 0x00000001
2690
2691	/***************************************************************************
2692	*IRQMST2C - Out-of-Band IRQ to CPU Mask Set Register
2693	***************************************************************************/
2694	/* OOB :: IRQMST2C :: reserved0 [31:06] */
2695	#define BCHP_OOB_IRQMST2C_reserved0_MASK 0xffffffc0
2696	#define BCHP_OOB_IRQMST2C_reserved0_SHIFT 6
2697
2698	/* OOB :: IRQMST2C :: FLI_IS_MS2C [05:05] */
2699	#define BCHP_OOB_IRQMST2C_FLI_IS_MS2C_MASK 0x00000020
2700	#define BCHP_OOB_IRQMST2C_FLI_IS_MS2C_SHIFT 5
2701	#define BCHP_OOB_IRQMST2C_FLI_IS_MS2C_DEFAULT 0x00000000
2702
2703	/* OOB :: IRQMST2C :: FLI_LS_MS2C [04:04] */
2704	#define BCHP_OOB_IRQMST2C_FLI_LS_MS2C_MASK 0x00000010
2705	#define BCHP_OOB_IRQMST2C_FLI_LS_MS2C_SHIFT 4
2706	#define BCHP_OOB_IRQMST2C_FLI_LS_MS2C_DEFAULT 0x00000000
2707
2708	/* OOB :: IRQMST2C :: FEC_IS_MS2C [03:03] */
2709	#define BCHP_OOB_IRQMST2C_FEC_IS_MS2C_MASK 0x00000008
2710	#define BCHP_OOB_IRQMST2C_FEC_IS_MS2C_SHIFT 3
2711	#define BCHP_OOB_IRQMST2C_FEC_IS_MS2C_DEFAULT 0x00000000
2712
2713	/* OOB :: IRQMST2C :: FEC_LS_MS2C [02:02] */
2714	#define BCHP_OOB_IRQMST2C_FEC_LS_MS2C_MASK 0x00000004
2715	#define BCHP_OOB_IRQMST2C_FEC_LS_MS2C_SHIFT 2
2716	#define BCHP_OOB_IRQMST2C_FEC_LS_MS2C_DEFAULT 0x00000000
2717
2718	/* OOB :: IRQMST2C :: SNR_IS_MS2C [01:01] */
2719	#define BCHP_OOB_IRQMST2C_SNR_IS_MS2C_MASK 0x00000002
2720	#define BCHP_OOB_IRQMST2C_SNR_IS_MS2C_SHIFT 1
2721	#define BCHP_OOB_IRQMST2C_SNR_IS_MS2C_DEFAULT 0x00000000
2722
2723	/* OOB :: IRQMST2C :: SNR_LS_MS2C [00:00] */
2724	#define BCHP_OOB_IRQMST2C_SNR_LS_MS2C_MASK 0x00000001
2725	#define BCHP_OOB_IRQMST2C_SNR_LS_MS2C_SHIFT 0
2726	#define BCHP_OOB_IRQMST2C_SNR_LS_MS2C_DEFAULT 0x00000000
2727
2728	/***************************************************************************
2729	*IRQMCL2C - Out-of-Band IRQ to CPU Mask Clear Register
2730	***************************************************************************/
2731	/* OOB :: IRQMCL2C :: reserved0 [31:06] */
2732	#define BCHP_OOB_IRQMCL2C_reserved0_MASK 0xffffffc0
2733	#define BCHP_OOB_IRQMCL2C_reserved0_SHIFT 6
2734
2735	/* OOB :: IRQMCL2C :: FLI_IS_MC2C [05:05] */
2736	#define BCHP_OOB_IRQMCL2C_FLI_IS_MC2C_MASK 0x00000020
2737	#define BCHP_OOB_IRQMCL2C_FLI_IS_MC2C_SHIFT 5
2738	#define BCHP_OOB_IRQMCL2C_FLI_IS_MC2C_DEFAULT 0x00000000
2739
2740	/* OOB :: IRQMCL2C :: FLI_LS_MC2C [04:04] */
2741	#define BCHP_OOB_IRQMCL2C_FLI_LS_MC2C_MASK 0x00000010
2742	#define BCHP_OOB_IRQMCL2C_FLI_LS_MC2C_SHIFT 4
2743	#define BCHP_OOB_IRQMCL2C_FLI_LS_MC2C_DEFAULT 0x00000000
2744
2745	/* OOB :: IRQMCL2C :: FEC_IS_MC2C [03:03] */
2746	#define BCHP_OOB_IRQMCL2C_FEC_IS_MC2C_MASK 0x00000008
2747	#define BCHP_OOB_IRQMCL2C_FEC_IS_MC2C_SHIFT 3
2748	#define BCHP_OOB_IRQMCL2C_FEC_IS_MC2C_DEFAULT 0x00000000
2749
2750	/* OOB :: IRQMCL2C :: FEC_LS_MC2C [02:02] */
2751	#define BCHP_OOB_IRQMCL2C_FEC_LS_MC2C_MASK 0x00000004
2752	#define BCHP_OOB_IRQMCL2C_FEC_LS_MC2C_SHIFT 2
2753	#define BCHP_OOB_IRQMCL2C_FEC_LS_MC2C_DEFAULT 0x00000000
2754
2755	/* OOB :: IRQMCL2C :: SNR_IS_MC2C [01:01] */
2756	#define BCHP_OOB_IRQMCL2C_SNR_IS_MC2C_MASK 0x00000002
2757	#define BCHP_OOB_IRQMCL2C_SNR_IS_MC2C_SHIFT 1
2758	#define BCHP_OOB_IRQMCL2C_SNR_IS_MC2C_DEFAULT 0x00000000
2759
2760	/* OOB :: IRQMCL2C :: SNR_LS_MC2C [00:00] */
2761	#define BCHP_OOB_IRQMCL2C_SNR_LS_MC2C_MASK 0x00000001
2762	#define BCHP_OOB_IRQMCL2C_SNR_LS_MC2C_SHIFT 0
2763	#define BCHP_OOB_IRQMCL2C_SNR_LS_MC2C_DEFAULT 0x00000000
2764
2765	/***************************************************************************
2766	*IRQSTA2P - Out-of-Band IRQ to PCI Status Register
2767	***************************************************************************/
2768	/* OOB :: IRQSTA2P :: reserved0 [31:06] */
2769	#define BCHP_OOB_IRQSTA2P_reserved0_MASK 0xffffffc0
2770	#define BCHP_OOB_IRQSTA2P_reserved0_SHIFT 6
2771
2772	/* OOB :: IRQSTA2P :: FLI_IS_2P [05:05] */
2773	#define BCHP_OOB_IRQSTA2P_FLI_IS_2P_MASK 0x00000020
2774	#define BCHP_OOB_IRQSTA2P_FLI_IS_2P_SHIFT 5
2775	#define BCHP_OOB_IRQSTA2P_FLI_IS_2P_DEFAULT 0x00000000
2776
2777	/* OOB :: IRQSTA2P :: FLI_LS_2P [04:04] */
2778	#define BCHP_OOB_IRQSTA2P_FLI_LS_2P_MASK 0x00000010
2779	#define BCHP_OOB_IRQSTA2P_FLI_LS_2P_SHIFT 4
2780	#define BCHP_OOB_IRQSTA2P_FLI_LS_2P_DEFAULT 0x00000000
2781
2782	/* OOB :: IRQSTA2P :: FEC_IS_2P [03:03] */
2783	#define BCHP_OOB_IRQSTA2P_FEC_IS_2P_MASK 0x00000008
2784	#define BCHP_OOB_IRQSTA2P_FEC_IS_2P_SHIFT 3
2785	#define BCHP_OOB_IRQSTA2P_FEC_IS_2P_DEFAULT 0x00000000
2786
2787	/* OOB :: IRQSTA2P :: FEC_LS_2P [02:02] */
2788	#define BCHP_OOB_IRQSTA2P_FEC_LS_2P_MASK 0x00000004
2789	#define BCHP_OOB_IRQSTA2P_FEC_LS_2P_SHIFT 2
2790	#define BCHP_OOB_IRQSTA2P_FEC_LS_2P_DEFAULT 0x00000000
2791
2792	/* OOB :: IRQSTA2P :: SNR_IS_2P [01:01] */
2793	#define BCHP_OOB_IRQSTA2P_SNR_IS_2P_MASK 0x00000002
2794	#define BCHP_OOB_IRQSTA2P_SNR_IS_2P_SHIFT 1
2795	#define BCHP_OOB_IRQSTA2P_SNR_IS_2P_DEFAULT 0x00000000
2796
2797	/* OOB :: IRQSTA2P :: SNR_LS_2P [00:00] */
2798	#define BCHP_OOB_IRQSTA2P_SNR_LS_2P_MASK 0x00000001
2799	#define BCHP_OOB_IRQSTA2P_SNR_LS_2P_SHIFT 0
2800	#define BCHP_OOB_IRQSTA2P_SNR_LS_2P_DEFAULT 0x00000000
2801
2802	/***************************************************************************
2803	*IRQSET2P - Out-of-Band Set IRQ to PCI Register
2804	***************************************************************************/
2805	/* OOB :: IRQSET2P :: reserved0 [31:06] */
2806	#define BCHP_OOB_IRQSET2P_reserved0_MASK 0xffffffc0
2807	#define BCHP_OOB_IRQSET2P_reserved0_SHIFT 6
2808
2809	/* OOB :: IRQSET2P :: FLI_IS_S2P [05:05] */
2810	#define BCHP_OOB_IRQSET2P_FLI_IS_S2P_MASK 0x00000020
2811	#define BCHP_OOB_IRQSET2P_FLI_IS_S2P_SHIFT 5
2812	#define BCHP_OOB_IRQSET2P_FLI_IS_S2P_DEFAULT 0x00000000
2813
2814	/* OOB :: IRQSET2P :: FLI_LS_S2P [04:04] */
2815	#define BCHP_OOB_IRQSET2P_FLI_LS_S2P_MASK 0x00000010
2816	#define BCHP_OOB_IRQSET2P_FLI_LS_S2P_SHIFT 4
2817	#define BCHP_OOB_IRQSET2P_FLI_LS_S2P_DEFAULT 0x00000000
2818
2819	/* OOB :: IRQSET2P :: FEC_IS_S2P [03:03] */
2820	#define BCHP_OOB_IRQSET2P_FEC_IS_S2P_MASK 0x00000008
2821	#define BCHP_OOB_IRQSET2P_FEC_IS_S2P_SHIFT 3
2822	#define BCHP_OOB_IRQSET2P_FEC_IS_S2P_DEFAULT 0x00000000
2823
2824	/* OOB :: IRQSET2P :: FEC_LS_S2P [02:02] */
2825	#define BCHP_OOB_IRQSET2P_FEC_LS_S2P_MASK 0x00000004
2826	#define BCHP_OOB_IRQSET2P_FEC_LS_S2P_SHIFT 2
2827	#define BCHP_OOB_IRQSET2P_FEC_LS_S2P_DEFAULT 0x00000000
2828
2829	/* OOB :: IRQSET2P :: SNR_IS_S2P [01:01] */
2830	#define BCHP_OOB_IRQSET2P_SNR_IS_S2P_MASK 0x00000002
2831	#define BCHP_OOB_IRQSET2P_SNR_IS_S2P_SHIFT 1
2832	#define BCHP_OOB_IRQSET2P_SNR_IS_S2P_DEFAULT 0x00000000
2833
2834	/* OOB :: IRQSET2P :: SNR_LS_S2P [00:00] */
2835	#define BCHP_OOB_IRQSET2P_SNR_LS_S2P_MASK 0x00000001
2836	#define BCHP_OOB_IRQSET2P_SNR_LS_S2P_SHIFT 0
2837	#define BCHP_OOB_IRQSET2P_SNR_LS_S2P_DEFAULT 0x00000000
2838
2839	/***************************************************************************
2840	*IRQCLR2P - Out-of-Band CLear IRQ to PCI Register
2841	***************************************************************************/
2842	/* OOB :: IRQCLR2P :: reserved0 [31:06] */
2843	#define BCHP_OOB_IRQCLR2P_reserved0_MASK 0xffffffc0
2844	#define BCHP_OOB_IRQCLR2P_reserved0_SHIFT 6
2845
2846	/* OOB :: IRQCLR2P :: FLI_IS_C2P [05:05] */
2847	#define BCHP_OOB_IRQCLR2P_FLI_IS_C2P_MASK 0x00000020
2848	#define BCHP_OOB_IRQCLR2P_FLI_IS_C2P_SHIFT 5
2849	#define BCHP_OOB_IRQCLR2P_FLI_IS_C2P_DEFAULT 0x00000000
2850
2851	/* OOB :: IRQCLR2P :: FLI_LS_C2P [04:04] */
2852	#define BCHP_OOB_IRQCLR2P_FLI_LS_C2P_MASK 0x00000010
2853	#define BCHP_OOB_IRQCLR2P_FLI_LS_C2P_SHIFT 4
2854	#define BCHP_OOB_IRQCLR2P_FLI_LS_C2P_DEFAULT 0x00000000
2855
2856	/* OOB :: IRQCLR2P :: FEC_IS_C2P [03:03] */
2857	#define BCHP_OOB_IRQCLR2P_FEC_IS_C2P_MASK 0x00000008
2858	#define BCHP_OOB_IRQCLR2P_FEC_IS_C2P_SHIFT 3
2859	#define BCHP_OOB_IRQCLR2P_FEC_IS_C2P_DEFAULT 0x00000000
2860
2861	/* OOB :: IRQCLR2P :: FEC_LS_C2P [02:02] */
2862	#define BCHP_OOB_IRQCLR2P_FEC_LS_C2P_MASK 0x00000004
2863	#define BCHP_OOB_IRQCLR2P_FEC_LS_C2P_SHIFT 2
2864	#define BCHP_OOB_IRQCLR2P_FEC_LS_C2P_DEFAULT 0x00000000
2865
2866	/* OOB :: IRQCLR2P :: SNR_IS_C2P [01:01] */
2867	#define BCHP_OOB_IRQCLR2P_SNR_IS_C2P_MASK 0x00000002
2868	#define BCHP_OOB_IRQCLR2P_SNR_IS_C2P_SHIFT 1
2869	#define BCHP_OOB_IRQCLR2P_SNR_IS_C2P_DEFAULT 0x00000000
2870
2871	/* OOB :: IRQCLR2P :: SNR_LS_C2P [00:00] */
2872	#define BCHP_OOB_IRQCLR2P_SNR_LS_C2P_MASK 0x00000001
2873	#define BCHP_OOB_IRQCLR2P_SNR_LS_C2P_SHIFT 0
2874	#define BCHP_OOB_IRQCLR2P_SNR_LS_C2P_DEFAULT 0x00000000
2875
2876	/***************************************************************************
2877	*IRQMSK2P - Out-of-Band IRQ to PCI Mask Register
2878	***************************************************************************/
2879	/* OOB :: IRQMSK2P :: reserved0 [31:06] */
2880	#define BCHP_OOB_IRQMSK2P_reserved0_MASK 0xffffffc0
2881	#define BCHP_OOB_IRQMSK2P_reserved0_SHIFT 6
2882
2883	/* OOB :: IRQMSK2P :: FLI_IS_M2P [05:05] */
2884	#define BCHP_OOB_IRQMSK2P_FLI_IS_M2P_MASK 0x00000020
2885	#define BCHP_OOB_IRQMSK2P_FLI_IS_M2P_SHIFT 5
2886	#define BCHP_OOB_IRQMSK2P_FLI_IS_M2P_DEFAULT 0x00000001
2887
2888	/* OOB :: IRQMSK2P :: FLI_LS_M2P [04:04] */
2889	#define BCHP_OOB_IRQMSK2P_FLI_LS_M2P_MASK 0x00000010
2890	#define BCHP_OOB_IRQMSK2P_FLI_LS_M2P_SHIFT 4
2891	#define BCHP_OOB_IRQMSK2P_FLI_LS_M2P_DEFAULT 0x00000001
2892
2893	/* OOB :: IRQMSK2P :: FEC_IS_M2P [03:03] */
2894	#define BCHP_OOB_IRQMSK2P_FEC_IS_M2P_MASK 0x00000008
2895	#define BCHP_OOB_IRQMSK2P_FEC_IS_M2P_SHIFT 3
2896	#define BCHP_OOB_IRQMSK2P_FEC_IS_M2P_DEFAULT 0x00000001
2897
2898	/* OOB :: IRQMSK2P :: FEC_LS_M2P [02:02] */
2899	#define BCHP_OOB_IRQMSK2P_FEC_LS_M2P_MASK 0x00000004
2900	#define BCHP_OOB_IRQMSK2P_FEC_LS_M2P_SHIFT 2
2901	#define BCHP_OOB_IRQMSK2P_FEC_LS_M2P_DEFAULT 0x00000001
2902
2903	/* OOB :: IRQMSK2P :: SNR_IS_M2P [01:01] */
2904	#define BCHP_OOB_IRQMSK2P_SNR_IS_M2P_MASK 0x00000002
2905	#define BCHP_OOB_IRQMSK2P_SNR_IS_M2P_SHIFT 1
2906	#define BCHP_OOB_IRQMSK2P_SNR_IS_M2P_DEFAULT 0x00000001
2907
2908	/* OOB :: IRQMSK2P :: SNR_LS_M2P [00:00] */
2909	#define BCHP_OOB_IRQMSK2P_SNR_LS_M2P_MASK 0x00000001
2910	#define BCHP_OOB_IRQMSK2P_SNR_LS_M2P_SHIFT 0
2911	#define BCHP_OOB_IRQMSK2P_SNR_LS_M2P_DEFAULT 0x00000001
2912
2913	/***************************************************************************
2914	*IRQMST2P - Out-of-Band IRQ to PCI Mask Set Register
2915	***************************************************************************/
2916	/* OOB :: IRQMST2P :: reserved0 [31:06] */
2917	#define BCHP_OOB_IRQMST2P_reserved0_MASK 0xffffffc0
2918	#define BCHP_OOB_IRQMST2P_reserved0_SHIFT 6
2919
2920	/* OOB :: IRQMST2P :: FLI_IS_MS2P [05:05] */
2921	#define BCHP_OOB_IRQMST2P_FLI_IS_MS2P_MASK 0x00000020
2922	#define BCHP_OOB_IRQMST2P_FLI_IS_MS2P_SHIFT 5
2923	#define BCHP_OOB_IRQMST2P_FLI_IS_MS2P_DEFAULT 0x00000000
2924
2925	/* OOB :: IRQMST2P :: FLI_LS_MS2P [04:04] */
2926	#define BCHP_OOB_IRQMST2P_FLI_LS_MS2P_MASK 0x00000010
2927	#define BCHP_OOB_IRQMST2P_FLI_LS_MS2P_SHIFT 4
2928	#define BCHP_OOB_IRQMST2P_FLI_LS_MS2P_DEFAULT 0x00000000
2929
2930	/* OOB :: IRQMST2P :: FEC_IS_MS2P [03:03] */
2931	#define BCHP_OOB_IRQMST2P_FEC_IS_MS2P_MASK 0x00000008
2932	#define BCHP_OOB_IRQMST2P_FEC_IS_MS2P_SHIFT 3
2933	#define BCHP_OOB_IRQMST2P_FEC_IS_MS2P_DEFAULT 0x00000000
2934
2935	/* OOB :: IRQMST2P :: FEC_LS_MS2P [02:02] */
2936	#define BCHP_OOB_IRQMST2P_FEC_LS_MS2P_MASK 0x00000004
2937	#define BCHP_OOB_IRQMST2P_FEC_LS_MS2P_SHIFT 2
2938	#define BCHP_OOB_IRQMST2P_FEC_LS_MS2P_DEFAULT 0x00000000
2939
2940	/* OOB :: IRQMST2P :: SNR_IS_MS2P [01:01] */
2941	#define BCHP_OOB_IRQMST2P_SNR_IS_MS2P_MASK 0x00000002
2942	#define BCHP_OOB_IRQMST2P_SNR_IS_MS2P_SHIFT 1
2943	#define BCHP_OOB_IRQMST2P_SNR_IS_MS2P_DEFAULT 0x00000000
2944
2945	/* OOB :: IRQMST2P :: SNR_LS_MS2P [00:00] */
2946	#define BCHP_OOB_IRQMST2P_SNR_LS_MS2P_MASK 0x00000001
2947	#define BCHP_OOB_IRQMST2P_SNR_LS_MS2P_SHIFT 0
2948	#define BCHP_OOB_IRQMST2P_SNR_LS_MS2P_DEFAULT 0x00000000
2949
2950	/***************************************************************************
2951	*IRQMCL2P - Out-of-Band IRQ to PCI Mask Clear Register
2952	***************************************************************************/
2953	/* OOB :: IRQMCL2P :: reserved0 [31:06] */
2954	#define BCHP_OOB_IRQMCL2P_reserved0_MASK 0xffffffc0
2955	#define BCHP_OOB_IRQMCL2P_reserved0_SHIFT 6
2956
2957	/* OOB :: IRQMCL2P :: FLI_IS_MC2P [05:05] */
2958	#define BCHP_OOB_IRQMCL2P_FLI_IS_MC2P_MASK 0x00000020
2959	#define BCHP_OOB_IRQMCL2P_FLI_IS_MC2P_SHIFT 5
2960	#define BCHP_OOB_IRQMCL2P_FLI_IS_MC2P_DEFAULT 0x00000000
2961
2962	/* OOB :: IRQMCL2P :: FLI_LS_MC2P [04:04] */
2963	#define BCHP_OOB_IRQMCL2P_FLI_LS_MC2P_MASK 0x00000010
2964	#define BCHP_OOB_IRQMCL2P_FLI_LS_MC2P_SHIFT 4
2965	#define BCHP_OOB_IRQMCL2P_FLI_LS_MC2P_DEFAULT 0x00000000
2966
2967	/* OOB :: IRQMCL2P :: FEC_IS_MC2P [03:03] */
2968	#define BCHP_OOB_IRQMCL2P_FEC_IS_MC2P_MASK 0x00000008
2969	#define BCHP_OOB_IRQMCL2P_FEC_IS_MC2P_SHIFT 3
2970	#define BCHP_OOB_IRQMCL2P_FEC_IS_MC2P_DEFAULT 0x00000000
2971
2972	/* OOB :: IRQMCL2P :: FEC_LS_MC2P [02:02] */
2973	#define BCHP_OOB_IRQMCL2P_FEC_LS_MC2P_MASK 0x00000004
2974	#define BCHP_OOB_IRQMCL2P_FEC_LS_MC2P_SHIFT 2
2975	#define BCHP_OOB_IRQMCL2P_FEC_LS_MC2P_DEFAULT 0x00000000
2976
2977	/* OOB :: IRQMCL2P :: SNR_IS_MC2P [01:01] */
2978	#define BCHP_OOB_IRQMCL2P_SNR_IS_MC2P_MASK 0x00000002
2979	#define BCHP_OOB_IRQMCL2P_SNR_IS_MC2P_SHIFT 1
2980	#define BCHP_OOB_IRQMCL2P_SNR_IS_MC2P_DEFAULT 0x00000000
2981
2982	/* OOB :: IRQMCL2P :: SNR_LS_MC2P [00:00] */
2983	#define BCHP_OOB_IRQMCL2P_SNR_LS_MC2P_MASK 0x00000001
2984	#define BCHP_OOB_IRQMCL2P_SNR_LS_MC2P_SHIFT 0
2985	#define BCHP_OOB_IRQMCL2P_SNR_LS_MC2P_DEFAULT 0x00000000
2986
2987	/***************************************************************************
2988	*TEST_OUTPUT_CTRL - Out-of-Band output control for testing
2989	***************************************************************************/
2990	/* OOB :: TEST_OUTPUT_CTRL :: reserved0 [31:07] */
2991	#define BCHP_OOB_TEST_OUTPUT_CTRL_reserved0_MASK 0xffffff80
2992	#define BCHP_OOB_TEST_OUTPUT_CTRL_reserved0_SHIFT 7
2993
2994	/* OOB :: TEST_OUTPUT_CTRL :: FORCE_PATTERN [06:05] */
2995	#define BCHP_OOB_TEST_OUTPUT_CTRL_FORCE_PATTERN_MASK 0x00000060
2996	#define BCHP_OOB_TEST_OUTPUT_CTRL_FORCE_PATTERN_SHIFT 5
2997	#define BCHP_OOB_TEST_OUTPUT_CTRL_FORCE_PATTERN_DEFAULT 0x00000000
2998
2999	/* OOB :: TEST_OUTPUT_CTRL :: FORCE_TPOUT [04:04] */
3000	#define BCHP_OOB_TEST_OUTPUT_CTRL_FORCE_TPOUT_MASK 0x00000010
3001	#define BCHP_OOB_TEST_OUTPUT_CTRL_FORCE_TPOUT_SHIFT 4
3002	#define BCHP_OOB_TEST_OUTPUT_CTRL_FORCE_TPOUT_DEFAULT 0x00000000
3003
3004	/* OOB :: TEST_OUTPUT_CTRL :: FORCE_FCW [03:03] */
3005	#define BCHP_OOB_TEST_OUTPUT_CTRL_FORCE_FCW_MASK 0x00000008
3006	#define BCHP_OOB_TEST_OUTPUT_CTRL_FORCE_FCW_SHIFT 3
3007	#define BCHP_OOB_TEST_OUTPUT_CTRL_FORCE_FCW_DEFAULT 0x00000000
3008
3009	/* OOB :: TEST_OUTPUT_CTRL :: FORCE_TO_XPT [02:02] */
3010	#define BCHP_OOB_TEST_OUTPUT_CTRL_FORCE_TO_XPT_MASK 0x00000004
3011	#define BCHP_OOB_TEST_OUTPUT_CTRL_FORCE_TO_XPT_SHIFT 2
3012	#define BCHP_OOB_TEST_OUTPUT_CTRL_FORCE_TO_XPT_DEFAULT 0x00000000
3013
3014	/* OOB :: TEST_OUTPUT_CTRL :: FORCE_TO_DAV [01:01] */
3015	#define BCHP_OOB_TEST_OUTPUT_CTRL_FORCE_TO_DAV_MASK 0x00000002
3016	#define BCHP_OOB_TEST_OUTPUT_CTRL_FORCE_TO_DAV_SHIFT 1
3017	#define BCHP_OOB_TEST_OUTPUT_CTRL_FORCE_TO_DAV_DEFAULT 0x00000000
3018
3019	/* OOB :: TEST_OUTPUT_CTRL :: FORCE_TO_PIN [00:00] */
3020	#define BCHP_OOB_TEST_OUTPUT_CTRL_FORCE_TO_PIN_MASK 0x00000001
3021	#define BCHP_OOB_TEST_OUTPUT_CTRL_FORCE_TO_PIN_SHIFT 0
3022	#define BCHP_OOB_TEST_OUTPUT_CTRL_FORCE_TO_PIN_DEFAULT 0x00000000
3023
3024	/***************************************************************************
3025	*TEST_FEC_OUT - Out-of-Band FEC output value for testing
3026	***************************************************************************/
3027	/* OOB :: TEST_FEC_OUT :: reserved0 [31:29] */
3028	#define BCHP_OOB_TEST_FEC_OUT_reserved0_MASK 0xe0000000
3029	#define BCHP_OOB_TEST_FEC_OUT_reserved0_SHIFT 29
3030
3031	/* OOB :: TEST_FEC_OUT :: PDAT_TO_XPT [28:21] */
3032	#define BCHP_OOB_TEST_FEC_OUT_PDAT_TO_XPT_MASK 0x1fe00000
3033	#define BCHP_OOB_TEST_FEC_OUT_PDAT_TO_XPT_SHIFT 21
3034	#define BCHP_OOB_TEST_FEC_OUT_PDAT_TO_XPT_DEFAULT 0x00000000
3035
3036	/* OOB :: TEST_FEC_OUT :: ERR_TO_XPT [20:20] */
3037	#define BCHP_OOB_TEST_FEC_OUT_ERR_TO_XPT_MASK 0x00100000
3038	#define BCHP_OOB_TEST_FEC_OUT_ERR_TO_XPT_SHIFT 20
3039	#define BCHP_OOB_TEST_FEC_OUT_ERR_TO_XPT_DEFAULT 0x00000000
3040
3041	/* OOB :: TEST_FEC_OUT :: VAL_TO_XPT [19:19] */
3042	#define BCHP_OOB_TEST_FEC_OUT_VAL_TO_XPT_MASK 0x00080000
3043	#define BCHP_OOB_TEST_FEC_OUT_VAL_TO_XPT_SHIFT 19
3044	#define BCHP_OOB_TEST_FEC_OUT_VAL_TO_XPT_DEFAULT 0x00000000
3045
3046	/* OOB :: TEST_FEC_OUT :: SYN_TO_XPT [18:18] */
3047	#define BCHP_OOB_TEST_FEC_OUT_SYN_TO_XPT_MASK 0x00040000
3048	#define BCHP_OOB_TEST_FEC_OUT_SYN_TO_XPT_SHIFT 18
3049	#define BCHP_OOB_TEST_FEC_OUT_SYN_TO_XPT_DEFAULT 0x00000000
3050
3051	/* OOB :: TEST_FEC_OUT :: SDAT_TO_XPT [17:17] */
3052	#define BCHP_OOB_TEST_FEC_OUT_SDAT_TO_XPT_MASK 0x00020000
3053	#define BCHP_OOB_TEST_FEC_OUT_SDAT_TO_XPT_SHIFT 17
3054	#define BCHP_OOB_TEST_FEC_OUT_SDAT_TO_XPT_DEFAULT 0x00000000
3055
3056	/* OOB :: TEST_FEC_OUT :: CLK_TO_XPT [16:16] */
3057	#define BCHP_OOB_TEST_FEC_OUT_CLK_TO_XPT_MASK 0x00010000
3058	#define BCHP_OOB_TEST_FEC_OUT_CLK_TO_XPT_SHIFT 16
3059	#define BCHP_OOB_TEST_FEC_OUT_CLK_TO_XPT_DEFAULT 0x00000000
3060
3061	/* OOB :: TEST_FEC_OUT :: reserved1 [15:13] */
3062	#define BCHP_OOB_TEST_FEC_OUT_reserved1_MASK 0x0000e000
3063	#define BCHP_OOB_TEST_FEC_OUT_reserved1_SHIFT 13
3064
3065	/* OOB :: TEST_FEC_OUT :: RXDTYP_TO_DAV [12:10] */
3066	#define BCHP_OOB_TEST_FEC_OUT_RXDTYP_TO_DAV_MASK 0x00001c00
3067	#define BCHP_OOB_TEST_FEC_OUT_RXDTYP_TO_DAV_SHIFT 10
3068	#define BCHP_OOB_TEST_FEC_OUT_RXDTYP_TO_DAV_DEFAULT 0x00000000
3069
3070	/* OOB :: TEST_FEC_OUT :: RXLOF_TO_DAV [09:09] */
3071	#define BCHP_OOB_TEST_FEC_OUT_RXLOF_TO_DAV_MASK 0x00000200
3072	#define BCHP_OOB_TEST_FEC_OUT_RXLOF_TO_DAV_SHIFT 9
3073	#define BCHP_OOB_TEST_FEC_OUT_RXLOF_TO_DAV_DEFAULT 0x00000000
3074
3075	/* OOB :: TEST_FEC_OUT :: RXSOF_TO_DAV [08:08] */
3076	#define BCHP_OOB_TEST_FEC_OUT_RXSOF_TO_DAV_MASK 0x00000100
3077	#define BCHP_OOB_TEST_FEC_OUT_RXSOF_TO_DAV_SHIFT 8
3078	#define BCHP_OOB_TEST_FEC_OUT_RXSOF_TO_DAV_DEFAULT 0x00000000
3079
3080	/* OOB :: TEST_FEC_OUT :: RXSOC_TO_DAV [07:07] */
3081	#define BCHP_OOB_TEST_FEC_OUT_RXSOC_TO_DAV_MASK 0x00000080
3082	#define BCHP_OOB_TEST_FEC_OUT_RXSOC_TO_DAV_SHIFT 7
3083	#define BCHP_OOB_TEST_FEC_OUT_RXSOC_TO_DAV_DEFAULT 0x00000000
3084
3085	/* OOB :: TEST_FEC_OUT :: RXVAL_TO_DAV [06:06] */
3086	#define BCHP_OOB_TEST_FEC_OUT_RXVAL_TO_DAV_MASK 0x00000040
3087	#define BCHP_OOB_TEST_FEC_OUT_RXVAL_TO_DAV_SHIFT 6
3088	#define BCHP_OOB_TEST_FEC_OUT_RXVAL_TO_DAV_DEFAULT 0x00000000
3089
3090	/* OOB :: TEST_FEC_OUT :: DAT_TO_DAV [05:05] */
3091	#define BCHP_OOB_TEST_FEC_OUT_DAT_TO_DAV_MASK 0x00000020
3092	#define BCHP_OOB_TEST_FEC_OUT_DAT_TO_DAV_SHIFT 5
3093	#define BCHP_OOB_TEST_FEC_OUT_DAT_TO_DAV_DEFAULT 0x00000000
3094
3095	/* OOB :: TEST_FEC_OUT :: CLK_TO_DAV [04:04] */
3096	#define BCHP_OOB_TEST_FEC_OUT_CLK_TO_DAV_MASK 0x00000010
3097	#define BCHP_OOB_TEST_FEC_OUT_CLK_TO_DAV_SHIFT 4
3098	#define BCHP_OOB_TEST_FEC_OUT_CLK_TO_DAV_DEFAULT 0x00000000
3099
3100	/* OOB :: TEST_FEC_OUT :: OB_AGC [03:03] */
3101	#define BCHP_OOB_TEST_FEC_OUT_OB_AGC_MASK 0x00000008
3102	#define BCHP_OOB_TEST_FEC_OUT_OB_AGC_SHIFT 3
3103	#define BCHP_OOB_TEST_FEC_OUT_OB_AGC_DEFAULT 0x00000000
3104
3105	/* OOB :: TEST_FEC_OUT :: CLK_TO_US [02:02] */
3106	#define BCHP_OOB_TEST_FEC_OUT_CLK_TO_US_MASK 0x00000004
3107	#define BCHP_OOB_TEST_FEC_OUT_CLK_TO_US_SHIFT 2
3108	#define BCHP_OOB_TEST_FEC_OUT_CLK_TO_US_DEFAULT 0x00000000
3109
3110	/* OOB :: TEST_FEC_OUT :: DAT_TO_PIN [01:01] */
3111	#define BCHP_OOB_TEST_FEC_OUT_DAT_TO_PIN_MASK 0x00000002
3112	#define BCHP_OOB_TEST_FEC_OUT_DAT_TO_PIN_SHIFT 1
3113	#define BCHP_OOB_TEST_FEC_OUT_DAT_TO_PIN_DEFAULT 0x00000000
3114
3115	/* OOB :: TEST_FEC_OUT :: CLK_TO_PIN [00:00] */
3116	#define BCHP_OOB_TEST_FEC_OUT_CLK_TO_PIN_MASK 0x00000001
3117	#define BCHP_OOB_TEST_FEC_OUT_CLK_TO_PIN_SHIFT 0
3118	#define BCHP_OOB_TEST_FEC_OUT_CLK_TO_PIN_DEFAULT 0x00000000
3119
3120	/***************************************************************************
3121	*TEST_FCW_OUT - Out-of-Band FCW output value for testing
3122	***************************************************************************/
3123	/* OOB :: TEST_FCW_OUT :: VALUE_TO_FCW [31:00] */
3124	#define BCHP_OOB_TEST_FCW_OUT_VALUE_TO_FCW_MASK 0xffffffff
3125	#define BCHP_OOB_TEST_FCW_OUT_VALUE_TO_FCW_SHIFT 0
3126	#define BCHP_OOB_TEST_FCW_OUT_VALUE_TO_FCW_DEFAULT 0x00000000
3127
3128	/***************************************************************************
3129	*SERIAL_OUTPUT_CTRL - Out-of_Band Serial Output Control to XPT and POD
3130	***************************************************************************/
3131	/* OOB :: SERIAL_OUTPUT_CTRL :: reserved0 [31:04] */
3132	#define BCHP_OOB_SERIAL_OUTPUT_CTRL_reserved0_MASK 0xfffffff0
3133	#define BCHP_OOB_SERIAL_OUTPUT_CTRL_reserved0_SHIFT 4
3134
3135	/* OOB :: SERIAL_OUTPUT_CTRL :: XPT_FECBYP [03:03] */
3136	#define BCHP_OOB_SERIAL_OUTPUT_CTRL_XPT_FECBYP_MASK 0x00000008
3137	#define BCHP_OOB_SERIAL_OUTPUT_CTRL_XPT_FECBYP_SHIFT 3
3138	#define BCHP_OOB_SERIAL_OUTPUT_CTRL_XPT_FECBYP_DEFAULT 0x00000000
3139
3140	/* OOB :: SERIAL_OUTPUT_CTRL :: XPT_BYPCTRL [02:02] */
3141	#define BCHP_OOB_SERIAL_OUTPUT_CTRL_XPT_BYPCTRL_MASK 0x00000004
3142	#define BCHP_OOB_SERIAL_OUTPUT_CTRL_XPT_BYPCTRL_SHIFT 2
3143	#define BCHP_OOB_SERIAL_OUTPUT_CTRL_XPT_BYPCTRL_DEFAULT 0x00000000
3144
3145	/* OOB :: SERIAL_OUTPUT_CTRL :: POD_FECBYP [01:01] */
3146	#define BCHP_OOB_SERIAL_OUTPUT_CTRL_POD_FECBYP_MASK 0x00000002
3147	#define BCHP_OOB_SERIAL_OUTPUT_CTRL_POD_FECBYP_SHIFT 1
3148	#define BCHP_OOB_SERIAL_OUTPUT_CTRL_POD_FECBYP_DEFAULT 0x00000000
3149
3150	/* OOB :: SERIAL_OUTPUT_CTRL :: POD_BYPCTRL [00:00] */
3151	#define BCHP_OOB_SERIAL_OUTPUT_CTRL_POD_BYPCTRL_MASK 0x00000001
3152	#define BCHP_OOB_SERIAL_OUTPUT_CTRL_POD_BYPCTRL_SHIFT 0
3153	#define BCHP_OOB_SERIAL_OUTPUT_CTRL_POD_BYPCTRL_DEFAULT 0x00000000
3154
3155	/***************************************************************************
3156	*IRQSTA2A - Out-of-Band IRQ to AP Status Register
3157	***************************************************************************/
3158	/* OOB :: IRQSTA2A :: reserved0 [31:06] */
3159	#define BCHP_OOB_IRQSTA2A_reserved0_MASK 0xffffffc0
3160	#define BCHP_OOB_IRQSTA2A_reserved0_SHIFT 6
3161
3162	/* OOB :: IRQSTA2A :: FLI_IS_2A [05:05] */
3163	#define BCHP_OOB_IRQSTA2A_FLI_IS_2A_MASK 0x00000020
3164	#define BCHP_OOB_IRQSTA2A_FLI_IS_2A_SHIFT 5
3165	#define BCHP_OOB_IRQSTA2A_FLI_IS_2A_DEFAULT 0x00000000
3166
3167	/* OOB :: IRQSTA2A :: FLI_LS_2A [04:04] */
3168	#define BCHP_OOB_IRQSTA2A_FLI_LS_2A_MASK 0x00000010
3169	#define BCHP_OOB_IRQSTA2A_FLI_LS_2A_SHIFT 4
3170	#define BCHP_OOB_IRQSTA2A_FLI_LS_2A_DEFAULT 0x00000000
3171
3172	/* OOB :: IRQSTA2A :: FEC_IS_2A [03:03] */
3173	#define BCHP_OOB_IRQSTA2A_FEC_IS_2A_MASK 0x00000008
3174	#define BCHP_OOB_IRQSTA2A_FEC_IS_2A_SHIFT 3
3175	#define BCHP_OOB_IRQSTA2A_FEC_IS_2A_DEFAULT 0x00000000
3176
3177	/* OOB :: IRQSTA2A :: FEC_LS_2A [02:02] */
3178	#define BCHP_OOB_IRQSTA2A_FEC_LS_2A_MASK 0x00000004
3179	#define BCHP_OOB_IRQSTA2A_FEC_LS_2A_SHIFT 2
3180	#define BCHP_OOB_IRQSTA2A_FEC_LS_2A_DEFAULT 0x00000000
3181
3182	/* OOB :: IRQSTA2A :: SNR_IS_2A [01:01] */
3183	#define BCHP_OOB_IRQSTA2A_SNR_IS_2A_MASK 0x00000002
3184	#define BCHP_OOB_IRQSTA2A_SNR_IS_2A_SHIFT 1
3185	#define BCHP_OOB_IRQSTA2A_SNR_IS_2A_DEFAULT 0x00000000
3186
3187	/* OOB :: IRQSTA2A :: SNR_LS_2A [00:00] */
3188	#define BCHP_OOB_IRQSTA2A_SNR_LS_2A_MASK 0x00000001
3189	#define BCHP_OOB_IRQSTA2A_SNR_LS_2A_SHIFT 0
3190	#define BCHP_OOB_IRQSTA2A_SNR_LS_2A_DEFAULT 0x00000000
3191
3192	/***************************************************************************
3193	*IRQSET2A - Out-of-Band Set IRQ to AP Register
3194	***************************************************************************/
3195	/* OOB :: IRQSET2A :: reserved0 [31:06] */
3196	#define BCHP_OOB_IRQSET2A_reserved0_MASK 0xffffffc0
3197	#define BCHP_OOB_IRQSET2A_reserved0_SHIFT 6
3198
3199	/* OOB :: IRQSET2A :: FLI_IS_S2A [05:05] */
3200	#define BCHP_OOB_IRQSET2A_FLI_IS_S2A_MASK 0x00000020
3201	#define BCHP_OOB_IRQSET2A_FLI_IS_S2A_SHIFT 5
3202	#define BCHP_OOB_IRQSET2A_FLI_IS_S2A_DEFAULT 0x00000000
3203
3204	/* OOB :: IRQSET2A :: FLI_LS_S2A [04:04] */
3205	#define BCHP_OOB_IRQSET2A_FLI_LS_S2A_MASK 0x00000010
3206	#define BCHP_OOB_IRQSET2A_FLI_LS_S2A_SHIFT 4
3207	#define BCHP_OOB_IRQSET2A_FLI_LS_S2A_DEFAULT 0x00000000
3208
3209	/* OOB :: IRQSET2A :: FEC_IS_S2A [03:03] */
3210	#define BCHP_OOB_IRQSET2A_FEC_IS_S2A_MASK 0x00000008
3211	#define BCHP_OOB_IRQSET2A_FEC_IS_S2A_SHIFT 3
3212	#define BCHP_OOB_IRQSET2A_FEC_IS_S2A_DEFAULT 0x00000000
3213
3214	/* OOB :: IRQSET2A :: FEC_LS_S2A [02:02] */
3215	#define BCHP_OOB_IRQSET2A_FEC_LS_S2A_MASK 0x00000004
3216	#define BCHP_OOB_IRQSET2A_FEC_LS_S2A_SHIFT 2
3217	#define BCHP_OOB_IRQSET2A_FEC_LS_S2A_DEFAULT 0x00000000
3218
3219	/* OOB :: IRQSET2A :: SNR_IS_S2A [01:01] */
3220	#define BCHP_OOB_IRQSET2A_SNR_IS_S2A_MASK 0x00000002
3221	#define BCHP_OOB_IRQSET2A_SNR_IS_S2A_SHIFT 1
3222	#define BCHP_OOB_IRQSET2A_SNR_IS_S2A_DEFAULT 0x00000000
3223
3224	/* OOB :: IRQSET2A :: SNR_LS_S2A [00:00] */
3225	#define BCHP_OOB_IRQSET2A_SNR_LS_S2A_MASK 0x00000001
3226	#define BCHP_OOB_IRQSET2A_SNR_LS_S2A_SHIFT 0
3227	#define BCHP_OOB_IRQSET2A_SNR_LS_S2A_DEFAULT 0x00000000
3228
3229	/***************************************************************************
3230	*IRQCLR2A - Out-of-Band CLear IRQ to AP Register
3231	***************************************************************************/
3232	/* OOB :: IRQCLR2A :: reserved0 [31:06] */
3233	#define BCHP_OOB_IRQCLR2A_reserved0_MASK 0xffffffc0
3234	#define BCHP_OOB_IRQCLR2A_reserved0_SHIFT 6
3235
3236	/* OOB :: IRQCLR2A :: FLI_IS_C2A [05:05] */
3237	#define BCHP_OOB_IRQCLR2A_FLI_IS_C2A_MASK 0x00000020
3238	#define BCHP_OOB_IRQCLR2A_FLI_IS_C2A_SHIFT 5
3239	#define BCHP_OOB_IRQCLR2A_FLI_IS_C2A_DEFAULT 0x00000000
3240
3241	/* OOB :: IRQCLR2A :: FLI_LS_C2A [04:04] */
3242	#define BCHP_OOB_IRQCLR2A_FLI_LS_C2A_MASK 0x00000010
3243	#define BCHP_OOB_IRQCLR2A_FLI_LS_C2A_SHIFT 4
3244	#define BCHP_OOB_IRQCLR2A_FLI_LS_C2A_DEFAULT 0x00000000
3245
3246	/* OOB :: IRQCLR2A :: FEC_IS_C2A [03:03] */
3247	#define BCHP_OOB_IRQCLR2A_FEC_IS_C2A_MASK 0x00000008
3248	#define BCHP_OOB_IRQCLR2A_FEC_IS_C2A_SHIFT 3
3249	#define BCHP_OOB_IRQCLR2A_FEC_IS_C2A_DEFAULT 0x00000000
3250
3251	/* OOB :: IRQCLR2A :: FEC_LS_C2A [02:02] */
3252	#define BCHP_OOB_IRQCLR2A_FEC_LS_C2A_MASK 0x00000004
3253	#define BCHP_OOB_IRQCLR2A_FEC_LS_C2A_SHIFT 2
3254	#define BCHP_OOB_IRQCLR2A_FEC_LS_C2A_DEFAULT 0x00000000
3255
3256	/* OOB :: IRQCLR2A :: SNR_IS_C2A [01:01] */
3257	#define BCHP_OOB_IRQCLR2A_SNR_IS_C2A_MASK 0x00000002
3258	#define BCHP_OOB_IRQCLR2A_SNR_IS_C2A_SHIFT 1
3259	#define BCHP_OOB_IRQCLR2A_SNR_IS_C2A_DEFAULT 0x00000000
3260
3261	/* OOB :: IRQCLR2A :: SNR_LS_C2A [00:00] */
3262	#define BCHP_OOB_IRQCLR2A_SNR_LS_C2A_MASK 0x00000001
3263	#define BCHP_OOB_IRQCLR2A_SNR_LS_C2A_SHIFT 0
3264	#define BCHP_OOB_IRQCLR2A_SNR_LS_C2A_DEFAULT 0x00000000
3265
3266	/***************************************************************************
3267	*IRQMSK2A - Out-of-Band IRQ to AP Mask Register
3268	***************************************************************************/
3269	/* OOB :: IRQMSK2A :: reserved0 [31:06] */
3270	#define BCHP_OOB_IRQMSK2A_reserved0_MASK 0xffffffc0
3271	#define BCHP_OOB_IRQMSK2A_reserved0_SHIFT 6
3272
3273	/* OOB :: IRQMSK2A :: FLI_IS_M2A [05:05] */
3274	#define BCHP_OOB_IRQMSK2A_FLI_IS_M2A_MASK 0x00000020
3275	#define BCHP_OOB_IRQMSK2A_FLI_IS_M2A_SHIFT 5
3276	#define BCHP_OOB_IRQMSK2A_FLI_IS_M2A_DEFAULT 0x00000001
3277
3278	/* OOB :: IRQMSK2A :: FLI_LS_M2A [04:04] */
3279	#define BCHP_OOB_IRQMSK2A_FLI_LS_M2A_MASK 0x00000010
3280	#define BCHP_OOB_IRQMSK2A_FLI_LS_M2A_SHIFT 4
3281	#define BCHP_OOB_IRQMSK2A_FLI_LS_M2A_DEFAULT 0x00000001
3282
3283	/* OOB :: IRQMSK2A :: FEC_IS_M2A [03:03] */
3284	#define BCHP_OOB_IRQMSK2A_FEC_IS_M2A_MASK 0x00000008
3285	#define BCHP_OOB_IRQMSK2A_FEC_IS_M2A_SHIFT 3
3286	#define BCHP_OOB_IRQMSK2A_FEC_IS_M2A_DEFAULT 0x00000001
3287
3288	/* OOB :: IRQMSK2A :: FEC_LS_M2A [02:02] */
3289	#define BCHP_OOB_IRQMSK2A_FEC_LS_M2A_MASK 0x00000004
3290	#define BCHP_OOB_IRQMSK2A_FEC_LS_M2A_SHIFT 2
3291	#define BCHP_OOB_IRQMSK2A_FEC_LS_M2A_DEFAULT 0x00000001
3292
3293	/* OOB :: IRQMSK2A :: SNR_IS_M2A [01:01] */
3294	#define BCHP_OOB_IRQMSK2A_SNR_IS_M2A_MASK 0x00000002
3295	#define BCHP_OOB_IRQMSK2A_SNR_IS_M2A_SHIFT 1
3296	#define BCHP_OOB_IRQMSK2A_SNR_IS_M2A_DEFAULT 0x00000001
3297
3298	/* OOB :: IRQMSK2A :: SNR_LS_M2A [00:00] */
3299	#define BCHP_OOB_IRQMSK2A_SNR_LS_M2A_MASK 0x00000001
3300	#define BCHP_OOB_IRQMSK2A_SNR_LS_M2A_SHIFT 0
3301	#define BCHP_OOB_IRQMSK2A_SNR_LS_M2A_DEFAULT 0x00000001
3302
3303	/***************************************************************************
3304	*IRQMST2A - Out-of-Band IRQ to AP Mask Set Register
3305	***************************************************************************/
3306	/* OOB :: IRQMST2A :: reserved0 [31:06] */
3307	#define BCHP_OOB_IRQMST2A_reserved0_MASK 0xffffffc0
3308	#define BCHP_OOB_IRQMST2A_reserved0_SHIFT 6
3309
3310	/* OOB :: IRQMST2A :: FLI_IS_MS2A [05:05] */
3311	#define BCHP_OOB_IRQMST2A_FLI_IS_MS2A_MASK 0x00000020
3312	#define BCHP_OOB_IRQMST2A_FLI_IS_MS2A_SHIFT 5
3313	#define BCHP_OOB_IRQMST2A_FLI_IS_MS2A_DEFAULT 0x00000000
3314
3315	/* OOB :: IRQMST2A :: FLI_LS_MS2A [04:04] */
3316	#define BCHP_OOB_IRQMST2A_FLI_LS_MS2A_MASK 0x00000010
3317	#define BCHP_OOB_IRQMST2A_FLI_LS_MS2A_SHIFT 4
3318	#define BCHP_OOB_IRQMST2A_FLI_LS_MS2A_DEFAULT 0x00000000
3319
3320	/* OOB :: IRQMST2A :: FEC_IS_MS2A [03:03] */
3321	#define BCHP_OOB_IRQMST2A_FEC_IS_MS2A_MASK 0x00000008
3322	#define BCHP_OOB_IRQMST2A_FEC_IS_MS2A_SHIFT 3
3323	#define BCHP_OOB_IRQMST2A_FEC_IS_MS2A_DEFAULT 0x00000000
3324
3325	/* OOB :: IRQMST2A :: FEC_LS_MS2A [02:02] */
3326	#define BCHP_OOB_IRQMST2A_FEC_LS_MS2A_MASK 0x00000004
3327	#define BCHP_OOB_IRQMST2A_FEC_LS_MS2A_SHIFT 2
3328	#define BCHP_OOB_IRQMST2A_FEC_LS_MS2A_DEFAULT 0x00000000
3329
3330	/* OOB :: IRQMST2A :: SNR_IS_MS2A [01:01] */
3331	#define BCHP_OOB_IRQMST2A_SNR_IS_MS2A_MASK 0x00000002
3332	#define BCHP_OOB_IRQMST2A_SNR_IS_MS2A_SHIFT 1
3333	#define BCHP_OOB_IRQMST2A_SNR_IS_MS2A_DEFAULT 0x00000000
3334
3335	/* OOB :: IRQMST2A :: SNR_LS_MS2A [00:00] */
3336	#define BCHP_OOB_IRQMST2A_SNR_LS_MS2A_MASK 0x00000001
3337	#define BCHP_OOB_IRQMST2A_SNR_LS_MS2A_SHIFT 0
3338	#define BCHP_OOB_IRQMST2A_SNR_LS_MS2A_DEFAULT 0x00000000
3339
3340	/***************************************************************************
3341	*IRQMCL2A - Out-of-Band IRQ to AP Mask Clear Register
3342	***************************************************************************/
3343	/* OOB :: IRQMCL2A :: reserved0 [31:06] */
3344	#define BCHP_OOB_IRQMCL2A_reserved0_MASK 0xffffffc0
3345	#define BCHP_OOB_IRQMCL2A_reserved0_SHIFT 6
3346
3347	/* OOB :: IRQMCL2A :: FLI_IS_MC2A [05:05] */
3348	#define BCHP_OOB_IRQMCL2A_FLI_IS_MC2A_MASK 0x00000020
3349	#define BCHP_OOB_IRQMCL2A_FLI_IS_MC2A_SHIFT 5
3350	#define BCHP_OOB_IRQMCL2A_FLI_IS_MC2A_DEFAULT 0x00000000
3351
3352	/* OOB :: IRQMCL2A :: FLI_LS_MC2A [04:04] */
3353	#define BCHP_OOB_IRQMCL2A_FLI_LS_MC2A_MASK 0x00000010
3354	#define BCHP_OOB_IRQMCL2A_FLI_LS_MC2A_SHIFT 4
3355	#define BCHP_OOB_IRQMCL2A_FLI_LS_MC2A_DEFAULT 0x00000000
3356
3357	/* OOB :: IRQMCL2A :: FEC_IS_MC2A [03:03] */
3358	#define BCHP_OOB_IRQMCL2A_FEC_IS_MC2A_MASK 0x00000008
3359	#define BCHP_OOB_IRQMCL2A_FEC_IS_MC2A_SHIFT 3
3360	#define BCHP_OOB_IRQMCL2A_FEC_IS_MC2A_DEFAULT 0x00000000
3361
3362	/* OOB :: IRQMCL2A :: FEC_LS_MC2A [02:02] */
3363	#define BCHP_OOB_IRQMCL2A_FEC_LS_MC2A_MASK 0x00000004
3364	#define BCHP_OOB_IRQMCL2A_FEC_LS_MC2A_SHIFT 2
3365	#define BCHP_OOB_IRQMCL2A_FEC_LS_MC2A_DEFAULT 0x00000000
3366
3367	/* OOB :: IRQMCL2A :: SNR_IS_MC2A [01:01] */
3368	#define BCHP_OOB_IRQMCL2A_SNR_IS_MC2A_MASK 0x00000002
3369	#define BCHP_OOB_IRQMCL2A_SNR_IS_MC2A_SHIFT 1
3370	#define BCHP_OOB_IRQMCL2A_SNR_IS_MC2A_DEFAULT 0x00000000
3371
3372	/* OOB :: IRQMCL2A :: SNR_LS_MC2A [00:00] */
3373	#define BCHP_OOB_IRQMCL2A_SNR_LS_MC2A_MASK 0x00000001
3374	#define BCHP_OOB_IRQMCL2A_SNR_LS_MC2A_SHIFT 0
3375	#define BCHP_OOB_IRQMCL2A_SNR_LS_MC2A_DEFAULT 0x00000000
3376
3377	/***************************************************************************
3378	*FCW_SCALE - Out-of-Band FCW Output Scaling
3379	***************************************************************************/
3380	/* OOB :: FCW_SCALE :: VAL [31:00] */
3381	#define BCHP_OOB_FCW_SCALE_VAL_MASK 0xffffffff
3382	#define BCHP_OOB_FCW_SCALE_VAL_SHIFT 0
3383	#define BCHP_OOB_FCW_SCALE_VAL_DEFAULT 0x10000000
3384
3385	/***************************************************************************
3386	*DAGC_LEAKY - Out-of-Band DAGC Leaky Integrator value
3387	***************************************************************************/
3388	/* OOB :: DAGC_LEAKY :: INTGTR [31:00] */
3389	#define BCHP_OOB_DAGC_LEAKY_INTGTR_MASK 0xffffffff
3390	#define BCHP_OOB_DAGC_LEAKY_INTGTR_SHIFT 0
3391	#define BCHP_OOB_DAGC_LEAKY_INTGTR_DEFAULT 0x00000000
3392
3393	/***************************************************************************
3394	*DAGC_LPINT - Out-of-Band DAGC Loop Integrator value
3395	***************************************************************************/
3396	/* OOB :: DAGC_LPINT :: INTGTR [31:00] */
3397	#define BCHP_OOB_DAGC_LPINT_INTGTR_MASK 0xffffffff
3398	#define BCHP_OOB_DAGC_LPINT_INTGTR_SHIFT 0
3399	#define BCHP_OOB_DAGC_LPINT_INTGTR_DEFAULT 0x00000000
3400
3401	#endif /* #ifndef BCHP_OOB_H__ */
3402
3403	/* End of File */

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source: svn/newcon3bcm2_21bu/magnum/basemodules/chp/7552/rdb/b0/bchp_oob.h

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