| 1 | /*************************************************************************** |
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| 2 | * Copyright (c) 2003-2011, Broadcom Corporation |
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| 3 | * All Rights Reserved |
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| 4 | * Confidential Property of Broadcom Corporation |
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| 5 | * |
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| 6 | * THIS SOFTWARE MAY ONLY BE USED SUBJECT TO AN EXECUTED SOFTWARE LICENSE |
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| 7 | * AGREEMENT BETWEEN THE USER AND BROADCOM. YOU HAVE NO RIGHT TO USE OR |
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| 8 | * EXPLOIT THIS MATERIAL EXCEPT SUBJECT TO THE TERMS OF SUCH AN AGREEMENT. |
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| 9 | * |
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| 10 | * $brcm_Workfile: brdc_private.h $ |
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| 11 | * $brcm_Revision: Hydra_Software_Devel/35 $ |
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| 12 | * $brcm_Date: 11/1/11 9:56a $ |
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| 13 | * |
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| 14 | * Module Description: |
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| 15 | * |
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| 16 | * Revision History: |
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| 17 | * |
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| 18 | * $brcm_Log: /magnum/commonutils/rdc/7038/brdc_private.h $ |
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| 19 | * |
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| 20 | * Hydra_Software_Devel/35 11/1/11 9:56a pntruong |
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| 21 | * SW7435-23: Initial rdc support for 7435. |
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| 22 | * |
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| 23 | * Hydra_Software_Devel/34 2/9/11 3:34p pntruong |
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| 24 | * SW7420-1456: Initial standby power management that used chp's pm |
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| 25 | * functionalities. Additional standardize coding style and uses of dbg |
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| 26 | * object. |
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| 27 | * |
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| 28 | * Hydra_Software_Devel/33 3/18/10 11:36a yuxiaz |
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| 29 | * SW7405-3954: Remove dependence of brdc.h in bavc.h |
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| 30 | * |
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| 31 | * Hydra_Software_Devel/31 3/24/09 5:29p albertl |
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| 32 | * PR52513: Moved RDC debug globals into hList structure. |
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| 33 | * |
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| 34 | * Hydra_Software_Devel/30 2/28/08 5:03p jessem |
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| 35 | * PR 38623: Added RDMA blockout support. |
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| 36 | * |
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| 37 | * Hydra_Software_Devel/29 10/4/07 11:52a pntruong |
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| 38 | * PR34714: Update RDC trigger definitions, and removed warnings and |
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| 39 | * global vars. |
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| 40 | * |
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| 41 | * Hydra_Software_Devel/28 9/13/07 4:20p pntruong |
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| 42 | * PR 28750 : Added RDC hooks for RUL capture for splash screen. |
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| 43 | * |
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| 44 | * Hydra_Software_Devel/28 9/13/07 4:14p pntruong |
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| 45 | * PR 28750 : Added RDC hooks for RUL capture for splash screen. |
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| 46 | * |
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| 47 | * Hydra_Software_Devel/27 12/21/06 1:07p hongtaoz |
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| 48 | * PR25668: h/w changed RDC scratch registers layout; bring up 7403; |
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| 49 | * |
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| 50 | * Hydra_Software_Devel/PR28750/1 9/7/07 1:46p shyam |
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| 51 | * PR 28750 : Change to RDC hooks as function pointers |
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| 52 | * |
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| 53 | * Hydra_Software_Devel/26 8/15/06 6:37p pntruong |
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| 54 | * PR23177: Also need to map the unknown trigger for trigger_select. |
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| 55 | * |
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| 56 | * Hydra_Software_Devel/25 8/14/06 7:53p pntruong |
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| 57 | * PR23177: RDC module bringup. |
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| 58 | * |
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| 59 | * Hydra_Software_Devel/24 8/7/06 3:29p pntruong |
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| 60 | * PR23177: RDC module bringup. |
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| 61 | * |
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| 62 | * Hydra_Software_Devel/23 6/16/06 3:26p albertl |
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| 63 | * PR20276: Removed multiple calls to BMEM address conversion functions. |
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| 64 | * Converted address now stored in context. |
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| 65 | * |
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| 66 | * Hydra_Software_Devel/22 1/12/06 2:44p hongtaoz |
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| 67 | * PR18233: need to re-compute the RUL cached start address every time in |
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| 68 | * case user changes cache usage or mapping; |
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| 69 | * |
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| 70 | * Hydra_Software_Devel/21 1/12/06 1:31p hongtaoz |
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| 71 | * PR18233: added mosaic mode support; |
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| 72 | * |
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| 73 | * Hydra_Software_Devel/20 1/3/06 3:01p yuxiaz |
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| 74 | * PR17593: Removed unused RDC task-context code. Use the _isr version of |
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| 75 | * functions for the non-_isr version. |
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| 76 | * |
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| 77 | * Hydra_Software_Devel/19 6/13/05 3:14p pntruong |
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| 78 | * PR15862: Added rdc rul logging for debug. |
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| 79 | * |
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| 80 | * Hydra_Software_Devel/18 11/23/04 8:53p pntruong |
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| 81 | * PR13076, PR11749: Video jitter under heavy system load. Added RUL |
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| 82 | * execution check to reduce number of programmed registers. |
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| 83 | * |
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| 84 | * Hydra_Software_Devel/17 10/28/04 4:07p yuxiaz |
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| 85 | * PR13108: Remove BKNI_Sleep from critical section and _isr functions. |
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| 86 | * Clean up _isr and non_isr functions. |
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| 87 | * |
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| 88 | * Hydra_Software_Devel/16 3/16/04 2:54p yuxiaz |
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| 89 | * PR 10095: Added code to enable RDC acess of regsiters outside BVN. |
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| 90 | * This code is disabled for A0. |
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| 91 | * |
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| 92 | * Hydra_Software_Devel/15 1/14/04 4:41p yuxiaz |
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| 93 | * PR 9076: Change isr functions to _isr. |
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| 94 | * |
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| 95 | * Hydra_Software_Devel/14 1/8/04 9:31a jasonh |
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| 96 | * PR 9201: Added typedef to structures. |
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| 97 | * |
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| 98 | * Hydra_Software_Devel/13 12/22/03 11:51a jasonh |
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| 99 | * PR 8861: Added new semaphore and debugging prototypes. |
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| 100 | * |
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| 101 | * Hydra_Software_Devel/12 10/30/03 2:46p yuxiaz |
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| 102 | * Remove bInterrupt from BRDC_Slot_Execute and |
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| 103 | * BRDC_Slot_ExecuteOnTrigger. |
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| 104 | * |
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| 105 | * Hydra_Software_Devel/11 10/27/03 3:13p yuxiaz |
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| 106 | * Added soft reset. |
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| 107 | * |
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| 108 | * Hydra_Software_Devel/10 9/8/03 9:36a yuxiaz |
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| 109 | * Change unsigned int to uint32_t. |
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| 110 | * |
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| 111 | * Hydra_Software_Devel/9 9/2/03 2:55p yuxiaz |
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| 112 | * Added BRDC_Slot_GetId, moved BRDC_SlotId to brdc.h. |
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| 113 | * |
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| 114 | * Hydra_Software_Devel/8 8/14/03 8:58a yuxiaz |
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| 115 | * Clean up include files. |
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| 116 | * |
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| 117 | * Hydra_Software_Devel/7 8/12/03 1:48p yuxiaz |
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| 118 | * Use double link list to keep track of slots a specific list assigned |
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| 119 | * to. |
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| 120 | * |
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| 121 | * Hydra_Software_Devel/6 7/25/03 12:12p yuxiaz |
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| 122 | * Change BRDC_Trigger to use defines in RDB. Misc clean up. |
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| 123 | * |
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| 124 | * Hydra_Software_Devel/5 7/17/03 8:50a yuxiaz |
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| 125 | * Added debug message. |
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| 126 | * |
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| 127 | * Hydra_Software_Devel/4 7/7/03 2:51p yuxiaz |
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| 128 | * Added opcode. Misc clean up. |
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| 129 | * |
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| 130 | * Hydra_Software_Devel/3 7/2/03 10:19a yuxiaz |
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| 131 | * Fixed register write. |
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| 132 | * |
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| 133 | * Hydra_Software_Devel/2 6/30/03 1:15p yuxiaz |
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| 134 | * Added BRDC_Trigger. |
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| 135 | * |
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| 136 | * Hydra_Software_Devel/1 6/27/03 2:55p yuxiaz |
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| 137 | * Initial version. |
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| 138 | * |
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| 139 | ***************************************************************************/ |
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| 140 | #ifndef BRDC__PRIVATE_H__ |
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| 141 | #define BRDC__PRIVATE_H__ |
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| 142 | |
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| 143 | #include "blst_list.h" /* Link list support */ |
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| 144 | #include "brdc.h" |
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| 145 | #include "brdc_dbg.h" |
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| 146 | |
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| 147 | #ifdef __cplusplus |
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| 148 | extern "C" { |
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| 149 | #endif |
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| 150 | |
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| 151 | |
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| 152 | /*************************************************************************** |
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| 153 | * Defines |
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| 154 | ***************************************************************************/ |
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| 155 | |
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| 156 | #define BRDC_P_Read32(hRdc, reg) BREG_Read32(hRdc->hReg, reg) |
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| 157 | #define BRDC_P_Write32(hRdc, reg, data) BREG_Write32(hRdc->hReg, reg, data) |
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| 158 | |
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| 159 | #define BRDC_Slot_P_Read32(hSlot, reg) BRDC_P_Read32(hSlot->hRdc, reg) |
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| 160 | #define BRDC_Slot_P_Write32(hSlot, reg, data) BRDC_P_Write32(hSlot->hRdc, reg, data) |
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| 161 | |
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| 162 | /* Number of rul to capture. */ |
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| 163 | #define BRDC_P_MAX_COUNT (1024*1024) |
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| 164 | |
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| 165 | /* Null int id */ |
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| 166 | #define BRDC_P_NULL_BINTID ((BINT_Id)(-1)) |
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| 167 | |
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| 168 | /* Macro to make a RDC trigger.*/ |
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| 169 | #define BRDC_P_TRIGGER(trigger) BCHP_RDC_desc_0_config_trigger_select_##trigger |
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| 170 | |
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| 171 | /* Unkown trigger value. */ |
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| 172 | #define BRDC_P_TRIGGER_UNKNOWN_VAL (0x7f) |
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| 173 | |
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| 174 | /* RDC general purpose registers address*/ |
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| 175 | #define BRDC_P_NO_TRACKING_ADDR UINT32_C(-1) |
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| 176 | |
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| 177 | /*************************************************************************** |
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| 178 | Summary: |
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| 179 | Scratch Registers wrapper |
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| 180 | |
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| 181 | Description: |
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| 182 | The following moduals have reserved scratch registers: |
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| 183 | RDC: the first 27 or 32 scratch registers are reserved internally for |
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| 184 | slot execution tracking; |
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| 185 | VDC: the last 3 scratch registers are reserved for VDC format switch, |
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| 186 | which are BRDC_SCRATCH_REG_END ~ (BRDC_SCRATCH_REG_END-2); |
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| 187 | ****************************************************************************/ |
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| 188 | #define BRDC_P_NUM_OF_SLOTS (32) |
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| 189 | #define BRDC_P_MAX_NUM_OF_DISPLAYS (3) |
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| 190 | |
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| 191 | #if BCHP_RDC_scratch_i_ARRAY_BASE /* 7403 and beyond */ |
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| 192 | /* VBI: the last 4 scratch reigsters are reserved to coordinate programming |
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| 193 | * of VBI encoder control registers between BVBI and BVDC. (see bavc.h |
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| 194 | * for details) */ |
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| 195 | #define BRDC_P_NUM_OF_SCRATCH_FOR_VBI (4) |
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| 196 | |
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| 197 | /* the first 32 scratch registers are reserved for RDC slot execution tracking */ |
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| 198 | #define BRDC_P_SCRATCH_REG_START (0) |
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| 199 | #define BRDC_P_SCRATCH_REG_END (BCHP_RDC_scratch_i_ARRAY_END - BRDC_P_NUM_OF_SCRATCH_FOR_VBI) |
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| 200 | |
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| 201 | #define BRDC_P_SCRATCH_REG_ADDR(varx) \ |
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| 202 | (BCHP_RDC_scratch_i_ARRAY_BASE + ((varx) * sizeof(uint32_t))) |
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| 203 | |
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| 204 | /* track all slots */ |
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| 205 | #define BRDC_P_TRACK_REG_ADDR(x) BRDC_P_SCRATCH_REG_ADDR(x) |
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| 206 | |
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| 207 | /* BRDC_P_SCRATCH_FIRST_AVAILABLE needs to exclude RDC internally reserved |
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| 208 | slot-tracking registers; |
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| 209 | we also need to reserve at least 3 scratch registers for VDC display format |
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| 210 | switch usage; */ |
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| 211 | #define BRDC_P_SCRATCH_FIRST_AVAILABLE (BRDC_P_NUM_OF_SLOTS) |
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| 212 | #else /* 3563 and previous chipsets */ |
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| 213 | /* the first 27 or 32 scratch registers are reserved for RDC slot execution |
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| 214 | * tracking */ |
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| 215 | #define BRDC_P_SCRATCH_REG_START (BRDC_Variable_Max) |
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| 216 | #define BRDC_P_SCRATCH_REG_END (BCHP_RDC_data_i_ARRAY_END) |
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| 217 | |
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| 218 | #define BRDC_P_SCRATCH_REG_ADDR(varx) \ |
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| 219 | (BCHP_RDC_data_i_ARRAY_BASE + ((varx) * sizeof(uint32_t))) |
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| 220 | |
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| 221 | /* BRDC_P_SCRATCH_FIRST_AVAILABLE needs to exclude RDC internally reserved |
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| 222 | slot-tracking registers; |
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| 223 | we also need to reserve at least 3 scratch registers for VDC display format |
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| 224 | switch usage; */ |
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| 225 | #if ((BRDC_P_SCRATCH_REG_END) >= (BRDC_P_SCRATCH_REG_START+BRDC_P_NUM_OF_SLOTS+BRDC_P_MAX_NUM_OF_DISPLAYS)) /* 3563 */ |
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| 226 | #define BRDC_P_TRACK_REG_ADDR(x) BRDC_P_SCRATCH_REG_ADDR(x) |
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| 227 | #define BRDC_P_SCRATCH_FIRST_AVAILABLE (BRDC_P_SCRATCH_REG_START+BRDC_P_NUM_OF_SLOTS) |
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| 228 | #else /* previous chipsets: 7038/7438/7118/7401/7400A0/3560 */ |
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| 229 | #define BRDC_P_TRACK_REG_ADDR(x) \ |
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| 230 | (((x) > BRDC_P_SCRATCH_REG_END-BRDC_P_MAX_NUM_OF_DISPLAYS)? \ |
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| 231 | BRDC_P_NO_TRACKING_ADDR : BRDC_P_SCRATCH_REG_ADDR(x)) |
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| 232 | #define BRDC_P_SCRATCH_FIRST_AVAILABLE (BRDC_P_SCRATCH_REG_END-BRDC_P_MAX_NUM_OF_DISPLAYS+1) |
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| 233 | #endif |
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| 234 | #endif |
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| 235 | |
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| 236 | #if (BRDC_P_SCRATCH_FIRST_AVAILABLE+BRDC_P_MAX_NUM_OF_DISPLAYS-1)>BRDC_P_SCRATCH_REG_END |
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| 237 | #error "RDC doesn't have enough scratch registers! Please adjust MACRO above!" |
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| 238 | #endif |
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| 239 | |
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| 240 | #ifdef BCHP_RDC_desc_0_config_segmented_MASK |
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| 241 | #define BRDC_P_SUPPORT_SEGMENTED_RUL (1) |
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| 242 | #else |
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| 243 | #define BRDC_P_SUPPORT_SEGMENTED_RUL (0) |
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| 244 | #endif |
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| 245 | |
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| 246 | /*************************************************************************** |
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| 247 | * Data Structure |
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| 248 | ***************************************************************************/ |
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| 249 | |
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| 250 | /*************************************************************************** |
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| 251 | * BRDC_P_Slot_Head |
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| 252 | * Head of the double Link List for slot |
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| 253 | ***************************************************************************/ |
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| 254 | typedef struct BRDC_P_Slot_Head BRDC_P_Slot_Head; |
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| 255 | BLST_D_HEAD(BRDC_P_Slot_Head, BRDC_P_Slot_Handle); |
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| 256 | |
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| 257 | /*************************************************************************** |
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| 258 | * BRDC_P_Handle |
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| 259 | ***************************************************************************/ |
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| 260 | typedef struct BRDC_P_Handle |
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| 261 | { |
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| 262 | BDBG_OBJECT(BRDC_RDC) |
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| 263 | |
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| 264 | BREG_Handle hReg; /* Register module handle */ |
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| 265 | BCHP_Handle hChp; /* Chip module handle */ |
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| 266 | BMEM_Handle hMem; /* Memory module handle */ |
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| 267 | BRDC_Settings stRdcSettings; /* Global RDC Settings */ |
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| 268 | const BRDC_TrigInfo *aTrigInfo; /* Contain this chip trigger information. */ |
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| 269 | |
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| 270 | /* Scratch registers use flags */ |
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| 271 | bool abScratchRegUsed[BRDC_P_SCRATCH_REG_END - BRDC_P_SCRATCH_FIRST_AVAILABLE + 1]; |
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| 272 | bool bSlotUsed[BRDC_SlotId_eSlotMAX]; |
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| 273 | BRDC_Slot_Handle apSlot[BRDC_SlotId_eSlotMAX]; |
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| 274 | |
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| 275 | #ifdef BRDC_USE_CAPTURE_BUFFER |
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| 276 | BRDC_DBG_CaptureBuffer captureBuffer; |
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| 277 | #endif |
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| 278 | |
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| 279 | /* RDC blockout */ |
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| 280 | BRDC_List_Handle hRdcBlockOutList; /* prealloced RUL list for RDC block out */ |
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| 281 | BRDC_BlockOut astBlockOut[BRDC_MAX_RDC_BLOCKOUT_LIST_COUNT]; |
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| 282 | bool bRdcBlockOutEnabled; |
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| 283 | } BRDC_P_Handle; |
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| 284 | |
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| 285 | |
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| 286 | /*************************************************************************** |
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| 287 | * BRDC_P_Slot_Handle |
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| 288 | ***************************************************************************/ |
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| 289 | typedef struct BRDC_P_Slot_Handle |
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| 290 | { |
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| 291 | BDBG_OBJECT(BRDC_SLT) |
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| 292 | |
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| 293 | BRDC_Handle hRdc; /* Parent handle */ |
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| 294 | BRDC_List_Handle hList; /* RUL list handle */ |
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| 295 | |
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| 296 | bool bRecurring; /* Is it recurring? */ |
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| 297 | BRDC_SlotId eSlotId; /* RDMA descriptor Id */ |
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| 298 | BRDC_Trigger eRDCTrigger; /* Trigger */ |
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| 299 | BINT_Id SlotIntId; /* L2 interrupt id of this slot. */ |
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| 300 | uint32_t ulRegOffset; /* Byte offset from slot 0 */ |
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| 301 | |
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| 302 | /* Keep track if a list has been executed when assigned to a slot. */ |
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| 303 | bool bTrackExecution; /* Enable keep track of execution. */ |
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| 304 | uint32_t ulTrackCount; /* SW updates this. */ |
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| 305 | uint32_t ulTrackRegAddr; /* HW updates this. */ |
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| 306 | |
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| 307 | /* store the desc_config setting */ |
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| 308 | uint32_t *pulRulConfigPrevVal; /* point to the previous RUL's config value */ |
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| 309 | uint32_t *pulRulConfigVal; /* point to the current RUL's config value */ |
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| 310 | |
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| 311 | BLST_D_ENTRY(BRDC_P_Slot_Handle) link; /* doubly-linked list support */ |
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| 312 | |
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| 313 | } BRDC_P_Slot_Handle; |
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| 314 | |
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| 315 | |
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| 316 | /*************************************************************************** |
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| 317 | * BRDC_P_List_Handle |
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| 318 | ***************************************************************************/ |
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| 319 | typedef struct BRDC_P_List_Handle |
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| 320 | { |
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| 321 | BDBG_OBJECT(BRDC_LST) |
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| 322 | |
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| 323 | BRDC_Handle hRdc; /* Parent handle */ |
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| 324 | uint32_t *pulRULAddr; /* RUL address */ |
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| 325 | uint32_t *pulRULCacheAddr; /* RUL cached address */ |
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| 326 | uint32_t ulAddrOffset; /* Device offset address */ |
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| 327 | uint32_t ulEntries; /* Number of entries in slot */ |
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| 328 | uint32_t ulMaxEntries; /* Max number of entries */ |
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| 329 | bool bLastExecuted; /* Check if last list assignment executed. */ |
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| 330 | |
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| 331 | uint32_t ulNumSlotAssigned; /* Number of slots the list assigned to */ |
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| 332 | BRDC_P_Slot_Head *pSlotAssigned; /* Double link list to keep track of which slots the list assigned to */ |
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| 333 | |
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| 334 | /* for RDC list debugging */ |
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| 335 | BRDC_DBG_ListEntry eNextEntry; |
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| 336 | uint32_t *pulCurListAddr; |
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| 337 | uint32_t ulNumEntries; |
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| 338 | uint32_t ulCurrCommand; |
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| 339 | int iCommandIndex; |
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| 340 | int iDataCount; |
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| 341 | |
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| 342 | } BRDC_P_List_Handle; |
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| 343 | |
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| 344 | |
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| 345 | /*************************************************************************** |
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| 346 | * Functions |
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| 347 | ***************************************************************************/ |
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| 348 | BERR_Code BRDC_P_SoftReset |
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| 349 | ( BRDC_Handle hRdc ); |
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| 350 | |
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| 351 | BERR_Code BRDC_Slot_P_GetNextSlot |
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| 352 | ( BRDC_Handle hRdc, |
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| 353 | BRDC_SlotId *pSlotId ); |
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| 354 | |
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| 355 | BERR_Code BRDC_Slot_P_Write_Registers_isr |
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| 356 | ( BRDC_Slot_Handle hSlot, |
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| 357 | BRDC_Trigger eRDCTrigger, |
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| 358 | bool bRecurring, |
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| 359 | bool bExecuteOnTrigger ); |
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| 360 | |
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| 361 | BERR_Code BRDC_P_AcquireSemaphore_isr |
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| 362 | ( BRDC_Handle hRdc, |
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| 363 | BRDC_SlotId eSlotId ); |
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| 364 | |
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| 365 | void BRDC_P_ReleaseSemaphore_isr |
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| 366 | ( BRDC_Handle hRdc, |
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| 367 | BRDC_SlotId eSlotId ); |
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| 368 | |
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| 369 | void BRDC_P_DumpSlot |
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| 370 | ( BRDC_Handle hRdc, |
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| 371 | BRDC_SlotId eSlotId ); |
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| 372 | |
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| 373 | #ifdef __cplusplus |
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| 374 | } |
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| 375 | #endif |
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| 376 | |
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| 377 | #endif /* #ifndef BRDC__PRIVATE_H__ */ |
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| 378 | |
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| 379 | /* end of file */ |
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