source: svn/newcon3bcm2_21bu/magnum/portinginterface/gio/7552/bgio_pin_priv.h

Last change on this file was 76, checked in by megakiss, 10 years ago

1W 대기전력을 만족시키기 위하여 POWEROFF시 튜너를 Standby 상태로 함

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File size: 5.9 KB
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1/***************************************************************************
2 *     Copyright (c) 2003-2012, Broadcom Corporation
3 *     All Rights Reserved
4 *     Confidential Property of Broadcom Corporation
5 *
6 *  THIS SOFTWARE MAY ONLY BE USED SUBJECT TO AN EXECUTED SOFTWARE LICENSE
7 *  AGREEMENT  BETWEEN THE USER AND BROADCOM.  YOU HAVE NO RIGHT TO USE OR
8 *  EXPLOIT THIS MATERIAL EXCEPT SUBJECT TO THE TERMS OF SUCH AN AGREEMENT.
9 *
10 * $brcm_Workfile: bgio_pin_priv.h $
11 * $brcm_Revision: Hydra_Software_Devel/13 $
12 * $brcm_Date: 4/24/12 3:01p $
13 *
14 * Module Description:
15 *
16 * Revision History:
17 *
18 * $brcm_Log: /magnum/portinginterface/gio/7435/bgio_pin_priv.h $
19 *
20 * Hydra_Software_Devel/13   4/24/12 3:01p tdo
21 * SW7584-10: Add PI/gio support for 7584
22 *
23 * Hydra_Software_Devel/12   6/17/11 3:00p tdo
24 * SWDTV-7592: add BDBG_OBJECT_ASSERT for BGIO
25 *
26 * Hydra_Software_Devel/11   6/16/11 5:59p tdo
27 * SWDTV-7592: add BDBG_OBJECT_ASSERT for BGIO.
28 *
29 * Hydra_Software_Devel/10   6/16/11 11:26a tdo
30 * SWDTV-7292: Re-org GIO code
31 *
32 * Hydra_Software_Devel/9   11/17/10 9:02a tdo
33 * SW7231-11: Add GIO PI support for 7231/7344/7346
34 *
35 * Hydra_Software_Devel/8   11/17/10 12:37a tdo
36 * SW7231-11: Undo previous check-in, waiting for the rest of changeset
37 * check-in clear (due to mastership)
38 *
39 * Hydra_Software_Devel/7   11/16/10 11:56p tdo
40 * SW7231-11: Add GIO PI support for 7231/7344/7346
41 *
42 * Hydra_Software_Devel/6   4/8/08 5:47p tdo
43 * PR41205: Add _isr functions to avoid deadlock
44 *
45 * Hydra_Software_Devel/5   2/27/08 11:54a tdo
46 * PR34956: Re-organize GPIO pin  mux and add 3548 support.
47 *
48 * Hydra_Software_Devel/4   9/12/07 5:58p syang
49 * PR 30391, PR 32351: BGIO only init for the pin created by BGIO to ovoid
50 * override configures by other sw entity; BGIO read from HW reg (no more
51 * sw buffering);
52 *
53 * Hydra_Software_Devel/3   2/24/04 7:20p syang
54 * PR 9785: more api function implementations are added
55 *
56 * Hydra_Software_Devel/2   2/20/04 4:53p syang
57 * PR 9785: check in before clearcase upgrade world wise
58 *
59 * Hydra_Software_Devel/1   2/20/04 11:23a syang
60 * PR 9785: init version
61 *
62 ***************************************************************************/
63#ifndef BGIO_PIN_PRIV_H__
64#define BGIO_PIN_PRIV_H__
65
66#include "blst_list.h"
67#include "bgio.h"
68#include "bgio_macro.h"
69
70#ifdef __cplusplus
71extern "C" {
72#endif
73
74BDBG_OBJECT_ID_DECLARE(BGIO_PIN);
75
76#define BGIO_P_PIN_SET_BLACK_MAGIC(handle) \
77        BGIO_GENERIC_SET_BLACK_MAGIC((handle), BGIO_P_Pin_Context)
78
79#define BGIO_P_NULL_REG          0
80#define BGIO_P_GIO_REG           1
81
82/***************************************************************************
83 * Pin Context
84 */
85typedef struct BGIO_P_Pin_Context
86{
87        BDBG_OBJECT(BGIO_PIN)
88
89        uint32_t   ulBlackMagic;   /* Black magic for handle validation */
90
91        /* created from this handle */
92        BGIO_Handle  hGpio;
93
94        /* pin info */
95        BGIO_PinId     ePinId;
96        BGIO_PinType   ePinType;
97        BGIO_IntrMode  eIntrMode;
98
99        /* struct {pNext, pPre} for linking */
100        BLST_D_ENTRY(BGIO_P_Pin_Context) Link;
101
102} BGIO_P_Pin_Context;
103
104/***************************************************************************
105 * Pin mux control for one pin
106 */
107typedef struct BGIO_P_PinMux
108{
109        BGIO_PinId ePinId;        /* pin number */
110        uint32_t   ulReg;         /* register addr offset */
111        uint32_t   ulBitMask;     /* bit mask for this pin in the reg */
112        uint32_t   ulValue;       /* mux value set for this pin in the reg */
113
114} BGIO_P_PinMux;
115
116/***************************************************************************
117 * Pin mux control setting in GIO register
118 */
119typedef struct BGIO_P_PinSet
120{
121        BGIO_PinId   eSetLo;         /* First pin of Set Lo */
122        BGIO_PinId   eSetHi;         /* First pin of Set Hi */
123        BGIO_PinId   eSetExt;        /* First pin of Set Ext */
124        BGIO_PinId   eSetExtHi;      /* First pin of Set Ext Hi */
125        BGIO_PinId   eSetExt2;       /* First pin of Set Ext2 */
126        uint32_t     ulSetSgio;      /* The set number where sgio pins are located */
127        uint32_t     ulSetSgioShift; /* Number of bit shift in sgio set */
128} BGIO_P_PinSet;
129
130/***************************************************************************
131 *
132 * API support functions
133 *
134 ***************************************************************************/
135
136/***************************************************************************
137 *
138 */
139BERR_Code BGIO_P_Pin_Create(
140        BGIO_Handle           hGpio,
141        BGIO_PinId            ePinId,
142        BGIO_Pin_Handle *     phPin );
143
144/***************************************************************************
145 *
146 */
147BERR_Code BGIO_P_Pin_Destroy(
148        BGIO_Pin_Handle       hPin );
149
150/***************************************************************************
151 *
152 */
153BERR_Code BGIO_P_Pin_SetType(
154        BGIO_Pin_Handle       hPin,
155        BGIO_PinType          ePinType,
156        bool                  bInIsr );
157
158/***************************************************************************
159 *
160 */
161BERR_Code BGIO_P_Pin_GetValue(
162        BGIO_Pin_Handle       hPin,
163        BGIO_PinValue *       pePinValue );
164
165/***************************************************************************
166 *
167 */
168BERR_Code BGIO_P_Pin_SetValue(
169        BGIO_Pin_Handle       hPin,
170        BGIO_PinValue         ePinValue,
171        bool                  bInIsr );
172
173/***************************************************************************
174 *
175 */
176BERR_Code BGIO_P_Pin_SetIntrMode(
177        BGIO_Pin_Handle       hPin,
178        BGIO_IntrMode         eIntrMode,
179        bool                  bInIsr );
180
181/***************************************************************************
182 *
183 */
184BERR_Code BGIO_P_Pin_ClearIntrStatus(
185        BGIO_Pin_Handle       hPin,
186        bool                  bInIsr );
187
188/***************************************************************************
189 *
190 */
191BERR_Code BGIO_P_Pin_GetIntrStatus(
192        BGIO_Pin_Handle       hPin,
193        bool *                pbFire );
194
195/***************************************************************************
196 *
197 */
198const BGIO_P_PinMux * BGIO_P_GetPinMux(
199        BGIO_PinId            ePinId );
200
201const BGIO_P_PinSet * BGIO_P_GetPinMapping( void );
202
203#ifdef __cplusplus
204}
205#endif
206
207#endif /* #ifndef BGIO_PIN_PRIV_H__ */
208
209/* end of file */
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