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bhdm.c @ 76

Last change on this file since 76 was 76, checked in by megakiss, 10 years ago
1W 대기전력을 만족시키기 위하여 POWEROFF시 튜너를 Standby 상태로 함
Property svn:executable set to ``*
File size: 126.5 KB

Line
1	/***************************************************************************
2	* Copyright (c) 2003-2012, Broadcom Corporation
3	* All Rights Reserved
4	* Confidential Property of Broadcom Corporation
5	*
6	* THIS SOFTWARE MAY ONLY BE USED SUBJECT TO AN EXECUTED SOFTWARE LICENSE
7	* AGREEMENT BETWEEN THE USER AND BROADCOM. YOU HAVE NO RIGHT TO USE OR
8	* EXPLOIT THIS MATERIAL EXCEPT SUBJECT TO THE TERMS OF SUCH AN AGREEMENT.
9	*
10	* $brcm_Workfile: bhdm.c $
11	* $brcm_Revision: Hydra_Software_Devel/314 $
12	* $brcm_Date: 2/29/12 4:05p $
13	*
14	* Module Description:
15	*
16	* Revision History:
17	*
18	* $brcm_Log: /magnum/portinginterface/hdm/7038/bhdm.c $
19	*
20	* Hydra_Software_Devel/314 2/29/12 4:05p rgreen
21	* SW7125-1146,SW7408-317,SW7425-2518: Fix RxSense status callback value
22	* to use RxSense status vs HotPlug status
23	*
24	* Hydra_Software_Devel/313 2/29/12 1:36p rgreen
25	* SW7425-2515,SW7425-2518: Remove unused CEC code which is now located in
26	* CEC pi; Fix RxSense debug message.
27	*
28	* Hydra_Software_Devel/312 2/23/12 10:49a rgreen
29	* SW7125-1146,SW7408-317: Merge changes
30	*
31	* Hydra_Software_Devel/SW7408-317/2 2/22/12 1:14p rgreen
32	* SW7125-1146,SW7408-317: Remove enabling of TMDS at hotplug interrupt,
33	* let higher level enable TMDS when ready
34	*
35	* Hydra_Software_Devel/SW7408-317/1 2/21/12 6:32p rgreen
36	* SW7125-1146,SW7408-317: Treat RxSense and HP events separately. Update
37	* processing of both events
38	*
39	* Hydra_Software_Devel/311 2/17/12 4:09p rgreen
40	* SW7125-1146,SW7408-317: leave TMDS enabled after Rx is connected.
41	* Some devices require time to allow the RxSense to be read; Force
42	* reading RxSense when GetReceiverSense is called
43	*
44	* Hydra_Software_Devel/310 2/10/12 9:49a rgreen
45	* SW7231-627: Set bForceEnableDisplay to false after BHDM_EnableDisplay
46	*
47	* Hydra_Software_Devel/309 2/9/12 3:59p rgreen
48	* SW7231-345,SW7125-1146,SW7425-2361: Refactor HDMI Power Management;
49	* separate TMDS power from clock
50	*
51	* Hydra_Software_Devel/308 2/8/12 2:23p rgreen
52	* SW7231-345,SW7125-1146: Merge Changes
53	*
54	* Hydra_Software_Devel/SW7125-1146/6 2/7/12 9:09a rgreen
55	* SW7231-345,SW7125-1146: On Resume, always return success if Rx device
56	* has been disconneced. Fixes forced assert for BHDM_EnableDisplay
57	*
58	* Hydra_Software_Devel/SW7125-1146/5 2/3/12 5:20p rgreen
59	* SW7231-345,SW7125-1146: Do not enable/disable TMDS lines when in power
60	* management mode;
61	*
62	* Hydra_Software_Devel/SW7125-1146/4 2/3/12 3:12p rgreen
63	* SW7231-345,SW7125-1146: Check Receiver Sense whenever a RxDevice is
64	* connected. Leave TMDS enabled if Rx is powered; Remove isr RxSense
65	* check in GetReceiverSense call... use state variable instead
66	*
67	* Hydra_Software_Devel/SW7125-1146/3 2/1/12 2:04p rgreen
68	* SW7231-345,SW7125-1146: Enable/Disable RSEN interrupt in EnableDisplay
69	* and DisableDisplay calls to prevent isr call when registers are
70	* powered down (crash).
71	*
72	* Hydra_Software_Devel/307 1/27/12 2:10p vle
73	* SW7125-1146: merge to mainline
74	*
75	* Hydra_Software_Devel/SW7125-1146/2 1/26/12 5:35p vle
76	* SW7125-1146: Get RSEN setting at isr vs event time for applicable
77	* platforms
78	*
79	* Hydra_Software_Devel/306 1/23/12 11:26a rgreen
80	* SW7125-1146: Merge Changes
81	*
82	* Hydra_Software_Devel/SW7125-1146/1 1/19/12 2:34p rgreen
83	* SW7125-1146: Enable TMDS at open to fix interrupt issue; Get RSEN
84	* setting at isr vs event time; Add debug configurations for RSEN amd
85	* TMDS settings
86	*
87	* Hydra_Software_Devel/305 1/6/12 6:02p vle
88	* SW7435-11: implement support for check/clearHotplugInterrupt for 7435
89	*
90	* Hydra_Software_Devel/304 1/6/12 2:58p vle
91	* SW7435-11: Add support for 7435
92	*
93	* Hydra_Software_Devel/303 1/4/12 3:30p rgreen
94	* SW7405-5004: Use BAVC_HDMI_xxx macros vs BHDM_xxx macros; use bool
95	* return types in BHDM_P_HdmiSettingsChange vs integer type
96	*
97	* Hydra_Software_Devel/302 12/20/11 2:03p rgreen
98	* SW7425-2037: Force reconfigure of display after TMDS lines are
99	* disabled/re-enabled
100	*
101	* Hydra_Software_Devel/301 12/12/11 3:31p rgreen
102	* SW7405-4677: Merge changes
103	*
104	* Hydra_Software_Devel/SW7405-4677/1 11/22/11 3:31p rgreen
105	* SW7405-4677: Adjust HDMI transition timeout based on video format
106	*
107	* Hydra_Software_Devel/300 12/2/11 4:53p jtna
108	* SW7425-1708: fix standby wakeup. the if logic was flipped
109	*
110	* Hydra_Software_Devel/299 11/30/11 11:21a rgreen
111	* SW7405-5004: Merge changes
112	*
113	* Hydra_Software_Devel/SW7425-1140/3 11/30/11 11:14a rgreen
114	* SW7405-5004: Replace BKNI_Memcmp for structure with field by field
115	* comparison
116	*
117	* Hydra_Software_Devel/298 11/22/11 6:02p vle
118	* SW7425-1140: Merge to mainline. Remove all CEC functionality out of
119	* HDM PI.
120	*
121	* Hydra_Software_Devel/SW7425-1140/2 11/22/11 5:47p vle
122	* SW7425-1140: Add BHDM_CONFIG_CEC_LEGACY_SUPPORT for backward compatible
123	* for CEC legacy platforms.
124	*
125	* Hydra_Software_Devel/SW7425-1140/1 11/16/11 12:16p vle
126	* SW7425-1140: Remove all CEC functionalities out of HDM PI
127	*
128	* Hydra_Software_Devel/297 11/14/11 2:15p rgreen
129	* SW7425-1710: Update BHDM_CONFIG macro usage. Describe specific
130	* functionality vs chip process
131	*
132	* Hydra_Software_Devel/296 11/4/11 4:34p rgreen
133	* SW7125-1128,SW7125-1138: Use register based General Control Packet
134	* only when attached receiver supports Deep Color
135	*
136	* Hydra_Software_Devel/295 10/18/11 1:06p vle
137	* SWBLURAY-26139: Ensure CEC_ADDR is set to UNREGISTER address (0xF) by
138	* default.
139	*
140	* Hydra_Software_Devel/294 10/11/11 4:50p vle
141	* SW7429-5: Add support for 7429.
142	*
143	* Hydra_Software_Devel/293 9/15/11 4:27p rgreen
144	* SW7425-1296: Set SPD Default Descrption to Reference Board vs Reference
145	* Sw
146	*
147	* Hydra_Software_Devel/292 9/14/11 3:17p rgreen
148	* SW7420-2059: Remove macro date/time macros in Open
149	*
150	* Hydra_Software_Devel/291 9/8/11 4:55p rgreen
151	* SW7425-610: Fix enum mapping for 1280x1024
152	*
153	* Hydra_Software_Devel/290 9/8/11 3:56p rgreen
154	* SW7425-610,SW7325-664: Add support for 1280x1024; Add more descriptive
155	* message when BFMT format is not supported; Initialize AVI InfoFrame
156	* Bar Info to invalid
157	*
158	* Hydra_Software_Devel/289 8/17/11 6:37p vle
159	* SW7231-322: Add support for 7231B0
160	*
161	* Hydra_Software_Devel/288 7/9/11 2:48a vle
162	* SW7422-460: Fix build errors on older 65nm platforms (7405/7335, etc.)
163	*
164	* Hydra_Software_Devel/287 7/1/11 10:48a vle
165	* SW7422-460: merge bdvd changes to mainline
166	*
167	* Hydra_Software_Devel/bdvd_v4.0/2 6/30/11 2:40p rbshah
168	* SWBLURAY-26245:[ see Broadcom Issue Tracking JIRA for more info ]
169	*
170	* Hydra_Software_Devel/bdvd_v4.0/1 6/28/11 5:31p rbshah
171	* SWBLURAY-26245:[ see Broadcom Issue Tracking JIRA for more info ]
172	*
173	* Hydra_Software_Devel/286 6/28/11 4:29p vle
174	* SW7346-234: Merge to mainline
175	*
176	* Hydra_Software_Devel/SW7346-234/1 6/24/11 6:07p vle
177	* SW7346-234: Disable RSEN interrupt until the PHY is powered on.
178	*
179	* Hydra_Software_Devel/285 6/7/11 6:44p vle
180	* SW7425-532: Add HDMI CEC support for 40nm chip. Use correct CEC
181	* interrupt.
182	*
183	* Hydra_Software_Devel/284 5/20/11 4:06p vle
184	* SW7550-696: Reset CEC logical address when HPD disconnect
185	*
186	* Hydra_Software_Devel/283 2/17/11 7:38p jtna
187	* SW7420-1141: rework HDMI power management. break public API to allow
188	* for StandbySettings
189	*
190	* Hydra_Software_Devel/282 1/11/11 4:38p jtna
191	* SW7420-1377: remove unnecessary power management code for DVO support
192	*
193	* Hydra_Software_Devel/281 12/21/10 3:27p vle
194	* SW7422-130: Merge to main branch
195	*
196	* Hydra_Software_Devel/SW7422-130/4 12/21/10 2:10p vle
197	* SW7422-130: Update VSPO parameters
198	*
199	* Hydra_Software_Devel/SW7422-130/3 12/20/10 7:45p vle
200	* SW7422-130: When configure HDMI in master mode, do not RECENTER fifo
201	* and USE_FULL has to be set to 0
202	*
203	* Hydra_Software_Devel/280 12/16/10 5:07p vle
204	* SW7422-130: merge to main branch
205	*
206	* Hydra_Software_Devel/SW7422-130/2 12/9/10 6:49p vle
207	* SW7422-130: Update parameters for 1080p@30_3DOU format
208	*
209	* Hydra_Software_Devel/SW7422-130/1 12/8/10 7:26p vle
210	* SW7422-130: Add support for 3DTV formats.
211	*
212	* Hydra_Software_Devel/279 12/9/10 6:01p vle
213	* SW7420-1177: Add DVO support for 7420
214	*
215	* Hydra_Software_Devel/278 12/8/10 5:07p rgreen
216	* SW7572-215: Update default Audio Infoframe Channel Count to 2 channels
217	* (value of 1). Make use of enumerations instead of integers.
218	*
219	* Hydra_Software_Devel/278 12/8/10 4:56p rgreen
220	* SW7572-215: Update default Audio Infoframe Channel Count to 2 channels
221	* (CC=1). Make use of enumerations instead of integers
222	*
223	* Hydra_Software_Devel/277 11/29/10 4:13p vle
224	* SW7422-97: Fix compiler warning
225	*
226	* Hydra_Software_Devel/276 11/24/10 11:12a vle
227	* SW7422-97: Update HDMI PHY Settings for 40nm core.
228	*
229	* Hydra_Software_Devel/275 11/19/10 5:02p vle
230	* SW7422-23: RSEN interrupt is available in 40nm core.
231	*
232	* Hydra_Software_Devel/274 10/20/10 6:48p jtna
233	* SW7420-972: added standby/resume functions. removed references to
234	* 108MHz BCHP_PWR node.
235	*
236	* Hydra_Software_Devel/273 10/7/10 6:47p jtna
237	* SW7420-972: merge hdmi power management
238	*
239	* Hydra_Software_Devel/SW7420-972/1 10/6/10 7:00p jtna
240	* SW7420-972: BCHP_PWR power management for HDM
241	*
242	* Hydra_Software_Devel/272 9/29/10 4:13p vle
243	* SW7422-23: Fix build issues without CEC enable
244	*
245	* Hydra_Software_Devel/271 9/28/10 7:18p vle
246	* SW7422-23: Refactor HDMI code to isolate platform dependent code
247	* furthermore. Add support for 7422 and other 40nm platforms.
248	*
249	* Hydra_Software_Devel/270 9/28/10 12:20p agin
250	* SWNOOS-425: Fix GHS compiler error.
251	*
252	* Hydra_Software_Devel/269 9/22/10 7:10p vle
253	* SW7405-4782: Merge to main branch
254	*
255	* Hydra_Software_Devel/SW7405-4782/1 9/10/10 8:43p vle
256	* SW7405-4782: Changing aspect ratio does not require HDCP re-
257	* authentication.
258	*
259	* Hydra_Software_Devel/268 9/7/10 7:20p vle
260	* SW7420-1054: isr calls need to be protected by a critical section
261	*
262	* Hydra_Software_Devel/267 6/28/10 6:59p vle
263	* SW7208-59: Add API to control the HDMI data transfer mode, master or
264	* slave
265	*
266	* Hydra_Software_Devel/266 5/13/10 5:18p vle
267	* SW7420-579: Fix build error if enable DEBUG_AVI_INFOFRAME debug build.
268	*
269	* Hydra_Software_Devel/265 5/5/10 10:35a vle
270	* SW7420-294: PAL_M should be treating as 480i, not 576i
271	*
272	* Hydra_Software_Devel/264 4/19/10 12:36p vle
273	* SW7420-686: Update misleading error message.
274	*
275	* Hydra_Software_Devel/263 4/15/10 7:05p vle
276	* SW7420-543: fix pixel repetition (2x, 4x) for 480p
277	*
278	* Hydra_Software_Devel/263 4/15/10 7:04p vle
279	* SW7420-543: fix pixel repetition (2x, 4x) on 480p
280	*
281	* Hydra_Software_Devel/262 4/14/10 7:19p rgreen
282	* SW7405-3997: Fix creation of IEEE RegID for VSI transmission: SW7405-
283	* 3997:
284	*
285	* Hydra_Software_Devel/261 4/12/10 3:30p vle
286	* SW7325-716, SW7405-4195: missing condition compile for platforms
287	* without 1080p 50/60hz support.
288	*
289	* Hydra_Software_Devel/260 4/2/10 6:40p vle
290	* SW7601-172: Rename to clearly indicate SetGamutMetadataPacket is a
291	* private API.
292	*
293	* Hydra_Software_Devel/259 3/29/10 3:06p vle
294	* SW7335-685: Fix DRIFT FIFO under flow/ over flow when authenticate with
295	* DVI receivers.
296	*
297	* Hydra_Software_Devel/258 3/26/10 4:33p vle
298	* SW7601-172: Merge xvYCC support with Gamut Metadata Packet transmission
299	* from bdvd branch
300	*
301	* Hydra_Software_Devel/257 3/16/10 6:45p vle
302	* SW3548-2820: Initialized default setting for hdmi 3D structure setting
303	*
304	* Hydra_Software_Devel/256 2/26/10 5:17p vle
305	* SW7405-3016: Remove software i2c settings from HDM PI. This mode is
306	* configure in I2C module
307	*
308	* Hydra_Software_Devel/255 2/23/10 12:48a vle
309	* SW7420-579: Refactor HDMI PI.
310	*
311	* Hydra_Software_Devel/31 1/18/10 6:47p vle
312	* SW7342-129: Add BHDM_GetPreEmphasisConfiguration and
313	* BHDM_SetPreEmphasisConfiguration implementations.
314	*
315	* Hydra_Software_Devel/30 1/15/10 3:34p vle
316	* SW7401-4355: Add support for Vendor Specific Infoframe
317	*
318	* Hydra_Software_Devel/29 1/8/10 5:19p vle
319	* SW7405-3740: Port changes to 7420, 7468, and other platforms.
320	* Add isr callback to provide immediate notifcation of HP changes vs
321	* waiting for event processing
322	*
323	* Hydra_Software_Devel/28 1/7/10 5:10p vle
324	* SW7420-536: Add method to use RAM packets to generate GCP Packets for
325	* various platforms.
326	*
327	* Hydra_Software_Devel/27 1/6/10 4:38p vle
328	* SW3548-2670: Centralize all CEC timing configurations
329	*
330	* Hydra_Software_Devel/26 10/1/09 11:38p agin
331	* SWNOOS-375: Fixed compiler error.
332	*
333	* Hydra_Software_Devel/25 9/22/09 1:31p vle
334	* SW7601-164: Take out the sanity check in BHDM_SetColorDepth because
335	* this is a bug found by LG, PR16484 in DVD projects
336	*
337	* Hydra_Software_Devel/24 9/21/09 6:13p vle
338	* SW7601-164: merge in changes in bdvd_v3.0 branch.
339	*
340	* Hydra_Software_Devel/bdvd_v3.0/7 9/21/09 3:01p rbshah
341	* PR16772[DVD]:[ see HiDef-DVD bug tracking system for more info ]. The
342	* ability to have the app. get/set the N value for HW-CTS was
343	* added as precautionary measure. Appears it's not needed anymore
344	* so taking it out.
345	*
346	* Hydra_Software_Devel/23 9/18/09 3:40p vle
347	* SW7601-164: Merge fixes from DVD projects (bdvd_v3.0 branch) into main
348	* Hydra branch.
349	*
350	* Hydra_Software_Devel/bdvd_v3.0/6 9/14/09 12:54p rbshah
351	* PR16484[DVD]:[ see HiDef-DVD bug tracking system for more info ].
352	* Removed unnecessary (and erroneous) cross checking of TV's capability
353	* and our configuration of the desired color-space (YCC vs. RGB).
354	*
355	* Hydra_Software_Devel/bdvd_v3.0/5 9/11/09 4:04p rbshah
356	* PR16468[DVD]:[ see HiDef-DVD bug tracking system for more info ]. Back
357	* out MAI bus channel assignment change made on Hydra_Software. It
358	* was made for 7400 but breaks HBR on 76xx. Refer to Digital Video GNATs
359	* PR_48151 for more.
360	*
361	* Hydra_Software_Devel/bdvd_v3.0/4 9/2/09 3:31p rbshah
362	* PR16468[DVD]:[ see HiDef-DVD bug tracking system for more info ].
363	* Merged with the latest portinginterface/hdm and syslib/hdcplib files.
364	*
365	* Hydra_Software_Devel/bdvd_v3.0/3 8/18/09 1:22p rbshah
366	* PR_16257[DVD]:[ see HiDef-DVD bug tracking system for more info ].
367	* This only takes care of HDMI.
368	*
369	* Hydra_Software_Devel/bdvd_v2.0/bdvd_v2.1/4 7/27/09 2:53p rbshah
370	* PR_15746[DVD]:[ see HiDef-DVD bug tracking system for more info ].
371	* Merge fix from Hydra_Software (version 20). Also addresses PR15748.
372	* Credit goes to Ian L. and Mark P. for chasing this down with Vincent Y.
373	*
374	* Hydra_Software_Devel/bdvd_v2.0/bdvd_v2.1/3 7/14/09 1:30p rbshah
375	* PR_15413[DVD]:[ see HiDef-DVD bug tracking system for more info ].
376	* Merge work from the HDMI certification branch. Also addresses PR15437
377	* and PR15220 (merged from v2.0). Plus coverity PR15782.
378	*
379	* Hydra_Software_Devel/bdvd_v2.0/bdvd_v2.1/bdvd_hdmi_cert_v2.1/1 7/8/09 12:18p rbshah
380	* Various fixes for Auto Hardware Ri,Pj checking. I2C changes are
381	* temporary. Switch from software to hardware Ri checking by default.
382	*
383	* Hydra_Software_Devel/bdvd_v2.0/bdvd_v2.1/2 4/13/09 7:28p etrudeau
384	* PR_13071[DVD]:[ see HiDef-DVD bug tracking system for more info ]. Add
385	* support for HDMI Consumer Electronic Control (CEC) for remote control
386	* of player and other interaction with HDMI devices.
387	* To disable, export pe_disable_cec=y
388	*
389	* Hydra_Software_Devel/bdvd_v2.0/bdvd_v2.1/1 4/3/09 6:12p rbshah
390	* PR_13071[DVD]:[ see HiDef-DVD bug tracking system for more info ]. Add
391	* CEC support at the BDVD/Display API. This is really a back port
392	* from bdvd_v2.0 and dev_pr13071 branches.
393	*
394	* Hydra_Software_Devel/bdvd_v3.0/2 8/12/09 5:01p rbshah
395	* PR_15295[DVD]:[ see HiDef-DVD bug tracking system for more info ]. Fix
396	* race between VDC and HDMI. The PHY PLL programming was being
397	* done in two places (for Dune) and should only be in one place.
398	*
399	* Hydra_Software_Devel/22 9/1/09 2:00p vle
400	* SW7630-17: Add support for Grain 7630
401	*
402	* Hydra_Software_Devel/21 8/26/09 3:41p vle
403	* SW7405-2670:
404	* Add implementation of interrupt based receiver sense
405	*
406	* Hydra_Software_Devel/20 7/24/09 11:17a vle
407	* PR56954: Fix HDMI audio channel mapping.
408	*
409	* Hydra_Software_Devel/19 7/22/09 7:35p vle
410	* PR56776: Prevent HDCP An Timeout
411	*
412	* Hydra_Software_Devel/18 7/14/09 4:04p vle
413	* PR56606: Fix coverity issue.
414	*
415	* Hydra_Software_Devel/17 7/13/09 11:42a vle
416	* PR53475: downgrade CEC interrupt message to warning instead of error.
417	*
418	* Hydra_Software_Devel/16 6/25/09 3:04p vle
419	* PR56132, PR48151:
420	* Add support for Get HDMI Vendor Specific Info Frame
421	* Correct channel assignment for PCM 5.1
422	*
423	* Hydra_Software_Devel/15 5/12/09 2:16a vle
424	* PR 54851: Implement a dynamic mode in the PI where HDCP 1.1 feature
425	* will be disabled when a pre-define occurance of Pj Link Failures is
426	* met.
427	*
428	* Hydra_Software_Devel/14 5/11/09 11:51a vle
429	* PR52978: Add support for 7635
430	*
431	* Hydra_Software_Devel/bdvd_v3.0/1 5/1/09 9:29a rbshah
432	* PR_14471[DVD]:[ see HiDef-DVD bug tracking system for more info ].
433	* Bring HDMI to life. Audio is muted unconditionally all the time to
434	* avoid noisy output (given the chip bug).
435	*
436	* Qucik verification of HDCP and all supported video resolutions.
437	*
438	* Reviewer: Narasimha.
439	*
440	* Hydra_Software_Devel/13 4/8/09 11:52a vle
441	* PR52978: Add support for 7635
442	*
443	* Hydra_Software_Devel/12 3/11/09 6:29p vle
444	* PR52873: Merge changes from bdvd_v2.0 branch to Hydra branch
445	* Ensure we don't miss a hot-plug pulse whenever we're waiting.
446	* Ensure HDMI input/drift FIFO is initialized and re-centered, disable
447	* GCP packet generation when connect to DVI monitors.
448	* Updated all the Audio CRP N-CTS values (both SW and HW CTS modes)
449	*
450	* Hydra_Software_Devel/bdvd_v2.0/21 3/9/09 1:58p rbshah
451	* PR_10346 [ see HiDef-DVD bug tracking system for more info ]. Updated
452	* all the Audio CRP N-CTS tables with those generated by the HW
453	* folks (Vincent Y. and Chris P.). We now have "official" values for both
454	* HW and SW CTS modes.
455	*
456	* Also modified the Display/HDMI API so application can only set N values
457	* related to HW CTS. In other words, prior API for updating SW CTS values
458	* was removed.
459	*
460	* Tested all audio sample rates (except 176.4KHz) at all color depths and
461	* all relevant pixel clock rates using both HW and CW CTS with the Astro.
462	*
463	* Hydra_Software_Devel/bdvd_v2.0/17 2/11/09 11:30a rbshah
464	* PR_13097 [ see HiDef-DVD bug tracking system for more info ]. Ensure
465	* HDMI input/drift FIFO is initialized and re-centered when we're
466	* connected to DVI monitors.
467	*
468	* Also ensure GCP packet generation is disabled when we're in DVI mode.
469	*
470	* Hydra_Software_Devel/bdvd_v2.0/12 1/29/09 3:41p rbshah
471	* PR_12826 [ see HiDef-DVD bug tracking system for more info ]. Ensure
472	* we don't miss a hot-plug pulse whenever we're waiting (in
473	* the PI as well as BDVD). Also removed an unnecessary wait before
474	* starting HDCP.
475	*
476	* Hydra_Software_Devel/11 3/9/09 3:20p vle
477	* PR50570, PR50918, PR49277, PR49652, PR52873:
478	* Add API to mute/unmute audio, update pixel repitition support, add
479	* SetPixelDataOverride API for transmission of black video. Merge
480	* changes/updates from bdvd_v2.0 to main branch.
481	*
482	* Hydra_Software_Devel/10 3/3/09 8:23p vle
483	* PR50569: Add HW Ri/Pj checking feature. Merged from bdvd branch after
484	* Rajul's testing effort.
485	*
486	* Hydra_Software_Devel/9 2/17/09 6:48p vle
487	* PR 51414, PR 45656: Leave HDMI PHY settings to VDC for 7420 platform.
488	* Update call back debug message
489	*
490	* Hydra_Software_Devel/bdvd_v2.0/11 1/27/09 4:18p rbshah
491	* PR_12826 [ see HiDef-DVD bug tracking system for more info ]. Add
492	* logic to wait for stable video to arrive from VEC before we
493	* start the HDCP authentication process.
494	*
495	* This checkin may not solve the Simplay failure at hand, but it's
496	* something that needs to be done anyway.
497	*
498	* Hydra_Software_Devel/bdvd_v2.0/10 1/23/09 10:14a rbshah
499	* PR_10346 [ see HiDef-DVD bug tracking system for more info ]. Checkin
500	* code drop from Anthony Le for Auto Ri,Pj feature in the
501	* 7601B0 (Digital Video PR50569).
502	*
503	* This is disabled by default and will be turned on once it has
504	* been tested and soaked.
505	*
506	* Did verify the A0 build!
507	*
508	* Hydra_Software_Devel/bdvd_v2.0/9 1/21/09 5:57p rbshah
509	* PR_10346 [ see HiDef-DVD bug tracking system for more info ]. Fix A0
510	* build broken with my checkin earlier for adding the HDMI
511	* audio mute functionality.
512	*
513	* Hydra_Software_Devel/bdvd_v2.0/8 1/21/09 11:56a rbshah
514	* PR_10346 [ see HiDef-DVD bug tracking system for more info ]. Enhance
515	* Display/HDMI API to allow application to mute/unmute just
516	* audio (Digital Video PR50570).
517	*
518	* This feature is only available on the 7601B0.
519	*
520	* Hydra_Software_Devel/bdvd_v2.0/7 1/20/09 5:06p rbshah
521	* PR_10346 [ see HiDef-DVD bug tracking system for more info ]. Take 2:
522	* need to shift the 8-bit color component values to 12-bits.
523	*
524	* Hydra_Software_Devel/bdvd_v2.0/6 1/20/09 4:02p rbshah
525	* PR_10346 [ see HiDef-DVD bug tracking system for more info ]. Use new
526	* B0 feature to transmit black video correctly in YCC color
527	* space [Digital Video PR49652].
528	*
529	* Hydra_Software_Devel/bdvd_v2.0/5 1/16/09 10:08a rbshah
530	* PR_12698 [ GCP Packet error happen in ATC test ]. Fix GCP Subpacket
531	* programming one more time.
532	*
533	* Hydra_Software_Devel/bdvd_v2.0/4 1/14/09 3:41p rbshah
534	* PR_10346 [ 7601 HDMI: uod bring up. ]. Continue to iron out wrinkles
535	* (including regressions) with deep color
536	* and pixel repetition support. Following specific fixes:
537	*
538	* -- Use 4 to indicate 24-bit color in GCP only if deep color receiver
539	* -- Corrected Pixel Repeat bits for 480i and 576 (2x,4x) in AVI
540	* Infoframe
541	* -- Updated HDMI PHY settings for 480i/576i 4x, 36-bit color [162MHz]
542	* -- Simulate VDC rate change for pixel repeat and deep color changes
543	*
544	* Tested all pixel repeat and deep color combinations with Astro as well
545	* as with Onkyo.
546	*
547	* Hydra_Software_Devel/8 1/12/09 7:30p vle
548	* PR49277: Merge to main branch
549	* Add pixel repetition support
550	*
551	* Hydra_Software_Devel/7 1/12/09 1:49p vle
552	* PR50918: Update HDMI PHY settings for 1080p deep color mode.
553	*
554	* Hydra_Software_Devel/PR49277/2 1/12/09 7:18p vle
555	* PR49277: Update to add pixel repetition support.
556	*
557	* Hydra_Software_Devel/bdvd_v2.0/3 1/12/09 5:18p rbshah
558	* PR_12066 [ Enable pixel repetition to allow HBR audio at lower video
559	* resolutions ]. Wrap up pixel repetition support at bdvd api. Quick
560	* verification of
561	* 480p and 576p 2x, 4x and 480i 4x at all color depths.
562	*
563	* Hydra_Software_Devel/bdvd_v2.0/2 1/9/09 5:57p rbshah
564	* PR_12066 [ Enable pixel repetition to allow HBR audio at lower video
565	* resolutions ]. Re-work VDC HDMI RM table and lookup. Also absorb
566	* pixel repetition
567	* support in BHDM from Anthony Le.
568	*
569	* Still work in progress.
570	*
571	* Hydra_Software_Devel/PR49277/1 1/8/09 4:30p vle
572	* PR49277: Add pixel repetition support for 480p
573	*
574	* Hydra_Software_Devel/6 12/23/08 7:33p vle
575	* PR50081: Merge to main branch.
576	* Fix to save the color depth settings.
577	* Also update to use new GCP configuration scheme for AVMute
578	* Add deep color support
579	*
580	* Hydra_Software_Devel/PR50081/3 12/18/08 3:23p vle
581	* PR50081: Fix to save the color depth settings.
582	* Also update to use new GCP configuration scheme for AVMute and update
583	* settings to address multi channel PCM issue on 480p.
584	*
585	* Hydra_Software_Devel/PR50081/2 12/11/08 2:18p vle
586	* PR50081: Add deep color support for 7601.
587	*
588	* Hydra_Software_Devel/PR50081/1 12/8/08 5:30p vle
589	* PR50081: add deep color support.
590	*
591	* Hydra_Software_Devel/5 12/2/08 8:02p vle
592	* PR48987: Add setting to enable I2C bit bang mode.
593	*
594	* Hydra_Software_Devel/4 12/2/08 11:21a vle
595	* PR49651: Fix CEC compiling issue for 7601/7420
596	* PR44535: Add settings to allow user to always force enable display even
597	* with the same HDMI settings.
598	*
599	* Hydra_Software_Devel/3 10/28/08 10:35p vle
600	* PR44535: Update CTS programming using Vincent latest calculated values.
601	* Merge changes from branch bdvd v2.0
602	*
603	* Hydra_Software_Devel/2 10/9/08 4:35p vle
604	* PR44535: Remove unused variable.
605	*
606	* Hydra_Software_Devel/1 10/9/08 4:06p vle
607	* PR44535: Merge to main branch support for 7601
608	*
609	* Hydra_Software_Devel/PR44535/5 10/2/08 8:46p vle
610	* PR44535: Update CTS , N-value programming after confirming with KK and
611	* Martin for various audio sampling rates.
612	*
613	* Hydra_Software_Devel/PR44535/4 9/24/08 1:46p vle
614	* PR44535: Update HDMI_TX_PHY_CTL_1 and HDMI_TX_PHY_CTL_2 settings
615	*
616	* Hydra_Software_Devel/PR44535/3 9/17/08 6:18p vle
617	* PR44535: CTS settings should be updated for video rate change callback
618	* only. Additional FIFO_CTL settings required.
619	*
620	* Hydra_Software_Devel/PR44535/2 9/12/08 2:54p vle
621	* PR44535: Update CTS settings. Add 1080p support.
622	*
623	* Hydra_Software_Devel/PR44535/bdvd_v2.0/1 9/5/08 4:57p rbshah
624	* PR_10374 [ Adding support for 7601 ]. Initial checkin for HDMI
625	* support. Not functional yet, but app_hdmi now
626	* compiles and runs. EDID is operational. Video support requires a few
627	* VDC tweaks that will come shortly (next day or two).
628	*
629	* Some of the BHDM changes provided by Anthony Le.
630	*
631	* Hydra_Software_Devel/PR44535/1 8/6/08 7:47p vle
632	* PR44535: Initial version
633	*
634	***************************************************************************/
635
636	#include "bstd.h"
637
638	#include "bhdm.h"
639	#include "bhdm_priv.h"
640	#include "bhdm_hdcp.h"
641
642	#if BCHP_PWR_SUPPORT
643	#include "bchp_pwr.h"
644	#endif
645
646	BDBG_MODULE(BHDM) ;
647
648
649	#define BHDM_CHECK_RC( rc, func ) \
650	do \
651	{ \
652	if( (rc = BERR_TRACE(func)) != BERR_SUCCESS ) \
653	{ \
654	goto done; \
655	} \
656	} while(0)
657
658
659
660	#if defined(BHDM_CONFIG_DVO_SUPPORT)
661	#define DVO_PORT 1
662	#define HDMI_PORT 0
663	#else
664	#define DVO_PORT 0
665	#define HDMI_PORT 1
666	#endif
667
668
669	/******************************************************************************
670	Summary:
671	Enumerated Type of the input display formats for the HDMI core. These are
672	indices to the BHDM_P_InputVideoFmt table. See BHDM_SupportedVideoFormats.
673	*******************************************************************************/
674	typedef enum
675	{
676	BHDM_InputVideoFmt_ePowerUp = 0, /* Invalid Power Up Format */
677	BHDM_InputVideoFmt_e640x480p, /* Safe Mode */
678	BHDM_InputVideoFmt_e1080i,
679	BHDM_InputVideoFmt_e480p,
680	BHDM_InputVideoFmt_e480i,
681	BHDM_InputVideoFmt_e720p,
682	BHDM_InputVideoFmt_e720p_24Hz,
683	BHDM_InputVideoFmt_e1080p_24Hz,
684	BHDM_InputVideoFmt_e1080p_25Hz,
685	BHDM_InputVideoFmt_e1080p_30Hz,
686
687	#if BHDM_CONFIG_1080P_5060HZ_SUPPORT
688	BHDM_InputVideoFmt_e1080p,
689	BHDM_InputVideoFmt_e1080p_50Hz,
690	#endif
691
692	BHDM_InputVideoFmt_e1080i_50Hz,
693	BHDM_InputVideoFmt_e720p_50Hz,
694	BHDM_InputVideoFmt_e576p_50Hz,
695
696	BHDM_InputVideoFmt_e576i_50Hz,
697
698	BHDM_InputVideoFmt_e720p_3DOU,
699	BHDM_InputVideoFmt_e720p_50Hz_3DOU,
700	BHDM_InputVideoFmt_e1080p_24Hz_3DOU,
701	BHDM_InputVideoFmt_e1080p_30Hz_3DOU,
702
703	#ifdef BHDM_CONFIG_BLURAY_3D_SUPPORT
704	BHDM_InputVideoFmt_e1080p_24Hz_3D,
705	BHDM_InputVideoFmt_e720p_3D,
706	BHDM_InputVideoFmt_e720p_50Hz_3D,
707	#endif
708	BHDM_InputVideoFmt_eCustom,
709
710	BHDM_InputVideoFmt_800x600p,
711	BHDM_InputVideoFmt_1024x768p,
712	BHDM_InputVideoFmt_1280x768p,
713	BHDM_InputVideoFmt_1280x1024p,
714	BHDM_InputVideoFmt_1280x720p_50Hz,
715	BHDM_InputVideoFmt_1280x720p
716	} BHDM_P_InputVideoFmt ;
717
718
719	/******************************************************************************
720	Summary:
721	HDMI Format Structure;
722	*******************************************************************************/
723	typedef enum _BHDM_P_POLARITY_
724	{
725	BHDM_POLARITY_eNEGATIVE,
726	BHDM_POLARITY_ePOSITIVE
727	} BHDM_P_POLARITY ;
728
729
730	typedef struct _BHDM_P_DISPLAY_FORMAT_
731	{
732	uint8_t FormatName[20] ;
733	uint16_t H_ActivePixels ;
734	BHDM_P_POLARITY H_Polarity ;
735	BHDM_P_POLARITY V_Polarity ;
736
737	uint16_t H_FrontPorch ;
738	uint16_t H_SyncPulse ;
739	uint16_t H_BackPorch ;
740
741	uint16_t V_ActiveLinesField0 ;
742	uint16_t V_FrontPorchField0 ;
743	uint16_t V_SyncPulseField0 ;
744
745	uint16_t V_BackPorchField0 ;
746	uint16_t V_SyncPulseOffsetField0 ;
747
748	uint16_t V_ActiveLinesField1 ;
749	uint16_t V_FrontPorchField1 ;
750	uint16_t V_SyncPulseField1 ;
751
752	uint16_t V_BackPorchField1 ;
753	uint16_t V_SyncPulseOffsetField1 ;
754
755	} BHDM_P_DISPLAY_FORMAT_DEF ;
756
757
758
759	/******************************************************************************
760	Summary:
761	HDMI Format Definitions (1080i, 720p, etc)
762	*******************************************************************************/
763	static const BHDM_P_DISPLAY_FORMAT_DEF BHDM_VideoFmtParams[] =
764	{
765	/*
766	Name
767	H_ActivePixels HorizPolarity VertPolarity
768	HorizFP HorizSyncPulse HorizBackPorch
769	VertActiveLinesField0 VertFrontPorchField0 VertSyncPulseField0 VertBackPorchField0 VertSyncPulseOffsetField0
770	VertActiveLinesField1 VertFrontPorchField1 VertSyncPulseField1 VertBackPorchField1 VertSyncPulseOffsetField1
771	*/
772
773	{ /* Invalid Format - Power Up Values */
774	"PowerUp ", 0, BHDM_POLARITY_eNEGATIVE, BHDM_POLARITY_eNEGATIVE,
775	0, 0, 0,
776	0, 0, 0, 0, 0,
777	0, 0, 0, 0, 0
778	},
779
780	{ /* 640 x 480 p */
781	"640x480p", 640, BHDM_POLARITY_eNEGATIVE, BHDM_POLARITY_eNEGATIVE,
782	16, 96, 48,
783	480, 10, 2, 33, 0,
784	480, 10, 2, 33, 0
785	},
786
787	{ /* 1920 x 1080 i */
788	"1080i ", 1920, BHDM_POLARITY_ePOSITIVE, BHDM_POLARITY_ePOSITIVE,
789	88, 44, 148,
790	540, 2, 5, 15, 0,
791	540, 2, 5, 16, 1100,
792	},
793
794	{ /* 720 x 480 p */
795	"480p ", 720, BHDM_POLARITY_eNEGATIVE, BHDM_POLARITY_eNEGATIVE,
796	16, 62, 60,
797	480, 9, 6, 30, 0,
798	480, 9, 6, 30, 0,
799	},
800
801	{ /* 720 x 480 i */
802	"480i ", 1440, BHDM_POLARITY_eNEGATIVE, BHDM_POLARITY_eNEGATIVE,
803	38, 124, 114,
804	240, 4, 3, 15, 0,
805	240, 4, 3, 16, 858,
806	},
807
808	{ /* 1280 x 720 p */
809	"720p ", 1280, BHDM_POLARITY_ePOSITIVE, BHDM_POLARITY_ePOSITIVE,
810	110, 40, 220,
811	720, 5, 5, 20, 0,
812	720, 5, 5, 20, 0,
813	},
814
815	{ /* 1280 x 720 p @ 24 */
816	"720p@24 ", 1280, BHDM_POLARITY_ePOSITIVE, BHDM_POLARITY_ePOSITIVE,
817	2585, 40, 220,
818	720, 5, 5, 20, 0,
819	720, 5, 5, 20, 0,
820	},
821
822	{ /* 1920 x 1080 p @ 23.976/24 */
823	"1080p@24", 1920, BHDM_POLARITY_ePOSITIVE, BHDM_POLARITY_ePOSITIVE,
824	638, 44, 148,
825	1080, 4, 5, 36, 0,
826	1080, 4, 5, 36, 0,
827	},
828
829	{ /* 1920 x 1080p @ 25*/
830	"1080p@25", 1920, BHDM_POLARITY_ePOSITIVE, BHDM_POLARITY_ePOSITIVE,
831	528, 44, 148,
832	1080, 4, 5, 36, 0,
833	1080, 4, 5, 36, 0,
834	},
835
836	{ /* 1920 x 1080p @ 30 - See CEA-861B Errata document */
837	"1080p@30", 1920, BHDM_POLARITY_ePOSITIVE, BHDM_POLARITY_ePOSITIVE,
838	88, 44, 148,
839	1080, 4, 5, 36, 0,
840	1080, 4, 5, 36, 0,
841	},
842
843	#if BHDM_CONFIG_1080P_5060HZ_SUPPORT
844	{ /* 1920 x 1080 p @ 59.94/60 */
845	"1080p", 1920, BHDM_POLARITY_ePOSITIVE, BHDM_POLARITY_ePOSITIVE,
846	88, 44, 148,
847	1080, 4, 5, 36, 0,
848	1080, 4, 5, 36, 0,
849	},
850	#endif
851
852	/************** 50 Hz Formats **************/
853	/*
854	Name H_ActivePixels HorizPolarity VertPolarity
855	HorizFP HorizSyncPulse HorizBackPorch
856	VertActiveLinesField0 VertFrontPorchField0 VertSyncPulseField0 VertBackPorchField0 VertSyncPulseOffsetField0
857	VertActiveLinesField1 VertFrontPorchField1 VertSyncPulseField1 VertBackPorchField1 VertSyncPulseOffsetField1
858	*/
859
860	#if BHDM_CONFIG_1080P_5060HZ_SUPPORT
861	{ /* 1920 x 1080 p @ 50 */
862	"1080p@50", 1920, BHDM_POLARITY_ePOSITIVE, BHDM_POLARITY_ePOSITIVE,
863	528, 44, 148,
864	1080, 4, 5, 36, 0,
865	1080, 4, 5, 36, 0,
866	},
867	#endif
868
869	{ /* 1920 x 1080 i */
870	"1080i@50", 1920, BHDM_POLARITY_ePOSITIVE, BHDM_POLARITY_ePOSITIVE,
871	528, 44, 148,
872	540, 2, 5, 15, 0,
873	540, 2, 5, 16, 1320,
874	},
875
876	{ /* 1280 x 720 p */
877	"720p@50 ", 1280, BHDM_POLARITY_ePOSITIVE, BHDM_POLARITY_ePOSITIVE,
878	440, 40, 220,
879	720, 5, 5, 20, 0,
880	720, 5, 5, 20, 0,
881	},
882
883	{ /* 720 x 576 p */
884	"576p@50 ", 720, BHDM_POLARITY_eNEGATIVE, BHDM_POLARITY_eNEGATIVE,
885	12, 64, 68,
886	576, 5, 5, 39, 0,
887	576, 5, 5, 39, 0,
888	},
889
890	{ /* 720 x 576 i */
891	"576i@50 ", 1440, BHDM_POLARITY_ePOSITIVE, BHDM_POLARITY_ePOSITIVE,
892	24, 126, 138,
893	288, 2, 3, 19, 0,
894	288, 2, 3, 20, 864,
895	},
896
897	/************
898	* 3D formats */
899
900	{ /* 720p@60Hz__3DOU */
901	"720p@60__3DOU ", 1280, BHDM_POLARITY_ePOSITIVE, BHDM_POLARITY_ePOSITIVE,
902	110, 40, 220,
903	1470, 5, 5, 20, 0,
904	1470, 5, 5, 20, 0,
905	},
906
907	{ /* 720p@50Hz__3DOU */
908	"720p@50__3DOU ", 1280, BHDM_POLARITY_ePOSITIVE, BHDM_POLARITY_ePOSITIVE,
909	440, 40, 220,
910	1470, 5, 5, 20, 0,
911	1470, 5, 5, 20, 0,
912	},
913
914	{ /* 1080p@23.976/24Hz__3DOU */
915	"1080p@24__3DOU ", 1920, BHDM_POLARITY_ePOSITIVE, BHDM_POLARITY_ePOSITIVE,
916	638, 44, 148,
917	2205, 4, 5, 36, 0,
918	2205, 4, 5, 36, 0,
919	},
920
921	{ /* 1080p@30__3DOU */
922	"1080p@30__3DOU", 1920, BHDM_POLARITY_ePOSITIVE, BHDM_POLARITY_ePOSITIVE,
923	88, 44, 148,
924	2205, 4, 5, 36, 0,
925	2205, 4, 5, 36, 0,
926	},
927
928	#ifdef BHDM_CONFIG_BLURAY_3D_SUPPORT
929	{ /* 1920 x 1080 p @ 24 3D */
930	"1080p@24 3D", 1920, BHDM_POLARITY_ePOSITIVE, BHDM_POLARITY_ePOSITIVE,
931	638, 44, 148,
932	2205, 4, 5, 36, 0,
933	2205, 4, 5, 36, 0,
934	},
935
936	{ /* 1280 x 720 p @ 60 3D */
937	"720p@60 3D ", 1280, BHDM_POLARITY_ePOSITIVE, BHDM_POLARITY_ePOSITIVE,
938	110, 40, 220,
939	1470, 5, 5, 20, 0,
940	1470, 5, 5, 20, 0,
941	},
942
943	{ /* 1280 x 720 p @ 50 3D */
944	"720p@50 3D ", 1280, BHDM_POLARITY_ePOSITIVE, BHDM_POLARITY_ePOSITIVE,
945	440, 40, 220,
946	1470, 5, 5, 20, 0,
947	1470, 5, 5, 20, 0,
948	},
949	#endif
950
951	{ /* Custom Place Holder */
952	"Custom ", 0, BHDM_POLARITY_ePOSITIVE, BHDM_POLARITY_ePOSITIVE,
953	0, 0, 0,
954	0, 0, 0, 0, 0,
955	0, 0, 0, 0, 0,
956	},
957
958	/*
959	Name H_ActivePixels HorizPolarity VertPolarity
960	HorizFP HorizSyncPulse HorizBackPorch
961	VertActiveLinesField0 VertFrontPorchField0 VertSyncPulseField0 VertBackPorchField0 VertSyncPulseOffsetField0
962	VertActiveLinesField1 VertFrontPorchField1 VertSyncPulseField1 VertBackPorchField1 VertSyncPulseOffsetField1
963	*/
964
965	{ /* 800 x 600 */
966	"800x600 ", 800, BHDM_POLARITY_ePOSITIVE, BHDM_POLARITY_ePOSITIVE,
967	40, 128, 88,
968	600, 1, 4, 23, 0,
969	600, 1, 4, 23, 0,
970	},
971
972	{ /* 1024 x 768 */
973	"1024x768 ", 1024, BHDM_POLARITY_eNEGATIVE, BHDM_POLARITY_eNEGATIVE,
974	24, 136, 160,
975	768, 3, 6, 29, 0,
976	768, 3, 6, 29, 0,
977	},
978
979	{ /* 1280 x 768 */
980	"1280x768 ", 1280, BHDM_POLARITY_eNEGATIVE, BHDM_POLARITY_ePOSITIVE,
981	64, 128, 192,
982	768, 3, 7, 20, 0,
983	768, 3, 7, 20, 0,
984	},
985
986	{ /* 1280 x 1024 */
987	"1280x1024", 1280, BHDM_POLARITY_ePOSITIVE, BHDM_POLARITY_ePOSITIVE,
988	48, 112, 248,
989	1024, 1, 3, 38, 0,
990	1024, 1, 3, 38, 0
991	},
992
993
994	{ /* Place Holder for 1280x720 50Hz */
995	"1280x720*", 0, BHDM_POLARITY_ePOSITIVE, BHDM_POLARITY_ePOSITIVE,
996	0, 0, 0,
997	0, 0, 0, 0, 0,
998	0, 0, 0, 0, 0,
999	},
1000
1001	{ /* 1280 x 720 */
1002	"1280x720 ", 1280, BHDM_POLARITY_eNEGATIVE, BHDM_POLARITY_ePOSITIVE,
1003	64, 128, 192,
1004	720, 3, 7, 20, 0,
1005	720, 3, 7, 20, 0,
1006	}
1007	} ; /* BHDM_VideoFmtParams[] */
1008
1009
1010	static BERR_Code BHDM_P_ConfigurePixelRepeater(
1011	BHDM_Handle hHDMI, BFMT_VideoFmt eVideoFmt, BAVC_HDMI_PixelRepetition ePixelRepetition) ;
1012
1013	static BERR_Code BHDM_P_ConfigureInputVideoFmt(
1014	BHDM_Handle hHDMI, BFMT_VideoFmt eVideoFmt, BAVC_HDMI_PixelRepetition ePixelRepetition) ;
1015
1016
1017	#if BHDM_CONFIG_DVO_SUPPORT
1018	BERR_Code BHDM_P_EnableDvoDisplay(BHDM_Handle hHDMI, BHDM_Settings *NewHdmiSettings) ;
1019	#endif
1020
1021
1022	#if BHDM_CONFIG_DEBUG_FIFO
1023	static void BHDM_P_CaptureFIFOData(BHDM_Handle hHDMI) ;
1024	#endif
1025
1026	#if BHDM_CONFIG_RECEIVER_SENSE_SUPPORT
1027	static void BHDM_P_GetReceiverSense_isr(BHDM_Handle hHDMI) ;
1028	#endif
1029
1030	/******************************************************************************
1031	Summary:
1032	Interrupt Callback Table to describe interrupt Names, ISRs, and Masks
1033	*******************************************************************************/
1034	typedef struct BHDM_P_InterruptCbTable
1035	{
1036	BINT_Id IntrId;
1037	BINT_CallbackFunc pfCallback;
1038	int iParam2;
1039	bool enable ; /* debug purposes */
1040	} BHDM_P_InterruptCbTable ;
1041
1042
1043
1044	#define BHDM_INT_CB_DEF(intr, id, enable) \
1045	{intr, BHDM_P_HandleInterrupt_isr, id, enable},
1046
1047
1048	static const BHDM_P_InterruptCbTable BHDM_Interrupts[] =
1049	{
1050	#if BHDM_CONFIG_DUAL_HPD_SUPPORT
1051	BHDM_INT_CB_DEF(BCHP_INT_ID_HP_REMOVED_INTR,
1052	BHDM_INTR_eHOTPLUG_REMOVED, true)
1053	BHDM_INT_CB_DEF(BCHP_INT_ID_HP_CONNECTED_INTR,
1054	BHDM_INTR_eHOTPLUG_CONNECTED, true)
1055	#else
1056	BHDM_INT_CB_DEF(BCHP_INT_ID_HOTPLUG_INTR,
1057	BHDM_INTR_eHOTPLUG, true)
1058	#endif
1059
1060	BHDM_INT_CB_DEF(BCHP_INT_ID_DRIFT_FIFO_FULL_MINUS_INTR,
1061	BHDM_INTR_eDF_FULL_MINUS, false)
1062	BHDM_INT_CB_DEF(BCHP_INT_ID_DRIFT_FIFO_ALMOST_FULL_INTR,
1063	BHDM_INTR_eDF_ALMOST_FULL, false)
1064	BHDM_INT_CB_DEF(BCHP_INT_ID_DRIFT_FIFO_EMPTY_MINUS_INTR,
1065	BHDM_INTR_eDF_EMPTY_MINUS, false)
1066	BHDM_INT_CB_DEF(BCHP_INT_ID_DRIFT_FIFO_ALMOST_EMPTY_INTR,
1067	BHDM_INTR_eDF_ALMOST_EMPTY, false)
1068
1069	BHDM_INT_CB_DEF(BCHP_INT_ID_ILLEGAL_WRITE_TO_ACTIVE_RAM_PACKET_INTR,
1070	BHDM_INTR_ePKT_WRITE_ERR, false)
1071
1072	BHDM_INT_CB_DEF(BCHP_INT_ID_HDCP_REPEATER_ERR_INTR,
1073	BHDM_INTR_eHDCP_REPEATER_ERR, HDMI_PORT)
1074	BHDM_INT_CB_DEF(BCHP_INT_ID_HDCP_V_MISMATCH_INTR,
1075	BHDM_INTR_eHDCP_V_MISMATCH, HDMI_PORT)
1076	BHDM_INT_CB_DEF(BCHP_INT_ID_HDCP_V_MATCH_INTR,
1077	BHDM_INTR_eHDCP_V_MATCH, HDMI_PORT)
1078	BHDM_INT_CB_DEF(BCHP_INT_ID_HDCP_RI_INTR,
1079	BHDM_INTR_eHDCP_RI, HDMI_PORT)
1080	BHDM_INT_CB_DEF(BCHP_INT_ID_HDCP_AN_READY_INTR,
1081	BHDM_INTR_eHDCP_AN, HDMI_PORT)
1082
1083	BHDM_INT_CB_DEF(BCHP_INT_ID_PACKET_FIFO_OVERFLOW_INTR,
1084	BHDM_INTR_ePKT_OVERFLOW, false)
1085	BHDM_INT_CB_DEF(BCHP_INT_ID_HDCP_PJ_INTR,
1086	BHDM_INTR_eHDCP_PJ, false)
1087
1088	#if BHDM_CONFIG_HDCP_AUTO_RI_PJ_CHECKING_SUPPORT
1089	BHDM_INT_CB_DEF(BCHP_INT_ID_PJ_MISMATCH_INTR,
1090	BHDM_INTR_eHDCP_PJ_MISMATCH, HDMI_PORT)
1091	BHDM_INT_CB_DEF(BCHP_INT_ID_RI_A_MISMATCH_INTR,
1092	BHDM_INTR_eHDCP_RI_A_MISMATCH, HDMI_PORT)
1093	BHDM_INT_CB_DEF(BCHP_INT_ID_RI_B_MISMATCH_INTR,
1094	BHDM_INTR_eHDCP_RI_B_MISMATCH, HDMI_PORT)
1095	#endif
1096
1097
1098	#if BHDM_CONFIG_RECEIVER_SENSE_SUPPORT
1099	BHDM_INT_CB_DEF(BCHP_INT_ID_RSEN_UPDATE_INTR,
1100	BHDM_INTR_eRSEN, HDMI_PORT)
1101	#endif
1102	} ;
1103
1104
1105	/*******************************************************************************
1106	BERR_Code BHDM_GetDefaultSettings
1107	Summary: Get the default settings for the HDMI device.
1108	*******************************************************************************/
1109	BERR_Code BHDM_GetDefaultSettings(
1110	BHDM_Settings pDefault / [in] pointer to memory to hold default settings */
1111	)
1112	{
1113	BERR_Code rc = BERR_SUCCESS;
1114	BDBG_ENTER(BHDM_GetDefaultSettings) ;
1115
1116	BDBG_ASSERT(pDefault) ;
1117	BKNI_Memset(pDefault, 0, sizeof(BHDM_Settings));
1118
1119
1120	/* Set default settings */
1121
1122	pDefault->eInputVideoFmt = BFMT_VideoFmt_e1080i;
1123	pDefault->eTimebase = BAVC_Timebase_e0;
1124	pDefault->eOutputPort = BHDM_OutputPort_eHDMI;
1125	pDefault->eOutputFormat = BHDM_OutputFormat_eDVIMode;
1126	pDefault->eColorimetry = BAVC_MatrixCoefficients_eHdmi_RGB;
1127	pDefault->eAspectRatio = BFMT_AspectRatio_e4_3;
1128	pDefault->ePixelRepetition = BAVC_HDMI_PixelRepetition_eNone;
1129
1130	#if BHDM_CONFIG_HDMI_1_3_SUPPORT
1131	pDefault->stColorDepth.eBitsPerPixel = BAVC_HDMI_BitsPerPixel_e24bit;
1132	#endif
1133
1134
1135	/** AVI Info Frame Structure **/
1136	{
1137	pDefault->stAviInfoFrame.bOverrideDefaults = false;
1138
1139	/* RGB or YCbCr (Y1Y0) generated from BHDM_Settings eColorimetry
1140	always RGB444 or YCbCr444 */
1141
1142	pDefault->stAviInfoFrame.eActiveInfo = BAVC_HDMI_AviInfoFrame_ActiveInfo_eValid; /* A0 */
1143	pDefault->stAviInfoFrame.eBarInfo = BAVC_HDMI_AviInfoFrame_BarInfo_eInvalid ; /* B1B0 */
1144	pDefault->stAviInfoFrame.eScanInfo = BAVC_HDMI_AviInfoFrame_ScanInfo_eOverScanned; /* S1S0 */
1145
1146	/* Colorimetry (C1C0) generated from BHDM_Settings eColorimetry
1147	(BAVC_MatrixCoefficients) requires conversion to HDMI AVI values */
1148
1149	/* Picture AR (M1M0) generated from BHDM_Settings eAspectRatio
1150	(BFMT_AspectRatio) which requires conversion to HDMI AVI values
1151	unless overriden */
1152	pDefault->stAviInfoFrame.ePictureAspectRatio =
1153	BAVC_HDMI_AviInfoFrame_PictureAspectRatio_e4_3;
1154	pDefault->stAviInfoFrame.eActiveFormatAspectRatio =
1155	BAVC_HDMI_AviInfoFrame_ActiveFormatAspectRatio_ePicture; /* R3R0 */
1156	pDefault->stAviInfoFrame.eScaling =
1157	BAVC_HDMI_AviInfoFrame_Scaling_eNoScaling, /* SC1SC0 */
1158
1159	/* Video ID Code (VICn) generated from BHDM_Settings eInputVideoFmt */
1160	pDefault->stAviInfoFrame.VideoIdCode = BFMT_VideoFmt_eNTSC,
1161
1162	/* Pixel Repeat (PRn) generated from BHDM_Settings eInputVideoFmt
1163	(BFMT_VideoFmt) */
1164
1165	#if BAVC_HDMI_1_3_SUPPORT
1166	pDefault->stAviInfoFrame.eITContent =
1167	BAVC_HDMI_AviInfoFrame_ITContent_eNoData;
1168	pDefault->stAviInfoFrame.eExtendedColorimetry =
1169	BAVC_HDMI_AviInfoFrame_ExtendedColorimetry_exvReserved;
1170	pDefault->stAviInfoFrame.eRGBQuantizationRange =
1171	BAVC_HDMI_AviInfoFrame_RGBQuantizationRange_eDefault;
1172	#endif
1173
1174	/* bar info */
1175	pDefault->stAviInfoFrame.TopBarEndLineNumber = 0;
1176	pDefault->stAviInfoFrame.BottomBarStartLineNumber = 0;
1177	pDefault->stAviInfoFrame.LeftBarEndPixelNumber = 0;
1178	pDefault->stAviInfoFrame.RightBarEndPixelNumber = 0;
1179	}
1180
1181
1182	/** AUDIO Info Frame Structure ***/
1183	{
1184	pDefault->stAudioInfoFrame.ChannelCount =
1185	BAVC_HDMI_AudioInfoFrame_ChannelCount_e2Channels ;
1186
1187	pDefault->stAudioInfoFrame.CodingType =
1188	BAVC_HDMI_AudioInfoFrame_CodingType_eReferToStream ;
1189
1190	pDefault->stAudioInfoFrame.SampleSize =
1191	BAVC_HDMI_AudioInfoFrame_SampleSize_eReferToStreamHeader ;
1192
1193	/* Sample Freq always Refer To Stream Header for PCM and compressed */
1194	pDefault->stAudioInfoFrame.SampleFrequency =
1195	BAVC_HDMI_AudioInfoFrame_SampleFrequency_eReferToStreamHeader ;
1196
1197	pDefault->stAudioInfoFrame.SpeakerAllocation = BHDM_ChannelAllocation_eStereo;
1198	pDefault->stAudioInfoFrame.DownMixInhibit = 0;
1199	pDefault->stAudioInfoFrame.LevelShift = 0;
1200	}
1201
1202	pDefault->eAudioSamplingRate = BAVC_AudioSamplingRate_e48k;
1203	pDefault->eAudioFormat = BAVC_AudioFormat_ePCM;
1204	pDefault->eAudioBits = BAVC_AudioBits_e16;
1205
1206	pDefault->eSpdSourceDevice = BHDM_SPD_SourceDevice_eDigitalSTB;
1207	BKNI_Memcpy(pDefault->SpdVendorName, "Broadcom",
1208	BAVC_HDMI_SPD_IF_VENDOR_LEN +1);
1209	BKNI_Memcpy(pDefault->SpdDescription, "Reference Board",
1210	BAVC_HDMI_SPD_IF_DESC_LEN +1);
1211
1212	/** Vendor Specific Info Frame **/
1213	{
1214	pDefault->stVendorSpecificInfoFrame.uIEEE_RegId[0] = 0x03;
1215	pDefault->stVendorSpecificInfoFrame.uIEEE_RegId[1] = 0x0C;
1216	pDefault->stVendorSpecificInfoFrame.uIEEE_RegId[2] = 0x0;
1217	pDefault->stVendorSpecificInfoFrame.eHdmiVideoFormat =
1218	BAVC_HDMI_VSInfoFrame_HDMIVideoFormat_eNone;
1219	pDefault->stVendorSpecificInfoFrame.eHdmiVic = 0;
1220	pDefault->stVendorSpecificInfoFrame.e3DStructure = 0;
1221	pDefault->stVendorSpecificInfoFrame.e3DExtData =
1222	BAVC_HDMI_VSInfoFrame_3DExtData_eNone;
1223	}
1224
1225	pDefault->CalculateCts = false;
1226	pDefault->uiDriverAmpDefault = BHDM_CONFIG_DRIVER_AMP_DEFAULT;
1227	pDefault->AltDvoPath = false;
1228	pDefault->BypassEDIDChecking = false; /* bypass EDID checking; DEBUG ONLY!*/
1229	pDefault->bFifoMasterMode = false; /* use slave mode */
1230	pDefault->bForceEnableDisplay = false;
1231	pDefault->bEnableAutoRiPjChecking = false;
1232
1233
1234	BDBG_LEAVE(BHDM_GetDefaultSettings) ;
1235	return rc ;
1236	}
1237
1238
1239	/******************************************************************************
1240	BERR_Code BHDM_Open
1241	Summary: Open/Initialize the HDMI device
1242	*******************************************************************************/
1243	BERR_Code BHDM_Open(
1244	BHDM_Handle phHDMI, / [out] HDMI handle */
1245	BCHP_Handle hChip, /* [in] Chip handle */
1246	BREG_Handle hRegister, /* [in] Register Interface to HDMI Tx Core */
1247	BINT_Handle hInterrupt, /* [in] Interrupt handle */
1248	BREG_I2C_Handle hI2cRegHandle, /* [in] I2C Interface to HDMI Rx */
1249	const BHDM_Settings pSettings / [in] default HDMI settings */
1250	)
1251	{
1252	BERR_Code rc = BERR_SUCCESS;
1253	BHDM_Handle hHDMI = NULL ;
1254	uint32_t Register ;
1255	uint8_t i ;
1256
1257	BDBG_ENTER(BHDM_Open) ;
1258
1259	/* verify parameters */
1260	BDBG_ASSERT(hChip) ;
1261	BDBG_ASSERT(hRegister) ;
1262	BDBG_ASSERT(hInterrupt) ;
1263	BDBG_ASSERT(pSettings);
1264
1265	if((pSettings->eOutputPort == BHDM_OutputPort_eHDMI) && (HDMI_PORT)) {
1266	BDBG_ASSERT(hI2cRegHandle) ;
1267	}
1268
1269	/* output port/compilation consistency check */
1270
1271	/* if ASSERT here BHDM_Settings may not be properly set */
1272
1273	BDBG_ASSERT(
1274	((pSettings->eOutputPort == BHDM_OutputPort_eHDMI) && (HDMI_PORT))
1275	\|\| ((pSettings->eOutputPort == BHDM_OutputPort_eDVO) && (DVO_PORT))) ;
1276
1277
1278	/* create the HDMI Handle */
1279	hHDMI = (BHDM_Handle) BKNI_Malloc(sizeof(BHDM_P_Handle)) ;
1280	if (!hHDMI)
1281	{
1282	BDBG_ERR(("Unable to allocate memory for HDMI Handle")) ;
1283	rc = BERR_OUT_OF_SYSTEM_MEMORY ;
1284	goto done ;
1285	}
1286
1287	/* zero out all memory associated with the HDMI Device Handle before using */
1288	BKNI_Memset(hHDMI, 0, sizeof(BHDM_P_Handle)) ;
1289
1290	/* assign the handles passed in as parameters */
1291	hHDMI->hChip = hChip ;
1292	hHDMI->hRegister = hRegister ;
1293	hHDMI->hInterrupt = hInterrupt ;
1294	hHDMI->hI2cRegHandle = hI2cRegHandle ;
1295
1296	/* save the settings and set the output port-- once set it never changes */
1297	if (!pSettings)
1298	{
1299	/* copy the selected default settings for this HDMI handle */
1300	BHDM_GetDefaultSettings(&hHDMI->DeviceSettings);
1301	hHDMI->eOutputPort = BHDM_OutputPort_eHDMI ;
1302	}
1303	else
1304	{
1305	hHDMI->DeviceSettings = *pSettings ;
1306	hHDMI->eOutputPort = pSettings->eOutputPort ;
1307	}
1308
1309	/* set the default pixel clock rate to 27MHz to match 480i default */
1310	hHDMI->eInputPixelClock = BHDM_PixelClock_e27 ;
1311
1312
1313	/* set default output format to DVI - dynamic based on attached monitor */
1314	hHDMI->DeviceSettings.eOutputFormat = BHDM_OutputFormat_eDVIMode ;
1315
1316	/* Reset the HDMI core.. make sure other cores are not held in reset */
1317	BHDM_P_ResetHdmiCore (hHDMI);
1318
1319	#ifdef BCHP_PWR_RESOURCE_HDMI_TX_CLK
1320	/* Power up everything. This has to happen after the soft reset because the soft reset touches
1321	the same registers that BCHP_PWR touches. The soft reset does not require HDMI clocks to be on */
1322	BCHP_PWR_AcquireResource(hChip, BCHP_PWR_RESOURCE_HDMI_TX_CLK);
1323	#endif
1324
1325	#ifdef BCHP_PWR_RESOURCE_HDMI_TX_CEC
1326	BCHP_PWR_AcquireResource(hHDMI->hChip, BCHP_PWR_RESOURCE_HDMI_TX_CEC);
1327	#endif
1328
1329	/* all and any register R/W must happen after the AcquireResource */
1330	#if BHDM_CONFIG_40NM_SUPPORT
1331	Register = BREG_Read32( hHDMI->hRegister, BCHP_DVP_HT_CORE_REV);
1332	#else
1333	Register = BREG_Read32( hHDMI->hRegister, BCHP_HDMI_CORE_REV );
1334	#endif
1335
1336	/* display version information */
1337	BDBG_MSG(("*****************************************")) ;
1338	BDBG_MSG(("HDMI Core Version 0x%08X", Register)) ;
1339	BDBG_MSG(("$brcm_Workfile: bhdm.c $")) ;
1340	BDBG_MSG(("$brcm_Revision: Hydra_Software_Devel/314 $")) ;
1341	BDBG_MSG(("$brcm_Date: 2/29/12 4:05p $")) ;
1342	BDBG_MSG(("*****************************************")) ;
1343
1344	#if BHDM_CONFIG_HDCP_AUTO_RI_PJ_CHECKING_SUPPORT
1345	/* Ensure HDMI is not in control of BSCC (I2C) block. This is to prevent I2C got locked
1346	by HDMI core in the case ctrl-c was use to terminate the software AND
1347	HW Ri/Pj checking was enabled */
1348	Register = BREG_Read32(hHDMI->hRegister, BCHP_HDMI_CP_INTEGRITY_CHK_CFG_1) ;
1349	Register \|= BCHP_FIELD_DATA(HDMI_CP_INTEGRITY_CHK_CFG_1, CHECK_MODE, 1);
1350	BREG_Write32(hHDMI->hRegister, BCHP_HDMI_CP_INTEGRITY_CHK_CFG_1, Register) ;
1351	Register &= ~(BCHP_MASK(HDMI_CP_INTEGRITY_CHK_CFG_1, CHECK_MODE));
1352	BREG_Write32(hHDMI->hRegister, BCHP_HDMI_CP_INTEGRITY_CHK_CFG_1, Register) ;
1353	#endif
1354
1355	/* Power on PHY */
1356	BHDM_P_PowerOnPhy (hHDMI) ;
1357
1358	/* check if something is connected and stored */
1359	BHDM_P_RxDeviceAttached(hHDMI, &hHDMI->RxDeviceAttached) ;
1360
1361
1362	/* Reset the EDID for reading */
1363	hHDMI->edidStatus = BHDM_EDID_STATE_eInitialize; /* Set EDID Initialization flag */
1364
1365	/* enable HDCP Pj Checking by default */
1366	hHDMI->HdcpOptions.PjChecking = true ;
1367
1368	/* Create Events for use with Interrupts */
1369	BHDM_CHECK_RC(rc, BKNI_CreateEvent(&(hHDMI->BHDM_EventHDCP))) ;
1370
1371	BHDM_CHECK_RC(rc, BKNI_CreateEvent(&(hHDMI->BHDM_EventHotPlug))) ;
1372	BHDM_CHECK_RC(rc, BKNI_CreateEvent(&(hHDMI->BHDM_EventFIFO))) ;
1373	BHDM_CHECK_RC(rc, BKNI_CreateEvent(&(hHDMI->BHDM_EventRAM))) ;
1374	BHDM_CHECK_RC(rc, BKNI_CreateEvent(&(hHDMI->BHDM_EventHDCPRiValue))) ;
1375	BHDM_CHECK_RC(rc, BKNI_CreateEvent(&(hHDMI->BHDM_EventHDCPPjValue))) ;
1376	BHDM_CHECK_RC(rc, BKNI_CreateEvent(&(hHDMI->BHDM_EventHDCPRepeater))) ;
1377	BHDM_CHECK_RC(rc, BKNI_CreateEvent(&(hHDMI->BHDM_EventRxSense))) ;
1378
1379	/* power on the TMDS when enabling the RSEN interrupt */
1380	BHDM_EnableTmdsOutput(hHDMI, true) ;
1381
1382	/* register/enable interrupt callbacks */
1383	for( i = 0; i < MAKE_INTR_ENUM(LAST) ; i++ )
1384	{
1385	/*
1386	** DEBUG
1387	** Create ALL interrupt callbacks
1388	** enable debug callbacks as needed;
1389	*/
1390
1391	BHDM_CHECK_RC( rc, BINT_CreateCallback(
1392	&(hHDMI->hCallback[i]), hHDMI->hInterrupt,
1393	BHDM_Interrupts[i].IntrId,
1394	BHDM_P_HandleInterrupt_isr, (void *) hHDMI, i ));
1395
1396	/* clear interrupt callback */
1397	BHDM_CHECK_RC(rc, BINT_ClearCallback( hHDMI->hCallback[i])) ;
1398
1399	/* now enable it; if specified for startup */
1400	if (!BHDM_Interrupts[i].enable)
1401	continue ;
1402
1403	BHDM_CHECK_RC( rc, BINT_EnableCallback( hHDMI->hCallback[i] ) );
1404	}
1405
1406
1407	/* if No device attached; or attached device is powered off; turn off TMDS lines */
1408	BKNI_EnterCriticalSection() ;
1409	BHDM_P_GetReceiverSense_isr(hHDMI) ;
1410	BKNI_LeaveCriticalSection() ;
1411
1412	if ((!hHDMI->RxDeviceAttached)
1413	\|\| (!hHDMI->rxSensePowerDetected))
1414	{
1415	BHDM_EnableTmdsOutput(hHDMI, false) ;
1416	}
1417
1418	/* set TMDS enabled flag appropriately */
1419	hHDMI->tmdsEnabled = hHDMI->rxSensePowerDetected ;
1420
1421	/* enable the output port with the correct output format DVO/HDMI */
1422	#if DVO_PORT
1423	#if BHDM_CONFIG_DVO_SUPPORT
1424	if (hHDMI->eOutputPort != BHDM_OutputPort_eHDMI) /* HDMI Port is default setting */
1425	{
1426	BHDM_CHECK_RC( rc, BHDM_DVO_P_EnableDvoPort(hHDMI, pSettings->eOutputFormat)) ;
1427	hHDMI->DeviceSettings.BypassEDIDChecking = true ;
1428	}
1429
1430	#else
1431	#error "Unknown/Unsupported chip for DVO port"
1432	#endif
1433	#endif
1434
1435
1436	#if BHDM_CONFIG_HDMI_1_3_SUPPORT && BHDM_CONFIG_65NM_SUPPORT
1437	/* set the pre-emphasis mode to DeepColorMode. This settings only makes a difference when
1438	running at pixel clock higher than 148.5Mhz and makes no harm for other clock rate */
1439	BHDM_P_SetPreEmphasisMode(hHDMI, BHDM_PreEmphasis_eDeepColorMode, 0);
1440	#endif
1441
1442
1443	#if BHDM_CONFIG_PLL_KICKSTART_WORKAROUND
1444	hHDMI->uiPllKickStartCount = 0 ;
1445	#endif
1446
1447	/* keep created pointer */
1448	*phHDMI = hHDMI ;
1449
1450
1451	done:
1452	if (rc != BERR_SUCCESS)
1453	{
1454	if (hHDMI != NULL)
1455	{
1456	BKNI_Free(hHDMI);
1457	}
1458	*phHDMI=NULL;
1459
1460	#ifdef BCHP_PWR_RESOURCE_HDMI_TX_CLK
1461	/* on failure, power everything down */
1462	BCHP_PWR_ReleaseResource(hChip, BCHP_PWR_RESOURCE_HDMI_TX_CLK);
1463	#endif
1464
1465	#ifdef BCHP_PWR_RESOURCE_HDMI_TX_CEC
1466	/* on failure, power everything down */
1467	BCHP_PWR_ReleaseResource(hChip, BCHP_PWR_RESOURCE_HDMI_TX_CEC);
1468	#endif
1469	}
1470
1471	BDBG_LEAVE(BHDM_Open) ;
1472	return rc ;
1473	} /* end BHDM_Open */
1474
1475
1476
1477	#if BHDM_CONFIG_DVO_SUPPORT
1478	/******************************************************************************
1479	BERR_Code BHDM_P_EnableDvoDisplay
1480	Summary: Display output to the DVO output port
1481	*******************************************************************************/
1482	BERR_Code BHDM_P_EnableDvoDisplay(BHDM_Handle hHDMI, BHDM_Settings *NewHdmiSettings)
1483	{
1484	BERR_Code rc = BERR_SUCCESS ;
1485
1486	BDBG_ENTER(BHDM_P_EnableDvoDisplay) ;
1487
1488	#if BHDM_CONFIG_DEBUG_FIFO
1489	/* always disable FIFO callbacks when changing the Rate Manager */
1490	BHDM_CHECK_RC(rc, BHDM_P_EnableFIFOInterrupts(hHDMI, false)) ;
1491	#endif
1492
1493	BHDM_P_PowerOnPhy(hHDMI);
1494
1495	/**** 15 Enable TMDS Buffers */
1496	BHDM_EnableTmdsOutput(hHDMI, true) ;
1497
1498	/RB 07 Configure HDMI to the Input Display Format - Scheduler */
1499	BHDM_CHECK_RC(rc, BHDM_P_ConfigureInputVideoFmt(hHDMI, NewHdmiSettings->eInputVideoFmt,
1500	NewHdmiSettings->ePixelRepetition)) ;
1501
1502	/* save the new HDMI Settings we used to enable the HDMI device for this HDMI handle */
1503	hHDMI->DeviceSettings = *NewHdmiSettings ;
1504
1505	#if BHDM_CONFIG_DEBUG_FIFO
1506	/* dump FIFO pointers for debugging */
1507	BHDM_P_CaptureFIFOData(hHDMI) ;
1508
1509	/* re-enable FIFO Interrupts */
1510	BHDM_CHECK_RC(rc, BHDM_P_EnableFIFOInterrupts(hHDMI, true)) ;
1511	#endif
1512
1513	done:
1514	BDBG_LEAVE(BHDM_P_EnableDvoDisplay) ;
1515
1516	return rc ;
1517	}
1518	#endif
1519
1520
1521	bool BHDM_P_HdmiSettingsChange(BHDM_Handle hHDMI, BHDM_Settings *NewHdmiSettings)
1522	{
1523	if ((hHDMI->DeviceSettings.eInputVideoFmt == NewHdmiSettings->eInputVideoFmt)
1524	&& (hHDMI->DeviceSettings.eTimebase == NewHdmiSettings->eTimebase)
1525	&& (hHDMI->DeviceSettings.eOutputPort == NewHdmiSettings->eOutputPort)
1526	&& (hHDMI->DeviceSettings.eOutputFormat == NewHdmiSettings->eOutputFormat)
1527	&& (hHDMI->DeviceSettings.eColorimetry == NewHdmiSettings->eColorimetry)
1528	&& (hHDMI->DeviceSettings.eAspectRatio == NewHdmiSettings->eAspectRatio)
1529	&& (hHDMI->DeviceSettings.ePixelRepetition == NewHdmiSettings->ePixelRepetition)
1530
1531	#if BHDM_CONFIG_HDMI_1_3_SUPPORT
1532	&& (hHDMI->DeviceSettings.stColorDepth.eBitsPerPixel == NewHdmiSettings->stColorDepth.eBitsPerPixel)
1533	#endif
1534
1535
1536	/** AVI Info Frame Structure **/
1537	&& (hHDMI->DeviceSettings.stAviInfoFrame.ePixelEncoding == NewHdmiSettings->stAviInfoFrame.ePixelEncoding)
1538	&& (hHDMI->DeviceSettings.stAviInfoFrame.bOverrideDefaults == NewHdmiSettings->stAviInfoFrame.bOverrideDefaults)
1539	&& (hHDMI->DeviceSettings.stAviInfoFrame.eActiveInfo == NewHdmiSettings->stAviInfoFrame.eActiveInfo)
1540	&& (hHDMI->DeviceSettings.stAviInfoFrame.eBarInfo == NewHdmiSettings->stAviInfoFrame.eBarInfo)
1541	&& (hHDMI->DeviceSettings.stAviInfoFrame.eScanInfo == NewHdmiSettings->stAviInfoFrame.eScanInfo)
1542	&& (hHDMI->DeviceSettings.stAviInfoFrame.eColorimetry == NewHdmiSettings->stAviInfoFrame.eColorimetry)
1543	&& (hHDMI->DeviceSettings.stAviInfoFrame.eActiveInfo == NewHdmiSettings->stAviInfoFrame.eActiveInfo)
1544	&& (hHDMI->DeviceSettings.stAviInfoFrame.ePictureAspectRatio == NewHdmiSettings->stAviInfoFrame.ePictureAspectRatio)
1545	&& (hHDMI->DeviceSettings.stAviInfoFrame.eActiveFormatAspectRatio == NewHdmiSettings->stAviInfoFrame.eActiveFormatAspectRatio)
1546	&& (hHDMI->DeviceSettings.stAviInfoFrame.eScaling == NewHdmiSettings->stAviInfoFrame.eScaling)
1547	&& (hHDMI->DeviceSettings.stAviInfoFrame.VideoIdCode == NewHdmiSettings->stAviInfoFrame.VideoIdCode)
1548	&& (hHDMI->DeviceSettings.stAviInfoFrame.eActiveInfo == NewHdmiSettings->stAviInfoFrame.eActiveInfo)
1549	&& (hHDMI->DeviceSettings.stAviInfoFrame.PixelRepeat == NewHdmiSettings->stAviInfoFrame.PixelRepeat)
1550	#if BAVC_HDMI_1_3_SUPPORT
1551	&& (hHDMI->DeviceSettings.stAviInfoFrame.eITContent == NewHdmiSettings->stAviInfoFrame.eITContent)
1552	&& (hHDMI->DeviceSettings.stAviInfoFrame.eExtendedColorimetry == NewHdmiSettings->stAviInfoFrame.eExtendedColorimetry)
1553	&& (hHDMI->DeviceSettings.stAviInfoFrame.eRGBQuantizationRange == NewHdmiSettings->stAviInfoFrame.eRGBQuantizationRange)
1554	&& (hHDMI->DeviceSettings.stAviInfoFrame.eYccQuantizationRange == NewHdmiSettings->stAviInfoFrame.eYccQuantizationRange)
1555	&& (hHDMI->DeviceSettings.stAviInfoFrame.eContentType == NewHdmiSettings->stAviInfoFrame.eContentType)
1556	#endif
1557	&& (hHDMI->DeviceSettings.stAviInfoFrame.TopBarEndLineNumber== NewHdmiSettings->stAviInfoFrame.TopBarEndLineNumber)
1558	&& (hHDMI->DeviceSettings.stAviInfoFrame.BottomBarStartLineNumber == NewHdmiSettings->stAviInfoFrame.BottomBarStartLineNumber)
1559	&& (hHDMI->DeviceSettings.stAviInfoFrame.LeftBarEndPixelNumber == NewHdmiSettings->stAviInfoFrame.LeftBarEndPixelNumber)
1560	&& (hHDMI->DeviceSettings.stAviInfoFrame.RightBarEndPixelNumber == NewHdmiSettings->stAviInfoFrame.RightBarEndPixelNumber)
1561
1562
1563	/** Audio Info Frame Structure **/
1564	&& (hHDMI->DeviceSettings.stAudioInfoFrame.bOverrideDefaults == NewHdmiSettings->stAudioInfoFrame.bOverrideDefaults)
1565	&& (hHDMI->DeviceSettings.stAudioInfoFrame.ChannelCount == NewHdmiSettings->stAudioInfoFrame.ChannelCount)
1566	&& (hHDMI->DeviceSettings.stAudioInfoFrame.CodingType == NewHdmiSettings->stAudioInfoFrame.CodingType)
1567	&& (hHDMI->DeviceSettings.stAudioInfoFrame.SampleSize == NewHdmiSettings->stAudioInfoFrame.SampleSize)
1568	&& (hHDMI->DeviceSettings.stAudioInfoFrame.SampleFrequency == NewHdmiSettings->stAudioInfoFrame.SampleFrequency)
1569	&& (hHDMI->DeviceSettings.stAudioInfoFrame.SpeakerAllocation == NewHdmiSettings->stAudioInfoFrame.SpeakerAllocation)
1570	&& (hHDMI->DeviceSettings.stAudioInfoFrame.DownMixInhibit == NewHdmiSettings->stAudioInfoFrame.DownMixInhibit)
1571	&& (hHDMI->DeviceSettings.stAudioInfoFrame.LevelShift == NewHdmiSettings->stAudioInfoFrame.LevelShift)
1572
1573
1574	&& (hHDMI->DeviceSettings.eAudioSamplingRate == NewHdmiSettings->eAudioSamplingRate)
1575	&& (hHDMI->DeviceSettings.eAudioFormat == NewHdmiSettings->eAudioFormat)
1576	&& (hHDMI->DeviceSettings.eAudioBits == NewHdmiSettings->eAudioBits)
1577
1578	&& (hHDMI->DeviceSettings.eAudioFormat == NewHdmiSettings->eAudioFormat)
1579
1580
1581	/** Source Product Description **/
1582	&& (hHDMI->DeviceSettings.eSpdSourceDevice == NewHdmiSettings->eSpdSourceDevice)
1583	&& (BKNI_Memcmp(hHDMI->DeviceSettings.SpdVendorName,
1584	NewHdmiSettings->SpdVendorName, BAVC_HDMI_SPD_IF_VENDOR_LEN) == 0)
1585	&& (BKNI_Memcmp(hHDMI->DeviceSettings.SpdDescription,
1586	NewHdmiSettings->SpdDescription, BAVC_HDMI_SPD_IF_DESC_LEN) == 0)
1587
1588
1589	/** Vendor Specific Info Frame Structure **/
1590	&& (BKNI_Memcmp(hHDMI->DeviceSettings.stVendorSpecificInfoFrame.uIEEE_RegId,
1591	NewHdmiSettings->stVendorSpecificInfoFrame.uIEEE_RegId,
1592	BAVC_HDMI_IEEE_REGID_LEN) == 0)
1593
1594	&& (hHDMI->DeviceSettings.stVendorSpecificInfoFrame.eHdmiVideoFormat ==
1595	NewHdmiSettings->stVendorSpecificInfoFrame.eHdmiVideoFormat)
1596
1597
1598	&& (hHDMI->DeviceSettings.stVendorSpecificInfoFrame.eHdmiVic ==
1599	NewHdmiSettings->stVendorSpecificInfoFrame.eHdmiVic)
1600	/* or */
1601	&& (hHDMI->DeviceSettings.stVendorSpecificInfoFrame.e3DStructure ==
1602	NewHdmiSettings->stVendorSpecificInfoFrame.e3DStructure)
1603
1604	&& (hHDMI->DeviceSettings.stVendorSpecificInfoFrame.e3DExtData ==
1605	NewHdmiSettings->stVendorSpecificInfoFrame.e3DExtData)
1606
1607
1608
1609	&& (hHDMI->DeviceSettings.CalculateCts == NewHdmiSettings->CalculateCts)
1610	&& (hHDMI->DeviceSettings.uiDriverAmpDefault == NewHdmiSettings->uiDriverAmpDefault)
1611	&& (hHDMI->DeviceSettings.AltDvoPath == NewHdmiSettings->AltDvoPath)
1612
1613	&& (hHDMI->DeviceSettings.BypassEDIDChecking == NewHdmiSettings->BypassEDIDChecking)
1614	&& (hHDMI->DeviceSettings.bFifoMasterMode == NewHdmiSettings->bFifoMasterMode)
1615	&& (hHDMI->DeviceSettings.bForceEnableDisplay == NewHdmiSettings->bForceEnableDisplay)
1616	&& (hHDMI->DeviceSettings.bEnableAutoRiPjChecking == NewHdmiSettings->bEnableAutoRiPjChecking))
1617	return false ;
1618	else
1619	return true ;
1620	}
1621
1622
1623	/******************************************************************************
1624	BERR_Code BHDM_EnableDisplay
1625	Summary: Display output to the HDMI device
1626	*******************************************************************************/
1627	BERR_Code BHDM_EnableDisplay(BHDM_Handle hHDMI, BHDM_Settings *NewHdmiSettings)
1628	{
1629	BERR_Code rc = BERR_SUCCESS ;
1630	uint32_t Register ;
1631	uint8_t DeviceAttached ;
1632	uint8_t timeoutFrames ;
1633	uint8_t HdmiModeSet ;
1634	uint8_t bHPInterrupt = false;
1635
1636	uint8_t FrameDelay ;
1637	const BFMT_VideoInfo *pVideoInfo ;
1638
1639	BDBG_ENTER(BHDM_EnableDisplay) ;
1640
1641	#if BHDM_CONFIG_DVO_SUPPORT
1642	BSTD_UNUSED(Register) ;
1643	BSTD_UNUSED(DeviceAttached) ;
1644	BSTD_UNUSED(timeoutFrames) ;
1645	BSTD_UNUSED(HdmiModeSet) ;
1646	BSTD_UNUSED(bHPInterrupt);
1647
1648	rc = BHDM_P_EnableDvoDisplay(hHDMI, NewHdmiSettings) ;
1649
1650	goto done ;
1651	#else
1652
1653	/* check if a Receiver is Attached */
1654	BHDM_CHECK_RC(rc, BHDM_RxDeviceAttached(hHDMI, &DeviceAttached)) ;
1655
1656	if (!DeviceAttached)
1657	{
1658	BDBG_WRN(("No DVI/HDMI Receiver is Attached")) ;
1659	rc = BHDM_NO_RX_DEVICE ;
1660	goto done;
1661	}
1662
1663	if (!NewHdmiSettings->bForceEnableDisplay
1664	&& !BHDM_P_HdmiSettingsChange(hHDMI, NewHdmiSettings))
1665	{
1666	BDBG_MSG(("No change in HDMI settings...")) ;
1667	rc = BERR_SUCCESS;
1668	goto done;
1669	}
1670
1671	/**** 15 Enable TMDS Buffers */
1672	BHDM_EnableTmdsOutput(hHDMI, true) ;
1673
1674
1675	#if BHDM_CONFIG_HDMI_1_3_SUPPORT
1676	/* Additional PHY settings */
1677	BHDM_CHECK_RC(rc, BHDM_P_ConfigurePhy(hHDMI, NewHdmiSettings));
1678
1679	/* ensure GCP is disabled in DVI mode */
1680	Register = BREG_Read32(hHDMI->hRegister, BCHP_HDMI_GCP_CONFIG);
1681	Register &= ~BCHP_MASK(HDMI_GCP_CONFIG, GCP_ENABLE) ;
1682	BREG_Write32(hHDMI->hRegister, BCHP_HDMI_GCP_CONFIG, Register);
1683	#endif
1684
1685
1686	/* Initialize HDMI core */
1687	/**** 01 Determine Supported Output Mode (DVI, HDMI) from Rx */
1688
1689	/**** 03 HDMI_TODO Configure the Pre-Emphasis */
1690
1691	/**** 05 Check for Lock & Nominal Difference */
1692
1693	#if BHDM_CONFIG_DEBUG_FIFO
1694	/* always disable FIFO callbacks when changing the Rate Manager */
1695	BHDM_P_EnableFIFOInterrupts(hHDMI, false) ;
1696	#endif
1697
1698
1699	/RB 07 Configure HDMI to the Input Display Format - Scheduler */
1700	BHDM_CHECK_RC(rc, BHDM_P_ConfigureInputVideoFmt(hHDMI, NewHdmiSettings->eInputVideoFmt,
1701	NewHdmiSettings->ePixelRepetition)) ;
1702
1703
1704	/RB 08 Configure Pixel Repeater for rate < 25MPixels */
1705	if (NewHdmiSettings->eOutputFormat == BHDM_OutputFormat_eHDMIMode)
1706	BHDM_CHECK_RC(rc, BHDM_P_ConfigurePixelRepeater(hHDMI, NewHdmiSettings->eInputVideoFmt,
1707	NewHdmiSettings->ePixelRepetition)) ;
1708
1709	/RK 09 Configure the Encoders */
1710
1711	/* output port already selected during at BHDM_Open */
1712
1713	/CP 09.5 Configure the BCH Encoder */
1714	Register =
1715	/* clear DISABLE_PARITY bit - reset value */
1716	BCHP_FIELD_DATA(HDMI_BCH_CONFIGURATION, DISABLE_PARITY, 0)
1717	/* set FEEDBACK_MASK = 8'h83 - reset value */
1718	\| BCHP_FIELD_DATA(HDMI_BCH_CONFIGURATION, FEEDBACK_MASK, 0x83) ;
1719	BREG_Write32(hHDMI->hRegister, BCHP_HDMI_BCH_CONFIGURATION, Register) ;
1720
1721	/RK 14 Configure PERT Off */
1722	BREG_Write32(hHDMI->hRegister, BCHP_HDMI_PERT_CONFIG, (uint32_t) 0) ;
1723
1724	if (NewHdmiSettings->eOutputFormat == BHDM_OutputFormat_eHDMIMode)
1725	{
1726	/CP 13 Enable/Configure RAM Packets */
1727	BHDM_CHECK_RC(rc, BHDM_InitializePacketRAM(hHDMI)) ;
1728
1729	/* configure audio input to HDMI */
1730	BHDM_P_ConfigureInputAudioFmt(hHDMI, &NewHdmiSettings->stAudioInfoFrame) ;
1731
1732	/*
1733	CP 12 Configure Audio Clock Regeneration Packet
1734	** Audio Clock Regeneration Packet now re-configured
1735	** upon Video Rate Change Callback
1736	*/
1737
1738	/* all configuration complete; request and switch to HDMI mode */
1739	Register = BREG_Read32(hHDMI->hRegister, BCHP_HDMI_SCHEDULER_CONTROL) ;
1740	Register &= ~(BCHP_MASK(HDMI_SCHEDULER_CONTROL, HDMI_MODE_REQUEST)
1741	\| BCHP_MASK(HDMI_SCHEDULER_CONTROL, USE_POST_LINE_KEEP_OUT)
1742	\| BCHP_MASK(HDMI_SCHEDULER_CONTROL, POST_LINE_KEEP_OUT));
1743	Register \|=
1744	( BCHP_FIELD_DATA(HDMI_SCHEDULER_CONTROL, HDMI_MODE_REQUEST, 1)
1745	\| BCHP_FIELD_DATA(HDMI_SCHEDULER_CONTROL, USE_POST_LINE_KEEP_OUT, 0)
1746	\| BCHP_FIELD_DATA(HDMI_SCHEDULER_CONTROL, POST_LINE_KEEP_OUT, 48)
1747	\| BCHP_FIELD_DATA(HDMI_SCHEDULER_CONTROL, reserved0, 0) ) ;
1748	BREG_Write32(hHDMI->hRegister, BCHP_HDMI_SCHEDULER_CONTROL, (uint32_t) Register) ;
1749
1750	/* wait for confirmation of transition to HDMI mode */
1751	HdmiModeSet = 0 ;
1752	timeoutFrames = 5 ; /* number of frames to delay while waiting to switch from DVI to HDMI mode */
1753
1754	pVideoInfo = BFMT_GetVideoFormatInfoPtr(NewHdmiSettings->eInputVideoFmt) ;
1755
1756	/* configure wait delay based on the referesh rate */
1757	if (pVideoInfo->ulVertFreq >= 5994)
1758	FrameDelay = 17 ;
1759	else if (pVideoInfo->ulVertFreq >= 5000)
1760	FrameDelay = 20 ;
1761	else if (pVideoInfo->ulVertFreq >= 2997)
1762	FrameDelay = 33 ;
1763	else /* 24/25 Hz refresh rate */
1764	FrameDelay = 42 ;
1765
1766	BHDM_ClearHotPlugInterrupt(hHDMI);
1767	do
1768	{
1769
1770	Register = BREG_Read32(hHDMI->hRegister, BCHP_HDMI_SCHEDULER_CONTROL) ;
1771	HdmiModeSet = (uint8_t) BCHP_GET_FIELD_DATA(Register, HDMI_SCHEDULER_CONTROL, HDMI_MODE_ACTIVE) ;
1772	if (HdmiModeSet)
1773	break ;
1774
1775	/* Wait a frame before checking again to see if we have switched to HDMI Mode
1776	One frame is usually enough time to switch to HDMI mode */
1777	BDBG_WRN(("Waiting 1 frame (~ %dms) to transition to HDMI mode... %08X %d",
1778	FrameDelay, Register, HdmiModeSet)) ;
1779
1780	BKNI_Sleep(FrameDelay) ;
1781
1782	/* Break out if HPD was pulsed. */
1783	BHDM_CheckHotPlugInterrupt(hHDMI, &bHPInterrupt);
1784	if (bHPInterrupt == true)
1785	break ;
1786
1787	/* TODO break out if HP detected */
1788	} while ( timeoutFrames-- ) ;
1789
1790
1791	if (!HdmiModeSet)
1792	{
1793	BDBG_ERR(("Timeout Error transitioning to HDMI mode")) ;
1794	rc = BERR_TIMEOUT ;
1795	goto done ;
1796	}
1797
1798	BDBG_WRN(("HDMI Output Mode: HDMI (Audio+Video)")) ;
1799	} /* END if HDMI Mode */
1800	#if BDBG_DEBUG_BUILD
1801	else
1802	BDBG_WRN(("HDMI Output Mode: DVI (Video Only)")) ;
1803	#endif
1804
1805	/*
1806	At initial installation of the Audio Rate Change callback, there is no initial
1807	callback; force an update here to use settings contained in the NewHdmiSettings
1808	*/
1809	if (hHDMI->DeviceSettings.eAudioSamplingRate != NewHdmiSettings->eAudioSamplingRate)
1810	{
1811	BAVC_Audio_Info AudioData ;
1812	AudioData.eAudioSamplingRate = NewHdmiSettings->eAudioSamplingRate ;
1813
1814	BKNI_EnterCriticalSection() ;
1815	BHDM_AudioVideoRateChangeCB_isr(hHDMI,
1816	BHDM_Callback_Type_eManualAudioChange, &AudioData) ;
1817	BKNI_LeaveCriticalSection() ;
1818	}
1819
1820	/* save the new HDMI Settings we used to enable the HDMI device for this HDMI handle */
1821	hHDMI->DeviceSettings = *NewHdmiSettings ;
1822
1823	/* format and send out HDMI info packets */
1824	if ((hHDMI->DeviceSettings.eOutputFormat == BHDM_OutputFormat_eHDMIMode))
1825	{
1826	/* set and enable the General Control Packet */
1827	/* keep AvMute at its current state in case modified earlier */
1828	BHDM_CHECK_RC(rc, BHDM_SetAvMute(hHDMI, hHDMI->AvMuteState)) ;
1829
1830	/* set and enable the AVI Info Frame */
1831	BHDM_CHECK_RC(rc, BHDM_SetAVIInfoFramePacket(hHDMI,
1832	&hHDMI->DeviceSettings.stAviInfoFrame)) ;
1833
1834	#if BHDM_CONFIG_HDMI_1_3_SUPPORT
1835	/* set and enable Gamut Metadata packets if xvYCC; clear otherwise */
1836	if ((hHDMI->DeviceSettings.eColorimetry == BAVC_MatrixCoefficients_eXvYCC_601) \|\|
1837	(hHDMI->DeviceSettings.eColorimetry == BAVC_MatrixCoefficients_eXvYCC_709))
1838	BHDM_CHECK_RC(rc, BHDM_P_SetGamutMetadataPacket(hHDMI)) ;
1839	else
1840	BHDM_CHECK_RC(rc, BHDM_DisablePacketTransmission(hHDMI, BHDM_PACKET_eGamutMetadata_ID)) ;
1841
1842	/* set the color depth */
1843	BHDM_CHECK_RC(rc, BHDM_SetColorDepth(hHDMI,
1844	&hHDMI->DeviceSettings.stColorDepth));
1845	#endif
1846
1847	/* set and enable the Audio Info Frame */
1848	BHDM_CHECK_RC(rc, BHDM_SetAudioInfoFramePacket(hHDMI,
1849	&hHDMI->DeviceSettings.stAudioInfoFrame)) ;
1850
1851	/* set and enable the Source Product Description Info Frame */
1852	BHDM_CHECK_RC(rc, BHDM_SetSPDInfoFramePacket(hHDMI)) ;
1853
1854	/* set and enable the Vendor Specific Info Info Frame */
1855	BHDM_CHECK_RC(rc, BHDM_SetVendorSpecificInfoFrame(hHDMI,
1856	&hHDMI->DeviceSettings.stVendorSpecificInfoFrame)) ;
1857	}
1858
1859
1860	/* recenter/initialize the FIFO */
1861	BHDM_CHECK_RC(rc, BHDM_InitializeDriftFIFO(hHDMI)) ;
1862
1863	#if BHDM_CONFIG_DEBUG_FIFO
1864	/* dump FIFO pointers for debugging */
1865	BHDM_P_CaptureFIFOData(hHDMI) ;
1866
1867	/* re-enable FIFO Interrupts */
1868	BHDM_P_EnableFIFOInterrupts(hHDMI, true) ;
1869	#endif
1870	#endif
1871
1872	/* re-enable RSEN interrupt to detect if Rx is turned off */
1873	#if BHDM_CONFIG_RECEIVER_SENSE_SUPPORT
1874	{
1875	uint8_t i ;
1876	/* enable RSEN interrupt callback if TMDS lines are enabled*/
1877	for( i = 0; i < MAKE_INTR_ENUM(LAST) ; i++ ) {
1878	if (i == MAKE_INTR_ENUM(RSEN))
1879	{
1880	BHDM_CHECK_RC( rc, BINT_EnableCallback( hHDMI->hCallback[i] ) );
1881	break;
1882	}
1883	}
1884	}
1885	#endif
1886
1887	done:
1888	hHDMI->DeviceSettings.bForceEnableDisplay = false ;
1889
1890	BDBG_LEAVE(BHDM_EnableDisplay) ;
1891	return rc ;
1892	}
1893
1894
1895	/******************************************************************************
1896	BERR_Code BHDM_DisableDisplay
1897	Summary: Display output to the HDMI device
1898	*******************************************************************************/
1899	BERR_Code BHDM_DisableDisplay(
1900	BHDM_Handle hHDMI /* [in] HDMI handle */
1901	)
1902	{
1903	BERR_Code rc = BERR_SUCCESS ;
1904
1905	BDBG_ENTER(BHDM_DisableDisplay) ;
1906	#if BHDM_CONFIG_RECEIVER_SENSE_SUPPORT
1907	{
1908	uint8_t i;
1909
1910	/* disable RSEN interrupt callback if TMDS lines are disabled to prevent
1911	crash in power management mode*/
1912	for (i = 0; i < MAKE_INTR_ENUM(LAST) ; i++)
1913	{
1914	if (i == MAKE_INTR_ENUM(RSEN))
1915	{
1916	BHDM_CHECK_RC( rc, BINT_DisableCallback( hHDMI->hCallback[i] ) );
1917	break;
1918	}
1919	}
1920	}
1921
1922	done:
1923	#endif
1924
1925	BHDM_EnableTmdsOutput(hHDMI, false) ;
1926
1927	/* set flag to force EnableDisplay if/when TMDS lines are re-enabled */
1928	/* See BHDM_EnableDisplay */
1929	hHDMI->DeviceSettings.bForceEnableDisplay = true ;
1930
1931	BDBG_LEAVE(BHDM_DisableDisplay) ;
1932	return rc ;
1933	}
1934
1935
1936	/******************************************************************************
1937	BERR_Code BHDM_Close
1938	Summary: Close the HDMI connection to the HDMI Rx.
1939	*******************************************************************************/
1940	BERR_Code BHDM_Close(
1941	BHDM_Handle hHDMI /* [in] HDMI handle */
1942	)
1943	{
1944	BERR_Code rc = BERR_SUCCESS ;
1945	uint32_t i ;
1946	BHDM_EDID_P_VideoDescriptor *pVideoDescriptor ;
1947
1948
1949	BDBG_ENTER(BHDM_Close) ;
1950	BDBG_ASSERT( hHDMI );
1951
1952	/* disable the display, if still enabled */
1953	if (hHDMI->tmdsEnabled) {
1954	BHDM_DisableDisplay(hHDMI);
1955	hHDMI->tmdsEnabled = false ;
1956	}
1957
1958	/* Disable and Destroy the HDMI Callbacks */
1959	for( i = 0; i < MAKE_INTR_ENUM(LAST); i++ )
1960	{
1961	/* all interrupts are now created; disable and destroy all on close */
1962
1963	BHDM_CHECK_RC( rc, BINT_DisableCallback( hHDMI->hCallback[i] ) );
1964	BHDM_CHECK_RC( rc, BINT_DestroyCallback( hHDMI->hCallback[i] ) );
1965	}
1966
1967	BKNI_DestroyEvent((hHDMI->BHDM_EventHDCP)) ;
1968
1969	BKNI_DestroyEvent((hHDMI->BHDM_EventHotPlug)) ;
1970	BKNI_DestroyEvent((hHDMI->BHDM_EventFIFO)) ;
1971	BKNI_DestroyEvent((hHDMI->BHDM_EventRAM)) ;
1972	BKNI_DestroyEvent((hHDMI->BHDM_EventHDCPRiValue)) ;
1973	BKNI_DestroyEvent((hHDMI->BHDM_EventHDCPPjValue)) ;
1974	BKNI_DestroyEvent((hHDMI->BHDM_EventHDCPRepeater)) ;
1975	BKNI_DestroyEvent((hHDMI->BHDM_EventRxSense)) ;
1976
1977	/* delete previous video descriptors if they exist */
1978	if (!BLST_Q_EMPTY(&hHDMI->AttachedEDID.VideoDescriptorList))
1979	{
1980	for (pVideoDescriptor=BLST_Q_FIRST(&hHDMI->AttachedEDID.VideoDescriptorList) ;
1981	pVideoDescriptor ;
1982	pVideoDescriptor=BLST_Q_FIRST(&hHDMI->AttachedEDID.VideoDescriptorList))
1983	{
1984	BLST_Q_REMOVE_HEAD(&hHDMI->AttachedEDID.VideoDescriptorList, link);
1985	BKNI_Free(pVideoDescriptor); /* free memory */
1986	}
1987	}
1988
1989
1990	#ifdef BCHP_PWR_RESOURCE_HDMI_TX_CEC
1991	/* release the CEC */
1992	BCHP_PWR_ReleaseResource(hHDMI->hChip, BCHP_PWR_RESOURCE_HDMI_TX_CEC);
1993	#endif
1994
1995	#ifdef BCHP_PWR_RESOURCE_HDMI_TX_CLK
1996	/* power down the TX Clock */
1997	BCHP_PWR_ReleaseResource(hHDMI->hChip, BCHP_PWR_RESOURCE_HDMI_TX_CLK);
1998	#endif
1999
2000	/* free memory associated with the HDMI handle */
2001	BKNI_Memset(hHDMI, 0, sizeof(BHDM_P_Handle)) ;
2002	BKNI_Free( (void *) hHDMI) ;
2003
2004	done:
2005	BDBG_LEAVE(BHDM_Close) ;
2006	return rc ;
2007	}
2008
2009
2010	/******************************************************************************
2011	BERR_Code BHDM_ClearHotPlugInterrupt
2012	Summary: Cler the HotPlug Interrupt.
2013	*******************************************************************************/
2014	BERR_Code BHDM_ClearHotPlugInterrupt(
2015	BHDM_Handle hHDMI /* [in] HDMI handle */
2016	)
2017	{
2018	BDBG_ENTER(BHDM_ClearHotPlugInterrupt) ;
2019	BDBG_ASSERT( hHDMI );
2020
2021	BHDM_P_ClearHotPlugInterrupt(hHDMI);
2022
2023	BDBG_LEAVE(BHDM_ClearHotPlugInterrupt) ;
2024	return BERR_SUCCESS ;
2025	}
2026
2027
2028	/******************************************************************************
2029	BERR_Code BHDM_CheckHotPlugInterrupt
2030	Summary: Check the HotPlug Interrupt.
2031	*******************************************************************************/
2032	BERR_Code BHDM_CheckHotPlugInterrupt(
2033	BHDM_Handle hHDMI, /* [in] HDMI handle */
2034	uint8_t bHotPlugInterrupt / [out] Interrupt asserted or not */
2035	)
2036	{
2037	BDBG_ENTER(BHDM_CheckHotPlugInterrupt) ;
2038	BDBG_ASSERT( hHDMI );
2039
2040	BHDM_P_CheckHotPlugInterrupt(hHDMI, bHotPlugInterrupt) ;
2041
2042	BDBG_LEAVE(BHDM_CheckHotPlugInterrupt) ;
2043	return BERR_SUCCESS ;
2044	}
2045
2046
2047	/******************************************************************************
2048	BERR_Code BHDM_RxDeviceAttached
2049	Summary: Check for an attached Rx Device.
2050	*******************************************************************************/
2051	BERR_Code BHDM_RxDeviceAttached(
2052	BHDM_Handle hHDMI, /* [in] HDMI handle */
2053	uint8_t *bDeviceAttached
2054	)
2055	{
2056	BERR_Code rc = BERR_SUCCESS;
2057	uint8_t status;
2058
2059	BDBG_ENTER(BHDM_RxDeviceAttached) ;
2060
2061	BDBG_ASSERT( hHDMI );
2062
2063
2064	/* DVO interface is always attached; as opposed to HDMI Port */
2065	if (hHDMI->eOutputPort == BHDM_OutputPort_eDVO)
2066	{
2067	*bDeviceAttached = 1 ;
2068	return rc ;
2069	}
2070
2071	/* read hotplug register and check if connected */
2072	BHDM_P_RxDeviceAttached(hHDMI, &status) ;
2073
2074	if (status) {
2075	*bDeviceAttached = 1 ;
2076	}
2077	else {
2078	*bDeviceAttached = 0 ;
2079	BDBG_MSG(("RxDeviceAttached: No DVI/HDMI Device Detected")) ;
2080	}
2081
2082	BDBG_LEAVE(BHDM_RxDeviceAttached) ;
2083	return rc ;
2084	}
2085
2086
2087
2088	/******************************************************************************
2089	BERR_Code BHDM_ResetHdmiRx
2090	Summary: Reset HDMI/DVI Rx device (for non-compliant receivers)
2091	*******************************************************************************/
2092	BERR_Code BHDM_ResetHdmiRx(
2093	BHDM_Handle hHDMI /* [in] HDMI handle */
2094	)
2095	{
2096	BERR_Code rc = BERR_SUCCESS;
2097
2098	BDBG_ENTER(BHDM_ResetHdmiRx) ;
2099	BDBG_ASSERT( hHDMI );
2100
2101	BHDM_EnableTmdsOutput(hHDMI, false) ;
2102	BKNI_Sleep(200) ; /* 200 ms */
2103	BHDM_EnableTmdsOutput(hHDMI, true) ;
2104
2105	BDBG_LEAVE(BHDM_ResetHdmiRx) ;
2106	return rc ;
2107	}
2108
2109
2110	/******************************************************************************
2111	BERR_Code BHDM_SetAvMute
2112	Summary: Set the AvMute (True/False) functionality for HDMI.
2113	*******************************************************************************/
2114	BERR_Code BHDM_SetAvMute(
2115	BHDM_Handle hHDMI, /* [in] HDMI handle */
2116	bool bEnableAvMute /* [in] boolean to enable/disable */
2117	)
2118	{
2119	uint32_t Register ;
2120	uint32_t AvMuteFlag ;
2121	BERR_Code rc = BERR_SUCCESS;
2122	uint8_t vsync ;
2123
2124	BDBG_ENTER(BHDM_SetAvMute) ;
2125	BDBG_ASSERT( hHDMI );
2126
2127	/* AvMute valid for HDMI only */
2128	if (hHDMI->DeviceSettings.eOutputFormat != BHDM_OutputFormat_eHDMIMode)
2129	goto done ;
2130
2131
2132	if (!hHDMI->tmdsEnabled) {
2133	/* warn, but keep going */
2134	BDBG_WRN(("BHDM_SetAvMute called while display is disabled"));
2135	}
2136
2137	if (bEnableAvMute)
2138	{
2139	AvMuteFlag = 0x01 ; /* AvMute ON */
2140	vsync = 0 ;
2141	}
2142	else
2143	{
2144	AvMuteFlag = 0x10 ; /* AvMute OFF */
2145	vsync = 1 ;
2146	}
2147
2148	BDBG_MSG(("AvMute %d", bEnableAvMute)) ;
2149
2150
2151	#if BHDM_CONFIG_REGISTER_GCP_FOR_AV_MUTE
2152
2153	/* Modify AV Mute settings */
2154	Register = BREG_Read32(hHDMI->hRegister, BCHP_HDMI_GCP_WORD_1);
2155	Register &= ~ BCHP_MASK(HDMI_GCP_WORD_1, GCP_SUBPACKET_BYTE_0);
2156	Register \|= BCHP_FIELD_DATA(HDMI_GCP_WORD_1, GCP_SUBPACKET_BYTE_0, AvMuteFlag);
2157	BREG_Write32(hHDMI->hRegister, BCHP_HDMI_GCP_WORD_1, Register) ;
2158
2159	/* Enable GCP packets */
2160	Register = BREG_Read32(hHDMI->hRegister, BCHP_HDMI_GCP_CONFIG);
2161	Register &= ~ BCHP_MASK(HDMI_GCP_CONFIG, GCP_ENABLE);
2162	Register \|= BCHP_FIELD_DATA(HDMI_GCP_CONFIG, GCP_ENABLE, 1) ;
2163	BREG_Write32(hHDMI->hRegister, BCHP_HDMI_GCP_CONFIG, Register) ;
2164
2165	#else
2166
2167	#if BHDM_CONFIG_DISABLE_MUX_VSYNC_ON_AVMUTE
2168	/* disable/enable MUX_VSYNC when muting/unmuting */
2169	Register = BREG_Read32(hHDMI->hRegister, BCHP_HDMI_CP_CONFIG) ;
2170	Register &= ~BCHP_MASK(HDMI_CP_CONFIG, I_MUX_VSYNC) ;
2171	Register \|= BCHP_FIELD_DATA(HDMI_CP_CONFIG, I_MUX_VSYNC, vsync) ;
2172	BREG_Write32(hHDMI->hRegister, BCHP_HDMI_CP_CONFIG, Register) ;
2173	#endif
2174
2175
2176	/* Disable the GCP (RAM_PACKET_0) in the Active RAM */
2177	/* Preserve other Active RAM Packets */
2178	BHDM_CHECK_RC(rc, BHDM_DisablePacketTransmission(hHDMI, BHDM_PACKET_eGCP_ID)) ;
2179
2180	/* Modify GCP Registers in Packet RAM */
2181	Register =
2182	BCHP_FIELD_DATA(HDMI_RAM_GCP_0, HEADER_BYTE_0, 0x03)
2183	\| BCHP_FIELD_DATA(HDMI_RAM_GCP_0, HEADER_BYTE_1, 0x00)
2184	\| BCHP_FIELD_DATA(HDMI_RAM_GCP_0, HEADER_BYTE_2, 0x00) ;
2185	BREG_Write32(hHDMI->hRegister, BCHP_HDMI_RAM_GCP_0, Register) ;
2186
2187	Register =
2188	BCHP_FIELD_DATA(HDMI_RAM_GCP_1, SUBPACKET_1_BYTE_3, 0x00)
2189	\| BCHP_FIELD_DATA(HDMI_RAM_GCP_1, SUBPACKET_1_BYTE_2, 0x00)
2190	\| BCHP_FIELD_DATA(HDMI_RAM_GCP_1, SUBPACKET_1_BYTE_1, 0x00)
2191	\| BCHP_FIELD_DATA(HDMI_RAM_GCP_1, SUBPACKET_1_BYTE_0, AvMuteFlag) ;
2192	/* Write all four identical GCP subpackets bytes 3-0 */
2193	BREG_Write32(hHDMI->hRegister, BCHP_HDMI_RAM_GCP_1, Register) ;
2194	BREG_Write32(hHDMI->hRegister, BCHP_HDMI_RAM_GCP_3, Register) ;
2195	BREG_Write32(hHDMI->hRegister, BCHP_HDMI_RAM_GCP_5, Register) ;
2196	BREG_Write32(hHDMI->hRegister, BCHP_HDMI_RAM_GCP_7, Register) ;
2197
2198	Register =
2199	BCHP_FIELD_DATA(HDMI_RAM_GCP_2, SUBPACKET_1_BYTE_6, 0x00)
2200	\| BCHP_FIELD_DATA(HDMI_RAM_GCP_2, SUBPACKET_1_BYTE_5, 0x00)
2201	\| BCHP_FIELD_DATA(HDMI_RAM_GCP_2, SUBPACKET_1_BYTE_4, 0x00)
2202	\| BCHP_FIELD_DATA(HDMI_RAM_GCP_2, SUBPACKET_1_PARITY_BYTE_BCH_64_56, 0x00) ;
2203
2204	/* Write all four identical GCP subpackets bytes 6-4 */
2205	BREG_Write32(hHDMI->hRegister, BCHP_HDMI_RAM_GCP_2, Register) ;
2206	BREG_Write32(hHDMI->hRegister, BCHP_HDMI_RAM_GCP_4, Register) ;
2207	BREG_Write32(hHDMI->hRegister, BCHP_HDMI_RAM_GCP_6, Register) ;
2208	BREG_Write32(hHDMI->hRegister, BCHP_HDMI_RAM_GCP_8, Register) ;
2209
2210	/* Re-Enable the GCP in the Active RAM */
2211	/* Preserve current Active RAM packets */
2212	BHDM_CHECK_RC(rc, BHDM_EnablePacketTransmission(hHDMI, BHDM_PACKET_eGCP_ID)) ;
2213
2214	#endif
2215
2216	hHDMI->AvMuteState = bEnableAvMute ;
2217
2218	done:
2219	BDBG_LEAVE(BHDM_SetAvMute) ;
2220	return rc ;
2221	} /* END BHDM_SetAvMute */
2222
2223
2224	/***************************************************************************
2225	BHDM_P_ConfigurePixelRepeater
2226	Summary: Configure the Pixel Repeat Register
2227	****************************************************************************/
2228	static BERR_Code BHDM_P_ConfigurePixelRepeater(
2229	BHDM_Handle hHDMI, /* [in] HDMI handle */
2230	BFMT_VideoFmt eVideoFmt, /* [in] Input Display Format */
2231	BAVC_HDMI_PixelRepetition ePixelRepetition /* [in] Input Pixel Repetition */
2232	)
2233	{
2234	BERR_Code rc = BERR_SUCCESS;
2235	uint32_t Register ;
2236	uint8_t pixelRepeat;
2237
2238	BDBG_ENTER(BHDM_P_ConfigurePixelRepeater) ;
2239
2240
2241	#ifdef BHDM_CONFIG_BLURAY_PLATFORMS
2242	pixelRepeat = ePixelRepetition;
2243	#else
2244	/**********************
2245	VEC will handle pixel replication up to 54Mhz only. For 480p 4x pixel repetition
2246	(applicable for 7420 and later only) 27x4=108Mhz, HDMI core will handle a 2:1 pixel
2247	replication from the 54Mhz input from VDC
2248	***********************/
2249	if (ePixelRepetition == BAVC_HDMI_PixelRepetition_e4x)
2250	pixelRepeat = 1;
2251	else
2252	/* Actual pixel repeat is done by the VEC up to 54Mhz */
2253	pixelRepeat = 0;
2254	#endif
2255
2256
2257	switch (eVideoFmt)
2258	{
2259
2260	case BFMT_VideoFmt_eNTSC :
2261	case BFMT_VideoFmt_eNTSC_J : /* 480i (Japan) */
2262
2263	/* PAL Formats */
2264	case BFMT_VideoFmt_ePAL_B :
2265	case BFMT_VideoFmt_ePAL_B1 :
2266	case BFMT_VideoFmt_ePAL_D :
2267	case BFMT_VideoFmt_ePAL_D1 :
2268	case BFMT_VideoFmt_ePAL_G :
2269	case BFMT_VideoFmt_ePAL_H :
2270	case BFMT_VideoFmt_ePAL_I :
2271	case BFMT_VideoFmt_ePAL_K :
2272	case BFMT_VideoFmt_ePAL_M :
2273	case BFMT_VideoFmt_ePAL_N :
2274	case BFMT_VideoFmt_ePAL_NC :
2275	case BFMT_VideoFmt_eSECAM : /* 576i LDK/SECAM (France :Russia) */
2276
2277	/* For above formats Pixel Repeat Handled by VEC */
2278	/* Pixel Repeat Register should still be 0 */
2279
2280	case BFMT_VideoFmt_e1080i :
2281	case BFMT_VideoFmt_e720p :
2282	case BFMT_VideoFmt_e480p :
2283	case BFMT_VideoFmt_eDVI_640x480p : /* DVI Safe mode for computer monitors */
2284	case BFMT_VideoFmt_e1080i_50Hz : /* HD 1080i 50Hz (Europe) */
2285	case BFMT_VideoFmt_e720p_50Hz : /* HD 720p 50Hz (Australia) */
2286	case BFMT_VideoFmt_e576p_50Hz : /* HD 576p 50Hz (Australia) */
2287	case BFMT_VideoFmt_e1250i_50Hz :
2288
2289	case BFMT_VideoFmt_e720p_24Hz :
2290	case BFMT_VideoFmt_e1080p_24Hz : /* HD 1080p 24Hz, 2750 sample per line, SMPTE 274M-1998 */
2291	case BFMT_VideoFmt_e1080p_25Hz : /* HD 1080p 25Hz, 2640 sample per line, SMPTE 274M-1998 */
2292	case BFMT_VideoFmt_e1080p_30Hz : /* HD 1080p 30Hz, 2200 sample per line, SMPTE 274M-1998 */
2293	case BFMT_VideoFmt_e1080p_50Hz : /* HD 1080p 50Hz, 2200 sample per line, SMPTE 274M-1998 */
2294	case BFMT_VideoFmt_e1080p : /* HD 1080p 60Hz, 2200 sample per line, SMPTE 274M-1998 */
2295
2296	/* 3D Formats */
2297	case BFMT_VideoFmt_e720p_60Hz_3DOU_AS:
2298	case BFMT_VideoFmt_e720p_50Hz_3DOU_AS:
2299	case BFMT_VideoFmt_e1080p_24Hz_3DOU_AS:
2300	case BFMT_VideoFmt_e1080p_30Hz_3DOU_AS:
2301
2302	#ifdef BHDM_CONFIG_BLURAY_3D_SUPPORT
2303	case BFMT_VideoFmt_e1080p_24Hz_3D : /* HD 1080p 24Hz 3D, 2750 sample per line */
2304	case BFMT_VideoFmt_e720p_3D : /* HD 720p 60Hz 3D, 1650 sample per line */
2305	case BFMT_VideoFmt_e720p_50Hz_3D : /* HD 720p 50Hz 3D, 1980 sample per line */
2306	#endif
2307	break ;
2308
2309	default :
2310	/* HDMI can now support PC formats other than VGA */
2311	/* if not specified as a PC format return INVALID PARAMETER */
2312
2313	if (! BFMT_IS_VESA_MODE(eVideoFmt))
2314	{
2315	BDBG_ERR(("Invalid eVideoFmt : %d", eVideoFmt)) ;
2316	rc = BERR_INVALID_PARAMETER ;
2317	}
2318	}
2319
2320	/* Set Pixel Repititions value / Preserve other HDMI_MISC_CONTROL bits */
2321	Register = BREG_Read32(hHDMI->hRegister, BCHP_HDMI_MISC_CONTROL) ;
2322	Register &= ~BCHP_MASK(HDMI_MISC_CONTROL, PIXEL_REPEAT) ;
2323	Register \|= BCHP_FIELD_DATA(HDMI_MISC_CONTROL, PIXEL_REPEAT, pixelRepeat) ;
2324	BREG_Write32(hHDMI->hRegister, BCHP_HDMI_MISC_CONTROL, Register);
2325
2326	BDBG_MSG(("Pixel Repeater Register: %X", Register)) ;
2327
2328	BDBG_LEAVE(BHDM_P_ConfigurePixelRepeater) ;
2329	return rc ;
2330	}
2331
2332
2333
2334	/******************************************************************************
2335	BERR_Code BHDM_InitializeDriftFIFO
2336	Summary: Initialize the Drift FIFO
2337	*******************************************************************************/
2338	BERR_Code BHDM_InitializeDriftFIFO(
2339	BHDM_Handle hHDMI /* [in] HDMI handle */
2340	)
2341	{
2342	BERR_Code rc = BERR_SUCCESS;
2343	uint32_t Register ;
2344	uint8_t timeoutMs ;
2345	uint8_t RecenterDone ;
2346	uint8_t bHPInterrupt = false ;
2347	uint32_t timeDelayed;
2348	bool masterMode;
2349
2350	BDBG_ENTER(BHDM_InitializeDriftFIFO) ;
2351	BDBG_ASSERT( hHDMI );
2352
2353	rc = BHDM_GetHdmiDataTransferMode(hHDMI, &masterMode);
2354
2355	/**** 06 Recenter the Drift FIFO */
2356	/*
2357	** Read the HDMI_FIFO_CTL Register...
2358	** Clear the RECENTER bit
2359	** Write the HDMI_FIFO_CTL Register
2360	** Set the RECENTER bit
2361	** Read RECENTER_DONE bit until equal to one
2362	*/
2363
2364	/* set the FIFO CTL RECENTER bit */
2365	if (!masterMode)
2366	{
2367	Register = BREG_Read32(hHDMI->hRegister, BCHP_HDMI_FIFO_CTL) ;
2368	Register &= ~BCHP_MASK(HDMI_FIFO_CTL, reserved0) ;
2369	Register &= ~BCHP_MASK(HDMI_FIFO_CTL, reserved1) ;
2370	Register &= ~BCHP_MASK(HDMI_FIFO_CTL, RECENTER) ;
2371	BREG_Write32(hHDMI->hRegister, BCHP_HDMI_FIFO_CTL, Register);
2372	Register \|= BCHP_FIELD_DATA(HDMI_FIFO_CTL, RECENTER, 1) ;
2373	BREG_Write32(hHDMI->hRegister, BCHP_HDMI_FIFO_CTL, Register);
2374
2375	BHDM_ClearHotPlugInterrupt(hHDMI);
2376	for (timeDelayed=0; timeDelayed<1000; timeDelayed+=50)
2377	{
2378	BKNI_Delay(50) ;
2379
2380	/* Bail out if HPD was pulsed. */
2381	BHDM_CheckHotPlugInterrupt(hHDMI, &bHPInterrupt);
2382	if (bHPInterrupt == true)
2383	break ;
2384	}
2385
2386	/* set the FIFO CTL RECENTER bit */
2387	Register = BREG_Read32(hHDMI->hRegister, BCHP_HDMI_FIFO_CTL) ;
2388	Register &= ~BCHP_MASK(HDMI_FIFO_CTL, reserved0) ;
2389	Register &= ~BCHP_MASK(HDMI_FIFO_CTL, reserved1) ;
2390	Register &= ~BCHP_MASK(HDMI_FIFO_CTL, RECENTER) ;
2391	BREG_Write32(hHDMI->hRegister, BCHP_HDMI_FIFO_CTL, Register);
2392	Register \|= BCHP_FIELD_DATA(HDMI_FIFO_CTL, RECENTER, 1) ;
2393	BREG_Write32(hHDMI->hRegister, BCHP_HDMI_FIFO_CTL, Register);
2394
2395
2396	/* Wait for RECENTER_DONE bit to be equal to one */
2397	timeoutMs = 10 ;
2398	do
2399	{
2400	Register = BREG_Read32(hHDMI->hRegister, BCHP_HDMI_FIFO_CTL) ;
2401	RecenterDone = BCHP_GET_FIELD_DATA(Register, HDMI_FIFO_CTL, RECENTER_DONE) ;
2402	if (RecenterDone)
2403	break ;
2404
2405	BDBG_WRN(("Recentering Drift FIFO")) ;
2406	BKNI_Sleep(1) ;
2407	} while ( timeoutMs-- ) ;
2408
2409	if (!RecenterDone)
2410	{
2411	BDBG_ERR(("Timeout Error Recentering Drift FIFO")) ;
2412	rc = BERR_TIMEOUT ;
2413	goto done ;
2414	}
2415	}
2416
2417	Register = BREG_Read32(hHDMI->hRegister, BCHP_HDMI_FIFO_CTL) ;
2418	Register &= ~BCHP_MASK(HDMI_FIFO_CTL, reserved0) ;
2419	Register &= ~BCHP_MASK(HDMI_FIFO_CTL, reserved1) ;
2420
2421	/* USE_FULL should always be set to 0 in master mode */
2422	Register \|= BCHP_FIELD_DATA(HDMI_FIFO_CTL, USE_FULL, masterMode?0:1) ;
2423	Register \|= BCHP_FIELD_DATA(HDMI_FIFO_CTL, USE_EMPTY, 1) ;
2424	Register \|= BCHP_FIELD_DATA(HDMI_FIFO_CTL, reserved0, 0) ;
2425	Register \|= BCHP_FIELD_DATA(HDMI_FIFO_CTL, reserved1, 0) ;
2426	BREG_Write32(hHDMI->hRegister, BCHP_HDMI_FIFO_CTL, Register);
2427
2428	done:
2429	BDBG_LEAVE(BHDM_InitializeDriftFIFO) ;
2430	return rc ;
2431	}
2432
2433
2434
2435	/******************************************************************************
2436	BERR_Code BHDM_P_ConfigureInputVideoFmt
2437	Summary: Set the input video display format to the HDMI core
2438	*******************************************************************************/
2439	static BERR_Code BHDM_P_ConfigureInputVideoFmt(
2440	BHDM_Handle hHDMI, /* [in] HDMI handle */
2441	BFMT_VideoFmt eVideoFmt, /* [in] input format to HDMI core */
2442	BAVC_HDMI_PixelRepetition ePixelRepetition /* [in] Input Pixel Repetition */
2443	)
2444	{
2445	#if BDBG_DEBUG_BUILD
2446	static const char * sPolarity[] = {"-", "+"} ;
2447	#endif
2448	BERR_Code rc = BERR_SUCCESS;
2449	uint32_t Register ;
2450	uint8_t i, index ;
2451
2452	typedef struct BHDM_BFMT_VideoFormat
2453	{
2454	BFMT_VideoFmt eVideoFmt ;
2455	uint8_t index ;
2456	} BHDM_BFMT_VideoFormat ;
2457
2458	static const BHDM_BFMT_VideoFormat BHDM_SupportedVideoFormats[] =
2459	{
2460	{BFMT_VideoFmt_eDVI_640x480p, BHDM_InputVideoFmt_e640x480p}, /* DVI/HDMI Safe mode */
2461
2462	{BFMT_VideoFmt_eNTSC, BHDM_InputVideoFmt_e480i}, /* 480i,NSTC-M for North America */
2463	{BFMT_VideoFmt_eNTSC_J, BHDM_InputVideoFmt_e480i}, /* 480i (Japan) */
2464	{BFMT_VideoFmt_e480p, BHDM_InputVideoFmt_e480p}, /* HD 480p */
2465	{BFMT_VideoFmt_e720p, BHDM_InputVideoFmt_e720p}, /* HD 720p */
2466	{BFMT_VideoFmt_e720p_24Hz, BHDM_InputVideoFmt_e720p_24Hz}, /* HD 720p */
2467	{BFMT_VideoFmt_e1080i, BHDM_InputVideoFmt_e1080i}, /* HD 1080i */
2468
2469	{BFMT_VideoFmt_e1080p_24Hz, BHDM_InputVideoFmt_e1080p_24Hz}, /* HD 1080p */
2470	{BFMT_VideoFmt_e1080p_25Hz, BHDM_InputVideoFmt_e1080p_25Hz}, /* HD 1080p */
2471	{BFMT_VideoFmt_e1080p_30Hz, BHDM_InputVideoFmt_e1080p_30Hz}, /* HD 1080p */
2472
2473	#if BHDM_CONFIG_1080P_5060HZ_SUPPORT
2474	{BFMT_VideoFmt_e1080p, BHDM_InputVideoFmt_e1080p}, /* HD 1080p */
2475	{BFMT_VideoFmt_e1080p_50Hz, BHDM_InputVideoFmt_e1080p_50Hz}, /* HD 1080p */
2476	#endif
2477
2478	{BFMT_VideoFmt_e1080i_50Hz, BHDM_InputVideoFmt_e1080i_50Hz}, /* HD 1080i 50Hz (Europe) */
2479	{BFMT_VideoFmt_e720p_50Hz, BHDM_InputVideoFmt_e720p_50Hz}, /* HD 720p 50Hz (Australia) */
2480	{BFMT_VideoFmt_e576p_50Hz, BHDM_InputVideoFmt_e576p_50Hz}, /* HD 576p 50Hz (Australia) */
2481
2482	{BFMT_VideoFmt_ePAL_B , BHDM_InputVideoFmt_e576i_50Hz}, /* Austrilia,*/
2483	{BFMT_VideoFmt_ePAL_B1, BHDM_InputVideoFmt_e576i_50Hz}, /* Hungry */
2484	{BFMT_VideoFmt_ePAL_D , BHDM_InputVideoFmt_e576i_50Hz}, /* China */
2485	{BFMT_VideoFmt_ePAL_D1, BHDM_InputVideoFmt_e576i_50Hz}, /* Poland */
2486	{BFMT_VideoFmt_ePAL_G , BHDM_InputVideoFmt_e576i_50Hz}, /* Europe */
2487	{BFMT_VideoFmt_ePAL_H , BHDM_InputVideoFmt_e576i_50Hz}, /* Europe */
2488	{BFMT_VideoFmt_ePAL_K , BHDM_InputVideoFmt_e576i_50Hz}, /* Europe */
2489	{BFMT_VideoFmt_ePAL_I , BHDM_InputVideoFmt_e576i_50Hz}, /* U.K. */
2490	{BFMT_VideoFmt_ePAL_M , BHDM_InputVideoFmt_e480i}, /* 480i (Brazil) */
2491	{BFMT_VideoFmt_ePAL_N , BHDM_InputVideoFmt_e576i_50Hz}, /* 576i (Paraguay,Uruguay)*/
2492	{BFMT_VideoFmt_ePAL_NC, BHDM_InputVideoFmt_e576i_50Hz}, /* 576i N combination (Argentina) */
2493	{BFMT_VideoFmt_eSECAM, BHDM_InputVideoFmt_e576i_50Hz}, /* 576i LDK/SECAM (France :Russia) */
2494
2495	/* 3D formats */
2496	{BFMT_VideoFmt_e720p_60Hz_3DOU_AS, BHDM_InputVideoFmt_e720p_3DOU},
2497	{BFMT_VideoFmt_e720p_50Hz_3DOU_AS, BHDM_InputVideoFmt_e720p_50Hz_3DOU},
2498	{BFMT_VideoFmt_e1080p_24Hz_3DOU_AS, BHDM_InputVideoFmt_e1080p_24Hz_3DOU},
2499	{BFMT_VideoFmt_e1080p_30Hz_3DOU_AS, BHDM_InputVideoFmt_e1080p_30Hz_3DOU},
2500
2501	#ifdef BHDM_CONFIG_BLURAY_3D_SUPPORT
2502	{BFMT_VideoFmt_e1080p_24Hz_3D, BHDM_InputVideoFmt_e1080p_24Hz_3D}, /* HD 1080p 24Hz 3D */
2503	{BFMT_VideoFmt_e720p_3D, BHDM_InputVideoFmt_e720p_3D}, /* HD 720p 60Hz 3D */
2504	{BFMT_VideoFmt_e720p_50Hz_3D, BHDM_InputVideoFmt_e720p_50Hz_3D}, /* HD 720p 50Hz 3D */
2505	#endif
2506	/* DVI formats */
2507	{BFMT_VideoFmt_eCUSTOM_1366x768p, BHDM_InputVideoFmt_eCustom},
2508
2509	{BFMT_VideoFmt_eDVI_800x600p, BHDM_InputVideoFmt_800x600p},
2510	{BFMT_VideoFmt_eDVI_1024x768p, BHDM_InputVideoFmt_1024x768p},
2511	{BFMT_VideoFmt_eDVI_1280x768p, BHDM_InputVideoFmt_1280x768p},
2512	{BFMT_VideoFmt_eDVI_1280x1024p_60Hz, BHDM_InputVideoFmt_1280x1024p},
2513
2514	{BFMT_VideoFmt_eDVI_1280x720p_50Hz, BHDM_InputVideoFmt_1280x720p_50Hz},
2515	{BFMT_VideoFmt_eDVI_1280x720p, BHDM_InputVideoFmt_1280x720p}
2516	} ;
2517
2518	uint8_t pixelRepetitionCount;
2519
2520
2521	BDBG_ENTER(BHDM_P_ConfigureInputVideoFmt) ;
2522	BDBG_ASSERT( hHDMI );
2523
2524
2525	/* translate the input video fmt to an index in the HDMI internal table */
2526	index = BHDM_InputVideoFmt_ePowerUp ;
2527	for (i = 0 ; i < sizeof(BHDM_SupportedVideoFormats) / sizeof(BHDM_BFMT_VideoFormat) ; i++)
2528	if (eVideoFmt == BHDM_SupportedVideoFormats[i].eVideoFmt)
2529	{
2530	index = BHDM_SupportedVideoFormats[i].index ;
2531	break ;
2532	}
2533
2534	if (index == BHDM_InputVideoFmt_ePowerUp)
2535	{
2536	const BFMT_VideoInfo *pVideoInfo ;
2537
2538	pVideoInfo = BFMT_GetVideoFormatInfoPtr(eVideoFmt) ;
2539	BDBG_ERR(("BFMT_VideoFmt: %s (%d) is UNKNOWN/UNSUPPORTED in HDM",
2540	pVideoInfo->pchFormatStr, eVideoFmt)) ;
2541	rc = BERR_NOT_SUPPORTED ;
2542	goto done ;
2543	}
2544
2545	/* the pixel repetition count/multiply */
2546	pixelRepetitionCount = ePixelRepetition + 1;
2547
2548	#if BDBG_DEBUG_BUILD
2549	if (index == BHDM_InputVideoFmt_eCustom)
2550	BDBG_WRN(("Using Custom DVI/DVO format...")) ;
2551
2552	/* display format information for debug purposes */
2553	BDBG_MSG(("Format %s: %d [%s] x %d/%d [%s] ",
2554	BHDM_VideoFmtParams[index].FormatName,
2555	BHDM_VideoFmtParams[index].H_ActivePixels,
2556	sPolarity[BHDM_VideoFmtParams[index].V_Polarity],
2557	BHDM_VideoFmtParams[index].V_ActiveLinesField0,
2558	BHDM_VideoFmtParams[index].V_ActiveLinesField1,
2559	sPolarity[BHDM_VideoFmtParams[index].H_Polarity])) ;
2560
2561	BDBG_MSG(("Horz Front Porch: %3d ",
2562	BHDM_VideoFmtParams[index].H_FrontPorch)) ;
2563	BDBG_MSG(("Horz Back Porch: %3d ",
2564	BHDM_VideoFmtParams[index].H_BackPorch )) ;
2565	BDBG_MSG(("Horz SyncPulse: %3d ",
2566	BHDM_VideoFmtParams[index].H_SyncPulse )) ;
2567	BDBG_MSG((" FIELD 0 FIELD 1")) ;
2568	BDBG_MSG(("Vert Front Porch : %3d %3d",
2569	BHDM_VideoFmtParams[index].V_FrontPorchField0,
2570	BHDM_VideoFmtParams[index].V_FrontPorchField1)) ;
2571	BDBG_MSG(("Vert Back Porch : %3d %3d",
2572	BHDM_VideoFmtParams[index].V_BackPorchField0,
2573	BHDM_VideoFmtParams[index].V_BackPorchField1)) ;
2574	BDBG_MSG(("Vert Sync Pulse : %3d %3d",
2575	BHDM_VideoFmtParams[index].V_SyncPulseField0,
2576	BHDM_VideoFmtParams[index].V_SyncPulseField1)) ;
2577	BDBG_MSG(("Vert Sync Pulse Offset : %3d %3d",
2578	BHDM_VideoFmtParams[index].V_SyncPulseOffsetField0,
2579	BHDM_VideoFmtParams[index].V_SyncPulseOffsetField1)) ;
2580	#endif
2581
2582
2583	#if BHDM_CONFIG_SCHEDULER_REV_2
2584	/* always load the HORZA first; locks faster */
2585	Register =
2586	(uint32_t) 0
2587	\| BCHP_FIELD_DATA(HDMI_HORZA, MANUAL_HFP, BHDM_VideoFmtParams[index].H_FrontPorch * pixelRepetitionCount)
2588	\| BCHP_FIELD_DATA(HDMI_HORZA, MANUAL_VPOL, BHDM_VideoFmtParams[index].V_Polarity)
2589	\| BCHP_FIELD_DATA(HDMI_HORZA, MANUAL_HPOL, BHDM_VideoFmtParams[index].H_Polarity)
2590	\| BCHP_FIELD_DATA(HDMI_HORZA, MANUAL_HAP, BHDM_VideoFmtParams[index].H_ActivePixels * pixelRepetitionCount) ;
2591	BREG_Write32(hHDMI->hRegister, BCHP_HDMI_HORZA, Register) ;
2592
2593	/* Load HORZB Register */
2594	Register =
2595	(uint32_t) 0
2596	\| BCHP_FIELD_DATA(HDMI_HORZB, MANUAL_HSP, BHDM_VideoFmtParams[index].H_SyncPulse * pixelRepetitionCount )
2597	\| BCHP_FIELD_DATA(HDMI_HORZB, MANUAL_HBP, BHDM_VideoFmtParams[index].H_BackPorch * pixelRepetitionCount ) ;
2598	BREG_Write32(hHDMI->hRegister, BCHP_HDMI_HORZB, Register) ;
2599
2600	#else
2601	/* LEGACY */
2602	/* always load the HORZA first; locks faster */
2603	Register =
2604	(uint32_t) 0
2605	\| BCHP_FIELD_DATA(HDMI_HORZA, MANUAL_VPOL, BHDM_VideoFmtParams[index].V_Polarity)
2606	\| BCHP_FIELD_DATA(HDMI_HORZA, MANUAL_HPOL, BHDM_VideoFmtParams[index].H_Polarity)
2607	\| BCHP_FIELD_DATA(HDMI_HORZA, MANUAL_HAP, BHDM_VideoFmtParams[index].H_ActivePixels * pixelRepetitionCount) ;
2608	BREG_Write32(hHDMI->hRegister, BCHP_HDMI_HORZA, Register) ;
2609
2610	/* Load HORZB Register */
2611	Register =
2612	(uint32_t) 0
2613	\| BCHP_FIELD_DATA(HDMI_HORZB, MANUAL_HFP, BHDM_VideoFmtParams[index].H_FrontPorch * pixelRepetitionCount)
2614	\| BCHP_FIELD_DATA(HDMI_HORZB, MANUAL_HSP, BHDM_VideoFmtParams[index].H_SyncPulse * pixelRepetitionCount )
2615	\| BCHP_FIELD_DATA(HDMI_HORZB, MANUAL_HBP, BHDM_VideoFmtParams[index].H_BackPorch * pixelRepetitionCount ) ;
2616	BREG_Write32(hHDMI->hRegister, BCHP_HDMI_HORZB, Register) ;
2617	#endif
2618
2619	/* Load VERTA0 Register */
2620	Register =
2621	(uint32_t) 0
2622	\| BCHP_FIELD_DATA(HDMI_VERTA0, MANUAL_VSP0, BHDM_VideoFmtParams[index].V_SyncPulseField0 )
2623	\| BCHP_FIELD_DATA(HDMI_VERTA0, MANUAL_VFP0, BHDM_VideoFmtParams[index].V_FrontPorchField0 )
2624	\| BCHP_FIELD_DATA(HDMI_VERTA0, MANUAL_VAL0, BHDM_VideoFmtParams[index].V_ActiveLinesField0 ) ;
2625	BREG_Write32(hHDMI->hRegister, BCHP_HDMI_VERTA0, Register) ;
2626
2627
2628	/* Load VERTB0 Register */
2629	Register =
2630	(uint32_t) 0
2631	\| BCHP_FIELD_DATA(HDMI_VERTB0, MANUAL_VSPO0, BHDM_VideoFmtParams[index].V_SyncPulseOffsetField0 )
2632	\| BCHP_FIELD_DATA(HDMI_VERTB0, MANUAL_VBP0, BHDM_VideoFmtParams[index].V_BackPorchField0 ) ;
2633	BREG_Write32(hHDMI->hRegister, BCHP_HDMI_VERTB0, Register) ;
2634
2635
2636	/* Load VERTA1 Register */
2637	Register =
2638	(uint32_t) 0
2639	\| BCHP_FIELD_DATA(HDMI_VERTA1, MANUAL_VSP1, BHDM_VideoFmtParams[index].V_SyncPulseField1 )
2640	\| BCHP_FIELD_DATA(HDMI_VERTA1, MANUAL_VFP1, BHDM_VideoFmtParams[index].V_FrontPorchField1 )
2641	\| BCHP_FIELD_DATA(HDMI_VERTA1, MANUAL_VAL1, BHDM_VideoFmtParams[index].V_ActiveLinesField1 ) ;
2642	BREG_Write32(hHDMI->hRegister, BCHP_HDMI_VERTA1, Register) ;
2643
2644
2645	/* Load VERTB1 Register */
2646	Register =
2647	(uint32_t) 0
2648	\| BCHP_FIELD_DATA(HDMI_VERTB1, MANUAL_VSPO1, BHDM_VideoFmtParams[index].V_SyncPulseOffsetField1 )
2649	\| BCHP_FIELD_DATA(HDMI_VERTB1, MANUAL_VBP1, BHDM_VideoFmtParams[index].V_BackPorchField1 ) ;
2650	BREG_Write32(hHDMI->hRegister, BCHP_HDMI_VERTB1, Register) ;
2651
2652
2653	done:
2654	BDBG_LEAVE(BHDM_P_ConfigureInputVideoFmt) ;
2655	return rc ;
2656	}
2657
2658
2659	/***************************************************************************
2660	BERR_Code BHDM_GetEventHandle
2661	Summary: Get the event handle for checking HDMI events.
2662	****************************************************************************/
2663	BERR_Code BHDM_GetEventHandle(
2664	BHDM_Handle hHDMI, /* [in] HDMI handle */
2665	BHDM_EventType eEventType,
2666	BKNI_EventHandle pBHDMEvent / [out] event handle */
2667	)
2668	{
2669	BERR_Code rc = BERR_SUCCESS;
2670
2671	BDBG_ENTER(BHDM_GetEventHandle) ;
2672	BDBG_ASSERT( hHDMI );
2673
2674	switch (eEventType)
2675	{
2676	case BHDM_EventHDCP :
2677	*pBHDMEvent = hHDMI->BHDM_EventHDCP ;
2678	break ;
2679
2680	case BHDM_EventHotPlug :
2681	*pBHDMEvent = hHDMI->BHDM_EventHotPlug ;
2682	break ;
2683
2684	case BHDM_EventFIFO : /* debugging event */
2685	*pBHDMEvent = hHDMI->BHDM_EventFIFO ;
2686	break ;
2687
2688	case BHDM_EventRAM : /* debugging event */
2689	*pBHDMEvent = hHDMI->BHDM_EventRAM ;
2690	break ;
2691
2692	case BHDM_EventHDCPRiValue :
2693	*pBHDMEvent = hHDMI->BHDM_EventHDCPRiValue ;
2694	break ;
2695
2696	case BHDM_EventHDCPPjValue :
2697	*pBHDMEvent = hHDMI->BHDM_EventHDCPPjValue ;
2698	break ;
2699
2700	case BHDM_EventHDCPRepeater:
2701	*pBHDMEvent = hHDMI->BHDM_EventHDCPRepeater;
2702	break;
2703
2704	case BHDM_EventRxSense:
2705	*pBHDMEvent = hHDMI->BHDM_EventRxSense;
2706	break;
2707
2708	default :
2709	BDBG_ERR(("Invalid Event Type: %d", eEventType)) ;
2710	rc = BERR_INVALID_PARAMETER ;
2711	goto done ;
2712	}
2713
2714
2715	done:
2716	BDBG_LEAVE(BHDM_GetEventHandle) ;
2717	return rc ;
2718	}
2719
2720
2721	#if BHDM_CONFIG_RECEIVER_SENSE_SUPPORT
2722	static void BHDM_P_GetReceiverSense_isr(BHDM_Handle hHDMI)
2723	{
2724	uint32_t Register;
2725	uint8_t ReceiverSense ;
2726	uint8_t Ch0, Ch1, Ch2, Clock ;
2727
2728
2729	#if BHDM_CONFIG_65NM_SUPPORT
2730	Register = BREG_Read32(hHDMI->hRegister, BCHP_HDMI_TX_PHY_HDMI_TX_PHY_STATUS) ;
2731	Clock = BCHP_GET_FIELD_DATA(Register, HDMI_TX_PHY_HDMI_TX_PHY_STATUS, STATUS_RSEN_CK) ;
2732	Ch2 = BCHP_GET_FIELD_DATA(Register, HDMI_TX_PHY_HDMI_TX_PHY_STATUS, STATUS_RSEN_2) ;
2733	Ch1 = BCHP_GET_FIELD_DATA(Register, HDMI_TX_PHY_HDMI_TX_PHY_STATUS, STATUS_RSEN_1) ;
2734	Ch0 = BCHP_GET_FIELD_DATA(Register, HDMI_TX_PHY_HDMI_TX_PHY_STATUS, STATUS_RSEN_0) ;
2735	#else
2736	Register = BREG_Read32(hHDMI->hRegister, BCHP_HDMI_TX_PHY_STATUS) ;
2737	Clock = BCHP_GET_FIELD_DATA(Register, HDMI_TX_PHY_STATUS, RSEN_CK) ;
2738	Ch2 = BCHP_GET_FIELD_DATA(Register, HDMI_TX_PHY_STATUS, RSEN_2) ;
2739	Ch1 = BCHP_GET_FIELD_DATA(Register, HDMI_TX_PHY_STATUS, RSEN_1) ;
2740	Ch0 = BCHP_GET_FIELD_DATA(Register, HDMI_TX_PHY_STATUS, RSEN_0) ;
2741	#endif
2742
2743	ReceiverSense = Clock + Ch2 + Ch1 + Ch0 ;
2744
2745	/* Receiver sense lines are all enabled */
2746	if (ReceiverSense == 4)
2747	{
2748	ReceiverSense = 0x0F;
2749	hHDMI->rxSensePowerDetected = true ;
2750	}
2751	else
2752	{
2753	hHDMI->rxSensePowerDetected = false ;
2754	}
2755
2756
2757	#if BHDM_CONFIG_DEBUG_RSEN
2758	{
2759	static uint8_t yes[] = "Yes" ;
2760	static uint8_t no[] = "No" ;
2761
2762	BDBG_WRN(("Rx Power (RSEN= 0x%X) Detected: %s ",
2763	ReceiverSense,
2764	hHDMI->rxSensePowerDetected ? yes : no)) ;
2765
2766	BDBG_WRN((" TMDS Signals Clock: %s ; Ch2: %s ; Ch1: %s ; Ch0: %s",
2767	Clock? yes : no, Ch2 ? yes : no, Ch1 ? yes : no, Ch0 ? yes : no)) ;
2768	}
2769	#endif
2770	return;
2771	}
2772	#endif
2773
2774
2775
2776	/******************************************************************************
2777	void BHDM_P_HandleInterrupt_isr
2778	Summary: Handle interrupts from the HDMI core.
2779	*******************************************************************************/
2780	void BHDM_P_HandleInterrupt_isr(
2781	void pParam1, / [in] Device handle */
2782	int parm2 /* [in] not used */
2783	)
2784	{
2785	#if !BHDM_CONFIG_DUAL_HPD_SUPPORT
2786	static uint8_t LastHotPlug = 255 ;
2787	#endif
2788
2789	uint32_t Register ;
2790	BHDM_Handle hHDMI ;
2791
2792	uint8_t MASK_INTERRUPTS = 1 ; /* debug tool */
2793	uint32_t rc ;
2794
2795	hHDMI = (BHDM_Handle) pParam1 ;
2796	BDBG_ASSERT(hHDMI) ;
2797
2798	/*
2799	-- Interrupts to be handled
2800	17 RSEN_UPDATE_INTR
2801	16 HDCP_RI_B_MISMATCH_INTR
2802	15 HDCP_RI_A_MISMATCH_INTR
2803	14 HDCP_PJ_MISMATCH_INTR
2804
2805	13 HDCP_PJ_INTR
2806	11 HDCP_AN_READY_INTR
2807	10 HDCP_RI_INTR
2808	09 HDCP_V_MATCH_INTR
2809	08 HDCP_V_MISMATCH_INTR
2810	07 HDCP_REPEATER_ERR_INTR
2811
2812	06 CEC_INTR ---> handled by CEC PI
2813
2814	05 PKT_WRITE_ERR_INTR
2815	12 PACKET_FIFO_OVERFLOW_INTR
2816
2817	04 DRIFT_FIFO_ALMOST_EMPTY_INTR
2818	03 DRIFT_FIFO_EMPTY_MINUS_INTR
2819	02 DRIFT_FIFO_ALMOST_FULL_INTR
2820	01 DRIFT_FIFO_FULL_MINUS_INTR
2821
2822	00 HOTPLUG_INTR
2823	*/
2824
2825	switch (parm2)
2826	{
2827
2828	#if BHDM_CONFIG_DUAL_HPD_SUPPORT
2829
2830	case MAKE_INTR_ENUM(HOTPLUG_REMOVED) : /* 00 */
2831
2832	BDBG_WRN(("HotPlug (Dual Intr) : DEVICE REMOVED!!")) ;
2833	hHDMI->RxDeviceAttached = 0;
2834	hHDMI->hotplugInterruptFired = true;
2835
2836	/* reset the HDMI core to DVI Mode whenever disconnected */
2837	Register = BREG_Read32(hHDMI->hRegister, BCHP_HDMI_SCHEDULER_CONTROL) ;
2838	Register &= ~(
2839	BCHP_MASK(HDMI_SCHEDULER_CONTROL, HDMI_MODE_REQUEST)
2840	\| BCHP_MASK(HDMI_SCHEDULER_CONTROL, ALWAYS_VERT_KEEP_OUT)) ;
2841	Register \|= BCHP_FIELD_DATA(HDMI_SCHEDULER_CONTROL, reserved0, 0) ;
2842
2843	BREG_Write32(hHDMI->hRegister, BCHP_HDMI_SCHEDULER_CONTROL, (uint32_t) Register) ;
2844	hHDMI->DeviceSettings.eOutputFormat = BHDM_OutputFormat_eDVIMode ;
2845
2846	/* always disable AvMute after a hot plug */
2847	hHDMI->AvMuteState = false ;
2848
2849	/* abort any pending HDCP requests */
2850	hHDMI->AbortHdcpAuthRequest = 1 ;
2851	hHDMI->HdcpOptions.numPjFailures = 0;
2852
2853	/* Set CLEAR_RDB_AUTHENTICATED BIT only - all other bits must be zero */
2854	Register = BCHP_FIELD_DATA(HDMI_HDCP_CTL, I_CLEAR_RDB_AUTHENTICATED, 1) ;
2855	BREG_Write32(hHDMI->hRegister, BCHP_HDMI_HDCP_CTL, Register) ;
2856
2857	/* Fire hotplug callback */
2858	if (hHDMI->pfHotplugChangeCallback)
2859	{
2860	hHDMI->pfHotplugChangeCallback(hHDMI->pvHotplugChangeParm1,
2861	hHDMI->iHotplugChangeParm2, &hHDMI->RxDeviceAttached) ;
2862	}
2863
2864	BKNI_SetEvent(hHDMI->BHDM_EventHotPlug) ;
2865	break ;
2866
2867
2868	case MAKE_INTR_ENUM(HOTPLUG_CONNECTED) : /* 01 */
2869
2870	BDBG_WRN(("HotPlug (Dual Intr): DEVICE CONNECTED")) ;
2871	hHDMI->RxDeviceAttached = 1;
2872	hHDMI->hotplugInterruptFired = true;
2873	hHDMI->edidStatus = BHDM_EDID_STATE_eInitialize; /* Set Initialize EDID read flag */
2874
2875	/* Fire hotplug callback */
2876	if (hHDMI->pfHotplugChangeCallback)
2877	{
2878	hHDMI->pfHotplugChangeCallback(hHDMI->pvHotplugChangeParm1,
2879	hHDMI->iHotplugChangeParm2, &hHDMI->RxDeviceAttached) ;
2880	}
2881
2882	BKNI_SetEvent(hHDMI->BHDM_EventHotPlug) ;
2883	break ;
2884
2885
2886	#else /* Single HPD interrupt */
2887
2888	case MAKE_INTR_ENUM(HOTPLUG) : /* 00 */
2889
2890	#if BHDM_CONFIG_40NM_SUPPORT
2891	Register = BREG_Read32(hHDMI->hRegister, BCHP_HDMI_HOTPLUG_STATUS) ;
2892	hHDMI->RxDeviceAttached = BCHP_GET_FIELD_DATA(Register, HDMI_HOTPLUG_STATUS, HOTPLUG_STATUS) ;
2893	#else
2894	Register = BREG_Read32(hHDMI->hRegister, BCHP_HDMI_HOTPLUG) ;
2895	hHDMI->RxDeviceAttached = BCHP_GET_FIELD_DATA(Register, HDMI_HOTPLUG, HOTPLUG_STATE) ;
2896	#endif
2897
2898	/* if same state return without setting an event */
2899	if (hHDMI->RxDeviceAttached == LastHotPlug)
2900	{
2901	BDBG_MSG(("Skip Multiple Interrupts")) ;
2902	return ;
2903	}
2904	LastHotPlug = hHDMI->RxDeviceAttached ;
2905
2906	if (!hHDMI->RxDeviceAttached)
2907	{
2908	BDBG_WRN(("HotPlug: DEVICE REMOVED!!")) ;
2909	/* reset the HDMI core to DVI Mode whenever disconnected */
2910	Register = BREG_Read32(hHDMI->hRegister, BCHP_HDMI_SCHEDULER_CONTROL) ;
2911	Register &= ~(
2912	BCHP_MASK(HDMI_SCHEDULER_CONTROL, HDMI_MODE_REQUEST)
2913	\| BCHP_MASK(HDMI_SCHEDULER_CONTROL, ALWAYS_VERT_KEEP_OUT)) ;
2914	Register \|= BCHP_FIELD_DATA(HDMI_SCHEDULER_CONTROL, reserved0, 0) ;
2915
2916	BREG_Write32(hHDMI->hRegister, BCHP_HDMI_SCHEDULER_CONTROL, (uint32_t) Register) ;
2917	hHDMI->DeviceSettings.eOutputFormat = BHDM_OutputFormat_eDVIMode ;
2918
2919	/* always disable AvMute after a hot plug */
2920	hHDMI->AvMuteState = false ;
2921	hHDMI->rxSensePowerDetected = false ;
2922	}
2923	else
2924	{
2925	#if BDBG_DEBUG_BUILD
2926	BDBG_WRN(("HotPlug: DEVICE CONNECTED")) ;
2927	#endif
2928	}
2929
2930
2931	hHDMI->edidStatus = BHDM_EDID_STATE_eInitialize; /* Set Initialize EDID read flag */
2932
2933	/* abort any pending HDCP requests */
2934	hHDMI->AbortHdcpAuthRequest = 1 ;
2935	hHDMI->HdcpOptions.numPjFailures = 0;
2936
2937	/* Set CLEAR_RDB_AUTHENTICATED BIT only - all other bits must be zero */
2938	Register = BCHP_FIELD_DATA(HDMI_HDCP_CTL, I_CLEAR_RDB_AUTHENTICATED, 1) ;
2939	BREG_Write32(hHDMI->hRegister, BCHP_HDMI_HDCP_CTL, Register) ;
2940
2941	if (hHDMI->pfHotplugChangeCallback)
2942	{
2943	hHDMI->pfHotplugChangeCallback(hHDMI->pvHotplugChangeParm1,
2944	hHDMI->iHotplugChangeParm2, &hHDMI->RxDeviceAttached) ;
2945	}
2946
2947	BKNI_SetEvent(hHDMI->BHDM_EventHotPlug) ;
2948
2949	break ;
2950	#endif
2951
2952
2953	case MAKE_INTR_ENUM(DF_FULL_MINUS) : /* 01 */
2954	BDBG_ERR(("Int0x%x FULL MINUS!", parm2));
2955	if (MASK_INTERRUPTS)
2956	{
2957	BHDM_CHECK_RC( rc, BINT_DisableCallback_isr( hHDMI->hCallback[parm2] ) );
2958	BDBG_MSG(("Full Minus Int Masked")) ;
2959	}
2960	BKNI_SetEvent(hHDMI->BHDM_EventFIFO) ;
2961
2962	break ;
2963
2964
2965	case MAKE_INTR_ENUM(DF_ALMOST_FULL) : /* 02 */
2966	BDBG_ERR(("Int0x%x ALMOST FULL!", parm2));
2967	if (MASK_INTERRUPTS)
2968	{
2969	BHDM_CHECK_RC( rc, BINT_DisableCallback_isr( hHDMI->hCallback[parm2] ) );
2970	BDBG_MSG(("Almost Full Int Masked")) ;
2971	}
2972	BKNI_SetEvent(hHDMI->BHDM_EventFIFO) ;
2973	break ;
2974
2975
2976	case MAKE_INTR_ENUM(DF_EMPTY_MINUS) : /* 03 */
2977	BDBG_ERR(("Int0x%x EMPTY MINUS!", parm2));
2978	if (MASK_INTERRUPTS)
2979	{
2980	BHDM_CHECK_RC( rc, BINT_DisableCallback_isr( hHDMI->hCallback[parm2] ) );
2981	BDBG_MSG(("Empty Minus Int Masked")) ;
2982	}
2983	BKNI_SetEvent(hHDMI->BHDM_EventFIFO) ;
2984	break ;
2985
2986
2987	case MAKE_INTR_ENUM(DF_ALMOST_EMPTY) : /* 04 */
2988	BDBG_ERR(("Int0x%x ALMOST EMPTY!", parm2));
2989	if(MASK_INTERRUPTS)
2990	{
2991	BHDM_CHECK_RC( rc, BINT_DisableCallback_isr( hHDMI->hCallback[parm2] ) );
2992	BDBG_MSG(("Almost Empty Int Masked")) ;
2993	}
2994	BKNI_SetEvent(hHDMI->BHDM_EventFIFO) ;
2995	break ;
2996
2997
2998	case MAKE_INTR_ENUM(PKT_WRITE_ERR) : /* 05 */
2999	case MAKE_INTR_ENUM(PKT_OVERFLOW) : /* 12 */
3000	BDBG_ERR(("Int0x%x!", parm2));
3001	BKNI_SetEvent(hHDMI->BHDM_EventRAM) ;
3002	break ;
3003
3004	case MAKE_INTR_ENUM(HDCP_RI) : /* 10 */
3005	#if 0
3006	BDBG_MSG(("Int0x%x RiValue!", parm2));
3007	#endif
3008	if (hHDMI->HDCP_RiCount == 0) /* skip processing r0 value twice */
3009	break ;
3010
3011	BKNI_SetEvent(hHDMI->BHDM_EventHDCPRiValue) ;
3012	break ;
3013
3014
3015	case MAKE_INTR_ENUM(HDCP_PJ) : /* 13 */
3016	#if 0
3017	BDBG_MSG(("Int0x%x PjValue!", parm2));
3018	#endif
3019	BKNI_SetEvent(hHDMI->BHDM_EventHDCPPjValue) ;
3020	break ;
3021
3022
3023	#if BHDM_CONFIG_HDCP_AUTO_RI_PJ_CHECKING_SUPPORT
3024	case MAKE_INTR_ENUM(HDCP_RI_A_MISMATCH): /* 15 */
3025	BDBG_ERR(("Ri mismatch Interrupt (0x%x)!", parm2));
3026	hHDMI->HDCP_AutoRiMismatch_A = 1;
3027	BKNI_SetEvent(hHDMI->BHDM_EventHDCPRiValue);
3028	break;
3029
3030	case MAKE_INTR_ENUM(HDCP_RI_B_MISMATCH): /* 16 */
3031	BDBG_ERR(("Ri mismatch Interrupt (0x%x)!", parm2));
3032	hHDMI->HDCP_AutoRiMismatch_B = 1;
3033	BKNI_SetEvent(hHDMI->BHDM_EventHDCPRiValue);
3034	break;
3035
3036	case MAKE_INTR_ENUM(HDCP_PJ_MISMATCH): /* 14 */
3037	BDBG_ERR(("Pj mismatch Interrupt (0x%x)!", parm2));
3038	hHDMI->HDCP_AutoPjMismatch = 1;
3039	BKNI_SetEvent(hHDMI->BHDM_EventHDCPPjValue);
3040	break;
3041	#endif
3042
3043	case MAKE_INTR_ENUM(HDCP_REPEATER_ERR) : /* 07 */
3044	case MAKE_INTR_ENUM(HDCP_V_MISMATCH) : /* 08 */
3045	BDBG_ERR(("Repeater Interrupt (0x%x)!", parm2));
3046	BKNI_SetEvent(hHDMI->BHDM_EventHDCPRepeater);
3047	break;
3048
3049	case MAKE_INTR_ENUM(HDCP_V_MATCH) : /* 09 */
3050	BDBG_WRN(("BHDM Interrupt ID=0x%x!", parm2));
3051	/* continue to setting event */
3052	case MAKE_INTR_ENUM(HDCP_AN) : /* 11 */
3053	BKNI_SetEvent(hHDMI->BHDM_EventHDCP) ;
3054	break ;
3055
3056
3057	#if BHDM_CONFIG_RECEIVER_SENSE_SUPPORT
3058	case MAKE_INTR_ENUM(RSEN) : /* 17 */
3059	/* update the RxSense value */
3060	BHDM_P_GetReceiverSense_isr(hHDMI) ;
3061	BDBG_WRN(("RxSense: %s",
3062	hHDMI->rxSensePowerDetected ? "ON" : "OFF" )) ;
3063
3064	if (hHDMI->pfRxSenseChangeCallback)
3065	{
3066	hHDMI->pfRxSenseChangeCallback(hHDMI->pvRxSenseChangeParm1,
3067	hHDMI->iRxSenseChangeParm2, &hHDMI->rxSensePowerDetected) ;
3068	}
3069
3070	BKNI_SetEvent(hHDMI->BHDM_EventRxSense);
3071	break;
3072	#endif
3073
3074
3075	default :
3076	BDBG_MSG(("BHDM Unknown Interrupt ID=0x%x !", parm2 ));
3077	}
3078
3079	done:
3080	rc = 0 ;
3081	/* L2 interrupts are reset automatically */
3082	}
3083
3084
3085
3086	/*******************************************************************************
3087	BERR_Code BHDM_GetHdmiSettings
3088	Summary: Get the current settings for the HDMI device.
3089	*******************************************************************************/
3090	BERR_Code BHDM_GetHdmiSettings(BHDM_Handle hHDMI, /* [in] handle to HDMI device */
3091	BHDM_Settings pHdmiSettings / [in] pointer to memory to hold the current
3092	HDMI settings */
3093	)
3094	{
3095	BERR_Code rc = BERR_SUCCESS;
3096	BDBG_ENTER(BHDM_GetHdmiSettings) ;
3097
3098	BDBG_ASSERT(pHdmiSettings) ;
3099	BDBG_ASSERT(hHDMI) ;
3100
3101	BKNI_Memset(pHdmiSettings, 0, sizeof(BHDM_Settings)) ;
3102	BKNI_Memcpy(pHdmiSettings, &hHDMI->DeviceSettings, sizeof(BHDM_Settings)) ;
3103
3104	BDBG_LEAVE(BHDM_GetHdmiSettings) ;
3105	return rc ;
3106	}
3107
3108
3109	/*******************************************************************************
3110	BERR_Code BHDM_SetHdmiSettings
3111	Summary: Save the current settings for the HDMI device.
3112
3113	Note: the settings for HDMI device will be saved when calling BHDM_EnableDisplay
3114	This call should not be use if BHDM_EnableDisplay is used
3115
3116	See Also:
3117	BHDM_EnableDisplay()
3118	*******************************************************************************/
3119	BERR_Code BHDM_SetHdmiSettings(BHDM_Handle hHDMI, /* [in] handle to HDMI device */
3120	BHDM_Settings pHdmiSettings / [in] pointer to memory to hold the current
3121	HDMI settings */
3122	)
3123	{
3124	BERR_Code rc = BERR_SUCCESS;
3125	BDBG_ENTER(BHDM_SetHdmiSettings) ;
3126
3127	BDBG_ASSERT(pHdmiSettings) ;
3128	BDBG_ASSERT(hHDMI) ;
3129
3130	BKNI_Memcpy(&(hHDMI->DeviceSettings), pHdmiSettings, sizeof(BHDM_Settings));
3131
3132	BDBG_LEAVE(BHDM_SetHdmiSettings) ;
3133	return rc ;
3134	}
3135
3136
3137	#if BHDM_CONFIG_DEBUG_FIFO
3138	static void BHDM_P_CaptureFIFOData(BHDM_Handle hHDMI)
3139	{
3140	uint8_t i ;
3141	uint32_t Register ;
3142
3143	/* get the CAPTURE POINTER data for debug, fine tuning, etc. */
3144	Register = BREG_Read32(hHDMI->hRegister, BCHP_HDMI_FIFO_CTL);
3145	Register &= ~BCHP_MASK(HDMI_FIFO_CTL, reserved0) ;
3146	Register &= ~BCHP_MASK(HDMI_FIFO_CTL, reserved1) ;
3147	Register &= ~BCHP_MASK(HDMI_FIFO_CTL, CAPTURE_POINTERS) ;
3148
3149	Register \|= BCHP_FIELD_DATA(HDMI_FIFO_CTL, CAPTURE_POINTERS, 1) ;
3150	BREG_Write32(hHDMI->hRegister, BCHP_HDMI_FIFO_CTL, Register);
3151
3152	Register &= ~BCHP_MASK(HDMI_FIFO_CTL, CAPTURE_POINTERS) ;
3153	BREG_Write32(hHDMI->hRegister, BCHP_HDMI_FIFO_CTL, Register);
3154
3155
3156	/* read the pointers */
3157	BDBG_ERR(("Begin Drift FIFO Debug Dump------------------------------------------")) ;
3158	Register = BREG_Read32(hHDMI->hRegister, BCHP_HDMI_READ_POINTERS);
3159
3160	i = BCHP_GET_FIELD_DATA(Register, HDMI_READ_POINTERS, DRIFT_ALMOST_FULL) ;
3161	BDBG_ERR(("DRIFT_ALMOST_FULL: %d", i)) ;
3162
3163	i = BCHP_GET_FIELD_DATA(Register, HDMI_READ_POINTERS, DRIFT_FULL_MINUS) ;
3164	BDBG_ERR(("DRIFT_FULL_MINUS: %d", i)) ;
3165
3166	i = BCHP_GET_FIELD_DATA(Register, HDMI_READ_POINTERS, DRIFT_OVERFLOW) ;
3167	BDBG_ERR(("DRIFT_OVERFLOW: %d", i)) ;
3168
3169	i = BCHP_GET_FIELD_DATA(Register, HDMI_READ_POINTERS, DRIFT_ALMOST_EMPTY) ;
3170	BDBG_ERR(("DRIFT_ALMOST_EMPTY: %d", i)) ;
3171
3172	i = BCHP_GET_FIELD_DATA(Register, HDMI_READ_POINTERS, DRIFT_EMPTY_MINUS) ;
3173	BDBG_ERR(("DRIFT_EMPTY_MINUS: %d", i)) ;
3174
3175	i = BCHP_GET_FIELD_DATA(Register, HDMI_READ_POINTERS, DRIFT_UNDERFLOW) ;
3176	BDBG_ERR(("DRIFT_UNDERFLOW: %d", i)) ;
3177
3178	i = BCHP_GET_FIELD_DATA(Register, HDMI_READ_POINTERS, DRIFT_RD_ADDR_7_0) ;
3179	BDBG_ERR(("Read Pointer: %d", i)) ;
3180
3181	i = BCHP_GET_FIELD_DATA(Register, HDMI_READ_POINTERS, DRIFT_WR_ADDR_7_0) ;
3182	BDBG_ERR(("Write Pointer: %d", i)) ;
3183
3184	BDBG_ERR(("End Drift FIFO Debug Dump------------------------------------------")) ;
3185	}
3186	#endif
3187
3188
3189	BERR_Code BHDM_SetTimebase(
3190	BHDM_Handle hHDMI, /* [in] HDMI handle */
3191	BAVC_Timebase eTimebase /* [in] Timebase */
3192	)
3193	{
3194	BERR_Code rc = BERR_SUCCESS;
3195
3196	hHDMI->DeviceSettings.eTimebase = eTimebase ;
3197	return rc ;
3198	}
3199
3200
3201	BERR_Code BHDM_GetTimebase(
3202	BHDM_Handle hHDMI, /* [in] HDMI handle */
3203	BAVC_Timebase eTimebase / [out] Timebase */
3204	)
3205	{
3206	BERR_Code rc = BERR_SUCCESS;
3207
3208	*eTimebase = hHDMI->DeviceSettings.eTimebase ;
3209	return rc ;
3210	}
3211
3212
3213	void BHDM_P_VideoFmt2CEA861Code(BFMT_VideoFmt eVideoFmt,
3214	BFMT_AspectRatio eAspectRatio, BAVC_HDMI_PixelRepetition ePixelRepetition, uint8_t *VideoID)
3215	{
3216	switch (eVideoFmt)
3217	{
3218	case BFMT_VideoFmt_e1080i : /* HD 1080i */
3219	*VideoID = 5 ;
3220	break ;
3221
3222	case BFMT_VideoFmt_e720p : /* HD 720p */
3223	#ifdef BHDM_CONFIG_BLURAY_3D_SUPPORT
3224	case BFMT_VideoFmt_e720p_3D : /* HD 720p 3D */
3225	#endif
3226	*VideoID = 4 ;
3227	break ;
3228
3229	case BFMT_VideoFmt_e480p : /* HD 480p */
3230	if (eAspectRatio == BFMT_AspectRatio_e16_9)
3231	{
3232	switch (ePixelRepetition)
3233	{
3234	case BAVC_HDMI_PixelRepetition_eNone:
3235	*VideoID = 3 ;
3236	break;
3237	case BAVC_HDMI_PixelRepetition_e2x:
3238	*VideoID = 15 ;
3239	break;
3240	case BAVC_HDMI_PixelRepetition_e4x:
3241	*VideoID = 36 ;
3242	break;
3243	default:
3244	break;
3245	}
3246	}
3247	else /* default 4:3 */
3248	{
3249	switch (ePixelRepetition)
3250	{
3251	case BAVC_HDMI_PixelRepetition_eNone:
3252	*VideoID = 2 ;
3253	break;
3254	case BAVC_HDMI_PixelRepetition_e2x:
3255	*VideoID = 14 ;
3256	break;
3257	case BAVC_HDMI_PixelRepetition_e4x:
3258	*VideoID = 35 ;
3259	break;
3260	default:
3261	break;
3262	}
3263	}
3264	break ;
3265
3266	case BFMT_VideoFmt_eNTSC : /* 480i, NSTC-M for North America */
3267	case BFMT_VideoFmt_eNTSC_J : /* 480i (Japan) */
3268	case BFMT_VideoFmt_ePAL_M : /* 525-lines (Brazil) */
3269	if (eAspectRatio == BFMT_AspectRatio_e16_9)
3270	{
3271	switch (ePixelRepetition)
3272	{
3273	case BAVC_HDMI_PixelRepetition_eNone:
3274	*VideoID = 7 ;
3275	break;
3276	case BAVC_HDMI_PixelRepetition_e2x:
3277	*VideoID = 11 ;
3278	break;
3279	default:
3280	break;
3281	}
3282	}
3283	else /* default 4:3 */
3284	{
3285	switch (ePixelRepetition)
3286	{
3287	case BAVC_HDMI_PixelRepetition_eNone:
3288	*VideoID = 6 ;
3289	break;
3290	case BAVC_HDMI_PixelRepetition_e2x:
3291	*VideoID = 10 ;
3292	break;
3293	default:
3294	break;
3295	}
3296	}
3297	break ;
3298
3299	case BFMT_VideoFmt_ePAL_B : /* Australia */
3300	case BFMT_VideoFmt_ePAL_B1 : /* Hungary */
3301	case BFMT_VideoFmt_ePAL_D : /* China */
3302	case BFMT_VideoFmt_ePAL_D1 : /* Poland */
3303	case BFMT_VideoFmt_ePAL_G : /* Europe */
3304	case BFMT_VideoFmt_ePAL_H : /* Europe */
3305	case BFMT_VideoFmt_ePAL_K : /* Europe */
3306	case BFMT_VideoFmt_ePAL_I : /* U.K. */
3307	case BFMT_VideoFmt_ePAL_N : /* Jamaica, Uruguay */
3308	case BFMT_VideoFmt_ePAL_NC : /* N combination (Argentina) */
3309	case BFMT_VideoFmt_eSECAM : /* LDK/SECAM (France,Russia) */
3310	if (eAspectRatio == BFMT_AspectRatio_e16_9)
3311	{
3312	switch (ePixelRepetition)
3313	{
3314	case BAVC_HDMI_PixelRepetition_eNone:
3315	*VideoID = 22 ;
3316	break;
3317	case BAVC_HDMI_PixelRepetition_e2x:
3318	*VideoID = 26 ;
3319	break;
3320	default:
3321	break;
3322	}
3323	}
3324	else /* default 4:3 */
3325	{
3326	switch (ePixelRepetition)
3327	{
3328	case BAVC_HDMI_PixelRepetition_eNone:
3329	*VideoID = 21 ;
3330	break;
3331	case BAVC_HDMI_PixelRepetition_e2x:
3332	*VideoID = 25 ;
3333	break;
3334	default:
3335	break;
3336	}
3337	}
3338	break ;
3339
3340	case BFMT_VideoFmt_e1250i_50Hz : /* HD 1250i 50Hz, another 1080i_50hz standard SMPTE 295M */
3341	BDBG_WRN(("Verify AVI Frame Video Code for 1250i Format")) ;
3342	/* fall through to use 1080i 50Hz Video Code */
3343	case BFMT_VideoFmt_e1080i_50Hz : /* HD 1080i 50Hz, 1125 line, SMPTE 274M */
3344	*VideoID = 20 ;
3345	break ;
3346
3347	case BFMT_VideoFmt_e720p_50Hz : /* HD 720p 50Hz (Australia) */
3348	#ifdef BHDM_CONFIG_BLURAY_3D_SUPPORT
3349	case BFMT_VideoFmt_e720p_50Hz_3D : /* HD 720p 50Hz 3D */
3350	#endif
3351	*VideoID = 19 ;
3352	break ;
3353
3354	case BFMT_VideoFmt_e576p_50Hz : /* HD 576p 50Hz (Australia) */
3355	if (eAspectRatio == BFMT_AspectRatio_e16_9)
3356	{
3357	switch (ePixelRepetition)
3358	{
3359	case BAVC_HDMI_PixelRepetition_eNone:
3360	*VideoID = 18 ;
3361	break;
3362	case BAVC_HDMI_PixelRepetition_e2x:
3363	*VideoID = 30 ;
3364	break;
3365	case BAVC_HDMI_PixelRepetition_e4x:
3366	*VideoID = 38 ;
3367	break;
3368	default:
3369	break;
3370	}
3371	}
3372	else /* default 4:3 */
3373	{
3374	switch (ePixelRepetition)
3375	{
3376	case BAVC_HDMI_PixelRepetition_eNone:
3377	*VideoID = 17 ;
3378	break;
3379	case BAVC_HDMI_PixelRepetition_e2x:
3380	*VideoID = 29 ;
3381	break;
3382	case BAVC_HDMI_PixelRepetition_e4x:
3383	*VideoID = 37 ;
3384	break;
3385	default:
3386	break;
3387	}
3388	}
3389	break ;
3390
3391	case BFMT_VideoFmt_eDVI_640x480p : /* DVI Safe mode for computer monitors */
3392	*VideoID = 1 ;
3393	break ;
3394
3395	case BFMT_VideoFmt_e1080p : /* HD 1080p 60Hz */
3396	*VideoID = 16 ;
3397	break ;
3398
3399	case BFMT_VideoFmt_e1080p_50Hz : /* HD 1080p 50Hz */
3400	*VideoID = 31 ;
3401	break ;
3402
3403	case BFMT_VideoFmt_e1080p_30Hz : /* HD 1080p 30Hz */
3404	*VideoID = 34 ;
3405	break ;
3406
3407	case BFMT_VideoFmt_e1080p_24Hz : /* HD 1080p 24Hz */
3408	#ifdef BHDM_CONFIG_BLURAY_3D_SUPPORT
3409	case BFMT_VideoFmt_e1080p_24Hz_3D : /* HD 1080p 24Hz 3D */
3410	#endif
3411	*VideoID = 32 ;
3412	break ;
3413
3414	case BFMT_VideoFmt_e1080p_25Hz : /* HD 1080p 25Hz */
3415	*VideoID = 33 ;
3416	break ;
3417
3418	case BFMT_VideoFmt_eDVI_800x600p:
3419	case BFMT_VideoFmt_eDVI_1024x768p:
3420	case BFMT_VideoFmt_eDVI_1280x768p:
3421	case BFMT_VideoFmt_eDVI_1280x720p_50Hz:
3422	case BFMT_VideoFmt_eDVI_1280x720p:
3423	*VideoID = 0;
3424	BDBG_MSG(("No Video ID Code available for DVI formats"));
3425	break;
3426
3427	default :
3428	*VideoID = 0 ;
3429	BDBG_ERR(("BFMT_VideoFmt %d NOT IMPLEMENTED", eVideoFmt)) ;
3430	break ;
3431	}
3432	}
3433
3434
3435
3436	/******************************************************************************
3437	Summary:
3438	Set the pixel repetition setting
3439	*******************************************************************************/
3440	BERR_Code BHDM_SetPixelRepetition(
3441	BHDM_Handle hHDMI, /* [in] HDMI handle */
3442	BAVC_HDMI_PixelRepetition ePixelRepetition
3443	)
3444	{
3445	BERR_Code rc = BERR_SUCCESS;
3446
3447	BDBG_ENTER(BHDM_SetPixelRepetition) ;
3448	BDBG_ASSERT(hHDMI);
3449
3450	switch (ePixelRepetition)
3451	{
3452	case BAVC_HDMI_PixelRepetition_eNone:
3453	case BAVC_HDMI_PixelRepetition_e2x:
3454	case BAVC_HDMI_PixelRepetition_e3x:
3455	case BAVC_HDMI_PixelRepetition_e4x:
3456	case BAVC_HDMI_PixelRepetition_e5x:
3457	case BAVC_HDMI_PixelRepetition_e6x:
3458	case BAVC_HDMI_PixelRepetition_e7x:
3459	case BAVC_HDMI_PixelRepetition_e8x:
3460	case BAVC_HDMI_PixelRepetition_e9x:
3461	case BAVC_HDMI_PixelRepetition_e10x:
3462	hHDMI->DeviceSettings.ePixelRepetition = ePixelRepetition;
3463	break;
3464
3465	default:
3466	BDBG_ERR(("Invalid Pixel Repetition"));
3467	rc = BERR_INVALID_PARAMETER;
3468	break;
3469	}
3470
3471	BDBG_LEAVE(BHDM_SetPixelRepetition) ;
3472	return rc;
3473
3474	}
3475
3476
3477	/******************************************************************************
3478	Summary:
3479	Get the pixel repetition setting
3480	*******************************************************************************/
3481	BERR_Code BHDM_GetPixelRepetition(
3482	BHDM_Handle hHDMI, /* [in] HDMI handle */
3483	BAVC_HDMI_PixelRepetition *ePixelRepetition
3484	)
3485	{
3486	BDBG_ENTER(BHDM_GetPixelRepetition) ;
3487	BDBG_ASSERT(hHDMI);
3488
3489	if (ePixelRepetition)
3490	{
3491	*ePixelRepetition = hHDMI->DeviceSettings.ePixelRepetition;
3492	}
3493
3494	BDBG_LEAVE(BHDM_GetPixelRepetition) ;
3495	return BERR_SUCCESS;
3496	}
3497
3498
3499	BERR_Code BHDM_ConfigurePreEmphasis(
3500	BHDM_Handle hHDMI, BHDM_PreEmphasisSetting eValue)
3501	{
3502	BERR_Code rc = BERR_SUCCESS ;
3503	uint8_t uDriverAmp ;
3504
3505	switch (eValue)
3506	{
3507	case BHDM_PreEmphasis_eOFF :
3508	uDriverAmp = hHDMI->DeviceSettings.uiDriverAmpDefault ;
3509	break ;
3510
3511	case BHDM_PreEmphasis_eLOW :
3512	case BHDM_PreEmphasis_eMED :
3513	case BHDM_PreEmphasis_eMAX :
3514	uDriverAmp = 0xF ;
3515	break ;
3516
3517	default :
3518	rc = BERR_INVALID_PARAMETER ;
3519	BDBG_ERR(("Invalid PreEmphasis Value specified ")) ;
3520	goto done ;
3521	}
3522
3523	BHDM_P_SetPreEmphasisMode (hHDMI, eValue, uDriverAmp);
3524
3525	done:
3526	return rc ;
3527	}
3528
3529
3530	#if BHDM_CONFIG_PRE_EMPHASIS_SUPPORT
3531	/******************************************************************************
3532	Summary:
3533	Get current pre-emphasis settings
3534	*******************************************************************************/
3535	BERR_Code BHDM_GetPreEmphasisConfiguration(
3536	BHDM_Handle hHDMI,
3537	BHDM_PreEmphasis_Configuration *stPreEmphasisConfig
3538	)
3539	{
3540	BERR_Code rc = BERR_SUCCESS;
3541
3542	BDBG_ENTER(BHDM_GetPreEmphasisConfiguration);
3543
3544	BHDM_P_GetPreEmphasisConfiguration (hHDMI, stPreEmphasisConfig);
3545
3546	BDBG_LEAVE(BHDM_GetPreEmphasisConfiguration);
3547	return rc;
3548	}
3549
3550
3551	/******************************************************************************
3552	Summary:
3553	Set pre-emphasis settings with the provided information
3554	*******************************************************************************/
3555	BERR_Code BHDM_SetPreEmphasisConfiguration(
3556	BHDM_Handle hHDMI,
3557	BHDM_PreEmphasis_Configuration *stPreEmphasisConfig
3558	)
3559	{
3560	BERR_Code rc = BERR_SUCCESS;
3561
3562	BDBG_ENTER(BHDM_SetPreEmphasisConfiguration);
3563
3564	/* Set Preemphasis configurations */
3565	BHDM_P_SetPreEmphasisConfiguration(hHDMI, stPreEmphasisConfig);
3566
3567
3568	BDBG_LEAVE(BHDM_SetPreEmphasisConfiguration);
3569	return rc;
3570	}
3571	#endif
3572
3573
3574	/******************************************************************************
3575	Summary:
3576	Set data transferring mode (master or slave) for HDMI
3577	*******************************************************************************/
3578	BERR_Code BHDM_SetHdmiDataTransferMode(
3579	BHDM_Handle hHDMI,
3580	bool masterMode
3581	)
3582	{
3583	BERR_Code rc = BERR_SUCCESS;
3584	uint32_t Register;
3585
3586	BDBG_ENTER(BHDM_SetHdmiDataTransferMode);
3587
3588	Register = BREG_Read32( hHDMI->hRegister, BCHP_HDMI_FIFO_CTL) ;
3589	Register &= ~( BCHP_MASK(HDMI_FIFO_CTL, MASTER_OR_SLAVE_N)
3590	\| BCHP_MASK(HDMI_FIFO_CTL, USE_FULL));
3591
3592	Register \|= BCHP_FIELD_DATA(HDMI_FIFO_CTL, MASTER_OR_SLAVE_N, masterMode?1:0)
3593	\| BCHP_FIELD_DATA(HDMI_FIFO_CTL, USE_FULL, masterMode?0:1);
3594	BREG_Write32(hHDMI->hRegister, BCHP_HDMI_FIFO_CTL, Register) ;
3595
3596	BDBG_LEAVE(BHDM_SetHdmiDataTransferMode);
3597	return rc;
3598	}
3599
3600
3601	/******************************************************************************
3602	Summary:
3603	Get the current data transferring mode (master or slave) for HDMI
3604	*******************************************************************************/
3605	BERR_Code BHDM_GetHdmiDataTransferMode(
3606	BHDM_Handle hHDMI,
3607	bool *masterMode
3608	)
3609	{
3610	BERR_Code rc = BERR_SUCCESS;
3611	uint32_t Register;
3612
3613	BDBG_ENTER(BHDM_GetHdmiDataTransferMode);
3614
3615	Register = BREG_Read32( hHDMI->hRegister, BCHP_HDMI_FIFO_CTL) ;
3616	*masterMode = (bool) BCHP_GET_FIELD_DATA(Register, HDMI_FIFO_CTL, MASTER_OR_SLAVE_N);
3617
3618	BDBG_LEAVE(BHDM_GetHdmiDataTransferMode);
3619	return rc;
3620	}
3621
3622
3623	/******************************************************************************
3624	Summary:
3625	Get power status of attached receiver
3626	*******************************************************************************/
3627	#define BHDM_RECEIVER_SENSE_ON 0x0F
3628	#define BHDM_RECEIVER_SENSE_OFF 0x00
3629	BERR_Code BHDM_GetReceiverSense(
3630	BHDM_Handle hHDMI, uint8_t *ReceiverSense)
3631	{
3632	/* remember last Receiver Sense values to avoid multiple error output */
3633	static uint8_t uiLastRsen = 0xFF ;
3634	BERR_Code rc;
3635	uint8_t DeviceAttached;
3636
3637
3638	/* check if a Receiver is Attached */
3639	rc = BHDM_RxDeviceAttached(hHDMI, &DeviceAttached);
3640
3641	if (!DeviceAttached)
3642	{
3643	#if BHDM_CONFIG_DEBUG_RSEN
3644	BDBG_WRN(("RxSense: No DVI/HDMI Device Detected")) ;
3645	#endif
3646	return BHDM_NO_RX_DEVICE ;
3647	}
3648
3649	#if BHDM_CONFIG_RECEIVER_SENSE_SUPPORT
3650
3651	/* interrupt should always update the latest updated RSEN value */
3652	BKNI_EnterCriticalSection() ;
3653	BHDM_P_GetReceiverSense_isr(hHDMI) ;
3654	*ReceiverSense = hHDMI->rxSensePowerDetected ?
3655	BHDM_RECEIVER_SENSE_ON : BHDM_RECEIVER_SENSE_OFF ;
3656	BKNI_LeaveCriticalSection() ;
3657	#else
3658	BHDM_P_GetReceiverSense(hHDMI, ReceiverSense);
3659	#endif
3660
3661	if ((ReceiverSense != BHDM_RECEIVER_SENSE_OFF) / TMDS lines all off */
3662	&& (ReceiverSense != BHDM_RECEIVER_SENSE_ON)) / TMDS lines all on */
3663	{
3664	/* if not all TMDS lines are enabled, assume ON */
3665	if (uiLastRsen != *ReceiverSense)
3666	{
3667	BDBG_WRN(("Not all TMDS lines are enabled. HDMI Rx Sense (power): %#x",
3668	*ReceiverSense)) ;
3669	}
3670	uiLastRsen = *ReceiverSense ;
3671
3672	/* report RSEN as powered / on */
3673	*ReceiverSense = BHDM_RECEIVER_SENSE_ON ;
3674	return BERR_SUCCESS ;
3675	}
3676
3677	uiLastRsen = *ReceiverSense ;
3678	return BERR_SUCCESS ;
3679	}
3680
3681
3682	BERR_Code BHDM_GetColorimetry(BHDM_OutputFormat eOutputFormat,
3683	BFMT_VideoFmt eVideoFmt, BAVC_MatrixCoefficients *eColorimetry)
3684	{
3685	BERR_Code rc = BERR_SUCCESS ;
3686
3687	BDBG_WRN(("Use BHDM_EDID_GetSupportedColorimetry() instead; returns recommended and supported colorimetry")) ;
3688
3689
3690	/* default to Limited Range RGB */
3691	*eColorimetry = BAVC_MatrixCoefficients_eHdmi_RGB ;
3692
3693	/* use YPrPb for HDMI monitors */
3694	if (eOutputFormat == BHDM_OutputFormat_eHDMIMode)
3695	{
3696	switch (eVideoFmt)
3697	{
3698	case BFMT_VideoFmt_eDVI_640x480p : /* except for VGA mode */
3699	BDBG_MSG(("Use Full Range RGB")) ;
3700	*eColorimetry = BAVC_MatrixCoefficients_eDvi_Full_Range_RGB ;
3701	break ;
3702
3703	case BFMT_VideoFmt_eNTSC :
3704	case BFMT_VideoFmt_eNTSC_J :
3705	case BFMT_VideoFmt_e480p :
3706	BDBG_MSG(("Use YCrCb SD")) ;
3707	eColorimetry = BAVC_MatrixCoefficients_eSmpte_170M ; / SD Colorspace */
3708	break ;
3709
3710	default : /* all others */
3711	BDBG_MSG(("Use YCrCb HD")) ;
3712	eColorimetry = BAVC_MatrixCoefficients_eItu_R_BT_709 ; / HD Colorspace */
3713	}
3714	}
3715	#if BDBG_DEBUG_BUILD
3716	else
3717	BDBG_MSG(("DVI Monitors/Mode support RGB Only")) ;
3718	#endif
3719
3720
3721	/* use full range rgb for DVI and HDMI 640x480 */
3722	if (*eColorimetry == BAVC_MatrixCoefficients_eHdmi_RGB)
3723	{
3724	switch (eVideoFmt)
3725	{
3726	default :
3727	BDBG_MSG(("Use Limited Range RGB")) ;
3728	/* keep limited range RGB */
3729	break ;
3730
3731	case BFMT_VideoFmt_eDVI_640x480p :
3732	case BFMT_VideoFmt_eDVI_800x600p :
3733	case BFMT_VideoFmt_eDVI_1024x768p :
3734	case BFMT_VideoFmt_eDVI_1280x768p :
3735	case BFMT_VideoFmt_eDVI_1280x720p_50Hz :
3736	case BFMT_VideoFmt_eDVI_1280x720p :
3737	case BFMT_VideoFmt_eDVI_1280x720p_ReducedBlank :
3738	BDBG_MSG(("Use Full Range RGB")) ;
3739	*eColorimetry = BAVC_MatrixCoefficients_eDvi_Full_Range_RGB ;
3740	break ;
3741	}
3742	}
3743
3744	return rc ;
3745	}
3746
3747
3748	/******************************************************************************
3749	Summary: install Hot Plug Change Callback to notify of HP detect changes
3750	*******************************************************************************/
3751	BERR_Code BHDM_InstallHotplugChangeCallback(
3752	BHDM_Handle hHDMI, /* [in] HDMI Handle */
3753	const BHDM_CallbackFunc pfCallback_isr, /* [in] cb for hot plug changes */
3754	void pvParm1, / [in] the first argument (void ) passed to the callback function /
3755	int iParm2) /* [in] the second argument(int) passed to the callback function */
3756	{
3757	BERR_Code rc = BERR_SUCCESS;
3758
3759	BDBG_ENTER(BHDM_InstallHotplugChangeCallback) ;
3760
3761	/* Check if this is a valid function */
3762	if( pfCallback_isr == NULL )
3763	{
3764	rc = BERR_TRACE(BERR_INVALID_PARAMETER);
3765	return rc;
3766	}
3767
3768	BKNI_EnterCriticalSection() ;
3769	hHDMI->pfHotplugChangeCallback = pfCallback_isr ;
3770	hHDMI->pvHotplugChangeParm1 = pvParm1 ;
3771	hHDMI->iHotplugChangeParm2 = iParm2 ;
3772	BKNI_LeaveCriticalSection() ;
3773
3774	BDBG_LEAVE(BHDM_InstallHotplugChangeCallback);
3775
3776	return rc ;
3777	}
3778
3779
3780	/******************************************************************************
3781	Summary: Uninstall HotPlug Change Callback
3782	*******************************************************************************/
3783	BERR_Code BHDM_UnInstallHotplugChangeCallback(
3784	BHDM_Handle hHDMI, /* [in] HDMI Handle */
3785	const BHDM_CallbackFunc pfCallback_isr) /* [in] cb for format changes */
3786	{
3787	BERR_Code rc = BERR_SUCCESS ;
3788	BSTD_UNUSED(pfCallback_isr) ;
3789
3790	BDBG_LEAVE(BHDM_UnInstallHotplugChangeCallback) ;
3791
3792	BKNI_EnterCriticalSection() ;
3793	hHDMI->pfHotplugChangeCallback = (BHDM_CallbackFunc) NULL ;
3794	BKNI_LeaveCriticalSection();
3795
3796	BDBG_LEAVE(BHDM_UnInstallHotplugChangeCallback) ;
3797	return rc;
3798	}
3799
3800
3801
3802	#if BHDM_CONFIG_RECEIVER_SENSE_SUPPORT
3803	/******************************************************************************
3804	Summary: install Receiver Sense Change Callback to notify of RxSense power detect changes
3805	*******************************************************************************/
3806	BERR_Code BHDM_InstallRxSenseChangeCallback(
3807	BHDM_Handle hHDMI, /* [in] HDMI Handle */
3808	const BHDM_CallbackFunc pfCallback_isr, /* [in] cb for Receiver Sense changes */
3809	void pvParm1, / [in] the first argument (void ) passed to the callback function /
3810	int iParm2) /* [in] the second argument(int) passed to the callback function */
3811	{
3812	BERR_Code rc = BERR_SUCCESS;
3813
3814	BDBG_ENTER(BHDM_InstallRxSenseChangeCallback) ;
3815
3816	/* Check if this is a valid function */
3817	if( pfCallback_isr == NULL )
3818	{
3819	rc = BERR_TRACE(BERR_INVALID_PARAMETER);
3820	return rc;
3821	}
3822
3823	BKNI_EnterCriticalSection() ;
3824	hHDMI->pfRxSenseChangeCallback = pfCallback_isr ;
3825	hHDMI->pvRxSenseChangeParm1 = pvParm1 ;
3826	hHDMI->iRxSenseChangeParm2 = iParm2 ;
3827	BKNI_LeaveCriticalSection() ;
3828
3829	BDBG_LEAVE(BHDM_InstallRxSenseChangeCallback);
3830
3831	return rc ;
3832	}
3833
3834
3835	/******************************************************************************
3836	Summary: Uninstall RxSense Change Callback
3837	*******************************************************************************/
3838	BERR_Code BHDM_UnInstallRxSenseChangeCallback(
3839	BHDM_Handle hHDMI, /* [in] HDMI Handle */
3840	const BHDM_CallbackFunc pfCallback_isr) /* [in] cb for format changes */
3841	{
3842	BERR_Code rc = BERR_SUCCESS ;
3843	BSTD_UNUSED(pfCallback_isr) ;
3844
3845	BDBG_LEAVE(BHDM_UnInstallRxSenseChangeCallback) ;
3846
3847	BKNI_EnterCriticalSection() ;
3848	hHDMI->pfRxSenseChangeCallback = (BHDM_CallbackFunc) NULL ;
3849	BKNI_LeaveCriticalSection();
3850
3851	BDBG_LEAVE(BHDM_UnInstallRxSenseChangeCallback) ;
3852	return rc;
3853	}
3854	#endif
3855
3856
3857
3858	void BHDM_GetDefaultStandbySettings(
3859	BHDM_StandbySettings *pSettings
3860	)
3861	{
3862	pSettings->bEnableWakeup = true;
3863	}
3864
3865	/******************************************************************************
3866	Summary: Enter standby mode
3867	*******************************************************************************/
3868	BERR_Code BHDM_Standby(
3869	BHDM_Handle hHDMI, /* [in] HDMI Handle */
3870	const BHDM_StandbySettings *pSettings
3871	)
3872	{
3873	BHDM_StandbySettings settings;
3874	BERR_Code rc ;
3875
3876	if (hHDMI->standby) {
3877	BDBG_ERR(("Already in standby"));
3878	return BERR_UNKNOWN;
3879	}
3880
3881	if (pSettings==NULL) {
3882	BHDM_GetDefaultStandbySettings(&settings);
3883	}
3884	else {
3885	settings = *pSettings;
3886	}
3887
3888	if (!settings.bEnableWakeup) {
3889	/* if wakeup from CEC is not needed, then it doesn't need to be powered */
3890	#ifdef BCHP_PWR_RESOURCE_HDMI_TX_CEC
3891	BCHP_PWR_ReleaseResource(hHDMI->hChip, BCHP_PWR_RESOURCE_HDMI_TX_CEC);
3892	#endif
3893	}
3894	hHDMI->enableWakeup = settings.bEnableWakeup;
3895	hHDMI->standby = true;
3896	rc = BHDM_DisableDisplay(hHDMI); /* this will release the HDMI_TX_TMDS resource */
3897
3898	#ifdef BCHP_PWR_RESOURCE_HDMI_TX_CLK
3899	BCHP_PWR_ReleaseResource(hHDMI->hChip, BCHP_PWR_RESOURCE_HDMI_TX_CLK) ;
3900	#endif
3901
3902	return rc ;
3903
3904	}
3905
3906
3907	/******************************************************************************
3908	Summary: Resume standby mode
3909	*******************************************************************************/
3910	BERR_Code BHDM_Resume(
3911	BHDM_Handle hHDMI /* [in] HDMI Handle */
3912	)
3913	{
3914	BERR_Code rc ;
3915
3916	if (!hHDMI->standby)
3917	{
3918	BDBG_ERR(("Not in standby"));
3919	return BERR_UNKNOWN;
3920	}
3921
3922	#ifdef BCHP_PWR_RESOURCE_HDMI_TX_CLK
3923	BCHP_PWR_AcquireResource(hHDMI->hChip, BCHP_PWR_RESOURCE_HDMI_TX_CLK);
3924	#endif
3925
3926	if (!hHDMI->enableWakeup) {
3927	#ifdef BCHP_PWR_RESOURCE_HDMI_TX_CEC
3928	BCHP_PWR_AcquireResource(hHDMI->hChip, BCHP_PWR_RESOURCE_HDMI_TX_CEC);
3929	#endif
3930	}
3931
3932	hHDMI->standby = false;
3933	rc = BHDM_EnableDisplay(hHDMI, &hHDMI->DeviceSettings); /* this will acquire the HDMI_TX_TMDS resource */
3934	if (rc == BHDM_NO_RX_DEVICE)
3935	{
3936	/* no Rx device connected when resuming.. this is not an error */
3937	BDBG_MSG(("After Resume, if no device is connected, report success")) ;
3938	rc = BERR_SUCCESS ;
3939	}
3940
3941	/* always redo HDMI output reconfiguration when enabling display */
3942	hHDMI->DeviceSettings.bForceEnableDisplay = true ;
3943
3944	return rc ;
3945	}
3946

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source: svn/newcon3bcm2_21bu/magnum/portinginterface/hdm/7552/bhdm.c @ 76

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