source: svn/newcon3bcm2_21bu/magnum/portinginterface/tnr/7552/btnr_global_clk.h

Last change on this file was 76, checked in by megakiss, 10 years ago

1W 대기전력을 만족시키기 위하여 POWEROFF시 튜너를 Standby 상태로 함

  • Property svn:executable set to *
File size: 7.3 KB
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1/******************************************************************************
2 *    (c)2010-2011 Broadcom Corporation
3 *
4 * This program is the proprietary software of Broadcom Corporation and/or its licensors,
5 * and may only be used, duplicated, modified or distributed pursuant to the terms and
6 * conditions of a separate, written license agreement executed between you and Broadcom
7 * (an "Authorized License").  Except as set forth in an Authorized License, Broadcom grants
8 * no license (express or implied), right to use, or waiver of any kind with respect to the
9 * Software, and Broadcom expressly reserves all rights in and to the Software and all
10 * intellectual property rights therein.  IF YOU HAVE NO AUTHORIZED LICENSE, THEN YOU
11 * HAVE NO RIGHT TO USE THIS SOFTWARE IN ANY WAY, AND SHOULD IMMEDIATELY
12 * NOTIFY BROADCOM AND DISCONTINUE ALL USE OF THE SOFTWARE. 
13 * 
14 * Except as expressly set forth in the Authorized License,
15 * 
16 * 1.     This program, including its structure, sequence and organization, constitutes the valuable trade
17 * secrets of Broadcom, and you shall use all reasonable efforts to protect the confidentiality thereof,
18 * and to use this information only in connection with your use of Broadcom integrated circuit products.
19 * 
20 * 2.     TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS"
21 * AND WITH ALL FAULTS AND BROADCOM MAKES NO PROMISES, REPRESENTATIONS OR
22 * WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH RESPECT TO
23 * THE SOFTWARE.  BROADCOM SPECIFICALLY DISCLAIMS ANY AND ALL IMPLIED WARRANTIES
24 * OF TITLE, MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR PURPOSE,
25 * LACK OF VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET POSSESSION
26 * OR CORRESPONDENCE TO DESCRIPTION. YOU ASSUME THE ENTIRE RISK ARISING OUT OF
27 * USE OR PERFORMANCE OF THE SOFTWARE.
28 *
29 * 3.     TO THE MAXIMUM EXTENT PERMITTED BY LAW, IN NO EVENT SHALL BROADCOM OR ITS
30 * LICENSORS BE LIABLE FOR (i) CONSEQUENTIAL, INCIDENTAL, SPECIAL, INDIRECT, OR
31 * EXEMPLARY DAMAGES WHATSOEVER ARISING OUT OF OR IN ANY WAY RELATING TO YOUR
32 * USE OF OR INABILITY TO USE THE SOFTWARE EVEN IF BROADCOM HAS BEEN ADVISED OF
33 * THE POSSIBILITY OF SUCH DAMAGES; OR (ii) ANY AMOUNT IN EXCESS OF THE AMOUNT
34 * ACTUALLY PAID FOR THE SOFTWARE ITSELF OR U.S. $1, WHICHEVER IS GREATER. THESE
35 * LIMITATIONS SHALL APPLY NOTWITHSTANDING ANY FAILURE OF ESSENTIAL PURPOSE OF
36 * ANY LIMITED REMEDY.
37 *
38 * $brcm_Workfile: btnr_global_clk.h $
39 * $brcm_Revision: 19 $
40 * $brcm_Date: 12/8/11 3:15p $
41 *
42 * Module Description:
43 *
44 * Revision History:
45 *
46 * $brcm_Log: /AP/ctfe/core/tnr/btnr_global_clk.h $
47 *
48 * 19   12/8/11 3:15p shchang
49 * SW3461-1: set REFPLL_FREQ_SEL to 1
50 *
51 * 18   11/4/11 4:11p farshidf
52 * SW3461-82: merge to main
53 *
54 * Fw_Integration_Devel/5   11/4/11 11:38a farshidf
55 * SW3461-82: merge to integ
56 *
57 * Fw_Integration_Devel/AP_V3_0_TNR_DEV/1   10/24/11 5:02p cbrooks
58 * sw3461-1:Added 0 Hz CWC
59 *
60 * 17   8/12/11 3:15p farshidf
61 * SW3461-1: merge to main
62 *
63 * Fw_Integration_Devel/3   8/12/11 2:11p farshidf
64 * SW3461-1: merge to integ
65 *
66 * Fw_Integration_Devel/AP_V0_6_TNR_DEV/4   7/27/11 7:05p cbrooks
67 * sw3461-1:removed frequency dependent gain offsets
68 *
69 * Fw_Integration_Devel/AP_V0_6_TNR_DEV/3   7/27/11 4:19p cbrooks
70 * sw3461-1:added 540 MHz cwc
71 *
72 * Fw_Integration_Devel/AP_V0_6_TNR_DEV/2   7/14/11 5:21p cbrooks
73 * sw3461-1:added callback support for gains
74 *
75 * Fw_Integration_Devel/AP_V0_6_TNR_DEV/1   7/1/11 3:19p cbrooks
76 * sw3461-1:added callback support
77 *
78 * Fw_Integration_Devel/1   6/29/11 12:39p farshidf
79 * SW3461-13: merge to integration branch
80 *
81 * Fw_Integration_Devel/Tnr_Fw_Devel_Rc05/1   6/20/11 3:06p cbrooks
82 * sw3461-1:Added GAIN_OFFSET for channel power
83 *
84 * 14   6/12/11 11:01a farshidf
85 * SW3461-1: remove warning for 7552
86 *
87 * 13   6/12/11 10:57a farshidf
88 * SW3461-1: remove warning for 7552
89 *
90 * 12   6/9/11 6:39p mpovich
91 * SW3461-1: Merge Ver 0.4 Integ. onto main branch.
92 *
93 * SW_System_4_Integ_Test/1   6/9/11 12:26p mpovich
94 * SW3461-1: Integrate latest from all devel. branches.  Convert end of
95 *  line comments per coding standard.
96 *
97 * Tnr_Fw_Devel_4/1   6/6/11 7:48p cbrooks
98 * sw3461-1:Added Spur Table
99 *
100 * 11   5/20/11 6:42a mpovich
101 * SW3461-1: rename UFE (BUFE) module to TNR (BTNR).
102 *
103 * TNR_3461_1/1   5/19/11 5:12p mpovich
104 * SW3461-1: Change BUFE module prefix to BTNR
105 *
106 * 10   5/3/11 1:39p mpovich
107 * SW3461-1: Merge to main of intermediate label, FW_3461_A0_05022011_1100
108 *  (05/02/2011 Pace build).
109 *
110 * TNR_3461_1/3   4/26/11 8:40p cbrooks
111 * sw3461-1:added spur table
112 *
113 * 9   4/26/11 8:22p farshidf
114 * SW3461-1: add spur table
115 *
116 * 8   3/25/11 6:31p mpovich
117 * SW3128-1: Merge latest from TNR branch to main branch.
118 *
119 * TNR_3461_1/2   3/24/11 11:53a jputnam
120 * SW3461-1: Change TNR clock to 540MHz for cable mode
121 *
122 * 7   3/18/11 4:11p farshidf
123 * SW3461-1: merge  main
124 *
125 * TNR_3461_1/1   3/16/11 8:42p cbrooks
126 * sw3461-1:added MIPS timer
127 *
128 * 6   3/10/11 5:07p cbrooks
129 * sw3461-1:new code
130 *
131 * 5   3/9/11 7:21p cbrooks
132 * sw3461-1:Addef TNR programming code
133 *
134 * 4   3/8/11 8:25p cbrooks
135 * sw3461-1:new code
136 *
137 * 3   3/8/11 2:42p cbrooks
138 * sw3461-1:new code
139 *
140 * 2   3/7/11 9:10p cbrooks
141 * sw3128-1:new code
142 *
143 * 1   2/2/11 9:49p farshidf
144 * SW3461-1: new file
145 *
146 * 1   1/26/11 4:24p farshidf
147 * SW3128-1: new file
148 *
149 *****************************************************************************/
150
151#ifndef _BTNR_GLOBAL_CLK_H__
152#define _BTNR_GLOBAL_CLK_H__
153
154#ifdef __cplusplus
155extern "C" {
156#endif
157
158/*The following offsets need to be set board to board, this set was done with the BCM93461DC1_01*/
159/*Gain offsets for board to get channel power, values are offsets in db*256*/
160#define GAIN_OFFSET  20*256  /*Calibrate at 500 MHz and 0 dbmv*/
161
162
163#define MIPS_TIMER 108000000
164
165#define REF_FREQ 54000000UL
166
167/*Choose 1 REFPLL Rate*/
168/*0 for 1080000000, 1 for 1350000000*/
169#define REFPLL_FREQ_SEL 1
170
171/*Assumes REF_FREQ = 54000000 and that
172 *BTNR_P_TunerInit() makes the #define true*/
173#if (REFPLL_FREQ_SEL == 0)
174#define REFPLL_FREQ    1080000000UL
175#endif
176#if (REFPLL_FREQ_SEL == 1)
177#define REFPLL_FREQ    1350000000UL
178#endif
179
180/*It is assumed that the BTNR_P_TunerInit()
181 * and BTNR_P_Program_CIC_HB_SAW()
182 *makes the following #defines true       */
183#define TERR_PHYPLL1_FREQ  2700000000UL   
184#define TERR_PHYPLL2_FREQ  1350000000UL           
185#define TERR_PHYPLL3_FREQ   225000000UL             
186#define TERR_PHYPLL4_FREQ   100000000UL             
187#define TERR_PHYPLL5_FREQ    10546875UL                                         
188#define TERR_PHYPLL6_FREQ   540000000UL
189#define F_TER                54000000UL 
190#define CABLE_PHYPLL1_FREQ 2632500000UL
191#define CABLE_PHYPLL2_FREQ 1316250000UL           
192#define CABLE_PHYPLL3_FREQ  219375000UL             
193#define CABLE_PHYPLL4_FREQ   97500000UL             
194#define CABLE_PHYPLL5_FREQ   10283203UL                                         
195#define CABLE_PHYPLL6_FREQ  540000000UL /* 526500000UL */
196#define F_HS                         15000000UL /* 14625000UL */
197#define F_1S                 30000000UL /* 29250000UL */
198
199
200#define REF_FREQ_D128 421875
201#define DPM_FREQ_MAX 1012600000
202#define DPM_FREQ_MIN 31640625
203
204#ifdef LEAP_BASED_CODE
205#define SPUR_TBL_SIZE 11
206static uint32_t SPUR_TBL[SPUR_TBL_SIZE] =
207{
208 0, 54000000, 675000000,  99900000, 432000000,
209810000000, 864000000, 486000000, 594000000,
210648000000, 540000000
211};
212#endif
213#ifdef __cplusplus
214}
215#endif
216
217#endif
218
219 
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