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bvbi_cce.c

Last change on this file was 69, checked in by phkim, 10 years ago

1.phkim

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- VBI 캡션 disabled

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1	/***************************************************************************
2	* Copyright (c) 2003-2012, Broadcom Corporation
3	* All Rights Reserved
4	* Confidential Property of Broadcom Corporation
5	*
6	* THIS SOFTWARE MAY ONLY BE USED SUBJECT TO AN EXECUTED SOFTWARE LICENSE
7	* AGREEMENT BETWEEN THE USER AND BROADCOM. YOU HAVE NO RIGHT TO USE OR
8	* EXPLOIT THIS MATERIAL EXCEPT SUBJECT TO THE TERMS OF SUCH AN AGREEMENT.
9	*
10	* $brcm_Workfile: bvbi_cce.c $
11	* $brcm_Revision: Hydra_Software_Devel/13 $
12	* $brcm_Date: 2/20/12 2:53p $
13	*
14	* Module Description:
15	*
16	* Revision History:
17	*
18	* $brcm_Log: /magnum/portinginterface/vbi/7420/bvbi_cce.c $
19	*
20	* Hydra_Software_Devel/13 2/20/12 2:53p darnstein
21	* SW7425-2434: more detail in error messages.
22	*
23	* Hydra_Software_Devel/12 2/20/12 12:55p darnstein
24	* SW7425-2434: when an unsupported video format is entered, the BDBG
25	* error message should be informative.
26	*
27	* Hydra_Software_Devel/11 10/28/10 6:14p darnstein
28	* SW7422-46: Use new SCTE features in CCE hardware core, where available.
29	*
30	* Hydra_Software_Devel/10 10/1/10 2:35p darnstein
31	* SW7422-46: Adapt to 7422 and 7425 chipsets.
32	*
33	* Hydra_Software_Devel/7 1/14/10 5:41p darnstein
34	* SW7400-2659: Lin Ma's register settings for PAL-M closed caption are
35	* all in place.
36	*
37	* Hydra_Software_Devel/6 1/13/10 10:41p darnstein
38	* SW7400-2659: for PAL-M, move closed caption up (earlier) by three video
39	* lines. This might have to be refined later.
40	*
41	* Hydra_Software_Devel/5 12/21/09 6:59p darnstein
42	* SW7550-120: Add support for SECAM variants.
43	*
44	* Hydra_Software_Devel/4 4/23/09 5:02p darnstein
45	* PR54546: for closed caption output, treat PAL-M just like NTSC.
46	*
47	* Hydra_Software_Devel/3 3/27/09 7:43p darnstein
48	* PR53635: Remove internal ConfigForOthers code. It is obsolete, and it
49	* was causing a problem (this PR).
50	*
51	* Hydra_Software_Devel/2 12/4/08 6:06p darnstein
52	* PR45819: 7420 software will now compile, but not link.
53	*
54	* Hydra_Software_Devel/1 12/3/08 8:00p darnstein
55	* PR45819:
56	*
57	***************************************************************************/
58
59	#include "bstd.h" /* standard types */
60	#include "bdbg.h" /* Dbglib */
61	#include "bkni.h" /* For critical sections */
62	#include "bvbi.h" /* VBI processing, this module. */
63	#include "bvbi_priv.h" /* VBI internal data structures */
64
65	#if (BVBI_P_NUM_CCE >= 1)
66	#include "bchp_cce_0.h" /* RDB info for primary CCE core */
67	#endif
68	#if (BVBI_P_NUM_CCE >= 2)
69	#include "bchp_cce_1.h" /* RDB info for secondary CCE core */
70	#endif
71	#if (BVBI_P_NUM_CCE >= 3)
72	#include "bchp_cce_2.h" /* RDB info for tertiary CCE core */
73	#endif
74	#if (BVBI_P_NUM_CCE_656 >= 1)
75	#include "bchp_cce_ancil_0.h" /* RDB info for ITU-R 656 passthrough CCE core */
76	#endif
77
78	BDBG_MODULE(BVBI);
79
80	/* Some special aliases for SCTE features */
81	#if defined(BVBI_P_CCE_VER2)
82	#define BCHP_CCE_0_Active_Lines_TOP_ACTIVE_MASK \
83	BCHP_CCE_0_Active_Lines_default_TOP_ACTIVE_MASK
84	#define BCHP_CCE_0_Active_Lines_TOP_ACTIVE_SHIFT \
85	BCHP_CCE_0_Active_Lines_default_TOP_ACTIVE_SHIFT
86	#define BCHP_CCE_0_Active_Lines_BOT_ACTIVE_MASK \
87	BCHP_CCE_0_Active_Lines_default_BOT_ACTIVE_MASK
88	#define BCHP_CCE_0_Active_Lines_BOT_ACTIVE_SHIFT \
89	BCHP_CCE_0_Active_Lines_default_BOT_ACTIVE_SHIFT
90	#endif
91
92
93	/***************************************************************************
94	* Forward declarations of static (private) functions
95	***************************************************************************/
96	static uint8_t BVBI_P_SetOddParityBit( uint8_t uchByte );
97	static uint32_t P_GetCoreOffset (bool is656, uint8_t hwCoreIndex);
98
99
100	/***************************************************************************
101	* Implementation supporting closed caption functions that are not in API
102	***************************************************************************/
103
104
105	/***************************************************************************
106	*
107	*/
108	void BVBI_P_CC_Enc_Init (BREG_Handle hReg, bool is656, uint8_t hwCoreIndex)
109	{
110	BDBG_ENTER(BVBI_P_CC_Enc_Init);
111
112	BVBI_P_VIE_SoftReset (hReg, is656, hwCoreIndex, BVBI_P_SELECT_CC);
113
114	BDBG_LEAVE(BVBI_P_CC_Enc_Init);
115	}
116
117	/***************************************************************************
118	*
119	*/
120	uint16_t BVBI_P_SetCCParityBits_isr( uint16_t uchData )
121	{
122	union {
123	uint16_t d16;
124	uint8_t d8[2];
125	} convenience;
126
127	BDBG_ENTER(BVBI_P_SetCCParityBits_isr);
128
129	convenience.d16 = uchData;
130	convenience.d8[0] = BVBI_P_SetOddParityBit (convenience.d8[0]);
131	convenience.d8[1] = BVBI_P_SetOddParityBit (convenience.d8[1]);
132
133	BDBG_LEAVE(BVBI_P_SetCCParityBits_isr);
134	return convenience.d16;
135	}
136
137	/***************************************************************************
138	*
139	*/
140	BERR_Code BVBI_P_CC_Enc_Program (
141	BREG_Handle hReg,
142	bool is656,
143	uint8_t hwCoreIndex,
144	bool bActive,
145	bool bPR18010_bad_line_number,
146	BFMT_VideoFmt eVideoFormat)
147	{
148	/*
149	Programming note: the implementation here assumes that the bitfield layout
150	within registers is the same for all CC encoder cores in the chip.
151
152	If a chip is built that has multiple CC encoder cores that are not
153	identical, then this routine will have to be redesigned.
154	*/
155	uint32_t ulControlReg;
156	uint32_t ulLinesReg;
157	uint32_t ulGain;
158	uint32_t ulLineMask;
159	uint32_t ulDelayCount;
160	uint32_t ulGainDelayReg = 0;
161	uint32_t ulCoreOffset;
162
163	BDBG_ENTER(BVBI_P_CC_Enc_Program);
164
165	/* Determine which core to access */
166	ulCoreOffset = P_GetCoreOffset (is656, hwCoreIndex);
167	if (ulCoreOffset == 0xFFFFFFFF)
168	{
169	/* This should never happen! This parameter was checked by
170	BVBI_Encode_Create() */
171	BDBG_LEAVE(BVBI_P_CC_Enc_Program);
172	return BERR_TRACE(BERR_INVALID_PARAMETER);
173	}
174
175	/* If user wants to turn off closed caption processing, just use the
176	enable bit. */
177	if (!bActive)
178	{
179	ulControlReg =
180	BREG_Read32 ( hReg, BCHP_CCE_0_Control + ulCoreOffset );
181	ulControlReg &=
182	~BCHP_MASK (CCE_0_Control, ENABLE_CLOSED_CAPTION );
183	ulControlReg \|=
184	BCHP_FIELD_ENUM (CCE_0_Control, ENABLE_CLOSED_CAPTION, DISABLED);
185	BREG_Write32 (
186	hReg, BCHP_CCE_0_Control + ulCoreOffset, ulControlReg );
187	BDBG_LEAVE(BVBI_P_CC_Enc_Program);
188	return BERR_SUCCESS;
189	}
190
191	/* Select video format */
192	switch (eVideoFormat)
193	{
194	case BFMT_VideoFmt_eNTSC:
195	case BFMT_VideoFmt_eNTSC_J:
196	case BFMT_VideoFmt_ePAL_M:
197	/* NTSC specific settings */
198
199	ulGain = 0x47;
200	ulDelayCount = 0x3A;
201	if (is656)
202	{
203	ulLineMask = (bPR18010_bad_line_number ? 0x0400 : 0x1000);
204	}
205	else
206	{
207	ulLineMask = 0x2000;
208	}
209	if (eVideoFormat == BFMT_VideoFmt_ePAL_M)
210	{
211	ulGain = 0x4A;
212	ulDelayCount = 0xD;
213	ulLineMask >>= 3;
214	}
215	break;
216
217	case BFMT_VideoFmt_ePAL_B:
218	case BFMT_VideoFmt_ePAL_B1:
219	case BFMT_VideoFmt_ePAL_D:
220	case BFMT_VideoFmt_ePAL_D1:
221	case BFMT_VideoFmt_ePAL_G:
222	case BFMT_VideoFmt_ePAL_H:
223	case BFMT_VideoFmt_ePAL_K:
224	case BFMT_VideoFmt_ePAL_I:
225	case BFMT_VideoFmt_ePAL_N:
226	case BFMT_VideoFmt_ePAL_NC:
227	case BFMT_VideoFmt_eSECAM_L:
228	case BFMT_VideoFmt_eSECAM_B:
229	case BFMT_VideoFmt_eSECAM_G:
230	case BFMT_VideoFmt_eSECAM_D:
231	case BFMT_VideoFmt_eSECAM_K:
232	case BFMT_VideoFmt_eSECAM_H:
233	/* 576I settings */
234
235	ulGain = 0x46;
236	ulDelayCount = 0x01;
237	if (is656)
238	{
239	ulLineMask = (bPR18010_bad_line_number ? 0x4000 : 0x2000);
240	}
241	else
242	{
243	ulLineMask = 0x4000;
244	}
245	#if (BVDC_P_3DCOMB_TTD_CONFLICT)
246	ulLineMask >>= 1;
247	#endif
248
249	break;
250	default:
251	BDBG_LEAVE(BVBI_P_CC_Enc_Program);
252	BDBG_ERR(("BVBI_CCE: video format %d not supported", eVideoFormat));
253	return BERR_TRACE(BERR_INVALID_PARAMETER);
254	break;
255	}
256
257	BKNI_EnterCriticalSection();
258
259	/* set the format specific gain delay values, if any. */
260	if (!is656)
261	{
262	ulGainDelayReg = BREG_Read32 (
263	hReg, BCHP_CCE_0_Gain_Delay + ulCoreOffset );
264	ulGainDelayReg &= ~(
265	BCHP_MASK ( CCE_0_Gain_Delay, GAIN ) \|
266	BCHP_MASK ( CCE_0_Gain_Delay, DELAY_COUNT ) );
267	ulGainDelayReg \|= (
268	BCHP_FIELD_DATA ( CCE_0_Gain_Delay, GAIN, ulGain) \|
269	BCHP_FIELD_DATA ( CCE_0_Gain_Delay, DELAY_COUNT,
270	ulDelayCount) );
271	BREG_Write32 (
272	hReg, BCHP_CCE_0_Gain_Delay + ulCoreOffset, ulGainDelayReg );
273	}
274
275	/* get the active lines register */
276	/* Activate lines 22 and 335 for NTSC */
277	ulLinesReg =
278	BREG_Read32 ( hReg, BCHP_CCE_0_Active_Lines + ulCoreOffset );
279	ulLinesReg &= ~(
280	BCHP_MASK ( CCE_0_Active_Lines, TOP_ACTIVE ) \|
281	BCHP_MASK ( CCE_0_Active_Lines, BOT_ACTIVE ) );
282	ulLinesReg \|= (
283	BCHP_FIELD_DATA ( CCE_0_Active_Lines, TOP_ACTIVE, ulLineMask ) \|
284	BCHP_FIELD_DATA ( CCE_0_Active_Lines, BOT_ACTIVE, ulLineMask ) );
285	BREG_Write32 (
286	hReg, BCHP_CCE_0_Active_Lines + ulCoreOffset, ulLinesReg );
287
288	/* program the control register with non-format specific values */
289	ulControlReg = BREG_Read32 ( hReg, BCHP_CCE_0_Control + ulCoreOffset );
290	ulControlReg &= ~(
291	BCHP_MASK (CCE_0_Control, reserved0 )\|
292	BCHP_MASK (CCE_0_Control, reserved_for_eco1 )\|
293	#if defined(BVBI_P_CCE_VER2)
294	BCHP_MASK (CCE_0_Control, SCTE_MODE )\|
295	#endif
296	/* set parity bits so we provide the parity */
297	BCHP_MASK (CCE_0_Control, TOP_FLD_PARITY )\|
298	BCHP_MASK (CCE_0_Control, BOT_FLD_PARITY )\|
299	BCHP_MASK (CCE_0_Control, TOP_FLD_STAT )\|
300	BCHP_MASK (CCE_0_Control, BOT_FLD_STAT )\|
301	BCHP_MASK (CCE_0_Control, NULL_CHARACTER )\|
302	BCHP_MASK (CCE_0_Control, BYTEIF_ENDIAN_ORDER )\|
303	BCHP_MASK (CCE_0_Control, BYTE_SWAP )\|
304	BCHP_MASK (CCE_0_Control, SHIFT_DIRECTION )\|
305	BCHP_MASK (CCE_0_Control, reserved2 )\|
306	BCHP_MASK (CCE_0_Control, REGISTER_USE_MODE )\|
307	BCHP_MASK (CCE_0_Control, ENABLE_CLOSED_CAPTION )
308	);
309	ulControlReg \|= (
310	BCHP_FIELD_DATA(CCE_0_Control, reserved0, 0 )\|
311	BCHP_FIELD_DATA(CCE_0_Control, reserved_for_eco1, 0 )\|
312	#if defined(BVBI_P_CCE_VER2)
313	BCHP_FIELD_ENUM( CCE_0_Control, SCTE_MODE, SCTE_OFF )\|
314	#endif
315	/* set parity bits so we provide the parity */
316	BCHP_FIELD_ENUM(CCE_0_Control, TOP_FLD_PARITY, AUTOMATIC )\|
317	BCHP_FIELD_ENUM(CCE_0_Control, BOT_FLD_PARITY, AUTOMATIC )\|
318	BCHP_FIELD_DATA(CCE_0_Control, TOP_FLD_STAT, 0 )\|
319	BCHP_FIELD_DATA(CCE_0_Control, BOT_FLD_STAT, 0 )\|
320	BCHP_FIELD_DATA(CCE_0_Control, NULL_CHARACTER, 0x80 )\|
321	BCHP_FIELD_ENUM(CCE_0_Control, BYTEIF_ENDIAN_ORDER, MAINTAIN )\|
322	BCHP_FIELD_ENUM(CCE_0_Control, BYTE_SWAP, LITTLE_ENDIAN)\|
323	BCHP_FIELD_ENUM(CCE_0_Control, SHIFT_DIRECTION, LSB2MSB )\|
324	BCHP_FIELD_DATA(CCE_0_Control, reserved2, 0 )\|
325	BCHP_FIELD_ENUM(CCE_0_Control, REGISTER_USE_MODE, SPLIT )\|
326	BCHP_FIELD_ENUM(CCE_0_Control, ENABLE_CLOSED_CAPTION, DISABLED )
327	);
328
329	/* Format register for PAL vs NTSC */
330	ulControlReg &= ~BCHP_MASK ( CCE_0_Control, VIDEO_FORMAT );
331	if ((eVideoFormat == BFMT_VideoFmt_eNTSC ) \|\|
332	(eVideoFormat == BFMT_VideoFmt_eNTSC_J) \|\|
333	(eVideoFormat == BFMT_VideoFmt_ePAL_M ) )
334	{
335	ulControlReg \|= BCHP_FIELD_ENUM(CCE_0_Control, VIDEO_FORMAT, NTSC);
336	}
337	else /* eVideoFormat == BFMT_VideoFmt_ePAL_whatever */
338	{
339	ulControlReg \|= BCHP_FIELD_ENUM(CCE_0_Control, VIDEO_FORMAT, PAL );
340	}
341
342	/* Write the finished control register value, finally. */
343	BREG_Write32 ( hReg, BCHP_CCE_0_Control + ulCoreOffset, ulControlReg );
344
345	BKNI_LeaveCriticalSection();
346
347	BDBG_LEAVE(BVBI_P_CC_Enc_Program);
348	return BERR_SUCCESS;
349	}
350
351	uint32_t BVBI_P_CC_Encode_Data_isr (
352	BREG_Handle hReg,
353	bool is656,
354	uint8_t hwCoreIndex,
355	BAVC_Polarity polarity,
356	uint16_t usData)
357	{
358	uint8_t ucRegNum;
359	uint16_t usWord0;
360	uint32_t ulCoreOffset;
361	uint32_t ulReg;
362	uint32_t ulRegAddr;
363	uint32_t ulErrInfo = 0;
364
365	BDBG_ENTER(BVBI_P_CC_Encode_Data_isr);
366
367	/* Get register offset */
368	ulCoreOffset = P_GetCoreOffset (is656, hwCoreIndex);
369	if (ulCoreOffset == 0xFFFFFFFF)
370	{
371	/* This should never happen! This parameter was checked by
372	BVBI_Encode_Create() */
373	BDBG_LEAVE(BVBI_P_CC_Encode_Data_isr);
374	return (uint32_t)(-1);
375	}
376
377	/* Choose register number */
378	ucRegNum = (uint8_t)(polarity == BAVC_Polarity_eTopField) ? 0 : 3;
379	ulRegAddr =
380	BCHP_CCE_0_Data0 + ulCoreOffset + (sizeof(uint32_t) * ucRegNum);
381
382	/* Get existing register value */
383	ulReg =
384	BREG_Read32 (hReg, ulRegAddr);
385
386	/* Encode VBI data back into register value */
387	/* usWord0 = BVBI_P_SetCCParityBits_isr (usData); */
388	usWord0 = usData;
389	ulReg &= ~BCHP_MASK (CCE_0_Data0, WORD0 );
390	ulReg \|= BCHP_FIELD_DATA (CCE_0_Data0, WORD0, usWord0);
391
392	/* Write new register value */
393	BREG_Write32 (hReg, ulRegAddr, ulReg);
394
395	BDBG_LEAVE(BVBI_P_CC_Encode_Data_isr);
396	return ulErrInfo;
397	}
398
399
400	/***************************************************************************
401	*
402	*/
403	BERR_Code BVBI_P_CC_Encode_Enable_isr (
404	BREG_Handle hReg,
405	bool is656,
406	uint8_t hwCoreIndex,
407	BFMT_VideoFmt eVideoFormat,
408	bool bEnable)
409	{
410	uint32_t ulCoreOffset;
411	uint32_t ulControlReg;
412
413	/* TODO: handle progressive video */
414	BSTD_UNUSED (eVideoFormat);
415
416	BDBG_ENTER(BVBI_P_CC_Encode_Enable_isr);
417
418	/* Figure out which encoder core to use */
419	ulCoreOffset = P_GetCoreOffset (is656, hwCoreIndex);
420	if (ulCoreOffset == 0xFFFFFFFF)
421	{
422	/* This should never happen! This parameter was checked by
423	BVBI_Encode_Create() */
424	BDBG_LEAVE(BVBI_P_CC_Encode_Enable_isr);
425	return BERR_TRACE(BERR_INVALID_PARAMETER);
426	}
427
428	ulControlReg = BREG_Read32 ( hReg, BCHP_CCE_0_Control + ulCoreOffset );
429	ulControlReg &=
430	~BCHP_MASK (CCE_0_Control, ENABLE_CLOSED_CAPTION);
431	if (bEnable)
432	{
433	ulControlReg \|=
434	BCHP_FIELD_ENUM (CCE_0_Control, ENABLE_CLOSED_CAPTION, ENABLED);
435	}
436	else
437	{
438	ulControlReg \|=
439	BCHP_FIELD_ENUM (CCE_0_Control, ENABLE_CLOSED_CAPTION, DISABLED);
440	}
441	BREG_Write32 ( hReg, BCHP_CCE_0_Control + ulCoreOffset, ulControlReg );
442
443	BDBG_LEAVE(BVBI_P_CC_Encode_Enable_isr);
444	return BERR_SUCCESS;
445	}
446
447
448	/***************************************************************************
449	* Static (private) functions
450	***************************************************************************/
451
452	/***************************************************************************
453	*
454	*/
455	static uint8_t BVBI_P_SetOddParityBit( uint8_t uchByte )
456	{
457	uint8_t uchOriginalByte = uchByte;
458	uint8_t uchParity = 0;
459	uint8_t i = 0;
460
461	/* traverse through all 7 bits to count the number of 1's */
462	for (i = 0; i < 7; ++i)
463	{
464	/* sum current bit and shift */
465	uchParity = (uint8_t)(uchParity + (uchByte & 0x1));
466	uchByte >>= 1;
467	}
468
469	/* return parity with original bits */
470	return (uint8_t)(((uchParity & 0x1) ? 0x00 : 0x80) \|
471	((uint8_t)(uchOriginalByte & 0x7F)));
472	}
473
474	/***************************************************************************
475	*
476	*/
477	static uint32_t P_GetCoreOffset (bool is656, uint8_t hwCoreIndex)
478	{
479	uint32_t ulCoreOffset = 0xFFFFFFFF;
480
481	if (is656)
482	{
483	#if (BVBI_P_NUM_CCE_656_0 >= 1)
484	ulCoreOffset = (BCHP_CCE_ANCIL_0_Ancil_RevID - BCHP_CCE_0_RevID);
485	#endif
486	}
487	else
488	{
489	switch (hwCoreIndex)
490	{
491	#if (BVBI_P_NUM_CCE >= 1)
492	case 0:
493	ulCoreOffset = 0;
494	break;
495	#endif
496	#if (BVBI_P_NUM_CCE >= 2)
497	case 1:
498	ulCoreOffset = (BCHP_CCE_1_RevID - BCHP_CCE_0_RevID);
499	break;
500	#endif
501	#if (BVBI_P_NUM_CCE >= 3)
502	case 2:
503	ulCoreOffset = (BCHP_CCE_2_RevID - BCHP_CCE_0_RevID);
504	break;
505	#endif
506	default:
507	break;
508	}
509	}
510
511	return ulCoreOffset;
512	}

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source: svn/newcon3bcm2_21bu/magnum/portinginterface/vbi/7552/bvbi_cce.c

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