| 1 | /*************************************************************************** |
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| 2 | * Copyright (c) 2003-2011, Broadcom Corporation |
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| 3 | * All Rights Reserved |
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| 4 | * Confidential Property of Broadcom Corporation |
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| 5 | * |
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| 6 | * THIS SOFTWARE MAY ONLY BE USED SUBJECT TO AN EXECUTED SOFTWARE LICENSE |
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| 7 | * AGREEMENT BETWEEN THE USER AND BROADCOM. YOU HAVE NO RIGHT TO USE OR |
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| 8 | * EXPLOIT THIS MATERIAL EXCEPT SUBJECT TO THE TERMS OF SUCH AN AGREEMENT. |
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| 9 | * |
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| 10 | * $brcm_Workfile: bvbi_chip_priv.h $ |
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| 11 | * $brcm_Revision: Hydra_Software_Devel/38 $ |
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| 12 | * $brcm_Date: 10/28/11 2:39p $ |
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| 13 | * |
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| 14 | * Module Description: |
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| 15 | * Define features that are hardware-specific. For private use by BVBI |
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| 16 | * software module. |
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| 17 | * |
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| 18 | * Revision History: |
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| 19 | * |
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| 20 | * $brcm_Log: /magnum/portinginterface/vbi/7420/bvbi_chip_priv.h $ |
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| 21 | * |
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| 22 | * Hydra_Software_Devel/38 10/28/11 2:39p darnstein |
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| 23 | * SW7435-14: port to 7435. Same software behavior as for 7425. |
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| 24 | * |
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| 25 | * Hydra_Software_Devel/37 9/9/11 7:12p darnstein |
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| 26 | * SW7429-15: trivial adaptation to 7429 chipset. |
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| 27 | * |
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| 28 | * Hydra_Software_Devel/36 6/14/11 2:27p darnstein |
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| 29 | * SWDTV-7525: back out previous check-in. |
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| 30 | * |
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| 31 | * Hydra_Software_Devel/35 6/13/11 4:30p darnstein |
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| 32 | * SWDTV-7525: trivially add support for 35330 chipset. |
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| 33 | * |
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| 34 | * Hydra_Software_Devel/34 4/20/11 4:25p darnstein |
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| 35 | * SWBLURAY-23702: 7640 chipset has crossbar VEC. |
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| 36 | * |
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| 37 | * Hydra_Software_Devel/33 4/4/11 4:19p darnstein |
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| 38 | * SWBLURAY-23702: add support for 7640 chipset. |
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| 39 | * |
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| 40 | * Hydra_Software_Devel/32 3/24/11 5:25p darnstein |
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| 41 | * SWDTV-6195: Add references to new 35233 chipset. |
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| 42 | * |
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| 43 | * Hydra_Software_Devel/31 11/23/10 1:55p darnstein |
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| 44 | * SW7552-15: port to 7552 chipset. Same code as for 7358. |
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| 45 | * |
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| 46 | * Hydra_Software_Devel/30 11/19/10 5:45p darnstein |
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| 47 | * SW7231-3: 7344 chipset only has one ITU-R 656 output. |
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| 48 | * |
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| 49 | * Hydra_Software_Devel/29 11/11/10 5:19p darnstein |
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| 50 | * SW7344-8: first cut at porting BVBI to 7344. |
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| 51 | * |
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| 52 | * Hydra_Software_Devel/28 11/9/10 3:49p darnstein |
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| 53 | * SW35125-17: first pass at 35125 compatibility. |
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| 54 | * |
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| 55 | * Hydra_Software_Devel/27 10/21/10 3:34p darnstein |
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| 56 | * SW35230-16: 35230 chipset is capable of CGMS-B output. |
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| 57 | * |
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| 58 | * Hydra_Software_Devel/26 10/21/10 3:27p darnstein |
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| 59 | * SW7408-15: 7408 chipset is capable of CGMS-B output. |
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| 60 | * |
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| 61 | * Hydra_Software_Devel/25 10/21/10 3:20p darnstein |
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| 62 | * SW7340-30: 7340 and 7342 chipsets are capable of CGMS-B output. |
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| 63 | * |
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| 64 | * Hydra_Software_Devel/24 10/15/10 12:13p darnstein |
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| 65 | * SW7468-24: add support for CGMS-B. |
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| 66 | * |
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| 67 | * Hydra_Software_Devel/23 10/12/10 6:38p darnstein |
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| 68 | * SW7358-16: initial port to 7358-A0. |
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| 69 | * |
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| 70 | * Hydra_Software_Devel/22 9/29/10 11:32a vanessah |
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| 71 | * SW7425-32: more for auto-test |
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| 72 | * |
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| 73 | * Hydra_Software_Devel/21 7/15/10 6:59p darnstein |
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| 74 | * SW7422-46: very simple updates for 7422 compatibility. |
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| 75 | * |
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| 76 | * Hydra_Software_Devel/20 6/25/10 3:25p darnstein |
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| 77 | * SW7125-17: 7125 chipset has newer version of CGMSAE cores. |
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| 78 | * |
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| 79 | * Hydra_Software_Devel/19 5/11/10 1:09p darnstein |
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| 80 | * SW7420-45: 7420-C0 can do TVG-2X waveform. |
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| 81 | * |
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| 82 | * Hydra_Software_Devel/18 5/3/10 1:54p darnstein |
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| 83 | * SW7468-24: 7125-C0 can output TVG2X waveform. |
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| 84 | * |
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| 85 | * Hydra_Software_Devel/16 3/1/10 3:16p darnstein |
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| 86 | * SW7420-598: add definition for the new CGMSAE hardware found in 7420- |
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| 87 | * C0. |
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| 88 | * |
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| 89 | * Hydra_Software_Devel/15 12/22/09 3:35p darnstein |
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| 90 | * SW7408-15: fix merge error in previous check-in. |
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| 91 | * |
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| 92 | * Hydra_Software_Devel/14 12/22/09 12:29p darnstein |
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| 93 | * SW7408-15: #ifdefs for 7408 chipset. |
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| 94 | * |
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| 95 | * Hydra_Software_Devel/13 11/24/09 4:34p darnstein |
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| 96 | * SW35230-16: first cut at 35230 support. |
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| 97 | * |
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| 98 | * Hydra_Software_Devel/12 11/16/09 5:58p darnstein |
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| 99 | * SW7468-24: first step towards support of 7468 chipset. |
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| 100 | * |
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| 101 | * Hydra_Software_Devel/11 11/16/09 5:04p darnstein |
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| 102 | * SW7408-15: first cut at 7408 support. |
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| 103 | * |
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| 104 | * Hydra_Software_Devel/10 8/21/09 2:37p darnstein |
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| 105 | * PR47900: port to new 7125 chipset. |
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| 106 | * |
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| 107 | * Hydra_Software_Devel/9 6/24/09 7:10p darnstein |
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| 108 | * PR53956: 7420-B0 has a new WSE core. |
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| 109 | * |
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| 110 | * Hydra_Software_Devel/8 6/24/09 5:39p darnstein |
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| 111 | * PR56342: BVBI compiles for 7550 chipset now. |
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| 112 | * |
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| 113 | * Hydra_Software_Devel/7 6/24/09 4:58p darnstein |
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| 114 | * PR56290: BVBI now compiles for 7342 chipset. |
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| 115 | * |
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| 116 | * Hydra_Software_Devel/6 6/24/09 4:38p darnstein |
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| 117 | * PR56289: BVBI compiles for 7340 chipset now. |
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| 118 | * |
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| 119 | * Hydra_Software_Devel/5 6/23/09 7:22p darnstein |
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| 120 | * PR56289: port to 7340 chipset. |
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| 121 | * |
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| 122 | * Hydra_Software_Devel/4 5/13/09 1:18p darnstein |
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| 123 | * PR53956: 7420-Bx has fixed WSE core. |
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| 124 | * |
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| 125 | * Hydra_Software_Devel/3 12/11/08 4:22p darnstein |
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| 126 | * PR45819: program VBI_ENC and VEC_CFG cores. |
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| 127 | * |
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| 128 | * Hydra_Software_Devel/2 12/4/08 6:06p darnstein |
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| 129 | * PR45819: 7420 software will now compile, but not link. |
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| 130 | * |
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| 131 | * Hydra_Software_Devel/2 12/3/08 7:56p darnstein |
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| 132 | * PR45819: New, more modular form of most BVBI source files. |
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| 133 | * |
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| 134 | * Hydra_Software_Devel/1 10/3/08 7:08p darnstein |
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| 135 | * PR45819: Chip specific definitions for internal use by BVBI. |
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| 136 | * |
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| 137 | ***************************************************************************/ |
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| 138 | |
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| 139 | #ifndef BVBI_CHIP_PRIV_H__ |
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| 140 | #define BVBI_CHIP_PRIV_H__ |
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| 141 | |
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| 142 | /* |
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| 143 | * Explanation of VEC/VDEC counts and capabilities: |
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| 144 | * BVBI_P_NUM_VDEC: Number of analog VDECs. Does not include ITU-R 656 |
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| 145 | input. |
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| 146 | * BVBI_P_NUM_VEC: Number of full VBI encoders. Does not include |
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| 147 | * ITU-R 656 passthrough output. |
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| 148 | * BVBI_P_NUM_PTVEC: Number of passthrough or ancillary VBI encoders. |
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| 149 | * BVBI_P_NUM_AMOLE: Number of AMOL encoder cores, not including |
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| 150 | * ITU-R 656. |
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| 151 | * BVBI_P_NUM_AMOLE_656: Number of AMOL encoder cores that are specifically |
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| 152 | * ITU-R 656. |
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| 153 | * BVBI_P_NUM_CCE: Number of closed caption encoder cores, not |
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| 154 | * including ITU-R 656. |
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| 155 | * BVBI_P_NUM_CCE_656: Number of closed caption encoder cores that are |
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| 156 | * specifically for ITU-R 656 output. |
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| 157 | * BVBI_P_NUM_CGMSAE: Number of CGMS encoder cores, not including ITU-R |
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| 158 | * 656. |
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| 159 | * BVBI_P_NUM_CGMSAE_656: Number of CGMS encoder cores that are specifically |
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| 160 | * for ITU-R 656 output. |
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| 161 | * BVBI_P_NUM_GSE: Number of Gemstar encoder cores, not including |
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| 162 | * ITU-R 656. |
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| 163 | * BVBI_P_NUM_GSE_656: Number of Gemstar encoder cores that are |
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| 164 | * specifically for ITU-R 656 output. |
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| 165 | * BVBI_P_NUM_SCTEE: Number of SCTE encoder cores. Assume first core |
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| 166 | * that has one is on the primary VEC path. |
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| 167 | * BVBI_P_NUM_SCTEE_656: Number of 656 SCTE encoder cores. At present time, |
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| 168 | * always zero. |
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| 169 | * BVBI_P_NUM_TTE: Number of teletext encoder cores. Assume first core |
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| 170 | * that has one is on the primary VEC path. Does not |
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| 171 | * include 656 (bypass) cores. |
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| 172 | * BVBI_P_NUM_TTE_656: Number of 656 (bypass) teletext encoder cores. |
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| 173 | * Assume first core that has one is on the primary |
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| 174 | * VEC path. |
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| 175 | * BVBI_P_NUM_WSE: Number of WSE cores, not including ITU-R 656. |
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| 176 | * BVBI_P_NUM_WSE_656: Number of WSE cores that are specifically for |
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| 177 | * ITU-R 656 output. |
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| 178 | * BVBI_P_NUM_IN656: Number of ITU-R 656 inputs (IN656 cores) |
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| 179 | * BVBI_P_NUM_ANCI656_656: Number of ANCI656_656 or ANCI656_Ancil VEC cores. |
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| 180 | * BVBI_P_HAS_GSD: VDEC(s) have Gemstar decoder(s). |
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| 181 | * BVBI_P_HAS_VPSD: VDEC(s) have VPS decoder(s). |
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| 182 | * BVBI_P_HAS_WSE_PARITY VEC(s) have WSS parity bit generation capability. |
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| 183 | * BVBI_P_HAS_SCTEE_CO SCTE encoder has component only registers. |
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| 184 | * BVBI_P_HAS_COMPON_INPUT: VDEC(s) have component intput capability. |
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| 185 | * BVBI_P_HAS_XSER_TT: TTX core has serial output capability. |
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| 186 | * BVBI_P_HAS_CROSSBAR_VEC: VEC has crossbar architecture, first appearing in |
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| 187 | * 7420-A0. |
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| 188 | * BVBI_P_TTXADR_WAROUND: TTX core has the PR22720 bug in accessing DRAM. A |
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| 189 | * software fix is provided. |
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| 190 | * BVBI_P_CGMSAE_VER2: CGMSAE core is version first appearing in 3548-A0. |
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| 191 | * Capable of CGMS-B output. |
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| 192 | * BVBI_P_CGMSAE_VER3: CGMSAE core is version first appearing in 3548-B0. |
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| 193 | * Capable of CEA-805-D style output. |
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| 194 | * BVBI_P_CGMSAE_VER4: CGMSAE core is version first appearing in 7420-A0. |
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| 195 | * The BIT_ORDER bitfields were removed. |
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| 196 | * BVBI_P_CGMSAE_VER5: CGMSAE core is version first appearing in 7420-B0. |
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| 197 | * The BIT_ORDER bitfields were restored. |
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| 198 | * BVBI_P_WSE_VER2: WSE core is version first appearing in 3548-A0. |
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| 199 | * ITU-R 656 output is handled in a different way. |
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| 200 | * BVBI_P_WSE_VER3: WSE core is version first appearing in 7601-A0. |
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| 201 | * Capable of IEC-62375 output on 576P video. |
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| 202 | * BVBI_P_WSE_VER4: WSE core is version first appearing in 3548-B2. |
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| 203 | * Has a bug fix related to WSS and VPS output. |
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| 204 | * BVBI_P_WSE_VER5: WSE core is version first appearing in 7420-B0. |
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| 205 | * Register file is identical to VER3 cores. |
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| 206 | * BVBI_P_WSSD_VER2: WSSD core with bug fixes, first appearing in |
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| 207 | * 3548-B0. |
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| 208 | * BVBI_P_GSE_VER2: GSE core is version first appearing in 7408-A0. |
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| 209 | * Capable of TVGX2 output. |
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| 210 | * BVBI_P_CCE_VER2: CCE core version first appearing in 7422-A0. Has |
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| 211 | * capability to support subset of SCTE-20 and |
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| 212 | * SCTE-21 specs. |
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| 213 | * BVBI_P_TTD_SCB2_ERROR TTD core writes its captured data to wrong |
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| 214 | * locations in DRAM. |
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| 215 | * BVBI_P_ENC_NUM_CROSSBAR_REG |
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| 216 | * Number of analog paths through the VBI_ENC |
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| 217 | * crossbar that are available for use by BVBI |
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| 218 | * software. Two are reserved for use by BVDC. |
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| 219 | * BVBI_P_ENC_NUM_CROSSBAR_REG_656 |
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| 220 | * Number of ITU-R 656 paths through the VBI_ENC |
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| 221 | * crossbar that are available for use by BVBI |
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| 222 | * software. Two are reserved for use by BVDC. |
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| 223 | * BVDC_P_3DCOMB_TTD_CONFLICT |
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| 224 | * Frame comb (3D comb) filter in VDEC interferes |
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| 225 | * with operation of teletext decoder (TTD). |
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| 226 | */ |
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| 227 | |
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| 228 | #if (BCHP_CHIP==7420) |
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| 229 | #define BVBI_P_NUM_VDEC 0 |
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| 230 | #define BVBI_P_NUM_VEC 3 |
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| 231 | #define BVBI_P_NUM_AMOLE 3 |
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| 232 | #define BVBI_P_NUM_CCE 3 |
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| 233 | #define BVBI_P_NUM_CGMSAE 3 |
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| 234 | #define BVBI_P_NUM_GSE 3 |
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| 235 | #define BVBI_P_NUM_AMOLE_656 1 |
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| 236 | #define BVBI_P_NUM_CCE_656 1 |
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| 237 | #define BVBI_P_NUM_CGMSAE_656 1 |
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| 238 | #define BVBI_P_NUM_GSE_656 1 |
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| 239 | #define BVBI_P_HAS_WSE_PARITY 1 |
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| 240 | #define BVBI_P_NUM_ANCI656_656 1 |
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| 241 | #define BVBI_P_NUM_SCTEE 2 |
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| 242 | #define BVBI_P_NUM_SCTEE_656 0 |
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| 243 | #define BVBI_P_NUM_TTE 3 |
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| 244 | #define BVBI_P_NUM_TTE_656 1 |
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| 245 | #define BVBI_P_NUM_WSE 3 |
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| 246 | #define BVBI_P_NUM_WSE_656 1 |
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| 247 | #define BVBI_P_NUM_IN656 0 |
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| 248 | #define BVBI_P_HAS_EXT_656 1 |
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| 249 | #define BVBI_P_HAS_XSER_TT 1 |
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| 250 | #define BVBI_P_HAS_CROSSBAR_VEC 1 |
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| 251 | #define BVBI_P_ENC_NUM_CROSSBAR_REG 6 |
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| 252 | #define BVBI_P_ENC_NUM_CROSSBAR_REG_656 5 |
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| 253 | #define BVBI_P_NUM_PTVEC 1 |
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| 254 | #if (BCHP_VER >= BCHP_VER_B0) |
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| 255 | #define BVBI_P_CGMSAE_VER5 1 |
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| 256 | #define BVBI_P_WSE_VER5 1 |
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| 257 | #else |
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| 258 | #define BVBI_P_CGMSAE_VER4 1 |
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| 259 | #define BVBI_P_WSE_VER3 1 |
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| 260 | #endif |
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| 261 | #if (BCHP_VER >= BCHP_VER_C0) |
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| 262 | #define BVBI_P_GSE_VER2 1 |
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| 263 | #endif |
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| 264 | |
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| 265 | #elif (BCHP_CHIP==7422) ||(BCHP_CHIP==7425) || (BCHP_CHIP==7435) |
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| 266 | #define BVBI_P_NUM_VDEC 0 |
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| 267 | #define BVBI_P_NUM_VEC 2 |
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| 268 | #define BVBI_P_NUM_AMOLE 2 |
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| 269 | #define BVBI_P_NUM_CCE 2 |
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| 270 | #define BVBI_P_NUM_CGMSAE 2 |
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| 271 | #define BVBI_P_NUM_GSE 2 |
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| 272 | #define BVBI_P_NUM_AMOLE_656 2 |
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| 273 | #define BVBI_P_NUM_CCE_656 2 |
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| 274 | #define BVBI_P_NUM_CGMSAE_656 2 |
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| 275 | #define BVBI_P_NUM_GSE_656 2 |
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| 276 | #define BVBI_P_HAS_WSE_PARITY 1 |
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| 277 | #define BVBI_P_NUM_ANCI656_656 2 |
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| 278 | #define BVBI_P_NUM_SCTEE 0 |
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| 279 | #define BVBI_P_NUM_SCTEE_656 0 |
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| 280 | #define BVBI_P_NUM_TTE 2 |
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| 281 | #define BVBI_P_NUM_TTE_656 2 |
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| 282 | #define BVBI_P_NUM_WSE 2 |
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| 283 | #define BVBI_P_NUM_WSE_656 2 |
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| 284 | #define BVBI_P_NUM_IN656 0 |
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| 285 | #define BVBI_P_HAS_EXT_656 1 |
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| 286 | #define BVBI_P_HAS_XSER_TT 1 |
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| 287 | #define BVBI_P_HAS_CROSSBAR_VEC 1 |
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| 288 | #define BVBI_P_ENC_NUM_CROSSBAR_REG 6 |
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| 289 | #define BVBI_P_ENC_NUM_CROSSBAR_REG_656 5 |
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| 290 | #define BVBI_P_NUM_PTVEC 2 |
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| 291 | #define BVBI_P_CGMSAE_VER5 1 |
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| 292 | #define BVBI_P_WSE_VER5 1 |
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| 293 | #define BVBI_P_GSE_VER2 1 |
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| 294 | #define BVBI_P_CCE_VER2 1 |
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| 295 | |
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| 296 | #elif (BCHP_CHIP==7344) ||(BCHP_CHIP==7346) || (BCHP_CHIP==7231) || \ |
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| 297 | (BCHP_CHIP == 7429) |
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| 298 | #define BVBI_P_NUM_VDEC 0 |
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| 299 | #define BVBI_P_NUM_VEC 2 |
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| 300 | #define BVBI_P_NUM_AMOLE 2 |
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| 301 | #define BVBI_P_NUM_CCE 2 |
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| 302 | #define BVBI_P_NUM_CGMSAE 2 |
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| 303 | #define BVBI_P_NUM_GSE 2 |
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| 304 | #define BVBI_P_NUM_AMOLE_656 1 |
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| 305 | #define BVBI_P_NUM_CCE_656 1 |
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| 306 | #define BVBI_P_NUM_CGMSAE_656 2 |
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| 307 | #define BVBI_P_NUM_GSE_656 1 |
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| 308 | #define BVBI_P_HAS_WSE_PARITY 1 |
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| 309 | #define BVBI_P_NUM_ANCI656_656 1 |
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| 310 | #define BVBI_P_NUM_SCTEE 0 |
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| 311 | #define BVBI_P_NUM_SCTEE_656 0 |
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| 312 | #define BVBI_P_NUM_TTE 2 |
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| 313 | #define BVBI_P_NUM_TTE_656 1 |
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| 314 | #define BVBI_P_NUM_WSE 2 |
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| 315 | #define BVBI_P_NUM_WSE_656 1 |
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| 316 | #define BVBI_P_NUM_IN656 0 |
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| 317 | #define BVBI_P_HAS_EXT_656 1 |
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| 318 | #define BVBI_P_HAS_XSER_TT 1 |
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| 319 | #define BVBI_P_HAS_CROSSBAR_VEC 1 |
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| 320 | #define BVBI_P_ENC_NUM_CROSSBAR_REG 6 |
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| 321 | #define BVBI_P_ENC_NUM_CROSSBAR_REG_656 5 |
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| 322 | #define BVBI_P_NUM_PTVEC 1 |
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| 323 | #define BVBI_P_CGMSAE_VER5 1 |
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| 324 | #define BVBI_P_WSE_VER5 1 |
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| 325 | #define BVBI_P_GSE_VER2 1 |
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| 326 | #define BVBI_P_CCE_VER2 1 |
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| 327 | |
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| 328 | #elif (BCHP_CHIP==7340) |
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| 329 | #define BVBI_P_NUM_VDEC 0 |
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| 330 | #define BVBI_P_NUM_VEC 2 |
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| 331 | #define BVBI_P_NUM_AMOLE 2 |
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| 332 | #define BVBI_P_NUM_CCE 2 |
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| 333 | #define BVBI_P_NUM_CGMSAE 2 |
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| 334 | #define BVBI_P_NUM_GSE 2 |
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| 335 | #define BVBI_P_NUM_AMOLE_656 0 |
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| 336 | #define BVBI_P_NUM_CCE_656 0 |
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| 337 | #define BVBI_P_NUM_CGMSAE_656 0 |
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| 338 | #define BVBI_P_NUM_GSE_656 0 |
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| 339 | #define BVBI_P_HAS_WSE_PARITY 1 |
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| 340 | #define BVBI_P_NUM_ANCI656_656 0 |
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| 341 | #define BVBI_P_NUM_SCTEE 1 |
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| 342 | #define BVBI_P_NUM_SCTEE_656 0 |
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| 343 | #define BVBI_P_NUM_TTE 2 |
|---|
| 344 | #define BVBI_P_NUM_TTE_656 0 |
|---|
| 345 | #define BVBI_P_NUM_WSE 2 |
|---|
| 346 | #define BVBI_P_NUM_WSE_656 0 |
|---|
| 347 | #define BVBI_P_NUM_IN656 0 |
|---|
| 348 | #define BVBI_P_HAS_EXT_656 0 |
|---|
| 349 | #define BVBI_P_HAS_XSER_TT 0 |
|---|
| 350 | #define BVBI_P_HAS_CROSSBAR_VEC 1 |
|---|
| 351 | #define BVBI_P_ENC_NUM_CROSSBAR_REG 6 |
|---|
| 352 | #define BVBI_P_ENC_NUM_CROSSBAR_REG_656 5 |
|---|
| 353 | #define BVBI_P_NUM_PTVEC 0 |
|---|
| 354 | #define BVBI_P_CGMSAE_VER5 1 |
|---|
| 355 | #define BVBI_P_WSE_VER3 1 |
|---|
| 356 | |
|---|
| 357 | #elif (BCHP_CHIP==7342) |
|---|
| 358 | #define BVBI_P_NUM_VDEC 0 |
|---|
| 359 | #define BVBI_P_NUM_VEC 2 |
|---|
| 360 | #define BVBI_P_NUM_AMOLE 2 |
|---|
| 361 | #define BVBI_P_NUM_CCE 2 |
|---|
| 362 | #define BVBI_P_NUM_CGMSAE 2 |
|---|
| 363 | #define BVBI_P_NUM_GSE 2 |
|---|
| 364 | #define BVBI_P_NUM_AMOLE_656 1 |
|---|
| 365 | #define BVBI_P_NUM_CCE_656 1 |
|---|
| 366 | #define BVBI_P_NUM_CGMSAE_656 1 |
|---|
| 367 | #define BVBI_P_NUM_GSE_656 1 |
|---|
| 368 | #define BVBI_P_HAS_WSE_PARITY 1 |
|---|
| 369 | #define BVBI_P_NUM_ANCI656_656 1 |
|---|
| 370 | #define BVBI_P_NUM_SCTEE 0 |
|---|
| 371 | #define BVBI_P_NUM_SCTEE_656 0 |
|---|
| 372 | #define BVBI_P_NUM_TTE 2 |
|---|
| 373 | #define BVBI_P_NUM_TTE_656 1 |
|---|
| 374 | #define BVBI_P_NUM_WSE 2 |
|---|
| 375 | #define BVBI_P_NUM_WSE_656 1 |
|---|
| 376 | #define BVBI_P_NUM_IN656 0 |
|---|
| 377 | #define BVBI_P_HAS_EXT_656 0 |
|---|
| 378 | #define BVBI_P_HAS_XSER_TT 1 |
|---|
| 379 | #define BVBI_P_HAS_CROSSBAR_VEC 1 |
|---|
| 380 | #define BVBI_P_ENC_NUM_CROSSBAR_REG 6 |
|---|
| 381 | #define BVBI_P_ENC_NUM_CROSSBAR_REG_656 5 |
|---|
| 382 | #define BVBI_P_NUM_PTVEC 1 |
|---|
| 383 | #define BVBI_P_CGMSAE_VER5 1 |
|---|
| 384 | #define BVBI_P_WSE_VER3 1 |
|---|
| 385 | |
|---|
| 386 | #elif (BCHP_CHIP==7358) || (BCHP_CHIP==7552) |
|---|
| 387 | #define BVBI_P_NUM_VDEC 0 |
|---|
| 388 | #define BVBI_P_NUM_VEC 2 |
|---|
| 389 | #define BVBI_P_NUM_AMOLE 2 |
|---|
| 390 | #define BVBI_P_NUM_CCE 2 |
|---|
| 391 | #define BVBI_P_NUM_CGMSAE 2 |
|---|
| 392 | #define BVBI_P_NUM_GSE 2 |
|---|
| 393 | #define BVBI_P_NUM_AMOLE_656 0 |
|---|
| 394 | #define BVBI_P_NUM_CCE_656 0 |
|---|
| 395 | #define BVBI_P_NUM_CGMSAE_656 0 |
|---|
| 396 | #define BVBI_P_NUM_GSE_656 0 |
|---|
| 397 | #define BVBI_P_HAS_WSE_PARITY 1 |
|---|
| 398 | #define BVBI_P_NUM_ANCI656_656 0 |
|---|
| 399 | #define BVBI_P_NUM_SCTEE 0 |
|---|
| 400 | #define BVBI_P_NUM_SCTEE_656 0 |
|---|
| 401 | #define BVBI_P_NUM_TTE 2 |
|---|
| 402 | #define BVBI_P_NUM_TTE_656 0 |
|---|
| 403 | #define BVBI_P_NUM_WSE 2 |
|---|
| 404 | #define BVBI_P_NUM_WSE_656 0 |
|---|
| 405 | #define BVBI_P_NUM_IN656 0 |
|---|
| 406 | #define BVBI_P_HAS_EXT_656 0 |
|---|
| 407 | #define BVBI_P_HAS_XSER_TT 0 |
|---|
| 408 | #define BVBI_P_HAS_CROSSBAR_VEC 1 |
|---|
| 409 | #define BVBI_P_ENC_NUM_CROSSBAR_REG 6 |
|---|
| 410 | #define BVBI_P_ENC_NUM_CROSSBAR_REG_656 0 |
|---|
| 411 | #define BVBI_P_NUM_PTVEC 0 |
|---|
| 412 | #define BVBI_P_CGMSAE_VER5 1 |
|---|
| 413 | #define BVBI_P_WSE_VER5 1 |
|---|
| 414 | #define BVBI_P_GSE_VER2 1 |
|---|
| 415 | #define BVBI_P_CCE_VER2 1 |
|---|
| 416 | |
|---|
| 417 | #elif (BCHP_CHIP==7550) |
|---|
| 418 | #define BVBI_P_NUM_VDEC 0 |
|---|
| 419 | #define BVBI_P_NUM_VEC 2 |
|---|
| 420 | #define BVBI_P_NUM_AMOLE 2 |
|---|
| 421 | #define BVBI_P_NUM_CCE 2 |
|---|
| 422 | #define BVBI_P_NUM_CGMSAE 2 |
|---|
| 423 | #define BVBI_P_NUM_GSE 2 |
|---|
| 424 | #define BVBI_P_NUM_AMOLE_656 0 |
|---|
| 425 | #define BVBI_P_NUM_CCE_656 0 |
|---|
| 426 | #define BVBI_P_NUM_CGMSAE_656 0 |
|---|
| 427 | #define BVBI_P_NUM_GSE_656 0 |
|---|
| 428 | #define BVBI_P_HAS_WSE_PARITY 1 |
|---|
| 429 | #define BVBI_P_NUM_ANCI656_656 0 |
|---|
| 430 | #define BVBI_P_NUM_SCTEE 0 |
|---|
| 431 | #define BVBI_P_NUM_SCTEE_656 0 |
|---|
| 432 | #define BVBI_P_NUM_TTE 0 |
|---|
| 433 | #define BVBI_P_NUM_TTE_656 0 |
|---|
| 434 | #define BVBI_P_NUM_WSE 2 |
|---|
| 435 | #define BVBI_P_NUM_WSE_656 0 |
|---|
| 436 | #define BVBI_P_NUM_IN656 0 |
|---|
| 437 | #define BVBI_P_HAS_EXT_656 0 |
|---|
| 438 | #define BVBI_P_HAS_XSER_TT 0 |
|---|
| 439 | #define BVBI_P_HAS_CROSSBAR_VEC 1 |
|---|
| 440 | #define BVBI_P_ENC_NUM_CROSSBAR_REG 6 |
|---|
| 441 | #define BVBI_P_ENC_NUM_CROSSBAR_REG_656 5 |
|---|
| 442 | #define BVBI_P_NUM_PTVEC 0 |
|---|
| 443 | #define BVBI_P_CGMSAE_VER5 1 |
|---|
| 444 | #define BVBI_P_WSE_VER3 1 |
|---|
| 445 | |
|---|
| 446 | #elif (BCHP_CHIP==7125) |
|---|
| 447 | #define BVBI_P_NUM_VDEC 0 |
|---|
| 448 | #define BVBI_P_NUM_VEC 2 |
|---|
| 449 | #define BVBI_P_NUM_AMOLE 2 |
|---|
| 450 | #define BVBI_P_NUM_CCE 2 |
|---|
| 451 | #define BVBI_P_NUM_CGMSAE 2 |
|---|
| 452 | #define BVBI_P_NUM_GSE 2 |
|---|
| 453 | #define BVBI_P_NUM_AMOLE_656 0 |
|---|
| 454 | #define BVBI_P_NUM_CCE_656 0 |
|---|
| 455 | #define BVBI_P_NUM_CGMSAE_656 0 |
|---|
| 456 | #define BVBI_P_NUM_GSE_656 0 |
|---|
| 457 | #define BVBI_P_HAS_WSE_PARITY 1 |
|---|
| 458 | #define BVBI_P_NUM_ANCI656_656 0 |
|---|
| 459 | #define BVBI_P_NUM_SCTEE 1 |
|---|
| 460 | #define BVBI_P_NUM_SCTEE_656 0 |
|---|
| 461 | #define BVBI_P_NUM_TTE 2 |
|---|
| 462 | #define BVBI_P_NUM_TTE_656 0 |
|---|
| 463 | #define BVBI_P_NUM_WSE 2 |
|---|
| 464 | #define BVBI_P_NUM_WSE_656 0 |
|---|
| 465 | #define BVBI_P_NUM_IN656 1 |
|---|
| 466 | #define BVBI_P_HAS_EXT_656 1 |
|---|
| 467 | #define BVBI_P_HAS_XSER_TT 0 |
|---|
| 468 | #define BVBI_P_HAS_CROSSBAR_VEC 1 |
|---|
| 469 | #define BVBI_P_ENC_NUM_CROSSBAR_REG 3 |
|---|
| 470 | #define BVBI_P_ENC_NUM_CROSSBAR_REG_656 0 |
|---|
| 471 | #define BVBI_P_NUM_PTVEC 0 |
|---|
| 472 | #define BVBI_P_CGMSAE_VER5 1 |
|---|
| 473 | #define BVBI_P_WSE_VER5 1 |
|---|
| 474 | #if (BCHP_VER >= BCHP_VER_C0) |
|---|
| 475 | #define BVBI_P_GSE_VER2 1 |
|---|
| 476 | #endif |
|---|
| 477 | |
|---|
| 478 | #elif (BCHP_CHIP==7408) |
|---|
| 479 | #define BVBI_P_NUM_VDEC 0 |
|---|
| 480 | #define BVBI_P_NUM_VEC 2 |
|---|
| 481 | #define BVBI_P_NUM_AMOLE 1 |
|---|
| 482 | #define BVBI_P_NUM_CCE 1 |
|---|
| 483 | #define BVBI_P_NUM_CGMSAE 2 |
|---|
| 484 | #define BVBI_P_NUM_GSE 1 |
|---|
| 485 | #define BVBI_P_NUM_AMOLE_656 0 |
|---|
| 486 | #define BVBI_P_NUM_CCE_656 0 |
|---|
| 487 | #define BVBI_P_NUM_CGMSAE_656 0 |
|---|
| 488 | #define BVBI_P_NUM_GSE_656 0 |
|---|
| 489 | #define BVBI_P_HAS_WSE_PARITY 1 |
|---|
| 490 | #define BVBI_P_NUM_ANCI656_656 0 |
|---|
| 491 | #define BVBI_P_NUM_SCTEE 0 |
|---|
| 492 | #define BVBI_P_NUM_SCTEE_656 0 |
|---|
| 493 | #define BVBI_P_NUM_TTE 0 |
|---|
| 494 | #define BVBI_P_NUM_TTE_656 0 |
|---|
| 495 | #define BVBI_P_NUM_WSE 2 |
|---|
| 496 | #define BVBI_P_NUM_WSE_656 0 |
|---|
| 497 | #define BVBI_P_NUM_IN656 0 |
|---|
| 498 | #define BVBI_P_HAS_EXT_656 0 |
|---|
| 499 | #define BVBI_P_HAS_XSER_TT 0 |
|---|
| 500 | #define BVBI_P_HAS_CROSSBAR_VEC 1 |
|---|
| 501 | #define BVBI_P_ENC_NUM_CROSSBAR_REG 6 |
|---|
| 502 | #define BVBI_P_ENC_NUM_CROSSBAR_REG_656 0 |
|---|
| 503 | #define BVBI_P_NUM_PTVEC 0 |
|---|
| 504 | #define BVBI_P_CGMSAE_VER5 1 |
|---|
| 505 | #define BVBI_P_WSE_VER5 1 |
|---|
| 506 | |
|---|
| 507 | #elif (BCHP_CHIP==7468) |
|---|
| 508 | #define BVBI_P_NUM_VDEC 0 |
|---|
| 509 | #define BVBI_P_NUM_VEC 2 |
|---|
| 510 | #define BVBI_P_NUM_AMOLE 1 |
|---|
| 511 | #define BVBI_P_NUM_CCE 1 |
|---|
| 512 | #define BVBI_P_NUM_CGMSAE 2 |
|---|
| 513 | #define BVBI_P_NUM_GSE 1 |
|---|
| 514 | #define BVBI_P_NUM_AMOLE_656 0 |
|---|
| 515 | #define BVBI_P_NUM_CCE_656 0 |
|---|
| 516 | #define BVBI_P_NUM_CGMSAE_656 0 |
|---|
| 517 | #define BVBI_P_NUM_GSE_656 0 |
|---|
| 518 | #define BVBI_P_HAS_WSE_PARITY 1 |
|---|
| 519 | #define BVBI_P_NUM_ANCI656_656 0 |
|---|
| 520 | #define BVBI_P_NUM_SCTEE 0 |
|---|
| 521 | #define BVBI_P_NUM_SCTEE_656 0 |
|---|
| 522 | #define BVBI_P_NUM_TTE 1 |
|---|
| 523 | #define BVBI_P_NUM_TTE_656 0 |
|---|
| 524 | #define BVBI_P_NUM_WSE 2 |
|---|
| 525 | #define BVBI_P_NUM_WSE_656 0 |
|---|
| 526 | #define BVBI_P_NUM_IN656 0 |
|---|
| 527 | #define BVBI_P_HAS_EXT_656 0 |
|---|
| 528 | #define BVBI_P_HAS_XSER_TT 0 |
|---|
| 529 | #define BVBI_P_HAS_CROSSBAR_VEC 1 |
|---|
| 530 | #define BVBI_P_ENC_NUM_CROSSBAR_REG 6 |
|---|
| 531 | #define BVBI_P_ENC_NUM_CROSSBAR_REG_656 0 |
|---|
| 532 | #define BVBI_P_NUM_PTVEC 0 |
|---|
| 533 | #define BVBI_P_CGMSAE_VER5 1 |
|---|
| 534 | #define BVBI_P_WSE_VER5 1 |
|---|
| 535 | #define BVBI_P_GSE_VER2 1 |
|---|
| 536 | |
|---|
| 537 | #elif (BCHP_CHIP==35230) |
|---|
| 538 | #define BVBI_P_NUM_VDEC 0 |
|---|
| 539 | #define BVBI_P_NUM_VEC 1 |
|---|
| 540 | #define BVBI_P_NUM_AMOLE 0 |
|---|
| 541 | #define BVBI_P_NUM_CCE 1 |
|---|
| 542 | #define BVBI_P_NUM_CGMSAE 1 |
|---|
| 543 | #define BVBI_P_NUM_GSE 0 |
|---|
| 544 | #define BVBI_P_NUM_AMOLE_656 0 |
|---|
| 545 | #define BVBI_P_NUM_CCE_656 0 |
|---|
| 546 | #define BVBI_P_NUM_CGMSAE_656 0 |
|---|
| 547 | #define BVBI_P_NUM_GSE_656 0 |
|---|
| 548 | #define BVBI_P_HAS_WSE_PARITY 1 |
|---|
| 549 | #define BVBI_P_NUM_ANCI656_656 0 |
|---|
| 550 | #define BVBI_P_NUM_SCTEE 0 |
|---|
| 551 | #define BVBI_P_NUM_SCTEE_656 0 |
|---|
| 552 | #define BVBI_P_NUM_TTE 1 |
|---|
| 553 | #define BVBI_P_NUM_TTE_656 0 |
|---|
| 554 | #define BVBI_P_NUM_WSE 1 |
|---|
| 555 | #define BVBI_P_NUM_WSE_656 0 |
|---|
| 556 | #define BVBI_P_NUM_IN656 0 |
|---|
| 557 | #define BVBI_P_HAS_EXT_656 0 |
|---|
| 558 | #define BVBI_P_HAS_XSER_TT 0 |
|---|
| 559 | #define BVBI_P_HAS_CROSSBAR_VEC 1 |
|---|
| 560 | #define BVBI_P_ENC_NUM_CROSSBAR_REG 3 |
|---|
| 561 | #define BVBI_P_ENC_NUM_CROSSBAR_REG_656 0 |
|---|
| 562 | #define BVBI_P_NUM_PTVEC 0 |
|---|
| 563 | #define BVBI_P_CGMSAE_VER5 1 |
|---|
| 564 | #define BVBI_P_WSE_VER3 1 |
|---|
| 565 | |
|---|
| 566 | #elif (BCHP_CHIP==35233) |
|---|
| 567 | #define BVBI_P_NUM_VDEC 0 |
|---|
| 568 | #define BVBI_P_NUM_VEC 1 |
|---|
| 569 | #define BVBI_P_NUM_AMOLE 0 |
|---|
| 570 | #define BVBI_P_NUM_CCE 1 |
|---|
| 571 | #define BVBI_P_NUM_CGMSAE 1 |
|---|
| 572 | #define BVBI_P_NUM_GSE 0 |
|---|
| 573 | #define BVBI_P_NUM_AMOLE_656 0 |
|---|
| 574 | #define BVBI_P_NUM_CCE_656 0 |
|---|
| 575 | #define BVBI_P_NUM_CGMSAE_656 0 |
|---|
| 576 | #define BVBI_P_NUM_GSE_656 0 |
|---|
| 577 | #define BVBI_P_HAS_WSE_PARITY 1 |
|---|
| 578 | #define BVBI_P_NUM_ANCI656_656 0 |
|---|
| 579 | #define BVBI_P_NUM_SCTEE 0 |
|---|
| 580 | #define BVBI_P_NUM_SCTEE_656 0 |
|---|
| 581 | #define BVBI_P_NUM_TTE 1 |
|---|
| 582 | #define BVBI_P_NUM_TTE_656 0 |
|---|
| 583 | #define BVBI_P_NUM_WSE 1 |
|---|
| 584 | #define BVBI_P_NUM_WSE_656 0 |
|---|
| 585 | #define BVBI_P_NUM_IN656 0 |
|---|
| 586 | #define BVBI_P_HAS_EXT_656 0 |
|---|
| 587 | #define BVBI_P_HAS_XSER_TT 0 |
|---|
| 588 | #define BVBI_P_HAS_CROSSBAR_VEC 1 |
|---|
| 589 | #define BVBI_P_ENC_NUM_CROSSBAR_REG 4 |
|---|
| 590 | #define BVBI_P_ENC_NUM_CROSSBAR_REG_656 0 |
|---|
| 591 | #define BVBI_P_NUM_PTVEC 0 |
|---|
| 592 | #define BVBI_P_CCE_VER2 1 |
|---|
| 593 | #define BVBI_P_CGMSAE_VER5 1 |
|---|
| 594 | #define BVBI_P_WSE_VER3 1 |
|---|
| 595 | |
|---|
| 596 | #elif (BCHP_CHIP==35125) |
|---|
| 597 | #define BVBI_P_NUM_VDEC 0 |
|---|
| 598 | #define BVBI_P_NUM_VEC 1 |
|---|
| 599 | #define BVBI_P_NUM_AMOLE 0 |
|---|
| 600 | #define BVBI_P_NUM_CCE 1 |
|---|
| 601 | #define BVBI_P_NUM_CGMSAE 1 |
|---|
| 602 | #define BVBI_P_NUM_GSE 0 |
|---|
| 603 | #define BVBI_P_NUM_AMOLE_656 0 |
|---|
| 604 | #define BVBI_P_NUM_CCE_656 0 |
|---|
| 605 | #define BVBI_P_NUM_CGMSAE_656 0 |
|---|
| 606 | #define BVBI_P_NUM_GSE_656 0 |
|---|
| 607 | #define BVBI_P_HAS_WSE_PARITY 1 |
|---|
| 608 | #define BVBI_P_NUM_ANCI656_656 0 |
|---|
| 609 | #define BVBI_P_NUM_SCTEE 0 |
|---|
| 610 | #define BVBI_P_NUM_SCTEE_656 0 |
|---|
| 611 | #define BVBI_P_NUM_TTE 1 |
|---|
| 612 | #define BVBI_P_NUM_TTE_656 0 |
|---|
| 613 | #define BVBI_P_NUM_WSE 1 |
|---|
| 614 | #define BVBI_P_NUM_WSE_656 0 |
|---|
| 615 | #define BVBI_P_NUM_IN656 0 |
|---|
| 616 | #define BVBI_P_HAS_EXT_656 0 |
|---|
| 617 | #define BVBI_P_HAS_XSER_TT 0 |
|---|
| 618 | #define BVBI_P_HAS_CROSSBAR_VEC 1 |
|---|
| 619 | #define BVBI_P_ENC_NUM_CROSSBAR_REG 3 |
|---|
| 620 | #define BVBI_P_ENC_NUM_CROSSBAR_REG_656 0 |
|---|
| 621 | #define BVBI_P_NUM_PTVEC 0 |
|---|
| 622 | #define BVBI_P_CGMSAE_VER5 1 |
|---|
| 623 | #define BVBI_P_WSE_VER3 1 |
|---|
| 624 | |
|---|
| 625 | #elif (BCHP_CHIP == 7640) |
|---|
| 626 | #define BVBI_P_NUM_VEC 2 |
|---|
| 627 | #define BVBI_P_NUM_VDEC 0 |
|---|
| 628 | #define BVBI_P_NUM_IN656 1 |
|---|
| 629 | #define BVBI_P_HAS_CROSSBAR_VEC 1 |
|---|
| 630 | #define BVBI_P_ENC_NUM_CROSSBAR_REG 5 |
|---|
| 631 | #define BVBI_P_ENC_NUM_CROSSBAR_REG_656 0 |
|---|
| 632 | #define BVBI_P_NUM_ANCI656_656 0 |
|---|
| 633 | #define BVBI_P_NUM_PTVEC 0 |
|---|
| 634 | #define BVBI_P_NUM_AMOLE 0 |
|---|
| 635 | #define BVBI_P_NUM_AMOLE_656 0 |
|---|
| 636 | #define BVBI_P_NUM_CCE 2 |
|---|
| 637 | #define BVBI_P_NUM_CCE_656 0 |
|---|
| 638 | #define BVBI_P_NUM_GSE 2 |
|---|
| 639 | #define BVBI_P_NUM_GSE_656 0 |
|---|
| 640 | #define BVBI_P_NUM_CGMSAE 2 |
|---|
| 641 | #define BVBI_P_NUM_CGMSAE_656 0 |
|---|
| 642 | #define BVBI_P_NUM_SCTEE 0 |
|---|
| 643 | #define BVBI_P_NUM_SCTEE_656 0 |
|---|
| 644 | #define BVBI_P_NUM_TTE 2 |
|---|
| 645 | #define BVBI_P_NUM_TTE_656 0 |
|---|
| 646 | #define BVBI_P_NUM_WSE 2 |
|---|
| 647 | #define BVBI_P_NUM_WSE_656 0 |
|---|
| 648 | #define BVBI_P_NEWER_SOFT_RESET 1 |
|---|
| 649 | #define BVBI_P_CGMSAE_VER5 1 |
|---|
| 650 | #define BVBI_P_WSE_VER5 1 |
|---|
| 651 | #define BVBI_P_GSE_VER2 1 |
|---|
| 652 | #define BVBI_P_CCE_VER2 1 |
|---|
| 653 | #define BVBI_P_HAS_FE_BE 1 |
|---|
| 654 | #define BVBI_P_HAS_XSER_TT 0 |
|---|
| 655 | |
|---|
| 656 | #else |
|---|
| 657 | #error Unknown video chip name |
|---|
| 658 | #endif |
|---|
| 659 | |
|---|
| 660 | /* I should have started these series in a different way */ |
|---|
| 661 | #if !defined(BVBI_P_CGMSAE_VER2) && !defined(BVBI_P_CGMSAE_VER3) && \ |
|---|
| 662 | !defined(BVBI_P_CGMSAE_VER4) && !defined(BVBI_P_CGMSAE_VER5) |
|---|
| 663 | #define BVBI_P_CGMSAE_VER1 1 |
|---|
| 664 | #endif |
|---|
| 665 | #if !defined(BVBI_P_WSE_VER2) && !defined(BVBI_P_WSE_VER3) && \ |
|---|
| 666 | !defined(BVBI_P_WSE_VER4) && !defined(BVBI_P_WSE_VER5) |
|---|
| 667 | #define BVBI_P_WSE_VER1 1 |
|---|
| 668 | #endif |
|---|
| 669 | #if !defined(BVBI_P_WSSD_VER2) |
|---|
| 670 | #define BVBI_P_WSSD_VER1 1 |
|---|
| 671 | #endif |
|---|
| 672 | #if !defined(BVBI_P_GSE_VER2) |
|---|
| 673 | #define BVBI_P_GSE_VER1 1 |
|---|
| 674 | #endif |
|---|
| 675 | #if !defined(BVBI_P_CCE_VER2) |
|---|
| 676 | #define BVBI_P_CCE_VER1 1 |
|---|
| 677 | #endif |
|---|
| 678 | |
|---|
| 679 | #endif /* BVBI_CHIP_PRIV_H__ */ |
|---|
