| 1 | /*************************************************************************** |
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| 2 | * (c)2008-2011 Broadcom Corporation |
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| 3 | * |
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| 4 | * This program is the proprietary software of Broadcom Corporation and/or its licensors, |
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| 5 | * and may only be used, duplicated, modified or distributed pursuant to the terms and |
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| 6 | * conditions of a separate, written license agreement executed between you and Broadcom |
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| 7 | * (an "Authorized License"). Except as set forth in an Authorized License, Broadcom grants |
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| 8 | * no license (express or implied), right to use, or waiver of any kind with respect to the |
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| 9 | * Software, and Broadcom expressly reserves all rights in and to the Software and all |
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| 10 | * intellectual property rights therein. IF YOU HAVE NO AUTHORIZED LICENSE, THEN YOU |
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| 11 | * HAVE NO RIGHT TO USE THIS SOFTWARE IN ANY WAY, AND SHOULD IMMEDIATELY |
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| 12 | * NOTIFY BROADCOM AND DISCONTINUE ALL USE OF THE SOFTWARE. |
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| 13 | * |
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| 14 | * Except as expressly set forth in the Authorized License, |
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| 15 | * |
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| 16 | * 1. This program, including its structure, sequence and organization, constitutes the valuable trade |
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| 17 | * secrets of Broadcom, and you shall use all reasonable efforts to protect the confidentiality thereof, |
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| 18 | * and to use this information only in connection with your use of Broadcom integrated circuit products. |
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| 19 | * |
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| 20 | * 2. TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS" |
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| 21 | * AND WITH ALL FAULTS AND BROADCOM MAKES NO PROMISES, REPRESENTATIONS OR |
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| 22 | * WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH RESPECT TO |
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| 23 | * THE SOFTWARE. BROADCOM SPECIFICALLY DISCLAIMS ANY AND ALL IMPLIED WARRANTIES |
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| 24 | * OF TITLE, MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR PURPOSE, |
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| 25 | * LACK OF VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET POSSESSION |
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| 26 | * OR CORRESPONDENCE TO DESCRIPTION. YOU ASSUME THE ENTIRE RISK ARISING OUT OF |
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| 27 | * USE OR PERFORMANCE OF THE SOFTWARE. |
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| 28 | * |
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| 29 | * 3. TO THE MAXIMUM EXTENT PERMITTED BY LAW, IN NO EVENT SHALL BROADCOM OR ITS |
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| 30 | * LICENSORS BE LIABLE FOR (i) CONSEQUENTIAL, INCIDENTAL, SPECIAL, INDIRECT, OR |
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| 31 | * EXEMPLARY DAMAGES WHATSOEVER ARISING OUT OF OR IN ANY WAY RELATING TO YOUR |
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| 32 | * USE OF OR INABILITY TO USE THE SOFTWARE EVEN IF BROADCOM HAS BEEN ADVISED OF |
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| 33 | * THE POSSIBILITY OF SUCH DAMAGES; OR (ii) ANY AMOUNT IN EXCESS OF THE AMOUNT |
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| 34 | * ACTUALLY PAID FOR THE SOFTWARE ITSELF OR U.S. $1, WHICHEVER IS GREATER. THESE |
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| 35 | * LIMITATIONS SHALL APPLY NOTWITHSTANDING ANY FAILURE OF ESSENTIAL PURPOSE OF |
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| 36 | * ANY LIMITED REMEDY. |
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| 37 | * |
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| 38 | * $brcm_Workfile: nexus_gpio_table.c $ |
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| 39 | * $brcm_Revision: 4 $ |
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| 40 | * $brcm_Date: 11/25/11 4:12p $ |
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| 41 | * |
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| 42 | * Module Description: |
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| 43 | * API Description: |
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| 44 | * API name: Gpio |
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| 45 | * Specific APIs related to Gpio Control. |
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| 46 | * |
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| 47 | * Revision History: |
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| 48 | * |
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| 49 | * $brcm_Log: /nexus/modules/gpio/7552/src/nexus_gpio_table.c $ |
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| 50 | * |
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| 51 | * 4 11/25/11 4:12p xhuang |
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| 52 | * SW7552-141: updat gpio table for B0 |
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| 53 | * |
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| 54 | * 3 9/29/11 2:43p xhuang |
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| 55 | * SW7552-128: correct aon gpio table for dummy register |
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| 56 | * |
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| 57 | * 2 8/8/11 1:24p xhuang |
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| 58 | * SW7552-77: Add DVB-CI support |
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| 59 | * |
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| 60 | * 1 2/22/11 4:59p xhuang |
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| 61 | * SW7552-20: Add gpio for 7552 |
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| 62 | * |
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| 63 | * |
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| 64 | ***************************************************************************/ |
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| 65 | |
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| 66 | #include "nexus_gpio_module.h" |
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| 67 | #include "bchp_sun_top_ctrl.h" |
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| 68 | #include "bchp_aon_pin_ctrl.h" |
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| 69 | #include "bchp_gio.h" |
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| 70 | #include "bchp_gio_aon.h" |
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| 71 | #include "priv/nexus_core.h" |
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| 72 | |
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| 73 | BDBG_MODULE(nexus_gpio_table); |
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| 74 | |
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| 75 | typedef struct NEXUS_GpioTable |
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| 76 | { |
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| 77 | uint32_t addr; |
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| 78 | unsigned mask; |
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| 79 | unsigned shift; |
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| 80 | } NEXUS_GpioTable; |
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| 81 | |
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| 82 | NEXUS_GpioTable g_gpioTable[NEXUS_NUM_GPIO_PINS] = { |
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| 83 | {BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_0, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_0_gpio_00_MASK, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_0_gpio_00_SHIFT}, |
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| 84 | {BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_0, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_0_gpio_01_MASK, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_0_gpio_01_SHIFT}, |
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| 85 | {BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_0, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_0_gpio_02_MASK, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_0_gpio_02_SHIFT}, |
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| 86 | {BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_1, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_1_gpio_03_MASK, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_1_gpio_03_SHIFT}, |
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| 87 | {BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_1, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_1_gpio_04_MASK, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_1_gpio_04_SHIFT}, |
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| 88 | {BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_1, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_1_gpio_05_MASK, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_1_gpio_05_SHIFT}, |
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| 89 | {BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_1, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_1_gpio_06_MASK, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_1_gpio_06_SHIFT}, |
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| 90 | {BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_1, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_1_gpio_07_MASK, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_1_gpio_07_SHIFT}, |
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| 91 | {BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_1, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_1_gpio_08_MASK, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_1_gpio_08_SHIFT}, |
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| 92 | {BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_1, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_1_gpio_09_MASK, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_1_gpio_09_SHIFT}, |
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| 93 | {BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_1, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_1_gpio_10_MASK, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_1_gpio_10_SHIFT}, |
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| 94 | {BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_2, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_2_gpio_11_MASK, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_2_gpio_11_SHIFT}, |
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| 95 | {BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_2, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_2_gpio_12_MASK, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_2_gpio_12_SHIFT}, |
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| 96 | {BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_2, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_2_gpio_13_MASK, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_2_gpio_13_SHIFT}, |
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| 97 | {BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_2, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_2_gpio_14_MASK, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_2_gpio_14_SHIFT}, |
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| 98 | {BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_2, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_2_gpio_15_MASK, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_2_gpio_15_SHIFT}, |
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| 99 | {BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_2, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_2_gpio_16_MASK, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_2_gpio_16_SHIFT}, |
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| 100 | {BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_2, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_2_gpio_17_MASK, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_2_gpio_17_SHIFT}, |
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| 101 | {BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_2, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_2_gpio_18_MASK, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_2_gpio_18_SHIFT}, |
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| 102 | {BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_3, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_3_gpio_19_MASK, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_3_gpio_19_SHIFT}, |
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| 103 | {BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_3, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_3_gpio_20_MASK, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_3_gpio_20_SHIFT}, |
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| 104 | {BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_3, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_3_gpio_21_MASK, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_3_gpio_21_SHIFT}, |
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| 105 | {BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_3, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_3_gpio_22_MASK, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_3_gpio_22_SHIFT}, |
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| 106 | {BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_0, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_0_gpio_23_MASK, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_0_gpio_23_SHIFT}, |
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| 107 | {BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_0, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_0_gpio_24_MASK, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_0_gpio_24_SHIFT}, |
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| 108 | {BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_3, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_3_gpio_25_MASK, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_3_gpio_25_SHIFT}, |
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| 109 | {BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_3, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_3_gpio_26_MASK, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_3_gpio_26_SHIFT}, |
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| 110 | {BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_3, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_3_gpio_27_MASK, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_3_gpio_27_SHIFT}, |
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| 111 | {BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_3, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_3_gpio_28_MASK, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_3_gpio_28_SHIFT}, |
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| 112 | {BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_4, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_4_gpio_29_MASK, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_4_gpio_29_SHIFT}, |
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| 113 | {BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_4, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_4_gpio_30_MASK, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_4_gpio_30_SHIFT}, |
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| 114 | {BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_4, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_4_gpio_31_MASK, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_4_gpio_31_SHIFT}, |
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| 115 | {BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_4, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_4_gpio_32_MASK, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_4_gpio_32_SHIFT}, |
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| 116 | {BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_4, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_4_gpio_33_MASK, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_4_gpio_33_SHIFT}, |
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| 117 | {BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_4, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_4_gpio_34_MASK, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_4_gpio_34_SHIFT}, |
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| 118 | {BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_4, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_4_gpio_35_MASK, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_4_gpio_35_SHIFT}, |
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| 119 | {BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_4, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_4_gpio_36_MASK, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_4_gpio_36_SHIFT}, |
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| 120 | {BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_5, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_5_gpio_37_MASK, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_5_gpio_37_SHIFT}, |
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| 121 | {BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_5, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_5_gpio_38_MASK, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_5_gpio_38_SHIFT}, |
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| 122 | {BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_5, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_5_gpio_39_MASK, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_5_gpio_39_SHIFT}, |
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| 123 | {BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_5, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_5_gpio_40_MASK, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_5_gpio_40_SHIFT}, |
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| 124 | {BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_5, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_5_gpio_41_MASK, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_5_gpio_41_SHIFT}, |
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| 125 | {BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_5, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_5_gpio_42_MASK, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_5_gpio_42_SHIFT}, |
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| 126 | {BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_5, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_5_gpio_43_MASK, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_5_gpio_43_SHIFT}, |
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| 127 | {BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_5, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_5_gpio_44_MASK, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_5_gpio_44_SHIFT}, |
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| 128 | {BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_6, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_6_gpio_45_MASK, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_6_gpio_45_SHIFT}, |
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| 129 | {BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_6, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_6_gpio_46_MASK, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_6_gpio_46_SHIFT}, |
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| 130 | {BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_6, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_6_gpio_47_MASK, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_6_gpio_47_SHIFT}, |
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| 131 | {BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_6, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_6_gpio_48_MASK, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_6_gpio_48_SHIFT}, |
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| 132 | {BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_6, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_6_gpio_49_MASK, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_6_gpio_49_SHIFT}, |
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| 133 | {BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_6, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_6_gpio_50_MASK, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_6_gpio_50_SHIFT}, |
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| 134 | {BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_6, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_6_gpio_51_MASK, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_6_gpio_51_SHIFT}, |
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| 135 | {BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_6, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_6_gpio_52_MASK, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_6_gpio_52_SHIFT}, |
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| 136 | {BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_7, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_7_gpio_53_MASK, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_7_gpio_53_SHIFT}, |
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| 137 | {BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_7, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_7_gpio_54_MASK, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_7_gpio_54_SHIFT}, |
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| 138 | {BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_7, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_7_gpio_55_MASK, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_7_gpio_55_SHIFT}, |
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| 139 | {BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_7, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_7_gpio_56_MASK, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_7_gpio_56_SHIFT}, |
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| 140 | {BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_7, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_7_gpio_57_MASK, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_7_gpio_57_SHIFT}, |
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| 141 | {BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_7, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_7_gpio_58_MASK, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_7_gpio_58_SHIFT}, |
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| 142 | {BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_7, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_7_gpio_59_MASK, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_7_gpio_59_SHIFT}, |
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| 143 | {BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_7, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_7_gpio_60_MASK, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_7_gpio_60_SHIFT}, |
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| 144 | {BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_8, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_8_gpio_61_MASK, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_8_gpio_61_SHIFT}, |
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| 145 | {BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_8, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_8_gpio_62_MASK, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_8_gpio_62_SHIFT}, |
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| 146 | {BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_8, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_8_gpio_63_MASK, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_8_gpio_63_SHIFT}, |
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| 147 | {BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_8, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_8_gpio_64_MASK, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_8_gpio_64_SHIFT}, |
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| 148 | {BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_8, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_8_gpio_65_MASK, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_8_gpio_65_SHIFT}, |
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| 149 | {BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_8, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_8_gpio_66_MASK, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_8_gpio_66_SHIFT}, |
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| 150 | {BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_8, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_8_gpio_67_MASK, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_8_gpio_67_SHIFT}, |
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| 151 | {BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_8, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_8_gpio_68_MASK, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_8_gpio_68_SHIFT}, |
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| 152 | {BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_9, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_9_gpio_69_MASK, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_9_gpio_69_SHIFT}, |
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| 153 | {BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_9, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_9_gpio_70_MASK, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_9_gpio_70_SHIFT}, |
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| 154 | {BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_9, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_9_gpio_71_MASK, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_9_gpio_71_SHIFT}, |
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| 155 | {BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_9, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_9_gpio_72_MASK, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_9_gpio_72_SHIFT}, |
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| 156 | {BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_9, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_9_gpio_73_MASK, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_9_gpio_73_SHIFT}, |
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| 157 | {BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_9, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_9_gpio_74_MASK, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_9_gpio_74_SHIFT}, |
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| 158 | {BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_9, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_9_gpio_75_MASK, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_9_gpio_75_SHIFT}, |
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| 159 | {BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_9, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_9_gpio_76_MASK, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_9_gpio_76_SHIFT}, |
|---|
| 160 | {BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_10, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_10_gpio_77_MASK, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_10_gpio_77_SHIFT}, |
|---|
| 161 | {BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_10, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_10_gpio_78_MASK, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_10_gpio_78_SHIFT}, |
|---|
| 162 | {BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_10, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_10_gpio_79_MASK, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_10_gpio_79_SHIFT}, |
|---|
| 163 | {BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_10, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_10_gpio_80_MASK, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_10_gpio_80_SHIFT}, |
|---|
| 164 | {BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_10, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_10_gpio_81_MASK, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_10_gpio_81_SHIFT}, |
|---|
| 165 | {BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_10, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_10_gpio_82_MASK, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_10_gpio_82_SHIFT}, |
|---|
| 166 | {BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_10, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_10_gpio_83_MASK, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_10_gpio_83_SHIFT}, |
|---|
| 167 | {BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_10, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_10_gpio_84_MASK, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_10_gpio_84_SHIFT}, |
|---|
| 168 | {BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_11, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_11_gpio_85_MASK, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_11_gpio_85_SHIFT}, |
|---|
| 169 | {BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_11, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_11_gpio_86_MASK, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_11_gpio_86_SHIFT}, |
|---|
| 170 | {BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_11, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_11_gpio_87_MASK, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_11_gpio_87_SHIFT}, |
|---|
| 171 | {BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_11, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_11_gpio_88_MASK, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_11_gpio_88_SHIFT}, |
|---|
| 172 | {BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_11, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_11_gpio_89_MASK, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_11_gpio_89_SHIFT}, |
|---|
| 173 | {BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_11, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_11_gpio_90_MASK, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_11_gpio_90_SHIFT}, |
|---|
| 174 | {BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_11, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_11_gpio_91_MASK, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_11_gpio_91_SHIFT}, |
|---|
| 175 | {BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_11, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_11_gpio_92_MASK, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_11_gpio_92_SHIFT}, |
|---|
| 176 | {BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_12, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_12_gpio_93_MASK, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_12_gpio_93_SHIFT}, |
|---|
| 177 | {BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_12, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_12_gpio_94_MASK, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_12_gpio_94_SHIFT}, |
|---|
| 178 | {BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_12, 0, 0}, /* gpio 95 is dummy */ |
|---|
| 179 | {BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_12, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_12_gpio_96_MASK, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_12_gpio_96_SHIFT}, |
|---|
| 180 | {BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_12, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_12_gpio_97_MASK, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_12_gpio_97_SHIFT}, |
|---|
| 181 | {BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_12, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_12_gpio_98_MASK, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_12_gpio_98_SHIFT}, |
|---|
| 182 | {BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_12, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_12_gpio_99_MASK, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_12_gpio_99_SHIFT}, |
|---|
| 183 | {BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_12, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_12_gpio_100_MASK, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_12_gpio_100_SHIFT}, |
|---|
| 184 | {BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_12, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_12_gpio_101_MASK, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_12_gpio_101_SHIFT}, |
|---|
| 185 | {BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_13, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_13_gpio_102_MASK, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_13_gpio_102_SHIFT}, |
|---|
| 186 | {BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_13, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_13_gpio_103_MASK, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_13_gpio_103_SHIFT}, |
|---|
| 187 | {BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_13, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_13_gpio_104_MASK, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_13_gpio_104_SHIFT}, |
|---|
| 188 | {BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_13, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_13_gpio_105_MASK, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_13_gpio_105_SHIFT}, |
|---|
| 189 | {BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_13, 0, 0}, /* gpio 106 is dummy */ |
|---|
| 190 | {BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_13, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_13_gpio_107_MASK, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_13_gpio_107_SHIFT}, |
|---|
| 191 | {BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_13, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_13_gpio_108_MASK, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_13_gpio_108_SHIFT}, |
|---|
| 192 | {BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_13, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_13_gpio_109_MASK, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_13_gpio_109_SHIFT}, |
|---|
| 193 | {BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_13, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_13_gpio_110_MASK, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_13_gpio_110_SHIFT}, |
|---|
| 194 | {BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_14, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_14_gpio_111_MASK, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_14_gpio_111_SHIFT}, |
|---|
| 195 | {BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_14, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_14_gpio_112_MASK, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_14_gpio_112_SHIFT}, |
|---|
| 196 | {BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_14, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_14_gpio_113_MASK, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_14_gpio_113_SHIFT}, |
|---|
| 197 | {BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_14, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_14_gpio_114_MASK, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_14_gpio_114_SHIFT}, |
|---|
| 198 | {BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_14, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_14_gpio_115_MASK, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_14_gpio_115_SHIFT}, |
|---|
| 199 | {BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_14, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_14_gpio_116_MASK, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_14_gpio_116_SHIFT}, |
|---|
| 200 | {BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_14, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_14_gpio_117_MASK, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_14_gpio_117_SHIFT}, |
|---|
| 201 | {BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_14, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_14_gpio_118_MASK, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_14_gpio_118_SHIFT}, |
|---|
| 202 | {BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_15, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_15_gpio_119_MASK, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_15_gpio_119_SHIFT}, |
|---|
| 203 | {BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_15, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_15_gpio_120_MASK, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_15_gpio_120_SHIFT}, |
|---|
| 204 | {BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_15, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_15_gpio_121_MASK, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_15_gpio_121_SHIFT}, |
|---|
| 205 | {BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_15, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_15_gpio_122_MASK, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_15_gpio_122_SHIFT}, |
|---|
| 206 | {BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_15, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_15_gpio_123_MASK, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_15_gpio_123_SHIFT}, |
|---|
| 207 | {BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_15, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_15_gpio_124_MASK, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_15_gpio_124_SHIFT}, |
|---|
| 208 | }; |
|---|
| 209 | |
|---|
| 210 | NEXUS_GpioTable g_sgpioTable[NEXUS_NUM_SGPIO_PINS] = { |
|---|
| 211 | #if BCHP_VER >= BCHP_VER_B0 |
|---|
| 212 | {BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_3, BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_3_sgpio_00_MASK, BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_3_sgpio_00_SHIFT}, |
|---|
| 213 | {BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_3, BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_3_sgpio_01_MASK, BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_3_sgpio_01_SHIFT}, |
|---|
| 214 | {BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_15, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_15_sgpio_02_MASK, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_15_sgpio_02_SHIFT}, |
|---|
| 215 | {BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_15, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_15_sgpio_03_MASK, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_15_sgpio_03_SHIFT}, |
|---|
| 216 | #else |
|---|
| 217 | {BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_15, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_15_sgpio_00_MASK, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_15_sgpio_00_SHIFT}, |
|---|
| 218 | {BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_15, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_15_sgpio_01_MASK, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_15_sgpio_01_SHIFT}, |
|---|
| 219 | {BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_16, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_16_sgpio_02_MASK, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_16_sgpio_02_SHIFT}, |
|---|
| 220 | {BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_16, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_16_sgpio_03_MASK, BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL_16_sgpio_03_SHIFT}, |
|---|
| 221 | #endif |
|---|
| 222 | }; |
|---|
| 223 | |
|---|
| 224 | NEXUS_GpioTable g_aonGpioTable[NEXUS_NUM_AON_GPIO_PINS] = { |
|---|
| 225 | {BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_0, BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_0_aon_gpio_00_MASK, BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_0_aon_gpio_00_SHIFT}, |
|---|
| 226 | {BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_0, BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_0_aon_gpio_01_MASK, BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_0_aon_gpio_01_SHIFT}, |
|---|
| 227 | {BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_0, 0, 0}, /* aon gpio 02 is dummy */ |
|---|
| 228 | {BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_0, BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_0_aon_gpio_03_MASK, BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_0_aon_gpio_03_SHIFT}, |
|---|
| 229 | {BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_0, BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_0_aon_gpio_04_MASK, BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_0_aon_gpio_04_SHIFT}, |
|---|
| 230 | {BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_0, BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_0_aon_gpio_05_MASK, BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_0_aon_gpio_05_SHIFT}, |
|---|
| 231 | |
|---|
| 232 | {BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_1, BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_1_aon_gpio_06_MASK, BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_1_aon_gpio_06_SHIFT}, |
|---|
| 233 | {BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_1, BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_1_aon_gpio_07_MASK, BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_1_aon_gpio_07_SHIFT}, |
|---|
| 234 | {BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_1, BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_1_aon_gpio_08_MASK, BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_1_aon_gpio_08_SHIFT}, |
|---|
| 235 | {BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_1, BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_1_aon_gpio_09_MASK, BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_1_aon_gpio_09_SHIFT}, |
|---|
| 236 | {BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_1, BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_1_aon_gpio_10_MASK, BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_1_aon_gpio_10_SHIFT}, |
|---|
| 237 | {BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_1, BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_1_aon_gpio_11_MASK, BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_1_aon_gpio_11_SHIFT}, |
|---|
| 238 | {BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_1, BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_1_aon_gpio_12_MASK, BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_1_aon_gpio_12_SHIFT}, |
|---|
| 239 | {BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_1, BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_1_aon_gpio_13_MASK, BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_1_aon_gpio_13_SHIFT}, |
|---|
| 240 | |
|---|
| 241 | {BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_2, BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_2_aon_gpio_14_MASK, BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_2_aon_gpio_14_SHIFT}, |
|---|
| 242 | {BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_2, BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_2_aon_gpio_15_MASK, BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_2_aon_gpio_15_SHIFT}, |
|---|
| 243 | {BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_2, BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_2_aon_gpio_16_MASK, BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_2_aon_gpio_16_SHIFT}, |
|---|
| 244 | {BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_2, BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_2_aon_gpio_17_MASK, BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_2_aon_gpio_17_SHIFT}, |
|---|
| 245 | {BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_2, BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_2_aon_gpio_18_MASK, BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_2_aon_gpio_18_SHIFT}, |
|---|
| 246 | {BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_2, BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_2_aon_gpio_19_MASK, BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_2_aon_gpio_19_SHIFT}, |
|---|
| 247 | {BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_2, BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_2_aon_gpio_20_MASK, BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_2_aon_gpio_20_SHIFT}, |
|---|
| 248 | }; |
|---|
| 249 | |
|---|
| 250 | NEXUS_GpioTable g_aonSgpioTable[NEXUS_NUM_AON_SGPIO_PINS] = { |
|---|
| 251 | {BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_2, BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_2_aon_sgpio_00_MASK, BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_2_aon_sgpio_00_SHIFT}, |
|---|
| 252 | {BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_3, BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_3_aon_sgpio_01_MASK, BCHP_AON_PIN_CTRL_PIN_MUX_CTRL_3_aon_sgpio_01_SHIFT}, |
|---|
| 253 | }; |
|---|
| 254 | |
|---|
| 255 | |
|---|
| 256 | /* These functions must be implemented per-chip */ |
|---|
| 257 | NEXUS_Error NEXUS_Gpio_P_GetPinMux(NEXUS_GpioType type, unsigned pin, uint32_t *pAddr, uint32_t *pMask, unsigned *pShift ) |
|---|
| 258 | { |
|---|
| 259 | NEXUS_GpioTable *pEntry=NULL; |
|---|
| 260 | BDBG_ASSERT(type <= NEXUS_GpioType_eAonSpecial); |
|---|
| 261 | |
|---|
| 262 | switch (type) |
|---|
| 263 | { |
|---|
| 264 | case NEXUS_GpioType_eStandard: |
|---|
| 265 | if ( pin >= NEXUS_NUM_GPIO_PINS) |
|---|
| 266 | { |
|---|
| 267 | return BERR_TRACE(BERR_INVALID_PARAMETER); |
|---|
| 268 | } |
|---|
| 269 | pEntry = g_gpioTable+pin; |
|---|
| 270 | break; |
|---|
| 271 | case NEXUS_GpioType_eSpecial: |
|---|
| 272 | if ( pin >= NEXUS_NUM_SGPIO_PINS) |
|---|
| 273 | { |
|---|
| 274 | return BERR_TRACE(BERR_INVALID_PARAMETER); |
|---|
| 275 | } |
|---|
| 276 | pEntry = g_sgpioTable+pin; |
|---|
| 277 | break; |
|---|
| 278 | case NEXUS_GpioType_eAonStandard: |
|---|
| 279 | if ( pin >= NEXUS_NUM_AON_GPIO_PINS) |
|---|
| 280 | { |
|---|
| 281 | return BERR_TRACE(BERR_INVALID_PARAMETER); |
|---|
| 282 | } |
|---|
| 283 | pEntry = g_aonGpioTable+pin; |
|---|
| 284 | break; |
|---|
| 285 | case NEXUS_GpioType_eAonSpecial: |
|---|
| 286 | if ( pin >= NEXUS_NUM_AON_SGPIO_PINS) |
|---|
| 287 | { |
|---|
| 288 | return BERR_TRACE(BERR_INVALID_PARAMETER); |
|---|
| 289 | } |
|---|
| 290 | pEntry = g_aonSgpioTable+pin; |
|---|
| 291 | break; |
|---|
| 292 | default: |
|---|
| 293 | return BERR_TRACE(BERR_INVALID_PARAMETER); |
|---|
| 294 | break; |
|---|
| 295 | } |
|---|
| 296 | |
|---|
| 297 | *pAddr = pEntry->addr; |
|---|
| 298 | *pMask = pEntry->mask; |
|---|
| 299 | *pShift = pEntry->shift; |
|---|
| 300 | return 0; |
|---|
| 301 | } |
|---|
| 302 | |
|---|
| 303 | NEXUS_Error NEXUS_Gpio_P_CheckPinmux(NEXUS_GpioType type, unsigned pin) |
|---|
| 304 | { |
|---|
| 305 | uint32_t addr, mask, shift, val; |
|---|
| 306 | NEXUS_Error rc; |
|---|
| 307 | |
|---|
| 308 | rc = NEXUS_Gpio_P_GetPinMux(type, pin, &addr, &mask, &shift); |
|---|
| 309 | if (rc) return BERR_TRACE(rc); |
|---|
| 310 | |
|---|
| 311 | val = BREG_Read32(g_pCoreHandles->reg, addr); |
|---|
| 312 | /* this code assumes a pinmux value of 0 is GPIO */ |
|---|
| 313 | if ( val & mask ) { |
|---|
| 314 | /* Pin is not configured as GPIO */ |
|---|
| 315 | BDBG_ERR(("Pin mux register for %u is not properly configured - value %u should be 0", |
|---|
| 316 | pin, val>>shift)); |
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| 317 | return BERR_TRACE(BERR_INVALID_PARAMETER); |
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| 318 | } |
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| 319 | |
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| 320 | return BERR_SUCCESS; |
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| 321 | } |
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| 322 | |
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| 323 | NEXUS_Error NEXUS_Gpio_P_GetPinData(NEXUS_GpioType type, unsigned pin, uint32_t *pAddress, uint32_t *pShift) |
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| 324 | { |
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| 325 | BDBG_ASSERT(type <= NEXUS_GpioType_eAonSpecial); |
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| 326 | |
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| 327 | switch (type) |
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| 328 | { |
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| 329 | case NEXUS_GpioType_eStandard: |
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| 330 | if ( pin < 32 ) |
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| 331 | { |
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| 332 | /* GPIO Pins 31..0 are in ODEN_LO */ |
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| 333 | *pAddress = BCHP_GIO_ODEN_LO; |
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| 334 | *pShift = pin; |
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| 335 | } |
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| 336 | else if ( pin < 64 ) |
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| 337 | { |
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| 338 | /* GPIO Pins 63..32 are in ODEN_HI */ |
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| 339 | *pAddress = BCHP_GIO_ODEN_HI; |
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| 340 | *pShift = pin-32; |
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| 341 | } |
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| 342 | else if ( pin < 96 ) |
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| 343 | { |
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| 344 | /* GPIO Pins 95..64 are in ODEN_EXT, above sgpio bits */ |
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| 345 | *pAddress = BCHP_GIO_ODEN_EXT; |
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| 346 | *pShift = (pin-64); |
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| 347 | } |
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| 348 | else if ( pin < 125 ) |
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| 349 | { |
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| 350 | /* GPIO Pins 124..96 are in ODEN_EXT_HI */ |
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| 351 | *pAddress = BCHP_GIO_ODEN_EXT_HI; |
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| 352 | *pShift = (pin-96); |
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| 353 | } |
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| 354 | else |
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| 355 | { |
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| 356 | return BERR_TRACE(BERR_INVALID_PARAMETER); |
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| 357 | } |
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| 358 | break; |
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| 359 | case NEXUS_GpioType_eSpecial: |
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| 360 | if ( pin >= NEXUS_NUM_SGPIO_PINS) |
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| 361 | { |
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| 362 | return BERR_TRACE(BERR_INVALID_PARAMETER); |
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| 363 | } |
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| 364 | else |
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| 365 | { |
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| 366 | /* SGPIO Pins 5..0 are in ODEN_EXT */ |
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| 367 | *pAddress = BCHP_GIO_ODEN_EXT; |
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| 368 | *pShift = pin; |
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| 369 | } |
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| 370 | break; |
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| 371 | case NEXUS_GpioType_eAonStandard: |
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| 372 | if ( pin >= NEXUS_NUM_AON_GPIO_PINS) |
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| 373 | { |
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| 374 | return BERR_TRACE(BERR_INVALID_PARAMETER); |
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| 375 | } |
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| 376 | else |
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| 377 | { |
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| 378 | /* AON GPIO Pins 17..0 are in AON_ODEN_LO */ |
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| 379 | *pAddress = BCHP_GIO_AON_ODEN_LO; |
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| 380 | *pShift = pin; |
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| 381 | } |
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| 382 | break; |
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| 383 | case NEXUS_GpioType_eAonSpecial: |
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| 384 | if ( pin >= NEXUS_NUM_AON_SGPIO_PINS) |
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| 385 | { |
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| 386 | return BERR_TRACE(BERR_INVALID_PARAMETER); |
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| 387 | } |
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| 388 | else |
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| 389 | { |
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| 390 | /* AON SGPIO Pins 3..0 are in AON_ODEN_EXT */ |
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| 391 | *pAddress = BCHP_GIO_AON_ODEN_EXT; |
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| 392 | *pShift = pin; |
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| 393 | } |
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| 394 | break; |
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| 395 | default: |
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| 396 | break; |
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| 397 | } |
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| 398 | |
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| 399 | return BERR_SUCCESS; |
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| 400 | } |
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| 401 | |
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