| 1 | /* |
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| 2 | * This file is subject to the terms and conditions of the GNU General Public |
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| 3 | * License. See the file "COPYING" in the main directory of this archive |
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| 4 | * for more details. |
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| 5 | * |
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| 6 | * Copyright (C) 2000 Toshiba Corporation |
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| 7 | */ |
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| 8 | #ifndef __ASM_TX3927_H |
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| 9 | #define __ASM_TX3927_H |
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| 10 | |
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| 11 | #include <asm/jmr3927/txx927.h> |
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| 12 | |
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| 13 | #define TX3927_SDRAMC_REG 0xfffe8000 |
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| 14 | #define TX3927_ROMC_REG 0xfffe9000 |
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| 15 | #define TX3927_DMA_REG 0xfffeb000 |
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| 16 | #define TX3927_IRC_REG 0xfffec000 |
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| 17 | #define TX3927_PCIC_REG 0xfffed000 |
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| 18 | #define TX3927_CCFG_REG 0xfffee000 |
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| 19 | #define TX3927_NR_TMR 3 |
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| 20 | #define TX3927_TMR_REG(ch) (0xfffef000 + (ch) * 0x100) |
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| 21 | #define TX3927_NR_SIO 2 |
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| 22 | #define TX3927_SIO_REG(ch) (0xfffef300 + (ch) * 0x100) |
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| 23 | #define TX3927_PIO_REG 0xfffef500 |
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| 24 | |
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| 25 | #ifndef __ASSEMBLY__ |
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| 26 | |
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| 27 | struct tx3927_sdramc_reg { |
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| 28 | volatile unsigned long cr[8]; |
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| 29 | volatile unsigned long tr[3]; |
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| 30 | volatile unsigned long cmd; |
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| 31 | volatile unsigned long smrs[2]; |
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| 32 | }; |
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| 33 | |
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| 34 | struct tx3927_romc_reg { |
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| 35 | volatile unsigned long cr[8]; |
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| 36 | }; |
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| 37 | |
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| 38 | struct tx3927_dma_reg { |
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| 39 | struct tx3927_dma_ch_reg { |
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| 40 | volatile unsigned long cha; |
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| 41 | volatile unsigned long sar; |
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| 42 | volatile unsigned long dar; |
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| 43 | volatile unsigned long cntr; |
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| 44 | volatile unsigned long sair; |
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| 45 | volatile unsigned long dair; |
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| 46 | volatile unsigned long ccr; |
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| 47 | volatile unsigned long csr; |
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| 48 | } ch[4]; |
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| 49 | volatile unsigned long dbr[8]; |
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| 50 | volatile unsigned long tdhr; |
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| 51 | volatile unsigned long mcr; |
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| 52 | volatile unsigned long unused0; |
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| 53 | }; |
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| 54 | |
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| 55 | struct tx3927_irc_reg { |
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| 56 | volatile unsigned long cer; |
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| 57 | volatile unsigned long cr[2]; |
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| 58 | volatile unsigned long unused0; |
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| 59 | volatile unsigned long ilr[8]; |
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| 60 | volatile unsigned long unused1[4]; |
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| 61 | volatile unsigned long imr; |
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| 62 | volatile unsigned long unused2[7]; |
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| 63 | volatile unsigned long scr; |
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| 64 | volatile unsigned long unused3[7]; |
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| 65 | volatile unsigned long ssr; |
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| 66 | volatile unsigned long unused4[7]; |
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| 67 | volatile unsigned long csr; |
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| 68 | }; |
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| 69 | |
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| 70 | #include <asm/byteorder.h> |
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| 71 | |
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| 72 | #ifdef __BIG_ENDIAN |
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| 73 | #define endian_def_s2(e1,e2) \ |
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| 74 | volatile unsigned short e1,e2 |
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| 75 | #define endian_def_sb2(e1,e2,e3) \ |
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| 76 | volatile unsigned short e1;volatile unsigned char e2,e3 |
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| 77 | #define endian_def_b2s(e1,e2,e3) \ |
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| 78 | volatile unsigned char e1,e2;volatile unsigned short e3 |
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| 79 | #define endian_def_b4(e1,e2,e3,e4) \ |
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| 80 | volatile unsigned char e1,e2,e3,e4 |
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| 81 | #else |
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| 82 | #define endian_def_s2(e1,e2) \ |
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| 83 | volatile unsigned short e2,e1 |
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| 84 | #define endian_def_sb2(e1,e2,e3) \ |
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| 85 | volatile unsigned char e3,e2;volatile unsigned short e1 |
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| 86 | #define endian_def_b2s(e1,e2,e3) \ |
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| 87 | volatile unsigned short e3;volatile unsigned char e2,e1 |
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| 88 | #define endian_def_b4(e1,e2,e3,e4) \ |
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| 89 | volatile unsigned char e4,e3,e2,e1 |
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| 90 | #endif |
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| 91 | |
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| 92 | struct tx3927_pcic_reg { |
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| 93 | endian_def_s2(did, vid); |
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| 94 | endian_def_s2(pcistat, pcicmd); |
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| 95 | endian_def_b4(cc, scc, rpli, rid); |
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| 96 | endian_def_b4(unused0, ht, mlt, cls); |
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| 97 | volatile unsigned long ioba; /* +10 */ |
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| 98 | volatile unsigned long mba; |
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| 99 | volatile unsigned long unused1[5]; |
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| 100 | endian_def_s2(svid, ssvid); |
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| 101 | volatile unsigned long unused2; /* +30 */ |
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| 102 | endian_def_sb2(unused3, unused4, capptr); |
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| 103 | volatile unsigned long unused5; |
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| 104 | endian_def_b4(ml, mg, ip, il); |
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| 105 | volatile unsigned long unused6; /* +40 */ |
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| 106 | volatile unsigned long istat; |
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| 107 | volatile unsigned long iim; |
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| 108 | volatile unsigned long rrt; |
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| 109 | volatile unsigned long unused7[3]; /* +50 */ |
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| 110 | volatile unsigned long ipbmma; |
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| 111 | volatile unsigned long ipbioma; /* +60 */ |
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| 112 | volatile unsigned long ilbmma; |
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| 113 | volatile unsigned long ilbioma; |
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| 114 | volatile unsigned long unused8[9]; |
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| 115 | volatile unsigned long tc; /* +90 */ |
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| 116 | volatile unsigned long tstat; |
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| 117 | volatile unsigned long tim; |
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| 118 | volatile unsigned long tccmd; |
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| 119 | volatile unsigned long pcirrt; /* +a0 */ |
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| 120 | volatile unsigned long pcirrt_cmd; |
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| 121 | volatile unsigned long pcirrdt; |
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| 122 | volatile unsigned long unused9[3]; |
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| 123 | volatile unsigned long tlboap; |
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| 124 | volatile unsigned long tlbiap; |
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| 125 | volatile unsigned long tlbmma; /* +c0 */ |
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| 126 | volatile unsigned long tlbioma; |
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| 127 | volatile unsigned long sc_msg; |
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| 128 | volatile unsigned long sc_be; |
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| 129 | volatile unsigned long tbl; /* +d0 */ |
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| 130 | volatile unsigned long unused10[3]; |
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| 131 | volatile unsigned long pwmng; /* +e0 */ |
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| 132 | volatile unsigned long pwmngs; |
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| 133 | volatile unsigned long unused11[6]; |
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| 134 | volatile unsigned long req_trace; /* +100 */ |
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| 135 | volatile unsigned long pbapmc; |
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| 136 | volatile unsigned long pbapms; |
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| 137 | volatile unsigned long pbapmim; |
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| 138 | volatile unsigned long bm; /* +110 */ |
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| 139 | volatile unsigned long cpcibrs; |
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| 140 | volatile unsigned long cpcibgs; |
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| 141 | volatile unsigned long pbacs; |
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| 142 | volatile unsigned long iobas; /* +120 */ |
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| 143 | volatile unsigned long mbas; |
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| 144 | volatile unsigned long lbc; |
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| 145 | volatile unsigned long lbstat; |
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| 146 | volatile unsigned long lbim; /* +130 */ |
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| 147 | volatile unsigned long pcistatim; |
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| 148 | volatile unsigned long ica; |
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| 149 | volatile unsigned long icd; |
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| 150 | volatile unsigned long iiadp; /* +140 */ |
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| 151 | volatile unsigned long iscdp; |
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| 152 | volatile unsigned long mmas; |
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| 153 | volatile unsigned long iomas; |
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| 154 | volatile unsigned long ipciaddr; /* +150 */ |
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| 155 | volatile unsigned long ipcidata; |
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| 156 | volatile unsigned long ipcibe; |
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| 157 | }; |
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| 158 | |
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| 159 | struct tx3927_ccfg_reg { |
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| 160 | volatile unsigned long ccfg; |
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| 161 | volatile unsigned long crir; |
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| 162 | volatile unsigned long pcfg; |
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| 163 | volatile unsigned long tear; |
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| 164 | volatile unsigned long pdcr; |
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| 165 | }; |
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| 166 | |
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| 167 | #endif /* !__ASSEMBLY__ */ |
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| 168 | |
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| 169 | /* |
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| 170 | * SDRAMC |
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| 171 | */ |
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| 172 | |
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| 173 | /* |
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| 174 | * ROMC |
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| 175 | */ |
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| 176 | |
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| 177 | /* |
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| 178 | * DMA |
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| 179 | */ |
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| 180 | /* bits for MCR */ |
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| 181 | #define TX3927_DMA_MCR_EIS(ch) (0x10000000<<(ch)) |
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| 182 | #define TX3927_DMA_MCR_DIS(ch) (0x01000000<<(ch)) |
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| 183 | #define TX3927_DMA_MCR_RSFIF 0x00000080 |
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| 184 | #define TX3927_DMA_MCR_FIFUM(ch) (0x00000008<<(ch)) |
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| 185 | #define TX3927_DMA_MCR_LE 0x00000004 |
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| 186 | #define TX3927_DMA_MCR_RPRT 0x00000002 |
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| 187 | #define TX3927_DMA_MCR_MSTEN 0x00000001 |
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| 188 | |
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| 189 | /* bits for CCRn */ |
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| 190 | #define TX3927_DMA_CCR_DBINH 0x04000000 |
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| 191 | #define TX3927_DMA_CCR_SBINH 0x02000000 |
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| 192 | #define TX3927_DMA_CCR_CHRST 0x01000000 |
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| 193 | #define TX3927_DMA_CCR_RVBYTE 0x00800000 |
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| 194 | #define TX3927_DMA_CCR_ACKPOL 0x00400000 |
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| 195 | #define TX3927_DMA_CCR_REQPL 0x00200000 |
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| 196 | #define TX3927_DMA_CCR_EGREQ 0x00100000 |
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| 197 | #define TX3927_DMA_CCR_CHDN 0x00080000 |
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| 198 | #define TX3927_DMA_CCR_DNCTL 0x00060000 |
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| 199 | #define TX3927_DMA_CCR_EXTRQ 0x00010000 |
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| 200 | #define TX3927_DMA_CCR_INTRQD 0x0000e000 |
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| 201 | #define TX3927_DMA_CCR_INTENE 0x00001000 |
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| 202 | #define TX3927_DMA_CCR_INTENC 0x00000800 |
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| 203 | #define TX3927_DMA_CCR_INTENT 0x00000400 |
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| 204 | #define TX3927_DMA_CCR_CHNEN 0x00000200 |
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| 205 | #define TX3927_DMA_CCR_XFACT 0x00000100 |
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| 206 | #define TX3927_DMA_CCR_SNOP 0x00000080 |
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| 207 | #define TX3927_DMA_CCR_DSTINC 0x00000040 |
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| 208 | #define TX3927_DMA_CCR_SRCINC 0x00000020 |
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| 209 | #define TX3927_DMA_CCR_XFSZ(order) (((order) << 2) & 0x0000001c) |
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| 210 | #define TX3927_DMA_CCR_XFSZ_1W TX3927_DMA_CCR_XFSZ(2) |
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| 211 | #define TX3927_DMA_CCR_XFSZ_4W TX3927_DMA_CCR_XFSZ(4) |
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| 212 | #define TX3927_DMA_CCR_XFSZ_8W TX3927_DMA_CCR_XFSZ(5) |
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| 213 | #define TX3927_DMA_CCR_XFSZ_16W TX3927_DMA_CCR_XFSZ(6) |
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| 214 | #define TX3927_DMA_CCR_XFSZ_32W TX3927_DMA_CCR_XFSZ(7) |
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| 215 | #define TX3927_DMA_CCR_MEMIO 0x00000002 |
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| 216 | #define TX3927_DMA_CCR_ONEAD 0x00000001 |
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| 217 | |
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| 218 | /* bits for CSRn */ |
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| 219 | #define TX3927_DMA_CSR_CHNACT 0x00000100 |
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| 220 | #define TX3927_DMA_CSR_ABCHC 0x00000080 |
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| 221 | #define TX3927_DMA_CSR_NCHNC 0x00000040 |
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| 222 | #define TX3927_DMA_CSR_NTRNFC 0x00000020 |
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| 223 | #define TX3927_DMA_CSR_EXTDN 0x00000010 |
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| 224 | #define TX3927_DMA_CSR_CFERR 0x00000008 |
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| 225 | #define TX3927_DMA_CSR_CHERR 0x00000004 |
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| 226 | #define TX3927_DMA_CSR_DESERR 0x00000002 |
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| 227 | #define TX3927_DMA_CSR_SORERR 0x00000001 |
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| 228 | |
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| 229 | /* |
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| 230 | * IRC |
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| 231 | */ |
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| 232 | #define TX3927_IR_MAX_LEVEL 7 |
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| 233 | |
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| 234 | /* IRCER : Int. Control Enable */ |
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| 235 | #define TX3927_IRCER_ICE 0x00000001 |
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| 236 | |
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| 237 | /* IRCR : Int. Control */ |
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| 238 | #define TX3927_IRCR_LOW 0x00000000 |
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| 239 | #define TX3927_IRCR_HIGH 0x00000001 |
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| 240 | #define TX3927_IRCR_DOWN 0x00000002 |
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| 241 | #define TX3927_IRCR_UP 0x00000003 |
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| 242 | |
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| 243 | /* IRSCR : Int. Status Control */ |
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| 244 | #define TX3927_IRSCR_EIClrE 0x00000100 |
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| 245 | #define TX3927_IRSCR_EIClr_MASK 0x0000000f |
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| 246 | |
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| 247 | /* IRCSR : Int. Current Status */ |
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| 248 | #define TX3927_IRCSR_IF 0x00010000 |
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| 249 | #define TX3927_IRCSR_ILV_MASK 0x00000700 |
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| 250 | #define TX3927_IRCSR_IVL_MASK 0x0000001f |
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| 251 | |
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| 252 | #define TX3927_IR_INT0 0 |
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| 253 | #define TX3927_IR_INT1 1 |
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| 254 | #define TX3927_IR_INT2 2 |
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| 255 | #define TX3927_IR_INT3 3 |
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| 256 | #define TX3927_IR_INT4 4 |
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| 257 | #define TX3927_IR_INT5 5 |
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| 258 | #define TX3927_IR_SIO0 6 |
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| 259 | #define TX3927_IR_SIO1 7 |
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| 260 | #define TX3927_IR_SIO(ch) (6 + (ch)) |
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| 261 | #define TX3927_IR_DMA 8 |
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| 262 | #define TX3927_IR_PIO 9 |
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| 263 | #define TX3927_IR_PCI 10 |
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| 264 | #define TX3927_IR_TMR0 13 |
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| 265 | #define TX3927_IR_TMR1 14 |
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| 266 | #define TX3927_IR_TMR2 15 |
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| 267 | #define TX3927_NUM_IR 16 |
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| 268 | |
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| 269 | /* |
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| 270 | * PCIC |
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| 271 | */ |
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| 272 | /* bits for PCICMD */ |
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| 273 | /* see PCI_COMMAND_XXX in linux/pci.h */ |
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| 274 | |
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| 275 | /* bits for PCISTAT */ |
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| 276 | /* see PCI_STATUS_XXX in linux/pci.h */ |
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| 277 | #define PCI_STATUS_NEW_CAP 0x0010 |
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| 278 | |
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| 279 | /* bits for TC */ |
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| 280 | #define TX3927_PCIC_TC_OF16E 0x00000020 |
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| 281 | #define TX3927_PCIC_TC_IF8E 0x00000010 |
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| 282 | #define TX3927_PCIC_TC_OF8E 0x00000008 |
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| 283 | |
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| 284 | /* bits for IOBA/MBA */ |
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| 285 | /* see PCI_BASE_ADDRESS_XXX in linux/pci.h */ |
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| 286 | |
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| 287 | /* bits for PBAPMC */ |
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| 288 | #define TX3927_PCIC_PBAPMC_RPBA 0x00000004 |
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| 289 | #define TX3927_PCIC_PBAPMC_PBAEN 0x00000002 |
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| 290 | #define TX3927_PCIC_PBAPMC_BMCEN 0x00000001 |
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| 291 | |
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| 292 | /* bits for LBSTAT/LBIM */ |
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| 293 | #define TX3927_PCIC_LBIM_ALL 0x0000003e |
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| 294 | |
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| 295 | /* bits for PCISTATIM (see also PCI_STATUS_XXX in linux/pci.h */ |
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| 296 | #define TX3927_PCIC_PCISTATIM_ALL 0x0000f900 |
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| 297 | |
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| 298 | /* bits for LBC */ |
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| 299 | #define TX3927_PCIC_LBC_IBSE 0x00004000 |
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| 300 | #define TX3927_PCIC_LBC_TIBSE 0x00002000 |
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| 301 | #define TX3927_PCIC_LBC_TMFBSE 0x00001000 |
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| 302 | #define TX3927_PCIC_LBC_HRST 0x00000800 |
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| 303 | #define TX3927_PCIC_LBC_SRST 0x00000400 |
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| 304 | #define TX3927_PCIC_LBC_EPCAD 0x00000200 |
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| 305 | #define TX3927_PCIC_LBC_MSDSE 0x00000100 |
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| 306 | #define TX3927_PCIC_LBC_CRR 0x00000080 |
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| 307 | #define TX3927_PCIC_LBC_ILMDE 0x00000040 |
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| 308 | #define TX3927_PCIC_LBC_ILIDE 0x00000020 |
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| 309 | |
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| 310 | #define TX3927_PCIC_IDSEL_AD_TO_SLOT(ad) ((ad) - 11) |
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| 311 | #define TX3927_PCIC_MAX_DEVNU TX3927_PCIC_IDSEL_AD_TO_SLOT(32) |
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| 312 | |
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| 313 | /* |
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| 314 | * CCFG |
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| 315 | */ |
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| 316 | /* CCFG : Chip Configuration */ |
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| 317 | #define TX3927_CCFG_TLBOFF 0x00020000 |
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| 318 | #define TX3927_CCFG_BEOW 0x00010000 |
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| 319 | #define TX3927_CCFG_WR 0x00008000 |
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| 320 | #define TX3927_CCFG_TOE 0x00004000 |
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| 321 | #define TX3927_CCFG_PCIXARB 0x00002000 |
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| 322 | #define TX3927_CCFG_PCI3 0x00001000 |
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| 323 | #define TX3927_CCFG_PSNP 0x00000800 |
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| 324 | #define TX3927_CCFG_PPRI 0x00000400 |
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| 325 | #define TX3927_CCFG_PLLM 0x00000030 |
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| 326 | #define TX3927_CCFG_ENDIAN 0x00000004 |
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| 327 | #define TX3927_CCFG_HALT 0x00000002 |
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| 328 | #define TX3927_CCFG_ACEHOLD 0x00000001 |
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| 329 | |
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| 330 | /* PCFG : Pin Configuration */ |
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| 331 | #define TX3927_PCFG_SYSCLKEN 0x08000000 |
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| 332 | #define TX3927_PCFG_SDRCLKEN_ALL 0x07c00000 |
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| 333 | #define TX3927_PCFG_SDRCLKEN(ch) (0x00400000<<(ch)) |
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| 334 | #define TX3927_PCFG_PCICLKEN_ALL 0x003c0000 |
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| 335 | #define TX3927_PCFG_PCICLKEN(ch) (0x00040000<<(ch)) |
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| 336 | #define TX3927_PCFG_SELALL 0x0003ffff |
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| 337 | #define TX3927_PCFG_SELCS 0x00020000 |
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| 338 | #define TX3927_PCFG_SELDSF 0x00010000 |
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| 339 | #define TX3927_PCFG_SELSIOC_ALL 0x0000c000 |
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| 340 | #define TX3927_PCFG_SELSIOC(ch) (0x00004000<<(ch)) |
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| 341 | #define TX3927_PCFG_SELSIO_ALL 0x00003000 |
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| 342 | #define TX3927_PCFG_SELSIO(ch) (0x00001000<<(ch)) |
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| 343 | #define TX3927_PCFG_SELTMR_ALL 0x00000e00 |
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| 344 | #define TX3927_PCFG_SELTMR(ch) (0x00000200<<(ch)) |
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| 345 | #define TX3927_PCFG_SELDONE 0x00000100 |
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| 346 | #define TX3927_PCFG_INTDMA_ALL 0x000000f0 |
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| 347 | #define TX3927_PCFG_INTDMA(ch) (0x00000010<<(ch)) |
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| 348 | #define TX3927_PCFG_SELDMA_ALL 0x0000000f |
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| 349 | #define TX3927_PCFG_SELDMA(ch) (0x00000001<<(ch)) |
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| 350 | |
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| 351 | #ifndef __ASSEMBLY__ |
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| 352 | |
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| 353 | #define tx3927_sdramcptr ((struct tx3927_sdramc_reg *)TX3927_SDRAMC_REG) |
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| 354 | #define tx3927_romcptr ((struct tx3927_romc_reg *)TX3927_ROMC_REG) |
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| 355 | #define tx3927_dmaptr ((struct tx3927_dma_reg *)TX3927_DMA_REG) |
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| 356 | #define tx3927_ircptr ((struct tx3927_irc_reg *)TX3927_IRC_REG) |
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| 357 | #define tx3927_pcicptr ((struct tx3927_pcic_reg *)TX3927_PCIC_REG) |
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| 358 | #define tx3927_ccfgptr ((struct tx3927_ccfg_reg *)TX3927_CCFG_REG) |
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| 359 | #define tx3927_tmrptr(ch) ((struct txx927_tmr_reg *)TX3927_TMR_REG(ch)) |
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| 360 | #define tx3927_sioptr(ch) ((struct txx927_sio_reg *)TX3927_SIO_REG(ch)) |
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| 361 | #define tx3927_pioptr ((struct txx927_pio_reg *)TX3927_PIO_REG) |
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| 362 | |
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| 363 | #endif /* !__ASSEMBLY__ */ |
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| 364 | |
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| 365 | #endif /* __ASM_TX3927_H */ |
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