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first commit
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| 1 | /************************************************************************* |
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| 2 | ** Broadcom Corp. Confidential |
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| 3 | ** Copyright 2010 Broadcom Corp. All Rights Reserved. |
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| 4 | ** |
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| 5 | ** THIS SOFTWARE MAY ONLY BE USED SUBJECT TO AN EXECUTED SOFTWARE LICENSE |
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| 6 | ** AGREEMENT BETWEEN THE USER AND BROADCOM. YOU HAVE NO RIGHT TO USE OR |
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| 7 | ** EXPLOIT THIS MATERIAL EXCEPT SUBJECT TO THE TERMS OF SUCH AN AGREEMENT. |
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| 8 | ** |
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| 9 | ** File: bls2.S |
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| 10 | ** Description: low level board dependent startup code stage 2 |
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| 11 | ** Created: alexp |
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| 12 | ** |
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| 13 | ** REVISION: |
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| 14 | ** |
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| 15 | ***************************************************************************/ |
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| 16 | |
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| 17 | #include "bmips3300.h" |
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| 18 | #include "bchp_common.h" |
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| 19 | #include "bchp_sun_top_ctrl.h" |
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| 20 | |
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| 21 | #define BCHP_REG_BASE PHYS_TO_K1(BCHP_PHYSICAL_OFFSET) |
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| 22 | #define INITIAL_SR ((CP0_STATUS_SR_MASK | CP0_STATUS_CU1_MASK | CP0_STATUS_BEV_MASK | CP0_STATUS_IE_MASK) & ~( CP0_STATUS_ERL_MASK | CP0_STATUS_EXL_MASK)) |
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| 23 | BL_STACK_SIZE = 0x1000 |
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| 24 | |
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| 25 | .lcomm bl_stack, BL_STACK_SIZE |
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| 26 | .text |
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| 27 | .globl __start_s2 |
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| 28 | .set noreorder |
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| 29 | |
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| 30 | __start_s2: |
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| 31 | b init_cpu |
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| 32 | nop |
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| 33 | init_cpu: |
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| 34 | li t0, INITIAL_SR |
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| 35 | mtc0 t0, CP0_STATUS |
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| 36 | nop |
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| 37 | nop |
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| 38 | bal _writeasm |
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| 39 | li a0, '1' |
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| 40 | bal init_mips |
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| 41 | nop |
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| 42 | bal _writeasm |
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| 43 | li a0, '2' |
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| 44 | /* copy exception vector to correct location */ |
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| 45 | la t0, general_exception |
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| 46 | li a0, 0xa0000180 |
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| 47 | lw a1, (t0) |
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| 48 | sw a1, (a0) |
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| 49 | lw a1, 4(t0) |
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| 50 | sw a1, 4(a0) |
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| 51 | lw a1, 8(t0) |
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| 52 | sw a1, 8(a0) |
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| 53 | lw a1, 12(t0) |
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| 54 | sw a1, 12(a0) |
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| 55 | |
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| 56 | bal _writeasm |
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| 57 | li a0, '3' |
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| 58 | |
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| 59 | la t0, start_cached |
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| 60 | /* start execution from cached memory */ |
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| 61 | jr t0 |
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| 62 | nop |
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| 63 | start_cached: |
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| 64 | bal _writeasm |
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| 65 | li a0, '4' |
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| 66 | |
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| 67 | /* copy data segment */ |
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| 68 | la a0, _etext |
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| 69 | la a1, _fdata |
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| 70 | la t2,_edata |
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| 71 | subu a2,t2,a1 |
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| 72 | |
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| 73 | beqz a2, 2f |
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| 74 | nop |
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| 75 | 1: |
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| 76 | lw t0, 0(a0) |
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| 77 | sw t0, 0(a1) |
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| 78 | sub a2, a2, 4 |
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| 79 | addi a0, a0, 4 |
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| 80 | addi a1, a1, 4 |
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| 81 | bnez a2, 1b |
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| 82 | nop |
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| 83 | 2: |
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| 84 | bal _writeasm |
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| 85 | li a0, '5' |
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| 86 | |
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| 87 | /* clear bss segment */ |
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| 88 | la a0,_fbss |
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| 89 | la a1,_end |
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| 90 | subu a1,a1,a0 |
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| 91 | |
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| 92 | beqz a1, 2f |
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| 93 | nop |
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| 94 | 1: |
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| 95 | sw zero,0(a0) |
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| 96 | sub a1, a1, 4 |
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| 97 | addi a0, a0, 4 |
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| 98 | bnez a1, 1b |
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| 99 | nop |
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| 100 | 2: |
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| 101 | bal _writeasm |
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| 102 | li a0, '6' |
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| 103 | |
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| 104 | /* load stack pointer*/ |
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| 105 | la sp, bl_stack + BL_STACK_SIZE - 24 |
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| 106 | /* jump in to cached segment */ |
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| 107 | la t0, bootloader_main |
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| 108 | jalr t0 |
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| 109 | move a0, zero |
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| 110 | loop: |
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| 111 | b loop |
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| 112 | nop |
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| 113 | |
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| 114 | LEAF(aligned_copy) |
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| 115 | |
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| 116 | 1: |
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| 117 | lw v0, 0(a0) |
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| 118 | addiu a2, a2, -4 |
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| 119 | sw v0, 0(a1) |
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| 120 | addiu a0, a0, 4 |
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| 121 | bnez a2, 1b |
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| 122 | addiu a1, a1, 4 |
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| 123 | |
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| 124 | jr ra |
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| 125 | nop |
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| 126 | |
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| 127 | END(aligned_copy) |
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| 128 | |
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| 129 | /* general exception will loop here */ |
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| 130 | LEAF(general_exception) |
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| 131 | b general_exception |
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| 132 | nop |
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| 133 | nop |
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| 134 | nop |
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| 135 | END(general_exception) |
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| 136 | |
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| 137 | #include "uart.s" |
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| 138 | #include "chip.s" |
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| 139 | #undef RelAddrPrintChar |
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| 140 | #undef RelAddrPrintHex32 |
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| 141 | #include "common_routines.s" |
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| 142 | #include "memc_0_client_prog.s" |
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| 143 | #include "cache_lib.s" |
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| 144 | #include "mips_libs.s" |
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| 145 | #include "memc_0_access.s" |
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| 146 | |
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