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Last change
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checked in by jglee, 11 years ago
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first commit
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| 1 | /************************************************************************* |
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| 2 | ** Broadcom Corp. Confidential |
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| 3 | ** Copyright 2010 Broadcom Corp. All Rights Reserved. |
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| 4 | ** |
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| 5 | ** THIS SOFTWARE MAY ONLY BE USED SUBJECT TO AN EXECUTED SOFTWARE LICENSE |
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| 6 | ** AGREEMENT BETWEEN THE USER AND BROADCOM. YOU HAVE NO RIGHT TO USE OR |
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| 7 | ** EXPLOIT THIS MATERIAL EXCEPT SUBJECT TO THE TERMS OF SUCH AN AGREEMENT. |
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| 8 | ** |
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| 9 | ** File: bl.S |
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| 10 | ** Description: low level board dependent startup code |
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| 11 | ** Created: alex[ |
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| 12 | ** |
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| 13 | ** REVISION: |
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| 14 | ** |
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| 15 | ***************************************************************************/ |
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| 16 | |
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| 17 | #include "bmips3300.h" |
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| 18 | #include "bchp_common.h" |
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| 19 | #include "bchp_sun_top_ctrl.h" |
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| 20 | #include "ramheader.h" |
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| 21 | |
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| 22 | #define BCHP_REG_BASE PHYS_TO_K1(BCHP_PHYSICAL_OFFSET) |
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| 23 | #define INITIAL_SR ((CP0_STATUS_SR_MASK | CP0_STATUS_CU1_MASK | CP0_STATUS_BEV_MASK | CP0_STATUS_IE_MASK) & ~( CP0_STATUS_ERL_MASK | CP0_STATUS_EXL_MASK)) |
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| 24 | BL_STACK_SIZE = 0x1000 |
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| 25 | |
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| 26 | .lcomm bl_stack, BL_STACK_SIZE |
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| 27 | .text |
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| 28 | .set noreorder |
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| 29 | .extern _stage3_size |
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| 30 | .globl __start_s3 |
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| 31 | .ent __start_s3 |
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| 32 | __start_s3: |
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| 33 | b init_cpu |
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| 34 | nop |
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| 35 | nop |
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| 36 | nop |
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| 37 | /* size of stage3 */ |
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| 38 | .word _stage3_size |
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| 39 | /* flash map */ |
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| 40 | .word FMAP_MAGIC |
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| 41 | .word FMAP_APP0_OFFSET |
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| 42 | .word FMAP_APP1_OFFSET |
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| 43 | .word FMAP_DATA_OFFSET |
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| 44 | .word FMAP_DATA_SIZE |
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| 45 | |
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| 46 | .org __start_s3+0x180 |
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| 47 | rom_gen_ex: # general exception will loop here |
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| 48 | b rom_gen_ex |
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| 49 | nop |
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| 50 | nop |
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| 51 | nop |
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| 52 | .org __start_s3+0x400 |
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| 53 | .globl oem_key |
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| 54 | oem_key: |
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| 55 | /* oem key is placed here */ |
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| 56 | .include "oem_example_key1.S" |
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| 57 | init_cpu: |
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| 58 | li t0, INITIAL_SR |
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| 59 | mtc0 t0, CP0_STATUS |
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| 60 | nop |
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| 61 | nop |
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| 62 | bal _writeasm |
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| 63 | li a0, '1' |
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| 64 | bal init_mips |
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| 65 | nop |
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| 66 | bal _writeasm |
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| 67 | li a0, '2' |
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| 68 | bal _writeasm |
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| 69 | li a0, '3' |
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| 70 | |
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| 71 | la t0, start_cached |
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| 72 | /* start execution from cached memory */ |
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| 73 | jr t0 |
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| 74 | nop |
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| 75 | start_cached: |
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| 76 | bal _writeasm |
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| 77 | li a0, '4' |
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| 78 | |
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| 79 | /* copy data segment */ |
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| 80 | la a0, _sdata |
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| 81 | la a1, _fdata |
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| 82 | la t2,_edata |
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| 83 | subu a2,t2,a1 |
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| 84 | |
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| 85 | beqz a2, 2f |
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| 86 | nop |
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| 87 | 1: |
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| 88 | lw t0, 0(a0) |
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| 89 | sw t0, 0(a1) |
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| 90 | sub a2, a2, 4 |
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| 91 | addi a0, a0, 4 |
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| 92 | addi a1, a1, 4 |
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| 93 | bnez a2, 1b |
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| 94 | nop |
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| 95 | 2: |
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| 96 | bal _writeasm |
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| 97 | li a0, '5' |
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| 98 | |
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| 99 | /* clear bss segment */ |
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| 100 | la a0,_fbss |
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| 101 | la a1,_end |
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| 102 | subu a1,a1,a0 |
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| 103 | |
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| 104 | beqz a1, 2f |
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| 105 | nop |
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| 106 | 1: |
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| 107 | sw zero,0(a0) |
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| 108 | sub a1, a1, 4 |
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| 109 | addi a0, a0, 4 |
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| 110 | bnez a1, 1b |
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| 111 | nop |
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| 112 | 2: |
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| 113 | bal _writeasm |
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| 114 | li a0, '6' |
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| 115 | |
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| 116 | /* load stack pointer*/ |
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| 117 | la sp, bl_stack + BL_STACK_SIZE - 24 |
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| 118 | /* jump in to cached segment */ |
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| 119 | la t0, bootloader_main |
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| 120 | jalr t0 |
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| 121 | move a0, zero |
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| 122 | loop: |
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| 123 | b loop |
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| 124 | nop |
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| 125 | .end __start_s3 |
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| 126 | |
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| 127 | LEAF(aligned_copy) |
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| 128 | |
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| 129 | 1: |
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| 130 | lw v0, 0(a0) |
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| 131 | addiu a2, a2, -4 |
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| 132 | sw v0, 0(a1) |
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| 133 | addiu a0, a0, 4 |
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| 134 | bnez a2, 1b |
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| 135 | addiu a1, a1, 4 |
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| 136 | |
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| 137 | jr ra |
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| 138 | nop |
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| 139 | |
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| 140 | END(aligned_copy) |
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| 141 | |
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| 142 | #include "uart.s" |
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| 143 | #include "chip.s" |
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| 144 | #undef RelAddrPrintChar |
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| 145 | #undef RelAddrPrintHex32 |
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| 146 | #include "common_routines.s" |
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| 147 | #include "memc_0_client_prog.s" |
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| 148 | #include "cache_lib.s" |
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| 149 | #include "mips_libs.s" |
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| 150 | #include "memc_0_access.s" |
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