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bvbi_gsd.c

Last change on this file was 2, checked in by jglee, 11 years ago
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1	/***************************************************************************
2	* Copyright (c) 2003-2009, Broadcom Corporation
3	* All Rights Reserved
4	* Confidential Property of Broadcom Corporation
5	*
6	* THIS SOFTWARE MAY ONLY BE USED SUBJECT TO AN EXECUTED SOFTWARE LICENSE
7	* AGREEMENT BETWEEN THE USER AND BROADCOM. YOU HAVE NO RIGHT TO USE OR
8	* EXPLOIT THIS MATERIAL EXCEPT SUBJECT TO THE TERMS OF SUCH AN AGREEMENT.
9	*
10	* $brcm_Workfile: bvbi_gsd.c $
11	* $brcm_Revision: Hydra_Software_Devel/2 $
12	* $brcm_Date: 11/18/09 3:54p $
13	*
14	* Module Description:
15	*
16	* Revision History:
17	*
18	* $brcm_Log: /magnum/portinginterface/vbi/7400/bvbi_gsd.c $
19	*
20	* Hydra_Software_Devel/2 11/18/09 3:54p darnstein
21	* SW7468-24: Gemstar options now placed in dedicated data structure.
22	*
23	* Hydra_Software_Devel/1 12/3/08 8:02p darnstein
24	* PR45819:
25	*
26	***************************************************************************/
27
28	#include "bstd.h" /* standard types */
29	#include "bdbg.h" /* Dbglib */
30	#include "bkni.h" /* For critical sections */
31	#include "bvbi.h" /* VBI processing, this module. */
32	#include "bvbi_priv.h" /* VBI internal data structures */
33
34
35	BDBG_MODULE(BVBI);
36
37
38	/***************************************************************************
39	* Forward declarations of static (private) functions
40	***************************************************************************/
41
42	#ifdef BVBI_P_HAS_GSD
43	static bool P_IsOddParity (uint32_t input);
44	#endif
45
46
47	/***************************************************************************
48	* Implementation of supporting GS functions that are not in API
49	***************************************************************************/
50
51	#ifdef BVBI_P_HAS_GSD / { /
52
53	void BVBI_P_GS_Dec_Init (BREG_Handle hReg, uint32_t ulCoreOffset)
54	{
55	uint32_t ulResetReg;
56
57	BDBG_ENTER(BVBI_P_GS_Dec_Init);
58
59
60	/* Start by resetting the whole core */
61	ulResetReg = 0x1;
62	/* This BVBI_P_GS_Dec_Init can not close enable gemstar decoder now.
63	Because Gemstar decoder always enable. see pr:
64	M_BME3560B/20600: Gemstar Decoder: Gemstar decoder always enabled
65	*/
66	BKNI_EnterCriticalSection();
67	BREG_Write32 (hReg, BCHP_GSD_0_RESET + ulCoreOffset, ulResetReg);
68	BKNI_LeaveCriticalSection();
69	BDBG_LEAVE(BVBI_P_GS_Dec_Init);
70	}
71
72	BERR_Code BVBI_P_GS_Dec_Program (
73	BREG_Handle hReg,
74	BAVC_SourceId eSource,
75	bool bActive,
76	BFMT_VideoFmt eVideoFormat,
77	BVBI_GSOptions* gsOptions)
78	{
79	uint32_t ulControlReg;
80	uint32_t ulTopControlReg;
81	uint32_t ulBottomControlReg;
82	uint32_t ulTopStatusReg;
83	uint32_t ulBottomStatusReg;
84	uint32_t ulOffset;
85
86	BDBG_ENTER(BVBI_P_GS_Dec_Program);
87
88	/* Complain if video format is not supported */
89	switch (eVideoFormat)
90	{
91	case BFMT_VideoFmt_eNTSC:
92	case BFMT_VideoFmt_eNTSC_J:
93	break;
94
95	default:
96	if (bActive)
97	return BERR_TRACE (BVBI_ERR_VFMT_CONFLICT);
98	}
99
100	/* Figure out which decoder core to use */
101	switch (eSource)
102	{
103	case BAVC_SourceId_eVdec0:
104	ulOffset = 0;
105	break;
106	default:
107	/* This should never happen! This parameter was checked by
108	BVBI_Decode_Create() */
109	BDBG_LEAVE(BVBI_P_GS_Dec_Program);
110	return BERR_TRACE(BERR_INVALID_PARAMETER);
111	break;
112	}
113	/* If user wants to turn off Gemstar, just reset the entire core. */
114	if (!bActive)
115	{
116	/* This BVBI_P_GS_Dec_Init can not close enable gemstar decoder now.
117	Because Gemstar decoder always enable. see pr:
118	M_BME3560B/20600: Gemstar Decoder: Gemstar decoder always enabled
119	*/
120	BVBI_P_GS_Dec_Init (hReg, ulOffset);
121	BDBG_LEAVE(BVBI_P_GS_Dec_Program);
122	return BERR_SUCCESS;
123	}
124	BKNI_EnterCriticalSection();
125	/* get and set fields in the GSD general control register */
126	ulControlReg = BREG_Read32(hReg, BCHP_GSD_0_CONTROL + ulOffset );
127	ulControlReg &= ~(
128	BCHP_MASK (GSD_0_CONTROL, DELAY) \|
129	BCHP_MASK (GSD_0_CONTROL, CORREL_THRESH) \|
130	BCHP_MASK (GSD_0_CONTROL, CORREL_TIME_OUT) \|
131	BCHP_MASK (GSD_0_CONTROL, PARITY) \|
132	BCHP_MASK (GSD_0_CONTROL, BYTE_ORDER) );
133	ulControlReg \|= (
134	BCHP_FIELD_DATA(GSD_0_CONTROL, DELAY, 0x63) \|
135	BCHP_FIELD_DATA(GSD_0_CONTROL, CORREL_THRESH, 0x35) \|
136	BCHP_FIELD_DATA(GSD_0_CONTROL, CORREL_TIME_OUT, 0x80) \|
137	BCHP_FIELD_ENUM(GSD_0_CONTROL, PARITY, ODD) \|
138	BCHP_FIELD_ENUM(GSD_0_CONTROL, BYTE_ORDER, LOW_BYTE_FIRST) );
139	/* get and set fields in the GSD top control register */
140	ulTopControlReg = BREG_Read32(hReg, BCHP_GSD_0_FIELD0_CONTROL + ulOffset );
141	ulTopControlReg &= ~(
142	BCHP_MASK ( GSD_0_FIELD0_CONTROL, STORE) \|
143	BCHP_MASK ( GSD_0_FIELD0_CONTROL, START_LINE) \|
144	BCHP_MASK ( GSD_0_FIELD0_CONTROL, SIGNAL_THRESHOLD) \|
145	BCHP_MASK ( GSD_0_FIELD0_CONTROL, ENABLE) );
146	ulTopControlReg \|= (
147	BCHP_FIELD_DATA( GSD_0_FIELD0_CONTROL, STORE,
148	gsOptions->linemask_top) \|
149	BCHP_FIELD_DATA( GSD_0_FIELD0_CONTROL, START_LINE,
150	gsOptions->baseline_top) \|
151	BCHP_FIELD_DATA( GSD_0_FIELD0_CONTROL, SIGNAL_THRESHOLD, 0x154) \|
152	BCHP_FIELD_ENUM( GSD_0_FIELD0_CONTROL, ENABLE, ON) );
153	/* get and set fields in the GSD bottom control register */
154	ulBottomControlReg =
155	BREG_Read32(hReg, BCHP_GSD_0_FIELD1_CONTROL + ulOffset );
156	ulBottomControlReg &= ~(
157	BCHP_MASK ( GSD_0_FIELD1_CONTROL, STORE) \|
158	BCHP_MASK ( GSD_0_FIELD1_CONTROL, START_LINE) \|
159	BCHP_MASK ( GSD_0_FIELD1_CONTROL, SIGNAL_THRESHOLD) \|
160	BCHP_MASK ( GSD_0_FIELD1_CONTROL, ENABLE) );
161	ulBottomControlReg \|= (
162	BCHP_FIELD_DATA( GSD_0_FIELD1_CONTROL, STORE,
163	gsOptions->linemask_bot) \|
164	BCHP_FIELD_DATA( GSD_0_FIELD1_CONTROL, START_LINE,
165	gsOptions->baseline_bot - 256 - 7) \|
166	BCHP_FIELD_DATA( GSD_0_FIELD1_CONTROL, SIGNAL_THRESHOLD, 0x154) \|
167	BCHP_FIELD_ENUM( GSD_0_FIELD1_CONTROL, ENABLE, ON) );
168	/* write the three registers with updated values */
169	BREG_Write32 ( hReg, BCHP_GSD_0_CONTROL + ulOffset, ulControlReg );
170	BREG_Write32 (
171	hReg, BCHP_GSD_0_FIELD0_CONTROL + ulOffset, ulTopControlReg );
172	BREG_Write32 (
173	hReg, BCHP_GSD_0_FIELD1_CONTROL + ulOffset, ulBottomControlReg );
174	/* Clear the top field status bits */
175	ulTopStatusReg =
176	BREG_Read32 ( hReg, BCHP_GSD_0_FIELD0_STATUS + ulOffset );
177	BREG_Write32 (
178	hReg, BCHP_GSD_0_FIELD0_STATUS + ulOffset, ulTopStatusReg );
179	/* Clear the bottom field status bits */
180	ulBottomStatusReg =
181	BREG_Read32 ( hReg, BCHP_GSD_0_FIELD1_STATUS + ulOffset );
182	BREG_Write32 (
183	hReg, BCHP_GSD_0_FIELD1_STATUS + ulOffset, ulBottomStatusReg );
184	BKNI_LeaveCriticalSection();
185	BDBG_LEAVE(BVBI_P_GS_Dec_Program);
186	return BERR_SUCCESS;
187	}
188
189	uint32_t BVBI_P_GS_Decode_Data_isr (
190	BREG_Handle hReg,
191	BAVC_SourceId eSource,
192	BFMT_VideoFmt eVideoFormat,
193	BAVC_Polarity polarity,
194	BVBI_GSData* pGSData)
195	{
196	/*
197	Programming note: the implementation here assumes that the bitfield layout
198	within registers is the same for all Gemstar decoder cores in the chip.
199
200	If a chip is built that has multiple Gemstar decoder cores that are not
201	identical, then this routine will have to be redesigned.
202	*/
203	uint32_t ulOffset;
204	uint32_t ulFieldStatusReg;
205	uint8_t ucFieldParityErrorFlag;
206	uint16_t usRawFieldDataDetectedFlag;
207	uint16_t usFieldDataDetectedFlag;
208	uint8_t ucFieldDataOverRunFlag;
209	uint32_t ulFieldControlReg;
210	uint16_t usFieldStore;
211	uint8_t ucFieldStartLine;
212	uint8_t i;
213	uint8_t j;
214	uint32_t ulErrInfo = 0;
215	uint32_t ulRegAddr = 0;
216
217
218	BDBG_ENTER(BVBI_P_GS_Decode_Data_isr);
219
220	/* Figure out which decoder core to use */
221	switch (eSource)
222	{
223	case BAVC_SourceId_eVdec0:
224	ulOffset = 0;
225	break;
226	default:
227	/* This should never happen! This parameter was checked by
228	BVBI_Decode_Create() */
229	BDBG_LEAVE(BVBI_P_GS_Decode_data_isr);
230	return BERR_TRACE(BERR_INVALID_PARAMETER);
231	break;
232	}
233
234	/* Complain if video format is not supported */
235	switch (eVideoFormat)
236	{
237	case BFMT_VideoFmt_eNTSC:
238	case BFMT_VideoFmt_eNTSC_J:
239	break;
240
241	default:
242	return BERR_TRACE (BVBI_ERR_VFMT_CONFLICT);
243	}
244	/* If top field */
245	if (polarity == BAVC_Polarity_eTopField)
246	{
247	/* Retrieve line mask programming */
248	ulFieldControlReg =
249	BREG_Read32 (hReg, BCHP_GSD_0_FIELD0_CONTROL + ulOffset);
250	usFieldStore = BCHP_GET_FIELD_DATA (
251	ulFieldControlReg, GSD_0_FIELD0_CONTROL, STORE);
252	ucFieldStartLine = BCHP_GET_FIELD_DATA (
253	ulFieldControlReg, GSD_0_FIELD0_CONTROL, START_LINE);
254
255	/* Pull Top field status info out of the hardware */
256	ulFieldStatusReg =
257	BREG_Read32 (hReg, BCHP_GSD_0_FIELD0_STATUS + ulOffset);
258	ucFieldDataOverRunFlag =
259	BCHP_GET_FIELD_DATA(
260	ulFieldStatusReg, GSD_0_FIELD0_STATUS, DATA_OVERRUN);
261	usRawFieldDataDetectedFlag =
262	BCHP_GET_FIELD_DATA (
263	ulFieldStatusReg, GSD_0_FIELD0_STATUS, DATA_DETECTED);
264	ucFieldParityErrorFlag =
265	BCHP_GET_FIELD_DATA (
266	ulFieldStatusReg, GSD_0_FIELD0_STATUS, PARITY_ERROR);
267
268	/* Fill in user data with above info */
269	usFieldDataDetectedFlag = usRawFieldDataDetectedFlag & usFieldStore;
270	pGSData->ulDataLines =
271	(uint32_t)usFieldDataDetectedFlag << ucFieldStartLine;
272	ulRegAddr = BCHP_GSD_0_FIELD0_DATA0 + ulOffset;
273	for (i = 0; i < 5; ++i)
274	{
275	pGSData->ulData[i] = BREG_Read32(hReg, ulRegAddr);
276	ulRegAddr += 4;
277	}
278
279	/* Clear the top field status bits */
280	BREG_Write32 (
281	hReg, BCHP_GSD_0_FIELD0_STATUS + ulOffset , ulFieldStatusReg );
282	}
283	else /* bottom field */
284	{
285	/* Retrieve line mask programming */
286	ulFieldControlReg =
287	BREG_Read32 (hReg, BCHP_GSD_0_FIELD1_CONTROL + ulOffset);
288	usFieldStore = BCHP_GET_FIELD_DATA (
289	ulFieldControlReg, GSD_0_FIELD1_CONTROL, STORE);
290	ucFieldStartLine = BCHP_GET_FIELD_DATA (
291	ulFieldControlReg, GSD_0_FIELD1_CONTROL, START_LINE);
292
293	/* Pull Bottom field status info out of the hardware */
294	ulFieldStatusReg =
295	BREG_Read32( hReg, BCHP_GSD_0_FIELD1_STATUS + ulOffset);
296	ucFieldDataOverRunFlag =
297	BCHP_GET_FIELD_DATA(
298	ulFieldStatusReg, GSD_0_FIELD1_STATUS, DATA_OVERRUN);
299	usRawFieldDataDetectedFlag =
300	BCHP_GET_FIELD_DATA (
301	ulFieldStatusReg, GSD_0_FIELD1_STATUS, DATA_DETECTED);
302	ucFieldParityErrorFlag =
303	BCHP_GET_FIELD_DATA (
304	ulFieldStatusReg, GSD_0_FIELD0_STATUS, PARITY_ERROR);
305
306	/* Fill in user data with above info */
307	usFieldDataDetectedFlag = usRawFieldDataDetectedFlag & usFieldStore;
308	pGSData->ulDataLines =
309	(uint32_t)usFieldDataDetectedFlag << ucFieldStartLine;
310	ulRegAddr = BCHP_GSD_0_FIELD1_DATA0 + ulOffset;
311	for (i = 0; i < 5; ++i)
312	{
313	pGSData->ulData[i] = BREG_Read32(hReg, ulRegAddr);
314	ulRegAddr += 4;
315	}
316
317	/* Clear the Bottom field status bits */
318	BREG_Write32 (
319	hReg, BCHP_GSD_0_FIELD1_STATUS + ulOffset, ulFieldStatusReg );
320	}
321
322	/* Work around a hardware flaw. */
323	/* Compute parity "by hand." */
324	j = 0;
325	pGSData->ulErrorLines = 0x0;
326	for (i = 0 ; i < 32 ; ++i)
327	{
328	if (pGSData->ulDataLines & (1 << i))
329	{
330	if (!P_IsOddParity (pGSData->ulData[j]))
331	{
332	pGSData->ulErrorLines \|= (1 << j);
333	}
334	++j;
335	}
336	}
337
338	/* Report "no data" condition as an error */
339	if (pGSData->ulDataLines == 0)
340	{
341	ulErrInfo \|= BVBI_LINE_ERROR_GEMSTAR_NODATA;
342	}
343
344	/* Report other error conditions */
345	if ( pGSData->ulErrorLines != 0x0)
346	{
347	ulErrInfo \|= BVBI_LINE_ERROR_GEMSTAR_PARITY;
348	}
349	if ( ucFieldDataOverRunFlag ==
350	BCHP_GSD_0_FIELD0_STATUS_DATA_OVERRUN_ERROR)
351	{
352	ulErrInfo \|= BVBI_LINE_ERROR_GEMSTAR_OVERRUN;
353	}
354
355	BDBG_LEAVE(BVBI_P_GS_Decode_Data_isr);
356	return ulErrInfo;
357	}
358	#endif / } /
359
360
361	/***************************************************************************
362	* Static (private) functions
363	***************************************************************************/
364
365	#ifdef BVBI_P_HAS_GSD / { /
366
367	static bool P_IsOddParity (uint32_t input)
368	{
369	static const uint8_t parity[256] = {
370	0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
371	1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
372	1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
373	0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
374	1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
375	0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
376	0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
377	1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
378	1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
379	0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
380	0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
381	1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
382	0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
383	1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
384	1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
385	0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0
386	};
387
388	bool
389	retval = (parity[input & 0xFF] != 0);
390	input >>= 8;
391	retval = retval && (parity[input & 0xFF] != 0);
392	input >>= 8;
393	retval = retval && (parity[input & 0xFF] != 0);
394	input >>= 8;
395	retval = retval && (parity[input & 0xFF] != 0);
396
397	return retval;
398	}
399
400	#endif / } BVBI_P_HAS_GSD /

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source: svn/trunk/newcon3bcm2_21bu/magnum/portinginterface/vbi/7552/bvbi_gsd.c

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