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bvdc_display.c

Last change on this file was 2, checked in by jglee, 11 years ago
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1	/***************************************************************************
2	* Copyright (c) 2003-2012, Broadcom Corporation
3	* All Rights Reserved
4	* Confidential Property of Broadcom Corporation
5	*
6	* THIS SOFTWARE MAY ONLY BE USED SUBJECT TO AN EXECUTED SOFTWARE LICENSE
7	* AGREEMENT BETWEEN THE USER AND BROADCOM. YOU HAVE NO RIGHT TO USE OR
8	* EXPLOIT THIS MATERIAL EXCEPT SUBJECT TO THE TERMS OF SUCH AN AGREEMENT.
9	*
10	* $brcm_Workfile: bvdc_display.c $
11	* $brcm_Revision: Hydra_Software_Devel/125 $
12	* $brcm_Date: 3/21/12 1:39p $
13	*
14	* Module Description:
15	* Main module for BVDC_Display_ functions.
16	*
17	* Revision History:
18	*
19	* $brcm_Log: /magnum/portinginterface/vdc/7425/bvdc_display.c $
20	*
21	* Hydra_Software_Devel/125 3/21/12 1:39p syang
22	* SW7425-2699: put mpaa under the control of vdc resource manager; handle
23	* correctly both order of enabling/disabling mpaa and turning on/off
24	* hdmi/component output
25	*
26	* Hydra_Software_Devel/124 3/2/12 4:02p pntruong
27	* SW7231-584: Added artificial display vsync generation to support dsp
28	* transcoding.
29	*
30	* Hydra_Software_Devel/122 2/23/12 10:18a vanessah
31	* SW7425-2431: fix custom fmt stress test
32	*
33	* Hydra_Software_Devel/121 1/26/12 1:51p yuxiaz
34	* SW7425-1875, SW7125-1222: Only print out error message when
35	* BVDC_3dSourceBufferSelect setting is not
36	* BVDC_3dSourceBufferSelect_eNormal on chips having no 3d support in
37	* MFD.
38	*
39	* Hydra_Software_Devel/120 1/20/12 6:29p vanessah
40	* SW7435-9: add STG2/3 support
41	*
42	* Hydra_Software_Devel/SW7125-1124/1 1/11/12 2:58p darnstein
43	* SW7125-1124: Modify definition of BVDC_P_SUPPORT_IT_VER.
44	*
45	* Hydra_Software_Devel/118 12/13/11 5:01p yuxiaz
46	* SW7425-1875: Added support for source buffer selection in 3d mode.
47	*
48	* Hydra_Software_Devel/117 11/29/11 11:26a vanessah
49	* SW7425-1783: add user data support in VDC PI
50	*
51	* Hydra_Software_Devel/116 11/3/11 3:57p tdo
52	* SW7344-135: Video lost in Vesa format on HDMI/Component outputs when
53	* switching output formats during a playback. IT stand-alone is not
54	* working for 7344B0/7231B0
55	*
56	* Hydra_Software_Devel/115 10/27/11 4:30p syang
57	* SW7425-1429: move per vsync call back from window to display; clean up
58	* display callback description/implementation
59	*
60	* Hydra_Software_Devel/114 9/30/11 5:14p darnstein
61	* SW7400-2665: merge from JIRA branch.
62	*
63	* Hydra_Software_Devel/SW7400-2665/2 9/30/11 4:57p darnstein
64	* SW7400-2665: merge from main branch.
65	*
66	* Hydra_Software_Devel/SW7400-2665/1 9/28/11 7:26p darnstein
67	* SW7400-2665: Implement double rate 576P analog output for orthogonal
68	* VEC chipsets.
69	*
70	* Hydra_Software_Devel/113 9/29/11 4:50p tdo
71	* SW7425-980: Insure HDMI tx is always in slave mode
72	*
73	* Hydra_Software_Devel/112 9/22/11 11:01a tdo
74	* SW7425-98: Insure HDMI tx is always in slave mode
75	*
76	* Hydra_Software_Devel/111 9/8/11 10:19a syang
77	* SW7425-1265: honor back to back new setting
78	*
79	* Hydra_Software_Devel/110 8/31/11 5:39p pntruong
80	* SW7425-973: Implement bandwidth restriction for madr.
81	*
82	* Hydra_Software_Devel/109 8/30/11 3:08p syang
83	* SW7425-1170: clean up
84	*
85	* Hydra_Software_Devel/107 8/26/11 5:40p syang
86	* SW7425-1170: merge from branch SW7572-1170
87	*
88	* Hydra_Software_Devel/SW7425-1170/2 8/26/11 4:28p syang
89	* SW7425-1170: refactor all pixel aspect ratio related code
90	*
91	* Hydra_Software_Devel/SW7425-1170/1 8/24/11 6:57p vanessah
92	* SW7425-1170: ASP code clean
93	*
94	* Hydra_Software_Devel/106 8/25/11 3:55p pntruong
95	* SW7425-1191: Rollback. The acquire/release is more efficience to be
96	* handle in nexus, where the done event is already known.
97	*
98	* Hydra_Software_Devel/105 8/25/11 9:21a vanessah
99	* SW7425-1191:sg pwr management
100	*
101	* Hydra_Software_Devel/104 8/22/11 12:17p tdo
102	* SW7231-309: handling vec resource when analog is in slave mode.
103	*
104	* Hydra_Software_Devel/103 8/21/11 5:34p hongtaoz
105	* SW7425-592: removed order dependent code in display aspect ratio Set
106	* APIs;
107	*
108	* Hydra_Software_Devel/102 8/15/11 2:04p vanessah
109	* SW7425-1083: get rid of bogus setting
110	*
111	* Hydra_Software_Devel/101 8/15/11 12:48p vanessah
112	* SW7425-1083: correct indent
113	*
114	* Hydra_Software_Devel/100 8/15/11 12:26p vanessah
115	* SW7425-1083: further code optimization
116	*
117	* Hydra_Software_Devel/99 8/15/11 11:43a vanessah
118	* SW7425-1083:enable stg on create display
119	*
120	* Hydra_Software_Devel/98 8/12/11 2:55p vanessah
121	* SW7425-1083: enable STG in master mode
122	*
123	* Hydra_Software_Devel/97 8/5/11 8:25p albertl
124	* SW7425-745: Added blanking to compositor color for all outputs and all
125	* colorspaces.
126	*
127	* Hydra_Software_Devel/96 7/18/11 5:41p albertl
128	* SW7408-291: Relaxed VF filter requirements to be able to take any
129	* register array size greater than platform minimum.
130	*
131	* Hydra_Software_Devel/95 7/18/11 11:24a vanessah
132	* SW7425-835: SW7425-923: fix ViCE2 channel id bug + B0 STG
133	*
134	* Hydra_Software_Devel/94 7/11/11 5:28p albertl
135	* SW7408-291: Fixed missing call to get analog channel for error
136	* checking.
137	*
138	* Hydra_Software_Devel/93 7/11/11 2:18p tdo
139	* SW7420-1971: Video Pause seen when VEC alignment is going on. Add flag
140	* to keep BVN connected while doing alignment.
141	*
142	* Hydra_Software_Devel/92 7/11/11 1:19p albertl
143	* SW7408-291: Fixed warning.
144	*
145	* Hydra_Software_Devel/91 7/8/11 6:01p albertl
146	* SW7408-291: Updated VF filter API to use Dac enums for channel
147	* selection.
148	*
149	* Hydra_Software_Devel/90 7/8/11 3:12p yuxiaz
150	* SW7425-592: Added back display sample aspect ratio support lost due to
151	* merge.
152	*
153	* Hydra_Software_Devel/89 7/6/11 6:07p albertl
154	* SW7408-291, SW7425-745: Changed VF filter API to also take a selected
155	* display output as parameter. Added selective muting of display
156	* outputs using CSC.
157	*
158	* Hydra_Software_Devel/88 6/22/11 5:58p albertl
159	* SW7408-291: Updated interface of get vf filter API and renamed
160	* variables for clarity.
161	*
162	* Hydra_Software_Devel/86 6/17/11 2:33p albertl
163	* SW7408-291: Added interface to set and get VF filter settings.
164	*
165	* Hydra_Software_Devel/85 6/9/11 1:17p tdo
166	* SW7405-5339: BVDC_Display_Create doesn't recover from bad parameters.
167	* Fix various bugs in error handling cases.
168	*
169	* Hydra_Software_Devel/84 4/13/11 11:40a pntruong
170	* SW7231-122: Remove usage assumption as to which display can be hd.
171	*
172	* Hydra_Software_Devel/83 4/11/11 11:05a vanessah
173	* SW7425-310: change the alignment back
174	*
175	* Hydra_Software_Devel/82 4/8/11 5:26p vanessah
176	* SW7425-310: add checksum for continous custom format changes
177	*
178	* Hydra_Software_Devel/81 3/21/11 1:42p tdo
179	* SW7420-1638: DACs do not get powered down properly with certain call
180	* sequences
181	*
182	* Hydra_Software_Devel/80 1/7/11 5:13p tdo
183	* SW7125-792: Properly handle HDMI sync only
184	*
185	* Hydra_Software_Devel/79 12/30/10 10:03a pntruong
186	* SW3548-1660: Turn BVDC_Test_Display_GetInterruptName into official api
187	* BVDC_Display_GetInterruptName.
188	*
189	* Hydra_Software_Devel/78 12/20/10 3:29p pntruong
190	* SW7550-577: Returned approriate vbipath enum with invalid analog it
191	* channel.
192	*
193	* Hydra_Software_Devel/77 11/18/10 12:32p tdo
194	* SW7422-92: Add function to set display orientation. Add new dirty bit
195	* to handle 3D setting
196	*
197	* Hydra_Software_Devel/76 11/18/10 12:05a hongtaoz
198	* SW7422-13, SW7425-29: bring up dtg master mode on/off toggle; make
199	* display switch mode more robust; defer DTG reset from disable to
200	* enable to avoid timeout; bring up 656out;
201	*
202	* Hydra_Software_Devel/75 11/16/10 6:52p tdo
203	* SW7422-92: Need display 3D orientation override function for VDC
204	*
205	* Hydra_Software_Devel/74 11/16/10 4:30p hongtaoz
206	* SW7425-33: allow HD format on cmp3;
207	*
208	* Hydra_Software_Devel/73 11/15/10 10:26a vanessah
209	* SW7550-577: SCART RGB(YPbPr) and CVBS don't output at the same time.
210	*
211	* Hydra_Software_Devel/72 10/12/10 11:00a vanessah
212	* SW7550-598: Rolling back to old version
213	*
214	* Hydra_Software_Devel/71 10/12/10 10:29a vanessah
215	* SW7550-598: Add BVDC_Display_GetDisplayMasterTg
216	*
217	* Hydra_Software_Devel/70 10/4/10 5:17p hongtaoz
218	* SW7425-33: added the 4th compositor support;
219	*
220	* Hydra_Software_Devel/69 10/2/10 1:31a hongtaoz
221	* SW7425-29: adding STG support;
222	*
223	* Hydra_Software_Devel/68 10/1/10 11:14a hongtaoz
224	* SW7425-29: added explicit enable argument to the STG set API;
225	*
226	* Hydra_Software_Devel/67 9/30/10 1:24p tdo
227	* SW7550-588: Changing video format causes DACs to power down.
228	*
229	* Hydra_Software_Devel/66 9/23/10 10:32a vanessah
230	* SW7425-29: STG support for transcoding
231	*
232	* Hydra_Software_Devel/65 9/17/10 1:39p tdo
233	* SW7420-1096: undo previous check in to fix problem of no RFM output
234	* when Svideo is enabled
235	*
236	* Hydra_Software_Devel/64 9/16/10 9:51p tdo
237	* SW7420-1096: No RFM output when composite output is enabled
238	*
239	* Hydra_Software_Devel/63 9/9/10 3:15p rpan
240	* SW7550-561: Improved VEC resource management error messages.
241	*
242	* Hydra_Software_Devel/62 8/24/10 3:53p tdo
243	* SW7420-978: BVB_SAV_REMOVE is set to 3 with 704 microcode. Clean up
244	* duplicated logic.
245	*
246	* Hydra_Software_Devel/61 6/7/10 4:45p tdo
247	* SW7208-57, SW7125-248: VEC resource management fine tuning
248	*
249	* Hydra_Software_Devel/60 5/13/10 1:45p rpan
250	* SW7420-738: API BVDC_Display_SetHdmiConfiguration() enables HDMI only
251	* if it is in disabled state. Otherwise it simply adjusts CSC settings.
252	*
253	* Hydra_Software_Devel/59 5/12/10 12:13p rpan
254	* SW7420-738: Enable/disable VEC alignment as long as user request it.
255	*
256	* Hydra_Software_Devel/58 5/10/10 2:41p albertl
257	* SW7125-364: Fixed build error for 7468.
258	*
259	* Hydra_Software_Devel/57 5/7/10 7:22p albertl
260	* SW7125-364: Changed dirty bits to use union structure to avoid type-pun
261	* warnings
262	*
263	* Hydra_Software_Devel/56 4/19/10 10:26p tdo
264	* SW3548-2814: Improvements to VDC ulBlackMagic. Move
265	* BDBG_OBJECT_ID_DECLARE private header files instead of .c.
266	*
267	* Hydra_Software_Devel/55 4/7/10 5:07p darnstein
268	* SW7420-543: fix previous check in.
269	*
270	* Hydra_Software_Devel/54 4/7/10 4:08p darnstein
271	* SW7420-543: Analog 480P output is always sampled at 54Mhz.
272	*
273	* Hydra_Software_Devel/53 4/7/10 11:40a tdo
274	* SW3548-2814: Improvements to VDC ulBlackMagic. Rename TLA
275	*
276	* Hydra_Software_Devel/52 4/5/10 4:19p tdo
277	* SW3548-2814: Improvements to VDC ulBlackMagic
278	*
279	* Hydra_Software_Devel/51 2/9/10 2:09p rpan
280	* SW7400-2642: Added SECAM output for orthogonal VEC.
281	*
282	* Hydra_Software_Devel/50 1/6/10 3:41p rpan
283	* SW7468-64: Consolidate VEC modulo count trigger implementation.
284	*
285	* Hydra_Software_Devel/49 12/18/09 8:59a rpan
286	* SW3556-935: New interface for setting spread spectrum.
287	*
288	* Hydra_Software_Devel/48 11/30/09 10:34a rpan
289	* SW7468-30: Initial OSCL support.
290	*
291	* Hydra_Software_Devel/47 11/2/09 4:35p tdo
292	* SW7340-71: Flash occurs when Same Format is Set in VDC (toggling 16x9
293	* or Auto-Format.)
294	*
295	* Hydra_Software_Devel/46 10/14/09 10:39a tdo
296	* SW7405-3004: Fix coverity error
297	*
298	* Hydra_Software_Devel/45 8/24/09 3:56p rpan
299	* SW7342-27: Make analog channel 1 data structure and programming model
300	* consistent with channel 0. Enhance channel 1 handling state machine.
301	*
302	* Hydra_Software_Devel/44 8/21/09 2:34p tdo
303	* PR57734: Add capability for display to handle DACs re-assignment
304	*
305	* Hydra_Software_Devel/43 8/20/09 3:59p rpan
306	* PR57873: Disable analog path channel 1 on all chips with orthogonal VEC
307	* for now.
308	*
309	* Hydra_Software_Devel/42 8/19/09 4:17p tdo
310	* PR57734: Temp fix for 7342
311	*
312	* Hydra_Software_Devel/41 6/25/09 12:12p rpan
313	* PR56137, PR56138, PR56139, PR56166, PR56167, PR56168: Support for
314	* various orthogonal VEC configurations.
315	*
316	* Hydra_Software_Devel/40 6/9/09 3:41p rpan
317	* PR55613, PR55643: 1) Each user display settings now generates dirty
318	* bit(s). This simplifies how invalid user settings can be cleaned. 2)
319	* Moved HDMI and ITU-656 validation to per display basis. 3) Fixed the
320	* ITU-656 not enabled in slave mode issue.
321	*
322	* Hydra_Software_Devel/39 6/1/09 2:14p darnstein
323	* PR48884: prevent more crashes when user specifies bad video
324	* configuration on VEC. These changes specifically support 7420.
325	*
326	* Hydra_Software_Devel/38 4/8/09 1:59p tdo
327	* PR53373: Add HDMI deep color support
328	*
329	* Hydra_Software_Devel/37 4/7/09 9:57a tdo
330	* PR53373: Add HDMI deep color support
331	*
332	* Hydra_Software_Devel/36 3/16/09 10:55p tdo
333	* PR45785, PR45789: Merge from MCVP branch
334	*
335	* Hydra_Software_Devel/7420_mcvp/4 2/13/09 6:08p tdo
336	* PR 45785, PR 45789: merge from main branch on 2/13/09
337	*
338	* Hydra_Software_Devel/35 2/13/09 9:39a rpan
339	* PR52100: Got the user registered callback mechanism working.
340	*
341	* Hydra_Software_Devel/7420_mcvp/3 2/11/09 11:36a tdo
342	* PR 45785, PR 45789: merge from main branch on 2/11/09
343	*
344	* Hydra_Software_Devel/34 2/10/09 7:12p pntruong
345	* PR51976: [GDVR-BR] Frame Skip is happened at Analog RF. Also used
346	* vertical frequency as another condition for detecting new custom ucode
347	* loaded.
348	*
349	* Hydra_Software_Devel/7420_mcvp/2 2/9/09 7:56p darnstein
350	* PR45819: I changed the operation of BVDC_Display_GetVbiPath() to suit
351	* 7420. It now returns the identity of the IT block in use.
352	*
353	* Hydra_Software_Devel/7420_mcvp/1 2/9/09 4:33p tdo
354	* PR 45785, PR 45789: merge from main branch on 2/9/09
355	*
356	* Hydra_Software_Devel/33 2/9/09 3:34p rpan
357	* PR45804: Some clean-up work.
358	*
359	* Hydra_Software_Devel/32 2/9/09 9:01a rpan
360	* PR45804: Removed the BVDC_Display_GetItNumber() API.
361	*
362	* Hydra_Software_Devel/31 2/6/09 2:52p rpan
363	* PR45804: Added HDMI sync-only support.
364	*
365	* Hydra_Software_Devel/30 2/5/09 1:18p rpan
366	* PR45804: Added API for query which IT is assigned to the display.
367	*
368	* Hydra_Software_Devel/29 2/5/09 11:12a rpan
369	* PR45804: More work for seamless attachment of a slave path.
370	*
371	* Hydra_Software_Devel/28 2/5/09 8:50a rpan
372	* PR45804: Added the initial support for Hdmi XvYcc.
373	*
374	* Hydra_Software_Devel/27 2/4/09 3:43p rpan
375	* PR45804: Added HDMI drop-line support.
376	*
377	* Hydra_Software_Devel/26 2/3/09 9:38a rpan
378	* PR45804: Implemented another scheme of attaching DVI slave path to
379	* analog master path, which resets master path.
380	*
381	* Hydra_Software_Devel/25 1/29/09 4:49p rpan
382	* PR45804: Added support for alignment.
383	*
384	* Hydra_Software_Devel/24 1/26/09 4:21p rpan
385	* PR45804: Initial support for ITU656 output.
386	*
387	* Hydra_Software_Devel/23 1/26/09 11:28a rpan
388	* PR45804: Store user specified DVI output csc info.
389	*
390	* Hydra_Software_Devel/22 1/21/09 10:14a rpan
391	* PR45804: More HDMI output work.
392	*
393	* Hydra_Software_Devel/21 1/20/09 9:11a rpan
394	* PR45804: Initial HDMI support work.
395	*
396	* Hydra_Software_Devel/20 1/12/09 4:07p rpan
397	* PR45804: Added initial RFM output support.
398	*
399	* Hydra_Software_Devel/19 1/9/09 7:16p darnstein
400	* PR45819: Restore BVDC_Display_GetVbiPath(). This will need to be
401	* refined.
402	*
403	* Hydra_Software_Devel/18 1/9/09 2:17p rpan
404	* PR45804: Added component path MPAA support.
405	*
406	* Hydra_Software_Devel/17 12/24/08 10:22a rpan
407	* PR50391: Assign triggers according to the IT acquired. We used to hard
408	* code that.
409	*
410	* Hydra_Software_Devel/16 12/23/08 2:15p rpan
411	* PR45804: Implemented force frame drop handlers.
412	*
413	* Hydra_Software_Devel/15 12/23/08 11:43a rpan
414	* PR50391: Moved VF, CSC, SRC and SM programming to DAC event handler.
415	*
416	* Hydra_Software_Devel/14 12/23/08 10:00a rpan
417	* PR45804: Complete handlers for stream source related events.
418	*
419	* Hydra_Software_Devel/13 12/22/08 10:30p tdo
420	* PR50391: Force Timing dirty when Dac dirty
421	*
422	* Hydra_Software_Devel/12 12/22/08 3:19p rpan
423	* PR45804: Added support for display callback.
424	*
425	* Hydra_Software_Devel/11 12/22/08 12:00p rpan
426	* PR50391: Convert those not yet implemented APIs to return success for
427	* bring-up.
428	*
429	* Hydra_Software_Devel/10 12/19/08 4:34p rpan
430	* PR50391: Implemented set timebase support.
431	*
432	* Hydra_Software_Devel/9 12/19/08 3:27p rpan
433	* PR50391: Replaced assertion by error message for not yet implemented
434	* APIs.
435	*
436	* Hydra_Software_Devel/8 12/19/08 2:00p rpan
437	* PR50391: Cleaned up some comments.
438	*
439	* Hydra_Software_Devel/7 12/19/08 12:11p rpan
440	* PR50391: Diable analog chan 1. Also not use Secam_0.
441	*
442	* Hydra_Software_Devel/6 12/17/08 7:52p tdo
443	* PR50391: Add support for Analog Chan 1
444	*
445	* Hydra_Software_Devel/5 12/9/08 4:45p rpan
446	* PR45804: More orthogonal VEC support.
447	*
448	* Hydra_Software_Devel/4 12/8/08 5:44p rpan
449	* PR45804: Switched to VDC generic resource management lib.
450	*
451	* Hydra_Software_Devel/3 12/3/08 10:10p rpan
452	* PR45804: More orthogonal VEC support.
453	*
454	* Hydra_Software_Devel/2 12/3/08 4:39p rpan
455	* PR45804: Initial effort for the orthogonal VEC support.
456	*
457	* Hydra_Software_Devel/1 11/24/08 4:38p rpan
458	* PR45804: Add a 7420 specific display implementation.
459	*
460	*
461	***************************************************************************/
462	#include "bstd.h" /* standard types */
463	#include "bkni.h" /* For malloc */
464
465	#include "bvdc.h"
466	#include "bvdc_priv.h"
467	#include "bvdc_display_priv.h"
468	#include "bvdc_displayfmt_priv.h"
469	#include "bvdc_compositor_priv.h"
470	#include "bvdc_feeder_priv.h"
471
472	BDBG_MODULE(BVDC_DISP);
473
474	/*************************************************************************
475	* BVDC_Display_GetDefaultSettings
476	*
477	*************************************************************************/
478	BERR_Code BVDC_Display_GetDefaultSettings
479	( BVDC_DisplayId eDisplayId,
480	BVDC_Display_Settings *pDefSettings )
481	{
482	/* Clear out first */
483	BKNI_Memset(pDefSettings, 0, sizeof(BVDC_Display_Settings));
484
485	if(BVDC_DisplayId_eAuto == eDisplayId)
486	{
487	return BERR_TRACE(BERR_INVALID_PARAMETER);
488	}
489
490	/* default to analog master */
491	pDefSettings->eMasterTg = (BVDC_DisplayTg)(eDisplayId % BVDC_DisplayTg_eTertIt);
492
493	/* Heap NULL heap means using default main-heap. If user would like
494	* to use a separate heap then this field should set accordingly */
495	pDefSettings->hHeap = NULL;
496
497	return BERR_SUCCESS;
498	}
499
500	/*************************************************************************
501	* BVDC_Display_Create
502	*
503	* Creates a display handle. Assumes that it has not been created yet.
504	* Unlike the compositor handle, we do not know which display it is
505	* associated with until the user selects the video format.
506	*
507	*************************************************************************/
508	BERR_Code BVDC_Display_Create
509	( BVDC_Compositor_Handle hCompositor,
510	BVDC_Display_Handle *phDisplay,
511	BVDC_DisplayId eDisplayId,
512	const BVDC_Display_Settings *pDefSettings )
513	{
514	BVDC_Display_Handle hDisplay;
515	BVDC_DisplayId eId;
516	uint32_t ulSrcId;
517	BERR_Code err;
518
519
520	BDBG_ENTER(BVDC_Display_Create);
521	BDBG_ASSERT(phDisplay);
522	BSTD_UNUSED(pDefSettings);
523
524	/* Check internally if we created. */
525	BDBG_OBJECT_ASSERT(hCompositor, BVDC_CMP);
526	BDBG_OBJECT_ASSERT(hCompositor->hVdc, BVDC_VDC);
527
528	/* determine display ID */
529	if(BVDC_DisplayId_eAuto == eDisplayId)
530	{
531	eId = (BVDC_DisplayId)hCompositor->eId;
532	}
533	else
534	{
535	eId = eDisplayId;
536	}
537
538	hDisplay = hCompositor->hVdc->ahDisplay[eId];
539	BDBG_OBJECT_ASSERT(hDisplay, BVDC_DSP);
540
541	/* Check if display is created or not. */
542	if(BVDC_P_STATE_IS_ACTIVE(hDisplay) \|\|
543	BVDC_P_STATE_IS_CREATE(hDisplay) \|\|
544	BVDC_P_STATE_IS_DESTROY(hDisplay))
545	{
546	return BERR_TRACE(BVDC_ERR_DISPLAY_ALREADY_CREATED);
547	}
548
549	BDBG_MSG(("Creating display%d", hDisplay->eId));
550	BDBG_ASSERT(BVDC_P_STATE_IS_INACTIVE(hDisplay));
551
552	#if (BVDC_P_SUPPORT_STG)
553	BVDC_P_ResetStgChanInfo(&hDisplay->stStgChan);
554	#endif
555	BVDC_P_ResetDviChanInfo(&hDisplay->stDviChan);
556	BVDC_P_Reset656ChanInfo(&hDisplay->st656Chan);
557	BVDC_P_ResetAnalogChanInfo(&hDisplay->stAnlgChan_0);
558	BVDC_P_ResetAnalogChanInfo(&hDisplay->stAnlgChan_1);
559	hDisplay->bAnlgEnable = false;
560	hDisplay->stDviChan.bEnable = false;
561
562	/* determine display channel and the master timing generator */
563	if(pDefSettings)
564	{
565	/* 7420 has no restriction on which can be the master. Any of
566	* IT_0, IT_2, IT3_3, DVI_DTG, and 656_DTG can be the master.
567	*/
568	BDBG_ASSERT(pDefSettings->eMasterTg <= BVDC_DisplayTg_eStg3);
569
570	#if !BVDC_P_SUPPORT_VEC_MUXING
571	if(!hDisplay->bIsBypass &&
572	((BVDC_DisplayTg)eId != pDefSettings->eMasterTg))
573	{
574	return BERR_TRACE(BERR_INVALID_PARAMETER);
575	}
576	#endif
577	hDisplay->eMasterTg = pDefSettings->eMasterTg;
578
579	/* Select specific flavor of 480P output */
580	hDisplay->bArib480p = pDefSettings->bArib480p;
581	}
582	else
583	{
584	/* In case of auto, use one of the 3 analog master trigger */
585	hDisplay->eMasterTg = (BVDC_DisplayTg)(eId % BVDC_DisplayTg_eTertIt);
586	hDisplay->bArib480p = false;
587	}
588
589	#if (BVDC_P_SUPPORT_IT_VER >= 3)
590	/* HDMI always in slave mode */
591	if(hDisplay->eMasterTg == BVDC_DisplayTg_eDviDtg)
592	{
593	BDBG_WRN(("HDMI can no longer run in master mode. Use Analog master"));
594	hDisplay->eMasterTg = (BVDC_DisplayTg)(eId % BVDC_DisplayTg_eTertIt);
595	hDisplay->stDviChan.bEnable= true;
596	}
597	#endif
598
599	switch(hDisplay->eMasterTg)
600	{
601	case BVDC_DisplayTg_eDviDtg:
602	hDisplay->stDviChan.bEnable= true;
603	break;
604
605	#if BVDC_P_SUPPORT_ITU656_OUT
606	case BVDC_DisplayTg_e656Dtg:
607	hDisplay->st656Chan.bEnable = true;
608	break;
609	#endif
610
611	case BVDC_DisplayTg_ePrimIt:
612	case BVDC_DisplayTg_eSecIt:
613	case BVDC_DisplayTg_eTertIt:
614	hDisplay->bAnlgEnable = true;
615	break;
616
617	#if (BVDC_P_SUPPORT_STG)
618	case BVDC_DisplayTg_eStg0:
619	case BVDC_DisplayTg_eStg1:
620	case BVDC_DisplayTg_eStg2:
621	case BVDC_DisplayTg_eStg3:
622
623	if((hDisplay->eMasterTg - BVDC_DisplayTg_eStg0) > BVDC_P_NUM_SHARED_STG)
624	{
625	BDBG_ERR(("System not supported STG_%d, %d available",
626	hDisplay->eMasterTg - BVDC_DisplayTg_eStg0, BVDC_P_NUM_SHARED_STG));
627	return BERR_TRACE(BERR_INVALID_PARAMETER);
628	}
629
630	hDisplay->stStgChan.bEnable = true;
631	break;
632	#endif
633	default:
634	break;
635	}
636
637	/* Allocate modules for each enabled channel */
638
639	/* Prepare source (compositor) ID */
640	ulSrcId = (uint32_t) hCompositor->eId;
641
642	/* determine bHdCap and bSecamCap flag here */
643	hDisplay->bHdCap = (ulSrcId == BVDC_CompositorId_eCompositor0) ? true : false;
644	hDisplay->bSecamCap = ((BVDC_P_NUM_SHARED_SECAM == 0) \|\| (BVDC_P_NUM_SHARED_SECAM < BVDC_P_MAX_DISPLAY_COUNT && hDisplay->bHdCap)) ? false: true;
645
646	BKNI_EnterCriticalSection();
647	if (hDisplay->stDviChan.bEnable)
648	{
649	BDBG_MSG(("BVDC_Display_Create Display %d allocates resource for DVI", hDisplay->eId));
650	err = BVDC_P_AllocDviChanResources(hCompositor->hVdc->hResource, eId, &hDisplay->stDviChan, ulSrcId);
651
652	if (err)
653	{
654	BKNI_LeaveCriticalSection();
655	BDBG_ERR(("Failed to create display %d for HDMI output. Short of DVI block. Check hardware capability.", eId));
656	return err;
657	}
658	}
659
660	#if BVDC_P_SUPPORT_ITU656_OUT
661	if (hDisplay->st656Chan.bEnable)
662	{
663	BDBG_MSG(("BVDC_Display_Create Display %d allocates resource for 656", hDisplay->eId));
664	err = BVDC_P_Alloc656ChanResources(hCompositor->hVdc->hResource, eId, &hDisplay->st656Chan, ulSrcId);
665
666	if (err)
667	{
668	BKNI_LeaveCriticalSection();
669	BDBG_ERR(("Failed to create display %d for 656 output. Short of 656 block. Check hardware capability.", eId));
670	return err;
671	}
672	}
673	#endif
674
675	#if (BVDC_P_SUPPORT_STG)
676	if(hDisplay->stStgChan.bEnable)
677	{
678	BDBG_MSG(("BVDC_Display_Create Display %d allocates resource for STG", hDisplay->eId));
679	err = BVDC_P_AllocStgChanResources(hCompositor->hVdc->hResource, eId, &hDisplay->stStgChan);
680
681	if (err)
682	{
683	BKNI_LeaveCriticalSection();
684	BDBG_ERR(("Failed to create display %d for %s output. Short of VEC hardware block. Check hardware capability.",
685	eId, hDisplay->bHdCap ? "component/VGA" : (hDisplay->bSecamCap ? "CVBS/S-Video/RF/SECAM" : "CVBS/S-Video/RF")));
686	return err;
687	}
688	}
689	#endif
690
691	if(hDisplay->bAnlgEnable)
692	{
693	BDBG_MSG(("BVDC_Display_Create Display %d allocates resource for AnlgChan_0", hDisplay->eId));
694	err = BVDC_P_AllocITResources(hCompositor->hVdc->hResource, eId * 2, &hDisplay->stAnlgChan_0, BVDC_P_HW_ID_INVALID);
695
696	if(err)
697	{
698	BKNI_LeaveCriticalSection();
699	BDBG_ERR(("Failed to create display %d for %s output. Short of VEC hardware block. Check hardware capability.",
700	eId, hDisplay->bHdCap ? "component/VGA" : (hDisplay->bSecamCap ? "CVBS/S-Video/RF/SECAM" : "CVBS/S-Video/RF")));
701	return err;
702	}
703	}
704
705	BKNI_LeaveCriticalSection();
706
707	/* Which heap to use? */
708	hDisplay->hHeap = ((pDefSettings) && (pDefSettings->hHeap))
709	? pDefSettings->hHeap : hCompositor->hVdc->hBufferHeap;
710
711	/* link compsoitor and display */
712	hDisplay->hCompositor = hCompositor;
713	hCompositor->hDisplay = (BVDC_Display_Handle)hDisplay;
714
715	/* Reinitialize context. But not make it active until apply. */
716	BVDC_P_Display_Init(hDisplay);
717
718	/* Mark as create, awating for apply. */
719	hDisplay->eState = BVDC_P_State_eCreate;
720	*phDisplay = hDisplay;
721
722	BDBG_LEAVE(BVDC_Display_Create);
723	return BERR_SUCCESS;
724	}
725
726	/*************************************************************************
727	* BVDC_Display_Destroy
728	*************************************************************************/
729	BERR_Code BVDC_Display_Destroy
730	( BVDC_Display_Handle hDisplay )
731	{
732
733	BDBG_ENTER(BVDC_Display_Destroy);
734	BDBG_OBJECT_ASSERT(hDisplay, BVDC_DSP);
735
736	/* Return if trying to free a NULL handle or already destroyed. */
737	if(!hDisplay)
738	{
739	goto done;
740	}
741
742	if(BVDC_P_STATE_IS_DESTROY(hDisplay) \|\|
743	BVDC_P_STATE_IS_INACTIVE(hDisplay))
744	{
745	goto done;
746	}
747
748	if (BVDC_P_HW_ID_INVALID != hDisplay->stMpaaComp.ulHwId \|\|
749	BVDC_P_HW_ID_INVALID != hDisplay->stMpaaHdmi.ulHwId)
750	{
751	BDBG_ERR(("Mpaa is still enabled with display ID %d", hDisplay->eId));
752	return BERR_TRACE(BERR_LEAKED_RESOURCE);
753	}
754
755	if(BVDC_P_STATE_IS_ACTIVE(hDisplay))
756	{
757	hDisplay->eState = BVDC_P_State_eDestroy;
758	#if BVDC_P_SUPPORT_STG
759	if(BVDC_P_DISPLAY_USED_STG(hDisplay->eMasterTg))
760	hDisplay->stNewInfo.bEnableStg = false;
761	#endif
762	}
763
764	if(BVDC_P_STATE_IS_CREATE(hDisplay))
765	{
766	hDisplay->eState = BVDC_P_State_eInactive;
767	}
768
769	done:
770	BDBG_LEAVE(BVDC_Display_Destroy);
771	return BERR_SUCCESS;
772	}
773
774	/*************************************************************************
775	*
776	*/
777	BERR_Code BVDC_Display_GetDisplayId
778	( const BVDC_Display_Handle hDisplay,
779	BVDC_DisplayId *peDisplayId )
780	{
781	BDBG_ENTER(BVDC_Display_GetDisplayId);
782	BDBG_OBJECT_ASSERT(hDisplay, BVDC_DSP);
783
784	if(peDisplayId)
785	{
786	*peDisplayId = hDisplay->eId;
787	}
788
789	BDBG_LEAVE(BVDC_Display_GetDisplayId);
790	return BERR_SUCCESS;
791	}
792
793
794	/*************************************************************************
795	* BVDC_Display_GetVbiPath
796	*************************************************************************/
797	BERR_Code BVDC_Display_GetVbiPath
798	/* TODO: implement BVDC settings template logic */
799	( const BVDC_Display_Handle hDisplay,
800	BAVC_VbiPath *peVbiPath )
801	{
802	BDBG_ENTER(BVDC_Display_GetVbiPath);
803	BDBG_OBJECT_ASSERT(hDisplay, BVDC_DSP);
804
805	if(peVbiPath)
806	{
807	*peVbiPath = (BVDC_P_HW_ID_INVALID != hDisplay->stAnlgChan_0.ulIt)
808	? hDisplay->stAnlgChan_0.ulIt : BAVC_VbiPath_eUnknown;
809	}
810
811	BDBG_LEAVE(BVDC_Display_GetVbiPath);
812	return BERR_SUCCESS;
813	}
814
815	/*************************************************************************
816	* BVDC_Display_GetAnalogVbiPath
817	*************************************************************************/
818	BERR_Code BVDC_Display_GetAnalogVbiPath
819	( const BVDC_Display_Handle hDisplay,
820	BAVC_VbiPath *peVbiPath )
821	{
822	BDBG_ENTER(BVDC_Display_GetAnalogVbiPath);
823
824	BDBG_LEAVE(BVDC_Display_GetAnalogVbiPath);
825
826	BSTD_UNUSED(hDisplay);
827	BSTD_UNUSED(peVbiPath);
828	BDBG_ERR((" !!! Not supported feature!"));
829	return BERR_SUCCESS;
830	}
831
832	/*************************************************************************
833	* BVDC_Display_SetCustomVideoFormat
834	*
835	* Sets video format
836	*************************************************************************/
837	BERR_Code BVDC_Display_SetCustomVideoFormat
838	( BVDC_Display_Handle hDisplay,
839	const BFMT_VideoInfo *pFmtInfo )
840	{
841	BERR_Code eStatus = BERR_SUCCESS;
842	bool bFmtChange = false;
843	uint32_t ulCheckSum = 0;
844
845	BDBG_ENTER(BVDC_Display_SetCustomVideoFormat);
846	BDBG_OBJECT_ASSERT(hDisplay, BVDC_DSP);
847
848	/* Valid parameters */
849	if((NULL == pFmtInfo) \|\|
850	(pFmtInfo->eVideoFmt >= BFMT_VideoFmt_eMaxCount))
851	{
852	BDBG_ERR(("Invalid parameter"));
853	return BERR_TRACE(BERR_INVALID_PARAMETER);
854	}
855
856	if(pFmtInfo->eVideoFmt == BFMT_VideoFmt_eDVI_1280x768p_Red)
857	{
858	BDBG_ERR(("Format Not Supported"));
859	return BERR_TRACE(BERR_NOT_SUPPORTED);
860	}
861
862	#if (!BVDC_P_SUPPORT_VEC_SECAM)
863	if (VIDEO_FORMAT_IS_SECAM(pFmtInfo->eVideoFmt))
864	{
865	BDBG_ERR(("This chip doesn't support SECAM display"));
866	return BERR_TRACE(BERR_NOT_SUPPORTED);
867	}
868	#endif
869
870	/* Update new video format */
871	hDisplay->stNewInfo.pFmtInfo = pFmtInfo;
872	if(BVDC_P_IS_CUSTOMFMT(pFmtInfo->eVideoFmt))
873	{
874	BVDC_P_SET_CUSTOMFMT(hDisplay->stNewInfo.pFmtInfo,
875	&hDisplay->stNewInfo.stCustomFormatInfo, pFmtInfo);
876	}
877
878	hDisplay->stNewInfo.ulCheckSum = 0;
879	bFmtChange = (hDisplay->stCurInfo.pFmtInfo != pFmtInfo);
880
881	/* specificlly for custom format
882	* a simple check sum calculation*/
883	if(!bFmtChange)
884	{
885	ulCheckSum = pFmtInfo->ulWidth \|
886	pFmtInfo->ulDigitalWidth \|
887	pFmtInfo->ulHeight \|
888	pFmtInfo->ulDigitalHeight\|
889	pFmtInfo->ulVertFreq \|
890	pFmtInfo->eAspectRatio \|
891	pFmtInfo->bInterlaced;
892
893	bFmtChange = (hDisplay->stCurInfo.ulCheckSum != ulCheckSum);
894	hDisplay->stCurInfo.ulCheckSum = ulCheckSum;
895	}
896
897
898	#if BVDC_P_SUPPORT_OSCL
899	/* Certain chipsets rely on OSCL (output sclaer) within compositor to
900	* to achieve 1080p output. When in this mode, VEC is running at 1080p, but
901	* the whole BVN is configured as if the output format is 1080i.
902	* We use OSCL to convert the interlaced picture to frame then render it
903	* to VEC.
904	*/
905	if ((BFMT_VideoFmt_e1080p == pFmtInfo->eVideoFmt) \|\|
906	(BFMT_VideoFmt_e1080p_50Hz== pFmtInfo->eVideoFmt))
907	{
908	hDisplay->hCompositor->stNewInfo.pFmtInfo =
909	BFMT_GetVideoFormatInfoPtr((BFMT_VideoFmt_e1080p == pFmtInfo->eVideoFmt) ?
910	BFMT_VideoFmt_e1080i : BFMT_VideoFmt_e1080i_50Hz);
911	hDisplay->hCompositor->stNewInfo.bEnableOScl = true;
912	if((bFmtChange) \|\| (hDisplay->stNewInfo.bErrorLastSetting))
913	{
914	hDisplay->hCompositor->stNewInfo.stDirty.stBits.bOScl = BVDC_P_DIRTY;
915	}
916	hDisplay->stNewInfo.ulTriggerModuloCnt = 2;
917	}
918	else
919	{
920	hDisplay->hCompositor->stNewInfo.pFmtInfo = pFmtInfo;
921	hDisplay->hCompositor->stNewInfo.bEnableOScl = false;
922	if((bFmtChange) \|\| (hDisplay->stNewInfo.bErrorLastSetting))
923	{
924	hDisplay->hCompositor->stNewInfo.stDirty.stBits.bOScl = BVDC_P_DIRTY;
925	}
926	hDisplay->stNewInfo.ulTriggerModuloCnt = 1;
927	}
928	#else
929	hDisplay->hCompositor->stNewInfo.pFmtInfo = pFmtInfo;
930	#endif
931	hDisplay->stNewInfo.ulVertFreq = pFmtInfo->ulVertFreq;
932	if (BVDC_P_DISPLAY_USED_DIGTRIG(hDisplay->eMasterTg))
933	hDisplay->stNewInfo.ulHeight = pFmtInfo->ulDigitalHeight >> pFmtInfo->bInterlaced;
934	else
935	hDisplay->stNewInfo.ulHeight = pFmtInfo->ulHeight >> pFmtInfo->bInterlaced;
936
937	if((bFmtChange) \|\| (hDisplay->stNewInfo.bErrorLastSetting))
938	{
939	/* When setting a new video format, most stuffs like time base,
940	* DAC, etc need to be programmed.
941	*/
942	hDisplay->stNewInfo.stDirty.stBits.bTiming = BVDC_P_DIRTY;
943	hDisplay->stNewInfo.stDirty.stBits.bTimeBase = BVDC_P_DIRTY;
944	hDisplay->stNewInfo.stDirty.stBits.bDacSetting = BVDC_P_DIRTY;
945	hDisplay->stNewInfo.stDirty.stBits.b3DSetting = BVDC_P_DIRTY;
946	hDisplay->stNewInfo.stDirty.stBits.bAlignment = BVDC_P_DIRTY;
947	hDisplay->stNewInfo.stDirty.stBits.bAspRatio = BVDC_P_DIRTY;
948	if (hDisplay->bAnlgEnable)
949	{
950	hDisplay->stNewInfo.stDirty.stBits.bMpaaComp = BVDC_P_DIRTY;
951	}
952	if (hDisplay->stDviChan.bEnable)
953	{
954	hDisplay->stNewInfo.stDirty.stBits.bMpaaHdmi = BVDC_P_DIRTY;
955	}
956	}
957
958	BDBG_LEAVE(BVDC_Display_SetCustomVideoFormat);
959	return eStatus;
960	}
961
962	/*************************************************************************
963	* BVDC_Display_GetCustomVideoFormat
964	*************************************************************************/
965	const BFMT_VideoInfo* BVDC_Display_GetCustomVideoFormat
966	( const BVDC_Display_Handle hDisplay )
967	{
968	BDBG_OBJECT_ASSERT(hDisplay, BVDC_DSP);
969	return hDisplay->stCurInfo.pFmtInfo;
970	}
971
972	/*************************************************************************
973	* BVDC_Display_SetVideoFormat
974	*
975	* Sets video format
976	*************************************************************************/
977	BERR_Code BVDC_Display_SetVideoFormat
978	( BVDC_Display_Handle hDisplay,
979	BFMT_VideoFmt eVideoFormat )
980	{
981	return BVDC_Display_SetCustomVideoFormat(hDisplay,
982	BFMT_GetVideoFormatInfoPtr(eVideoFormat));
983	}
984
985	/*************************************************************************
986	* BVDC_Display_GetVideoFormat
987	*************************************************************************/
988	BERR_Code BVDC_Display_GetVideoFormat
989	( const BVDC_Display_Handle hDisplay,
990	BFMT_VideoFmt *peVideoFormat )
991	{
992	BDBG_ENTER(BVDC_Display_GetVideoFormat);
993	BDBG_OBJECT_ASSERT(hDisplay, BVDC_DSP);
994
995	if(peVideoFormat)
996	{
997	*peVideoFormat = hDisplay->stCurInfo.pFmtInfo->eVideoFmt;
998	}
999
1000	BDBG_LEAVE(BVDC_Display_GetVideoFormat);
1001	return BERR_SUCCESS;
1002	}
1003
1004	/*************************************************************************
1005	* BVDC_Display_SetDacConfiguration
1006	*
1007	* Enable Dac(s) to specific output, or disable Dac(s). Use the following
1008	* defines to identify specific Dacs:
1009	* BVDC_Dac_0
1010	* BVDC_Dac_1
1011	* BVDC_Dac_2
1012	* BVDC_Dac_3
1013	* BVDC_Dac_4
1014	* BVDC_Dac_5
1015	*
1016	* A DAC can only be used by one display at a time. A display is not using
1017	* a specifc DAC if its corresponding state is BVDC_DacOutput_eUnused.
1018	* A DAC that is unused by all displays is disabled. Initially, all DACs
1019	* are unused for all displays.
1020	*************************************************************************/
1021	BERR_Code BVDC_Display_SetDacConfiguration
1022	( BVDC_Display_Handle hDisplay,
1023	uint32_t ulDacs,
1024	BVDC_DacOutput eDacOutput )
1025	{
1026	BVDC_P_DisplayInfo *pNewInfo;
1027	BVDC_P_DisplayInfo *pCurInfo;
1028	uint32_t i;
1029
1030	BDBG_ENTER(BVDC_Display_SetDacConfiguration);
1031	BDBG_OBJECT_ASSERT(hDisplay, BVDC_DSP);
1032
1033	if(ulDacs > BVDC_Dac_0+BVDC_Dac_1+BVDC_Dac_2+BVDC_Dac_3+BVDC_Dac_4+BVDC_Dac_5+BVDC_Dac_6)
1034	{
1035	BDBG_ERR(("Invalid parameter"));
1036	return BERR_TRACE(BERR_INVALID_PARAMETER);
1037	}
1038
1039	pNewInfo = &hDisplay->stNewInfo;
1040	pCurInfo = &hDisplay->stCurInfo;
1041
1042
1043	/* Other than VDEC pass-through, bypass path does not support Dac outputs */
1044	if(hDisplay->bIsBypass && ((eDacOutput != BVDC_DacOutput_eVdec0) && (eDacOutput != BVDC_DacOutput_eUnused)))
1045	{
1046	return BVDC_ERR_INVALID_DAC_SETTINGS;
1047	}
1048
1049
1050	/* Update new outputs for each Dac */
1051	for(i=0; i < BVDC_P_MAX_DACS; i++)
1052	{
1053	if((ulDacs >> i) & 1)
1054	{
1055	pNewInfo->aDacOutput[i] = eDacOutput;
1056	if(eDacOutput != pCurInfo->aDacOutput[i] \|\| pNewInfo->bErrorLastSetting)
1057	{
1058	pNewInfo->stDirty.stBits.bDacSetting = BVDC_P_DIRTY;
1059	}
1060	}
1061	}
1062
1063	if(!hDisplay->bAnlgEnable)
1064	{
1065	if (pNewInfo->stDirty.stBits.bDacSetting == BVDC_P_DIRTY)
1066	{
1067	/* when adding a slave analog path */
1068	pNewInfo->stDirty.stBits.bTiming = BVDC_P_DIRTY;
1069	pNewInfo->stDirty.stBits.bTimeBase = BVDC_P_DIRTY;
1070	pNewInfo->stDirty.stBits.b3DSetting = BVDC_P_DIRTY;
1071	pNewInfo->stDirty.stBits.bAlignment = BVDC_P_DIRTY;
1072	}
1073	}
1074
1075	if (pNewInfo->stDirty.stBits.bDacSetting == BVDC_P_DIRTY &&
1076	pCurInfo->aulEnableMpaaDeci[BVDC_MpaaDeciIf_eComponent] &&
1077	(eDacOutput == BVDC_DacOutput_eRed \|\| eDacOutput == BVDC_DacOutput_eY \|\|
1078	eDacOutput == BVDC_DacOutput_eGreen \|\| eDacOutput == BVDC_DacOutput_ePr \|\|
1079	eDacOutput == BVDC_DacOutput_eBlue \|\| eDacOutput == BVDC_DacOutput_ePb \|\|
1080	(eDacOutput == BVDC_DacOutput_eUnused &&
1081	(hDisplay->stCurInfo.bRgb \|\| hDisplay->stCurInfo.bYPrPb))))
1082	{
1083	pNewInfo->stDirty.stBits.bMpaaComp = BVDC_P_DIRTY;
1084	}
1085
1086	BDBG_LEAVE(BVDC_Display_SetDacConfiguration);
1087	return BERR_SUCCESS;
1088	}
1089
1090	/*************************************************************************
1091	* BVDC_Display_GetDacConfiguration
1092	*
1093	* Returns a specific Dac output setting.
1094	*************************************************************************/
1095	BERR_Code BVDC_Display_GetDacConfiguration
1096	( const BVDC_Display_Handle hDisplay,
1097	uint32_t ulDac,
1098	BVDC_DacOutput *peDacOutput )
1099	{
1100	uint32_t i;
1101
1102	BDBG_ENTER(BVDC_Display_GetDacConfiguration);
1103	BDBG_OBJECT_ASSERT(hDisplay, BVDC_DSP);
1104
1105	if((!peDacOutput) \|\| (ulDac > (BVDC_Dac_6 << 1)))
1106	{
1107	BDBG_ERR(("Invalid parameter"));
1108	return BERR_TRACE(BERR_INVALID_PARAMETER);
1109	}
1110
1111	/* Get index to Dac table */
1112	for (i=0; i < BVDC_P_MAX_DACS; i++)
1113	{
1114	if((ulDac >> i) & 1)
1115	{
1116	*peDacOutput = hDisplay->stCurInfo.aDacOutput[i];
1117	break;
1118	}
1119	}
1120
1121	BDBG_LEAVE(BVDC_Display_GetDacConfiguration);
1122	return BERR_SUCCESS;
1123	}
1124
1125
1126	/*************************************************************************
1127	* BVDC_Display_SetHdmiConfiguration
1128	*************************************************************************/
1129	BERR_Code BVDC_Display_SetHdmiConfiguration
1130	( BVDC_Display_Handle hDisplay,
1131	uint32_t ulHdmi,
1132	BAVC_MatrixCoefficients eHdmiOutput )
1133	{
1134	bool bDirty;
1135
1136	BDBG_ENTER(BVDC_Display_SetHdmiConfiguration);
1137	BDBG_OBJECT_ASSERT(hDisplay, BVDC_DSP);
1138
1139	/* Check for valid parameters */
1140	if(ulHdmi != BVDC_Hdmi_0)
1141	{
1142	BDBG_ERR(("Display handle invalid"));
1143	return BERR_TRACE(BERR_INVALID_PARAMETER);
1144	}
1145
1146	bDirty = ((hDisplay->stCurInfo.eHdmiOutput != eHdmiOutput) \|\|
1147	(hDisplay->stNewInfo.bErrorLastSetting));
1148	switch(eHdmiOutput)
1149	{
1150	case BAVC_MatrixCoefficients_eUnknown:
1151	hDisplay->stNewInfo.bEnableHdmi = false;
1152	hDisplay->stNewInfo.eHdmiOutput = eHdmiOutput;
1153	if (bDirty)
1154	{
1155	hDisplay->stNewInfo.stDirty.stBits.bHdmiEnable = BVDC_P_DIRTY;
1156	if (hDisplay->stCurInfo.aulEnableMpaaDeci[BVDC_MpaaDeciIf_eHdmi])
1157	{
1158	hDisplay->stNewInfo.stDirty.stBits.bMpaaHdmi = BVDC_P_DIRTY;
1159	}
1160	}
1161	BDBG_MSG(("Display %d disables HDMI", hDisplay->eId));
1162	break;
1163
1164	default:
1165	if (!hDisplay->stCurInfo.bEnableHdmi)
1166	{
1167	/* HDMI is not yet enabled */
1168	hDisplay->stNewInfo.bEnableHdmi = true;
1169	if (bDirty)
1170	{
1171	hDisplay->stNewInfo.stDirty.stBits.bHdmiEnable = BVDC_P_DIRTY;
1172	}
1173	hDisplay->stNewInfo.eHdmiOutput = eHdmiOutput;
1174
1175	#if (!BVDC_P_SUPPORT_SEAMLESS_ATTACH)
1176	/* Reset and reprogram master path as well */
1177	if (bDirty)
1178	{
1179	hDisplay->stNewInfo.stDirty.stBits.bTiming = BVDC_P_DIRTY;
1180	hDisplay->stNewInfo.stDirty.stBits.bTimeBase = BVDC_P_DIRTY;
1181	hDisplay->stNewInfo.stDirty.stBits.bDacSetting = BVDC_P_DIRTY;
1182	hDisplay->stNewInfo.stDirty.stBits.bMpaaHdmi = BVDC_P_DIRTY;
1183	if (hDisplay->stCurInfo.bRgb \|\| hDisplay->stCurInfo.bYPrPb)
1184	{
1185	hDisplay->stNewInfo.stDirty.stBits.bMpaaComp = BVDC_P_DIRTY;
1186	}
1187	}
1188	#else
1189	if (bDirty)
1190	{
1191	hDisplay->stNewInfo.stDirty.stBits.bMpaaHdmi = BVDC_P_DIRTY;
1192	}
1193	#endif
1194	BDBG_MSG(("Display %d enables HDMI", hDisplay->eId));
1195	}
1196
1197	hDisplay->stNewInfo.eHdmiOutput = eHdmiOutput;
1198	if (bDirty)
1199	{
1200	hDisplay->stNewInfo.stDirty.stBits.bHdmiCsc = BVDC_P_DIRTY;
1201	}
1202
1203	break;
1204	}
1205
1206	BDBG_LEAVE(BVDC_Display_SetHdmiConfiguration);
1207	return BERR_SUCCESS;
1208	}
1209
1210	/*************************************************************************
1211	* BVDC_Display_GetHdmiConfiguration
1212	*
1213	* Query the HDMI output for a specific HDMI
1214	*************************************************************************/
1215	BERR_Code BVDC_Display_GetHdmiConfiguration
1216	( const BVDC_Display_Handle hDisplay,
1217	uint32_t ulHdmi,
1218	BAVC_MatrixCoefficients *peHdmiOutput )
1219	{
1220	BDBG_ENTER(BVDC_Display_GetHdmiConfiguration);
1221	BDBG_OBJECT_ASSERT(hDisplay, BVDC_DSP);
1222
1223	if(ulHdmi != BVDC_Hdmi_0)
1224	{
1225	return BERR_TRACE(BERR_INVALID_PARAMETER);
1226	}
1227
1228	if(peHdmiOutput)
1229	{
1230	*peHdmiOutput = hDisplay->stCurInfo.eHdmiOutput;
1231	}
1232
1233	BDBG_LEAVE(BVDC_Display_GetHdmiConfiguration);
1234	return BERR_SUCCESS;
1235	}
1236
1237	/*************************************************************************
1238	* BVDC_Display_SetHdmiDropLines
1239	*
1240	* Set the number of compositor video lines that Hdmi drops for a
1241	* given format.
1242	*************************************************************************/
1243	BERR_Code BVDC_Display_SetHdmiDropLines
1244	( const BVDC_Display_Handle hDisplay,
1245	uint32_t ulHdmi,
1246	BFMT_VideoFmt eVideoFormat,
1247	uint32_t ulHdmiDropLines )
1248	{
1249	BDBG_ENTER(BVDC_Display_SetHdmiDropLines);
1250	BDBG_OBJECT_ASSERT(hDisplay, BVDC_DSP);
1251
1252	if(ulHdmi != BVDC_Hdmi_0)
1253	{
1254	return BERR_TRACE(BERR_INVALID_PARAMETER);
1255	}
1256
1257	if(!VIDEO_FORMAT_SUPPORTS_DROP_LINE(eVideoFormat))
1258	{
1259	BDBG_ERR(("Dropping compositor lines is supported for this format!"));
1260	return BERR_TRACE(BERR_INVALID_PARAMETER);
1261	}
1262
1263	switch(eVideoFormat)
1264	{
1265	case BFMT_VideoFmt_eNTSC:
1266	case BFMT_VideoFmt_eNTSC_J:
1267	case BFMT_VideoFmt_eNTSC_443:
1268	case BFMT_VideoFmt_ePAL_60:
1269	case BFMT_VideoFmt_ePAL_M:
1270	if (ulHdmiDropLines > BVDC_P_480i_DROP_LINES_MAX)
1271	{
1272	BDBG_ERR(("Exceeds number of dropped lines supported by NTSC, NTSCJ, NTSC_443, and PAL_M."));
1273	return BERR_TRACE(BERR_INVALID_PARAMETER);
1274	}
1275
1276	if ((ulHdmiDropLines != 0) && (ulHdmiDropLines != 2))
1277	{
1278	BDBG_ERR(("NTSC, NTSCJ and PAL_M only support dropping of 0 or 2 lines."));
1279	return BERR_TRACE(BERR_INVALID_PARAMETER);
1280	}
1281
1282	break;
1283
1284	case BFMT_VideoFmt_e480p:
1285	if (ulHdmiDropLines > BVDC_P_480p_DROP_LINES_MAX)
1286	{
1287	BDBG_ERR(("Exceeds number of dropped lines supported by 480p."));
1288	return BERR_TRACE(BERR_INVALID_PARAMETER);
1289	}
1290	break;
1291
1292	default:
1293	/* Assert if format isn't handled yet. */
1294	BDBG_ASSERT(false);
1295	break;
1296	}
1297
1298	hDisplay->stNewInfo.aulHdmiDropLines[eVideoFormat] = ulHdmiDropLines;
1299
1300	if((hDisplay->stCurInfo.aulHdmiDropLines[eVideoFormat] != ulHdmiDropLines) \|\|
1301	(hDisplay->stNewInfo.bErrorLastSetting))
1302	{
1303	hDisplay->stNewInfo.stDirty.stBits.bHdmiDroplines = BVDC_P_DIRTY;
1304
1305	/* DTRAM instructions will have to be reloaded.
1306	*/
1307	hDisplay->stNewInfo.stDirty.stBits.bTiming = BVDC_P_DIRTY;
1308	hDisplay->stNewInfo.stDirty.stBits.bTimeBase = BVDC_P_DIRTY;
1309	hDisplay->stNewInfo.stDirty.stBits.bDacSetting = BVDC_P_DIRTY;
1310
1311	if (hDisplay->bAnlgEnable)
1312	{
1313	hDisplay->stNewInfo.stDirty.stBits.bMpaaComp = BVDC_P_DIRTY;
1314	}
1315
1316	hDisplay->stNewInfo.stDirty.stBits.bMpaaHdmi = BVDC_P_DIRTY;
1317	}
1318
1319	BDBG_LEAVE(BVDC_Display_SetHdmiDropLines);
1320	return BERR_SUCCESS;
1321	}
1322
1323	/*************************************************************************
1324	* BVDC_Display_GetHdmiDropLines
1325	*
1326	* Get the number of compositor video lines that Hdmi drops for a given
1327	* format.
1328	*************************************************************************/
1329	BERR_Code BVDC_Display_GetHdmiDropLines
1330	( const BVDC_Display_Handle hDisplay,
1331	uint32_t ulHdmi,
1332	BFMT_VideoFmt eVideoFormat,
1333	uint32_t *pulHdmiDropLines )
1334	{
1335	BDBG_ENTER(BVDC_Display_SetHdmiDropLines);
1336	BDBG_OBJECT_ASSERT(hDisplay, BVDC_DSP);
1337
1338	if(ulHdmi != BVDC_Hdmi_0)
1339	{
1340	return BERR_TRACE(BERR_INVALID_PARAMETER);
1341	}
1342
1343	if (pulHdmiDropLines)
1344	{
1345	*pulHdmiDropLines = hDisplay->stCurInfo.aulHdmiDropLines[eVideoFormat];
1346	}
1347
1348	BDBG_LEAVE(BVDC_Display_SetHdmiDropLines);
1349	return BERR_SUCCESS;
1350	}
1351
1352	/*************************************************************************
1353	*
1354	*************************************************************************/
1355	BERR_Code BVDC_Display_SetHdmiSyncOnly
1356	( const BVDC_Display_Handle hDisplay,
1357	bool bSyncOnly )
1358	{
1359	bool bCurSyncOnly;
1360
1361	BVDC_Display_GetHdmiSyncOnly(hDisplay, &bCurSyncOnly);
1362
1363	BDBG_ENTER(BVDC_Display_SetHdmiSyncOnly);
1364	BDBG_OBJECT_ASSERT(hDisplay, BVDC_DSP);
1365
1366	/* only take effect if hdmi is enable */
1367	if(hDisplay->stNewInfo.bEnableHdmi == true)
1368	{
1369	BVDC_Display_SetMuteMode(hDisplay, BVDC_DisplayOutput_eDvo,
1370	bSyncOnly ? BVDC_MuteMode_eConst : BVDC_MuteMode_eDisable);
1371	if ((bCurSyncOnly != bSyncOnly) \|\|
1372	(hDisplay->stNewInfo.bErrorLastSetting))
1373	{
1374	hDisplay->stNewInfo.stDirty.stBits.bHdmiSyncOnly = BVDC_P_DIRTY;
1375	}
1376	}
1377
1378	BDBG_LEAVE(BVDC_Display_SetHdmiSyncOnly);
1379	return BERR_SUCCESS;
1380	}
1381
1382	/*************************************************************************
1383	*
1384	*************************************************************************/
1385	BERR_Code BVDC_Display_GetHdmiSyncOnly
1386	( const BVDC_Display_Handle hDisplay,
1387	bool *pbSyncOnly )
1388	{
1389	BVDC_MuteMode eMuteMode;
1390
1391	BDBG_ENTER(BVDC_Display_GetHdmiSyncOnly);
1392	BDBG_OBJECT_ASSERT(hDisplay, BVDC_DSP);
1393
1394	if(pbSyncOnly)
1395	{
1396	BVDC_Display_GetMuteMode(hDisplay, BVDC_DisplayOutput_eDvo, &eMuteMode);
1397	*pbSyncOnly = (eMuteMode == BVDC_MuteMode_eConst) ? true : false;
1398	}
1399
1400	BDBG_LEAVE(BVDC_Display_GetHdmiSyncOnly);
1401	return BERR_SUCCESS;
1402	}
1403
1404	/*************************************************************************
1405	*
1406	*************************************************************************/
1407	BERR_Code BVDC_Display_SetHdmiXvYcc
1408	( const BVDC_Display_Handle hDisplay,
1409	bool bXvYcc )
1410	{
1411	BDBG_ENTER(BVDC_Display_SetHdmiXvYcc);
1412	BDBG_OBJECT_ASSERT(hDisplay, BVDC_DSP);
1413
1414	hDisplay->stNewInfo.bXvYcc = bXvYcc;
1415	if((hDisplay->stCurInfo.bXvYcc != bXvYcc) \|\|
1416	(hDisplay->stNewInfo.bErrorLastSetting))
1417	{
1418	hDisplay->stNewInfo.stDirty.stBits.bHdmiXvYcc = BVDC_P_DIRTY;
1419	}
1420
1421	BDBG_LEAVE(BVDC_Display_SetHdmiXvYcc);
1422	return BERR_SUCCESS;
1423	}
1424
1425	/*************************************************************************
1426	*
1427	*************************************************************************/
1428	BERR_Code BVDC_Display_GetHdmiXvYcc
1429	( const BVDC_Display_Handle hDisplay,
1430	bool *pbXvYcc )
1431	{
1432	BDBG_ENTER(BVDC_Display_GetHdmiXvYcc);
1433	BDBG_OBJECT_ASSERT(hDisplay, BVDC_DSP);
1434
1435	if(pbXvYcc)
1436	{
1437	*pbXvYcc = hDisplay->stCurInfo.bXvYcc;
1438	}
1439
1440	BDBG_LEAVE(BVDC_Display_GetHdmiXvYcc);
1441	return BERR_SUCCESS;
1442	}
1443
1444	/*************************************************************************
1445	*
1446	*************************************************************************/
1447	BERR_Code BVDC_Display_SetHdmiColorDepth
1448	( const BVDC_Display_Handle hDisplay,
1449	BAVC_HDMI_BitsPerPixel eColorDepth )
1450	{
1451	BDBG_ENTER(BVDC_Display_SetHdmiColorDepth);
1452	BDBG_OBJECT_ASSERT(hDisplay, BVDC_DSP);
1453
1454	/* Current HW only supports up to 36-bit color depth */
1455	if(eColorDepth > BAVC_HDMI_BitsPerPixel_e36bit)
1456	{
1457	return BERR_TRACE(BVDC_ERR_INVALID_HDMI_MODE);
1458	}
1459
1460	hDisplay->stNewInfo.eHdmiColorDepth = eColorDepth;
1461	if((hDisplay->stCurInfo.eHdmiColorDepth != eColorDepth) \|\|
1462	(hDisplay->stNewInfo.bErrorLastSetting))
1463	{
1464	hDisplay->stNewInfo.stDirty.stBits.bHdmiRmChanged = BVDC_P_DIRTY;
1465	}
1466
1467	BDBG_LEAVE(BVDC_Display_SetHdmiColorDepth);
1468	return BERR_SUCCESS;
1469	}
1470
1471	/*************************************************************************
1472	*
1473	*************************************************************************/
1474	BERR_Code BVDC_Display_GetHdmiColorDepth
1475	( const BVDC_Display_Handle hDisplay,
1476	BAVC_HDMI_BitsPerPixel *eColorDepth )
1477	{
1478	BDBG_ENTER(BVDC_Display_GetHdmiColorDepth);
1479	BDBG_OBJECT_ASSERT(hDisplay, BVDC_DSP);
1480
1481	if(eColorDepth)
1482	{
1483	*eColorDepth = hDisplay->stCurInfo.eHdmiColorDepth;
1484	}
1485
1486	BDBG_LEAVE(BVDC_Display_GetHdmiColorDepth);
1487	return BERR_SUCCESS;
1488	}
1489
1490	/*************************************************************************
1491	*
1492	*************************************************************************/
1493	BERR_Code BVDC_Display_SetHdmiPixelRepetition
1494	( const BVDC_Display_Handle hDisplay,
1495	BAVC_HDMI_PixelRepetition ePixelRepetition )
1496	{
1497	BDBG_ENTER(BVDC_Display_SetHdmiPixelRepetition);
1498	BDBG_OBJECT_ASSERT(hDisplay, BVDC_DSP);
1499
1500	/* Current HW only supports none, 2x and 4x pixel repetition */
1501	if(ePixelRepetition != BAVC_HDMI_PixelRepetition_eNone &&
1502	ePixelRepetition != BAVC_HDMI_PixelRepetition_e2x &&
1503	ePixelRepetition != BAVC_HDMI_PixelRepetition_e4x)
1504	{
1505	return BERR_TRACE(BVDC_ERR_INVALID_HDMI_MODE);
1506	}
1507
1508	hDisplay->stNewInfo.eHdmiPixelRepetition = ePixelRepetition;
1509	if((hDisplay->stCurInfo.eHdmiPixelRepetition != ePixelRepetition) \|\|
1510	(hDisplay->stNewInfo.bErrorLastSetting))
1511	{
1512	hDisplay->stNewInfo.stDirty.stBits.bHdmiRmChanged = BVDC_P_DIRTY;
1513	if ((BFMT_VideoFmt_e480p == hDisplay->stNewInfo.pFmtInfo->eVideoFmt) \|\|
1514	(BFMT_VideoFmt_e576p_50Hz == hDisplay->stNewInfo.pFmtInfo->eVideoFmt))
1515	{
1516	/* DTRAM microcode may have to be reloaded */
1517	hDisplay->stNewInfo.stDirty.stBits.bTiming = BVDC_P_DIRTY;
1518	hDisplay->stNewInfo.stDirty.stBits.bTimeBase = BVDC_P_DIRTY;
1519	hDisplay->stNewInfo.stDirty.stBits.bDacSetting = BVDC_P_DIRTY;
1520	}
1521	}
1522
1523	BDBG_LEAVE(BVDC_Display_SetHdmiPixelRepetition);
1524	return BERR_SUCCESS;
1525	}
1526
1527	/*************************************************************************
1528	*
1529	*************************************************************************/
1530	BERR_Code BVDC_Display_GetHdmiPixelRepetition
1531	( const BVDC_Display_Handle hDisplay,
1532	BAVC_HDMI_PixelRepetition *ePixelRepetition )
1533	{
1534	BDBG_ENTER(BVDC_Display_GetHdmiPixelRepetition);
1535	BDBG_OBJECT_ASSERT(hDisplay, BVDC_DSP);
1536
1537	if(ePixelRepetition)
1538	{
1539	*ePixelRepetition = hDisplay->stCurInfo.eHdmiPixelRepetition;
1540	}
1541
1542	BDBG_LEAVE(BVDC_Display_GetHdmiPixelRepetition);
1543	return BERR_SUCCESS;
1544	}
1545
1546	/*************************************************************************
1547	* BVDC_Display_Set656Configuration
1548	*************************************************************************/
1549	BERR_Code BVDC_Display_Set656Configuration
1550	( BVDC_Display_Handle hDisplay,
1551	uint32_t ul656Output,
1552	bool bEnable )
1553	{
1554	BDBG_ENTER(BVDC_Display_Set656Configuration);
1555
1556	#if (BVDC_P_SUPPORT_ITU656_OUT == 0)
1557	BSTD_UNUSED(hDisplay);
1558	BSTD_UNUSED(ul656Output);
1559	BSTD_UNUSED(bEnable);
1560
1561	BDBG_ERR(("This chip does not support 656 output."));
1562
1563	BDBG_LEAVE(BVDC_Display_Set656Configuration);
1564
1565	return BERR_NOT_SUPPORTED;
1566	#else
1567
1568	BDBG_OBJECT_ASSERT(hDisplay, BVDC_DSP);
1569
1570	/* Check for valid parameters */
1571	if(ul656Output != BVDC_Itur656Output_0)
1572	{
1573	return BERR_TRACE(BERR_INVALID_PARAMETER);
1574	}
1575
1576	hDisplay->stNewInfo.bEnable656 = bEnable;
1577	if((hDisplay->stCurInfo.bEnable656 != bEnable) \|\|
1578	(hDisplay->stNewInfo.bErrorLastSetting))
1579	{
1580	hDisplay->stNewInfo.stDirty.stBits.b656Enable = BVDC_P_DIRTY;
1581
1582	#if (!BVDC_P_SUPPORT_SEAMLESS_ATTACH)
1583	if (hDisplay->stNewInfo.bEnable656)
1584	{
1585	/* Reset and reprogram master path as well */
1586	hDisplay->stNewInfo.stDirty.stBits.bTiming = BVDC_P_DIRTY;
1587	hDisplay->stNewInfo.stDirty.stBits.bTimeBase = BVDC_P_DIRTY;
1588	hDisplay->stNewInfo.stDirty.stBits.bDacSetting = BVDC_P_DIRTY;
1589
1590	if (hDisplay->bAnlgEnable)
1591	{
1592	hDisplay->stNewInfo.stDirty.stBits.bMpaaComp = BVDC_P_DIRTY;
1593	}
1594
1595	if (hDisplay->stDviChan.bEnable)
1596	{
1597	hDisplay->stNewInfo.stDirty.stBits.bMpaaHdmi = BVDC_P_DIRTY;
1598	}
1599	}
1600	#endif
1601	}
1602
1603	BDBG_LEAVE(BVDC_Display_Set656Configuration);
1604
1605	return BERR_SUCCESS;
1606	#endif
1607	}
1608
1609	/*************************************************************************
1610	* BVDC_Display_Get656Configuration
1611	*************************************************************************/
1612	BERR_Code BVDC_Display_Get656Configuration
1613	( const BVDC_Display_Handle hDisplay,
1614	uint32_t ul656Output,
1615	bool *pbEnable656Output )
1616	{
1617	BDBG_ENTER(BVDC_Display_Get656Configuration);
1618
1619	#if (BVDC_P_SUPPORT_ITU656_OUT == 0)
1620	BSTD_UNUSED(hDisplay);
1621	BSTD_UNUSED(ul656Output);
1622	BSTD_UNUSED(pbEnable656Output);
1623
1624	BDBG_ERR(("This chip does not support 656 output."));
1625
1626	BDBG_LEAVE(BVDC_Display_Get656Configuration);
1627	return BERR_NOT_SUPPORTED;
1628
1629	#else
1630	BDBG_OBJECT_ASSERT(hDisplay, BVDC_DSP);
1631
1632	if(ul656Output != BVDC_Itur656Output_0)
1633	{
1634	BDBG_ERR(("Invalid parameter"));
1635	return BERR_TRACE(BERR_INVALID_PARAMETER);
1636	}
1637
1638	if(pbEnable656Output)
1639	{
1640	*pbEnable656Output = hDisplay->stCurInfo.bEnable656;
1641	}
1642
1643	BDBG_LEAVE(BVDC_Display_Get656Configuration);
1644	return BERR_SUCCESS;
1645	#endif
1646	}
1647
1648	/*************************************************************************
1649	* BVDC_Display_SetStgConfiguration
1650	*************************************************************************/
1651	BERR_Code BVDC_Display_SetStgConfiguration
1652	( BVDC_Display_Handle hDisplay,
1653	bool bEnable,
1654	const BVDC_Display_StgSettings *pStgSettings )
1655	{
1656	BDBG_ENTER(BVDC_Display_SetStgConfiguration);
1657
1658	#if (BVDC_P_SUPPORT_STG == 0)
1659	BSTD_UNUSED(hDisplay);
1660	BSTD_UNUSED(bEnable);
1661	BSTD_UNUSED(pStgSettings);
1662
1663	BDBG_ERR(("This chip does not support STG"));
1664
1665	BDBG_LEAVE(BVDC_Display_SetStgConfiguration);
1666
1667	return BERR_NOT_SUPPORTED;
1668	#else
1669	/* Check for valid parameters */
1670	if(hDisplay ==NULL)
1671	{
1672	BDBG_LEAVE(BVDC_Display_SetStgConfiguration);
1673	return BERR_TRACE(BERR_INVALID_PARAMETER);
1674	}
1675
1676	/* @@@ About to remove condition for 7425 b0 slave mode removal*/
1677	if(BVDC_P_DISPLAY_USED_STG(hDisplay->eMasterTg))
1678	{
1679	if(false == bEnable)
1680	{
1681	BDBG_ERR(("STG Master Mode cannot turn off trigger!!!"));
1682	BDBG_LEAVE(BVDC_Display_SetStgConfiguration);
1683	return BERR_TRACE(BERR_INVALID_PARAMETER);
1684	}
1685	}
1686
1687	hDisplay->stNewInfo.bEnableStg =
1688	(bEnable \|\| BVDC_P_DISPLAY_USED_STG(hDisplay->eMasterTg));
1689
1690	if(pStgSettings)
1691	{
1692	if(pStgSettings->bNonRealTime &&
1693	(!BVDC_P_DISPLAY_USED_STG(hDisplay->eMasterTg)))
1694	{
1695	BDBG_ERR(("Display %d eMasterTg=%d is not STG, cannot be non-realtime!",
1696	hDisplay->eId, hDisplay->eMasterTg));
1697	BDBG_LEAVE(BVDC_Display_SetStgConfiguration);
1698	return BERR_TRACE(BERR_INVALID_PARAMETER);
1699	}
1700
1701	hDisplay->stNewInfo.bStgNonRealTime = pStgSettings->bNonRealTime;
1702
1703	if((bEnable != hDisplay->stCurInfo.bEnableStg) \|\|
1704	(pStgSettings->bNonRealTime != hDisplay->stCurInfo.bStgNonRealTime) \|\|
1705	(hDisplay->stNewInfo.bErrorLastSetting))
1706	{
1707	hDisplay->stNewInfo.stDirty.stBits.bStgEnable = BVDC_P_DIRTY;
1708
1709	if (hDisplay->stNewInfo.bEnableStg)
1710	{
1711	/* Reset and reprogram master path as well */
1712	hDisplay->stNewInfo.stDirty.stBits.bTiming = BVDC_P_DIRTY;
1713	hDisplay->stNewInfo.stDirty.stBits.bTimeBase = BVDC_P_DIRTY;
1714	hDisplay->stNewInfo.stDirty.stBits.bDacSetting = BVDC_P_DIRTY;
1715	}
1716	}
1717	}
1718
1719	BDBG_LEAVE(BVDC_Display_SetStgConfiguration);
1720
1721	return BERR_SUCCESS;
1722	#endif
1723	}
1724
1725	/*************************************************************************
1726	* BVDC_Display_GetStgConfiguration
1727	*************************************************************************/
1728	BERR_Code BVDC_Display_GetStgConfiguration
1729	( const BVDC_Display_Handle hDisplay,
1730	bool *pbEnable,
1731	BVDC_Display_StgSettings *pStgSettings )
1732	{
1733	BDBG_ENTER(BVDC_Display_GetStgConfiguration);
1734
1735	#if (BVDC_P_SUPPORT_STG == 0)
1736	BSTD_UNUSED(hDisplay);
1737	BSTD_UNUSED(pbEnable);
1738	BSTD_UNUSED(pStgSettings);
1739
1740	BDBG_LEAVE(BVDC_Display_GetStgConfiguration);
1741	return BERR_NOT_SUPPORTED;
1742
1743	#else
1744
1745	if(hDisplay == NULL)
1746	{
1747	BDBG_ERR(("Invalid parameter"));
1748	BDBG_LEAVE(BVDC_Display_GetStgConfiguration);
1749	return BERR_TRACE(BERR_INVALID_PARAMETER);
1750	}
1751
1752	if(pbEnable)
1753	{
1754	*pbEnable = hDisplay->stCurInfo.bEnableStg;
1755	}
1756
1757	if(pStgSettings)
1758	{
1759	pStgSettings->bNonRealTime = hDisplay->stCurInfo.bStgNonRealTime;
1760	}
1761
1762	BDBG_LEAVE(BVDC_Display_GetStgConfiguration);
1763	return BERR_SUCCESS;
1764	#endif
1765	}
1766
1767
1768	/*************************************************************************
1769	* BVDC_Display_GetInterruptName
1770	*************************************************************************/
1771	BERR_Code BVDC_Display_GetInterruptName
1772	( BVDC_Display_Handle hDisplay,
1773	const BAVC_Polarity eFieldId,
1774	BINT_Id *pInterruptName )
1775	{
1776	BDBG_ENTER(BVDC_Display_GetInterruptName);
1777
1778	if (!hDisplay)
1779	{
1780	BDBG_ERR(("Invalid parameter"));
1781	return BERR_TRACE(BERR_INVALID_PARAMETER);
1782	}
1783
1784	BDBG_OBJECT_ASSERT(hDisplay->hCompositor, BVDC_CMP);
1785
1786	if(pInterruptName)
1787	{
1788	*pInterruptName = BRDC_Slot_GetIntId(
1789	hDisplay->hCompositor->ahSlot[eFieldId == BAVC_Polarity_eBotField]);
1790	}
1791
1792	BDBG_LEAVE(BVDC_Display_GetInterruptName);
1793	return BERR_SUCCESS;
1794	}
1795
1796	/*************************************************************************
1797	* BVDC_Display_SetRfmConfiguration
1798	*************************************************************************/
1799	BERR_Code BVDC_Display_SetRfmConfiguration
1800	( BVDC_Display_Handle hDisplay,
1801	uint32_t ulRfmOutput,
1802	BVDC_RfmOutput eRfmOutput,
1803	uint32_t ulConstantValue )
1804	{
1805	BDBG_ENTER(BVDC_Display_SetRfmConfiguration);
1806
1807	#if (BVDC_P_SUPPORT_RFM_OUTPUT == 0)
1808	BSTD_UNUSED(hDisplay);
1809	BSTD_UNUSED(ulRfmOutput);
1810	BSTD_UNUSED(eRfmOutput);
1811	BSTD_UNUSED(ulConstantValue);
1812
1813	BDBG_ERR(("This chip does not support RF output."));
1814	BDBG_LEAVE(BVDC_Display_SetRfmConfiguration);
1815	return BERR_NOT_SUPPORTED;
1816	#else
1817	BDBG_OBJECT_ASSERT(hDisplay, BVDC_DSP);
1818
1819	if(ulRfmOutput != BVDC_Rfm_0)
1820	{
1821	BDBG_ERR(("Invalid parameter"));
1822	return BERR_TRACE(BERR_INVALID_PARAMETER);
1823	}
1824
1825	/* Bypass path does not support Rfm */
1826	if(hDisplay->bIsBypass)
1827	{
1828	return BERR_TRACE(BVDC_ERR_INVALID_RFM_PATH);
1829	}
1830
1831	hDisplay->stNewInfo.eRfmOutput = eRfmOutput;
1832	hDisplay->stNewInfo.ulRfmConst =
1833	(eRfmOutput == BVDC_RfmOutput_eUnused) ? 0 : ulConstantValue;
1834	if((hDisplay->stCurInfo.eRfmOutput != eRfmOutput) \|\|
1835	(hDisplay->stCurInfo.ulRfmConst != ulConstantValue) \|\|
1836	(hDisplay->stNewInfo.bErrorLastSetting))
1837	{
1838	hDisplay->stNewInfo.stDirty.stBits.bRfm = BVDC_P_DIRTY;
1839	}
1840
1841	BDBG_LEAVE(BVDC_Display_SetRfmConfiguration);
1842	return BERR_SUCCESS;
1843	#endif
1844	}
1845
1846	/*************************************************************************
1847	* BVDC_Display_GetRfmConfiguration
1848	*************************************************************************/
1849	BERR_Code BVDC_Display_GetRfmConfiguration
1850	( const BVDC_Display_Handle hDisplay,
1851	uint32_t ulRfmOutput,
1852	BVDC_RfmOutput *peRfmOutput,
1853	uint32_t *pulConstantValue )
1854	{
1855	BDBG_ENTER(BVDC_Display_GetRfmConfiguration);
1856
1857	#if (BVDC_P_SUPPORT_RFM_OUTPUT == 0)
1858	BSTD_UNUSED(hDisplay);
1859	BSTD_UNUSED(ulRfmOutput);
1860	BSTD_UNUSED(peRfmOutput);
1861	BSTD_UNUSED(pulConstantValue);
1862
1863	BDBG_ERR(("This chip does not support RF output."));
1864
1865	BDBG_LEAVE(BVDC_Display_GetRfmConfiguration);
1866	return BERR_NOT_SUPPORTED;
1867	#else
1868	BDBG_OBJECT_ASSERT(hDisplay, BVDC_DSP);
1869
1870	if(ulRfmOutput != BVDC_Rfm_0)
1871	{
1872	BDBG_ERR(("Invalid parameter"));
1873	return BERR_TRACE(BERR_INVALID_PARAMETER);
1874	}
1875
1876	if(peRfmOutput)
1877	{
1878	*peRfmOutput = hDisplay->stCurInfo.eRfmOutput;
1879	}
1880
1881	if(pulConstantValue)
1882	{
1883	*pulConstantValue = hDisplay->stCurInfo.ulRfmConst;
1884	}
1885
1886	BDBG_LEAVE(BVDC_Display_GetRfmConfiguration);
1887	return BERR_SUCCESS;
1888	#endif
1889	}
1890
1891	/*************************************************************************
1892	* BVDC_Display_SetMpaa
1893	*************************************************************************/
1894	BERR_Code BVDC_Display_SetMpaaDecimation
1895	( BVDC_Display_Handle hDisplay,
1896	BVDC_MpaaDeciIf eMpaaDeciIf,
1897	uint32_t ulOutPorts,
1898	bool bEnable )
1899	{
1900	BDBG_ENTER(BVDC_Display_SetMpaaDecimation);
1901	BDBG_OBJECT_ASSERT(hDisplay, BVDC_DSP);
1902
1903	/* Bypass path does not support MPAA */
1904	if(hDisplay->bIsBypass)
1905	{
1906	return BERR_TRACE(BVDC_ERR_INVALID_MPAA_PATH);
1907	}
1908
1909	if ((BVDC_MpaaDeciIf_eUnused <= eMpaaDeciIf) \|\|
1910	((~hDisplay->aulMpaaDeciIfPortMask[eMpaaDeciIf]) & ulOutPorts))
1911	{
1912	BDBG_ERR(("Invalid parameter"));
1913	return BERR_TRACE(BERR_INVALID_PARAMETER);
1914	}
1915
1916	if (bEnable)
1917	{
1918	hDisplay->stNewInfo.aulEnableMpaaDeci[eMpaaDeciIf] \|= ulOutPorts;
1919	}
1920	else
1921	{
1922	hDisplay->stNewInfo.aulEnableMpaaDeci[eMpaaDeciIf] &= ~ulOutPorts;
1923	}
1924
1925	if((hDisplay->stCurInfo.aulEnableMpaaDeci[eMpaaDeciIf] != hDisplay->stNewInfo.aulEnableMpaaDeci[eMpaaDeciIf]) \|\|
1926	(hDisplay->stNewInfo.bErrorLastSetting))
1927	{
1928	if (BVDC_MpaaDeciIf_eComponent == eMpaaDeciIf)
1929	hDisplay->stNewInfo.stDirty.stBits.bMpaaComp = BVDC_P_DIRTY;
1930	else /* BVDC_MpaaDeciIf_eHdmi == eMpaaDeciIf */
1931	hDisplay->stNewInfo.stDirty.stBits.bMpaaHdmi = BVDC_P_DIRTY;
1932	}
1933
1934	BDBG_LEAVE(BVDC_Display_SetMpaaDecimation);
1935	return BERR_SUCCESS;
1936	}
1937
1938	/*************************************************************************
1939	* BVDC_Display_GetMpaaDecimation
1940	*************************************************************************/
1941	BERR_Code BVDC_Display_GetMpaaDecimation
1942	( const BVDC_Display_Handle hDisplay,
1943	BVDC_MpaaDeciIf eMpaaDeciIf,
1944	uint32_t ulOutPort,
1945	bool *pbEnable )
1946	{
1947	BDBG_ENTER(BVDC_Display_GetMpaaDecimation);
1948	BDBG_OBJECT_ASSERT(hDisplay, BVDC_DSP);
1949
1950	if ((BVDC_MpaaDeciIf_eUnused <= eMpaaDeciIf) \|\|
1951	((~hDisplay->aulMpaaDeciIfPortMask[eMpaaDeciIf]) & ulOutPort) \|\|
1952	(NULL == pbEnable))
1953	{
1954	BDBG_ERR(("Invalid parameter"));
1955	return BERR_TRACE(BERR_INVALID_PARAMETER);
1956	}
1957
1958	*pbEnable = hDisplay->stCurInfo.aulEnableMpaaDeci[eMpaaDeciIf] & ulOutPort;
1959
1960	BDBG_LEAVE(BVDC_Display_GetMpaaDecimation);
1961	return BERR_SUCCESS;
1962	}
1963
1964	/*************************************************************************
1965	* BVDC_Display_SetAspectRatio
1966	*************************************************************************/
1967	BERR_Code BVDC_Display_SetAspectRatio
1968	( BVDC_Display_Handle hDisplay,
1969	BFMT_AspectRatio eAspectRatio )
1970	{
1971	BDBG_ENTER(BVDC_Display_SetAspectRatio);
1972	BDBG_OBJECT_ASSERT(hDisplay, BVDC_DSP);
1973	BDBG_OBJECT_ASSERT(hDisplay->hCompositor, BVDC_CMP);
1974
1975	if(BVDC_P_IS_UNKNOWN_ASPR(eAspectRatio, 0, 0))
1976	{
1977	BDBG_WRN(("Invalid aspect ratio: %u", eAspectRatio));
1978	return BERR_TRACE(BERR_INVALID_PARAMETER);
1979	}
1980
1981	hDisplay->stNewInfo.eAspectRatio = eAspectRatio;
1982	if((hDisplay->stCurInfo.eAspectRatio != eAspectRatio) \|\|
1983	(hDisplay->stNewInfo.bErrorLastSetting))
1984	{
1985	hDisplay->stNewInfo.stDirty.stBits.bAspRatio = BVDC_P_DIRTY;
1986	}
1987
1988	BDBG_LEAVE(BVDC_Display_SetAspectRatio);
1989	return BERR_SUCCESS;
1990	}
1991
1992	/*************************************************************************
1993	* BVDC_Display_SetSampleAspectRatio
1994	*************************************************************************/
1995	BERR_Code BVDC_Display_GetSampleAspectRatio
1996	( BVDC_Display_Handle hDisplay,
1997	uint16_t *puiSampleAspectRatioX,
1998	uint16_t *puiSampleAspectRatioY )
1999	{
2000	BDBG_ENTER(BVDC_Display_GetSampleAspectRatio);
2001	BDBG_OBJECT_ASSERT(hDisplay, BVDC_DSP);
2002	BDBG_OBJECT_ASSERT(hDisplay->hCompositor, BVDC_CMP);
2003
2004	if(puiSampleAspectRatioX)
2005	{
2006	*puiSampleAspectRatioX = hDisplay->stCurInfo.uiSampleAspectRatioX;
2007	}
2008
2009	if(puiSampleAspectRatioY)
2010	{
2011	*puiSampleAspectRatioY = hDisplay->stCurInfo.uiSampleAspectRatioY;
2012	}
2013
2014	BDBG_LEAVE(BVDC_Display_GetSampleAspectRatio);
2015	return BERR_SUCCESS;
2016	}
2017
2018	/*************************************************************************
2019	* BVDC_Display_SetSampleAspectRatio
2020	*************************************************************************/
2021	BERR_Code BVDC_Display_SetSampleAspectRatio
2022	( BVDC_Display_Handle hDisplay,
2023	uint16_t uiSampleAspectRatioX,
2024	uint16_t uiSampleAspectRatioY )
2025	{
2026	BDBG_ENTER(BVDC_Display_SetSampleAspectRatio);
2027	BDBG_OBJECT_ASSERT(hDisplay, BVDC_DSP);
2028	BDBG_OBJECT_ASSERT(hDisplay->hCompositor, BVDC_CMP);
2029
2030	if(BVDC_P_IS_UNKNOWN_ASPR(BFMT_AspectRatio_eSAR,
2031	uiSampleAspectRatioX, uiSampleAspectRatioY))
2032	{
2033	BDBG_WRN(("Invalid sample aspect ratio: %u %u",
2034	uiSampleAspectRatioX, uiSampleAspectRatioY));
2035	return BERR_TRACE(BERR_INVALID_PARAMETER);
2036	}
2037
2038	hDisplay->stNewInfo.eAspectRatio = BFMT_AspectRatio_eSAR;
2039	hDisplay->stNewInfo.uiSampleAspectRatioX = uiSampleAspectRatioX;
2040	hDisplay->stNewInfo.uiSampleAspectRatioY = uiSampleAspectRatioY;
2041	if ((hDisplay->stCurInfo.eAspectRatio != BFMT_AspectRatio_eSAR) \|\|
2042	(hDisplay->stCurInfo.uiSampleAspectRatioX != uiSampleAspectRatioX) \|\|
2043	(hDisplay->stCurInfo.uiSampleAspectRatioY != uiSampleAspectRatioY) \|\|
2044	(hDisplay->stNewInfo.bErrorLastSetting))
2045	{
2046	hDisplay->stNewInfo.stDirty.stBits.bAspRatio = BVDC_P_DIRTY;
2047	}
2048
2049	BDBG_LEAVE(BVDC_Display_SetSampleAspectRatio);
2050	return BERR_SUCCESS;
2051	}
2052
2053
2054	/*************************************************************************
2055	* BVDC_Display_SetAspectRatioRectangle
2056	*************************************************************************/
2057	BERR_Code BVDC_Display_SetAspectRatioCanvasClip
2058	( BVDC_Display_Handle hDisplay,
2059	uint32_t ulLeft,
2060	uint32_t ulRight,
2061	uint32_t ulTop,
2062	uint32_t ulBottom )
2063	{
2064	BDBG_ENTER(BVDC_Display_SetAspectRatioCanvasClip);
2065	BDBG_OBJECT_ASSERT(hDisplay, BVDC_DSP);
2066	BDBG_OBJECT_ASSERT(hDisplay->hCompositor, BVDC_CMP);
2067
2068	hDisplay->stNewInfo.stAspRatRectClip.ulLeft = ulLeft;
2069	hDisplay->stNewInfo.stAspRatRectClip.ulRight = ulRight;
2070	hDisplay->stNewInfo.stAspRatRectClip.ulTop = ulTop;
2071	hDisplay->stNewInfo.stAspRatRectClip.ulBottom = ulBottom;
2072	if ((hDisplay->stCurInfo.stAspRatRectClip.ulLeft != ulLeft) \|\|
2073	(hDisplay->stCurInfo.stAspRatRectClip.ulRight != ulRight) \|\|
2074	(hDisplay->stCurInfo.stAspRatRectClip.ulTop != ulTop) \|\|
2075	(hDisplay->stCurInfo.stAspRatRectClip.ulBottom != ulBottom) \|\|
2076	(hDisplay->stNewInfo.bErrorLastSetting))
2077	{
2078	hDisplay->stNewInfo.stDirty.stBits.bAspRatio = BVDC_P_DIRTY;
2079	}
2080
2081	BDBG_LEAVE(BVDC_Display_SetAspectRatioCanvasClip);
2082	return BERR_SUCCESS;
2083	}
2084
2085	/*************************************************************************
2086	* BVDC_Display_GetAspectRatio
2087	*************************************************************************/
2088	BERR_Code BVDC_Display_GetAspectRatio
2089	( const BVDC_Display_Handle hDisplay,
2090	BFMT_AspectRatio *peAspectRatio )
2091	{
2092	BDBG_ENTER(BVDC_Display_GetAspectRatio);
2093	BDBG_OBJECT_ASSERT(hDisplay, BVDC_DSP);
2094	BDBG_OBJECT_ASSERT(hDisplay->hCompositor, BVDC_CMP);
2095
2096	if(peAspectRatio)
2097	{
2098	*peAspectRatio = hDisplay->stCurInfo.eAspectRatio;
2099	}
2100
2101	BDBG_LEAVE(BVDC_Display_GetAspectRatio);
2102	return BERR_SUCCESS;
2103	}
2104
2105	/*************************************************************************
2106	* BVDC_Display_SetForceFrameDrop
2107	*************************************************************************/
2108	BERR_Code BVDC_Display_SetForceFrameDrop
2109	( BVDC_Display_Handle hDisplay,
2110	bool bForceFrameDrop )
2111	{
2112	BDBG_ENTER(BVDC_Display_SetForceFrameDrop);
2113	BDBG_OBJECT_ASSERT(hDisplay, BVDC_DSP);
2114
2115	hDisplay->stNewInfo.bForceFrameDrop = bForceFrameDrop;
2116	if((hDisplay->stCurInfo.bForceFrameDrop != bForceFrameDrop) \|\|
2117	(hDisplay->stNewInfo.bErrorLastSetting))
2118	{
2119	hDisplay->stNewInfo.stDirty.stBits.bFrameDrop = BVDC_P_DIRTY;
2120	}
2121
2122	BDBG_LEAVE(BVDC_Display_SetForceFrameDrop);
2123	return BERR_SUCCESS;
2124	}
2125
2126	/*************************************************************************
2127	* BVDC_Display_GetForceFrameDrop
2128	*************************************************************************/
2129	BERR_Code BVDC_Display_GetForceFrameDrop
2130	( BVDC_Display_Handle hDisplay,
2131	bool *pbForceFrameDrop )
2132	{
2133	BDBG_ENTER(BVDC_Display_GetForceFrameDrop);
2134	BDBG_OBJECT_ASSERT(hDisplay, BVDC_DSP);
2135
2136	if(pbForceFrameDrop)
2137	{
2138	*pbForceFrameDrop = hDisplay->stCurInfo.bForceFrameDrop;
2139	}
2140
2141	BDBG_LEAVE(BVDC_Display_GetForceFrameDrop);
2142	return BERR_SUCCESS;
2143	}
2144
2145	/*************************************************************************
2146	* BVDC_Display_SetTimebase
2147	*************************************************************************/
2148	BERR_Code BVDC_Display_SetTimebase
2149	( BVDC_Display_Handle hDisplay,
2150	BAVC_Timebase eTimeBase )
2151	{
2152	BDBG_ENTER(BVDC_Display_SetTimebase);
2153	BDBG_OBJECT_ASSERT(hDisplay, BVDC_DSP);
2154
2155	/* Note: which timebase the bypass video 656 output is locked to is
2156	* out of control of VDC PI; it's up to the upper level software to
2157	* determine what timebase to use for vec 656 output clock by
2158	* programming CLK_MISC register and VCXO_x_RM block; */
2159	if(hDisplay->bIsBypass)
2160	{
2161	BDBG_WRN(("Application needs to program the timebase for bypass video"));
2162	return BERR_TRACE(BERR_INVALID_PARAMETER);
2163	}
2164
2165	if(eTimeBase > BAVC_Timebase_e3)
2166	{
2167	return BERR_TRACE(BERR_INVALID_PARAMETER);
2168	}
2169
2170	hDisplay->stNewInfo.eTimeBase = eTimeBase;
2171	if((hDisplay->stCurInfo.eTimeBase != eTimeBase) \|\|
2172	(hDisplay->stNewInfo.bErrorLastSetting))
2173	{
2174	hDisplay->stNewInfo.stDirty.stBits.bTimeBase = BVDC_P_DIRTY;
2175	}
2176
2177	BDBG_LEAVE(BVDC_Display_SetTimebase);
2178	return BERR_SUCCESS;
2179	}
2180
2181	/*************************************************************************
2182	* BVDC_Display_GetTimebase
2183	*************************************************************************/
2184	BERR_Code BVDC_Display_GetTimebase
2185	( const BVDC_Display_Handle hDisplay,
2186	BAVC_Timebase *peTimeBase )
2187	{
2188	BDBG_ENTER(BVDC_Display_GetTimebase);
2189	BDBG_OBJECT_ASSERT(hDisplay, BVDC_DSP);
2190
2191	/* Note: which timebase the bypass video 656 output is locked to is
2192	* out of control of VDC PI; it's up to the upper level software to
2193	* determine what timebase to use for vec 656 output clock by
2194	* programming CLK_MISC register and VCXO_x_RM block; */
2195	if(hDisplay->bIsBypass)
2196	{
2197	BDBG_ERR(("Application needs to program the timebase for bypass video"));
2198	return BERR_TRACE(BERR_INVALID_PARAMETER);
2199	}
2200
2201	if(peTimeBase)
2202	{
2203	*peTimeBase = hDisplay->stCurInfo.eTimeBase;
2204	}
2205
2206	BDBG_LEAVE(BVDC_Display_GetTimebase);
2207	return BERR_SUCCESS;
2208	}
2209
2210	/*************************************************************************
2211	* BVDC_Display_SetCallbackSettings
2212	*************************************************************************/
2213	BERR_Code BVDC_Display_SetCallbackSettings
2214	( BVDC_Display_Handle hDisplay,
2215	BVDC_Display_CallbackSettings *pSettings )
2216	{
2217	BDBG_ENTER(BVDC_Display_SetCallbackSettings);
2218	BDBG_OBJECT_ASSERT(hDisplay, BVDC_DSP);
2219
2220	if(!pSettings)
2221	{
2222	return BERR_TRACE(BERR_INVALID_PARAMETER);
2223	}
2224
2225	hDisplay->stNewInfo.stCallbackSettings.stMask = pSettings->stMask;
2226	if((hDisplay->stCurInfo.stCallbackSettings.stMask.bCrc != pSettings->stMask.bCrc) \|\|
2227	(hDisplay->stCurInfo.stCallbackSettings.stMask.bRateChange != pSettings->stMask.bRateChange) \|\|
2228	(hDisplay->stCurInfo.stCallbackSettings.stMask.bPerVsync != pSettings->stMask.bPerVsync) \|\|
2229	(hDisplay->stCurInfo.stCallbackSettings.stMask.bStgPictureId!= pSettings->stMask.bStgPictureId) \|\|
2230	(hDisplay->stNewInfo.bErrorLastSetting))
2231	{
2232	hDisplay->stNewInfo.stDirty.stBits.bCallback = BVDC_P_DIRTY;
2233	}
2234
2235	BDBG_LEAVE(BVDC_Display_SetCallbackSettings);
2236	return BERR_SUCCESS;
2237	}
2238
2239	/*************************************************************************
2240	* BVDC_Display_GetCallbackSettings
2241	*************************************************************************/
2242	BERR_Code BVDC_Display_GetCallbackSettings
2243	( BVDC_Display_Handle hDisplay,
2244	BVDC_Display_CallbackSettings *pSettings )
2245	{
2246	BDBG_ENTER(BVDC_Display_GetCallbackSettings);
2247	BDBG_OBJECT_ASSERT(hDisplay, BVDC_DSP);
2248
2249	if (pSettings)
2250	{
2251	*pSettings = hDisplay->stCurInfo.stCallbackSettings;
2252	}
2253
2254	BDBG_LEAVE(BVDC_Display_GetCallbackSettings);
2255	return BERR_SUCCESS;
2256	}
2257
2258	/*************************************************************************
2259	* BVDC_Display_InstallCallback
2260	*************************************************************************/
2261	BERR_Code BVDC_Display_InstallCallback
2262	( BVDC_Display_Handle hDisplay,
2263	const BVDC_CallbackFunc_isr pfCallback,
2264	void *pvParm1,
2265	int iParm2 )
2266	{
2267	BDBG_ENTER(BVDC_Display_InstallCallback);
2268	BDBG_OBJECT_ASSERT(hDisplay, BVDC_DSP);
2269
2270	/* Store the new infos */
2271	hDisplay->stNewInfo.pfGenericCallback = pfCallback;
2272	hDisplay->stNewInfo.pvGenericParm1 = pvParm1;
2273	hDisplay->stNewInfo.iGenericParm2 = iParm2;
2274	if((hDisplay->stCurInfo.pfGenericCallback != pfCallback) \|\|
2275	(hDisplay->stCurInfo.pvGenericParm1 != pvParm1) \|\|
2276	(hDisplay->stCurInfo.iGenericParm2 != iParm2) \|\|
2277	(hDisplay->stNewInfo.bErrorLastSetting))
2278	{
2279	hDisplay->stNewInfo.stDirty.stBits.bCallbackFunc = BVDC_P_DIRTY;
2280	}
2281
2282	BDBG_LEAVE(BVDC_Display_InstallCallback);
2283	return BERR_SUCCESS;
2284	}
2285
2286	/*************************************************************************
2287	* BVDC_Display_EnableColorCorrection
2288	*************************************************************************/
2289	BERR_Code BVDC_Display_EnableColorCorrection
2290	( BVDC_Display_Handle hDisplay,
2291	bool bEnable )
2292	{
2293	BDBG_ENTER(BVDC_Display_EnableColorCorrection);
2294
2295	BDBG_LEAVE(BVDC_Display_EnableColorCorrection);
2296
2297	BSTD_UNUSED(hDisplay);
2298	BSTD_UNUSED(bEnable);
2299
2300	BDBG_ERR((" !!! Not supported feature!"));
2301
2302	return BERR_SUCCESS;
2303	}
2304
2305	/*************************************************************************
2306	* BVDC_Display_SetColorCorrectionTable
2307	*************************************************************************/
2308	BERR_Code BVDC_Display_SetColorCorrectionTable
2309	( BVDC_Display_Handle hDisplay,
2310	uint32_t ulGammaTableId,
2311	uint32_t ulColorTempId )
2312	{
2313	BDBG_ENTER(BVDC_Display_SetColorCorrectionTable);
2314
2315	BDBG_LEAVE(BVDC_Display_SetColorCorrectionTable);
2316
2317
2318	BSTD_UNUSED(hDisplay);
2319	BSTD_UNUSED(ulGammaTableId);
2320	BSTD_UNUSED(ulColorTempId);
2321
2322	BDBG_ERR((" !!! Not supported feature!"));
2323
2324	return BERR_SUCCESS;
2325	}
2326
2327	/*************************************************************************
2328	* BVDC_Display_GetColorCorrectionTable
2329	*************************************************************************/
2330	BERR_Code BVDC_Display_GetColorCorrectionTable
2331	( const BVDC_Display_Handle hDisplay,
2332	bool *pbEnable,
2333	uint32_t *pulGammaTableId,
2334	uint32_t *pulColorTempId )
2335	{
2336
2337	BDBG_ENTER(BVDC_Display_GetColorCorrectionTable);
2338
2339	BDBG_LEAVE(BVDC_Display_GetColorCorrectionTable);
2340
2341	BSTD_UNUSED(hDisplay);
2342	BSTD_UNUSED(pbEnable);
2343	BSTD_UNUSED(pulGammaTableId);
2344	BSTD_UNUSED(pulColorTempId);
2345
2346	BDBG_ERR((" !!! Not supported feature!"));
2347
2348	return BERR_SUCCESS;
2349	}
2350
2351	/*************************************************************************
2352	* BVDC_Display_LoadColorCorrectionTable
2353	*************************************************************************/
2354	BERR_Code BVDC_Display_LoadColorCorrectionTable
2355	( BVDC_Display_Handle hDisplay,
2356	const uint32_t *pulCcbTable )
2357	{
2358	BDBG_ENTER(BVDC_Display_LoadColorCorrectionTable);
2359	BDBG_LEAVE(BVDC_Display_LoadColorCorrectionTable);
2360
2361	BSTD_UNUSED(hDisplay);
2362	BSTD_UNUSED(pulCcbTable);
2363
2364	BDBG_ERR((" !!! Not supported feature!"));
2365
2366	return BERR_SUCCESS;
2367	}
2368
2369	/*************************************************************************
2370	*
2371	*************************************************************************/
2372	BERR_Code BVDC_Display_SetDvoConfiguration
2373	( BVDC_Display_Handle hDisplay,
2374	const BVDC_Display_DvoSettings *pDvoSettings )
2375	{
2376	BVDC_P_DisplayInfo *pNewInfo;
2377	const BVDC_Display_DvoSettings *pCurDvoSettings;
2378
2379	BDBG_ENTER(BVDC_Display_SetDvoConfiguration);
2380	BDBG_OBJECT_ASSERT(hDisplay, BVDC_DSP);
2381	pNewInfo = &hDisplay->stNewInfo;
2382	pCurDvoSettings = &hDisplay->stCurInfo.stDvoCfg;
2383
2384	pNewInfo->stDvoCfg = *pDvoSettings;
2385	if((hDisplay->stCurInfo.stDvoCfg.eDePolarity != pDvoSettings->eDePolarity ) \|\|
2386	(hDisplay->stCurInfo.stDvoCfg.eHsPolarity != pDvoSettings->eHsPolarity ) \|\|
2387	(hDisplay->stCurInfo.stDvoCfg.eVsPolarity != pDvoSettings->eVsPolarity ) \|\|
2388	(hDisplay->stCurInfo.stDvoCfg.bMudEnable != pDvoSettings->bMudEnable ) \|\|
2389	(hDisplay->stCurInfo.stDvoCfg.eMudFilterMode != pDvoSettings->eMudFilterMode) \|\|
2390	(hDisplay->stCurInfo.stDvoCfg.b8BitPanel != pDvoSettings->b8BitPanel ) \|\|
2391	(hDisplay->stCurInfo.stDvoCfg.stSpreadSpectrum.bEnable != pDvoSettings->stSpreadSpectrum.bEnable) \|\|
2392	(hDisplay->stCurInfo.stDvoCfg.stSpreadSpectrum.ulFrequency != pDvoSettings->stSpreadSpectrum.ulFrequency) \|\|
2393	(hDisplay->stCurInfo.stDvoCfg.stSpreadSpectrum.ulDelta != pDvoSettings->stSpreadSpectrum.ulDelta) \|\|
2394	(hDisplay->stNewInfo.bErrorLastSetting))
2395	{
2396	/* Changes these require the DVO timing block to reconfig */
2397	hDisplay->stNewInfo.stDirty.stBits.bHdmiEnable = BVDC_P_DIRTY;
2398	hDisplay->stNewInfo.stDirty.stBits.bHdmiCsc= BVDC_P_DIRTY;
2399	}
2400
2401	BDBG_LEAVE(BVDC_Display_SetDvoConfiguration);
2402	return BERR_SUCCESS;
2403
2404	}
2405
2406	/*************************************************************************
2407	*
2408	*************************************************************************/
2409	BERR_Code BVDC_Display_GetDvoConfiguration
2410	( const BVDC_Display_Handle hDisplay,
2411	BVDC_Display_DvoSettings *pDvoSettings )
2412	{
2413	BDBG_ENTER(BVDC_Display_GetDvoConfiguration);
2414	BDBG_OBJECT_ASSERT(hDisplay, BVDC_DSP);
2415
2416	if(pDvoSettings)
2417	{
2418	*pDvoSettings = hDisplay->stCurInfo.stDvoCfg;
2419	}
2420
2421	BDBG_LEAVE(BVDC_Display_GetDvoConfiguration);
2422	return BERR_SUCCESS;
2423	}
2424
2425	/*************************************************************************
2426	*
2427	*************************************************************************/
2428	BERR_Code BVDC_Display_SetDvoAttenuationRGB
2429	( BVDC_Display_Handle hDisplay,
2430	int32_t nAttentuationR,
2431	int32_t nAttentuationG,
2432	int32_t nAttentuationB,
2433	int32_t nOffsetR,
2434	int32_t nOffsetG,
2435	int32_t nOffsetB )
2436	{
2437	int32_t ulShiftBits;
2438
2439	BDBG_ENTER(BVDC_Display_SetDvoAttenuationRGB);
2440	BDBG_OBJECT_ASSERT(hDisplay, BVDC_DSP);
2441
2442	ulShiftBits = BVDC_P_CSC_DVO_CX_F_BITS - 11;
2443
2444	hDisplay->stNewInfo.lDvoAttenuationR = nAttentuationR << ulShiftBits;
2445	hDisplay->stNewInfo.lDvoAttenuationG = nAttentuationG << ulShiftBits;
2446	hDisplay->stNewInfo.lDvoAttenuationB = nAttentuationB << ulShiftBits;
2447	hDisplay->stNewInfo.lDvoOffsetR = nOffsetR << ulShiftBits;
2448	hDisplay->stNewInfo.lDvoOffsetG = nOffsetG << ulShiftBits;
2449	hDisplay->stNewInfo.lDvoOffsetB = nOffsetB << ulShiftBits;
2450	if((hDisplay->stCurInfo.lDvoAttenuationR != nAttentuationR << ulShiftBits) \|\|
2451	(hDisplay->stCurInfo.lDvoAttenuationG != nAttentuationG << ulShiftBits) \|\|
2452	(hDisplay->stCurInfo.lDvoAttenuationB != nAttentuationB << ulShiftBits) \|\|
2453	(hDisplay->stCurInfo.lDvoOffsetR != nOffsetR << ulShiftBits) \|\|
2454	(hDisplay->stCurInfo.lDvoOffsetG != nOffsetG << ulShiftBits) \|\|
2455	(hDisplay->stCurInfo.lDvoOffsetB != nOffsetB << ulShiftBits) \|\|
2456	(hDisplay->stNewInfo.bErrorLastSetting))
2457	{
2458	hDisplay->stNewInfo.stDirty.stBits.bHdmiCsc= BVDC_P_DIRTY;
2459	}
2460
2461	BDBG_LEAVE(BVDC_Display_SetDvoAttenuationRGB);
2462	return BERR_SUCCESS;
2463	}
2464
2465	/*************************************************************************
2466	*
2467	*************************************************************************/
2468	BERR_Code BVDC_Display_GetDvoAttenuationRGB
2469	( BVDC_Display_Handle hDisplay,
2470	int32_t *plAttenuationR,
2471	int32_t *plAttenuationG,
2472	int32_t *plAttenuationB,
2473	int32_t *plOffsetR,
2474	int32_t *plOffsetG,
2475	int32_t *plOffsetB )
2476	{
2477	int32_t ulShiftBits;
2478
2479	BDBG_ENTER(BVDC_Display_GetDvoAttenuationRGB);
2480	BDBG_OBJECT_ASSERT(hDisplay, BVDC_DSP);
2481
2482	ulShiftBits = BVDC_P_CSC_DVO_CX_F_BITS - 11;
2483
2484	(*plAttenuationR) = hDisplay->stNewInfo.lDvoAttenuationR >> ulShiftBits;
2485	(*plAttenuationG) = hDisplay->stNewInfo.lDvoAttenuationG >> ulShiftBits;
2486	(*plAttenuationB) = hDisplay->stNewInfo.lDvoAttenuationB >> ulShiftBits;
2487	(*plOffsetR) = hDisplay->stNewInfo.lDvoOffsetR >> ulShiftBits;
2488	(*plOffsetG) = hDisplay->stNewInfo.lDvoOffsetG >> ulShiftBits;
2489	(*plOffsetB) = hDisplay->stNewInfo.lDvoOffsetB >> ulShiftBits;
2490
2491	BDBG_LEAVE(BVDC_Display_GetDvoAttenuationRGB);
2492	return BERR_SUCCESS;
2493	}
2494
2495	/***************************************************************************
2496	*
2497	*/
2498	BERR_Code BVDC_Display_SetDvoColorMatrix
2499	( BVDC_Display_Handle hDisplay,
2500	bool bOverride,
2501	const int32_t pl32_Matrix[BVDC_CSC_COEFF_COUNT],
2502	uint32_t ulShift )
2503	{
2504	BDBG_ENTER(BVDC_Display_SetDvoColorMatrix);
2505	BDBG_OBJECT_ASSERT(hDisplay, BVDC_DSP);
2506
2507	/* set new values */
2508	hDisplay->stNewInfo.bUserCsc = bOverride;
2509	if(bOverride)
2510	{
2511	uint32_t ulIndex;
2512	hDisplay->stNewInfo.ulUserShift = ulShift;
2513	for(ulIndex = 0; ulIndex < BVDC_CSC_COEFF_COUNT; ulIndex++)
2514	{
2515	hDisplay->stNewInfo.pl32_Matrix[ulIndex] = pl32_Matrix[ulIndex];
2516	}
2517	}
2518
2519	/* Set display dirty bit */
2520	hDisplay->stNewInfo.stDirty.stBits.bHdmiCsc = BVDC_P_DIRTY;
2521
2522	BDBG_LEAVE(BVDC_Display_SetDvoColorMatrix);
2523	return BERR_SUCCESS;
2524	}
2525
2526	/***************************************************************************
2527	*
2528	*/
2529	BERR_Code BVDC_Display_GetDvoColorMatrix
2530	( BVDC_Display_Handle hDisplay,
2531	bool *pbOverride,
2532	int32_t pl32_Matrix[BVDC_CSC_COEFF_COUNT],
2533	uint32_t *pulShift )
2534	{
2535	BDBG_ENTER(BVDC_Display_GetDvoColorMatrix);
2536	BDBG_OBJECT_ASSERT(hDisplay, BVDC_DSP);
2537
2538	if(pbOverride)
2539	{
2540	*pbOverride = hDisplay->stCurInfo.bUserCsc;
2541	}
2542
2543	if(hDisplay->stCurInfo.bUserCsc)
2544	{
2545	uint32_t ulIndex;
2546	for(ulIndex = 0; ulIndex < BVDC_CSC_COEFF_COUNT; ulIndex++)
2547	{
2548	pl32_Matrix[ulIndex] = hDisplay->stCurInfo.pl32_Matrix[ulIndex];
2549	}
2550
2551	if(pulShift)
2552	{
2553	*pulShift = hDisplay->stCurInfo.ulUserShift;
2554	}
2555	}
2556	else
2557	{
2558	BKNI_EnterCriticalSection();
2559	BVDC_P_Csc_ToMatrix_isr(pl32_Matrix, &hDisplay->stDvoCscMatrix.stCscCoeffs,
2560	BVDC_P_FIX_POINT_SHIFT);
2561	BKNI_LeaveCriticalSection();
2562
2563	if(pulShift)
2564	{
2565	*pulShift = BVDC_P_FIX_POINT_SHIFT;
2566	}
2567	}
2568
2569	BDBG_LEAVE(BVDC_Display_GetDvoColorMatrix);
2570	return BERR_SUCCESS;
2571
2572	}
2573
2574	/***************************************************************************
2575	*
2576	*/
2577	BERR_Code BVDC_Display_SetAlignment
2578	( BVDC_Display_Handle hDisplay,
2579	BVDC_Display_Handle hTargetDisplay,
2580	const BVDC_Display_AlignmentSettings *pAlignSettings )
2581	{
2582	BDBG_ENTER(BVDC_Display_SetAlignment);
2583	BDBG_OBJECT_ASSERT(hDisplay, BVDC_DSP);
2584
2585
2586	/* VEC alignment is per user request. As long as hTargetDisplay and
2587	* pAlignSettings are not NULL we will start alignment process.
2588	*/
2589
2590	/* set new values */
2591	if(hTargetDisplay && pAlignSettings)
2592	{
2593	hDisplay->stNewInfo.hTargetDisplay = hTargetDisplay;
2594	hDisplay->stNewInfo.stAlignCfg = *pAlignSettings;
2595	}
2596	else
2597	{
2598	hDisplay->stNewInfo.hTargetDisplay = NULL;
2599	}
2600
2601	/* Set display dirty bit */
2602	hDisplay->stNewInfo.stDirty.stBits.bAlignment = BVDC_P_DIRTY;
2603
2604	BDBG_LEAVE(BVDC_Display_SetAlignment);
2605	return BERR_SUCCESS;
2606	}
2607
2608	/***************************************************************************
2609	*
2610	*/
2611	BERR_Code BVDC_Display_GetAlignment
2612	( const BVDC_Display_Handle hDisplay,
2613	BVDC_Display_Handle *phTargetDisplay,
2614	BVDC_Display_AlignmentSettings *pAlignSettings )
2615	{
2616	BDBG_ENTER(BVDC_Display_GetAlignment);
2617	BDBG_OBJECT_ASSERT(hDisplay, BVDC_DSP);
2618
2619	/* set new values */
2620	if(pAlignSettings)
2621	{
2622	*pAlignSettings = hDisplay->stCurInfo.stAlignCfg;
2623	}
2624
2625	if(phTargetDisplay)
2626	{
2627	*phTargetDisplay = hDisplay->stNewInfo.hTargetDisplay;
2628	}
2629
2630	BDBG_LEAVE(BVDC_Display_GetAlignment);
2631	return BERR_SUCCESS;
2632	}
2633
2634	/***************************************************************************
2635	*
2636	*/
2637	BERR_Code BVDC_Display_SetOrientation
2638	( const BVDC_Display_Handle hDisplay,
2639	BFMT_Orientation eOrientation )
2640	{
2641	BDBG_ENTER(BVDC_Display_SetOrientation);
2642	BDBG_OBJECT_ASSERT(hDisplay, BVDC_DSP);
2643
2644	hDisplay->stNewInfo.eOrientation = eOrientation;
2645	hDisplay->hCompositor->stNewInfo.eOrientation = eOrientation;
2646	if((hDisplay->stCurInfo.eOrientation != eOrientation) \|\|
2647	(hDisplay->stNewInfo.bErrorLastSetting))
2648	{
2649	hDisplay->stNewInfo.stDirty.stBits.b3DSetting = BVDC_P_DIRTY;
2650	}
2651
2652	BDBG_LEAVE(BVDC_Display_SetOrientation);
2653	return BERR_SUCCESS;
2654	}
2655
2656	/***************************************************************************
2657	*
2658	*/
2659	BERR_Code BVDC_Display_GetOrientation
2660	( const BVDC_Display_Handle hDisplay,
2661	BFMT_Orientation *peOrientation )
2662	{
2663	BDBG_ENTER(BVDC_Display_GetOrientation);
2664	BDBG_OBJECT_ASSERT(hDisplay, BVDC_DSP);
2665
2666	if(peOrientation)
2667	{
2668	*peOrientation = hDisplay->stCurInfo.eOrientation;
2669	}
2670
2671	BDBG_LEAVE(BVDC_Display_GetOrientation);
2672	return BERR_SUCCESS;
2673	}
2674
2675
2676	/***************************************************************************
2677	*
2678	*/
2679	BERR_Code BVDC_Display_Set3dSourceBufferSelect
2680	( const BVDC_Display_Handle hDisplay,
2681	BVDC_3dSourceBufferSelect e3dSrcBufSel )
2682	{
2683	BDBG_ENTER(BVDC_Display_Set3dSourceBufferSelect);
2684	BDBG_OBJECT_ASSERT(hDisplay, BVDC_DSP);
2685
2686	#if (!BVDC_P_MFD_SUPPORT_3D_VIDEO)
2687	if(e3dSrcBufSel != BVDC_3dSourceBufferSelect_eNormal)
2688	{
2689	BDBG_ERR(("3D video is not supported!"));
2690	}
2691	#endif
2692
2693	hDisplay->stNewInfo.e3dSrcBufSel = e3dSrcBufSel;
2694	if((hDisplay->stCurInfo.e3dSrcBufSel != e3dSrcBufSel) \|\|
2695	(hDisplay->stNewInfo.bErrorLastSetting))
2696	{
2697	hDisplay->stNewInfo.stDirty.stBits.b3DSetting = BVDC_P_DIRTY;
2698	}
2699
2700	BDBG_LEAVE(BVDC_Display_Set3dSourceBufferSelect);
2701	return BERR_SUCCESS;
2702	}
2703
2704
2705	/***************************************************************************
2706	*
2707	*/
2708	BERR_Code BVDC_Display_Get3dSourceBufferSelect
2709	( const BVDC_Display_Handle hDisplay,
2710	BVDC_3dSourceBufferSelect *pe3dSrcBufSel )
2711	{
2712	BDBG_ENTER(BVDC_Display_Get3dSourceBufferSelect);
2713	BDBG_OBJECT_ASSERT(hDisplay, BVDC_DSP);
2714
2715	if(pe3dSrcBufSel)
2716	{
2717	*pe3dSrcBufSel = hDisplay->stCurInfo.e3dSrcBufSel;
2718	}
2719
2720	BDBG_LEAVE(BVDC_Display_Get3dSourceBufferSelect);
2721	return BERR_SUCCESS;
2722	}
2723
2724	/***************************************************************************
2725	*
2726	*/
2727	BERR_Code BVDC_Display_SetVfFilter
2728	( BVDC_Display_Handle hDisplay,
2729	BVDC_DisplayOutput eDisplayOutput,
2730	BVDC_DacOutput eDacOutput,
2731	bool bOverride,
2732	uint32_t *paulFilterRegs,
2733	uint32_t ulNumFilterRegs )
2734	{
2735	uint32_t *paulUserVfFilter = NULL;
2736	int32_t lChannel;
2737
2738	BDBG_ENTER(BVDC_Display_SetVfFilter);
2739	BDBG_OBJECT_ASSERT(hDisplay, BVDC_DSP);
2740
2741	if((eDisplayOutput != BVDC_DisplayOutput_eComponent) &&
2742	(eDisplayOutput != BVDC_DisplayOutput_eComposite) &&
2743	(eDisplayOutput != BVDC_DisplayOutput_eSVideo))
2744	{
2745	BDBG_ERR(("VF filter can only be set on Component, Cvbs, or Svideo outputs."));
2746	return BERR_INVALID_PARAMETER;
2747	}
2748
2749	if (!BVDC_P_DISP_IS_VALID_DISPOUTPUT_AND_DAC(eDispOutput, eDacOutput))
2750	{
2751	BDBG_ERR(("Invalid display output and dac output combination."));
2752	return BERR_INVALID_PARAMETER;
2753	}
2754
2755	lChannel = BVDC_P_DISP_GET_VF_CH_FROM_DAC(eDacOutput);
2756
2757	if (lChannel == BVDC_P_DISP_INVALID_VF_CH)
2758	{
2759	BDBG_ERR(("Invalid VF channel."));
2760	return BERR_INVALID_PARAMETER;
2761	}
2762
2763	/* set new values */
2764	if ((eDisplayOutput == BVDC_DisplayOutput_eComposite) \|\|
2765	(eDisplayOutput == BVDC_DisplayOutput_eSVideo))
2766	{
2767	hDisplay->stNewInfo.abUserVfFilterCvbs[lChannel] = bOverride;
2768	paulUserVfFilter = (uint32_t *)hDisplay->stNewInfo.aaulUserVfFilterCvbs[lChannel];
2769	}
2770	else if (eDisplayOutput == BVDC_DisplayOutput_eComponent)
2771	{
2772	hDisplay->stNewInfo.abUserVfFilterCo[lChannel] = bOverride;
2773	paulUserVfFilter = (uint32_t *)hDisplay->stNewInfo.aaulUserVfFilterCo[lChannel];
2774	}
2775
2776	if(bOverride)
2777	{
2778	if (ulNumFilterRegs < BVDC_P_CHROMA_TABLE_SIZE)
2779	{
2780	BDBG_ERR(("Incorrect VF filter table size %d. Table size should be %d or greater for this platform. ", ulNumFilterRegs, BVDC_P_CHROMA_TABLE_SIZE));
2781	return BERR_INVALID_PARAMETER;
2782	}
2783
2784	BKNI_Memcpy(paulUserVfFilter, paulFilterRegs, BVDC_P_CHROMA_TABLE_SIZE * sizeof(uint32_t));
2785	}
2786
2787	/* Set display dirty bit */
2788	hDisplay->stNewInfo.stDirty.stBits.bVfFilter= BVDC_P_DIRTY;
2789
2790	BDBG_LEAVE(BVDC_Display_SetVfFilter);
2791	return BERR_SUCCESS;
2792	}
2793
2794	/***************************************************************************
2795	*
2796	*/
2797	BERR_Code BVDC_Display_GetVfFilter
2798	( BVDC_Display_Handle hDisplay,
2799	BVDC_DisplayOutput eDisplayOutput,
2800	BVDC_DacOutput eDacOutput,
2801	bool *pbOverride,
2802	uint32_t *paulFilterRegs,
2803	uint32_t ulNumFilterRegs )
2804	{
2805	BVDC_P_DisplayAnlgChan *pAnlgChan = NULL;
2806	uint32_t *paulUserVfFilter = NULL;
2807	int32_t lChannel;
2808	bool bOverride = false;
2809
2810	BDBG_ENTER(BVDC_Display_GetVfFilter);
2811	BDBG_OBJECT_ASSERT(hDisplay, BVDC_DSP);
2812
2813	if((eDisplayOutput != BVDC_DisplayOutput_eComponent) &&
2814	(eDisplayOutput != BVDC_DisplayOutput_eComposite) &&
2815	(eDisplayOutput != BVDC_DisplayOutput_eSVideo))
2816	{
2817	BDBG_ERR(("VF filter can only be retrieved from Component, Cvbs, or Svideo outputs."));
2818	return BERR_INVALID_PARAMETER;
2819	}
2820
2821	if (ulNumFilterRegs < BVDC_P_CHROMA_TABLE_SIZE)
2822	{
2823	BDBG_ERR(("Incorrect VF filter table size %d. Table size should be %d or greater for this platform. ", ulNumFilterRegs, BVDC_P_CHROMA_TABLE_SIZE));
2824	return BERR_INVALID_PARAMETER;
2825	}
2826
2827	if (!BVDC_P_DISP_IS_VALID_DISPOUTPUT_AND_DAC(eDispOutput, eDacOutput))
2828	{
2829	BDBG_ERR(("Invalid display output and dac output combination."));
2830	return BERR_INVALID_PARAMETER;
2831	}
2832
2833	lChannel = BVDC_P_DISP_GET_VF_CH_FROM_DAC(eDacOutput);
2834
2835	if (lChannel == BVDC_P_DISP_INVALID_VF_CH)
2836	{
2837	BDBG_ERR(("Invalid VF channel."));
2838	return BERR_INVALID_PARAMETER;
2839	}
2840
2841	if ((eDisplayOutput == BVDC_DisplayOutput_eComposite) \|\|
2842	(eDisplayOutput == BVDC_DisplayOutput_eSVideo))
2843	{
2844	bOverride = hDisplay->stCurInfo.abUserVfFilterCvbs[lChannel];
2845	paulUserVfFilter = (uint32_t *)hDisplay->stCurInfo.aaulUserVfFilterCvbs[lChannel];
2846	}
2847	else if (eDisplayOutput == BVDC_DisplayOutput_eComponent)
2848	{
2849	bOverride = hDisplay->stCurInfo.abUserVfFilterCo[lChannel];
2850	paulUserVfFilter = (uint32_t *)hDisplay->stCurInfo.aaulUserVfFilterCo[lChannel];
2851	}
2852
2853	if(pbOverride)
2854	{
2855	*pbOverride = bOverride;
2856	}
2857
2858	if(bOverride)
2859	{
2860	/* TODO: Is this necessary or can be merged with below? */
2861	BKNI_Memcpy(paulFilterRegs, paulUserVfFilter, BVDC_P_CHROMA_TABLE_SIZE * sizeof(uint32_t));
2862	}
2863	else
2864	{
2865	BVDC_P_Display_GetAnlgChanByOutput_isr(hDisplay, &hDisplay->stNewInfo, eDisplayOutput, &pAnlgChan);
2866
2867	if(!pAnlgChan)
2868	{
2869	BDBG_ERR(("Display output does not exist. Cannot get internal VF filter settings."));
2870	return BERR_INVALID_PARAMETER;
2871	}
2872	BKNI_EnterCriticalSection();
2873	BKNI_Memcpy(paulFilterRegs, pAnlgChan->apVfFilter[lChannel], BVDC_P_CHROMA_TABLE_SIZE * sizeof(uint32_t));
2874	BKNI_LeaveCriticalSection();
2875	}
2876
2877	BDBG_LEAVE(BVDC_Display_GetDvoColorMatrix);
2878	return BERR_SUCCESS;
2879	}
2880
2881
2882	/***************************************************************************
2883	*
2884	*/
2885	BERR_Code BVDC_Display_SetMuteMode
2886	( BVDC_Display_Handle hDisplay,
2887	BVDC_DisplayOutput eDisplayOutput,
2888	BVDC_MuteMode eMuteMode )
2889	{
2890	bool bMute;
2891
2892	BDBG_ENTER(BVDC_Display_SetMuteMode);
2893	BDBG_OBJECT_ASSERT(hDisplay, BVDC_DSP);
2894
2895	if (eMuteMode == BVDC_MuteMode_eConst)
2896	{
2897	bMute = true;
2898	}
2899	else if (eMuteMode == BVDC_MuteMode_eDisable)
2900	{
2901	bMute = false;
2902	}
2903	else
2904	{
2905	BDBG_ERR(("Selected mute mode not supported for output displays"));
2906	return BERR_INVALID_PARAMETER;
2907	}
2908
2909	/* set new values */
2910	hDisplay->stNewInfo.abOutputMute[eDisplayOutput] = bMute;
2911
2912	/* tie Cvbs and Svideo together */
2913	if ((eDisplayOutput == BVDC_DisplayOutput_eComposite) \|\| (eDisplayOutput == BVDC_DisplayOutput_eSVideo))
2914	{
2915	hDisplay->stNewInfo.abOutputMute[BVDC_DisplayOutput_eSVideo] = bMute;
2916	hDisplay->stNewInfo.abOutputMute[BVDC_DisplayOutput_eComposite] = bMute;
2917	}
2918
2919	/* Set display dirty bit */
2920	hDisplay->stNewInfo.stDirty.stBits.bOutputMute = BVDC_P_DIRTY;
2921
2922	BDBG_LEAVE(BVDC_Display_SetMuteMode);
2923	return BERR_SUCCESS;
2924	}
2925
2926
2927	/***************************************************************************
2928	*
2929	*/
2930	BERR_Code BVDC_Display_GetMuteMode
2931	( BVDC_Display_Handle hDisplay,
2932	BVDC_DisplayOutput eDisplayOutput,
2933	BVDC_MuteMode *peMuteMode )
2934	{
2935	bool bMute;
2936
2937	BDBG_ENTER(BVDC_Display_GetMuteMode);
2938	BDBG_OBJECT_ASSERT(hDisplay, BVDC_DSP);
2939
2940	if(peMuteMode)
2941	{
2942	bMute = hDisplay->stCurInfo.abOutputMute[eDisplayOutput];
2943	*peMuteMode = bMute ? BVDC_MuteMode_eConst : BVDC_MuteMode_eDisable;
2944	}
2945
2946	BDBG_LEAVE(BVDC_Display_GetMuteMode);
2947	return BERR_SUCCESS;
2948	}
2949
2950	/***************************************************************************
2951	*
2952	*/
2953	BERR_Code BVDC_Display_GetCapabilities
2954	( BVDC_Display_Handle hDisplay,
2955	BVDC_Display_Capabilities *pCapabilities )
2956	{
2957	BSTD_UNUSED(hDisplay);
2958	BSTD_UNUSED(pCapabilities);
2959
2960	return BERR_SUCCESS;
2961	}
2962
2963	/***************************************************************************
2964	*
2965	*/
2966	BERR_Code BVDC_Display_SetArtificticalVsync
2967	( BVDC_Display_Handle hDisplay,
2968	bool bEnable,
2969	uint32_t ulVsyncRegAddr,
2970	uint32_t ulVsyncMask )
2971	{
2972	BDBG_ENTER(BVDC_Display_SetArtificticalVsync);
2973	BDBG_OBJECT_ASSERT(hDisplay, BVDC_DSP);
2974
2975	/* set new values */
2976	hDisplay->stNewInfo.bArtificialVsync = bEnable;
2977	hDisplay->stNewInfo.ulArtificialVsyncRegAddr = ulVsyncRegAddr;
2978	hDisplay->stNewInfo.ulArtificialVsyncMask = ulVsyncMask;
2979
2980	/* Set display dirty bit */
2981	hDisplay->stNewInfo.stDirty.stBits.bMiscCtrl = BVDC_P_DIRTY;
2982
2983	BDBG_LEAVE(BVDC_Display_SetArtificticalVsync);
2984	return BERR_SUCCESS;
2985	}
2986
2987
2988	/***************************************************************************
2989	*
2990	*/
2991	BERR_Code BVDC_Display_GetArtificticalVsync
2992	( const BVDC_Display_Handle hDisplay,
2993	bool *pbEnable,
2994	uint32_t *pulVsyncRegAddr,
2995	uint32_t *pulVsyncMask )
2996	{
2997	BDBG_ENTER(BVDC_Display_GetArtificticalVsync);
2998	BDBG_OBJECT_ASSERT(hDisplay, BVDC_DSP);
2999
3000	if(pbEnable)
3001	{
3002	*pbEnable = hDisplay->stCurInfo.bArtificialVsync;
3003	}
3004
3005	if(pulVsyncRegAddr)
3006	{
3007	*pulVsyncRegAddr = hDisplay->stCurInfo.ulArtificialVsyncRegAddr;
3008	}
3009
3010	if(pulVsyncMask)
3011	{
3012	*pulVsyncMask = hDisplay->stCurInfo.ulArtificialVsyncMask;
3013	}
3014
3015	BDBG_LEAVE(BVDC_Display_GetArtificticalVsync);
3016	return BERR_SUCCESS;
3017	}
3018
3019	/* End of File */

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source: svn/trunk/newcon3bcm2_21bu/magnum/portinginterface/vdc/7552/bvdc_display.c

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