source: svn/trunk/newcon3bcm2_21bu/magnum/portinginterface/vdc/bvdc.inc

Last change on this file was 2, checked in by jglee, 11 years ago

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[2]1#############################################################################
2#
3#       Copyright (c) 2005-2012, Broadcom Corporation.
4#       All rights reserved.
5#       Confidential Property of Broadcom Corporation.
6#
7#  THIS SOFTWARE MAY ONLY BE USED SUBJECT TO AN EXECUTED SOFTWARE LICENSE
8#  AGREEMENT  BETWEEN THE USER AND BROADCOM.  YOU HAVE NO RIGHT TO USE OR
9#  EXPLOIT THIS MATERIAL EXCEPT SUBJECT TO THE TERMS OF SUCH AN AGREEMENT.
10#
11# $brcm_Workfile: bvdc.inc $
12# $brcm_Revision: Hydra_Software_Devel/70 $
13# $brcm_Date: 2/8/12 10:05a $
14#
15# File Description:
16#
17# Revision History:
18#
19# $brcm_Log: /magnum/portinginterface/vdc/bvdc.inc $
20#
21# Hydra_Software_Devel/70   2/8/12 10:05a pntruong
22# SW7360-3: Initial support.
23#
24# Hydra_Software_Devel/69   11/23/11 11:32a tdo
25# SW7435-9: add support for 7435A0 in VDC
26#
27# Hydra_Software_Devel/68   11/8/11 1:12p vanessah
28# SW7425-1704: factor STG functions out of bvdc_displayhandler_priv.c
29#
30# Hydra_Software_Devel/67   10/7/11 3:22p pntruong
31# SW7429-16: Initial support.
32#
33# Hydra_Software_Devel/67   10/7/11 3:21p pntruong
34# SW7429-16: Initial support.
35#
36# Hydra_Software_Devel/66   4/19/11 2:06p tqiu
37# SWDTV-6626: include DTV tuning parameter path
38#
39# Hydra_Software_Devel/65   4/13/11 4:59p shyi
40# SWDTV-6130: Added hardware cursor support for 35233
41#
42# Hydra_Software_Devel/64   4/11/11 10:42p pntruong
43# SWDTV-6264: Fixed stb mainline build errors.
44#
45# Hydra_Software_Devel/63   4/11/11 3:01p franli
46# SWDTV-6264:General SHADE support for 35330
47#
48# Hydra_Software_Devel/62   4/7/11 4:37p petlee
49# SWDTV-6171: Add B3DC
50#
51# Hydra_Software_Devel/61   3/31/11 4:12p jasonx
52# SWDTV-5876: add init v0be file.
53#
54# Hydra_Software_Devel/60   3/29/11 4:14p franli
55# SWDTV-6196:Initial bringup vdc pi for 35233
56#
57# Hydra_Software_Devel/59   3/28/11 4:47p franli
58# SWDTV-6196:Initial bringup vdc pi for 35233
59#
60# Hydra_Software_Devel/59   3/28/11 4:43p franli
61# SWDTV-6196:Initial bringup vdc pi for 35233
62#
63# Hydra_Software_Devel/58   1/18/11 1:21p yuxiaz
64# SW7552-17: Added 7552 support. Merge from Branch.
65#
66# Hydra_Software_Devel/SW7552-17/1   12/20/10 7:28p xhuang
67# SW7552-17: add 7552 support
68#
69# Hydra_Software_Devel/57   12/2/10 3:53p shyi
70# SW35230-2395: Added hardware cursor support
71#
72# Hydra_Software_Devel/56   12/2/10 12:25p jhaberf
73# SW35230-18: Intergrated changes from the 35125 CFE team
74#
75# Hydra_Software_Devel/55   11/30/10 3:09p zhang
76# SW35125-18: First attempt to compile VDC with 35125 C0 RDB.
77#
78# Hydra_Software_Devel/54   11/19/10 6:23p darnstein
79# SW7231-2: add support for 7344, 7346, 7231.
80#
81# Hydra_Software_Devel/53   11/11/10 9:38a pntruong
82# SW35230-1815: Fixed mainline build error.
83#
84# Hydra_Software_Devel/52   11/11/10 12:08p mbatchel
85# SW35230-1815: Integrate PFA support.
86#
87# Hydra_Software_Devel/SW35230-1815/1   10/20/10 1:21p tqiu
88# SW35230-1815: add PFA support with tuning and custom pq
89#
90# Hydra_Software_Devel/51   11/10/10 4:37p mbatchel
91# SW35230-1927: Expand dirty bits beyond 32.
92#
93# Hydra_Software_Devel/50   10/21/10 2:30p mbatchel
94# SW35230-968: Merge HIST_1 maxRGB support
95#
96# Hydra_Software_Devel/49   10/20/10 7:21p mbatchel
97# SW35230-1647: Add reserved customization hooks.
98#
99# Hydra_Software_Devel/SW35230-1647/1   10/8/10 7:59p mbatchel
100# SW35230-1647: Add reserved customization hooks.
101#
102# Hydra_Software_Devel/48   10/14/10 12:26p tqiu
103# SW35230-1750: remove plm from public build
104#
105# Hydra_Software_Devel/47   9/14/10 9:11a yuxiaz
106# SW7358-4: Added initial VDC support for 7358.
107#
108# Hydra_Software_Devel/47   9/13/10 4:44p yuxiaz
109# SW7358-4: Added initial VDC support for 7358.
110#
111# Hydra_Software_Devel/46   9/8/10 7:05p kaiz
112# SW35230-62: customization callback framework - adding into build
113#
114# Hydra_Software_Devel/45   8/30/10 4:00p tdo
115# SW7422-57, SW7425-13: Add simple vdc support
116#
117# Hydra_Software_Devel/44   8/13/10 4:34p kaiz
118# SW35230-189: Add main MIPS infrastructure and tuning code to support
119# embedded backlight MIPS - after initial test
120#
121# Hydra_Software_Devel/43   7/23/10 1:21p tqiu
122# SW35230-167: initial version for 35230 A0 and B0
123#
124# Hydra_Software_Devel/42   7/22/10 2:00p mbatchel
125# SW35230-187: Add xvycc tuning support.
126#
127# Hydra_Software_Devel/SW35230-187/1   7/21/10 1:10p mbatchel
128# SW35230-187: Add XVYCC Tuning support.
129#
130# Hydra_Software_Devel/41   6/10/10 8:36a mbatchel
131# SW35230-266: Merge mcdi back into mad in preparation for 35125/[330].
132#
133# Hydra_Software_Devel/40   4/22/10 9:41a tqiu
134# SW35230-175: add shade code into build
135#
136# Hydra_Software_Devel/39   4/9/10 4:38p mbatchel
137# SW35230-162, SW35230-164: Merge initial vdc tuning framework and HIST_0
138# tuning into main.
139#
140# Hydra_Software_Devel/SW35230-162/1   4/9/10 4:37p mbatchel
141# SW35230-162, SW35230-164: Merge initial vdc tuning framework and HIST_0
142# tuning into main.
143#
144# Hydra_Software_Devel/38   3/23/10 4:05p kaiz
145# SW35230-114: add new programmable N2L & L2N blocks in 35230
146#
147# Hydra_Software_Devel/37   3/12/10 1:04p bhilder
148# SW35230-72: merge bvdc-Frc subproject-72 to main
149#
150# Hydra_Software_Devel/36   3/11/10 3:22p paultsai
151# SW35230-97: Add PDP source file for 35230
152#
153# Hydra_Software_Devel/35   1/29/10 5:26p paultsai
154# SW35230-19: 35230 VDC Compile
155#
156# Hydra_Software_Devel/34   11/30/09 3:23p rpan
157# SW7468-30: More OSCL support.
158#
159# Hydra_Software_Devel/33   11/24/09 5:47p yuxiaz
160# SW7420-462: Added new tuning functions for Tuning Database.
161#
162# Hydra_Software_Devel/32   11/19/09 11:52a pntruong
163# SW7408-13: Initial check in to get 7408 build.
164#
165# Hydra_Software_Devel/31   11/10/09 3:07p rpan
166# SW7468-20: Initial support for 7468.
167#
168# Hydra_Software_Devel/30   8/25/09 7:44p albertl
169# SW7125-10: Initial 7125 support.
170#
171# Hydra_Software_Devel/29   6/18/09 3:15p darnstein
172# PR53430,PR54876,PR55812: handle all orthogonal VEC chipsets in the same
173# fashion.
174#
175# Hydra_Software_Devel/28   3/16/09 10:59p tdo
176# PR45785, PR45789: Merge from MCVP branch
177#
178# Hydra_Software_Devel/7420_mcvp/1   1/23/09 11:38p syang
179# PR 45785, PR 45789: add PI support for new the new module  MCVP
180# (MCTF+MCDI)
181#
182# Hydra_Software_Devel/27   1/12/09 1:01p darnstein
183# PR25971: For DCS source files, directory name was incorrect.
184#
185# Hydra_Software_Devel/26   12/3/08 4:38p rpan
186# PR45804: Initial effort for the orthogonal VEC support.
187#
188# Hydra_Software_Devel/25   10/7/08 9:54a jessem
189# PR 47304: Added bvdc_tntalgorithm_priv.c
190#
191# Hydra_Software_Devel/24   9/17/08 8:42p pntruong
192# PR47013: B0: Initial vdc support.
193#
194# Hydra_Software_Devel/23   7/15/08 3:50p rpan
195# PR44641: Clean-up.
196#
197# Hydra_Software_Devel/22   3/31/08 2:40p jessem
198# PR 39335: Added CM3D files.
199#
200# Hydra_Software_Devel/21   3/19/08 5:45p tdo
201# PR39333: Implement HIST core
202#
203# Hydra_Software_Devel/20   3/10/08 8:27p darnstein
204# PR25971: first try at DCS for 7400
205#
206# Hydra_Software_Devel/19   2/28/08 6:24p hongtaoz
207# PR39154, PR36273, PR39202: added HSCL block; enabled MAD/ANR for 3548;
208# fixed non-linear scaling when MAD is on;
209#
210# Hydra_Software_Devel/18   11/2/07 7:35p albertl
211# PR36701:  Added MUD functionality for 7440 C0.
212#
213# Hydra_Software_Devel/17   10/31/07 11:22a pntruong
214# PR34239: Added more explicity check of turn on copy protection build.
215#
216# Hydra_Software_Devel/16   10/23/07 11:18a yuxiaz
217# PR29569, PR36290: Add FGT support on 7405.
218#
219# Hydra_Software_Devel/15   6/27/07 12:34p tdo
220# PR32489: Add support for custom adjust DNR
221#
222# Hydra_Software_Devel/14   6/13/07 9:52a syang
223# PR 31944: put ANR K value table inro seperate file
224#
225# Hydra_Software_Devel/13   5/31/07 3:28p tdo
226# PR28978: C0: Provide API to realize CMS function
227#
228# Hydra_Software_Devel/12   5/25/07 2:12p tdo
229# PR30613: Move dynamic contrast stretch into its own file
230#
231# Hydra_Software_Devel/11   4/19/07 2:32p tdo
232# PR29965: PEP cleanup
233#
234# Hydra_Software_Devel/10   2/9/07 2:49p pntruong
235# PR 27117: Included all chipsets support in mainline.
236#
237# Hydra_Software_Devel/9   2/8/07 11:29a pntruong
238# PR 27117: Updating to use module specific .inc files.
239#
240# Hydra_Software_Devel/8   2/7/07 11:51p pntruong
241# PR 27117: Updating to use module specific .inc files.
242#
243# Hydra_Software_Devel/7   1/25/07 10:58a yuxiaz
244# PR 23202: Added bvdc_rts_priv.c for RTS reconfig in VDC.
245#
246# Hydra_Software_Devel/6   1/17/07 5:46p jasonh
247# PR 27117: Fixed 7400 B0 build.
248#
249# Hydra_Software_Devel/4   1/17/07 4:55p mward
250# PR 27004: Handle 7118 like 7401
251#
252# Hydra_Software_Devel/3   1/15/07 9:01p pntruong
253# PR23222: VDEC - ATSC input support.  Tablelized FE for each formats.
254#
255# Hydra_Software_Devel/3   1/15/07 9:01p pntruong
256# PR23222: VDEC - ATSC input support.  Tablelized FE for each formats.
257#
258# Hydra_Software_Devel/2   1/12/07 3:07p jgarrett
259# PR 27004: Fixing glitch for new chips
260#
261# Hydra_Software_Devel/1   1/11/07 2:39p jgarrett
262# PR27004: Adding new .inc files
263#
264# Hydra_Software_Devel/16   1/9/07 1:48p maivu
265# PR24457: Merge latest 3563 to main branch for 7400
266#
267# Hydra_Software_Devel/Refsw_Devel_3563/5   1/7/07 9:06a dyzhang
268# PR24457: Merge latest 3563 vdc.inc
269#
270# Hydra_Software_Devel/Refsw_Devel_3563/4   11/17/06 1:54p jerryy
271# PR 24457: Added new files for 3563.
272#
273# Hydra_Software_Devel/Refsw_Devel_3563/3   11/2/06 4:35p pntruong
274# PR 24457: does not like the extension.
275#
276# Hydra_Software_Devel/Refsw_Devel_3563/2   11/2/06 2:54p pntruong
277# PR 24457: Missing back slash.
278#
279# Hydra_Software_Devel/Refsw_Devel_3563/1   11/2/06 10:04a pntruong
280# PR 24457: Added new files for 3563.
281#
282#############################################################################
283
284#
285# For internal VDC developer that uses window view that does not support
286# softlink well.
287#
288ifeq (${BVDC_DEVELOPER}, y)
289        BVDC_CHIP_DIR ?= 7038
290else
291        BVDC_CHIP_DIR = $(BCHP_CHIP)
292endif
293
294#
295# Conditional Options for this Makefile
296#
297# BVDC_MACROVISION - If set to 'y', macrovision support will be added.
298# BVDC_DCS - If set to 'y', DCS support will be added.
299#
300# BVDC_USE_CUSTOM_IMAGE   - If defined, the app is expected to specify their own firmware interface AND image context when calling BVDC_Open().
301# BVDC_USE_CUSTOM_CONTEXT - If defined, the firmware image context will NOT be compiled. The app is expected to provide their own firmware image context when calling BVDC_Open().
302#
303
304# Define this module
305MAGNUM_MODULES += BVDC
306
307# Module Includes
308BVDC_INCLUDES += $(MAGNUM)/portinginterface/vdc/$(BVDC_CHIP_DIR)
309
310#
311# DTV tuning parameter headers
312#
313ifneq ($(findstring $(BCHP_CHIP), 35233),)
314BVDC_TUNING_VER_LOWER := $(subst A,a,$(BCHP_VER))
315BVDC_TUNING_VER_LOWER := $(subst B,b,$(BVDC_TUNING_VER_LOWER))
316BVDC_TUNING_VER_LOWER := $(subst C,c,$(BVDC_TUNING_VER_LOWER))
317BVDC_TUNING_VER_LOWER := $(subst D,d,$(BVDC_TUNING_VER_LOWER))
318BVDC_TUNING_VER_LOWER := $(subst E,e,$(BVDC_TUNING_VER_LOWER))
319BVDC_TUNING_VER_LOWER := $(subst F,f,$(BVDC_TUNING_VER_LOWER))
320BVDC_TUNING_VER_LOWER := $(subst G,g,$(BVDC_TUNING_VER_LOWER))
321BVDC_TUNING_VER_LOWER := $(strip $(subst H,h,$(BVDC_TUNING_VER_LOWER)))
322BVDC_INCLUDES += $(MAGNUM)/portinginterface/vdc/$(BVDC_CHIP_DIR)/$(BVDC_TUNING_VER_LOWER)
323endif
324
325BVDC_SOURCES = \
326        $(MAGNUM)/portinginterface/vdc/$(BVDC_CHIP_DIR)/bvdc.c \
327        $(MAGNUM)/portinginterface/vdc/$(BVDC_CHIP_DIR)/bvdc_boxdetect_priv.c \
328        $(MAGNUM)/portinginterface/vdc/$(BVDC_CHIP_DIR)/bvdc_buffer_priv.c \
329        $(MAGNUM)/portinginterface/vdc/$(BVDC_CHIP_DIR)/bvdc_bufferheap_priv.c \
330        $(MAGNUM)/portinginterface/vdc/$(BVDC_CHIP_DIR)/bvdc_capture_priv.c \
331        $(MAGNUM)/portinginterface/vdc/$(BVDC_CHIP_DIR)/bvdc_compositor.c \
332        $(MAGNUM)/portinginterface/vdc/$(BVDC_CHIP_DIR)/bvdc_compositor_priv.c \
333        $(MAGNUM)/portinginterface/vdc/$(BVDC_CHIP_DIR)/bvdc_display.c \
334        $(MAGNUM)/portinginterface/vdc/$(BVDC_CHIP_DIR)/bvdc_displayfmt_priv.c \
335        $(MAGNUM)/portinginterface/vdc/$(BVDC_CHIP_DIR)/bvdc_display_priv.c \
336        $(MAGNUM)/portinginterface/vdc/$(BVDC_CHIP_DIR)/bvdc_displaytable_priv.c \
337        $(MAGNUM)/portinginterface/vdc/$(BVDC_CHIP_DIR)/bvdc_displaymatrices_priv.c \
338        $(MAGNUM)/portinginterface/vdc/$(BVDC_CHIP_DIR)/bvdc_dnr_priv.c \
339        $(MAGNUM)/portinginterface/vdc/$(BVDC_CHIP_DIR)/bvdc_dnrtable_priv.c \
340        $(MAGNUM)/portinginterface/vdc/$(BVDC_CHIP_DIR)/bvdc_feeder_priv.c \
341        $(MAGNUM)/portinginterface/vdc/$(BVDC_CHIP_DIR)/bvdc_gfxfeeder.c \
342        $(MAGNUM)/portinginterface/vdc/$(BVDC_CHIP_DIR)/bvdc_gfxfeeder_priv.c \
343        $(MAGNUM)/portinginterface/vdc/$(BVDC_CHIP_DIR)/bvdc_gfxfeedertable_priv.c \
344        $(MAGNUM)/portinginterface/vdc/$(BVDC_CHIP_DIR)/bvdc_hddvi_priv.c \
345        $(MAGNUM)/portinginterface/vdc/$(BVDC_CHIP_DIR)/bvdc_hscaler_priv.c \
346        $(MAGNUM)/portinginterface/vdc/$(BVDC_CHIP_DIR)/bvdc_anr_priv.c \
347        $(MAGNUM)/portinginterface/vdc/$(BVDC_CHIP_DIR)/bvdc_anrtable_priv.c \
348        $(MAGNUM)/portinginterface/vdc/$(BVDC_CHIP_DIR)/bvdc_mad_priv.c \
349        $(MAGNUM)/portinginterface/vdc/$(BVDC_CHIP_DIR)/bvdc_mcvp_priv.c \
350        $(MAGNUM)/portinginterface/vdc/$(BVDC_CHIP_DIR)/bvdc_mud_priv.c \
351        $(MAGNUM)/portinginterface/vdc/$(BVDC_CHIP_DIR)/bvdc_pep_priv.c \
352        $(MAGNUM)/portinginterface/vdc/$(BVDC_CHIP_DIR)/bvdc_pepalgorithm_priv.c \
353        $(MAGNUM)/portinginterface/vdc/$(BVDC_CHIP_DIR)/bvdc_pepdyncontrast_priv.c \
354        $(MAGNUM)/portinginterface/vdc/$(BVDC_CHIP_DIR)/bvdc_pepcms_priv.c \
355        $(MAGNUM)/portinginterface/vdc/$(BVDC_CHIP_DIR)/bvdc_pepcmstable_priv.c \
356        $(MAGNUM)/portinginterface/vdc/$(BVDC_CHIP_DIR)/bvdc_priv.c \
357        $(MAGNUM)/portinginterface/vdc/$(BVDC_CHIP_DIR)/bvdc_resource_priv.c \
358        $(MAGNUM)/portinginterface/vdc/$(BVDC_CHIP_DIR)/bvdc_scaler_priv.c \
359        $(MAGNUM)/portinginterface/vdc/$(BVDC_CHIP_DIR)/bvdc_source.c \
360        $(MAGNUM)/portinginterface/vdc/$(BVDC_CHIP_DIR)/bvdc_source_priv.c \
361        $(MAGNUM)/portinginterface/vdc/$(BVDC_CHIP_DIR)/bvdc_test.c \
362        $(MAGNUM)/portinginterface/vdc/$(BVDC_CHIP_DIR)/bvdc_vdec_priv.c \
363        $(MAGNUM)/portinginterface/vdc/$(BVDC_CHIP_DIR)/bvdc_videotable_priv.c \
364        $(MAGNUM)/portinginterface/vdc/$(BVDC_CHIP_DIR)/bvdc_vnet_priv.c \
365        $(MAGNUM)/portinginterface/vdc/$(BVDC_CHIP_DIR)/bvdc_window.c \
366        $(MAGNUM)/portinginterface/vdc/$(BVDC_CHIP_DIR)/bvdc_window_priv.c \
367        $(MAGNUM)/portinginterface/vdc/$(BVDC_CHIP_DIR)/bvdc_coeff_priv.c  \
368        $(MAGNUM)/portinginterface/vdc/$(BVDC_CHIP_DIR)/bvdc_656in_priv.c \
369        $(MAGNUM)/portinginterface/vdc/$(BVDC_CHIP_DIR)/bvdc_csc_priv.c \
370        $(MAGNUM)/portinginterface/vdc/$(BVDC_CHIP_DIR)/bvdc_dbg.c \
371        $(MAGNUM)/portinginterface/vdc/$(BVDC_CHIP_DIR)/bvdc_downsample_priv.c \
372        $(MAGNUM)/portinginterface/vdc/$(BVDC_CHIP_DIR)/bvdc_ccb_priv.c \
373        $(MAGNUM)/portinginterface/vdc/$(BVDC_CHIP_DIR)/bvdc_ccbtable_priv.c \
374        $(MAGNUM)/portinginterface/vdc/$(BVDC_CHIP_DIR)/bvdc_rts_priv.c \
375        $(MAGNUM)/portinginterface/vdc/$(BVDC_CHIP_DIR)/bvdc_subrul_priv.c \
376        $(MAGNUM)/portinginterface/vdc/$(BVDC_CHIP_DIR)/bvdc_chromacoeff_priv.c \
377        $(MAGNUM)/portinginterface/vdc/$(BVDC_CHIP_DIR)/bvdc_vdecfmt_priv.c \
378        $(MAGNUM)/portinginterface/vdc/$(BVDC_CHIP_DIR)/bvdc_fgt_priv.c \
379        $(MAGNUM)/portinginterface/vdc/$(BVDC_CHIP_DIR)/bvdc_fgttable_priv.c \
380        $(MAGNUM)/portinginterface/vdc/$(BVDC_CHIP_DIR)/bvdc_heap.c \
381        $(MAGNUM)/portinginterface/vdc/$(BVDC_CHIP_DIR)/bvdc_hist_priv.c \
382        $(MAGNUM)/portinginterface/vdc/$(BVDC_CHIP_DIR)/bvdc_cm3d.c \
383        $(MAGNUM)/portinginterface/vdc/$(BVDC_CHIP_DIR)/bvdc_cm3d_priv.c \
384        $(MAGNUM)/portinginterface/vdc/$(BVDC_CHIP_DIR)/bvdc_tune.c \
385        $(MAGNUM)/portinginterface/vdc/$(BVDC_CHIP_DIR)/bvdc_tune_priv.c \
386        $(MAGNUM)/portinginterface/vdc/$(BVDC_CHIP_DIR)/bvdc_oscl_priv.c
387
388# Orthogonal VEC support
389ifneq ($(findstring $(BCHP_CHIP), 7435 7429 7425 7422 7420 7340 7342 7550 7125 7468 7408 7358 35230 35125 35233 7344 7346 7231 7552 7360),)
390BVDC_SOURCES += \
391        $(MAGNUM)/portinginterface/vdc/$(BVDC_CHIP_DIR)/bvdc_displayhandler_priv.c
392endif
393
394# STG support
395ifneq ($(findstring $(BCHP_CHIP), 7425 7435),)
396BVDC_SOURCES += \
397        $(MAGNUM)/portinginterface/vdc/$(BVDC_CHIP_DIR)/bvdc_displaystg_priv.c
398endif
399ifeq ($(BVDC_MACROVISION),y)
400# Macrovision support
401BVDC_SOURCES += \
402        $(MAGNUM)/portinginterface/vdc/$(BVDC_CHIP_DIR)/bvdc_macrovision.c \
403        $(MAGNUM)/portinginterface/vdc/$(BVDC_CHIP_DIR)/bvdc_macrovision_priv.c \
404        $(MAGNUM)/portinginterface/vdc/$(BVDC_CHIP_DIR)/bvdc_macrovisiontable_priv.c
405else
406ifeq (${BVDC_DCS},y)
407# DCS support
408BVDC_SOURCES += \
409        $(MAGNUM)/portinginterface/vdc/$(BVDC_CHIP_DIR)/bvdc_dcs.c \
410        $(MAGNUM)/portinginterface/vdc/$(BVDC_CHIP_DIR)/bvdc_dcs_priv.c \
411        $(MAGNUM)/portinginterface/vdc/$(BVDC_CHIP_DIR)/bvdc_dcstable_priv.c
412else
413BVDC_SOURCES += \
414        $(MAGNUM)/portinginterface/vdc/$(BVDC_CHIP_DIR)/bvdc_nomacrovision_priv.c
415endif
416endif
417
418# MCDI separate module
419ifeq ($(findstring $(BCHP_CHIP), 35230 35125 35233),)
420BVDC_SOURCES += \
421        $(MAGNUM)/portinginterface/vdc/$(BVDC_CHIP_DIR)/bvdc_mcdi_priv.c
422endif
423
424# Default include unless it is chipset with SHADE
425ifeq ($(findstring $(BCHP_CHIP), 35233),)
426BVDC_SOURCES += \
427        $(MAGNUM)/portinginterface/vdc/$(BVDC_CHIP_DIR)/bvdc_tnt_priv.c \
428        $(MAGNUM)/portinginterface/vdc/$(BVDC_CHIP_DIR)/bvdc_tntalgorithm_priv.c
429endif
430
431
432#####################################################
433# TODO: Remove all these and put them in DTV branch #
434#####################################################
435# DTV PLATFORM 2.0
436ifneq ($(findstring $(BCHP_CHIP), 35230 35125 35233),)
437BVDC_SOURCES += \
438        $(MAGNUM)/portinginterface/vdc/$(BVDC_CHIP_DIR)/bvdc_backlight_priv.c \
439        $(MAGNUM)/portinginterface/vdc/$(BVDC_CHIP_DIR)/bvdc_custompq.c \
440        $(MAGNUM)/portinginterface/vdc/$(BVDC_CHIP_DIR)/bvdc_pdp_priv.c \
441        $(MAGNUM)/portinginterface/vdc/$(BVDC_CHIP_DIR)/bvdc_regcache_priv.c \
442        $(MAGNUM)/portinginterface/vdc/$(BVDC_CHIP_DIR)/bvdc_rgbhist_priv.c \
443        $(MAGNUM)/portinginterface/vdc/$(BVDC_CHIP_DIR)/bvdc_shade_priv.c \
444        $(MAGNUM)/portinginterface/vdc/$(BVDC_CHIP_DIR)/bvdc_tuneparam_priv.c \
445        $(MAGNUM)/portinginterface/vdc/$(BVDC_CHIP_DIR)/bvdc_xvycc_priv.c \
446        $(MAGNUM)/portinginterface/vdc/$(BVDC_CHIP_DIR)/bvdc_image.c
447
448ifneq ($(findstring $(BCHP_CHIP), 35230),)
449BVDC_SOURCES += \
450        $(MAGNUM)/portinginterface/vdc/$(BVDC_CHIP_DIR)/bvdc_frc_priv.c \
451        $(MAGNUM)/portinginterface/vdc/$(BVDC_CHIP_DIR)/bvdc_frc_dring0_priv.c \
452        $(MAGNUM)/portinginterface/vdc/$(BVDC_CHIP_DIR)/bvdc_frc_dring1_priv.c \
453        $(MAGNUM)/portinginterface/vdc/$(BVDC_CHIP_DIR)/bvdc_frc_fwutil_priv.c \
454        $(MAGNUM)/portinginterface/vdc/$(BVDC_CHIP_DIR)/bvdc_pfa_priv.c \
455        $(MAGNUM)/portinginterface/vdc/$(BVDC_CHIP_DIR)/bvdc_platform_35230_image.c
456
457ifeq ($(findstring C,$(BCHP_VER)),C)
458BVDC_SOURCES += \
459        $(MAGNUM)/portinginterface/vdc/$(BVDC_CHIP_DIR)/bvdc_hwc.c
460endif
461endif
462
463ifneq ($(findstring $(BCHP_CHIP), 35125),)
464BVDC_SOURCES += \
465        $(MAGNUM)/portinginterface/vdc/$(BVDC_CHIP_DIR)/bvdc_pfa_priv.c \
466        $(MAGNUM)/portinginterface/vdc/$(BVDC_CHIP_DIR)/bvdc_platform_35125_image.c
467endif
468
469ifneq ($(findstring $(BCHP_CHIP), 35233),)
470BVDC_SOURCES += \
471        $(MAGNUM)/portinginterface/vdc/$(BVDC_CHIP_DIR)/bvdc_b3dc_priv.c \
472        $(MAGNUM)/portinginterface/vdc/$(BVDC_CHIP_DIR)/bvdc_hwc.c \
473        $(MAGNUM)/portinginterface/vdc/$(BVDC_CHIP_DIR)/bvdc_pfa_priv.c \
474        $(MAGNUM)/portinginterface/vdc/$(BVDC_CHIP_DIR)/bvdc_platform_35233_image.c \
475        $(MAGNUM)/portinginterface/vdc/$(BVDC_CHIP_DIR)/bvdc_v0be_priv.c
476endif
477
478ifneq ($(BVDC_CUSTOMPQ_INC),)
479include $(MAGNUM)/portinginterface/vdc/$(BVDC_CHIP_DIR)/$(BVDC_CUSTOMPQ_INC)
480endif
481
482NEXUS_C_STD=c99
483endif
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