source: svn/trunk/newcon3bcm2_21bu/toolchain/mips-linux-uclibc/include/asm/sibyte/sb1250_defs.h

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1/*  *********************************************************************
2    *  SB1250 Board Support Package
3    * 
4    *  Global constants and macros              File: sb1250_defs.h     
5    * 
6    *  This file contains macros and definitions used by the other
7    *  include files.
8    *
9    *  SB1250 specification level:  User's manual 1/02/02
10    * 
11    *  Author:  Mitch Lichtenberg
12    * 
13    ********************************************************************* 
14    *
15    *  Copyright 2000,2001,2002,2003
16    *  Broadcom Corporation. All rights reserved.
17    * 
18    *  This program is free software; you can redistribute it and/or
19    *  modify it under the terms of the GNU General Public License as
20    *  published by the Free Software Foundation; either version 2 of
21    *  the License, or (at your option) any later version.
22    *
23    *  This program is distributed in the hope that it will be useful,
24    *  but WITHOUT ANY WARRANTY; without even the implied warranty of
25    *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
26    *  GNU General Public License for more details.
27    *
28    *  You should have received a copy of the GNU General Public License
29    *  along with this program; if not, write to the Free Software
30    *  Foundation, Inc., 59 Temple Place, Suite 330, Boston,
31    *  MA 02111-1307 USA
32    ********************************************************************* */
33
34#ifndef _SB1250_DEFS_H
35#define _SB1250_DEFS_H
36
37/*
38 * These headers require ANSI C89 string concatenation, and GCC or other
39 * 'long long' (64-bit integer) support.
40 */
41#if !defined(__STDC__) && !defined(_MSC_VER)
42#error SiByte headers require ANSI C89 support
43#endif
44
45
46/*  *********************************************************************
47    *  Macros for feature tests, used to enable include file features
48    *  for chip features only present in certain chip revisions.
49    *
50    *  SIBYTE_HDR_FEATURES may be defined to be the mask value chip/revision
51    *  which is to be exposed by the headers.  If undefined, it defaults to
52    *  "all features."
53    *
54    *  Use like:
55    *
56    *    #define SIBYTE_HDR_FEATURES    SIBYTE_HDR_FMASK_112x_PASS1
57    *
58    *           Generate defines only for that revision of chip.
59    *
60    *    #if SIBYTE_HDR_FEATURE(chip,pass)
61    *
62    *           True if header features for that revision or later of
63    *           that particular chip type are enabled in SIBYTE_HDR_FEATURES.
64    *           (Use this to bracket #defines for features present in a given
65    *           revision and later.)
66    *
67    *           Note that there is no implied ordering between chip types.
68    *
69    *           Note also that 'chip' and 'pass' must textually exactly
70    *           match the defines below.  So, for example,
71    *           SIBYTE_HDR_FEATURE(112x, PASS1) is OK, but
72    *           SIBYTE_HDR_FEATURE(1120, pass1) is not (for two reasons).
73    *
74    *    #if SIBYTE_HDR_FEATURE_UP_TO(chip,pass)
75    *
76    *           Same as SIBYTE_HDR_FEATURE, but true for the named revision
77    *           and earlier revisions of the named chip type.
78    *
79    *    #if SIBYTE_HDR_FEATURE_EXACT(chip,pass)
80    *
81    *           Same as SIBYTE_HDR_FEATURE, but only true for the named
82    *           revision of the named chip type.  (Note that this CANNOT
83    *           be used to verify that you're compiling only for that
84    *           particular chip/revision.  It will be true any time this
85    *           chip/revision is included in SIBYTE_HDR_FEATURES.)
86    *
87    *    #if SIBYTE_HDR_FEATURE_CHIP(chip)
88    *
89    *           True if header features for (any revision of) that chip type
90    *           are enabled in SIBYTE_HDR_FEATURES.  (Use this to bracket
91    *           #defines for features specific to a given chip type.)
92    *
93    *  Mask values currently include room for additional revisions of each
94    *  chip type, but can be renumbered at will.  Note that they MUST fit
95    *  into 31 bits and may not include C type constructs, for safe use in
96    *  CPP conditionals.  Bit positions within chip types DO indicate
97    *  ordering, so be careful when adding support for new minor revs.
98    ********************************************************************* */
99
100#define SIBYTE_HDR_FMASK_1250_ALL               0x00000ff
101#define SIBYTE_HDR_FMASK_1250_PASS1             0x0000001
102#define SIBYTE_HDR_FMASK_1250_PASS2             0x0000002
103#define SIBYTE_HDR_FMASK_1250_PASS3             0x0000004
104
105#define SIBYTE_HDR_FMASK_112x_ALL               0x0000f00
106#define SIBYTE_HDR_FMASK_112x_PASS1             0x0000100
107
108/* Bit mask for chip/revision.  (use _ALL for all revisions of a chip).  */ 
109#define SIBYTE_HDR_FMASK(chip, pass)                                    \
110    (SIBYTE_HDR_FMASK_ ## chip ## _ ## pass)
111#define SIBYTE_HDR_FMASK_ALLREVS(chip)                                  \
112    (SIBYTE_HDR_FMASK_ ## chip ## _ALL)
113
114#define SIBYTE_HDR_FMASK_ALL                                            \
115    (SIBYTE_HDR_FMASK_1250_ALL | SIBYTE_HDR_FMASK_112x_ALL)
116
117#ifndef SIBYTE_HDR_FEATURES
118#define SIBYTE_HDR_FEATURES                     SIBYTE_HDR_FMASK_ALL
119#endif
120
121
122/* Bit mask for revisions of chip exclusively before the named revision.  */
123#define SIBYTE_HDR_FMASK_BEFORE(chip, pass)                             \
124    ((SIBYTE_HDR_FMASK(chip, pass) - 1) & SIBYTE_HDR_FMASK_ALLREVS(chip))
125
126/* Bit mask for revisions of chip exclusively after the named revision.  */
127#define SIBYTE_HDR_FMASK_AFTER(chip, pass)                              \
128    (~(SIBYTE_HDR_FMASK(chip, pass)                                     \
129     | (SIBYTE_HDR_FMASK(chip, pass) - 1)) & SIBYTE_HDR_FMASK_ALLREVS(chip))
130
131
132/* True if header features enabled for (any revision of) that chip type.  */
133#define SIBYTE_HDR_FEATURE_CHIP(chip)                                   \
134    (!! (SIBYTE_HDR_FMASK_ALLREVS(chip) & SIBYTE_HDR_FEATURES))
135
136/* True if header features enabled for that rev or later, inclusive.  */
137#define SIBYTE_HDR_FEATURE(chip, pass)                                  \
138    (!! ((SIBYTE_HDR_FMASK(chip, pass)                                  \
139          | SIBYTE_HDR_FMASK_AFTER(chip, pass)) & SIBYTE_HDR_FEATURES))
140
141/* True if header features enabled for exactly that rev.  */
142#define SIBYTE_HDR_FEATURE_EXACT(chip, pass)                            \
143    (!! (SIBYTE_HDR_FMASK(chip, pass) & SIBYTE_HDR_FEATURES))
144
145/* True if header features enabled for that rev or before, inclusive.  */
146#define SIBYTE_HDR_FEATURE_UP_TO(chip, pass)                            \
147    (!! ((SIBYTE_HDR_FMASK(chip, pass)                                  \
148         | SIBYTE_HDR_FMASK_BEFORE(chip, pass)) & SIBYTE_HDR_FEATURES))
149
150
151/*  *********************************************************************
152    *  Naming schemes for constants in these files:
153    * 
154    *  M_xxx           MASK constant (identifies bits in a register).
155    *                  For multi-bit fields, all bits in the field will
156    *                  be set.
157    *
158    *  K_xxx           "Code" constant (value for data in a multi-bit
159    *                  field).  The value is right justified.
160    *
161    *  V_xxx           "Value" constant.  This is the same as the
162    *                  corresponding "K_xxx" constant, except it is
163    *                  shifted to the correct position in the register.
164    *
165    *  S_xxx           SHIFT constant.  This is the number of bits that
166    *                  a field value (code) needs to be shifted
167    *                  (towards the left) to put the value in the right
168    *                  position for the register.
169    *
170    *  A_xxx           ADDRESS constant.  This will be a physical
171    *                  address.  Use the PHYS_TO_K1 macro to generate
172    *                  a K1SEG address.
173    *
174    *  R_xxx           RELATIVE offset constant.  This is an offset from
175    *                  an A_xxx constant (usually the first register in
176    *                  a group).
177    * 
178    *  G_xxx(X)        GET value.  This macro obtains a multi-bit field
179    *                  from a register, masks it, and shifts it to
180    *                  the bottom of the register (retrieving a K_xxx
181    *                  value, for example).
182    *
183    *  V_xxx(X)        VALUE.  This macro computes the value of a
184    *                  K_xxx constant shifted to the correct position
185    *                  in the register.
186    ********************************************************************* */
187
188
189
190
191/*
192 * Cast to 64-bit number.  Presumably the syntax is different in
193 * assembly language.
194 *
195 * Note: you'll need to define uint32_t and uint64_t in your headers.
196 */
197
198#if !defined(__ASSEMBLER__)
199#define _SB_MAKE64(x) ((uint64_t)(x))
200#define _SB_MAKE32(x) ((uint32_t)(x))
201#else
202#define _SB_MAKE64(x) (x)
203#define _SB_MAKE32(x) (x)
204#endif
205
206
207/*
208 * Make a mask for 1 bit at position 'n'
209 */
210
211#define _SB_MAKEMASK1(n) (_SB_MAKE64(1) << _SB_MAKE64(n))
212#define _SB_MAKEMASK1_32(n) (_SB_MAKE32(1) << _SB_MAKE32(n))
213
214/*
215 * Make a mask for 'v' bits at position 'n'
216 */
217
218#define _SB_MAKEMASK(v,n) (_SB_MAKE64((_SB_MAKE64(1)<<(v))-1) << _SB_MAKE64(n))
219#define _SB_MAKEMASK_32(v,n) (_SB_MAKE32((_SB_MAKE32(1)<<(v))-1) << _SB_MAKE32(n))
220
221/*
222 * Make a value at 'v' at bit position 'n'
223 */
224
225#define _SB_MAKEVALUE(v,n) (_SB_MAKE64(v) << _SB_MAKE64(n))
226#define _SB_MAKEVALUE_32(v,n) (_SB_MAKE32(v) << _SB_MAKE32(n))
227
228#define _SB_GETVALUE(v,n,m) ((_SB_MAKE64(v) & _SB_MAKE64(m)) >> _SB_MAKE64(n))
229#define _SB_GETVALUE_32(v,n,m) ((_SB_MAKE32(v) & _SB_MAKE32(m)) >> _SB_MAKE32(n))
230
231/*
232 * Macros to read/write on-chip registers
233 * XXX should we do the PHYS_TO_K1 here?
234 */
235
236
237#if defined(__mips64) && !defined(__ASSEMBLER__)
238#define SBWRITECSR(csr,val) *((volatile uint64_t *) PHYS_TO_K1(csr)) = (val)
239#define SBREADCSR(csr) (*((volatile uint64_t *) PHYS_TO_K1(csr)))
240#endif /* __ASSEMBLER__ */
241
242#endif
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