| 1 | /* ********************************************************************* |
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| 2 | * SB1250 Board Support Package |
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| 3 | * |
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| 4 | * MAC constants and macros File: sb1250_mac.h |
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| 5 | * |
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| 6 | * This module contains constants and macros for the SB1250's |
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| 7 | * ethernet controllers. |
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| 8 | * |
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| 9 | * SB1250 specification level: User's manual 1/02/02 |
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| 10 | * |
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| 11 | * Author: Mitch Lichtenberg |
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| 12 | * |
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| 13 | ********************************************************************* |
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| 14 | * |
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| 15 | * Copyright 2000,2001,2002,2003 |
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| 16 | * Broadcom Corporation. All rights reserved. |
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| 17 | * |
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| 18 | * This program is free software; you can redistribute it and/or |
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| 19 | * modify it under the terms of the GNU General Public License as |
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| 20 | * published by the Free Software Foundation; either version 2 of |
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| 21 | * the License, or (at your option) any later version. |
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| 22 | * |
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| 23 | * This program is distributed in the hope that it will be useful, |
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| 24 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
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| 25 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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| 26 | * GNU General Public License for more details. |
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| 27 | * |
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| 28 | * You should have received a copy of the GNU General Public License |
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| 29 | * along with this program; if not, write to the Free Software |
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| 30 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
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| 31 | * MA 02111-1307 USA |
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| 32 | ********************************************************************* */ |
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| 33 | |
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| 34 | |
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| 35 | #ifndef _SB1250_MAC_H |
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| 36 | #define _SB1250_MAC_H |
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| 37 | |
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| 38 | #include "sb1250_defs.h" |
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| 39 | |
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| 40 | /* ********************************************************************* |
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| 41 | * Ethernet MAC Registers |
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| 42 | ********************************************************************* */ |
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| 43 | |
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| 44 | /* |
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| 45 | * MAC Configuration Register (Table 9-13) |
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| 46 | * Register: MAC_CFG_0 |
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| 47 | * Register: MAC_CFG_1 |
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| 48 | * Register: MAC_CFG_2 |
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| 49 | */ |
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| 50 | |
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| 51 | |
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| 52 | #define M_MAC_RESERVED0 _SB_MAKEMASK1(0) |
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| 53 | #define M_MAC_TX_HOLD_SOP_EN _SB_MAKEMASK1(1) |
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| 54 | #define M_MAC_RETRY_EN _SB_MAKEMASK1(2) |
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| 55 | #define M_MAC_RET_DRPREQ_EN _SB_MAKEMASK1(3) |
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| 56 | #define M_MAC_RET_UFL_EN _SB_MAKEMASK1(4) |
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| 57 | #define M_MAC_BURST_EN _SB_MAKEMASK1(5) |
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| 58 | |
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| 59 | #define S_MAC_TX_PAUSE _SB_MAKE64(6) |
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| 60 | #define M_MAC_TX_PAUSE_CNT _SB_MAKEMASK(3,S_MAC_TX_PAUSE) |
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| 61 | #define V_MAC_TX_PAUSE_CNT(x) _SB_MAKEVALUE(x,S_MAC_TX_PAUSE) |
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| 62 | |
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| 63 | #define K_MAC_TX_PAUSE_CNT_512 0 |
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| 64 | #define K_MAC_TX_PAUSE_CNT_1K 1 |
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| 65 | #define K_MAC_TX_PAUSE_CNT_2K 2 |
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| 66 | #define K_MAC_TX_PAUSE_CNT_4K 3 |
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| 67 | #define K_MAC_TX_PAUSE_CNT_8K 4 |
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| 68 | #define K_MAC_TX_PAUSE_CNT_16K 5 |
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| 69 | #define K_MAC_TX_PAUSE_CNT_32K 6 |
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| 70 | #define K_MAC_TX_PAUSE_CNT_64K 7 |
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| 71 | |
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| 72 | #define V_MAC_TX_PAUSE_CNT_512 V_MAC_TX_PAUSE_CNT(K_MAC_TX_PAUSE_CNT_512) |
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| 73 | #define V_MAC_TX_PAUSE_CNT_1K V_MAC_TX_PAUSE_CNT(K_MAC_TX_PAUSE_CNT_1K) |
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| 74 | #define V_MAC_TX_PAUSE_CNT_2K V_MAC_TX_PAUSE_CNT(K_MAC_TX_PAUSE_CNT_2K) |
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| 75 | #define V_MAC_TX_PAUSE_CNT_4K V_MAC_TX_PAUSE_CNT(K_MAC_TX_PAUSE_CNT_4K) |
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| 76 | #define V_MAC_TX_PAUSE_CNT_8K V_MAC_TX_PAUSE_CNT(K_MAC_TX_PAUSE_CNT_8K) |
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| 77 | #define V_MAC_TX_PAUSE_CNT_16K V_MAC_TX_PAUSE_CNT(K_MAC_TX_PAUSE_CNT_16K) |
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| 78 | #define V_MAC_TX_PAUSE_CNT_32K V_MAC_TX_PAUSE_CNT(K_MAC_TX_PAUSE_CNT_32K) |
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| 79 | #define V_MAC_TX_PAUSE_CNT_64K V_MAC_TX_PAUSE_CNT(K_MAC_TX_PAUSE_CNT_64K) |
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| 80 | |
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| 81 | #define M_MAC_RESERVED1 _SB_MAKEMASK(8,9) |
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| 82 | |
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| 83 | #define M_MAC_AP_STAT_EN _SB_MAKEMASK1(17) |
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| 84 | #define M_MAC_RESERVED2 _SB_MAKEMASK1(18) |
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| 85 | #define M_MAC_DRP_ERRPKT_EN _SB_MAKEMASK1(19) |
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| 86 | #define M_MAC_DRP_FCSERRPKT_EN _SB_MAKEMASK1(20) |
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| 87 | #define M_MAC_DRP_CODEERRPKT_EN _SB_MAKEMASK1(21) |
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| 88 | #define M_MAC_DRP_DRBLERRPKT_EN _SB_MAKEMASK1(22) |
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| 89 | #define M_MAC_DRP_RNTPKT_EN _SB_MAKEMASK1(23) |
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| 90 | #define M_MAC_DRP_OSZPKT_EN _SB_MAKEMASK1(24) |
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| 91 | #define M_MAC_DRP_LENERRPKT_EN _SB_MAKEMASK1(25) |
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| 92 | |
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| 93 | #define M_MAC_RESERVED3 _SB_MAKEMASK(6,26) |
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| 94 | |
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| 95 | #define M_MAC_BYPASS_SEL _SB_MAKEMASK1(32) |
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| 96 | #define M_MAC_HDX_EN _SB_MAKEMASK1(33) |
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| 97 | |
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| 98 | #define S_MAC_SPEED_SEL _SB_MAKE64(34) |
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| 99 | #define M_MAC_SPEED_SEL _SB_MAKEMASK(2,S_MAC_SPEED_SEL) |
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| 100 | #define V_MAC_SPEED_SEL(x) _SB_MAKEVALUE(x,S_MAC_SPEED_SEL) |
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| 101 | #define G_MAC_SPEED_SEL(x) _SB_GETVALUE(x,S_MAC_SPEED_SEL,M_MAC_SPEED_SEL) |
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| 102 | |
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| 103 | #define K_MAC_SPEED_SEL_10MBPS 0 |
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| 104 | #define K_MAC_SPEED_SEL_100MBPS 1 |
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| 105 | #define K_MAC_SPEED_SEL_1000MBPS 2 |
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| 106 | #define K_MAC_SPEED_SEL_RESERVED 3 |
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| 107 | |
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| 108 | #define V_MAC_SPEED_SEL_10MBPS V_MAC_SPEED_SEL(K_MAC_SPEED_SEL_10MBPS) |
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| 109 | #define V_MAC_SPEED_SEL_100MBPS V_MAC_SPEED_SEL(K_MAC_SPEED_SEL_100MBPS) |
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| 110 | #define V_MAC_SPEED_SEL_1000MBPS V_MAC_SPEED_SEL(K_MAC_SPEED_SEL_1000MBPS) |
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| 111 | #define V_MAC_SPEED_SEL_RESERVED V_MAC_SPEED_SEL(K_MAC_SPEED_SEL_RESERVED) |
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| 112 | |
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| 113 | #define M_MAC_TX_CLK_EDGE_SEL _SB_MAKEMASK1(36) |
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| 114 | #define M_MAC_LOOPBACK_SEL _SB_MAKEMASK1(37) |
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| 115 | #define M_MAC_FAST_SYNC _SB_MAKEMASK1(38) |
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| 116 | #define M_MAC_SS_EN _SB_MAKEMASK1(39) |
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| 117 | |
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| 118 | #define S_MAC_BYPASS_CFG _SB_MAKE64(40) |
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| 119 | #define M_MAC_BYPASS_CFG _SB_MAKEMASK(2,S_MAC_BYPASS_CFG) |
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| 120 | #define V_MAC_BYPASS_CFG(x) _SB_MAKEVALUE(x,S_MAC_BYPASS_CFG) |
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| 121 | #define G_MAC_BYPASS_CFG(x) _SB_GETVALUE(x,S_MAC_BYPASS_CFG,M_MAC_BYPASS_CFG) |
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| 122 | |
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| 123 | #define K_MAC_BYPASS_GMII 0 |
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| 124 | #define K_MAC_BYPASS_ENCODED 1 |
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| 125 | #define K_MAC_BYPASS_SOP 2 |
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| 126 | #define K_MAC_BYPASS_EOP 3 |
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| 127 | |
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| 128 | #define M_MAC_BYPASS_16 _SB_MAKEMASK1(42) |
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| 129 | #define M_MAC_BYPASS_FCS_CHK _SB_MAKEMASK1(43) |
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| 130 | |
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| 131 | #if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1) |
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| 132 | #define M_MAC_RX_CH_SEL_MSB _SB_MAKEMASK1(44) |
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| 133 | #endif /* 1250 PASS2 || 112x PASS1 */ |
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| 134 | |
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| 135 | #if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1) |
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| 136 | #define M_MAC_SPLIT_CH_SEL _SB_MAKEMASK1(45) |
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| 137 | #endif /* 1250 PASS3 || 112x PASS1 */ |
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| 138 | |
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| 139 | #define S_MAC_BYPASS_IFG _SB_MAKE64(46) |
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| 140 | #define M_MAC_BYPASS_IFG _SB_MAKEMASK(8,S_MAC_BYPASS_IFG) |
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| 141 | #define V_MAC_BYPASS_IFG(x) _SB_MAKEVALUE(x,S_MAC_BYPASS_IFG) |
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| 142 | #define G_MAC_BYPASS_IFG(x) _SB_GETVALUE(x,S_MAC_BYPASS_IFG,M_MAC_BYPASS_IFG) |
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| 143 | |
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| 144 | #define K_MAC_FC_CMD_DISABLED 0 |
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| 145 | #define K_MAC_FC_CMD_ENABLED 1 |
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| 146 | #define K_MAC_FC_CMD_ENAB_FALSECARR 2 |
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| 147 | |
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| 148 | #define V_MAC_FC_CMD_DISABLED V_MAC_FC_CMD(K_MAC_FC_CMD_DISABLED) |
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| 149 | #define V_MAC_FC_CMD_ENABLED V_MAC_FC_CMD(K_MAC_FC_CMD_ENABLED) |
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| 150 | #define V_MAC_FC_CMD_ENAB_FALSECARR V_MAC_FC_CMD(K_MAC_FC_CMD_ENAB_FALSECARR) |
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| 151 | |
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| 152 | #define M_MAC_FC_SEL _SB_MAKEMASK1(54) |
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| 153 | |
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| 154 | #define S_MAC_FC_CMD _SB_MAKE64(55) |
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| 155 | #define M_MAC_FC_CMD _SB_MAKEMASK(2,S_MAC_FC_CMD) |
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| 156 | #define V_MAC_FC_CMD(x) _SB_MAKEVALUE(x,S_MAC_FC_CMD) |
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| 157 | #define G_MAC_FC_CMD(x) _SB_GETVALUE(x,S_MAC_FC_CMD,M_MAC_FC_CMD) |
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| 158 | |
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| 159 | #define S_MAC_RX_CH_SEL _SB_MAKE64(57) |
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| 160 | #define M_MAC_RX_CH_SEL _SB_MAKEMASK(7,S_MAC_RX_CH_SEL) |
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| 161 | #define V_MAC_RX_CH_SEL(x) _SB_MAKEVALUE(x,S_MAC_RX_CH_SEL) |
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| 162 | #define G_MAC_RX_CH_SEL(x) _SB_GETVALUE(x,S_MAC_RX_CH_SEL,M_MAC_RX_CH_SEL) |
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| 163 | |
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| 164 | |
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| 165 | /* |
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| 166 | * MAC Enable Registers |
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| 167 | * Register: MAC_ENABLE_0 |
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| 168 | * Register: MAC_ENABLE_1 |
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| 169 | * Register: MAC_ENABLE_2 |
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| 170 | */ |
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| 171 | |
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| 172 | #define M_MAC_RXDMA_EN0 _SB_MAKEMASK1(0) |
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| 173 | #define M_MAC_RXDMA_EN1 _SB_MAKEMASK1(1) |
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| 174 | #define M_MAC_TXDMA_EN0 _SB_MAKEMASK1(4) |
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| 175 | #define M_MAC_TXDMA_EN1 _SB_MAKEMASK1(5) |
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| 176 | |
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| 177 | #define M_MAC_PORT_RESET _SB_MAKEMASK1(8) |
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| 178 | |
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| 179 | #define M_MAC_RX_ENABLE _SB_MAKEMASK1(10) |
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| 180 | #define M_MAC_TX_ENABLE _SB_MAKEMASK1(11) |
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| 181 | #define M_MAC_BYP_RX_ENABLE _SB_MAKEMASK1(12) |
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| 182 | #define M_MAC_BYP_TX_ENABLE _SB_MAKEMASK1(13) |
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| 183 | |
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| 184 | /* |
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| 185 | * MAC DMA Control Register |
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| 186 | * Register: MAC_TXD_CTL_0 |
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| 187 | * Register: MAC_TXD_CTL_1 |
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| 188 | * Register: MAC_TXD_CTL_2 |
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| 189 | */ |
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| 190 | |
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| 191 | #define S_MAC_TXD_WEIGHT0 _SB_MAKE64(0) |
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| 192 | #define M_MAC_TXD_WEIGHT0 _SB_MAKEMASK(4,S_MAC_TXD_WEIGHT0) |
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| 193 | #define V_MAC_TXD_WEIGHT0(x) _SB_MAKEVALUE(x,S_MAC_TXD_WEIGHT0) |
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| 194 | #define G_MAC_TXD_WEIGHT0(x) _SB_GETVALUE(x,S_MAC_TXD_WEIGHT0,M_MAC_TXD_WEIGHT0) |
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| 195 | |
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| 196 | #define S_MAC_TXD_WEIGHT1 _SB_MAKE64(4) |
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| 197 | #define M_MAC_TXD_WEIGHT1 _SB_MAKEMASK(4,S_MAC_TXD_WEIGHT1) |
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| 198 | #define V_MAC_TXD_WEIGHT1(x) _SB_MAKEVALUE(x,S_MAC_TXD_WEIGHT1) |
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| 199 | #define G_MAC_TXD_WEIGHT1(x) _SB_GETVALUE(x,S_MAC_TXD_WEIGHT1,M_MAC_TXD_WEIGHT1) |
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| 200 | |
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| 201 | /* |
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| 202 | * MAC Fifo Threshhold registers (Table 9-14) |
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| 203 | * Register: MAC_THRSH_CFG_0 |
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| 204 | * Register: MAC_THRSH_CFG_1 |
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| 205 | * Register: MAC_THRSH_CFG_2 |
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| 206 | */ |
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| 207 | |
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| 208 | #define S_MAC_TX_WR_THRSH _SB_MAKE64(0) |
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| 209 | #if SIBYTE_HDR_FEATURE_UP_TO(1250, PASS1) |
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| 210 | /* XXX: Can't enable, as it has the same name as a pass2+ define below. */ |
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| 211 | /* #define M_MAC_TX_WR_THRSH _SB_MAKEMASK(6,S_MAC_TX_WR_THRSH) */ |
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| 212 | #endif /* up to 1250 PASS1 */ |
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| 213 | #if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1) |
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| 214 | #define M_MAC_TX_WR_THRSH _SB_MAKEMASK(7,S_MAC_TX_WR_THRSH) |
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| 215 | #endif /* 1250 PASS2 || 112x PASS1 */ |
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| 216 | #define V_MAC_TX_WR_THRSH(x) _SB_MAKEVALUE(x,S_MAC_TX_WR_THRSH) |
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| 217 | #define G_MAC_TX_WR_THRSH(x) _SB_GETVALUE(x,S_MAC_TX_WR_THRSH,M_MAC_TX_WR_THRSH) |
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| 218 | |
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| 219 | #define S_MAC_TX_RD_THRSH _SB_MAKE64(8) |
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| 220 | #if SIBYTE_HDR_FEATURE_UP_TO(1250, PASS1) |
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| 221 | /* XXX: Can't enable, as it has the same name as a pass2+ define below. */ |
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| 222 | /* #define M_MAC_TX_RD_THRSH _SB_MAKEMASK(6,S_MAC_TX_RD_THRSH) */ |
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| 223 | #endif /* up to 1250 PASS1 */ |
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| 224 | #if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1) |
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| 225 | #define M_MAC_TX_RD_THRSH _SB_MAKEMASK(7,S_MAC_TX_RD_THRSH) |
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| 226 | #endif /* 1250 PASS2 || 112x PASS1 */ |
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| 227 | #define V_MAC_TX_RD_THRSH(x) _SB_MAKEVALUE(x,S_MAC_TX_RD_THRSH) |
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| 228 | #define G_MAC_TX_RD_THRSH(x) _SB_GETVALUE(x,S_MAC_TX_RD_THRSH,M_MAC_TX_RD_THRSH) |
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| 229 | |
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| 230 | #define S_MAC_TX_RL_THRSH _SB_MAKE64(16) |
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| 231 | #define M_MAC_TX_RL_THRSH _SB_MAKEMASK(4,S_MAC_TX_RL_THRSH) |
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| 232 | #define V_MAC_TX_RL_THRSH(x) _SB_MAKEVALUE(x,S_MAC_TX_RL_THRSH) |
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| 233 | #define G_MAC_TX_RL_THRSH(x) _SB_GETVALUE(x,S_MAC_TX_RL_THRSH,M_MAC_TX_RL_THRSH) |
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| 234 | |
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| 235 | #define S_MAC_RX_PL_THRSH _SB_MAKE64(24) |
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| 236 | #define M_MAC_RX_PL_THRSH _SB_MAKEMASK(6,S_MAC_RX_PL_THRSH) |
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| 237 | #define V_MAC_RX_PL_THRSH(x) _SB_MAKEVALUE(x,S_MAC_RX_PL_THRSH) |
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| 238 | #define G_MAC_RX_PL_THRSH(x) _SB_GETVALUE(x,S_MAC_RX_PL_THRSH,M_MAC_RX_PL_THRSH) |
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| 239 | |
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| 240 | #define S_MAC_RX_RD_THRSH _SB_MAKE64(32) |
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| 241 | #define M_MAC_RX_RD_THRSH _SB_MAKEMASK(6,S_MAC_RX_RD_THRSH) |
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| 242 | #define V_MAC_RX_RD_THRSH(x) _SB_MAKEVALUE(x,S_MAC_RX_RD_THRSH) |
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| 243 | #define G_MAC_RX_RD_THRSH(x) _SB_GETVALUE(x,S_MAC_RX_RD_THRSH,M_MAC_RX_RD_THRSH) |
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| 244 | |
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| 245 | #define S_MAC_RX_RL_THRSH _SB_MAKE64(40) |
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| 246 | #define M_MAC_RX_RL_THRSH _SB_MAKEMASK(6,S_MAC_RX_RL_THRSH) |
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| 247 | #define V_MAC_RX_RL_THRSH(x) _SB_MAKEVALUE(x,S_MAC_RX_RL_THRSH) |
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| 248 | #define G_MAC_RX_RL_THRSH(x) _SB_GETVALUE(x,S_MAC_RX_RL_THRSH,M_MAC_RX_RL_THRSH) |
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| 249 | |
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| 250 | #if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1) |
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| 251 | #define S_MAC_ENC_FC_THRSH _SB_MAKE64(56) |
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| 252 | #define M_MAC_ENC_FC_THRSH _SB_MAKEMASK(6,S_MAC_ENC_FC_THRSH) |
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| 253 | #define V_MAC_ENC_FC_THRSH(x) _SB_MAKEVALUE(x,S_MAC_ENC_FC_THRSH) |
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| 254 | #define G_MAC_ENC_FC_THRSH(x) _SB_GETVALUE(x,S_MAC_ENC_FC_THRSH,M_MAC_ENC_FC_THRSH) |
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| 255 | #endif /* 1250 PASS2 || 112x PASS1 */ |
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| 256 | |
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| 257 | /* |
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| 258 | * MAC Frame Configuration Registers (Table 9-15) |
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| 259 | * Register: MAC_FRAME_CFG_0 |
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| 260 | * Register: MAC_FRAME_CFG_1 |
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| 261 | * Register: MAC_FRAME_CFG_2 |
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| 262 | */ |
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| 263 | |
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| 264 | /* XXXCGD: ??? Unused in pass2? */ |
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| 265 | #define S_MAC_IFG_RX _SB_MAKE64(0) |
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| 266 | #define M_MAC_IFG_RX _SB_MAKEMASK(6,S_MAC_IFG_RX) |
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| 267 | #define V_MAC_IFG_RX(x) _SB_MAKEVALUE(x,S_MAC_IFG_RX) |
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| 268 | #define G_MAC_IFG_RX(x) _SB_GETVALUE(x,S_MAC_IFG_RX,M_MAC_IFG_RX) |
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| 269 | |
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| 270 | #if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1) |
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| 271 | #define S_MAC_PRE_LEN _SB_MAKE64(0) |
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| 272 | #define M_MAC_PRE_LEN _SB_MAKEMASK(6,S_MAC_PRE_LEN) |
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| 273 | #define V_MAC_PRE_LEN(x) _SB_MAKEVALUE(x,S_MAC_PRE_LEN) |
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| 274 | #define G_MAC_PRE_LEN(x) _SB_GETVALUE(x,S_MAC_PRE_LEN,M_MAC_PRE_LEN) |
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| 275 | #endif /* 1250 PASS3 || 112x PASS1 */ |
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| 276 | |
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| 277 | #define S_MAC_IFG_TX _SB_MAKE64(6) |
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| 278 | #define M_MAC_IFG_TX _SB_MAKEMASK(6,S_MAC_IFG_TX) |
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| 279 | #define V_MAC_IFG_TX(x) _SB_MAKEVALUE(x,S_MAC_IFG_TX) |
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| 280 | #define G_MAC_IFG_TX(x) _SB_GETVALUE(x,S_MAC_IFG_TX,M_MAC_IFG_TX) |
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| 281 | |
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| 282 | #define S_MAC_IFG_THRSH _SB_MAKE64(12) |
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| 283 | #define M_MAC_IFG_THRSH _SB_MAKEMASK(6,S_MAC_IFG_THRSH) |
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| 284 | #define V_MAC_IFG_THRSH(x) _SB_MAKEVALUE(x,S_MAC_IFG_THRSH) |
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| 285 | #define G_MAC_IFG_THRSH(x) _SB_GETVALUE(x,S_MAC_IFG_THRSH,M_MAC_IFG_THRSH) |
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| 286 | |
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| 287 | #define S_MAC_BACKOFF_SEL _SB_MAKE64(18) |
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| 288 | #define M_MAC_BACKOFF_SEL _SB_MAKEMASK(4,S_MAC_BACKOFF_SEL) |
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| 289 | #define V_MAC_BACKOFF_SEL(x) _SB_MAKEVALUE(x,S_MAC_BACKOFF_SEL) |
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| 290 | #define G_MAC_BACKOFF_SEL(x) _SB_GETVALUE(x,S_MAC_BACKOFF_SEL,M_MAC_BACKOFF_SEL) |
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| 291 | |
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| 292 | #define S_MAC_LFSR_SEED _SB_MAKE64(22) |
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| 293 | #define M_MAC_LFSR_SEED _SB_MAKEMASK(8,S_MAC_LFSR_SEED) |
|---|
| 294 | #define V_MAC_LFSR_SEED(x) _SB_MAKEVALUE(x,S_MAC_LFSR_SEED) |
|---|
| 295 | #define G_MAC_LFSR_SEED(x) _SB_GETVALUE(x,S_MAC_LFSR_SEED,M_MAC_LFSR_SEED) |
|---|
| 296 | |
|---|
| 297 | #define S_MAC_SLOT_SIZE _SB_MAKE64(30) |
|---|
| 298 | #define M_MAC_SLOT_SIZE _SB_MAKEMASK(10,S_MAC_SLOT_SIZE) |
|---|
| 299 | #define V_MAC_SLOT_SIZE(x) _SB_MAKEVALUE(x,S_MAC_SLOT_SIZE) |
|---|
| 300 | #define G_MAC_SLOT_SIZE(x) _SB_GETVALUE(x,S_MAC_SLOT_SIZE,M_MAC_SLOT_SIZE) |
|---|
| 301 | |
|---|
| 302 | #define S_MAC_MIN_FRAMESZ _SB_MAKE64(40) |
|---|
| 303 | #define M_MAC_MIN_FRAMESZ _SB_MAKEMASK(8,S_MAC_MIN_FRAMESZ) |
|---|
| 304 | #define V_MAC_MIN_FRAMESZ(x) _SB_MAKEVALUE(x,S_MAC_MIN_FRAMESZ) |
|---|
| 305 | #define G_MAC_MIN_FRAMESZ(x) _SB_GETVALUE(x,S_MAC_MIN_FRAMESZ,M_MAC_MIN_FRAMESZ) |
|---|
| 306 | |
|---|
| 307 | #define S_MAC_MAX_FRAMESZ _SB_MAKE64(48) |
|---|
| 308 | #define M_MAC_MAX_FRAMESZ _SB_MAKEMASK(16,S_MAC_MAX_FRAMESZ) |
|---|
| 309 | #define V_MAC_MAX_FRAMESZ(x) _SB_MAKEVALUE(x,S_MAC_MAX_FRAMESZ) |
|---|
| 310 | #define G_MAC_MAX_FRAMESZ(x) _SB_GETVALUE(x,S_MAC_MAX_FRAMESZ,M_MAC_MAX_FRAMESZ) |
|---|
| 311 | |
|---|
| 312 | /* |
|---|
| 313 | * These constants are used to configure the fields within the Frame |
|---|
| 314 | * Configuration Register. |
|---|
| 315 | */ |
|---|
| 316 | |
|---|
| 317 | #define K_MAC_IFG_RX_10 _SB_MAKE64(0) /* See table 176, not used */ |
|---|
| 318 | #define K_MAC_IFG_RX_100 _SB_MAKE64(0) |
|---|
| 319 | #define K_MAC_IFG_RX_1000 _SB_MAKE64(0) |
|---|
| 320 | |
|---|
| 321 | #define K_MAC_IFG_TX_10 _SB_MAKE64(20) |
|---|
| 322 | #define K_MAC_IFG_TX_100 _SB_MAKE64(20) |
|---|
| 323 | #define K_MAC_IFG_TX_1000 _SB_MAKE64(8) |
|---|
| 324 | |
|---|
| 325 | #define K_MAC_IFG_THRSH_10 _SB_MAKE64(4) |
|---|
| 326 | #define K_MAC_IFG_THRSH_100 _SB_MAKE64(4) |
|---|
| 327 | #define K_MAC_IFG_THRSH_1000 _SB_MAKE64(0) |
|---|
| 328 | |
|---|
| 329 | #define K_MAC_SLOT_SIZE_10 _SB_MAKE64(0) |
|---|
| 330 | #define K_MAC_SLOT_SIZE_100 _SB_MAKE64(0) |
|---|
| 331 | #define K_MAC_SLOT_SIZE_1000 _SB_MAKE64(0) |
|---|
| 332 | |
|---|
| 333 | #define V_MAC_IFG_RX_10 V_MAC_IFG_RX(K_MAC_IFG_RX_10) |
|---|
| 334 | #define V_MAC_IFG_RX_100 V_MAC_IFG_RX(K_MAC_IFG_RX_100) |
|---|
| 335 | #define V_MAC_IFG_RX_1000 V_MAC_IFG_RX(K_MAC_IFG_RX_1000) |
|---|
| 336 | |
|---|
| 337 | #define V_MAC_IFG_TX_10 V_MAC_IFG_TX(K_MAC_IFG_TX_10) |
|---|
| 338 | #define V_MAC_IFG_TX_100 V_MAC_IFG_TX(K_MAC_IFG_TX_100) |
|---|
| 339 | #define V_MAC_IFG_TX_1000 V_MAC_IFG_TX(K_MAC_IFG_TX_1000) |
|---|
| 340 | |
|---|
| 341 | #define V_MAC_IFG_THRSH_10 V_MAC_IFG_THRSH(K_MAC_IFG_THRSH_10) |
|---|
| 342 | #define V_MAC_IFG_THRSH_100 V_MAC_IFG_THRSH(K_MAC_IFG_THRSH_100) |
|---|
| 343 | #define V_MAC_IFG_THRSH_1000 V_MAC_IFG_THRSH(K_MAC_IFG_THRSH_1000) |
|---|
| 344 | |
|---|
| 345 | #define V_MAC_SLOT_SIZE_10 V_MAC_SLOT_SIZE(K_MAC_SLOT_SIZE_10) |
|---|
| 346 | #define V_MAC_SLOT_SIZE_100 V_MAC_SLOT_SIZE(K_MAC_SLOT_SIZE_100) |
|---|
| 347 | #define V_MAC_SLOT_SIZE_1000 V_MAC_SLOT_SIZE(K_MAC_SLOT_SIZE_1000) |
|---|
| 348 | |
|---|
| 349 | #define K_MAC_MIN_FRAMESZ_FIFO _SB_MAKE64(9) |
|---|
| 350 | #define K_MAC_MIN_FRAMESZ_DEFAULT _SB_MAKE64(64) |
|---|
| 351 | #define K_MAC_MAX_FRAMESZ_DEFAULT _SB_MAKE64(1518) |
|---|
| 352 | #define K_MAC_MAX_FRAMESZ_JUMBO _SB_MAKE64(9216) |
|---|
| 353 | |
|---|
| 354 | #define V_MAC_MIN_FRAMESZ_FIFO V_MAC_MIN_FRAMESZ(K_MAC_MIN_FRAMESZ_FIFO) |
|---|
| 355 | #define V_MAC_MIN_FRAMESZ_DEFAULT V_MAC_MIN_FRAMESZ(K_MAC_MIN_FRAMESZ_DEFAULT) |
|---|
| 356 | #define V_MAC_MAX_FRAMESZ_DEFAULT V_MAC_MAX_FRAMESZ(K_MAC_MAX_FRAMESZ_DEFAULT) |
|---|
| 357 | #define V_MAC_MAX_FRAMESZ_JUMBO V_MAC_MAX_FRAMESZ(K_MAC_MAX_FRAMESZ_JUMBO) |
|---|
| 358 | |
|---|
| 359 | /* |
|---|
| 360 | * MAC VLAN Tag Registers (Table 9-16) |
|---|
| 361 | * Register: MAC_VLANTAG_0 |
|---|
| 362 | * Register: MAC_VLANTAG_1 |
|---|
| 363 | * Register: MAC_VLANTAG_2 |
|---|
| 364 | */ |
|---|
| 365 | |
|---|
| 366 | #define S_MAC_VLAN_TAG _SB_MAKE64(0) |
|---|
| 367 | #define M_MAC_VLAN_TAG _SB_MAKEMASK(32,S_MAC_VLAN_TAG) |
|---|
| 368 | #define V_MAC_VLAN_TAG(x) _SB_MAKEVALUE(x,S_MAC_VLAN_TAG) |
|---|
| 369 | #define G_MAC_VLAN_TAG(x) _SB_GETVALUE(x,S_MAC_VLAN_TAG,M_MAC_VLAN_TAG) |
|---|
| 370 | |
|---|
| 371 | #if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1) |
|---|
| 372 | #define S_MAC_TX_PKT_OFFSET _SB_MAKE64(32) |
|---|
| 373 | #define M_MAC_TX_PKT_OFFSET _SB_MAKEMASK(8,S_MAC_TX_PKT_OFFSET) |
|---|
| 374 | #define V_MAC_TX_PKT_OFFSET(x) _SB_MAKEVALUE(x,S_MAC_TX_PKT_OFFSET) |
|---|
| 375 | #define G_MAC_TX_PKT_OFFSET(x) _SB_GETVALUE(x,S_MAC_TX_PKT_OFFSET,M_MAC_TX_PKT_OFFSET) |
|---|
| 376 | |
|---|
| 377 | #define S_MAC_TX_CRC_OFFSET _SB_MAKE64(40) |
|---|
| 378 | #define M_MAC_TX_CRC_OFFSET _SB_MAKEMASK(8,S_MAC_TX_CRC_OFFSET) |
|---|
| 379 | #define V_MAC_TX_CRC_OFFSET(x) _SB_MAKEVALUE(x,S_MAC_TX_CRC_OFFSET) |
|---|
| 380 | #define G_MAC_TX_CRC_OFFSET(x) _SB_GETVALUE(x,S_MAC_TX_CRC_OFFSET,M_MAC_TX_CRC_OFFSET) |
|---|
| 381 | |
|---|
| 382 | #define M_MAC_CH_BASE_FC_EN _SB_MAKEMASK1(48) |
|---|
| 383 | #endif /* 1250 PASS3 || 112x PASS1 */ |
|---|
| 384 | |
|---|
| 385 | /* |
|---|
| 386 | * MAC Status Registers (Table 9-17) |
|---|
| 387 | * Also used for the MAC Interrupt Mask Register (Table 9-18) |
|---|
| 388 | * Register: MAC_STATUS_0 |
|---|
| 389 | * Register: MAC_STATUS_1 |
|---|
| 390 | * Register: MAC_STATUS_2 |
|---|
| 391 | * Register: MAC_INT_MASK_0 |
|---|
| 392 | * Register: MAC_INT_MASK_1 |
|---|
| 393 | * Register: MAC_INT_MASK_2 |
|---|
| 394 | */ |
|---|
| 395 | |
|---|
| 396 | /* |
|---|
| 397 | * Use these constants to shift the appropriate channel |
|---|
| 398 | * into the CH0 position so the same tests can be used |
|---|
| 399 | * on each channel. |
|---|
| 400 | */ |
|---|
| 401 | |
|---|
| 402 | #define S_MAC_RX_CH0 _SB_MAKE64(0) |
|---|
| 403 | #define S_MAC_RX_CH1 _SB_MAKE64(8) |
|---|
| 404 | #define S_MAC_TX_CH0 _SB_MAKE64(16) |
|---|
| 405 | #define S_MAC_TX_CH1 _SB_MAKE64(24) |
|---|
| 406 | |
|---|
| 407 | #define S_MAC_TXCHANNELS _SB_MAKE64(16) /* this is 1st TX chan */ |
|---|
| 408 | #define S_MAC_CHANWIDTH _SB_MAKE64(8) /* bits between channels */ |
|---|
| 409 | |
|---|
| 410 | /* |
|---|
| 411 | * These are the same as RX channel 0. The idea here |
|---|
| 412 | * is that you'll use one of the "S_" things above |
|---|
| 413 | * and pass just the six bits to a DMA-channel-specific ISR |
|---|
| 414 | */ |
|---|
| 415 | #define M_MAC_INT_CHANNEL _SB_MAKEMASK(8,0) |
|---|
| 416 | #define M_MAC_INT_EOP_COUNT _SB_MAKEMASK1(0) |
|---|
| 417 | #define M_MAC_INT_EOP_TIMER _SB_MAKEMASK1(1) |
|---|
| 418 | #define M_MAC_INT_EOP_SEEN _SB_MAKEMASK1(2) |
|---|
| 419 | #define M_MAC_INT_HWM _SB_MAKEMASK1(3) |
|---|
| 420 | #define M_MAC_INT_LWM _SB_MAKEMASK1(4) |
|---|
| 421 | #define M_MAC_INT_DSCR _SB_MAKEMASK1(5) |
|---|
| 422 | #define M_MAC_INT_ERR _SB_MAKEMASK1(6) |
|---|
| 423 | #define M_MAC_INT_DZERO _SB_MAKEMASK1(7) /* only for TX channels */ |
|---|
| 424 | #define M_MAC_INT_DROP _SB_MAKEMASK1(7) /* only for RX channels */ |
|---|
| 425 | |
|---|
| 426 | /* |
|---|
| 427 | * In the following definitions we use ch (0/1) and txrx (TX=1, RX=0, see |
|---|
| 428 | * also DMA_TX/DMA_RX in sb_regs.h). |
|---|
| 429 | */ |
|---|
| 430 | #define S_MAC_STATUS_CH_OFFSET(ch,txrx) _SB_MAKE64(((ch) + 2 * (txrx)) * S_MAC_CHANWIDTH) |
|---|
| 431 | |
|---|
| 432 | #define M_MAC_STATUS_CHANNEL(ch,txrx) _SB_MAKEVALUE(_SB_MAKEMASK(8,0),S_MAC_STATUS_CH_OFFSET(ch,txrx)) |
|---|
| 433 | #define M_MAC_STATUS_EOP_COUNT(ch,txrx) _SB_MAKEVALUE(M_MAC_INT_EOP_COUNT,S_MAC_STATUS_CH_OFFSET(ch,txrx)) |
|---|
| 434 | #define M_MAC_STATUS_EOP_TIMER(ch,txrx) _SB_MAKEVALUE(M_MAC_INT_EOP_TIMER,S_MAC_STATUS_CH_OFFSET(ch,txrx)) |
|---|
| 435 | #define M_MAC_STATUS_EOP_SEEN(ch,txrx) _SB_MAKEVALUE(M_MAC_INT_EOP_SEEN,S_MAC_STATUS_CH_OFFSET(ch,txrx)) |
|---|
| 436 | #define M_MAC_STATUS_HWM(ch,txrx) _SB_MAKEVALUE(M_MAC_INT_HWM,S_MAC_STATUS_CH_OFFSET(ch,txrx)) |
|---|
| 437 | #define M_MAC_STATUS_LWM(ch,txrx) _SB_MAKEVALUE(M_MAC_INT_LWM,S_MAC_STATUS_CH_OFFSET(ch,txrx)) |
|---|
| 438 | #define M_MAC_STATUS_DSCR(ch,txrx) _SB_MAKEVALUE(M_MAC_INT_DSCR,S_MAC_STATUS_CH_OFFSET(ch,txrx)) |
|---|
| 439 | #define M_MAC_STATUS_ERR(ch,txrx) _SB_MAKEVALUE(M_MAC_INT_ERR,S_MAC_STATUS_CH_OFFSET(ch,txrx)) |
|---|
| 440 | #define M_MAC_STATUS_DZERO(ch,txrx) _SB_MAKEVALUE(M_MAC_INT_DZERO,S_MAC_STATUS_CH_OFFSET(ch,txrx)) |
|---|
| 441 | #define M_MAC_STATUS_DROP(ch,txrx) _SB_MAKEVALUE(M_MAC_INT_DROP,S_MAC_STATUS_CH_OFFSET(ch,txrx)) |
|---|
| 442 | #define M_MAC_STATUS_OTHER_ERR _SB_MAKEVALUE(_SB_MAKEMASK(7,0),40) |
|---|
| 443 | |
|---|
| 444 | |
|---|
| 445 | #define M_MAC_RX_UNDRFL _SB_MAKEMASK1(40) |
|---|
| 446 | #define M_MAC_RX_OVRFL _SB_MAKEMASK1(41) |
|---|
| 447 | #define M_MAC_TX_UNDRFL _SB_MAKEMASK1(42) |
|---|
| 448 | #define M_MAC_TX_OVRFL _SB_MAKEMASK1(43) |
|---|
| 449 | #define M_MAC_LTCOL_ERR _SB_MAKEMASK1(44) |
|---|
| 450 | #define M_MAC_EXCOL_ERR _SB_MAKEMASK1(45) |
|---|
| 451 | #define M_MAC_CNTR_OVRFL_ERR _SB_MAKEMASK1(46) |
|---|
| 452 | #if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1) |
|---|
| 453 | #define M_MAC_SPLIT_EN _SB_MAKEMASK1(47) /* interrupt mask only */ |
|---|
| 454 | #endif /* 1250 PASS2 || 112x PASS1 */ |
|---|
| 455 | |
|---|
| 456 | #define S_MAC_COUNTER_ADDR _SB_MAKE64(47) |
|---|
| 457 | #define M_MAC_COUNTER_ADDR _SB_MAKEMASK(5,S_MAC_COUNTER_ADDR) |
|---|
| 458 | #define V_MAC_COUNTER_ADDR(x) _SB_MAKEVALUE(x,S_MAC_COUNTER_ADDR) |
|---|
| 459 | #define G_MAC_COUNTER_ADDR(x) _SB_GETVALUE(x,S_MAC_COUNTER_ADDR,M_MAC_COUNTER_ADDR) |
|---|
| 460 | |
|---|
| 461 | #if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1) |
|---|
| 462 | #define M_MAC_TX_PAUSE_ON _SB_MAKEMASK1(52) |
|---|
| 463 | #endif /* 1250 PASS3 || 112x PASS1 */ |
|---|
| 464 | |
|---|
| 465 | /* |
|---|
| 466 | * MAC Fifo Pointer Registers (Table 9-19) [Debug register] |
|---|
| 467 | * Register: MAC_FIFO_PTRS_0 |
|---|
| 468 | * Register: MAC_FIFO_PTRS_1 |
|---|
| 469 | * Register: MAC_FIFO_PTRS_2 |
|---|
| 470 | */ |
|---|
| 471 | |
|---|
| 472 | #define S_MAC_TX_WRPTR _SB_MAKE64(0) |
|---|
| 473 | #define M_MAC_TX_WRPTR _SB_MAKEMASK(6,S_MAC_TX_WRPTR) |
|---|
| 474 | #define V_MAC_TX_WRPTR(x) _SB_MAKEVALUE(x,S_MAC_TX_WRPTR) |
|---|
| 475 | #define G_MAC_TX_WRPTR(x) _SB_GETVALUE(x,S_MAC_TX_WRPTR,M_MAC_TX_WRPTR) |
|---|
| 476 | |
|---|
| 477 | #define S_MAC_TX_RDPTR _SB_MAKE64(8) |
|---|
| 478 | #define M_MAC_TX_RDPTR _SB_MAKEMASK(6,S_MAC_TX_RDPTR) |
|---|
| 479 | #define V_MAC_TX_RDPTR(x) _SB_MAKEVALUE(x,S_MAC_TX_RDPTR) |
|---|
| 480 | #define G_MAC_TX_RDPTR(x) _SB_GETVALUE(x,S_MAC_TX_RDPTR,M_MAC_TX_RDPTR) |
|---|
| 481 | |
|---|
| 482 | #define S_MAC_RX_WRPTR _SB_MAKE64(16) |
|---|
| 483 | #define M_MAC_RX_WRPTR _SB_MAKEMASK(6,S_MAC_RX_WRPTR) |
|---|
| 484 | #define V_MAC_RX_WRPTR(x) _SB_MAKEVALUE(x,S_MAC_RX_WRPTR) |
|---|
| 485 | #define G_MAC_RX_WRPTR(x) _SB_GETVALUE(x,S_MAC_RX_WRPTR,M_MAC_TX_WRPTR) |
|---|
| 486 | |
|---|
| 487 | #define S_MAC_RX_RDPTR _SB_MAKE64(24) |
|---|
| 488 | #define M_MAC_RX_RDPTR _SB_MAKEMASK(6,S_MAC_RX_RDPTR) |
|---|
| 489 | #define V_MAC_RX_RDPTR(x) _SB_MAKEVALUE(x,S_MAC_RX_RDPTR) |
|---|
| 490 | #define G_MAC_RX_RDPTR(x) _SB_GETVALUE(x,S_MAC_RX_RDPTR,M_MAC_TX_RDPTR) |
|---|
| 491 | |
|---|
| 492 | /* |
|---|
| 493 | * MAC Fifo End Of Packet Count Registers (Table 9-20) [Debug register] |
|---|
| 494 | * Register: MAC_EOPCNT_0 |
|---|
| 495 | * Register: MAC_EOPCNT_1 |
|---|
| 496 | * Register: MAC_EOPCNT_2 |
|---|
| 497 | */ |
|---|
| 498 | |
|---|
| 499 | #define S_MAC_TX_EOP_COUNTER _SB_MAKE64(0) |
|---|
| 500 | #define M_MAC_TX_EOP_COUNTER _SB_MAKEMASK(6,S_MAC_TX_EOP_COUNTER) |
|---|
| 501 | #define V_MAC_TX_EOP_COUNTER(x) _SB_MAKEVALUE(x,S_MAC_TX_EOP_COUNTER) |
|---|
| 502 | #define G_MAC_TX_EOP_COUNTER(x) _SB_GETVALUE(x,S_MAC_TX_EOP_COUNTER,M_MAC_TX_EOP_COUNTER) |
|---|
| 503 | |
|---|
| 504 | #define S_MAC_RX_EOP_COUNTER _SB_MAKE64(8) |
|---|
| 505 | #define M_MAC_RX_EOP_COUNTER _SB_MAKEMASK(6,S_MAC_RX_EOP_COUNTER) |
|---|
| 506 | #define V_MAC_RX_EOP_COUNTER(x) _SB_MAKEVALUE(x,S_MAC_RX_EOP_COUNTER) |
|---|
| 507 | #define G_MAC_RX_EOP_COUNTER(x) _SB_GETVALUE(x,S_MAC_RX_EOP_COUNTER,M_MAC_RX_EOP_COUNTER) |
|---|
| 508 | |
|---|
| 509 | /* |
|---|
| 510 | * MAC Recieve Address Filter Exact Match Registers (Table 9-21) |
|---|
| 511 | * Registers: MAC_ADDR0_0 through MAC_ADDR7_0 |
|---|
| 512 | * Registers: MAC_ADDR0_1 through MAC_ADDR7_1 |
|---|
| 513 | * Registers: MAC_ADDR0_2 through MAC_ADDR7_2 |
|---|
| 514 | */ |
|---|
| 515 | |
|---|
| 516 | /* No bitfields */ |
|---|
| 517 | |
|---|
| 518 | /* |
|---|
| 519 | * MAC Receive Address Filter Mask Registers |
|---|
| 520 | * Registers: MAC_ADDRMASK0_0 and MAC_ADDRMASK0_1 |
|---|
| 521 | * Registers: MAC_ADDRMASK1_0 and MAC_ADDRMASK1_1 |
|---|
| 522 | * Registers: MAC_ADDRMASK2_0 and MAC_ADDRMASK2_1 |
|---|
| 523 | */ |
|---|
| 524 | |
|---|
| 525 | /* No bitfields */ |
|---|
| 526 | |
|---|
| 527 | /* |
|---|
| 528 | * MAC Recieve Address Filter Hash Match Registers (Table 9-22) |
|---|
| 529 | * Registers: MAC_HASH0_0 through MAC_HASH7_0 |
|---|
| 530 | * Registers: MAC_HASH0_1 through MAC_HASH7_1 |
|---|
| 531 | * Registers: MAC_HASH0_2 through MAC_HASH7_2 |
|---|
| 532 | */ |
|---|
| 533 | |
|---|
| 534 | /* No bitfields */ |
|---|
| 535 | |
|---|
| 536 | /* |
|---|
| 537 | * MAC Transmit Source Address Registers (Table 9-23) |
|---|
| 538 | * Register: MAC_ETHERNET_ADDR_0 |
|---|
| 539 | * Register: MAC_ETHERNET_ADDR_1 |
|---|
| 540 | * Register: MAC_ETHERNET_ADDR_2 |
|---|
| 541 | */ |
|---|
| 542 | |
|---|
| 543 | /* No bitfields */ |
|---|
| 544 | |
|---|
| 545 | /* |
|---|
| 546 | * MAC Packet Type Configuration Register |
|---|
| 547 | * Register: MAC_TYPE_CFG_0 |
|---|
| 548 | * Register: MAC_TYPE_CFG_1 |
|---|
| 549 | * Register: MAC_TYPE_CFG_2 |
|---|
| 550 | */ |
|---|
| 551 | |
|---|
| 552 | #define S_TYPECFG_TYPESIZE _SB_MAKE64(16) |
|---|
| 553 | |
|---|
| 554 | #define S_TYPECFG_TYPE0 _SB_MAKE64(0) |
|---|
| 555 | #define M_TYPECFG_TYPE0 _SB_MAKEMASK(16,S_TYPECFG_TYPE0) |
|---|
| 556 | #define V_TYPECFG_TYPE0(x) _SB_MAKEVALUE(x,S_TYPECFG_TYPE0) |
|---|
| 557 | #define G_TYPECFG_TYPE0(x) _SB_GETVALUE(x,S_TYPECFG_TYPE0,M_TYPECFG_TYPE0) |
|---|
| 558 | |
|---|
| 559 | #define S_TYPECFG_TYPE1 _SB_MAKE64(0) |
|---|
| 560 | #define M_TYPECFG_TYPE1 _SB_MAKEMASK(16,S_TYPECFG_TYPE1) |
|---|
| 561 | #define V_TYPECFG_TYPE1(x) _SB_MAKEVALUE(x,S_TYPECFG_TYPE1) |
|---|
| 562 | #define G_TYPECFG_TYPE1(x) _SB_GETVALUE(x,S_TYPECFG_TYPE1,M_TYPECFG_TYPE1) |
|---|
| 563 | |
|---|
| 564 | #define S_TYPECFG_TYPE2 _SB_MAKE64(0) |
|---|
| 565 | #define M_TYPECFG_TYPE2 _SB_MAKEMASK(16,S_TYPECFG_TYPE2) |
|---|
| 566 | #define V_TYPECFG_TYPE2(x) _SB_MAKEVALUE(x,S_TYPECFG_TYPE2) |
|---|
| 567 | #define G_TYPECFG_TYPE2(x) _SB_GETVALUE(x,S_TYPECFG_TYPE2,M_TYPECFG_TYPE2) |
|---|
| 568 | |
|---|
| 569 | #define S_TYPECFG_TYPE3 _SB_MAKE64(0) |
|---|
| 570 | #define M_TYPECFG_TYPE3 _SB_MAKEMASK(16,S_TYPECFG_TYPE3) |
|---|
| 571 | #define V_TYPECFG_TYPE3(x) _SB_MAKEVALUE(x,S_TYPECFG_TYPE3) |
|---|
| 572 | #define G_TYPECFG_TYPE3(x) _SB_GETVALUE(x,S_TYPECFG_TYPE3,M_TYPECFG_TYPE3) |
|---|
| 573 | |
|---|
| 574 | /* |
|---|
| 575 | * MAC Receive Address Filter Control Registers (Table 9-24) |
|---|
| 576 | * Register: MAC_ADFILTER_CFG_0 |
|---|
| 577 | * Register: MAC_ADFILTER_CFG_1 |
|---|
| 578 | * Register: MAC_ADFILTER_CFG_2 |
|---|
| 579 | */ |
|---|
| 580 | |
|---|
| 581 | #define M_MAC_ALLPKT_EN _SB_MAKEMASK1(0) |
|---|
| 582 | #define M_MAC_UCAST_EN _SB_MAKEMASK1(1) |
|---|
| 583 | #define M_MAC_UCAST_INV _SB_MAKEMASK1(2) |
|---|
| 584 | #define M_MAC_MCAST_EN _SB_MAKEMASK1(3) |
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| 585 | #define M_MAC_MCAST_INV _SB_MAKEMASK1(4) |
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| 586 | #define M_MAC_BCAST_EN _SB_MAKEMASK1(5) |
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| 587 | #define M_MAC_DIRECT_INV _SB_MAKEMASK1(6) |
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| 588 | #if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1) |
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| 589 | #define M_MAC_ALLMCAST_EN _SB_MAKEMASK1(7) |
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| 590 | #endif /* 1250 PASS2 || 112x PASS1 */ |
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| 591 | |
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| 592 | #define S_MAC_IPHDR_OFFSET _SB_MAKE64(8) |
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| 593 | #define M_MAC_IPHDR_OFFSET _SB_MAKEMASK(8,S_MAC_IPHDR_OFFSET) |
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| 594 | #define V_MAC_IPHDR_OFFSET(x) _SB_MAKEVALUE(x,S_MAC_IPHDR_OFFSET) |
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| 595 | #define G_MAC_IPHDR_OFFSET(x) _SB_GETVALUE(x,S_MAC_IPHDR_OFFSET,M_MAC_IPHDR_OFFSET) |
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| 596 | |
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| 597 | #if SIBYTE_HDR_FEATURE(1250, PASS3) || SIBYTE_HDR_FEATURE(112x, PASS1) |
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| 598 | #define S_MAC_RX_CRC_OFFSET _SB_MAKE64(16) |
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| 599 | #define M_MAC_RX_CRC_OFFSET _SB_MAKEMASK(8,S_MAC_RX_CRC_OFFSET) |
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| 600 | #define V_MAC_RX_CRC_OFFSET(x) _SB_MAKEVALUE(x,S_MAC_RX_CRC_OFFSET) |
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| 601 | #define G_MAC_RX_CRC_OFFSET(x) _SB_GETVALUE(x,S_MAC_RX_CRC_OFFSET,M_MAC_RX_CRC_OFFSET) |
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| 602 | |
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| 603 | #define S_MAC_RX_PKT_OFFSET _SB_MAKE64(24) |
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| 604 | #define M_MAC_RX_PKT_OFFSET _SB_MAKEMASK(8,S_MAC_RX_PKT_OFFSET) |
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| 605 | #define V_MAC_RX_PKT_OFFSET(x) _SB_MAKEVALUE(x,S_MAC_RX_PKT_OFFSET) |
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| 606 | #define G_MAC_RX_PKT_OFFSET(x) _SB_GETVALUE(x,S_MAC_RX_PKT_OFFSET,M_MAC_RX_PKT_OFFSET) |
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| 607 | |
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| 608 | #define M_MAC_FWDPAUSE_EN _SB_MAKEMASK1(32) |
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| 609 | #define M_MAC_VLAN_DET_EN _SB_MAKEMASK1(33) |
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| 610 | |
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| 611 | #define S_MAC_RX_CH_MSN_SEL _SB_MAKE64(34) |
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| 612 | #define M_MAC_RX_CH_MSN_SEL _SB_MAKEMASK(8,S_MAC_RX_CH_MSN_SEL) |
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| 613 | #define V_MAC_RX_CH_MSN_SEL(x) _SB_MAKEVALUE(x,S_MAC_RX_CH_MSN_SEL) |
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| 614 | #define G_MAC_RX_CH_MSN_SEL(x) _SB_GETVALUE(x,S_MAC_RX_CH_MSN_SEL,M_MAC_RX_CH_MSN_SEL) |
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| 615 | #endif /* 1250 PASS3 || 112x PASS1 */ |
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| 616 | |
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| 617 | /* |
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| 618 | * MAC Receive Channel Select Registers (Table 9-25) |
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| 619 | */ |
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| 620 | |
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| 621 | /* no bitfields */ |
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| 622 | |
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| 623 | /* |
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| 624 | * MAC MII Management Interface Registers (Table 9-26) |
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| 625 | * Register: MAC_MDIO_0 |
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| 626 | * Register: MAC_MDIO_1 |
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| 627 | * Register: MAC_MDIO_2 |
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| 628 | */ |
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| 629 | |
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| 630 | #define S_MAC_MDC 0 |
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| 631 | #define S_MAC_MDIO_DIR 1 |
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| 632 | #define S_MAC_MDIO_OUT 2 |
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| 633 | #define S_MAC_GENC 3 |
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| 634 | #define S_MAC_MDIO_IN 4 |
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| 635 | |
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| 636 | #define M_MAC_MDC _SB_MAKEMASK1(S_MAC_MDC) |
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| 637 | #define M_MAC_MDIO_DIR _SB_MAKEMASK1(S_MAC_MDIO_DIR) |
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| 638 | #define M_MAC_MDIO_DIR_INPUT _SB_MAKEMASK1(S_MAC_MDIO_DIR) |
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| 639 | #define M_MAC_MDIO_OUT _SB_MAKEMASK1(S_MAC_MDIO_OUT) |
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| 640 | #define M_MAC_GENC _SB_MAKEMASK1(S_MAC_GENC) |
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| 641 | #define M_MAC_MDIO_IN _SB_MAKEMASK1(S_MAC_MDIO_IN) |
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| 642 | |
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| 643 | #endif |
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