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sdla_x25.h

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1	/*****************************************************************************
2	* sdla_x25.h Sangoma X.25 firmware API definitions.
3	*
4	* Author: Nenad Corbic <ncorbic@sangoma.com>
5	*
6	* Copyright: (c) 1995-2000 Sangoma Technologies Inc.
7	*
8	* This program is free software; you can redistribute it and/or
9	* modify it under the terms of the GNU General Public License
10	* as published by the Free Software Foundation; either version
11	2 of the License, or (at your option) any later version.
12	* ============================================================================
13	* Feb 28, 2000 Nenad Corbic Updated for socket based x25api
14	* Dec 13, 1996 Gene Kozin Initial version
15	*****************************************************************************/
16	#ifndef _SDLA_X25_H
17	#define _SDLA_X25_H
18
19	/*----------------------------------------------------------------------------
20	* Notes:
21	* ------
22	* 1. All structures defined in this file are byte-alined.
23	* Compiler Platform
24	* -------- --------
25	* GNU C Linux
26	*
27	*/
28
29	#ifndef PACKED
30	# define PACKED __attribute__((packed))
31	#endif /* PACKED */
32
33	/**** CONSTANTS DEFINITIONS *********************************************/
34
35	#define X25_MAX_CHAN 255 /* max number of open X.25 circuits */
36	#define X25_MAX_DATA 1024 /* max length of X.25 data buffer */
37	/*
38	* X.25 shared memory layout.
39	*/
40	#define X25_MBOX_OFFS 0x16B0 /* general mailbox block */
41	#define X25_RXMBOX_OFFS 0x1AD0 /* receive mailbox */
42	#define X25_STATUS_OFFS 0x1EF0 /* X.25 status structure */
43	#define X25_MB_VECTOR 0xE000 /* S514 mailbox window vecotr */
44	#define X25_MISC_HDLC_BITS 0x1F00 /X.25 miscallaneous HDLC bits /
45
46	/* code levels */
47	#define HDLC_LEVEL 0x01
48	#define X25_LEVEL 0x02
49	#define X25_AND_HDLC_LEVEL 0x03
50	#define DO_HDLC_LEVEL_ERROR_CHECKING 0x04
51
52	/**** DATA STRUCTURES ***************************************************/
53
54	/*----------------------------------------------------------------------------
55	* X.25 Command Block.
56	*/
57	typedef struct X25Cmd
58	{
59	unsigned char command PACKED; /* command code */
60	unsigned short length PACKED; /* transfer data length */
61	unsigned char result PACKED; /* return code */
62	unsigned char pf PACKED; /* P/F bit */
63	unsigned short lcn PACKED; /* logical channel */
64	unsigned char qdm PACKED; /* Q/D/M bits */
65	unsigned char cause PACKED; /* cause field */
66	unsigned char diagn PACKED; /* diagnostics */
67	unsigned char pktType PACKED; /* packet type */
68	unsigned char resrv[4] PACKED; /* reserved */
69	} TX25Cmd;
70
71	/*
72	* Defines for the 'command' field.
73	*/
74	/----- General commands --------------/
75	#define X25_SET_GLOBAL_VARS 0x0B /* set global variables */
76	#define X25_READ_MODEM_STATUS 0x0C /* read modem status */
77	#define X25_READ_CODE_VERSION 0x15 /* read firmware version number */
78	#define X25_TRACE_CONFIGURE 0x14 /* configure trace facility */
79	#define X25_READ_TRACE_DATA 0x16 /* read trace data */
80	#define X25_SET_INTERRUPT_MODE 0x17 /* set interrupt generation mode */
81	#define X25_READ_INTERRUPT_MODE 0x18 /* read interrupt generation mode */
82	/----- HDLC-level commands -----------/
83	#define X25_HDLC_LINK_CONFIGURE 0x01 /* configure HDLC link level */
84	#define X25_HDLC_LINK_OPEN 0x02 /* open HDLC link */
85	#define X25_HDLC_LINK_CLOSE 0x03 /* close HDLC link */
86	#define X25_HDLC_LINK_SETUP 0x04 /* set up HDLC link */
87	#define X25_HDLC_LINK_DISC 0x05 /* disconnect DHLC link */
88	#define X25_HDLC_LINK_STATUS 0x06 /* read DHLC link status */
89	#define X25_HDLC_READ_STATS 0x07 /* read operational statistics */
90	#define X25_HDLC_FLUSH_STATS 0x08 /* flush operational statistics */
91	#define X25_HDLC_READ_COMM_ERR 0x09 /* read error statistics */
92	#define X25_HDLC_FLUSH_COMM_ERR 0x0A /* flush error statistics */
93	#define X25_HDLC_FLUSH_BUFFERS 0x0D /* flush HDLC-level data buffers */
94	#define X25_HDLC_SPRVS_CNT_STAT 0x0F /* read surervisory count status */
95	#define X25_HDLC_SEND_UI_FRAME 0x10 /* send unnumbered information frame */
96	#define X25_HDLC_WRITE 0x11 /* send HDLC information frame */
97	#define X25_HDLC_READ 0x21 /* read HDLC information frame */
98	#define X25_HDLC_READ_CONFIG 0x12 /* read HDLC configuration */
99	#define X25_HDLC_SET_CONFIG 0x13 /* set HDLC configuration */
100	#define SET_PROTOCOL_LEVEL 0x1F /* set protocol level */
101	/----- X.25-level commands -----------/
102	#define X25_READ 0x22 /* read X.25 packet */
103	#define X25_WRITE 0x23 /* send X.25 packet */
104	#define X25_PLACE_CALL 0x30 /* place a call on SVC */
105	#define X25_ACCEPT_CALL 0x31 /* accept incomming call */
106	#define X25_CLEAR_CALL 0x32 /* clear call */
107	#define X25_CLEAR_CONFRM 0x33 /* send clear confirmation packet */
108	#define X25_RESET 0x34 /* send reset request packet */
109	#define X25_RESET_CONFRM 0x35 /* send reset confirmation packet */
110	#define X25_RESTART 0x36 /* send restart request packet */
111	#define X25_RESTART_CONFRM 0x37 /* send restart confirmation packet */
112	#define X25_INTERRUPT 0x38 /* send interrupt request packet */
113	#define X25_INTERRUPT_CONFRM 0x39 /* send interrupt confirmation pkt */
114	#define X25_REGISTRATION_RQST 0x3A /* send registration request packet */
115	#define X25_REGISTRATION_CONFRM 0x3B /* send registration confirmation */
116	#define X25_IS_DATA_AVAILABLE 0x40 /* querry receive queue */
117	#define X25_INCOMMING_CALL_CTL 0x41 /* select incomming call options */
118	#define X25_CONFIGURE_PVC 0x42 /* configure PVC */
119	#define X25_GET_ACTIVE_CHANNELS 0x43 /* get a list of active circuits */
120	#define X25_READ_CHANNEL_CONFIG 0x44 /* read virt. circuit configuration */
121	#define X25_FLUSH_DATA_BUFFERS 0x45 /* flush X.25-level data buffers */
122	#define X25_READ_HISTORY_TABLE 0x46 /* read asynchronous event log */
123	#define X25_HISTORY_TABLE_CTL 0x47 /* control asynchronous event log */
124	#define X25_GET_TX_D_BIT_STATUS 0x48 /* is packet with D-bit acknowleged */
125	#define X25_READ_STATISTICS 0x49 /* read X.25-level statistics */
126	#define X25_FLUSH_STATISTICS 0x4A /* flush X.25-level statistics */
127	#define X25_READ_CONFIGURATION 0x50 /* read HDLC & X.25 configuration */
128	#define X25_SET_CONFIGURATION 0x51 /* set HDLC & X.25 configuration */
129
130	/*
131	* Defines for the 'result' field.
132	*/
133	/----- General results ---------------/
134	#define X25RES_OK 0x00
135	#define X25RES_ERROR 0x01
136	#define X25RES_LINK_NOT_IN_ABM 0x02 /* link is not in ABM mode */
137	#define X25RES_LINK_CLOSED 0x03
138	#define X25RES_INVAL_LENGTH 0x04
139	#define X25RES_INVAL_CMD 0x05
140	#define X25RES_UNNUMBERED_FRAME 0x06 /* unnunbered frame received */
141	#define X25RES_FRM_REJECT_MODE 0x07 /* link is in Frame Reject mode */
142	#define X25RES_MODEM_FAILURE 0x08 /* DCD and/or CTS dropped */
143	#define X25RES_N2_RETRY_LIMIT 0x09 /* N2 retry limit has been exceeded */
144	#define X25RES_INVAL_LCN 0x30 /* invalid logical channel number */
145	#define X25RES_INVAL_STATE 0x31 /* channel is not in data xfer mode */
146	#define X25RES_INVAL_DATA_LEN 0x32 /* invalid data length */
147	#define X25RES_NOT_READY 0x33 /* no data available / buffers full */
148	#define X25RES_NETWORK_DOWN 0x34
149	#define X25RES_CHANNEL_IN_USE 0x35 /* there is data queued on this LCN */
150	#define X25RES_REGST_NOT_SUPPRT 0x36 /* registration not supported */
151	#define X25RES_INVAL_FORMAT 0x37 /* invalid packet format */
152	#define X25RES_D_BIT_NOT_SUPPRT 0x38 /* D-bit pragmatics not supported */
153	#define X25RES_FACIL_NOT_SUPPRT 0x39 /* Call facility not supported */
154	#define X25RES_INVAL_CALL_ARG 0x3A /* errorneous call arguments */
155	#define X25RES_INVAL_CALL_DATA 0x3B /* errorneous call user data */
156	#define X25RES_ASYNC_PACKET 0x40 /* asynchronous packet received */
157	#define X25RES_PROTO_VIOLATION 0x41 /* protocol violation occurred */
158	#define X25RES_PKT_TIMEOUT 0x42 /* X.25 packet time out */
159	#define X25RES_PKT_RETRY_LIMIT 0x43 /* X.25 packet retry limit exceeded */
160	/----- Command-dependent results -----/
161	#define X25RES_LINK_DISC 0x00 /* HDLC_LINK_STATUS */
162	#define X25RES_LINK_IN_ABM 0x01 /* HDLC_LINK_STATUS */
163	#define X25RES_NO_DATA 0x01 /* HDLC_READ/READ_TRACE_DATA*/
164	#define X25RES_TRACE_INACTIVE 0x02 /* READ_TRACE_DATA */
165	#define X25RES_LINK_IS_OPEN 0x01 /* HDLC_LINK_OPEN */
166	#define X25RES_LINK_IS_DISC 0x02 /* HDLC_LINK_DISC */
167	#define X25RES_LINK_IS_CLOSED 0x03 /* HDLC_LINK_CLOSE */
168	#define X25RES_INVAL_PARAM 0x31 /* INCOMMING_CALL_CTL */
169	#define X25RES_INVAL_CONFIG 0x35 /* REGISTR_RQST/CONFRM */
170
171	/*
172	* Defines for the 'qdm_bits' field.
173	*/
174	#define X25CMD_Q_BIT_MASK 0x04
175	#define X25CMD_D_BIT_MASK 0x02
176	#define X25CMD_M_BIT_MASK 0x01
177
178	/*
179	* Defines for the 'pkt_type' field.
180	*/
181	/----- Asynchronous events ------/
182	#define ASE_CLEAR_RQST 0x02
183	#define ASE_RESET_RQST 0x04
184	#define ASE_RESTART_RQST 0x08
185	#define ASE_INTERRUPT 0x10
186	#define ASE_DTE_REGISTR_RQST 0x20
187	#define ASE_CALL_RQST 0x30
188	#define ASE_CALL_ACCEPTED 0x31
189	#define ASE_CLEAR_CONFRM 0x32
190	#define ASE_RESET_CONFRM 0x33
191	#define ASE_RESTART_CONFRM 0x34
192	#define ASE_INTERRUPT_CONFRM 0x35
193	#define ASE_DCE_REGISTR_CONFRM 0x36
194	#define ASE_DIAGNOSTIC 0x37
195	#define ASE_CALL_AUTO_CLEAR 0x38
196	#define AUTO_RESPONSE_FLAG 0x80
197	/----- Time-Out events ----------/
198	#define TOE_RESTART_RQST 0x03
199	#define TOE_CALL_RQST 0x05
200	#define TOE_CLEAR_RQST 0x08
201	#define TOE_RESET_RQST 0x0A
202	/----- Protocol Violation events /
203	#define PVE_CLEAR_RQST 0x32
204	#define PVE_RESET_RQST 0x33
205	#define PVE_RESTART_RQST 0x34
206	#define PVE_DIAGNOSTIC 0x37
207
208	#define INTR_ON_RX_FRAME 0x01
209	#define INTR_ON_TX_FRAME 0x02
210	#define INTR_ON_MODEM_STATUS_CHANGE 0x04
211	#define INTR_ON_COMMAND_COMPLETE 0x08
212	#define INTR_ON_X25_ASY_TRANSACTION 0x10
213	#define INTR_ON_TIMER 0x40
214	#define DIRECT_RX_INTR_USAGE 0x80
215
216	#define NO_INTR_PENDING 0x00
217	#define RX_INTR_PENDING 0x01
218	#define TX_INTR_PENDING 0x02
219	#define MODEM_INTR_PENDING 0x04
220	#define COMMAND_COMPLETE_INTR_PENDING 0x08
221	#define X25_ASY_TRANS_INTR_PENDING 0x10
222	#define TIMER_INTR_PENDING 0x40
223
224	/*----------------------------------------------------------------------------
225	* X.25 Mailbox.
226	* This structure is located at offsets X25_MBOX_OFFS and X25_RXMBOX_OFFS
227	* into shared memory window.
228	*/
229	typedef struct X25Mbox
230	{
231	unsigned char opflag PACKED; /* 00h: execution flag */
232	TX25Cmd cmd PACKED; /* 01h: command block */
233	unsigned char data[1] PACKED; /* 10h: data buffer */
234	} TX25Mbox;
235
236	/*----------------------------------------------------------------------------
237	* X.25 Time Stamp Structure.
238	*/
239	typedef struct X25TimeStamp
240	{
241	unsigned char month PACKED;
242	unsigned char date PACKED;
243	unsigned char sec PACKED;
244	unsigned char min PACKED;
245	unsigned char hour PACKED;
246	} TX25TimeStamp;
247
248	/*----------------------------------------------------------------------------
249	* X.25 Status Block.
250	* This structure is located at offset X25_STATUS_OFF into shared memory
251	* window.
252	*/
253	typedef struct X25Status
254	{
255	unsigned short pvc_map PACKED; /* 00h: PVC map */
256	unsigned short icc_map PACKED; /* 02h: Incomming Chan. map */
257	unsigned short twc_map PACKED; /* 04h: Two-way Cnan. map */
258	unsigned short ogc_map PACKED; /* 06h: Outgoing Chan. map */
259	TX25TimeStamp tstamp PACKED; /* 08h: timestamp (BCD) */
260	unsigned char iflags PACKED; /* 0Dh: interrupt flags */
261	unsigned char imask PACKED; /* 0Eh: interrupt mask */
262	unsigned char resrv PACKED; /* 0Eh: */
263	unsigned char gflags PACKED; /* 10h: misc. HDLC/X25 flags */
264	unsigned char cflags[X25_MAX_CHAN] PACKED; /* channel status bytes */
265	} TX25Status;
266
267	/*
268	* Bitmasks for the 'iflags' field.
269	*/
270	#define X25_RX_INTR 0x01 /* receive interrupt */
271	#define X25_TX_INTR 0x02 /* transmit interrupt */
272	#define X25_MODEM_INTR 0x04 /* modem status interrupt (CTS/DCD) */
273	#define X25_EVENT_INTR 0x10 /* asyncronous event encountered */
274	#define X25_CMD_INTR 0x08 /* interface command complete */
275
276	/*
277	* Bitmasks for the 'gflags' field.
278	*/
279	#define X25_HDLC_ABM 0x01 /* HDLC is in ABM mode */
280	#define X25_RX_READY 0x02 /* X.25 data available */
281	#define X25_TRACE_READY 0x08 /* trace data available */
282	#define X25_EVENT_IND 0x20 /* asynchronous event indicator */
283	#define X25_TX_READY 0x40 /* space is available in Tx buf.*/
284
285	/*
286	* Bitmasks for the 'cflags' field.
287	*/
288	#define X25_XFER_MODE 0x80 /* channel is in data transfer mode */
289	#define X25_TXWIN_OPEN 0x40 /* transmit window open */
290	#define X25_RXBUF_MASK 0x3F /* number of data buffers available */
291
292	/*****************************************************************************
293	* Following definitions structurize contents of the TX25Mbox.data field for
294	* different X.25 interface commands.
295	****************************************************************************/
296
297	/* ---------------------------------------------------------------------------
298	* X25_SET_GLOBAL_VARS Command.
299	*/
300	typedef struct X25GlobalVars
301	{
302	unsigned char resrv PACKED; /* 00h: reserved */
303	unsigned char dtrCtl PACKED; /* 01h: DTR control code */
304	unsigned char resErr PACKED; /* 01h: '1' - reset modem error */
305	} TX25GlobalVars;
306
307	/*
308	* Defines for the 'dtrCtl' field.
309	*/
310	#define X25_RAISE_DTR 0x01
311	#define X25_DROP_DTR 0x02
312
313	/* ---------------------------------------------------------------------------
314	* X25_READ_MODEM_STATUS Command.
315	*/
316	typedef struct X25ModemStatus
317	{
318	unsigned char status PACKED; /* 00h: modem status */
319	} TX25ModemStatus;
320
321	/*
322	* Defines for the 'status' field.
323	*/
324	#define X25_CTS_MASK 0x20
325	#define X25_DCD_MASK 0x08
326
327	/* ---------------------------------------------------------------------------
328	* X25_HDLC_LINK_STATUS Command.
329	*/
330	typedef struct X25LinkStatus
331	{
332	unsigned char txQueued PACKED; /* 00h: queued Tx I-frames*/
333	unsigned char rxQueued PACKED; /* 01h: queued Rx I-frames*/
334	unsigned char station PACKED; /* 02h: DTE/DCE config. */
335	unsigned char reserved PACKED; /* 03h: reserved */
336	unsigned char sfTally PACKED; /* 04h: supervisory frame tally */
337	} TX25LinkStatus;
338
339	/*
340	* Defines for the 'station' field.
341	*/
342	#define X25_STATION_DTE 0x01 /* station configured as DTE */
343	#define X25_STATION_DCE 0x02 /* station configured as DCE */
344
345	/* ---------------------------------------------------------------------------
346	* X25_HDLC_READ_STATS Command.
347	*/
348	typedef struct HdlcStats
349	{ /* a number of ... */
350	unsigned short rxIFrames PACKED; /* 00h: ready Rx I-frames */
351	unsigned short rxNoseq PACKED; /* 02h: frms out-of-sequence */
352	unsigned short rxNodata PACKED; /* 04h: I-frms without data */
353	unsigned short rxDiscarded PACKED; /* 06h: discarded frames */
354	unsigned short rxTooLong PACKED; /* 08h: frames too long */
355	unsigned short rxBadAddr PACKED; /* 0Ah: frms with inval.addr*/
356	unsigned short txAcked PACKED; /* 0Ch: acknowledged I-frms */
357	unsigned short txRetransm PACKED; /* 0Eh: re-transmit. I-frms */
358	unsigned short t1Timeout PACKED; /* 10h: T1 timeouts */
359	unsigned short rxSABM PACKED; /* 12h: received SABM frames */
360	unsigned short rxDISC PACKED; /* 14h: received DISC frames */
361	unsigned short rxDM PACKED; /* 16h: received DM frames */
362	unsigned short rxFRMR PACKED; /* 18h: FRMR frames received */
363	unsigned short txSABM PACKED; /* 1Ah: transm. SABM frames*/
364	unsigned short txDISC PACKED; /* 1Ch: transm. DISC frames*/
365	unsigned short txDM PACKED; /* 1Eh: transm. DM frames */
366	unsigned short txFRMR PACKED; /* 20h: transm. FRMR frames*/
367	} THdlcStats;
368
369	/* ---------------------------------------------------------------------------
370	* X25_HDLC_READ_COMM_ERR Command.
371	*/
372	typedef struct HdlcCommErr
373	{ /* a number of ... */
374	unsigned char rxOverrun PACKED; /* 00h: Rx overrun errors */
375	unsigned char rxBadCrc PACKED; /* 01h: Rx CRC errors */
376	unsigned char rxAborted PACKED; /* 02h: Rx aborted frames */
377	unsigned char rxDropped PACKED; /* 03h: frames lost */
378	unsigned char txAborted PACKED; /* 04h: Tx aborted frames */
379	unsigned char txUnderrun PACKED; /* 05h: Tx underrun errors */
380	unsigned char txMissIntr PACKED; /* 06h: missed underrun ints */
381	unsigned char reserved PACKED; /* 07h: reserved */
382	unsigned char droppedDCD PACKED; /* 08h: times DCD dropped */
383	unsigned char droppedCTS PACKED; /* 09h: times CTS dropped */
384	} THdlcCommErr;
385
386	/* ---------------------------------------------------------------------------
387	* X25_SET_CONFIGURATION & X25_READ_CONFIGURATION Commands.
388	*/
389	typedef struct X25Config
390	{
391	unsigned char baudRate PACKED; /* 00h: */
392	unsigned char t1 PACKED; /* 01h: */
393	unsigned char t2 PACKED; /* 02h: */
394	unsigned char n2 PACKED; /* 03h: */
395	unsigned short hdlcMTU PACKED; /* 04h: */
396	unsigned char hdlcWindow PACKED; /* 06h: */
397	unsigned char t4 PACKED; /* 07h: */
398	unsigned char autoModem PACKED; /* 08h: */
399	unsigned char autoHdlc PACKED; /* 09h: */
400	unsigned char hdlcOptions PACKED; /* 0Ah: */
401	unsigned char station PACKED; /* 0Bh: */
402	unsigned char pktWindow PACKED; /* 0Ch: */
403	unsigned short defPktSize PACKED; /* 0Dh: */
404	unsigned short pktMTU PACKED; /* 0Fh: */
405	unsigned short loPVC PACKED; /* 11h: */
406	unsigned short hiPVC PACKED; /* 13h: */
407	unsigned short loIncommingSVC PACKED; /* 15h: */
408	unsigned short hiIncommingSVC PACKED; /* 17h: */
409	unsigned short loTwoWaySVC PACKED; /* 19h: */
410	unsigned short hiTwoWaySVC PACKED; /* 1Bh: */
411	unsigned short loOutgoingSVC PACKED; /* 1Dh: */
412	unsigned short hiOutgoingSVC PACKED; /* 1Fh: */
413	unsigned short options PACKED; /* 21h: */
414	unsigned char responseOpt PACKED; /* 23h: */
415	unsigned short facil1 PACKED; /* 24h: */
416	unsigned short facil2 PACKED; /* 26h: */
417	unsigned short ccittFacil PACKED; /* 28h: */
418	unsigned short otherFacil PACKED; /* 2Ah: */
419	unsigned short ccittCompat PACKED; /* 2Ch: */
420	unsigned char t10t20 PACKED; /* 2Eh: */
421	unsigned char t11t21 PACKED; /* 2Fh: */
422	unsigned char t12t22 PACKED; /* 30h: */
423	unsigned char t13t23 PACKED; /* 31h: */
424	unsigned char t16t26 PACKED; /* 32H: */
425	unsigned char t28 PACKED; /* 33h: */
426	unsigned char r10r20 PACKED; /* 34h: */
427	unsigned char r12r22 PACKED; /* 35h: */
428	unsigned char r13r23 PACKED; /* 36h: */
429	} TX25Config;
430
431	/* ---------------------------------------------------------------------------
432	* X25_READ_CHANNEL_CONFIG Command.
433	*/
434	typedef struct X25ChanAlloc /----- Channel allocation -/
435	{
436	unsigned short loPVC PACKED; /* 00h: lowest PVC number */
437	unsigned short hiPVC PACKED; /* 02h: highest PVC number */
438	unsigned short loIncommingSVC PACKED; /* 04h: lowest incoming SVC */
439	unsigned short hiIncommingSVC PACKED; /* 06h: highest incoming SVC */
440	unsigned short loTwoWaySVC PACKED; /* 08h: lowest two-way SVC */
441	unsigned short hiTwoWaySVC PACKED; /* 0Ah: highest two-way SVC */
442	unsigned short loOutgoingSVC PACKED; /* 0Ch: lowest outgoing SVC */
443	unsigned short hiOutgoingSVC PACKED; /* 0Eh: highest outgoing SVC */
444	} TX25ChanAlloc;
445
446	typedef struct X25ChanCfg /------ Channel configuration -----/
447	{
448	unsigned char type PACKED; /* 00h: channel type */
449	unsigned char txConf PACKED; /* 01h: Tx packet and window sizes */
450	unsigned char rxConf PACKED; /* 01h: Rx packet and window sizes */
451	} TX25ChanCfg;
452
453	/*
454	* Defines for the 'type' field.
455	*/
456	#define X25_PVC 0x01 /* PVC */
457	#define X25_SVC_IN 0x03 /* Incoming SVC */
458	#define X25_SVC_TWOWAY 0x07 /* Two-way SVC */
459	#define X25_SVC_OUT 0x0B /* Outgoing SVC */
460
461	/*----------------------------------------------------------------------------
462	* X25_READ_STATISTICS Command.
463	*/
464	typedef struct X25Stats
465	{ /* number of packets Tx/Rx'ed */
466	unsigned short txRestartRqst PACKED; /* 00h: Restart Request */
467	unsigned short rxRestartRqst PACKED; /* 02h: Restart Request */
468	unsigned short txRestartConf PACKED; /* 04h: Restart Confirmation */
469	unsigned short rxRestartConf PACKED; /* 06h: Restart Confirmation */
470	unsigned short txResetRqst PACKED; /* 08h: Reset Request */
471	unsigned short rxResetRqst PACKED; /* 0Ah: Reset Request */
472	unsigned short txResetConf PACKED; /* 0Ch: Reset Confirmation */
473	unsigned short rxResetConf PACKED; /* 0Eh: Reset Confirmation */
474	unsigned short txCallRequest PACKED; /* 10h: Call Request */
475	unsigned short rxCallRequest PACKED; /* 12h: Call Request */
476	unsigned short txCallAccept PACKED; /* 14h: Call Accept */
477	unsigned short rxCallAccept PACKED; /* 16h: Call Accept */
478	unsigned short txClearRqst PACKED; /* 18h: Clear Request */
479	unsigned short rxClearRqst PACKED; /* 1Ah: Clear Request */
480	unsigned short txClearConf PACKED; /* 1Ch: Clear Confirmation */
481	unsigned short rxClearConf PACKED; /* 1Eh: Clear Confirmation */
482	unsigned short txDiagnostic PACKED; /* 20h: Diagnostic */
483	unsigned short rxDiagnostic PACKED; /* 22h: Diagnostic */
484	unsigned short txRegRqst PACKED; /* 24h: Registration Request */
485	unsigned short rxRegRqst PACKED; /* 26h: Registration Request */
486	unsigned short txRegConf PACKED; /* 28h: Registration Confirm.*/
487	unsigned short rxRegConf PACKED; /* 2Ah: Registration Confirm.*/
488	unsigned short txInterrupt PACKED; /* 2Ch: Interrupt */
489	unsigned short rxInterrupt PACKED; /* 2Eh: Interrupt */
490	unsigned short txIntrConf PACKED; /* 30h: Interrupt Confirm. */
491	unsigned short rxIntrConf PACKED; /* 32h: Interrupt Confirm. */
492	unsigned short txData PACKED; /* 34h: Data */
493	unsigned short rxData PACKED; /* 36h: Data */
494	unsigned short txRR PACKED; /* 38h: RR */
495	unsigned short rxRR PACKED; /* 3Ah: RR */
496	unsigned short txRNR PACKED; /* 3Ch: RNR */
497	unsigned short rxRNR PACKED; /* 3Eh: RNR */
498	} TX25Stats;
499
500	/*----------------------------------------------------------------------------
501	* X25_READ_HISTORY_TABLE Command.
502	*/
503	typedef struct X25EventLog
504	{
505	unsigned char type PACKED; /* 00h: transaction type */
506	unsigned short lcn PACKED; /* 01h: logical channel num */
507	unsigned char packet PACKED; /* 03h: async packet type */
508	unsigned char cause PACKED; /* 04h: X.25 cause field */
509	unsigned char diag PACKED; /* 05h: X.25 diag field */
510	TX25TimeStamp ts PACKED; /* 06h: time stamp */
511	} TX25EventLog;
512
513	/*
514	* Defines for the 'type' field.
515	*/
516	#define X25LOG_INCOMMING 0x00
517	#define X25LOG_APPLICATION 0x01
518	#define X25LOG_AUTOMATIC 0x02
519	#define X25LOG_ERROR 0x04
520	#define X25LOG_TIMEOUT 0x08
521	#define X25LOG_RECOVERY 0x10
522
523	/*
524	* Defines for the 'packet' field.
525	*/
526	#define X25LOG_CALL_RQST 0x0B
527	#define X25LOG_CALL_ACCEPTED 0x0F
528	#define X25LOG_CLEAR_RQST 0x13
529	#define X25LOG_CLEAR_CONFRM 0x17
530	#define X25LOG_RESET_RQST 0x1B
531	#define X25LOG_RESET_CONFRM 0x1F
532	#define X25LOG_RESTART_RQST 0xFB
533	#define X25LOG_RESTART_COMFRM 0xFF
534	#define X25LOG_DIAGNOSTIC 0xF1
535	#define X25LOG_DTE_REG_RQST 0xF3
536	#define X25LOG_DTE_REG_COMFRM 0xF7
537
538	/* ---------------------------------------------------------------------------
539	* X25_TRACE_CONFIGURE Command.
540	*/
541	typedef struct X25TraceCfg
542	{
543	unsigned char flags PACKED; /* 00h: trace configuration flags */
544	unsigned char timeout PACKED; /* 01h: timeout for trace delay mode*/
545	} TX25TraceCfg;
546
547	/*
548	* Defines for the 'flags' field.
549	*/
550	#define X25_TRC_ENABLE 0x01 /* bit0: '1' - trace enabled */
551	#define X25_TRC_TIMESTAMP 0x02 /* bit1: '1' - time stamping enabled*/
552	#define X25_TRC_DELAY 0x04 /* bit2: '1' - trace delay enabled */
553	#define X25_TRC_DATA 0x08 /* bit3: '1' - trace data packets */
554	#define X25_TRC_SUPERVISORY 0x10 /* bit4: '1' - trace suprvisory pkts*/
555	#define X25_TRC_ASYNCHRONOUS 0x20 /* bit5: '1' - trace asynch. packets*/
556	#define X25_TRC_HDLC 0x40 /* bit6: '1' - trace all packets */
557	#define X25_TRC_READ 0x80 /* bit7: '1' - get current config. */
558
559	/* ---------------------------------------------------------------------------
560	* X25_READ_TRACE_DATA Command.
561	*/
562	typedef struct X25Trace /----- Trace data structure -------/
563	{
564	unsigned short length PACKED; /* 00h: trace data length */
565	unsigned char type PACKED; /* 02h: trace type */
566	unsigned char lost_cnt PACKED; /* 03h: N of traces lost */
567	TX25TimeStamp tstamp PACKED; /* 04h: mon/date/sec/min/hour */
568	unsigned short millisec PACKED; /* 09h: ms time stamp */
569	unsigned char data[0] PACKED; /* 0Bh: traced frame */
570	} TX25Trace;
571
572	/*
573	* Defines for the 'type' field.
574	*/
575	#define X25_TRC_TYPE_MASK 0x0F /* bits 0..3: trace type */
576	#define X25_TRC_TYPE_RX_FRAME 0x00 /* received frame trace */
577	#define X25_TRC_TYPE_TX_FRAME 0x01 /* transmitted frame */
578	#define X25_TRC_TYPE_ERR_FRAME 0x02 /* error frame */
579
580	#define X25_TRC_ERROR_MASK 0xF0 /* bits 4..7: error code */
581	#define X25_TRCERR_RX_ABORT 0x10 /* receive abort error */
582	#define X25_TRCERR_RX_BADCRC 0x20 /* receive CRC error */
583	#define X25_TRCERR_RX_OVERRUN 0x30 /* receiver overrun error */
584	#define X25_TRCERR_RX_TOO_LONG 0x40 /* excessive frame length error */
585	#define X25_TRCERR_TX_ABORT 0x70 /* aborted frame transmittion error */
586	#define X25_TRCERR_TX_UNDERRUN 0x80 /* transmit underrun error */
587
588	/*****************************************************************************
589	* Following definitions describe HDLC frame and X.25 packet formats.
590	****************************************************************************/
591
592	typedef struct HDLCFrame /----- DHLC Frame Format ----------/
593	{
594	unsigned char addr PACKED; /* address field */
595	unsigned char cntl PACKED; /* control field */
596	unsigned char data[0] PACKED;
597	} THDLCFrame;
598
599	typedef struct X25Pkt /----- X.25 Paket Format ----------/
600	{
601	unsigned char lcn_hi PACKED; /* 4 MSB of Logical Channel Number */
602	unsigned char lcn_lo PACKED; /* 8 LSB of Logical Channel Number */
603	unsigned char type PACKED;
604	unsigned char data[0] PACKED;
605	} TX25Pkt;
606
607	/*
608	* Defines for the 'lcn_hi' field.
609	*/
610	#define X25_Q_BIT_MASK 0x80 /* Data Qualifier Bit mask */
611	#define X25_D_BIT_MASK 0x40 /* Delivery Confirmation Bit mask */
612	#define X25_M_BITS_MASK 0x30 /* Modulo Bits mask */
613	#define X25_LCN_MSB_MASK 0x0F /* LCN most significant bits mask */
614
615	/*
616	* Defines for the 'type' field.
617	*/
618	#define X25PKT_DATA 0x01 /* Data packet mask */
619	#define X25PKT_SUPERVISORY 0x02 /* Supervisory packet mask */
620	#define X25PKT_CALL_RQST 0x0B /* Call Request/Incoming */
621	#define X25PKT_CALL_ACCEPTED 0x0F /* Call Accepted/Connected */
622	#define X25PKT_CLEAR_RQST 0x13 /* Clear Request/Indication */
623	#define X25PKT_CLEAR_CONFRM 0x17 /* Clear Confirmation */
624	#define X25PKT_RESET_RQST 0x1B /* Reset Request/Indication */
625	#define X25PKT_RESET_CONFRM 0x1F /* Reset Confirmation */
626	#define X25PKT_RESTART_RQST 0xFB /* Restart Request/Indication */
627	#define X25PKT_RESTART_CONFRM 0xFF /* Restart Confirmation */
628	#define X25PKT_INTERRUPT 0x23 /* Interrupt */
629	#define X25PKT_INTERRUPT_CONFRM 0x27 /* Interrupt Confirmation */
630	#define X25PKT_DIAGNOSTIC 0xF1 /* Diagnostic */
631	#define X25PKT_REGISTR_RQST 0xF3 /* Registration Request */
632	#define X25PKT_REGISTR_CONFRM 0xF7 /* Registration Confirmation */
633	#define X25PKT_RR_MASKED 0x01 /* Receive Ready packet after masking */
634	#define X25PKT_RNR_MASKED 0x05 /* Receive Not Ready after masking */
635
636
637	typedef struct {
638	TX25Cmd cmd PACKED;
639	char data[X25_MAX_DATA] PACKED;
640	} mbox_cmd_t;
641
642
643	typedef struct {
644	unsigned char qdm PACKED; /* Q/D/M bits */
645	unsigned char cause PACKED; /* cause field */
646	unsigned char diagn PACKED; /* diagnostics */
647	unsigned char pktType PACKED;
648	unsigned short length PACKED;
649	unsigned char result PACKED;
650	unsigned short lcn PACKED;
651	char reserved[7] PACKED;
652	}x25api_hdr_t;
653
654
655	typedef struct {
656	x25api_hdr_t hdr PACKED;
657	char data[X25_MAX_DATA] PACKED;
658	}x25api_t;
659
660
661	/*
662	* XPIPEMON Definitions
663	*/
664
665	/* valid ip_protocol for UDP management */
666	#define UDPMGMT_UDP_PROTOCOL 0x11
667	#define UDPMGMT_XPIPE_SIGNATURE "XLINK8ND"
668	#define UDPMGMT_DRVRSTATS_SIGNATURE "DRVSTATS"
669
670	/* values for request/reply byte */
671	#define UDPMGMT_REQUEST 0x01
672	#define UDPMGMT_REPLY 0x02
673	#define UDP_OFFSET 12
674
675
676	typedef struct {
677	unsigned char opp_flag PACKED; /* the opp flag */
678	unsigned char command PACKED; /* command code */
679	unsigned short length PACKED; /* transfer data length */
680	unsigned char result PACKED; /* return code */
681	unsigned char pf PACKED; /* P/F bit */
682	unsigned short lcn PACKED; /* logical channel */
683	unsigned char qdm PACKED; /* Q/D/M bits */
684	unsigned char cause PACKED; /* cause field */
685	unsigned char diagn PACKED; /* diagnostics */
686	unsigned char pktType PACKED; /* packet type */
687	unsigned char resrv[4] PACKED; /* reserved */
688	} cblock_t;
689
690	typedef struct {
691	ip_pkt_t ip_pkt PACKED;
692	udp_pkt_t udp_pkt PACKED;
693	wp_mgmt_t wp_mgmt PACKED;
694	cblock_t cblock PACKED;
695	unsigned char data[4080] PACKED;
696	} x25_udp_pkt_t;
697
698
699	typedef struct read_hdlc_stat {
700	unsigned short inf_frames_rx_ok PACKED;
701	unsigned short inf_frames_rx_out_of_seq PACKED;
702	unsigned short inf_frames_rx_no_data PACKED;
703	unsigned short inf_frames_rx_dropped PACKED;
704	unsigned short inf_frames_rx_data_too_long PACKED;
705	unsigned short inf_frames_rx_invalid_addr PACKED;
706	unsigned short inf_frames_tx_ok PACKED;
707	unsigned short inf_frames_tx_retransmit PACKED;
708	unsigned short T1_timeouts PACKED;
709	unsigned short SABM_frames_rx PACKED;
710	unsigned short DISC_frames_rx PACKED;
711	unsigned short DM_frames_rx PACKED;
712	unsigned short FRMR_frames_rx PACKED;
713	unsigned short SABM_frames_tx PACKED;
714	unsigned short DISC_frames_tx PACKED;
715	unsigned short DM_frames_tx PACKED;
716	unsigned short FRMR_frames_tx PACKED;
717	} read_hdlc_stat_t;
718
719	typedef struct read_comms_err_stats{
720	unsigned char overrun_err_rx PACKED;
721	unsigned char CRC_err PACKED;
722	unsigned char abort_frames_rx PACKED;
723	unsigned char frames_dropped_buf_full PACKED;
724	unsigned char abort_frames_tx PACKED;
725	unsigned char transmit_underruns PACKED;
726	unsigned char missed_tx_underruns_intr PACKED;
727	unsigned char reserved PACKED;
728	unsigned char DCD_drop PACKED;
729	unsigned char CTS_drop PACKED;
730	} read_comms_err_stats_t;
731
732	typedef struct trace_data {
733	unsigned short length PACKED;
734	unsigned char type PACKED;
735	unsigned char trace_dropped PACKED;
736	unsigned char reserved[5] PACKED;
737	unsigned short timestamp PACKED;
738	unsigned char data PACKED;
739	} trace_data_t;
740
741	enum {UDP_XPIPE_TYPE};
742
743	#define XPIPE_ENABLE_TRACING 0x14
744	#define XPIPE_DISABLE_TRACING 0x14
745	#define XPIPE_GET_TRACE_INFO 0x16
746	#define XPIPE_FT1_READ_STATUS 0x74
747	#define XPIPE_DRIVER_STAT_IFSEND 0x75
748	#define XPIPE_DRIVER_STAT_INTR 0x76
749	#define XPIPE_DRIVER_STAT_GEN 0x77
750	#define XPIPE_FLUSH_DRIVER_STATS 0x78
751	#define XPIPE_ROUTER_UP_TIME 0x79
752	#define XPIPE_SET_FT1_MODE 0x81
753	#define XPIPE_FT1_STATUS_CTRL 0x80
754
755
756	/* error messages */
757	#define NO_BUFFS_OR_CLOSED_WIN 0x33
758	#define DATA_LENGTH_TOO_BIG 0x32
759	#define NO_DATA_AVAILABLE 0x33
760	#define Z80_TIMEOUT_ERROR 0x0a
761	#define NO_BUFFS 0x08
762
763
764	/* Trace options */
765	#define TRACE_DEFAULT 0x03
766	#define TRACE_SUPERVISOR_FRMS 0x10
767	#define TRACE_ASYNC_FRMS 0x20
768	#define TRACE_ALL_HDLC_FRMS 0x40
769	#define TRACE_DATA_FRMS 0x08
770
771
772	#endif /* _SDLA_X25_H */

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source: svn/trunk/newcon3bcm2_21bu/toolchain/mips-linux-uclibc/include/linux/sdla_x25.h

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