| 1 | |
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| 2 | /* |
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| 3 | Copyright 2003-2004 Red Hat, Inc. All rights reserved. |
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| 4 | Copyright 2003-2004 Jeff Garzik |
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| 5 | |
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| 6 | The contents of this file are subject to the Open |
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| 7 | Software License version 1.1 that can be found at |
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| 8 | http://www.opensource.org/licenses/osl-1.1.txt and is included herein |
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| 9 | by reference. |
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| 10 | |
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| 11 | Alternatively, the contents of this file may be used under the terms |
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| 12 | of the GNU General Public License version 2 (the "GPL") as distributed |
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| 13 | in the kernel source COPYING file, in which case the provisions of |
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| 14 | the GPL are applicable instead of the above. If you wish to allow |
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| 15 | the use of your version of this file only under the terms of the |
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| 16 | GPL and not to allow others to use your version of this file under |
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| 17 | the OSL, indicate your decision by deleting the provisions above and |
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| 18 | replace them with the notice and other provisions required by the GPL. |
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| 19 | If you do not delete the provisions above, a recipient may use your |
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| 20 | version of this file under either the OSL or the GPL. |
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| 21 | |
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| 22 | */ |
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| 23 | |
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| 24 | #ifndef __LINUX_ATA_H__ |
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| 25 | #define __LINUX_ATA_H__ |
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| 26 | |
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| 27 | #include <linux/types.h> |
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| 28 | |
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| 29 | /* defines only for the constants which don't work well as enums */ |
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| 30 | #define ATA_DMA_BOUNDARY 0xffffUL |
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| 31 | #define ATA_DMA_MASK 0xffffffffULL |
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| 32 | |
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| 33 | enum { |
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| 34 | /* various global constants */ |
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| 35 | ATA_MAX_DEVICES = 2, /* per bus/port */ |
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| 36 | ATA_MAX_PRD = 256, /* we could make these 256/256 */ |
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| 37 | ATA_SECT_SIZE = 512, |
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| 38 | |
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| 39 | ATA_ID_WORDS = 256, |
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| 40 | ATA_ID_PROD_OFS = 27, |
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| 41 | ATA_ID_FW_REV_OFS = 23, |
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| 42 | ATA_ID_SERNO_OFS = 10, |
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| 43 | ATA_ID_MAJOR_VER = 80, |
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| 44 | ATA_ID_PIO_MODES = 64, |
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| 45 | ATA_ID_MWDMA_MODES = 63, |
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| 46 | ATA_ID_UDMA_MODES = 88, |
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| 47 | ATA_ID_PIO4 = (1 << 1), |
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| 48 | |
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| 49 | ATA_PCI_CTL_OFS = 2, |
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| 50 | ATA_SERNO_LEN = 20, |
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| 51 | ATA_UDMA0 = (1 << 0), |
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| 52 | ATA_UDMA1 = ATA_UDMA0 | (1 << 1), |
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| 53 | ATA_UDMA2 = ATA_UDMA1 | (1 << 2), |
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| 54 | ATA_UDMA3 = ATA_UDMA2 | (1 << 3), |
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| 55 | ATA_UDMA4 = ATA_UDMA3 | (1 << 4), |
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| 56 | ATA_UDMA5 = ATA_UDMA4 | (1 << 5), |
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| 57 | ATA_UDMA6 = ATA_UDMA5 | (1 << 6), |
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| 58 | ATA_UDMA7 = ATA_UDMA6 | (1 << 7), |
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| 59 | /* ATA_UDMA7 is just for completeness... doesn't exist (yet?). */ |
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| 60 | |
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| 61 | ATA_UDMA_MASK_40C = ATA_UDMA2, /* udma0-2 */ |
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| 62 | |
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| 63 | /* DMA-related */ |
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| 64 | ATA_PRD_SZ = 8, |
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| 65 | ATA_PRD_TBL_SZ = (ATA_MAX_PRD * ATA_PRD_SZ), |
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| 66 | ATA_PRD_EOT = (1 << 31), /* end-of-table flag */ |
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| 67 | |
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| 68 | ATA_DMA_TABLE_OFS = 4, |
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| 69 | ATA_DMA_STATUS = 2, |
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| 70 | ATA_DMA_CMD = 0, |
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| 71 | ATA_DMA_WR = (1 << 3), |
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| 72 | ATA_DMA_START = (1 << 0), |
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| 73 | ATA_DMA_INTR = (1 << 2), |
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| 74 | ATA_DMA_ERR = (1 << 1), |
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| 75 | ATA_DMA_ACTIVE = (1 << 0), |
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| 76 | |
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| 77 | /* bits in ATA command block registers */ |
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| 78 | ATA_HOB = (1 << 7), /* LBA48 selector */ |
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| 79 | ATA_NIEN = (1 << 1), /* disable-irq flag */ |
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| 80 | ATA_LBA = (1 << 6), /* LBA28 selector */ |
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| 81 | ATA_DEV1 = (1 << 4), /* Select Device 1 (slave) */ |
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| 82 | ATA_DEVICE_OBS = (1 << 7) | (1 << 5), /* obs bits in dev reg */ |
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| 83 | ATA_DEVCTL_OBS = (1 << 3), /* obsolete bit in devctl reg */ |
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| 84 | ATA_BUSY = (1 << 7), /* BSY status bit */ |
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| 85 | ATA_DRDY = (1 << 6), /* device ready */ |
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| 86 | ATA_DF = (1 << 5), /* device fault */ |
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| 87 | ATA_DRQ = (1 << 3), /* data request i/o */ |
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| 88 | ATA_ERR = (1 << 0), /* have an error */ |
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| 89 | ATA_SRST = (1 << 2), /* software reset */ |
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| 90 | ATA_ABORTED = (1 << 2), /* command aborted */ |
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| 91 | |
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| 92 | /* ATA command block registers */ |
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| 93 | ATA_REG_DATA = 0x00, |
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| 94 | ATA_REG_ERR = 0x01, |
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| 95 | ATA_REG_NSECT = 0x02, |
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| 96 | ATA_REG_LBAL = 0x03, |
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| 97 | ATA_REG_LBAM = 0x04, |
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| 98 | ATA_REG_LBAH = 0x05, |
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| 99 | ATA_REG_DEVICE = 0x06, |
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| 100 | ATA_REG_STATUS = 0x07, |
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| 101 | |
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| 102 | ATA_REG_FEATURE = ATA_REG_ERR, /* and their aliases */ |
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| 103 | ATA_REG_CMD = ATA_REG_STATUS, |
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| 104 | ATA_REG_BYTEL = ATA_REG_LBAM, |
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| 105 | ATA_REG_BYTEH = ATA_REG_LBAH, |
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| 106 | ATA_REG_DEVSEL = ATA_REG_DEVICE, |
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| 107 | ATA_REG_IRQ = ATA_REG_NSECT, |
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| 108 | |
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| 109 | /* ATA device commands */ |
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| 110 | ATA_CMD_CHK_POWER = 0xE5, /* check power mode */ |
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| 111 | ATA_CMD_EDD = 0x90, /* execute device diagnostic */ |
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| 112 | ATA_CMD_FLUSH = 0xE7, |
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| 113 | ATA_CMD_FLUSH_EXT = 0xEA, |
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| 114 | ATA_CMD_ID_ATA = 0xEC, |
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| 115 | ATA_CMD_ID_ATAPI = 0xA1, |
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| 116 | ATA_CMD_READ = 0xC8, |
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| 117 | ATA_CMD_READ_EXT = 0x25, |
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| 118 | ATA_CMD_WRITE = 0xCA, |
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| 119 | ATA_CMD_WRITE_EXT = 0x35, |
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| 120 | ATA_CMD_PIO_READ = 0x20, |
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| 121 | ATA_CMD_PIO_READ_EXT = 0x24, |
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| 122 | ATA_CMD_PIO_WRITE = 0x30, |
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| 123 | ATA_CMD_PIO_WRITE_EXT = 0x34, |
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| 124 | ATA_CMD_SET_FEATURES = 0xEF, |
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| 125 | ATA_CMD_PACKET = 0xA0, |
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| 126 | ATA_CMD_VERIFY = 0x40, |
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| 127 | ATA_CMD_VERIFY_EXT = 0x42, |
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| 128 | |
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| 129 | /* SETFEATURES stuff */ |
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| 130 | SETFEATURES_XFER = 0x03, |
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| 131 | XFER_UDMA_7 = 0x47, |
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| 132 | XFER_UDMA_6 = 0x46, |
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| 133 | XFER_UDMA_5 = 0x45, |
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| 134 | XFER_UDMA_4 = 0x44, |
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| 135 | XFER_UDMA_3 = 0x43, |
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| 136 | XFER_UDMA_2 = 0x42, |
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| 137 | XFER_UDMA_1 = 0x41, |
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| 138 | XFER_UDMA_0 = 0x40, |
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| 139 | XFER_MW_DMA_2 = 0x22, |
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| 140 | XFER_MW_DMA_1 = 0x21, |
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| 141 | XFER_MW_DMA_0 = 0x20, |
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| 142 | XFER_PIO_4 = 0x0C, |
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| 143 | XFER_PIO_3 = 0x0B, |
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| 144 | XFER_PIO_2 = 0x0A, |
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| 145 | XFER_PIO_1 = 0x09, |
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| 146 | XFER_PIO_0 = 0x08, |
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| 147 | XFER_SW_DMA_2 = 0x12, |
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| 148 | XFER_SW_DMA_1 = 0x11, |
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| 149 | XFER_SW_DMA_0 = 0x10, |
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| 150 | XFER_PIO_SLOW = 0x00, |
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| 151 | |
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| 152 | /* ATAPI stuff */ |
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| 153 | ATAPI_PKT_DMA = (1 << 0), |
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| 154 | ATAPI_DMADIR = (1 << 2), /* ATAPI data dir: |
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| 155 | 0=to device, 1=to host */ |
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| 156 | ATAPI_CDB_LEN = 16, |
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| 157 | |
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| 158 | /* cable types */ |
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| 159 | ATA_CBL_NONE = 0, |
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| 160 | ATA_CBL_PATA40 = 1, |
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| 161 | ATA_CBL_PATA80 = 2, |
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| 162 | ATA_CBL_PATA_UNK = 3, |
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| 163 | ATA_CBL_SATA = 4, |
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| 164 | |
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| 165 | /* SATA Status and Control Registers */ |
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| 166 | SCR_STATUS = 0, |
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| 167 | SCR_ERROR = 1, |
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| 168 | SCR_CONTROL = 2, |
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| 169 | SCR_ACTIVE = 3, |
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| 170 | SCR_NOTIFICATION = 4, |
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| 171 | |
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| 172 | /* struct ata_taskfile flags */ |
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| 173 | ATA_TFLAG_LBA48 = (1 << 0), /* enable 48-bit LBA and "HOB" */ |
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| 174 | ATA_TFLAG_ISADDR = (1 << 1), /* enable r/w to nsect/lba regs */ |
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| 175 | ATA_TFLAG_DEVICE = (1 << 2), /* enable r/w to device reg */ |
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| 176 | ATA_TFLAG_WRITE = (1 << 3), /* data dir: host->dev==1 (write) */ |
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| 177 | }; |
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| 178 | |
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| 179 | enum ata_tf_protocols { |
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| 180 | /* ATA taskfile protocols */ |
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| 181 | ATA_PROT_UNKNOWN, /* unknown/invalid */ |
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| 182 | ATA_PROT_NODATA, /* no data */ |
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| 183 | ATA_PROT_PIO, /* PIO single sector */ |
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| 184 | ATA_PROT_PIO_MULT, /* PIO multiple sector */ |
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| 185 | ATA_PROT_DMA, /* DMA */ |
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| 186 | ATA_PROT_ATAPI, /* packet command, PIO data xfer*/ |
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| 187 | ATA_PROT_ATAPI_NODATA, /* packet command, no data */ |
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| 188 | ATA_PROT_ATAPI_DMA, /* packet command with special DMA sauce */ |
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| 189 | }; |
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| 190 | |
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| 191 | enum ata_ioctls { |
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| 192 | ATA_IOC_GET_IO32 = 0x309, |
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| 193 | ATA_IOC_SET_IO32 = 0x324, |
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| 194 | }; |
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| 195 | |
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| 196 | /* core structures */ |
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| 197 | |
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| 198 | struct ata_prd { |
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| 199 | __u32 addr; |
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| 200 | __u32 flags_len; |
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| 201 | }; |
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| 202 | |
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| 203 | struct ata_taskfile { |
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| 204 | unsigned long flags; /* ATA_TFLAG_xxx */ |
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| 205 | __u8 protocol; /* ATA_PROT_xxx */ |
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| 206 | |
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| 207 | __u8 ctl; /* control reg */ |
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| 208 | |
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| 209 | __u8 hob_feature; /* additional data */ |
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| 210 | __u8 hob_nsect; /* to support LBA48 */ |
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| 211 | __u8 hob_lbal; |
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| 212 | __u8 hob_lbam; |
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| 213 | __u8 hob_lbah; |
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| 214 | |
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| 215 | __u8 feature; |
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| 216 | __u8 nsect; |
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| 217 | __u8 lbal; |
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| 218 | __u8 lbam; |
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| 219 | __u8 lbah; |
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| 220 | |
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| 221 | __u8 device; |
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| 222 | |
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| 223 | __u8 command; /* IO operation */ |
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| 224 | }; |
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| 225 | |
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| 226 | #define ata_id_is_ata(id) (((id)[0] & (1 << 15)) == 0) |
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| 227 | #define ata_id_rahead_enabled(id) ((id)[85] & (1 << 6)) |
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| 228 | #define ata_id_wcache_enabled(id) ((id)[85] & (1 << 5)) |
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| 229 | #define ata_id_has_flush(id) ((id)[83] & (1 << 12)) |
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| 230 | #define ata_id_has_flush_ext(id) ((id)[83] & (1 << 13)) |
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| 231 | #define ata_id_has_lba48(id) ((id)[83] & (1 << 10)) |
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| 232 | #define ata_id_has_wcache(id) ((id)[82] & (1 << 5)) |
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| 233 | #define ata_id_has_pm(id) ((id)[82] & (1 << 3)) |
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| 234 | #define ata_id_has_lba(id) ((id)[49] & (1 << 9)) |
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| 235 | #define ata_id_has_dma(id) ((id)[49] & (1 << 8)) |
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| 236 | #define ata_id_removeable(id) ((id)[0] & (1 << 7)) |
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| 237 | #define ata_id_u32(id,n) \ |
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| 238 | (((__u32) (id)[(n) + 1] << 16) | ((__u32) (id)[(n)])) |
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| 239 | #define ata_id_u64(id,n) \ |
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| 240 | ( ((__u64) (id)[(n) + 3] << 48) | \ |
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| 241 | ((__u64) (id)[(n) + 2] << 32) | \ |
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| 242 | ((__u64) (id)[(n) + 1] << 16) | \ |
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| 243 | ((__u64) (id)[(n) + 0]) ) |
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| 244 | |
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| 245 | static inline int atapi_cdb_len(__u16 *dev_id) |
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| 246 | { |
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| 247 | __u16 tmp = dev_id[0] & 0x3; |
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| 248 | switch (tmp) { |
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| 249 | case 0: return 12; |
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| 250 | case 1: return 16; |
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| 251 | default: return -1; |
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| 252 | } |
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| 253 | } |
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| 254 | |
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| 255 | static inline int is_atapi_taskfile(struct ata_taskfile *tf) |
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| 256 | { |
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| 257 | return (tf->protocol == ATA_PROT_ATAPI) || |
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| 258 | (tf->protocol == ATA_PROT_ATAPI_NODATA) || |
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| 259 | (tf->protocol == ATA_PROT_ATAPI_DMA); |
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| 260 | } |
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| 261 | |
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| 262 | static inline int ata_ok(__u8 status) |
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| 263 | { |
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| 264 | return ((status & (ATA_BUSY | ATA_DRDY | ATA_DF | ATA_DRQ | ATA_ERR)) |
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| 265 | == ATA_DRDY); |
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| 266 | } |
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| 267 | |
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| 268 | #endif /* __LINUX_ATA_H__ */ |
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