source: svn/trunk/newcon3bcm2_21bu/toolchain/mipsel-linux-uclibc/include/linux/ibmtr.h @ 29

Last change on this file since 29 was 2, checked in by jglee, 11 years ago

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1#ifndef __LINUX_IBMTR_H__
2#define __LINUX_IBMTR_H__
3
4#include <asm/types.h>
5
6/* Definitions for an IBM Token Ring card. */
7/* This file is distributed under the GNU GPL   */
8
9/* ported to the Alpha architecture 02/20/96 (just used the HZ macro) */
10
11#define TR_RETRY_INTERVAL       (30*HZ) /* 500 on PC = 5 s */
12#define TR_RST_TIME             (HZ/20) /* 5 on PC = 50 ms */
13#define TR_BUSY_INTERVAL        (HZ/5)  /* 5 on PC = 200 ms */
14#define TR_SPIN_INTERVAL        (3*HZ)  /* 3 seconds before init timeout */
15
16#define TR_ISA 1
17#define TR_MCA 2
18#define TR_ISAPNP 3
19#define NOTOK 0
20
21#define IBMTR_SHARED_RAM_SIZE 0x10000
22#define IBMTR_IO_EXTENT 4
23#define IBMTR_MAX_ADAPTERS 4
24
25#define CHANNEL_ID      0X1F30
26#define AIP             0X1F00
27#define AIPADAPTYPE     0X1FA0
28#define AIPDATARATE     0X1FA2
29#define AIPEARLYTOKEN   0X1FA4
30#define AIPAVAILSHRAM   0X1FA6
31#define AIPSHRAMPAGE    0X1FA8
32#define AIP4MBDHB       0X1FAA
33#define AIP16MBDHB      0X1FAC
34#define AIPFID          0X1FBA
35
36#define ADAPTRESET      0x1     /* Control Adapter reset (add to base) */
37#define ADAPTRESETREL   0x2     /* Release Adapter from reset ( """)  */
38#define ADAPTINTREL     0x3     /* Adapter interrupt release */
39
40#define GLOBAL_INT_ENABLE 0x02f0
41
42/* MMIO bits 0-4 select register */
43#define RRR_EVEN       0x00 /* Shared RAM relocation registers - even and odd */
44/* Used to set the starting address of shared RAM  */
45/* Bits 1 through 7 of this register map to bits 13 through 19 of the shared
46   RAM address.*/
47/* ie: 0x02 sets RAM address to ...ato!  issy su wazzoo !! GODZILLA!!! */
48#define RRR_ODD         0x01
49/* Bits 2 and 3 of this register can be read to determine shared RAM size */
50/* 00 for 8k, 01 for 16k, 10 for 32k, 11 for 64k  */
51#define WRBR_EVEN       0x02    /* Write region base registers - even and odd */
52#define WRBR_ODD        0x03
53#define WWOR_EVEN       0x04    /* Write window open registers - even and odd */
54#define WWOR_ODD        0x05
55#define WWCR_EVEN       0x06   /* Write window close registers - even and odd */
56#define WWCR_ODD        0x07
57
58/* Interrupt status registers - PC system  - even and odd */
59#define ISRP_EVEN       0x08
60
61#define TCR_INT    0x10    /* Bit 4 - Timer interrupt.  The TVR_EVEN timer has
62                                                                   expired. */
63#define ERR_INT    0x08    /* Bit 3 - Error interrupt.  The adapter has had an
64                                                            internal error. */
65#define ACCESS_INT 0x04    /* Bit 2 - Access interrupt.  You have attempted to
66                                      write to an invalid area of shared RAM
67                                      or an invalid register within the MMIO. */
68/* In addition, the following bits within ISRP_EVEN can be turned on or off   */
69/* by you to control the interrupt processing:   */
70#define INT_ENABLE 0x40 /* Bit 6 - Interrupt enable.  If 0, no interrupts will
71                                   occur.  If 1, interrupts will occur normally.
72                                                         Normally set to 1.  */
73/* Bit 0 - Primary or alternate adapter.  Set to zero if this adapter is the
74                primary adapter, 1 if this adapter is the alternate adapter. */
75
76
77#define ISRP_ODD        0x09
78
79#define ADAP_CHK_INT 0x40 /* Bit 6 - Adapter check.  the adapter has
80                             encountered a serious problem and has closed
81                             itself.  Whoa.  */
82#define SRB_RESP_INT 0x20 /* Bit 5 - SRB response.  The adapter has accepted
83                             an SRB request and set the return code within
84                             the SRB. */
85#define ASB_FREE_INT 0x10 /* Bit 4 - ASB free.  The adapter has read the ASB
86                             and this area can be safely reused. This interrupt
87                             is only used if your application has set the ASB
88                             free request bit in ISRA_ODD or if an error was
89                             detected in your response. */
90#define ARB_CMD_INT  0x08 /* Bit 3 - ARB command.  The adapter has given you a
91                             command for action.  The command is located in the
92                             ARB area of shared memory. */
93#define SSB_RESP_INT 0x04 /* Bit 2 - SSB response.  The adapter has posted a
94                             response to your SRB (the response is located in
95                             the SSB area of shared memory). */
96/* Bit 1 - Bridge frame forward complete. */
97
98
99
100#define ISRA_EVEN 0x0A /*Interrupt status registers - adapter  - even and odd */
101/* Bit 7 - Internal parity error (on adapter's internal bus) */
102/* Bit 6 - Timer interrupt pending */
103/* Bit 5 - Access interrupt (attempt by adapter to access illegal address) */
104/* Bit 4 - Adapter microcode problem (microcode dead-man timer expired) */
105/* Bit 3 - Adapter processor check status */
106/* Bit 2 - Reserved */
107/* Bit 1 - Adapter hardware interrupt mask (prevents internal interrupts) */
108/* Bit 0 - Adapter software interrupt mask (prevents internal software ints) */
109
110#define ISRA_ODD        0x0B
111#define CMD_IN_SRB  0x20 /* Bit 5  - Indicates that you have placed a new
112                           command in the SRB and are ready for the adapter to
113                           process the command. */
114#define RESP_IN_ASB 0x10 /* Bit 4 - Indicates that you have placed a response
115                            (an ASB) in the shared RAM which is available for
116                            the adapter's use. */
117/* Bit 3 - Indicates that you are ready to put an SRB in the shared RAM, but
118        that a previous command is still pending.  The adapter will then
119        interrupt you when the previous command is completed */
120/* Bit 2 - Indicates that you are ready to put an ASB in the shared RAM, but
121        that a previous ASB is still pending.  The adapter will then interrupt
122        you when the previous ASB is copied.  */
123#define ARB_FREE 0x2
124#define SSB_FREE 0x1
125
126#define TCR_EVEN        0x0C    /* Timer control registers - even and odd */
127#define TCR_ODD         0x0D
128#define TVR_EVEN        0x0E    /* Timer value registers - even and odd */
129#define TVR_ODD         0x0F
130#define SRPR_EVEN       0x18    /* Shared RAM paging registers - even and odd */
131#define SRPR_ENABLE_PAGING 0xc0
132#define SRPR_ODD        0x19    /* Not used. */
133#define TOKREAD         0x60
134#define TOKOR           0x40
135#define TOKAND          0x20
136#define TOKWRITE        0x00
137
138/* MMIO bits 5-6 select operation */
139/* 00 is used to write to a register */
140/* 01 is used to bitwise AND a byte with a register */
141/* 10 is used to bitwise OR a byte with a register  */
142/* 11 is used to read from a register */
143
144/* MMIO bits 7-8 select area of interest.. see below */
145/* 00 selects attachment control area. */
146/* 01 is reserved. */
147/* 10 selects adapter identification area A containing the adapter encoded
148        address. */
149/* 11 selects the adapter identification area B containing test patterns. */
150
151#define PCCHANNELID 5049434F3631313039393020
152#define MCCHANNELID 4D4152533633583435313820
153
154#define ACA_OFFSET 0x1e00
155#define ACA_SET 0x40
156#define ACA_RESET 0x20
157#define ACA_RW 0x00
158
159#ifdef ENABLE_PAGING
160#define SET_PAGE(x) (writeb((x), ti->mmio + ACA_OFFSET+ ACA_RW + SRPR_EVEN))
161#else
162#define SET_PAGE(x)
163#endif
164
165/* do_tok_int possible values */
166#define FIRST_INT 1
167#define NOT_FIRST 2
168
169typedef enum {  CLOSED, OPEN } open_state;
170//staic const char *printstate[] = { "CLOSED","OPEN"};
171
172struct tok_info {
173        unsigned char irq;
174        void *mmio;
175        unsigned char hw_address[32];
176        unsigned char adapter_type;
177        unsigned char data_rate;
178        unsigned char token_release;
179        unsigned char avail_shared_ram;
180        unsigned char shared_ram_paging;
181        unsigned char turbo;
182        unsigned short dhb_size4mb;
183        unsigned short rbuf_len4;
184        unsigned short rbuf_cnt4;
185        unsigned short maxmtu4;
186        unsigned short dhb_size16mb;
187        unsigned short rbuf_len16;
188        unsigned short rbuf_cnt16;
189        unsigned short maxmtu16;
190        /* Additions by David Morris       */
191        unsigned char do_tok_int;
192        wait_queue_head_t wait_for_reset;
193        unsigned char sram_base;
194        /* Additions by Peter De Schrijver */
195        unsigned char page_mask;          /* mask to select RAM page to Map*/
196        unsigned char mapped_ram_size;    /* size of RAM page */
197        __u32 sram_phys;          /* Shared memory base address */
198        void *sram_virt;          /* Shared memory base address */
199        void *init_srb;   /* Initial System Request Block address */
200        void *srb;                /* System Request Block address */
201        void *ssb;                /* System Status Block address */
202        void *arb;                /* Adapter Request Block address */
203        void *asb;                /* Adapter Status Block address */
204        __u8  init_srb_page;
205        __u8  srb_page;
206        __u8  ssb_page;
207        __u8  arb_page;
208        __u8  asb_page;
209        unsigned short exsap_station_id;
210        unsigned short global_int_enable;
211        struct sk_buff *current_skb;
212        struct net_device_stats tr_stats;
213        unsigned char auto_speedsave;
214        open_state                      open_status, sap_status;
215        enum {MANUAL, AUTOMATIC}        open_mode;
216        enum {FAIL, RESTART, REOPEN}    open_action;
217        enum {NO, YES}                  open_failure;
218        unsigned char readlog_pending;
219        unsigned short adapter_int_enable; /* Adapter-specific int enable */
220        struct timer_list tr_timer;
221        unsigned char ring_speed;
222        spinlock_t lock;                /* SMP protection */
223};
224
225/* token ring adapter commands */
226#define DIR_INTERRUPT           0x00 /* struct srb_interrupt */
227#define DIR_MOD_OPEN_PARAMS     0x01
228#define DIR_OPEN_ADAPTER        0x03 /* struct dir_open_adapter */
229#define DIR_CLOSE_ADAPTER       0x04
230#define DIR_SET_GRP_ADDR        0x06
231#define DIR_SET_FUNC_ADDR       0x07 /* struct srb_set_funct_addr */
232#define DIR_READ_LOG            0x08 /* struct srb_read_log */
233#define DLC_OPEN_SAP            0x15 /* struct dlc_open_sap */
234#define DLC_CLOSE_SAP           0x16
235#define DATA_LOST               0x20 /* struct asb_rec */
236#define REC_DATA                0x81 /* struct arb_rec_req */
237#define XMIT_DATA_REQ           0x82 /* struct arb_xmit_req */
238#define DLC_STATUS              0x83 /* struct arb_dlc_status */
239#define RING_STAT_CHANGE        0x84 /* struct dlc_open_sap ??? */
240
241/* DIR_OPEN_ADAPTER options */
242#define OPEN_PASS_BCON_MAC 0x0100
243#define NUM_RCV_BUF 2
244#define RCV_BUF_LEN 1024
245#define DHB_LENGTH 2048
246#define NUM_DHB 2
247#define DLC_MAX_SAP 2
248#define DLC_MAX_STA 1
249
250/* DLC_OPEN_SAP options */
251#define MAX_I_FIELD 0x0088
252#define SAP_OPEN_IND_SAP 0x04
253#define SAP_OPEN_PRIORITY 0x20
254#define SAP_OPEN_STATION_CNT 0x1
255#define XMIT_DIR_FRAME 0x0A
256#define XMIT_UI_FRAME  0x0d
257#define XMIT_XID_CMD   0x0e
258#define XMIT_TEST_CMD  0x11
259
260/* srb close return code */
261#define SIGNAL_LOSS  0x8000
262#define HARD_ERROR   0x4000
263#define XMIT_BEACON  0x1000
264#define LOBE_FAULT   0x0800
265#define AUTO_REMOVAL 0x0400
266#define REMOVE_RECV  0x0100
267#define LOG_OVERFLOW 0x0080
268#define RING_RECOVER 0x0020
269
270struct srb_init_response {
271        unsigned char command;
272        unsigned char init_status;
273        unsigned char init_status_2;
274        unsigned char reserved[3];
275        __u16 bring_up_code;
276        __u16 encoded_address;
277        __u16 level_address;
278        __u16 adapter_address;
279        __u16 parms_address;
280        __u16 mac_address;
281};
282
283struct dir_open_adapter {
284        unsigned char command;
285        char reserved[7];
286        __u16 open_options;
287        unsigned char node_address[6];
288        unsigned char group_address[4];
289        unsigned char funct_address[4];
290        __u16 num_rcv_buf;
291        __u16 rcv_buf_len;
292        __u16 dhb_length;
293        unsigned char num_dhb;
294        char reserved2;
295        unsigned char dlc_max_sap;
296        unsigned char dlc_max_sta;
297        unsigned char dlc_max_gsap;
298        unsigned char dlc_max_gmem;
299        unsigned char dlc_t1_tick_1;
300        unsigned char dlc_t2_tick_1;
301        unsigned char dlc_ti_tick_1;
302        unsigned char dlc_t1_tick_2;
303        unsigned char dlc_t2_tick_2;
304        unsigned char dlc_ti_tick_2;
305        unsigned char product_id[18];
306};
307
308struct dlc_open_sap {
309        unsigned char command;
310        unsigned char reserved1;
311        unsigned char ret_code;
312        unsigned char reserved2;
313        __u16 station_id;
314        unsigned char timer_t1;
315        unsigned char timer_t2;
316        unsigned char timer_ti;
317        unsigned char maxout;
318        unsigned char maxin;
319        unsigned char maxout_incr;
320        unsigned char max_retry_count;
321        unsigned char gsap_max_mem;
322        __u16 max_i_field;
323        unsigned char sap_value;
324        unsigned char sap_options;
325        unsigned char station_count;
326        unsigned char sap_gsap_mem;
327        unsigned char gsap[0];
328};
329
330struct srb_xmit {
331        unsigned char command;
332        unsigned char cmd_corr;
333        unsigned char ret_code;
334        unsigned char reserved1;
335        __u16 station_id;
336};
337
338struct arb_rec_req {
339        unsigned char command;
340        unsigned char reserved1[3];
341        __u16 station_id;
342        __u16 rec_buf_addr;
343        unsigned char lan_hdr_len;
344        unsigned char dlc_hdr_len;
345        __u16 frame_len;
346        unsigned char msg_type;
347};
348
349struct asb_rec {
350        unsigned char command;
351        unsigned char reserved1;
352        unsigned char ret_code;
353        unsigned char reserved2;
354        __u16 station_id;
355        __u16 rec_buf_addr;
356};
357
358struct rec_buf {
359        unsigned char reserved1[2];
360        __u16 buf_ptr;
361        unsigned char reserved2;
362        unsigned char receive_fs;
363        __u16 buf_len;
364        unsigned char data[0];
365};
366
367struct srb_set_funct_addr {
368        unsigned char command;
369        unsigned char reserved1;
370        unsigned char ret_code;
371        unsigned char reserved2[3];
372        unsigned char funct_address[4];
373};
374
375#endif
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