source: svn/trunk/newcon3bcm2_21bu/BSEAV/lib/bprofile/bperf_counter.h @ 2

/***************************************************************************
 *     Copyright (c) 2006-2007, Broadcom Corporation
 *     All Rights Reserved
 *     Confidential Property of Broadcom Corporation
 *
 *  THIS SOFTWARE MAY ONLY BE USED SUBJECT TO AN EXECUTED SOFTWARE LICENSE
 *  AGREEMENT  BETWEEN THE USER AND BROADCOM.  YOU HAVE NO RIGHT TO USE OR
 *  EXPLOIT THIS MATERIAL EXCEPT SUBJECT TO THE TERMS OF SUCH AN AGREEMENT.
 *
 * $brcm_Workfile: bperf_counter.h $
 * $brcm_Revision: 7 $
 * $brcm_Date: 1/15/07 10:50a $
 *
 * Module Description:
 *
 * Perfomance counter module
 *
 * Revision History:
 *
 * $brcm_Log: /BSEAV/lib/bprofile/bperf_counter.h $
 * 
 * 7   1/15/07 10:50a vsilyaev
 * PR 25997: Added 7038 performance counters
 * 
 * 6   12/22/06 12:03p vsilyaev
 * PR 26792: Added rac_access, rac_prefetch and rac_hits configurations
 * for the peformance counter
 * 
 * 5   12/14/06 4:38p vsilyaev
 * PR 25997: Added counter configuration to capture issue rate
 * 
 * 4   12/8/06 7:24p vsilyaev
 * PR 25997: Fixed warning
 * 
 * 3   12/7/06 2:44p vsilyaev
 * PR 25997: Added fixes for 3.4 GCC compiler
 * 
 * 2   12/5/06 11:08a vsilyaev
 * PR 25997: Improved perf counter interface
 * 
 * 1   12/1/06 5:58p vsilyaev
 * PR 25997: CPU perfomance counter interface
 * 
 * 
 *******************************************************************************/
#ifndef __BPERF_COUNT_H__
#define __BPERF_COUNT_H__

#ifdef __cplusplus
extern "C"
{
#endif

#if BCHP_CHIP==7401 || BCHP_CHIP==3560 || BCHP_CHIP==3543 || BCHP_CHIP==7550
#define B_PERF_BMIPS3300 1
#ifndef BSTD_INLINE
#define BSTD_INLINE extern inline __attribute__((always_inline))
#endif
#elif BCHP_CHIP==7038
#define B_PERF_MIPSR5K  1
#else
#error "Not supported"
#endif

#if B_PERF_BMIPS3300
#define BPERF_N_COUNTERS        4
#define BPERF_SAMPLE_INITIALIZER {{0,0,0,0}}


#define b_perf_read_one(sel)    __extension__                   \
({ unsigned int b_perf_read_res;                                                \
                __asm__ __volatile__(".set\tpush\n\t"                   \
                        ".set\tmips32\n\t"                                                      \
                        "mfc0\t%0, $25, " #sel "\n\t"                   \
                        ".set\tpop\n\t"                                                 \
                        : "=r" (b_perf_read_res));                                      \
        b_perf_read_res;                                                                        \
})

BSTD_INLINE unsigned bperf_sample_diff(unsigned stop, unsigned start)
{
        return start-stop; /* perfomance timers are count down */
}

#elif B_PERF_MIPSR5K
#define BPERF_N_COUNTERS        2
#define BPERF_SAMPLE_INITIALIZER {{0,0}}
#define b_perf_read_one(sel)    __extension__                   \
({ unsigned int b_perf_read_res;                                                \
                __asm__ __volatile__(".set\tpush\n\t"                   \
                        ".set\tmips32\n\t"                                                      \
                        "mfc0\t%0, $25, " #sel "\n\t"                   \
                        ".set\tpop\n\t"                                                 \
                        : "=r" (b_perf_read_res));                                      \
        b_perf_read_res;                                                                        \
})

BSTD_INLINE unsigned bperf_sample_diff(unsigned stop, unsigned start) 
{
        return stop-start; 
}

#else /* BCHP_CHIP */
#error "Not supported"
#endif /* BCHP_CHIP */

typedef struct bperf_counter_mode {
        const char *counter_names[BPERF_N_COUNTERS];
        unsigned config[3]; /* opaque HW configuration */
} bperf_counter_mode;

typedef struct bperf_sample {
        unsigned data[BPERF_N_COUNTERS];
} bperf_sample;


extern const  bperf_counter_mode bperf_counter_dcache;
extern const  bperf_counter_mode bperf_counter_icache;
extern const  bperf_counter_mode bperf_counter_instructions;
#if B_PERF_BMIPS3300
extern const  bperf_counter_mode bperf_counter_rac_access;
extern const  bperf_counter_mode bperf_counter_rac_prefetch;
extern const  bperf_counter_mode bperf_counter_rac_hit;
#endif

int b_perf_init(const bperf_counter_mode *mode);


const bperf_counter_mode *bperf_get_mode(void);

void bperf_print(const bperf_counter_mode *mode, const bperf_sample *stop, const bperf_sample *start);

BSTD_INLINE void __attribute__((no_instrument_function))
b_perf_read(bperf_sample *sample)
{
#if B_PERF_BMIPS3300
        sample->data[0] = b_perf_read_one(0);
        sample->data[1] = b_perf_read_one(1);
        sample->data[2] = b_perf_read_one(2);
        sample->data[3] = b_perf_read_one(3);
#elif B_PERF_MIPSR5K
        sample->data[0] = b_perf_read_one(1);
        sample->data[1] = b_perf_read_one(3);
#endif
        return;
}

#ifndef bperf_read
#define bperf_read b_perf_read
#endif

#ifndef bperf_init
#define bperf_init b_perf_init
#endif

#ifdef __cplusplus
}
#endif

#endif /* __BPERF_COUNT_H__ */