| 1 | /*************************************************************** |
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| 2 | ** |
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| 3 | ** Broadcom Corp. Confidential |
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| 4 | ** Copyright 1998-2000 Broadcom Corp. All Rights Reserved. |
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| 5 | ** |
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| 6 | ** THIS SOFTWARE MAY ONLY BE USED SUBJECT TO AN EXECUTED |
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| 7 | ** SOFTWARE LICENSE AGREEMENT BETWEEN THE USER AND BROADCOM. |
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| 8 | ** YOU HAVE NO RIGHT TO USE OR EXPLOIT THIS MATERIAL EXCEPT |
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| 9 | ** SUBJECT TO THE TERMS OF SUCH AN AGREEMENT. |
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| 10 | ** |
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| 11 | ** File: bcm_mips_defs.h |
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| 12 | ** Description: MIPS definitions. |
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| 13 | ** |
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| 14 | ****************************************************************/ |
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| 15 | #ifndef __BCM_MIPS_DEFS__ |
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| 16 | #define __BCM_MIPS_DEFS__ |
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| 17 | |
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| 18 | #define BCM_PHYS_TO_KSEG1(x) ((unsigned int)(x) | 0xA0000000) |
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| 19 | #define BCM_CPU_TO_PHYS(x) ((unsigned int)(x) & ~0xA0000000) |
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| 20 | #define BCM_PHYS_TO_KSEG0(x) ((unsigned int)(x) | 0x80000000) |
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| 21 | /*************************************************************************** |
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| 22 | Summary: |
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| 23 | Macro to write a cp0 register. |
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| 24 | |
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| 25 | Description: |
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| 26 | asm macro to write a cp0 register given the register, select and value. (MIPS32) |
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| 27 | |
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| 28 | See Also: |
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| 29 | bcm_read_cp0 |
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| 30 | ***************************************************************************/ |
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| 31 | #define bcm_write_cp0(reg, sel, value) \ |
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| 32 | { __asm__ __volatile__(".set\tpush\n\t" \ |
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| 33 | ".set\tmips32\n\t" \ |
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| 34 | "mtc0\t%z0, " #reg ", " #sel "\n\t" \ |
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| 35 | ".set\tpop\n\t" \ |
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| 36 | : /* none */ \ |
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| 37 | : "r" ((unsigned int)value)); \ |
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| 38 | } |
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| 39 | |
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| 40 | /*************************************************************************** |
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| 41 | Summary: |
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| 42 | Macro to read a cp0 register. |
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| 43 | |
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| 44 | Description: |
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| 45 | asm macro to read a cp0 register given the register and select. (MIPS32) |
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| 46 | |
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| 47 | See Also: |
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| 48 | bcm_read_cp0 |
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| 49 | ***************************************************************************/ |
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| 50 | #define bcm_read_cp0(reg, sel) \ |
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| 51 | ({ unsigned int bcm_read_cp0_res; \ |
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| 52 | __asm__ __volatile__( ".set\tpush\n\t" \ |
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| 53 | ".set\tmips32\n\t" \ |
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| 54 | "mfc0\t%0, " #reg ", " #sel "\n\t" \ |
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| 55 | ".set\tpop\n\t" \ |
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| 56 | : "=r" (bcm_read_cp0_res)); \ |
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| 57 | bcm_read_cp0_res; \ |
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| 58 | }) |
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| 59 | |
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| 60 | |
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| 61 | #endif /* __BCM_MIPS_DEFS__ */ |
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| 62 | |
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