| 1 | #ifndef __ASSEMBLER__ |
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| 2 | #define __ASSEMBLER__ |
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| 3 | #endif |
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| 4 | #include "bmips.h" |
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| 5 | #include "bchp_common.h" |
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| 6 | #include "bchp_bsp_glb_control.h" |
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| 7 | #include "bchp_bsp_cmdbuf.h" |
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| 8 | |
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| 9 | /* |
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| 10 | * The following define needs to be manually turned on/off |
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| 11 | * depending on what chip the CFE is being built for. |
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| 12 | * |
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| 13 | * NON-ZEUS_2_0: |
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| 14 | * 7231A0/7344A0/7346A0/7420A0/7425A0/7552A0 FullROM |
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| 15 | * |
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| 16 | * ZEUS_2_0: |
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| 17 | * 7231A0/7344A0/7346A0/7420A0/7425A0/7552A0 BSECK |
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| 18 | * 7231B0/7344B0/7346B0/7420B0/7425B0/7552B0 FullROM |
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| 19 | */ |
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| 20 | #define ZEUS_2_0 |
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| 21 | |
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| 22 | #if defined(ZEUS_2_0) |
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| 23 | #define CMD_INBUFFER2 (2 * 384) /* 0x300 */ |
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| 24 | #else |
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| 25 | #define CMD_INBUFFER2 (1 * 384) /* 0x180 */ |
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| 26 | #endif /* ZEUS_2_0 */ |
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| 27 | #define CMD_OUTBUFFER2 (3 * 384) /* 0x480 */ |
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| 28 | |
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| 29 | .text |
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| 30 | |
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| 31 | |
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| 32 | |
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| 33 | |
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| 51 | |
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| 52 | |
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| 53 | |
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| 54 | |
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| 55 | |
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| 56 | |
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| 57 | /**************************************************************** |
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| 58 | Function Name: hide_mips_boot_rom |
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| 59 | Description: |
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| 60 | Parameters: |
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| 61 | None |
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| 62 | Returns: |
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| 63 | unsigned char |
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| 64 | ****************************************************************/ |
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| 65 | LEAF(hide_mips_boot_rom) |
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| 66 | |
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| 67 | .set noreorder |
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| 68 | /* save ra to t8 so that we can call another function here */ |
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| 69 | move t8, ra |
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| 70 | |
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| 71 | /* check BSP_GLB_NONSECURE_GLB_IRDY */ |
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| 72 | bal check_for_IRDY2 |
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| 73 | nop |
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| 74 | |
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| 75 | /* command input buffer2 = BCHP_BSP_CMDBUF_DMEMi_ARRAY_BASE+CMD_INBUFFER2 */ |
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| 76 | /* version */ |
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| 77 | /* *(volatile unsigned long*) (0xb0327980) = 0x10; */ |
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| 78 | li t0, PHYS_TO_K1(BCHP_PHYSICAL_OFFSET+BCHP_BSP_CMDBUF_DMEMi_ARRAY_BASE+CMD_INBUFFER2) |
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| 79 | li t1, 0x10 |
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| 80 | sw t1, 0(t0) |
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| 81 | |
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| 82 | /* seq */ |
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| 83 | /* *(volatile unsigned long*) (0xb0327984) = 0x22;*/ |
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| 84 | li t1, 0x22 |
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| 85 | sw t1, 4(t0) |
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| 86 | |
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| 87 | /* cont */ |
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| 88 | /* *(volatile unsigned long*) (0xb0327988) = 0xABCDEF00; */ |
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| 89 | li t1, 0xABCDEF00 |
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| 90 | sw t1, 8(t0) |
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| 91 | |
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| 92 | /* command ID to send region verification cmd */ |
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| 93 | /* *(volatile unsigned long*) (0xb032798C) = 0xF655AA09; */ |
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| 94 | li t1, 0xF655AA09 |
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| 95 | sw t1, 12(t0) |
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| 96 | |
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| 97 | /* command length in bytes.*/ |
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| 98 | /* *(volatile unsigned long*) (0xb0327990) = 0x789A0008; */ |
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| 99 | li t1, 0x789A0008 |
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| 100 | sw t1, 16(t0) |
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| 101 | |
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| 102 | /* region verification op code - 0x9 = hide MIPS boot rom */ |
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| 103 | /* *(volatile unsigned long*) (0xb0327994) = 9; */ |
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| 104 | li t1, 0x9 |
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| 105 | sw t1, 20(t0) |
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| 106 | |
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| 107 | /* Reserved */ |
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| 108 | /* *(volatile unsigned long*) (0xb0327998) = 0; */ |
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| 109 | li t1, 0x0 |
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| 110 | sw t1, 24(t0) |
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| 111 | |
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| 112 | /* set BSP_GLB_NONSECURE_GLB_ILOAD2 */ |
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| 113 | /* *(volatile unsigned long*) (VIRTUAL_ADDRESS+BCHP_PHYSICAL_OFFSET+BCHP_BSP_GLB_CONTROL_GLB_ILOAD2) = 0x01; */ |
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| 114 | li t0, PHYS_TO_K1(BCHP_PHYSICAL_OFFSET+BCHP_BSP_GLB_CONTROL_GLB_ILOAD2) |
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| 115 | li t1, 0x01 |
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| 116 | sw t1, 0(t0) |
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| 117 | |
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| 118 | /* check BSP_GLB_NONSECURE_GLB_OLOAD2 */ |
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| 119 | bal check_for_OLOAD2 |
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| 120 | nop |
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| 121 | |
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| 122 | /* BSP_GLB_NONSECURE_GLB_HOST_INTR_STATUS = 0 */ |
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| 123 | /* *(volatile unsigned long*) (VIRTUAL_ADDRESS+BCHP_PHYSICAL_OFFSET+BCHP_BSP_GLB_CONTROL_GLB_HOST_INTR_STATUS) = 0x00; */ |
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| 124 | li t0, PHYS_TO_K1(BCHP_PHYSICAL_OFFSET+BCHP_BSP_GLB_CONTROL_GLB_HOST_INTR_STATUS) |
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| 125 | sw zero, 0(t0) |
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| 126 | |
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| 127 | /* BSP_GLB_NONSECURE_GLB_OLOAD2 = 0 */ |
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| 128 | /* *(volatile unsigned long*) (VIRTUAL_ADDRESS+BCHP_PHYSICAL_OFFSET+BCHP_BSP_GLB_CONTROL_GLB_OLOAD2) = 0x00;*/ |
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| 129 | li t0, PHYS_TO_K1(BCHP_PHYSICAL_OFFSET+BCHP_BSP_GLB_CONTROL_GLB_OLOAD2) |
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| 130 | sw zero, 0(t0) |
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| 131 | |
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| 132 | /* check status */ |
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| 133 | /* status = *(volatile unsigned char*) (0xb0327c94); */ |
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| 134 | li t0, PHYS_TO_K1(BCHP_PHYSICAL_OFFSET+BCHP_BSP_CMDBUF_DMEMi_ARRAY_BASE) |
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| 135 | li t1, CMD_OUTBUFFER2 |
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| 136 | addu t0, t0, t1 |
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| 137 | lw v0, 20(t0) |
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| 138 | |
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| 139 | /* Restore ra from t8 */ |
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| 140 | move ra, t8 |
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| 141 | |
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| 142 | .set reorder |
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| 143 | jr ra |
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| 144 | nop |
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| 145 | END(hide_mips_boot_rom) |
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| 146 | |
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| 147 | |
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