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ram_init.c @ 2

Last change on this file since 2 was 2, checked in by phkim, 11 years ago

1.phkim

revision copy newcon3sk r27

Property svn:executable set to *

File size: 27.3 KB

Line
1	/***************************************************************************
2	* Copyright (c) 2003-2013, Broadcom Corporation
3	* All Rights Reserved
4	* Confidential Property of Broadcom Corporation
5	*
6	* THIS SOFTWARE MAY ONLY BE USED SUBJECT TO AN EXECUTED SOFTWARE LICENSE
7	* AGREEMENT BETWEEN THE USER AND BROADCOM. YOU HAVE NO RIGHT TO USE OR
8	* EXPLOIT THIS MATERIAL EXCEPT SUBJECT TO THE TERMS OF SUCH AN AGREEMENT.
9	*
10	* $brcm_Workfile: $
11	* $brcm_Revision: $
12	* $brcm_Date: $
13	*
14	* Module Description:
15	*
16	* Revision History:
17	*
18	* $brcm_Log: $
19	*
20	*
21	***************************************************************************/
22
23
24	#include "ministd.h"
25	#include "serial.h"
26	#include "bos.h"
27	#include "cache_util.h"
28	#include "bstd.h"
29	#include "bkni.h"
30	#include "ucos_ii.h"
31	#include "gist.h"
32	#include "bos_task_priorities.h"
33	#include "bcmuart.h"
34	#include "bchp_timer.h"
35	#include "bmem_debug.h"
36	#include "zlib.h"
37	#include "bfds.h"
38	#include "bchp_sun_top_ctrl.h"
39	#include "bstd_defs.h"
40	#include "bkni_print.h"
41	#include "ramheader.h"
42	#ifdef PROFILE
43	#include "bapp_util.h"
44	#endif
45	#if (CONFIG_ENABLE_SCM == 1)
46	#include "scm_low.h"
47	#endif
48	#include "bapp.h"
49
50
51	#include "zlib.h"
52
53
54	#ifdef CONFIG_MRC
55	/* memory checker */
56	#include "bmrc.h"
57	#include "bmrc_monitor.h"
58	BMRC_Handle mrc_handle;
59	BMRC_Monitor_Handle mrc_monitor_handle;
60	#endif
61
62	#ifdef TUNER_DEBUG
63	#include "bchp_ds_topm.h"
64	#endif
65
66	#define CONSOLE_STK_SIZE 512 /* in words, changed from 1024 */
67	#define REG_RW_STK_SIZE 128 /* in words */
68	#define TEST_TASKINFO_STK_SIZE 256 /* in words, changed from 512 */
69	#define APP_STK_SIZE 1024 /* in words, changed from 2048 */
70	#ifdef CONFIG_ENABLE_EMU
71	#define TASKINFO_SLEEP_ms 100
72	#else
73	#define TASKINFO_SLEEP_ms 2000
74	#endif
75
76	BDBG_MODULE(ram_init);
77
78	extern unsigned int _fbss;
79	extern unsigned int _end;
80	extern unsigned long ram1_start_address;
81
82	void console_main(void *data);
83	void test_taskinfo_main(void *data);
84	unsigned get_opt(void);
85	void bprint_flush(void);
86
87	extern void ram_start(void);
88	extern void mvd_debug_out(void);
89	extern bresult image_flash_install(uint32_t base, uint32_t offset, uint8_t * data, uint32_t size);
90	extern bresult image_flash_install_fupdate(uint32_t base, uint32_t offset, uint8_t * data, uint32_t size);
91	void flash_erase(uint32_t base, uint32_t offset);
92	#ifdef CONFIG_DTA_CABLE
93	static void download_signed(void);
94	#endif
95	void chip_reset(void);
96	int get_opt_int(void);
97
98	static b_task_t app_task_h;
99	static b_task_t info_task_h;
100	static unsigned int *info_stack;
101
102	/* XMODEM download support */
103	#define MAX_COMPRESSED_SIZE (4 * 1024 * 1024)
104	#define MAX_DECOMPRESSED_SIZE (8 * 1024 * 1024)
105
106	#if 0
107	#if defined(CONFIG_BOOT_ROM)
108	#define ROM_TEXT_BASE 0x9EC00000
109	#else
110	#define ROM_TEXT_BASE 0x9FC00000
111	#endif
112
113	#define FLASH_BASE (ROM_TEXT_BASE + 0x20000000)
114	#endif
115
116	#ifdef CONFIG_SMARTCARD_TEST
117	extern void bsettop_smartcard_test(void);
118	#endif
119	bool s_printing_enabled = true;
120	extern unsigned int xmodem_receive(volatile UartChannel uart, unsigned char buf);
121
122	// [JPF] #include "bchp_vcxo_ctl_config_fsm.h"
123
124	#ifndef BCHP_K0_OFFSET
125	#define BCHP_K0_OFFSET (0xA0000000 \| 0x10000000)
126	#endif
127	#ifndef WriteReg32
128	#define WriteReg32(x,v) { ((volatile unsigned int)(BCHP_K0_OFFSET + (unsigned int)(x))) = (v); }
129	#endif
130	#ifndef ReadReg32
131	#define ReadReg32(x) ((volatile unsigned int)(BCHP_K0_OFFSET + (unsigned int)(x)))
132	#endif
133
134	#if (BCHP_CHIP==7550)
135	/*
136	Summary:
137	Set the CPU frequency using the PLL divider value.
138	freq = 1296Hz/pll_div.
139	The frequency should be set before OS is initialized.
140	*/
141	static void set_cpu_frequency(unsigned int pll_div)
142	{
143	unsigned int reg;
144
145	reg = ReadReg32( BCHP_VCXO_CTL_CONFIG_FSM_PLL_NEXT_CFG_3B);
146	reg &= ~BCHP_VCXO_CTL_CONFIG_FSM_PLL_NEXT_CFG_3B_m5div_MASK;
147	reg \|= (pll_div << BCHP_VCXO_CTL_CONFIG_FSM_PLL_NEXT_CFG_3B_m5div_SHIFT); /* 3: for MIPS channel gives: 432 MHz */
148	WriteReg32( BCHP_VCXO_CTL_CONFIG_FSM_PLL_NEXT_CFG_3B, reg);
149
150	reg = ReadReg32( BCHP_VCXO_CTL_CONFIG_FSM_PLL_NEXT_CFG_3A);
151	reg &= ~BCHP_VCXO_CTL_CONFIG_FSM_PLL_NEXT_CFG_3A_en_reg_ctrl_cfg_3_MASK;
152	reg \|= (1 << BCHP_VCXO_CTL_CONFIG_FSM_PLL_NEXT_CFG_3A_en_reg_ctrl_cfg_3_SHIFT);
153	WriteReg32( BCHP_VCXO_CTL_CONFIG_FSM_PLL_NEXT_CFG_3A, reg);
154
155	/* Issue the PLL update command */
156	reg = ReadReg32( BCHP_VCXO_CTL_CONFIG_FSM_PLL_UPDATE);
157	reg \|= BCHP_VCXO_CTL_CONFIG_FSM_PLL_UPDATE_update_MASK;
158	WriteReg32( BCHP_VCXO_CTL_CONFIG_FSM_PLL_UPDATE, reg);
159	}
160	#endif
161	/***********************************************************************/
162	/* static inline void s_do_putc(volatile UartChannel uart, int c) /
163	/***********************************************************************/
164	static inline void s_do_putc(volatile UartChannel *uart, int c)
165	{
166	while (!(uart->sdw_lsr & THRE));
167	uart->sdw_rbr_thr_dll = (unsigned char)c;
168	}
169
170	/***********************************************************************/
171	/* serial_putc(UartChannel uart, unsigned int c)/
172	/***********************************************************************/
173	void print_string(char *str)
174	{
175	unsigned int idx = 0;
176
177	while(str[idx])
178	serial_putc(CONSOLE_UART,str[idx++]);
179	}
180
181
182
183	#define inflateInit2(strm, windowBits) \
184	inflateInit2_((strm), (windowBits), ZLIB_VERSION, sizeof(z_stream))
185
186
187	/* used to verify the compressed binary to make sure it is right */
188	#if 0
189	static int decompress(unsigned char in_buf, unsigned int in_size, unsigned char out_buf, unsigned int out_size)
190	{
191	z_stream strm;
192	int ret;
193
194	memset(&strm,0,sizeof(strm));
195	strm.avail_in = in_size;
196	strm.next_in = in_buf;
197	strm.avail_out = out_size;
198	strm.next_out = out_buf;
199	ret = inflateInit2(&strm, 15+32);
200	if (ret == Z_OK)
201	{
202	ret = inflate(&strm, Z_FINISH);
203	inflateEnd(&strm);
204	if ((ret == Z_STREAM_END) \|\| (ret == Z_OK))
205	{
206	return strm.total_out;
207	}
208	else if (ret > 0)
209	{
210	return -ret;
211	}
212	}
213	return ret;
214	}
215	#endif
216
217	#define FLASH_BASE_dst 0x9fc00000 + 0x30000
218	extern unsigned char block_signal;
219
220	void fupdate(void)
221	{
222	int rc;
223	unsigned char *cmp_data;
224	unsigned char *data;
225	unsigned int flags;
226
227	cmp_data = malloc(MAX_COMPRESSED_SIZE);
228	data = malloc(MAX_DECOMPRESSED_SIZE);
229
230	block_signal=true; //ir , kpd block
231
232	print_string("\r\nStart XModem download of compressed binary...\r\n");
233	/* Write stop sequence */
234	BREG_Write32(GetREG(), BCHP_TIMER_WDCMD,0xee00);
235	BREG_Write32(GetREG(), BCHP_TIMER_WDCMD,0x00ee);
236
237	flags = bos_enter_critical();
238	OSSchedLock();
239
240	rc = xmodem_receive(CONSOLE_UART,cmp_data);
241	if (rc <= 0)
242	{
243	print_string("\r\nDownload failed\r\n");
244	OSSchedUnlock();
245	bos_exit_critical(flags);
246	free(cmp_data);
247	free(data);
248	block_signal=false;
249	return;
250	}
251	OSSchedUnlock();
252	bos_exit_critical(flags);
253
254	print_string("\n === start image flash === \n");
255
256	flags = bos_enter_critical();
257	rc = image_flash_install_fupdate(FLASH_BASE_dst, 0, cmp_data, rc);
258	bos_exit_critical(flags);
259	free(data);
260	free(cmp_data);
261
262	//have to check image_flash_install
263	if (rc) {
264	print_string("\r\nProgram flash is failed. Reset the chip\n\r");
265	}
266	else {
267	print_string("\r\nProgram flash completed. Reset the chip\n\r");
268	}
269	chip_reset();
270	}
271
272	#define BPRINT_STK_SIZE 256 /* 256 should be enough */
273	static unsigned int bprint_stack[BPRINT_STK_SIZE];
274	static b_task_t print_task_h;
275	static void bprint_entry(void *data);
276	extern int get_fm_deviation_value();
277	extern void set_fm_deviation_value(int value);
278	extern void put_str(char *s);
279
280	void bcm_main(void)
281	{
282	b_task_params console_params;
283	b_task_t console_task_h;
284	BERR_Code berr;
285
286	/* initialize RAC and calc_cache_sizes */
287	calc_cache_sizes();
288
289	#if 1
290	{
291	uint32_t reg;
292	#include "bmips3300.h"
293	#include "bchp_misb_bridge.h"
294
295	/* enable write gathering mode */
296	reg = ReadReg32(BCHP_MISB_BRIDGE_WG_MODE_N_TIMEOUT);
297	reg &= ~(BCHP_MISB_BRIDGE_WG_MODE_N_TIMEOUT_MODE_MASK \| BCHP_MISB_BRIDGE_WG_MODE_N_TIMEOUT_TIMEOUT_MASK);
298	reg \|= (BCHP_MISB_BRIDGE_WG_MODE_N_TIMEOUT_MODE_MODE_2 << BCHP_MISB_BRIDGE_WG_MODE_N_TIMEOUT_MODE_SHIFT) \| MISB_BRIDGE_WG_MODE_TIMEOUT;
299
300	/* enable slipt transaction mode */
301	reg = ReadReg32(BCHP_MISB_BRIDGE_MISB_SPLIT_MODE);
302	reg \|= BCHP_MISB_BRIDGE_MISB_SPLIT_MODE_SPLIT_MODE_ENABLE;
303	WriteReg32(BCHP_MISB_BRIDGE_MISB_SPLIT_MODE, reg);
304	}
305	#endif
306
307	#if (BCHP_CHIP==7550)
308	set_cpu_frequency(6);
309	#endif
310
311	bos_init();
312	/* kni and dbg must be initialized after os since they use os primitives */
313	berr = BKNI_Init();
314	BKNI_Print_Init();
315	berr = BDBG_Init();
316
317	console_params.name="console";
318	console_params.priority = CONSOLE_PRIORITY;
319	console_params.stack_size = CONSOLE_STK_SIZE;
320	console_params.stack = (unsigned int)malloc(console_params.stack_size sizeof(unsigned int));
321	BDBG_ASSERT(console_params.stack);
322
323	bos_start_task(&console_task_h,&console_params,console_main,&console_task_h);
324
325	console_params.name="bprint";
326	console_params.priority = BPRINT_PRIORITY;
327	console_params.stack_size = BPRINT_STK_SIZE;
328	console_params.stack = bprint_stack;
329
330	bos_start_task(&print_task_h, &console_params, bprint_entry,&print_task_h);
331	bos_start();
332
333	printf("%s..SHOULD NEVER GET HERE.\n",__FUNCTION__);
334	__asm__("break 2");
335	}
336	#define COMPRESSED_4M 0x400000
337
338
339	#define USE_BCM_DEFAULT_CODE 0
340	void console_main(void *data)
341	{
342	b_task_params params;
343	unsigned int cmd;
344	BERR_Code berr;
345	#if (CONFIG_ENABLE_SCM == 1)
346	uint32_t scm_id;
347	#endif
348	#ifdef CONFIG_NXP_TDA182I4
349	#define DEV_NUM 20
350	// unsigned char powerlevel;
351	// int npowerSum;
352	// int i;
353	#endif
354
355	bos_calibrate();
356
357	gist_init();
358
359	#ifndef BCM_DEBUG
360	/* workaround for "slow booting" issue in release build */
361	{
362	#include "bcm_mips_defs.h"
363
364	unsigned int count;
365
366	cmd = bos_enter_critical();
367	count = bcm_read_cp0($9,0);
368	count += 2000; /* moving compare register so that it will not slip and ended up to wrap 22 seconds */
369	bcm_write_cp0($11,0,count);
370	bos_exit_critical(cmd);
371	}
372	#endif
373
374	/* reuse cmd as flags. Need to disable interrupt when calling the serial_init function in release version */
375	//cmd = bos_enter_critical();
376	serial_init(CONSOLE_UART,115200);
377	//bos_exit_critical(cmd);
378
379	#if (CONFIG_ENABLE_SCM == 1)
380	/* scm id must be read from flash for now we assume it is MOT*/
381	scm_id = 0x4749;
382	berr = gist_rap_open(scm_id, scml_otp_callback);
383	#else
384	berr = gist_rap_open(0, NULL);
385	/* if raptor fails in this case dsp loader did not run */
386	#endif
387
388	print_cache_sizes();
389
390	#ifdef CONFIG_PCM_TEST
391	extern void bpcm_play_test(void);
392	{
393
394	bpcm_play_test();
395	while(1)
396	bos_sleep(100);
397	}
398	#endif
399	#ifdef CONFIG_BSD
400	TestBSD();
401	#endif
402	#ifdef CONFIG_MEM2MEM_TEST
403	TestM2M();
404	#endif
405
406	#ifndef CONFIG_TUNER_TEST
407	params.priority = APP_PRIORITY;
408	params.stack_size = APP_STK_SIZE;
409	params.name = "ram_start";
410	params.stack = (unsigned int)malloc(params.stack_size sizeof(unsigned int));
411	BDBG_ASSERT(params.stack);
412	bos_start_task(&app_task_h, &params, (void*)ram_start, &app_task_h);
413	info_task_h = 0;
414	#else
415	/* defined in bsettop_tuner_vsb.c for VSB tuner test */
416	/* defined in bsettop_tuner_isdb.c for ISDB-T tuner test */
417
418	extern void TunerTest();
419	TunerTest();
420	#endif
421	printf("Calculated MIPS = %dHz:\n", 2 * g_running_clock.clock_freq);
422
423	while (1)
424	{
425	#if USE_BCM_DEFAULT_CODE
426	printf("Console Menu:\n");
427	#ifdef BCM_DEBUG
428	printf("1) Memory Use...\n");
429	#endif
430	#ifdef PROFILE
431	printf("2) Profiling Start...\n");
432	printf("3) Profiling Stop...\n");
433	#endif
434	printf("4) Download and update signed image\n");
435	printf("5) Download and update software in flash\n");
436	printf("6) Toggle TASKINFO periodic display\n");
437	#ifdef CONFIG_SMARTCARD_TEST
438	printf("7) Smartcard test\n");
439	#endif
440	printf("8) Print system status...\n");
441	printf("9) Enter FM deviation factor...\n");
442	printf("11) Reboot\n");
443	#ifdef BCM_DEBUG
444	printf("12) MVD Debug Info\n");
445	printf("13) Scratch Info\n");
446	#endif
447	printf("21) Erase second image\n");
448	printf("22) Invoke debug stub\n");
449	#ifdef CONFIG_DTA_CABLE
450	#ifdef FOR_DOLBY_CERTIFICATION
451	printf("30) Toggle Dolby operational mode or disable\n");
452	printf("31) Change Audio parameters\n");
453	#endif
454	#endif
455
456	/* ACB615 has HDMI output */
457	#ifdef ACB615
458	printf("91) Set deinterlacer output affinity\n");
459	printf("92) Set HD H_SCL Coefficient Index\n");
460	printf("93) Set SD H_SCL Coefficient Index\n");
461	printf("94) Set HD V_SCL Coefficient Index\n");
462	printf("95) Set SD V_SCL Coefficient Index\n");
463	#endif
464
465	printf("96) Set AVL configuration\n");
466	#ifdef CONFIG_NXP_TDA182I4
467	printf("97) NXP_TDA182I4_DupReg\n");
468	printf("98) NXP_TDA182I4_SetScanfreqForTest (Mhz)\n");
469	#endif
470	printf("99) Power,Channel up/down\n");
471
472
473	#ifdef TUNER_DEBUG
474	printf("100) Scan and Tune a Frequency\n");
475	printf("101) Get Tuner Status\n");
476	printf("102) Tune a Frequency assigned from within BBS\n");
477	#endif
478	printf("110) Enable AVL\n");
479
480	#ifdef CONFIG_NXP_TDA182I4
481	printf("120) Get Power Level from NXP TDA182I4\n");
482	#endif
483	#endif
484
485	printf("Enter Command: ");
486	cmd = get_opt();
487	switch (cmd)
488	{
489	case 1:
490	#ifdef BCM_DEBUG
491	m_report();
492	BDBG_SetModuleLevel("BMEM",BDBG_eMsg);
493	BMEM_Dbg_DumpHeap(GetHEAP());
494	BDBG_SetModuleLevel("BMEM",BDBG_eWrn);
495	#endif
496	break;
497	#ifdef PROFILE
498	case 2:
499	bapp_util_start_profiling();
500	break;
501	case 3:
502	bapp_util_stop_profiling();
503	break;
504	#endif
505
506	#ifdef CONFIG_DTA_CABLE
507	case 4:
508	{
509	console_shutdown();
510	download_signed();
511	break;
512	}
513	#endif
514	case 5:
515	{
516	fupdate();
517	break;
518	}
519
520	case 6:
521	if (0 == info_task_h)
522	{
523	printf("TASKinfo periodic dump every %d ms.....................\n", TASKINFO_SLEEP_ms);
524	info_stack = malloc(TEST_TASKINFO_STK_SIZE * sizeof(unsigned int));
525	if (NULL != info_stack)
526	{
527	params.name="TASKinfo";
528	params.priority = 55; //TASK_INFO_PRIORITY-> 55
529	params.stack_size = TEST_TASKINFO_STK_SIZE;
530	params.stack = info_stack;
531	bos_start_task(&info_task_h, &params,test_taskinfo_main,&info_task_h);
532	BDBG_ASSERT(info_task_h);
533
534	}
535	}
536	else
537	{
538	bos_stop_task(info_task_h);
539	free(info_stack);
540	info_task_h = 0;
541	}
542	break;
543	#ifdef CONFIG_SMARTCARD_TEST
544	case 7: bsettop_smartcard_test(); break;
545	#endif
546	case 8:
547	{
548	b_cpu_load load;
549	bos_print_taskinfo();
550	bos_getload(&load);
551	printf("LOAD: %u ms IDLE:%u ISR:%u:%u %u us CSW:%u\n", load.duration, load.idle, load.isr_rate, load.isr, load.isr_us, load.ctxsw_rate);
552	#if 0
553	bint_print_stats();
554	#endif
555	break;
556	}
557	case 9:
558	{
559	int value;
560	printf("Enter FM deviation factor(current = %d):",get_fm_deviation_value());
561	value = (int)get_opt();
562	printf("\n");
563	set_fm_deviation_value(value);
564	}
565	break;
566	case 11:
567	#if 0
568	b_irw_power_off();
569	#endif
570	break;
571	#if defined(BCM_DEBUG) && defined(CONFIG_HAS_VIDEO)
572	case 12:
573	mvd_debug_out();
574	break;
575	#endif
576	#if defined(BCM_DEBUG)
577	case 13:
578	#if 0
579	printf("SCRATCH_UCOS_INFO = 0x%08x\n",ReadReg32(SCRATCH_UCOS_INFO));
580	printf("SCRATCH_THREAD_SCHED = 0x%08x\n",ReadReg32(SCRATCH_THREAD_SCHED));
581	printf("SCRATCH_RDC_GFD = 0x%08x\n",ReadReg32(SCRATCH_RDC_GFD));
582	printf("SCRATCH_RDC_MFD = 0x%08x\n",ReadReg32(SCRATCH_RDC_MFD));
583	printf("SCRATCH_RDC_SCL = 0x%08x\n",ReadReg32(SCRATCH_RDC_SCL));
584	printf("SCRATCH_RDC_CMP = 0x%08x\n",ReadReg32(SCRATCH_RDC_CMP));
585	#endif
586	break;
587	#endif
588	case 21:
589	printf("Erasing second image header...\n");
590	console_shutdown();
591	OSSchedLock();
592	#if 0
593	flash_erase(FLASH_BASE, ((unsigned long)&ram1_start_address - ROM_TEXT_BASE));
594	#endif
595	OSSchedUnlock();
596	printf("Done.\n");
597	break;
598	case 22:
599	__asm__("break 2");
600	break;
601
602	#ifdef CONFIG_DTA_CABLE
603	#ifdef FOR_DOLBY_CERTIFICATION
604	case 30:
605	{
606	int cmd;
607
608	if (g_p_dsp->system_state.audio)
609	{
610	baudio_decode_config config;
611
612	/* we can read value, but failed to set. */
613	baudio_decode_get_config(g_p_dsp->system_state.audio, &config);
614	printf("Current operational mode: ");
615	switch (config.comp_mode)
616	{
617	case 1:
618	printf("disabled\n");
619	break;
620
621	case 2:
622	printf("Line Mode\n");
623	break;
624
625	case 3:
626	printf("RF Mode\n");
627	break;
628
629	default:
630	printf("Custom mode, analog dialnorm\n");
631	break;
632	}
633	}
634	printf("Toggle operational mode/Disable (1/0)? \n");
635	cmd = get_opt();
636	if (!cmd) /* if disabled, then toggle will be back to RF mode */
637	bapp_audio_toggle_comp_mode(false);
638	else
639	{
640	bapp_audio_toggle_comp_mode(true);
641	}
642	}
643	break;
644
645	case 31:
646	{
647	int cmd = 0, mode = 3/* RF /, mono = 0; / stereo */
648	uint32_t cut = RANGE_10, boost = RANGE_10, mono_mode = 0, stereo_mode = 2;
649
650	#ifdef BCM_DEBUG
651	#if USE_BCM_DEFAULT_CODE
652
653	/* if conduct a Dolby test, then disable all printout, TODO to resume them again? */
654	if (!debug_out)
655	{
656	debug_out = true;
657	/* can't reuse mvd_debug_out since it dumps too much */
658	//mvd_debug_out();
659	BDBG_SetModuleLevel("chan_mgr",BDBG_P_eLastEntry);
660	BDBG_SetModuleLevel("bac3_pcm",BDBG_P_eLastEntry);
661	BDBG_SetModuleLevel("decode_audio",BDBG_P_eLastEntry);
662	BDBG_SetModuleLevel("bprofile",BDBG_P_eLastEntry);
663	BDBG_SetModuleLevel("bac3_pcm",BDBG_P_eLastEntry);
664	BDBG_SetModuleLevel("bsmart",BDBG_P_eLastEntry);
665	BDBG_SetModuleLevel("bscreen",BDBG_P_eLastEntry);
666	BDBG_SetModuleLevel("bapp_cable",BDBG_P_eLastEntry);
667	BDBG_SetModuleLevel("bdemux_audio",BDBG_P_eLastEntry);
668	BDBG_SetModuleLevel("pcm",BDBG_P_eLastEntry);
669	}
670	#endif
671	#endif
672	if (g_p_dsp->system_state.audio)
673	{
674	baudio_decode_config config;
675
676	/* we can read value, but failed to set. */
677	baudio_decode_get_config(g_p_dsp->system_state.audio, &config);
678	mode = config.comp_mode;
679	cut = config.dynsclh;
680	boost = config.dynscll;
681	mono = config.mono;
682	mono_mode = config.mono_mode % 4;
683	stereo_mode = config.stereo_mode % 3;
684	printf("Current mode=%d, cut=%d\%, boost=%d\%, mono = %s, mono_mode=%s, downmix=%s\n", mode, range_map(cut),
685	range_map(boost), mono ? "Mono" : "Stereo", dualmonomode[mono_mode], stereomode[stereo_mode]);
686	}
687	printf("Set compression mode [0 - Custom mode (analog dialnorm), 1 - Custom mode (analog dialnorm), 2 - Line mode, 3 - RF mode (def) [ 0 - 3 ]? \n");
688	mode = get_opt();
689	if (mode < 0 \|\| mode > 3)
690	mode = 3; /* RF mode */
691
692	printf("Set Cut range in percent [ 0 - 100 (def)]? \n");
693	cmd = get_opt();
694	if (cmd < 0 \|\| cmd > 100)
695	cmd = 100;
696	cut = dynamic_range_percent[cmd];
697
698	printf("Set Boost range in percent [ 0 - 100 (def)]? \n");
699	cmd = get_opt();
700	if (cmd < 0 \|\| cmd > 100)
701	cmd = 100;
702	boost = dynamic_range_percent[cmd];
703
704	printf("Mono/Stereo [1/0 (def)]? \n");
705	mono = get_opt();
706	if (mono < 0 \|\| mono > 1)
707	mono = 0; /* default stereo for DTA cable */
708
709	if (mono)
710	{
711	printf("Set downmixing mode 0 - Stereo, 1 - Left mono, 2 - Right mono, 3 - Mixed mono [ 0 (def) - 3 ]? \n");
712	}
713	else
714	{
715	printf("Set downmixing mode 0 - Auto, 1 - Lt/Rt, 2 - Lo/Ro [ 0 - 2 (def)]? \n");
716	}
717	cmd = get_opt();
718	if (cmd < 0 \|\| cmd > (2 + (mono ? 1: 0)))
719	{
720	if (mono)
721	{
722	cmd = 0; /* Stereo */
723	}
724	else
725	{
726	cmd = 2; /* Lo/Ro */
727	}
728	}
729	if (mono)
730	mono_mode = cmd;
731	else
732	stereo_mode = cmd;
733
734	bapp_set_dynamic_range_parameters(mode, cut, boost, mono, mono_mode, stereo_mode);
735	break;
736	}
737	#endif
738	#endif
739	#if USE_BCM_DEFAULT_CODE
740	#ifdef ACB615
741	case 91:
742	{
743	int mode;
744	printf("Select deinterlacer output affinity (1:HD, 2:SD)\n");
745	mode = get_opt();
746	if (mode == 1 \|\| mode == 2)
747	bapp_select_primary_output(NULL, mode);
748	break;
749	}
750	case 92:
751	{
752	int coeff_idx;
753	printf("Select H_SCL coefficient Index of HD path (1-26, which is softness->sharpness)\n");
754	coeff_idx = get_opt();
755	if (coeff_idx >=1 && coeff_idx <=26)
756	bapp_select_scaler_coefficient(NULL,true,0,coeff_idx);
757	break;
758	}
759	case 93:
760	{
761	int coeff_idx;
762	printf("Select H_SCL coefficient Index of SD path (1-26, which is softness->sharpness)\n");
763	coeff_idx = get_opt();
764	if (coeff_idx >=1 && coeff_idx <=26)
765	bapp_select_scaler_coefficient(NULL,true,1,coeff_idx);
766	break;
767	}
768	case 94:
769	{
770	int coeff_idx;
771	printf("Select V_SCL coefficient Index of HD path (1-26, which is softness->sharpness)\n");
772	coeff_idx = get_opt();
773	if (coeff_idx >=1 && coeff_idx <=26)
774	bapp_select_scaler_coefficient(NULL,false,0,coeff_idx);
775	break;
776	}
777	case 95:
778	{
779	int coeff_idx;
780	printf("Select V_SCL coefficient Index of SD path (1-26, which is softness->sharpness)\n");
781	coeff_idx = get_opt();
782	if (coeff_idx >=1 && coeff_idx <=26)
783	bapp_select_scaler_coefficient(NULL,false,1,coeff_idx);
784	break;
785	}
786	#endif
787
788	case 96:
789	{
790	int target, lowbound, fixedboost, opt;
791	bapp_get_avl_settings(&target, &lowbound, &fixedboost);
792	printf("Enter target level (%d dB) : ", target);
793	opt = get_opt_int();
794	if (opt != 0) target = opt;
795	printf("Enter lowerBound : (%d dB) : ", lowbound);
796	opt = get_opt_int();
797	if (opt != 0) lowbound = opt;
798	printf("Enter fixedBoost : (%d dB) : ", fixedboost);
799	opt = get_opt_int();
800	if (opt != 0) fixedboost = opt;
801	bapp_set_avl_settings(target, lowbound, fixedboost);
802
803	break;
804	}
805
806	#ifdef CONFIG_NXP_TDA182I4
807	case 97:
808	printf("Max Address =? ");
809	cmd = get_opt();
810	NXP_TDA182I4_DupReg(cmd);
811	break;
812	case 98:
813	printf("Mhz =? ");
814	cmd = get_opt();
815	NXP_TDA182I4_SetScanfreqForTest(cmd);
816	break;
817	#endif
818	#endif
819	case 99:
820	printf("2=power),Channel 1=down,0=up =? ");
821	cmd = get_opt();
822	aov_Set_Button_CHUpDown(cmd);
823	break;
824	#if USE_BCM_DEFAULT_CODE
825
826	#ifdef TUNER_DEBUG
827	case 100:
828	{
829	unsigned int freq;
830
831	RETRY1:
832	printf("Please input ATSC frequency in MHZ to tune (57 - 803): \n");
833	freq = get_opt();
834	if (freq < 57 \|\| freq > 803) {
835	printf("ATSC frequency given is out of range\n");
836	goto RETRY1;
837	}
838	bapp_scan_psi_a_freq(freq * 1000);
839	}
840	break;
841
842	case 101:
843	bapp_get_tuner_status();
844	break;
845
846	case 102:
847	{
848	unsigned int freq;
849
850	do {
851	freq = ReadReg32(BCHP_DS_TOPM_SW_SPARE1);
852	/* frequency in MHz to tune set from BBS */
853	if (freq >= 57 && freq <= 803) {
854	WriteReg32(BCHP_DS_TOPM_SW_SPARE2, 0);
855	bapp_scan_psi_a_freq(freq * 1000);
856	/* do we need to check lock status? */
857	bos_sleep(1000);
858	/* clear it per request */
859	WriteReg32(BCHP_DS_TOPM_SW_SPARE1, 0);
860	/* block I2C read/write */
861	WriteReg32(BCHP_DS_TOPM_SW_SPARE2, 1);
862	}
863	bos_sleep(1000);
864	} while (0xffffffff != freq);
865	/* clear registers */
866	WriteReg32(BCHP_DS_TOPM_SW_SPARE1, 0);
867	WriteReg32(BCHP_DS_TOPM_SW_SPARE2, 0);
868	}
869	break;
870	#endif
871
872	case 110:
873	{
874	printf("Enable AVL (0/1?) \n");
875	cmd = get_opt();
876	printf("%s AVL\n", cmd ? "Enabled" : "Disabled");
877	bapp_enable_avl((bool)cmd);
878	}
879	break;
880
881	#ifdef CONFIG_NXP_TDA182I4
882	case 120:
883	npowerSum = 0;
884	for(i=0;i<DEV_NUM;i++)
885	{
886	powerlevel = NXP_TDA182I4_GetPowerLevel() ;
887	npowerSum += powerlevel;
888	bos_sleep(100);
889	}
890	powerlevel = npowerSum/DEV_NUM;
891	printf("\nPower Level = %d\n",powerlevel);
892	break;
893	#endif
894	#endif
895
896	#if 1//DST test
897	case 200:
898	{
899	// OS_HeapTest();
900	// extern DHL_RESULT FeTest_Tune(tDHL_TunerID id, int isCable, int rf, int demod);
901	// FeTest_Tune(0,0,16,1);
902	}
903	break;
904	case 201:
905	{
906	// OS_SemTest();
907	// extern void FeTest_Get_Info(int id);
908	// FeTest_Get_Info(0);
909	}
910	break;
911	case 202:
912	// OS_MsgQTest();
913	break;
914	case 999:
915	{
916	// #include "DMW_Status.h"
917	// extern STATUS App_NVM_FormatNvParam(BOOL bWaitComplete);
918	// App_NVM_FormatNvParam(TRUE);
919	break;
920	}
921	#endif
922
923
924	case 900:
925	{ //extern void DHL_DBG_StartDbgShell(void);
926	// DHL_DBG_StartDbgShell();
927	}
928	default:
929	break;
930	}
931
932	}
933	}
934
935
936	void test_taskinfo_main(void *data)
937	{
938	int cnt = 0;
939	b_cpu_load load;
940	while (1)
941	{
942	printf("-------- TASKINFO: %d --------\n",cnt++);
943	bos_print_taskinfo();
944	bos_getload(&load);
945	printf("LOAD: %u ms IDLE:%u ISR:%u:%u %u us CSW:%u\n", load.duration, load.idle, load.isr_rate, load.isr, load.isr_us, load.ctxsw_rate);
946	#if 0
947	bint_print_stats();
948	#endif
949	bos_sleep(TASKINFO_SLEEP_ms);
950	}
951	}
952	int get_opt_int(void)
953	{
954	int opt = 0, minus = 1;
955	char entry[16] = {0};
956	gets(entry);
957	if (entry[0] == '-') {
958	minus = -1;
959	sscanf(&entry[1], "%d", &opt);
960	}
961	else {
962	sscanf(entry, "%d", &opt);
963	}
964	printf("\n");
965	opt *= minus;
966	return opt;
967	}
968
969	unsigned get_opt(void)
970	{
971	unsigned opt = 0;
972	char entry[16]={0};
973
974	gets(entry);
975	sscanf(entry, "%d", &opt);
976	printf("\n");
977	return opt;
978	}
979	#if 1
980	#ifdef CONFIG_DTA_CABLE
981	#include "image_recv.h"
982	#endif
983
984	#ifdef CONFIG_DTA_CABLE
985	void download_signed(void)
986	{
987	struct image_t * new_image;
988
989
990	new_image = malloc(MAX_COMPRESSED_SIZE);
991	if (NULL == new_image)
992	{
993	BDBG_ERR(("not enough memory"));
994
995	goto ExitFunc;
996	}
997	bprint_flush();
998	bos_sleep(500);
999	printf("\n\nStart XModem download of signed binary...\n");
1000	bos_sleep(100);
1001	bprint_flush();
1002	OSSchedLock();
1003	new_image->size = xmodem_receive(CONSOLE_UART, new_image->data);
1004	OSSchedUnlock();
1005
1006	/*
1007	Use "restore ram97572_sig.bin binary &new_image->data" command
1008	in gdb to load data using ejtag. Then set new_image->size to size
1009	of the image file. Suggested method is to restore only 10K or so to
1010	get headers in. Loading complete image using gdb is painfully slow.
1011	*/
1012	if (0 == new_image->size)
1013	{
1014	BDBG_ERR(("xmodem error"));
1015	goto ExitFunc;
1016	}
1017
1018	image_write(new_image);
1019	chip_reset();
1020	ExitFunc:
1021	return;
1022	}
1023	#endif
1024	#endif
1025
1026	void chip_reset(void)
1027	{
1028	uint32_t value;
1029
1030	value = ReadReg32(BCHP_SUN_TOP_CTRL_RESET_SOURCE_ENABLE);
1031	value &= ~BCHP_SUN_TOP_CTRL_RESET_SOURCE_ENABLE_sw_master_reset_enable_MASK;
1032	WriteReg32(BCHP_SUN_TOP_CTRL_RESET_SOURCE_ENABLE, value);
1033	value \|= BCHP_SUN_TOP_CTRL_RESET_SOURCE_ENABLE_sw_master_reset_enable_MASK;
1034	WriteReg32(BCHP_SUN_TOP_CTRL_RESET_SOURCE_ENABLE, value);
1035
1036	value = ReadReg32(BCHP_SUN_TOP_CTRL_RESET_CTRL);
1037	value \|= BCHP_SUN_TOP_CTRL_RESET_CTRL_clear_reset_history_MASK;
1038	WriteReg32(BCHP_SUN_TOP_CTRL_RESET_CTRL, value);
1039	value &= ~BCHP_SUN_TOP_CTRL_RESET_CTRL_clear_reset_history_MASK;
1040	WriteReg32(BCHP_SUN_TOP_CTRL_RESET_CTRL, value);
1041
1042	value = ReadReg32(BCHP_SUN_TOP_CTRL_SW_MASTER_RESET);
1043	value &= ~BCHP_SUN_TOP_CTRL_RESET_SOURCE_ENABLE_sw_master_reset_enable_MASK;
1044	WriteReg32(BCHP_SUN_TOP_CTRL_SW_MASTER_RESET, value);
1045	value \|= BCHP_SUN_TOP_CTRL_RESET_SOURCE_ENABLE_sw_master_reset_enable_MASK;
1046	WriteReg32(BCHP_SUN_TOP_CTRL_SW_MASTER_RESET, value);
1047	}
1048
1049
1050
1051	/* this two functions probably should be moved somewhere more suitable */
1052	static size_t out_string(const void * buf, size_t count)
1053	{
1054	size_t i;
1055	const unsigned char * pc = buf;
1056	for(i = 0; i < count; i++){
1057	if (pc[i]=='\n') {
1058	serial_putc(CONSOLE_UART, '\r');
1059	}
1060	serial_putc(CONSOLE_UART, pc[i]);
1061	}
1062	return count;
1063	}
1064
1065	void bprint_entry(void *data)
1066	{
1067	BDBG_MSG(("PRINT TASK ONLINE"));
1068	s_printing_enabled = true;
1069	while (1)
1070	{
1071	if (s_printing_enabled)
1072	{
1073	BKNI_Print_Worker(out_string);
1074	}
1075	else
1076	{
1077	bos_sleep(200);
1078	}
1079	}
1080	__asm__("sdbbp");
1081	}
1082	void bprint_flush(void)
1083	{
1084	BKNI_Print_Flush(out_string);
1085	}
1086
1087	/* Please do not remove! */
1088	/* Local Variables: */
1089	/* mode: C */
1090	/* indent-tabs-mode: true */
1091	/* End: */

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source: svn/trunk/newcon3bcm2_21bu/dta/src/ram_init.c @ 2

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