| 1 | /*************************************************************************** |
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| 2 | * Copyright (c) 2003-2006, Broadcom Corporation |
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| 3 | * All Rights Reserved |
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| 4 | * Confidential Property of Broadcom Corporation |
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| 5 | * |
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| 6 | * THIS SOFTWARE MAY ONLY BE USED SUBJECT TO AN EXECUTED SOFTWARE LICENSE |
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| 7 | * AGREEMENT BETWEEN THE USER AND BROADCOM. YOU HAVE NO RIGHT TO USE OR |
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| 8 | * EXPLOIT THIS MATERIAL EXCEPT SUBJECT TO THE TERMS OF SUCH AN AGREEMENT. |
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| 9 | * |
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| 10 | * $brcm_Workfile: $ |
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| 11 | * $brcm_Revision: $ |
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| 12 | * $brcm_Date: $ |
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| 13 | * |
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| 14 | * Module Description: |
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| 15 | * |
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| 16 | * Revision History: |
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| 17 | * |
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| 18 | * $brcm_Log: $ |
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| 19 | * |
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| 20 | ***************************************************************************/ |
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| 21 | |
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| 22 | #include "bchp_irq0.h" |
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| 23 | #include "bchp_int_id_irq0.h" |
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| 24 | #include "bint.h" |
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| 25 | #include "bchp_gio.h" |
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| 26 | |
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| 27 | #if (BCHP_CHIP==7552) |
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| 28 | #include "bchp_int_id_irq0_aon.h" |
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| 29 | #include "bchp_gio_aon.h" |
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| 30 | #endif |
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| 31 | |
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| 32 | #include "gist.h" |
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| 33 | #include "bsettop_gpio.h" |
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| 34 | |
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| 35 | BDBG_MODULE(bsettop_gpio); |
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| 36 | |
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| 37 | #define NUM_GPIO_PINS 105 |
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| 38 | #define NUM_SGPIO_PINS 6 |
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| 39 | #define NUM_AGPIO_PINS 21 |
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| 40 | #define NUM_ASGPIO_PINS 2 |
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| 41 | |
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| 42 | struct bgpio |
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| 43 | { |
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| 44 | uint32_t offset; |
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| 45 | uint32_t shift; |
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| 46 | bgpio_type type; |
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| 47 | int num; |
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| 48 | bgpio_interrupt_mode intMode; |
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| 49 | bsettop_callback user_callback; |
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| 50 | void *user_callback_context; |
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| 51 | }; |
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| 52 | |
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| 53 | struct bsettop_gpio |
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| 54 | { |
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| 55 | bool init; |
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| 56 | BINT_CallbackHandle hcallback; |
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| 57 | BINT_CallbackHandle haiocallback; |
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| 58 | bgpio_t gpios[NUM_GPIO_PINS]; |
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| 59 | bgpio_t sgpios[NUM_SGPIO_PINS]; |
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| 60 | bgpio_t agpios[NUM_AGPIO_PINS]; |
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| 61 | bgpio_t asgpios[NUM_ASGPIO_PINS]; |
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| 62 | }; |
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| 63 | |
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| 64 | static struct bsettop_gpio b_gpio; |
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| 65 | static void bgpio_p_get_offset_shift(bgpio_type type, int pin, uint32_t *offset, uint32_t *shift); |
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| 66 | |
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| 67 | bgpio_t bgpio_open(int gpio_num, const bgpio_settings *p_settings) |
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| 68 | { |
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| 69 | bgpio_t gpio = NULL; |
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| 70 | unsigned edge_conf = 0, edge_insensitive = 0, edge_level = 0, enabled = 1; |
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| 71 | uint32_t reg; |
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| 72 | #if (BCHP_CHIP==7552) |
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| 73 | int aio_pin = gpio_num; |
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| 74 | #endif |
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| 75 | |
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| 76 | if (b_gpio.init == false) { |
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| 77 | bgpio_init(); |
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| 78 | } |
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| 79 | |
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| 80 | if (!p_settings) { |
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| 81 | BDBG_ERR(("invalid setting parameter")); |
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| 82 | goto error; |
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| 83 | } |
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| 84 | |
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| 85 | #if (BCHP_CHIP==7552) |
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| 86 | if (p_settings->type == eGPIO_AStandard) |
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| 87 | aio_pin -= BGIO_PinId_eAgpio00; |
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| 88 | else if (p_settings->type == eGPIO_ASpecial) |
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| 89 | aio_pin -= BGIO_PinId_eAsgpio00; |
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| 90 | |
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| 91 | #endif |
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| 92 | |
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| 93 | if ((p_settings->type == eGPIO_Standard && gpio_num>=NUM_GPIO_PINS) || |
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| 94 | (p_settings->type == eGPIO_Special && gpio_num>=NUM_SGPIO_PINS) |
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| 95 | #if (BCHP_CHIP==7552) |
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| 96 | || (p_settings->type == eGPIO_AStandard && aio_pin >= NUM_AGPIO_PINS) |
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| 97 | || (p_settings->type == eGPIO_ASpecial && aio_pin >= NUM_ASGPIO_PINS) |
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| 98 | #endif |
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| 99 | ) |
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| 100 | { |
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| 101 | BDBG_ERR(("invalid gpio pin number")); |
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| 102 | goto error; |
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| 103 | } |
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| 104 | |
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| 105 | gpio = BKNI_Malloc(sizeof(*gpio)); |
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| 106 | if (!gpio) { |
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| 107 | BDBG_ERR(("fail to allocate gpio")); |
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| 108 | goto error; |
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| 109 | } |
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| 110 | |
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| 111 | gpio->type = p_settings->type; |
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| 112 | gpio->num = gpio_num; |
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| 113 | gpio->intMode = p_settings->intMode; |
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| 114 | gpio->user_callback = p_settings->user_callback; |
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| 115 | gpio->user_callback_context = p_settings->user_callback_context; |
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| 116 | |
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| 117 | bgpio_p_get_offset_shift(gpio->type, gpio->num, &gpio->offset, &gpio->shift); |
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| 118 | |
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| 119 | if (gpio->type == eGPIO_Standard) |
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| 120 | { |
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| 121 | b_gpio.gpios[gpio_num] = gpio; |
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| 122 | } |
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| 123 | #if (BCHP_CHIP==7552) |
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| 124 | else if (gpio->type == eGPIO_AStandard) |
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| 125 | { |
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| 126 | b_gpio.agpios[aio_pin] = gpio; |
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| 127 | } |
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| 128 | else if (gpio->type == eGPIO_ASpecial) |
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| 129 | { |
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| 130 | b_gpio.asgpios[aio_pin] = gpio; |
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| 131 | } |
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| 132 | #endif |
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| 133 | else { |
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| 134 | b_gpio.sgpios[gpio_num] = gpio; |
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| 135 | } |
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| 136 | |
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| 137 | |
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| 138 | reg = BREG_Read32(GetREG(), BCHP_GIO_IODIR_LO+gpio->offset); |
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| 139 | if (p_settings->mode == eGPIO_Input) |
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| 140 | reg |= (1<<gpio->shift); |
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| 141 | else |
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| 142 | reg &= ~(1<<gpio->shift); |
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| 143 | BREG_Write32(GetREG(), BCHP_GIO_IODIR_LO+gpio->offset,reg); |
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| 144 | |
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| 145 | reg = BREG_Read32(GetREG(), BCHP_GIO_ODEN_LO+gpio->offset); |
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| 146 | if (p_settings->mode == eGPIO_OutputOpenDrain) |
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| 147 | reg |= (1<<gpio->shift); |
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| 148 | else |
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| 149 | reg &= ~(1<<gpio->shift); |
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| 150 | BREG_Write32(GetREG(), BCHP_GIO_ODEN_LO+gpio->offset, reg); |
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| 151 | |
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| 152 | switch (p_settings->intMode) { |
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| 153 | case eGPIO_RisingEdge: |
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| 154 | edge_conf = 1; |
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| 155 | edge_insensitive = 0; |
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| 156 | edge_level = 0; |
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| 157 | break; |
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| 158 | case eGPIO_FallingEdge: |
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| 159 | edge_conf = 0; |
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| 160 | edge_insensitive = 0; |
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| 161 | edge_level = 0; |
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| 162 | break; |
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| 163 | case eGPIO_Edge: |
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| 164 | edge_conf = 0; |
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| 165 | edge_insensitive = 1; |
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| 166 | edge_level = 0; |
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| 167 | break; |
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| 168 | case eGPIO_High: |
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| 169 | edge_conf = 1; |
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| 170 | edge_insensitive = 0; |
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| 171 | edge_level = 1; |
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| 172 | break; |
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| 173 | case eGPIO_Low: |
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| 174 | edge_conf = 0; |
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| 175 | edge_insensitive = 0; |
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| 176 | edge_level = 1; |
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| 177 | break; |
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| 178 | default: |
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| 179 | enabled = 0; |
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| 180 | } |
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| 181 | |
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| 182 | if (!enabled) { |
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| 183 | reg = BREG_Read32(GetREG(), BCHP_GIO_MASK_LO+gpio->offset); |
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| 184 | reg &= ~(1<<gpio->shift); |
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| 185 | BREG_Write32(GetREG(), BCHP_GIO_MASK_LO+gpio->offset, reg); |
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| 186 | } |
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| 187 | |
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| 188 | /* set edge config */ |
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| 189 | reg = BREG_Read32(GetREG(), BCHP_GIO_EC_LO+gpio->offset); |
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| 190 | if (edge_conf) |
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| 191 | reg |= (1<<gpio->shift); |
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| 192 | else |
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| 193 | reg &= ~(1<<gpio->shift); |
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| 194 | BREG_Write32(GetREG(), BCHP_GIO_EC_LO+gpio->offset, reg); |
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| 195 | |
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| 196 | /* set edge insensitive */ |
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| 197 | reg = BREG_Read32(GetREG(), BCHP_GIO_EI_LO+gpio->offset); |
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| 198 | if (edge_insensitive) |
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| 199 | reg |= (1<<gpio->shift); |
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| 200 | else |
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| 201 | reg &= ~(1<<gpio->shift); |
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| 202 | BREG_Write32(GetREG(), BCHP_GIO_EI_LO+gpio->offset, reg); |
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| 203 | |
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| 204 | /* set level */ |
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| 205 | reg = BREG_Read32(GetREG(), BCHP_GIO_LEVEL_LO+gpio->offset); |
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| 206 | if (edge_level) |
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| 207 | reg |= (1<<gpio->shift); |
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| 208 | else |
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| 209 | reg &= ~(1<<gpio->shift); |
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| 210 | BREG_Write32(GetREG(), BCHP_GIO_LEVEL_LO+gpio->offset, reg); |
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| 211 | |
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| 212 | /* set interrupt mask */ |
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| 213 | reg = BREG_Read32(GetREG(), BCHP_GIO_MASK_LO+gpio->offset); |
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| 214 | if (enabled) |
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| 215 | reg |= (1<<gpio->shift); |
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| 216 | else |
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| 217 | reg &= ~(1<<gpio->shift); |
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| 218 | BREG_Write32(GetREG(), BCHP_GIO_MASK_LO+gpio->offset, reg); |
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| 219 | error: |
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| 220 | return gpio; |
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| 221 | } |
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| 222 | |
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| 223 | void bgpio_close(bgpio_t gpio) |
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| 224 | { |
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| 225 | BDBG_ASSERT(gpio); |
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| 226 | if (gpio->type == eGPIO_Special) |
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| 227 | b_gpio.sgpios[gpio->num] = NULL; |
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| 228 | else |
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| 229 | b_gpio.gpios[gpio->num] = NULL; |
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| 230 | |
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| 231 | BKNI_Free(gpio); |
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| 232 | } |
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| 233 | /* |
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| 234 | * For level trigger interrupt, application should call this function to get additional level triggered interrupt |
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| 235 | */ |
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| 236 | void bgpio_enable_int(bgpio_t gpio) |
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| 237 | { |
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| 238 | uint32_t reg; |
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| 239 | |
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| 240 | BDBG_ASSERT(gpio); |
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| 241 | reg = BREG_Read32(GetREG(), BCHP_GIO_MASK_LO+gpio->offset); |
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| 242 | reg |= (1<<gpio->shift); |
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| 243 | BREG_Write32(GetREG(), BCHP_GIO_MASK_LO+gpio->offset, reg); |
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| 244 | } |
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| 245 | |
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| 246 | static void bgpio_p_get_offset_shift(bgpio_type type, int pin, uint32_t *offset, uint32_t *shift) |
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| 247 | { |
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| 248 | if (type == eGPIO_Standard) { |
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| 249 | if (pin<32) { |
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| 250 | *offset = BCHP_GIO_ODEN_LO; |
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| 251 | *shift = pin; |
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| 252 | } |
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| 253 | else if (pin<64) { |
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| 254 | *offset = BCHP_GIO_ODEN_HI; |
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| 255 | *shift = pin-32; |
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| 256 | } |
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| 257 | else if (pin<90) { |
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| 258 | *offset = BCHP_GIO_ODEN_EXT; |
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| 259 | *shift = (pin-64) + 6; /*spio*/ |
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| 260 | } |
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| 261 | else if (pin<105) { |
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| 262 | *offset = BCHP_GIO_ODEN_EXT_HI; |
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| 263 | *shift = pin-90; |
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| 264 | } |
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| 265 | *offset = *offset - BCHP_GIO_ODEN_LO; |
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| 266 | } |
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| 267 | #if (BCHP_CHIP==7552) |
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| 268 | else if (type == eGPIO_AStandard) { |
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| 269 | *offset = BCHP_GIO_AON_ODEN_LO-BCHP_GIO_ODEN_LO; |
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| 270 | *shift = pin-BGIO_PinId_eAgpio00; |
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| 271 | } |
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| 272 | else if (type == eGPIO_ASpecial) { |
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| 273 | *offset = BCHP_GIO_AON_ODEN_EXT-BCHP_GIO_ODEN_LO; |
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| 274 | *shift = pin-BGIO_PinId_eAsgpio00; |
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| 275 | } |
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| 276 | #endif |
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| 277 | else if (type == eGPIO_Special) { |
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| 278 | *offset = BCHP_GIO_ODEN_EXT-BCHP_GIO_ODEN_LO; |
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| 279 | *shift = pin; |
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| 280 | |
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| 281 | } |
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| 282 | } |
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| 283 | |
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| 284 | static void bgpio_p_int_callback(void *pParam1, int param2) |
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| 285 | { |
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| 286 | uint32_t mask, stat; |
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| 287 | bgpio_t gpio; |
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| 288 | int i; |
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| 289 | for (i=0; i<NUM_GPIO_PINS+NUM_SGPIO_PINS+NUM_AGPIO_PINS+NUM_ASGPIO_PINS; i++) { |
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| 290 | if (i<NUM_SGPIO_PINS) |
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| 291 | gpio = b_gpio.sgpios[i]; |
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| 292 | else if (i<NUM_SGPIO_PINS+NUM_GPIO_PINS) |
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| 293 | gpio = b_gpio.gpios[i-NUM_SGPIO_PINS]; |
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| 294 | else if (i<NUM_SGPIO_PINS+NUM_GPIO_PINS+NUM_AGPIO_PINS) |
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| 295 | gpio = b_gpio.agpios[i-NUM_SGPIO_PINS-NUM_GPIO_PINS]; |
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| 296 | else |
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| 297 | gpio = b_gpio.asgpios[i-NUM_SGPIO_PINS-NUM_GPIO_PINS-NUM_AGPIO_PINS]; |
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| 298 | |
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| 299 | if (gpio) { |
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| 300 | stat = BREG_Read32(GetREG(), BCHP_GIO_STAT_LO+gpio->offset); |
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| 301 | mask = BREG_Read32(GetREG(), BCHP_GIO_MASK_LO+gpio->offset); |
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| 302 | |
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| 303 | if (((stat>>gpio->shift)&1) && ((mask>>gpio->shift)&1)) { |
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| 304 | /* clear status immediately */ |
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| 305 | BREG_Write32(GetREG(), BCHP_GIO_STAT_LO+gpio->offset, 1<<gpio->shift); |
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| 306 | |
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| 307 | if ((gpio->intMode == eGPIO_Low) || (gpio->intMode == eGPIO_High)) { |
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| 308 | /* mask a level interrupt to prevent continous interrupt. application should reenable it */ |
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| 309 | mask &= ~(1<<gpio->shift); |
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| 310 | BREG_Write32(GetREG(), BCHP_GIO_MASK_LO+gpio->offset, mask); |
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| 311 | } |
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| 312 | if (gpio->user_callback) { |
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| 313 | (gpio->user_callback)(gpio->user_callback_context); |
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| 314 | } |
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| 315 | } |
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| 316 | } |
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| 317 | } |
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| 318 | } |
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| 319 | #ifndef BCHP_INT_ID_IRQ0_gio_irqen |
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| 320 | #define BCHP_INT_ID_IRQ0_gio_irqen BCHP_INT_ID_gio |
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| 321 | #endif |
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| 322 | void bgpio_init(void) |
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| 323 | { |
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| 324 | BKNI_Memset(&b_gpio, 0, sizeof(b_gpio)); |
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| 325 | |
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| 326 | /* disable all gpio interrupt */ |
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| 327 | BREG_Write32(GetREG(), BCHP_GIO_MASK_LO, 0); |
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| 328 | BREG_Write32(GetREG(), BCHP_GIO_STAT_LO, 0xffffffff); |
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| 329 | BREG_Write32(GetREG(), BCHP_GIO_MASK_HI, 0); |
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| 330 | BREG_Write32(GetREG(), BCHP_GIO_STAT_HI, 0xffffffff); |
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| 331 | BREG_Write32(GetREG(), BCHP_GIO_MASK_EXT, 0); |
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| 332 | BREG_Write32(GetREG(), BCHP_GIO_STAT_EXT, 0xffffffff); |
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| 333 | BREG_Write32(GetREG(), BCHP_GIO_MASK_EXT_HI, 0); |
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| 334 | BREG_Write32(GetREG(), BCHP_GIO_STAT_EXT_HI, 0xffffffff); |
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| 335 | |
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| 336 | #if (BCHP_CHIP==7552) |
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| 337 | BREG_Write32(GetREG(), BCHP_GIO_AON_MASK_LO, 0); |
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| 338 | BREG_Write32(GetREG(), BCHP_GIO_AON_STAT_LO, 0xFFFFFFFF); |
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| 339 | BREG_Write32(GetREG(), BCHP_GIO_AON_MASK_EXT,0); |
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| 340 | BREG_Write32(GetREG(), BCHP_GIO_AON_STAT_EXT, 0xFFFFFFF); |
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| 341 | |
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| 342 | BINT_CreateCallback(&b_gpio.haiocallback,GetINT(), BCHP_INT_ID_IRQ0_AON_gio_irqen, bgpio_p_int_callback, NULL, 0); |
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| 343 | BINT_EnableCallback(b_gpio.haiocallback); |
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| 344 | #endif |
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| 345 | /* attach callback */ |
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| 346 | BINT_CreateCallback(&b_gpio.hcallback,GetINT(),BCHP_INT_ID_IRQ0_gio_irqen, bgpio_p_int_callback, NULL, 0); |
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| 347 | BINT_EnableCallback(b_gpio.hcallback); |
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| 348 | |
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| 349 | b_gpio.init = true; |
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| 350 | } |
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| 351 | |
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