source: svn/trunk/newcon3bcm2_21bu/magnum/commonutils/fmt/bfmt_custom.c @ 3

Last change on this file since 3 was 2, checked in by phkim, 11 years ago

1.phkim

  1. revision copy newcon3sk r27
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1/***************************************************************************
2 *     Copyright (c) 2003-2011, Broadcom Corporation
3 *     All Rights Reserved
4 *     Confidential Property of Broadcom Corporation
5 *
6 *  THIS SOFTWARE MAY ONLY BE USED SUBJECT TO AN EXECUTED SOFTWARE LICENSE
7 *  AGREEMENT  BETWEEN THE USER AND BROADCOM.  YOU HAVE NO RIGHT TO USE OR
8 *  EXPLOIT THIS MATERIAL EXCEPT SUBJECT TO THE TERMS OF SUCH AN AGREEMENT.
9 *
10 * $brcm_Workfile: bfmt_custom.c $
11 * $brcm_Revision: Hydra_Software_Devel/19 $
12 * $brcm_Date: 6/9/11 10:42a $
13 *
14 * Module Description:
15 *   Custom Video format info file; it contains raster size, front porch,
16 * back porch etc format info, and DVO microcode as well as rate manager
17 * settings.
18 *  NOTE: This file is to be replace by customer specific timing data!
19 *  following are for reference board only.
20 *
21 * Revision History:
22 *
23 * $brcm_Log: /magnum/commonutils/fmt/bfmt_custom.c $
24 *
25 * Hydra_Software_Devel/19   6/9/11 10:42a pntruong
26 * SW7425-101: Moved rate structure definition to bfmt_custom.h to avoid
27 * copying.
28 *
29 * Hydra_Software_Devel/19   6/9/11 10:41a pntruong
30 * SW7425-101: Moved rate structure definition to bfmt_custom.h to avoid
31 * copying.
32 *
33 * Hydra_Software_Devel/18   9/7/10 3:03p yuxiaz
34 * SW7422-28: Add 3D formats to FMT plus additional data structures
35 *
36 * Hydra_Software_Devel/SW7422-28/1   9/2/10 4:09p yuxiaz
37 * SW7422-28: Add 3D formats to FMT plus additional data structures
38 *
39 * Hydra_Software_Devel/17   10/16/09 5:22p darnstein
40 * SW7405-3191: Back out all changes in pixel frequency handling. New
41 * design coming soon.
42 *
43 * Hydra_Software_Devel/16   10/15/09 4:58p darnstein
44 * SW7405-3191: Pixel frequency is now defined as both a bitmask, and an
45 * enum. The bitmask option is DEPRECATED.
46 *
47 * Hydra_Software_Devel/15   1/15/09 6:17p hongtaoz
48 * PR50621: repositioned trigger locations to as early as possible for DTV
49 * display timing to have enough head room for the longest RULs;
50 * corrected ulTopActive values for the custom formats to reflect the
51 * microcode timing;
52 *
53 * Hydra_Software_Devel/14   9/20/08 11:25a pntruong
54 * PR47115: Added some note for ease of adding new format.
55 *
56 * Hydra_Software_Devel/13   6/24/08 10:04p pntruong
57 * PR43819: Fixed build warnings.
58 *
59 * Hydra_Software_Devel/12   6/24/08 5:07p pntruong
60 * PR43819: Temporary support of runtime in app.
61 *
62 * Hydra_Software_Devel/11   9/19/07 6:06p pntruong
63 * PR34692: Used friendly macro values for specify reference panel
64 * support.
65 *
66 * Hydra_Software_Devel/10   9/19/07 5:56p pntruong
67 * PR34692: Support 3552 reference panel timing in portingInterface.
68 *
69 * Hydra_Software_Devel/9   8/16/07 6:22p tdo
70 * PR34007: [VDEC] Add support for 50Hz formats
71 * (576p/720p/1080i/1080p/50Hz).
72 *
73 * Hydra_Software_Devel/8   6/25/07 5:19p tdo
74 * PR32193: update RM settings for 3563C0
75 *
76 * Hydra_Software_Devel/7   6/21/07 1:42p pntruong
77 * PR32193: Backout new rrm changes, 59.94hz does not work.
78 *
79 * Hydra_Software_Devel/6   6/20/07 4:38p tdo
80 * PR32193: Update RM settings for custom formats
81 *
82 * Hydra_Software_Devel/5   1/19/07 7:59p hongtaoz
83 * PR27139, PR27222: updated dvo pll settings for 1080p@59.94;
84 *
85 * Hydra_Software_Devel/4   1/16/07 4:20p hongtaoz
86 * PR23260, PR23280, PR23204: initial bringup 59.94 and 50Hz 1080p panel
87 * custom format support;
88 *
89 * Hydra_Software_Devel/3   1/15/07 1:20p hongtaoz
90 * PR23280, PR23196: increased 1080p60 microcode's vertical back porch to
91 * 36 to leave more vertical blanking to long RUL;
92 *
93 * Hydra_Software_Devel/2   1/11/07 6:58p hongtaoz
94 * PR23188, PR23196: initial bringup of 3563 DVO; 1080p custom format as
95 * default;
96 *
97 * Hydra_Software_Devel/1   12/18/06 11:40p pntruong
98 * PR22577: Merged back to mainline.
99 *
100 * Hydra_Software_Devel/Refsw_Devel_3563/1   10/4/06 6:58p hongtaoz
101 * PR23204, PR23279, PR23280: add user-defined custom formats;
102 *
103 ***************************************************************************/
104#include "bstd.h"
105#include "bfmt.h"
106#include "bkni.h"
107#include "bfmt_custom.h"
108
109/* Support different format timings.  Application can either replace this
110 * file with its bfmt_custom.c for specific panel's timing.  The two timings
111 * below are for Reference Software / Board / Panel.
112 *
113 * Since we have two Reference Panels
114 *   (1) Full 1080p HD Panel
115 *   (2) WXGA Panel.
116 *
117 * Both timings are included here.  To compile with with WXGA simply pass the
118 * compile flag -DBFMT_CUSTOM_PANEL_TIMING=1.  If using non-reference panel
119 * there is no need to pass the above compile flag. */
120#define BFMT_P_CUSTOM_PANEL_TIMING_FULL_1080P_HD (3563)
121#define BFMT_P_CUSTOM_PANEL_TIMING_FULL_WXGA     (3552)
122
123#ifndef BFMT_CUSTOM_PANEL_TIMING
124#define BFMT_CUSTOM_PANEL_TIMING      (BFMT_P_CUSTOM_PANEL_TIMING_FULL_1080P_HD)
125#endif
126
127static const uint32_t s_vec_tb_noprim_dvim1920x1080p_60hz_bvb_input_bss_wxga[] =
128{
129         0x0064A001, /*  64 */
130         0x00650009, /*  65 */
131         0x00656001, /*  66 */
132         0x0065C00F, /*  67 */
133         0x00668300, /*  68 */
134         0x0065C007, /*  69 */
135         0x00662001, /*  70 */
136         0x00840000, /*  71 */
137         0x00000000, /*  72 */
138         0x00000000, /*  73 */
139         0x00284038, /*  74 */
140         0x002D400C, /*  75 */
141         0x0024406A, /*  76 */
142         0x0034554B, /*  77 */
143         0x00000000, /*  78 */
144         0x00000000, /*  79 */
145         0x00244038, /*  80 */
146         0x0025400C, /*  81 */
147         0x0024406A, /*  82 */
148         0x0034554B, /*  83 */
149         0x00000000, /*  84 */
150         0x00000000, /*  85 */
151         0x00244038, /*  86 */
152         0x0021400C, /*  87 */
153         0x0020406A, /*  88 */
154         0x0030554B, /*  89 */
155         0x00000000, /*  90 */
156         0x00000000, /*  91 */
157         0x00204038, /*  92 */
158         0x0021400C, /*  93 */
159         0x0020406A, /*  94 */
160         0x0030554B, /*  95 */
161         0x00000000, /*  96 */
162         0x00000000, /*  97 */
163         0x00204038, /*  98 */
164         0x0021400C, /*  99 */
165         0x0020406A, /* 100 */
166         0x00305540, /* 101 */
167         0x00000000, /* 102 */
168         0x00000000, /* 103 */
169         0x00202038, /* 104 */
170         0x0021200C, /* 105 */
171         0x0020206A, /* 106 */
172         0x0032354B, /* 107 */
173         0x00000000, /* 108 */
174         0x00000000, /* 109 */
175         0x00202038, /* 110 */
176         0x0021200C, /* 111 */
177         0x0020206A, /* 112 */
178         0x00323540, /* 113 */
179         0x00000000, /* 114 */
180         0x00000000, /* 115 */
181         0x00000000, /* 116 */
182         0x00000000, /* 117 */
183         0x00000000, /* 118 */
184         0x00000000, /* 119 */
185         0x00000000, /* 120 */
186         0x00000000, /* 121 */
187         0x00000000, /* 122 */
188         0x00000000, /* 123 */
189         0x00000000, /* 124 */
190         0x00000000, /* 125 */
191         0x00072507, /* 126 */
192         0x005D4D0E, /* 127 */
193};
194
195static const uint32_t s_vec_tb_noprim_dvim1920x1080p_60hz_bvb_input_bss_fhd[] =
196{
197        0x0064A001, /*  64 */
198        0x00650004, /*  65 */
199        0x00656001, /*  66 */
200        0x0065C023, /*  67 */
201        0x00668438, /*  68 */
202        0x0065C003, /*  69 */
203        0x00662001, /*  70 */
204        0x00840000, /*  71 */
205        0x00000000, /*  72 */
206        0x00000000, /*  73 */
207        0x002840C8, /*  74 */
208        0x002D402C, /*  75 */
209        0x00244024, /*  76 */
210        0x00345775, /*  77 */
211        0x00000000, /*  78 */
212        0x00000000, /*  79 */
213        0x002440C8, /*  80 */
214        0x0025402C, /*  81 */
215        0x00244024, /*  82 */
216        0x00345775, /*  83 */
217        0x00000000, /*  84 */
218        0x00000000, /*  85 */
219        0x002440C8, /*  86 */
220        0x0021402C, /*  87 */
221        0x00204024, /*  88 */
222        0x00305775, /*  89 */
223        0x00000000, /*  90 */
224        0x00000000, /*  91 */
225        0x002040C8, /*  92 */
226        0x0021402C, /*  93 */
227        0x00204024, /*  94 */
228        0x00305775, /*  95 */
229        0x00000000, /*  96 */
230        0x00000000, /*  97 */
231        0x002040C8, /*  98 */
232        0x0021402C, /*  99 */
233        0x00204024, /* 100 */
234        0x0030576A, /* 101 */
235        0x00000000, /* 102 */
236        0x00000000, /* 103 */
237        0x002020C8, /* 104 */
238        0x0021202C, /* 105 */
239        0x00202024, /* 106 */
240        0x00323775, /* 107 */
241        0x00000000, /* 108 */
242        0x00000000, /* 109 */
243        0x002020C8, /* 110 */
244        0x0021202C, /* 111 */
245        0x00202024, /* 112 */
246        0x0032376A, /* 113 */
247        0x00000000, /* 114 */
248        0x00000000, /* 115 */
249        0x00000000, /* 116 */
250        0x00000000, /* 117 */
251        0x00000000, /* 118 */
252        0x00000000, /* 119 */
253        0x00000000, /* 120 */
254        0x00000000, /* 121 */
255        0x00000000, /* 122 */
256        0x00000000, /* 123 */
257        0x00000000, /* 124 */
258        0x00000000, /* 125 */
259        0x00011207, /* 126 */
260        0x005D605D, /* 127 */
261};
262
263/* The following default settings are from 3563C0 1366x768 DVO bringup:
264' Pixel Clock = h_total * v_total * refresh_rate
265'             = 1540 * 802 * 60
266'             = 74104800 Hz
267' VCO = 2074934400.00 Hz
268BCM3563.LVDS_PHY_0.LVDS_PLL_CFG.PLL_FEEDBACK_PRE_DIVIDER = 1 ' (p2)
269BCM3563.LVDS_PHY_0.LVDS_PLL_CFG.PLL_INPUT_PRE_DIVIDER = 2    ' (p1)
270BCM3563.LVDS_PHY_0.LVDS_PLL_CTL_2.ndiv_mode = 1
271BCM3563.LVDS_PHY_0.LVDS_PLL_CTL_1 = &h382C24A0&
272BCM3563.DVPO_0.FIFO_CTL.MASTER_OR_SLAVE_N = 1
273 */
274static const BFMT_P_RateInfo s_stDvoRmTbl0_wxga =
275        {BFMT_PXL_148_5MHz,           2, 0x13365CEF,  99, 2,  11327,    19649,  1,  1,  1, "74.10"}; /* 74.10 MHz */
276
277/* The following default settings are from 3563C0 1366x768 DVO bringup:
278' Pixel Clock = h_total * v_total * refresh_rate
279'             = 1540 * 802 * 60 * 1000 / 1001
280'             = 74030769 Hz
281' VCO = 2072861532.00 Hz
282BCM3563.LVDS_PHY_0.LVDS_PLL_CFG.PLL_INPUT_PRE_DIVIDER = 2    ' (p1)
283BCM3563.LVDS_PHY_0.LVDS_PLL_CTL_2.ndiv_mode = 1
284BCM3563.LVDS_PHY_0.LVDS_PLL_CTL_1 = &h382C24A0&
285BCM3563.DVPO_0.FIFO_CTL.MASTER_OR_SLAVE_N = 1
286 */
287
288static const BFMT_P_RateInfo s_stDvoRmTbl1_wxga =
289        {BFMT_PXL_148_5MHz_DIV_1_001,           2, 0x13317316,  112, 2,  368,    401,  1,  1,  1, "74.03"}; /* 74.03 MHz */
290
291/* The following default settings are from 3563C0 1366x768 DVO bringup:
292' 1366x768p @ 60Hz: 1540*802*60
293' Pixel Clock = h_total * v_total * refresh_rate
294'             = 1540 * 802 * 50
295'             = 61754000 Hz
296BCM3563.LVDS_PHY_0.LVDS_PLL_CFG.PLL_FEEDBACK_PRE_DIVIDER = 1 ' (p2)
297BCM3563.LVDS_PHY_0.LVDS_PLL_CFG.PLL_INPUT_PRE_DIVIDER = 2    ' (p1)
298BCM3563.LVDS_PHY_0.LVDS_PLL_CTL_2.ndiv_mode = 1
299BCM3563.LVDS_PHY_0.LVDS_PLL_CTL_1 = &h382C24A0&
300BCM3563.DVPO_0.FIFO_CTL.MASTER_OR_SLAVE_N = 1
301 */
302static const BFMT_P_RateInfo s_stDvoRmTbl2_wxga =
303        {BFMT_PXL_148_5MHz_DIV_1_001,           2, 0x1002A2C7,  99, 2,  1803,    19649,  1,  1,  1, "61.75"}; /* 61.75 MHz */
304
305/* The following default settings are from 3563C0 1080p DVO bringup:
306' 1920x1080p @ 60Hz: 2200*1125*60
307' Pixel Clock = 148500000 Hz
308' VCO = 2079000000 Hz
309' M = 1, N = 77, P1 = 2; P2 = 1
310' For RDIV=112, Rate Manager sees 9281250 Hz
311' Sample_Inc = 2, NUM/DEN = 10/11
312' BCM3563 Register Programming:
313  BCM3563.DVPO_RM_0.RATE_RATIO.DENOMINATOR = 11
314  BCM3563.DVPO_RM_0.SAMPLE_INC.NUMERATOR = 10
315  BCM3563.DVPO_RM_0.SAMPLE_INC.SAMPLE_INC = 2
316  BCM3563.DVPO_RM_0.OFFSET = &h13400000&
317  BCM3563.DVPO_RM_0.FORMAT.SHIFT = 3
318  BCM3563.LVDS_PHY_0.LVDS_PLL_CFG.LINKDIV_CTRL = 0
319  BCM3563.LVDS_PHY_0.LVDS_PLL_CFG.PLL_R_DIV = 112
320  BCM3563.LVDS_PHY_0.LVDS_PLL_CFG.PLL_VCO_RANGE = 1
321  BCM3563.LVDS_PHY_0.LVDS_PLL_CFG.PLL_M_DIV = 1
322  BCM3563.LVDS_PHY_0.LVDS_PLL_CFG.PLL_FEEDBACK_PRE_DIVIDER = 1
323  BCM3563.LVDS_PHY_0.LVDS_PLL_CFG.PLL_INPUT_PRE_DIVIDER = 2
324  BCM3563.LVDS_PHY_0.LVDS_PLL_CTL_2.ndiv_mode = 1
325  BCM3563.LVDS_PHY_0.LVDS_PLL_CTL_1 = &h382C24A0&
326  BCM3563.DVPO_0.FIFO_CTL.MASTER_OR_SLAVE_N = 1
327 */
328static const BFMT_P_RateInfo s_stDvoRmTbl0_fhd =
329        {BFMT_PXL_148_5MHz,           1, 0x13400000,  112, 2,  10,    11,  1,  0,  1, "148.5"}; /* 148.50000 MHz */
330
331/* The following default settings are from 3563C0 1080p DVO bringup:
332' 1920x1080p @ 59.94Hz: 2200*1125*59.94
333' Pixel Clock = 148351648.351648 Hz
334' VCO = 2076923076.92308 Hz
335' M = 1, N = 76.9230769230769, P1 = 2; P2 = 1
336' For RDIV=112, Rate Manager sees 9271978.02197802 Hz
337' Sample_Inc = 2, NUM/DEN = 114/125
338' BCM3563 Register Programming:
339  BCM3563.DVPO_RM_0.RATE_RATIO.DENOMINATOR = 125
340  BCM3563.DVPO_RM_0.SAMPLE_INC.NUMERATOR = 114
341  BCM3563.DVPO_RM_0.SAMPLE_INC.SAMPLE_INC = 2
342  BCM3563.DVPO_RM_0.OFFSET = &H133b13b1&
343  BCM3563.DVPO_RM_0.FORMAT.SHIFT = 3
344  BCM3563.LVDS_PHY_0.LVDS_PLL_CFG.LINKDIV_CTRL = 0
345  BCM3563.LVDS_PHY_0.LVDS_PLL_CFG.PLL_R_DIV = 112
346  BCM3563.LVDS_PHY_0.LVDS_PLL_CFG.PLL_VCO_RANGE = 1
347  BCM3563.LVDS_PHY_0.LVDS_PLL_CFG.PLL_M_DIV = 1
348  BCM3563.LVDS_PHY_0.LVDS_PLL_CFG.PLL_FEEDBACK_PRE_DIVIDER = 1 ' (p2)
349  BCM3563.LVDS_PHY_0.LVDS_PLL_CFG.PLL_INPUT_PRE_DIVIDER = 2    ' (p1)
350  BCM3563.LVDS_PHY_0.LVDS_PLL_CTL_2.ndiv_mode = 1
351  BCM3563.LVDS_PHY_0.LVDS_PLL_CTL_1 = &h382C24A0&
352  BCM3563.DVPO_0.FIFO_CTL.MASTER_OR_SLAVE_N = 1
353 */
354static const BFMT_P_RateInfo s_stDvoRmTbl1_fhd =
355        {BFMT_PXL_148_5MHz_DIV_1_001, 1, 0x133B13B1, 112, 2, 114,   125,  1,  0,  1, "148.3"}; /* 148.35 MHz */
356
357/* The following default settings are from 3563C0 1080p DVO bringup:
358' 1920x1080p @ 50Hz: 2200*1125*50
359' Pixel Clock = 123750000 Hz
360' VCO = 1732500000 Hz
361' M = 1, N = 64.1666666666667, P1 = 2; P2 = 1
362' For RDIV=112, Rate Manager sees 7734375 Hz
363' Sample_Inc = 3, NUM/DEN = 27/55
364' BCM3563 Register Programming:
365  BCM3563.DVPO_RM_0.RATE_RATIO.DENOMINATOR = 55
366  BCM3563.DVPO_RM_0.SAMPLE_INC.NUMERATOR = 27
367  BCM3563.DVPO_RM_0.SAMPLE_INC.SAMPLE_INC = 3
368  BCM3563.DVPO_RM_0.OFFSET = &H100aaaaa&
369  BCM3563.DVPO_RM_0.FORMAT.SHIFT = 3
370  BCM3563.LVDS_PHY_0.LVDS_PLL_CFG.LINKDIV_CTRL = 0
371  BCM3563.LVDS_PHY_0.LVDS_PLL_CFG.PLL_R_DIV = 112
372  BCM3563.LVDS_PHY_0.LVDS_PLL_CFG.PLL_VCO_RANGE = 1
373  BCM3563.LVDS_PHY_0.LVDS_PLL_CFG.PLL_M_DIV = 1
374  BCM3563.LVDS_PHY_0.LVDS_PLL_CFG.PLL_FEEDBACK_PRE_DIVIDER = 1 ' (p2)
375  BCM3563.LVDS_PHY_0.LVDS_PLL_CFG.PLL_INPUT_PRE_DIVIDER = 2    ' (p1)
376  BCM3563.LVDS_PHY_0.LVDS_PLL_CTL_2.ndiv_mode = 1
377  BCM3563.LVDS_PHY_0.LVDS_PLL_CTL_1 = &h382C24A0&
378  BCM3563.DVPO_0.FIFO_CTL.MASTER_OR_SLAVE_N = 1
379 */
380static const BFMT_P_RateInfo s_stDvoRmTbl2_fhd =
381        {BFMT_PXL_148_5MHz,           1, 0x100aaaaa, 112, 3,  27,    55,  1,  0,  1, "123.7"}; /* 123.75 MHz */
382
383/*
384    DTRAM values for Custom 1366x768p
385
386    h_total = h_valid + hsync_width + h_frontporch + h_backporch
387            = 1366 + 12 + 56 + 106
388            = 1540
389
390    v_total = v_valid + vsync_width + v_frontporch + v_backporch
391            = 768 + 10 + 8 + 16
392            = 802
393
394    ulTopActive = vsync_width + v_backporch + 1
395            = 10 + 16 + 1
396            = 27
397
398    Pixel clock frequency in Hz:
399    pixel_clk_Hz = h_total * v_total * 60 * 1000 / 1001
400                 = 1540 * 802 * 60 * 1000 / 1001
401                 = 74030769 Hz for 59.94Hz refresh
402
403    line_time    = 1001/(60*802*1000)
404                 = 20.802 us
405
406    pixel_clk_Hz = h_total * v_total * 60
407                 = 1540 * 802 * 60
408                 = 74104800 Hz for 60Hz refresh
409
410    line_time    = 1/(60*802)
411                 = 20.781 us
412*/
413
414static BFMT_CustomFormatInfo s_stCustomInfo0_wxga =
415{
416        (void*)s_vec_tb_noprim_dvim1920x1080p_60hz_bvb_input_bss_wxga,
417        (void*)&s_stDvoRmTbl0_wxga,
418        (void*)&s_stDvoRmTbl1_wxga
419};
420
421static BFMT_CustomFormatInfo s_stCustomInfo1_wxga =
422{
423        (void*)s_vec_tb_noprim_dvim1920x1080p_60hz_bvb_input_bss_wxga,
424        (void*)&s_stDvoRmTbl2_wxga,
425        (void*)&s_stDvoRmTbl2_wxga
426};
427
428static BFMT_CustomFormatInfo s_stCustomInfo0_fhd =
429{
430        (void*)s_vec_tb_noprim_dvim1920x1080p_60hz_bvb_input_bss_fhd,
431        (void*)&s_stDvoRmTbl0_fhd,
432        (void*)&s_stDvoRmTbl1_fhd
433};
434
435static BFMT_CustomFormatInfo s_stCustomInfo1_fhd =
436{
437        (void*)s_vec_tb_noprim_dvim1920x1080p_60hz_bvb_input_bss_fhd,
438        (void*)&s_stDvoRmTbl2_fhd,
439        (void*)&s_stDvoRmTbl2_fhd
440};
441
442/* Default custom formats: 1366x768p 60Hz and 50Hz; */
443/* 59.94/60 Hz */
444static const BFMT_VideoInfo s_stFormatInfoCustom0_wxga =
445{
446        BFMT_VideoFmt_eCustom0,
447        1366,
448        768,
449        1366,
450        768,
451        1540,
452        802,
453        27,
454        0,
455        0,
456        0,
457        BFMT_VERT_59_94Hz | BFMT_VERT_60Hz,
458        6000,
459        BFMT_PXL_148_5MHz_DIV_1_001 | BFMT_PXL_148_5MHz,
460        false,
461        BFMT_AspectRatio_e16_9,
462        BFMT_Orientation_e2D,
463        7403,
464        "BFMT_VideoFmt_eCustom0",
465        &s_stCustomInfo0_wxga
466};
467
468/* 50 Hz */
469static const BFMT_VideoInfo s_stFormatInfoCustom1_wxga =
470{
471        BFMT_VideoFmt_eCustom1,
472        1366,
473        768,
474        1366,
475        768,
476        1540,
477        802,
478        27,
479        0,
480        0,
481        0,
482        BFMT_VERT_50Hz,
483        5000,
484        BFMT_PXL_148_5MHz,
485        false,
486        BFMT_AspectRatio_e16_9,
487        BFMT_Orientation_e2D,
488        7410,
489        "BFMT_VideoFmt_eCustom1",
490        &s_stCustomInfo1_wxga
491};
492
493/*
494    DTRAM values for Custom 1920x1080p
495
496    h_total = h_valid + hsync_width + h_backporch + h_frontporch
497            = 1920 + 44 + 200 + 36
498            = 2200
499
500    v_total = v_valid + vsync_width + v_backporch + v_frontporch
501            = 1080 + 5 + 36 + 4
502            = 1125
503
504    ulTopActive = vsync_width + v_backporch + 1
505            = 5 + 36 + 1
506            = 42
507
508    Pixel clock frequency in Hz:
509    pixel_clk_Hz = h_total * v_total * 60 * 1000 / 1001
510                 = 2200 * 1125 * 60 * 1000 / 1001
511                 = 148351648 Hz for 59.94Hz refresh
512
513    line_time    = 1001/(60*1125*1000)
514                 = 14.830 us
515
516    pixel_clk_Hz = h_total * v_total * 60
517                 = 2200 * 1125 * 60
518                 = 148500000 Hz for 60Hz refresh
519
520    line_time    = 1/(60*1125)
521                 = 14.815 us
522*/
523
524/* Default custom formats: 1366x768p 60Hz and 50Hz; */
525/* 59.94/60 Hz */
526static const BFMT_VideoInfo s_stFormatInfoCustom0_fhd =
527{
528        BFMT_VideoFmt_eCustom0,
529        1920,
530        1080,
531        1920,
532        1080,
533        2200,
534        1125,
535        42,
536        0,
537        0,
538        0,
539        BFMT_VERT_59_94Hz | BFMT_VERT_60Hz,
540        6000,
541        BFMT_PXL_148_5MHz_DIV_1_001 | BFMT_PXL_148_5MHz,
542        false,
543        BFMT_AspectRatio_e16_9,
544        BFMT_Orientation_e2D,
545        14850,
546        "BFMT_VideoFmt_eCustom0",
547        &s_stCustomInfo0_fhd
548};
549
550/* 50 Hz */
551static const BFMT_VideoInfo s_stFormatInfoCustom1_fhd =
552{
553        BFMT_VideoFmt_eCustom1,
554        1920,
555        1080,
556        1920,
557        1080,
558        2200,
559        1125,
560        42,
561        0,
562        0,
563        0,
564        BFMT_VERT_50Hz,
565        5000,
566        BFMT_PXL_148_5MHz,
567        false,
568        BFMT_AspectRatio_e16_9,
569        BFMT_Orientation_e2D,
570        12375,
571        "BFMT_VideoFmt_eCustom1",
572        &s_stCustomInfo1_fhd
573};
574
575#if (BFMT_CUSTOM_PANEL_TIMING == BFMT_P_CUSTOM_PANEL_TIMING_FULL_WXGA)
576#define s_stFormatInfoCustom0 s_stFormatInfoCustom0_wxga
577#define s_stFormatInfoCustom1 s_stFormatInfoCustom1_wxga
578#else
579#define s_stFormatInfoCustom0 s_stFormatInfoCustom0_fhd
580#define s_stFormatInfoCustom1 s_stFormatInfoCustom1_fhd
581#endif
582
583
584/* WARNINGS: below code are for internal use only! */
585/*
586 * This is a one-way runtime switch to go from WXGA to FHD.
587 * Apps can call this function before BVDC_Open if they want this feature.
588 * BFMT_P_SetFhd() is not part of the public API and is subject to change or
589 * removal. Add an extern to your own code to use it.
590*/
591void BFMT_P_SetFhd
592        ( void )
593{
594#if (BFMT_CUSTOM_PANEL_TIMING == BFMT_P_CUSTOM_PANEL_TIMING_FULL_WXGA)
595    BKNI_Memcpy((void*)&s_stFormatInfoCustom0, &s_stFormatInfoCustom0_fhd, sizeof(s_stFormatInfoCustom0));
596    BKNI_Memcpy((void*)&s_stFormatInfoCustom1, &s_stFormatInfoCustom1_fhd, sizeof(s_stFormatInfoCustom1));
597#else
598    /* BDBG_ERR(("You must compile with BFMT_P_CUSTOM_PANEL_TIMING_FULL_WXGA to
599     * have runtime switch from WXGA to FHD")); */
600#endif
601        return;
602}
603
604/* End of File */
605
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