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brdc.h

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1	/***************************************************************************
2	* Copyright (c) 2003-2011, Broadcom Corporation
3	* All Rights Reserved
4	* Confidential Property of Broadcom Corporation
5	*
6	* THIS SOFTWARE MAY ONLY BE USED SUBJECT TO AN EXECUTED SOFTWARE LICENSE
7	* AGREEMENT BETWEEN THE USER AND BROADCOM. YOU HAVE NO RIGHT TO USE OR
8	* EXPLOIT THIS MATERIAL EXCEPT SUBJECT TO THE TERMS OF SUCH AN AGREEMENT.
9	*
10	* $brcm_Workfile: brdc.h $
11	* $brcm_Revision: Hydra_Software_Devel/92 $
12	* $brcm_Date: 11/1/11 9:55a $
13	*
14	* Module Description:
15	*
16	* Revision History:
17	*
18	* $brcm_Log: /magnum/commonutils/rdc/7038/brdc.h $
19	*
20	* Hydra_Software_Devel/92 11/1/11 9:55a pntruong
21	* SW7435-23: Initial rdc support for 7435.
22	*
23	* Hydra_Software_Devel/91 8/8/11 6:18p vanessah
24	* SW7425-923: rollback the STG trigger change
25	*
26	* Hydra_Software_Devel/90 8/8/11 5:56p vanessah
27	* SW7425-923: add 2nd STG support
28	*
29	* Hydra_Software_Devel/89 4/13/11 6:48p pntruong
30	* SW7425-339: Added support for new vec/cmp triggers. Fixed force
31	* trigger index to use mapping table instead of enum.
32	*
33	* Hydra_Software_Devel/88 3/15/11 4:43p pntruong
34	* SWDTV-5971: Added support for the 35233 DTV chip.
35	*
36	* Hydra_Software_Devel/87 2/9/11 3:34p pntruong
37	* SW7420-1456: Initial standby power management that used chp's pm
38	* functionalities. Additional standardize coding style and uses of dbg
39	* object.
40	*
41	* Hydra_Software_Devel/SW7420-1456/1 2/3/11 6:14p jtna
42	* SW7420-1456: rename VDC_656 to VDC_656_OUT
43	*
44	* Hydra_Software_Devel/86 11/17/10 11:00p hongtaoz
45	* SW7422-13, SW7425-25: bring up 7422 VEC 656out; 7422/25 have two
46	* 656out, no 656in;
47	*
48	* Hydra_Software_Devel/85 6/22/10 3:02p pntruong
49	* SW7422-12: Fixed build errors. Corrected naming to follow previous
50	* naming convention.
51	*
52	* Hydra_Software_Devel/84 6/22/10 11:39a vanessah
53	* SW7422-12: To support appframework. Missing files added:
54	* magnum\portinginterface\pwr rockford\appframework\src\board\97422 To
55	* do list: 1. in framework_board.c, more initialization to be done. 2.
56	* More registers mapping, like clock generation as well as
57	* BCHP_SUN_TOP_CTRL_PIN_MUX_CTRL etc
58	*
59	* Hydra_Software_Devel/83 3/18/10 11:37a yuxiaz
60	* SW7405-3954: Remove dependence of brdc.h in bavc.h
61	*
62	* Hydra_Software_Devel/81 9/2/09 5:31p albertl
63	* SW7630-8: Added 7630 RDC support.
64	*
65	* Hydra_Software_Devel/80 1/20/09 8:31p tdo
66	* PR45792, PR45793: Add Timer Service API to RDC. Add HW RDC timer
67	* support. Modify new RDC instruction.
68	*
69	* Hydra_Software_Devel/79 11/24/08 3:35p albertl
70	* PR49393: Changed BRDC_Slot_RulConfigRulSize_isr to use
71	* BRDC_List_SetNumEntries_isr and return void.
72	*
73	* Hydra_Software_Devel/78 9/30/08 8:45p tdo
74	* PR45793: Add New RDC Instructions: SUM, SUM IMM, COND SKIP, SKIP, EXIT
75	*
76	* Hydra_Software_Devel/77 2/28/08 6:18p jessem
77	* PR 38623: Corrected comments on BRDC_BlockOut struct.
78	*
79	* Hydra_Software_Devel/76 2/28/08 5:01p jessem
80	* PR 38623: Added RDMA blockout support.
81	*
82	* Hydra_Software_Devel/75 2/19/08 4:56p pntruong
83	* PR38863, PR39416: Updated to include 656 output and px3d trigger.
84	*
85	* Hydra_Software_Devel/74 9/21/07 3:40p hongtaoz
86	* PR34955: added RUL size self config API to support PsF 1080p feature;
87	*
88	* Hydra_Software_Devel/73 9/13/07 4:13p pntruong
89	* PR 28750 : Added RDC hooks for RUL capture for splash screen.
90	*
91	* Hydra_Software_Devel/PR28750/3 9/11/07 5:18p shyam
92	* PR 28750 : Add error returns to intercepts
93	*
94	* Hydra_Software_Devel/PR28750/2 9/7/07 1:45p shyam
95	* PR 28750 : Change to RDC hooks as function pointers
96	*
97	* Hydra_Software_Devel/72 4/16/07 10:55a yuxiaz
98	* PR 29722: Add 7405 support.
99	*
100	* Hydra_Software_Devel/71 1/29/07 10:13p pntruong
101	* PR26943: Update documentation in RDMA - cannot access registers outside
102	* of BVN.
103	*
104	* Hydra_Software_Devel/70 12/21/06 7:11p hongtaoz
105	* PR25668, PR22768: added API of RDC scratch registers for user to alloc
106	* and free;
107	*
108	* Hydra_Software_Devel/69 12/21/06 1:07p hongtaoz
109	* PR25668: h/w changed RDC scratch registers layout; bring up 7403;
110	*
111	* Hydra_Software_Devel/68 8/15/06 6:36p pntruong
112	* PR23177: Also need to map the unknown trigger for trigger_select.
113	*
114	* Hydra_Software_Devel/67 8/14/06 7:51p pntruong
115	* PR23177: RDC module bringup.
116	*
117	* Hydra_Software_Devel/66 8/7/06 3:28p pntruong
118	* PR23177: RDC module bringup.
119	*
120	* Hydra_Software_Devel/65 6/13/06 5:07p syang
121	* PR 21689: add support for 7118
122	*
123	* Hydra_Software_Devel/64 4/25/06 2:29p jasonh
124	* PR 20949: Fixed M2MC trigger.
125	*
126	* Hydra_Software_Devel/63 2/15/06 4:02p jasonh
127	* PR 19691: Fixed VDEC and HD_DVI trigger names across all chipsets.
128	*
129	* Hydra_Software_Devel/62 2/14/06 1:25p jasonh
130	* PR 19565: Adding support for 7438
131	*
132	* Hydra_Software_Devel/61 1/25/06 10:59p pntruong
133	* PR19172: Black-screen with latest VDC on 97398. The mosaic added 4
134	* more slots for capture compositing surface this pushes the hddvi slot
135	* out, and not all slot has track execution. This causes the update
136	* format rul of hddvi not properly execute and cause hddvi not to lock.
137	* Fixes by freeing non-used frame slot in vdec/656/hddvi, and free up
138	* more rdc vars to be used for track execution.
139	*
140	* Hydra_Software_Devel/60 1/17/06 3:49p hongtaoz
141	* PR19082: support 7400;
142	*
143	* Hydra_Software_Devel/59 1/13/06 11:58a jasonh
144	* PR 19074: Temporary fix for M2MC trigger. Will be fixed later in RDB.
145	*
146	* Hydra_Software_Devel/58 1/12/06 1:31p hongtaoz
147	* PR18233: added mosaic mode support;
148	*
149	* Hydra_Software_Devel/MosaicMode_Feature_PR18233/4 1/12/06 11:40a hongtaoz
150	* PR18233: added mosaic mode API;
151	*
152	* Hydra_Software_Devel/57 1/3/06 3:00p yuxiaz
153	* PR17593: Removed unused RDC task-context code. Use the _isr version of
154	* functions for the non-_isr version.
155	*
156	* Hydra_Software_Devel/56 12/14/05 10:28a yuxiaz
157	* PR15019: Return an error if the list address goes beyond 128M range.
158	* Added a new RDC error code.
159	*
160	* Hydra_Software_Devel/55 10/7/05 4:46p hongtaoz
161	* PR15945: added BRDC_Slot_SetListDual_isr and
162	* BRDC_Slot_SetCachedListDual_isr support;
163	*
164	* Hydra_Software_Devel/54 7/18/05 6:05p hongtaoz
165	* PR16012: added sec_vec for 7401 support;
166	*
167	* Hydra_Software_Devel/53 6/29/05 4:19p jasonh
168	* PR 16012: Fixing 3560 chip detection.
169	*
170	* Hydra_Software_Devel/52 6/28/05 5:53p jasonh
171	* PR 16012: Adding support for 7401 trigger mapping.
172	*
173	* Hydra_Software_Devel/51 3/21/05 2:27p hongtaoz
174	* PR14494: modified RDC 'unknown' trigger enum value;
175	*
176	* Hydra_Software_Devel/50 3/17/05 6:44p pntruong
177	* PR14494: Add preliminary software support to 3560 A0.
178	*
179	* Hydra_Software_Devel/49 3/10/05 3:31p jasonh
180	* PR 14418: Fixed triggers for 3560
181	*
182	* Hydra_Software_Devel/48 2/22/05 5:26p jasonh
183	* PR 13937: Provided reverse conversion macros and a function to get the
184	* list active in a slot.
185	*
186	* Hydra_Software_Devel/47 11/29/04 4:57p pntruong
187	* PR13076, PR11749: No need to keep track of synclock dummy rul.
188	*
189	* Hydra_Software_Devel/46 11/23/04 8:53p pntruong
190	* PR13076, PR11749: Video jitter under heavy system load. Added RUL
191	* execution check to reduce number of programmed registers.
192	*
193	* Hydra_Software_Devel/45 11/2/04 5:27p pntruong
194	* PR13076: Added cached memory support for rul.
195	*
196	* Hydra_Software_Devel/44 10/29/04 3:55p hongtaoz
197	* PR12162: adding rdc variables to time-stamp RUL execution time;
198	*
199	* Hydra_Software_Devel/43 10/28/04 4:07p yuxiaz
200	* PR13108: Remove BKNI_Sleep from critical section and _isr functions.
201	* Clean up _isr and non_isr functions.
202	*
203	* Hydra_Software_Devel/42 10/28/04 9:16a yuxiaz
204	* PR13100: Create non _isr version of BRDC_List_GetStartAddress,
205	* BRDC_Slot_SetList and BRDC_List_SetNumEntries. Change comments for
206	* BRDC_Slot_GetId.
207	*
208	* Hydra_Software_Devel/41 9/21/04 4:24p yuxiaz
209	* PR12728: fixed -pedantic warnings.
210	*
211	* Hydra_Software_Devel/40 6/25/04 3:27p yuxiaz
212	* PR 11659: Rename RDC variables reserved for VDC to
213	* BRDC_Variable_VDC_num. Move the defination of reserved variables back
214	* to RDC.
215	*
216	* Hydra_Software_Devel/39 6/25/04 9:10a yuxiaz
217	* PR 11659: Remove VDC reserved variables. Variables defined in RDC can
218	* be used by all the moduals.
219	*
220	* Hydra_Software_Devel/38 6/17/04 4:05p pntruong
221	* PR9957: Prevent create/destroy from effecting hardware in VDC. Added
222	* get interrupt id, so app can create corresponding callback.
223	*
224	* Hydra_Software_Devel/Refsw_Devel_7038_B0/2 4/28/04 9:47a yuxiaz
225	* PR 10699: Added more RDC variables for multi-buffering debugging
226	*
227	* Hydra_Software_Devel/Refsw_Devel_7038_B0/1 4/15/04 10:15a pntruong
228	* PR9813: Need to add initial support for 7038 B0. Getting mvd_vdc_test
229	* to display statics buffers.
230	*
231	* Hydra_Software_Devel/35 4/7/04 2:14p yuxiaz
232	* PR 10404: Combine BRDC_Slot_SetNumEntries_isr and
233	* BRDC_Slot_AssignList_isr into BRDC_Slot_SetList_isr so both RUL
234	* address and count are set in one atomic function.
235	*
236	* Hydra_Software_Devel/34 3/23/04 8:21p pntruong
237	* PR10219: Safeguard RDC macro's arguments.
238	*
239	* Hydra_Software_Devel/33 3/16/04 2:51p yuxiaz
240	* PR 10095: Updated document.
241	*
242	* Hydra_Software_Devel/32 1/21/04 10:30a yuxiaz
243	* PR 9076: Change BRDC_Slot_AssignList to _isr for double buffer RUL.
244	*
245	* Hydra_Software_Devel/31 1/14/04 4:41p yuxiaz
246	* PR 9076: Change isr functions to _isr.
247	*
248	* Hydra_Software_Devel/30 11/21/03 2:50p yuxiaz
249	* Re-arrange order of parameters in BRDC_Open.
250	*
251	* Hydra_Software_Devel/29 10/30/03 2:45p yuxiaz
252	* Remove bInterrupt from BRDC_Slot_Execute and
253	* BRDC_Slot_ExecuteOnTrigger.
254	*
255	* Hydra_Software_Devel/28 10/27/03 3:13p yuxiaz
256	* Added BRDC_Slot_SetNumEntries
257	*
258	* Hydra_Software_Devel/27 10/7/03 5:13p yuxiaz
259	* Remove BRDC_Slot_TestAndClear.
260	*
261	* Hydra_Software_Devel/26 10/1/03 2:11p yuxiaz
262	* Added BRDC_List_GetMaxEntries.
263	*
264	* Hydra_Software_Devel/25 9/26/03 5:19p yuxiaz
265	* Rename BRDC_Execute_Trigger to BRDC_Trigger_Execute.
266	*
267	* Hydra_Software_Devel/24 9/26/03 1:50p jasonh
268	* Changed argument documentation to be in-line and use in/out.
269	*
270	* Hydra_Software_Devel/23 9/24/03 4:55p yuxiaz
271	* Cnt should be num - 1 in block, window write and copy command.
272	*
273	* Hydra_Software_Devel/22 9/23/03 5:51p pntruong
274	* Removed the 7038_ from header filename generated from RDB.
275	*
276	* Hydra_Software_Devel/21 9/8/03 9:35a yuxiaz
277	* Change unsigned int to uint32_t.
278	*
279	* Hydra_Software_Devel/20 9/2/03 2:55p yuxiaz
280	* Added BRDC_Slot_GetId, moved BRDC_SlotId to brdc.h.
281	*
282	* Hydra_Software_Devel/19 8/14/03 8:58a yuxiaz
283	* Clean up include files.
284	*
285	* Hydra_Software_Devel/18 8/5/03 3:27p yuxiaz
286	* Added BRDC_EnableSameTrigger.
287	*
288	* Hydra_Software_Devel/17 7/31/03 2:16p pntruong
289	* Added BCHP_PHYSICAL_OFFSET in rdb generated header.
290	*
291	* Hydra_Software_Devel/16 7/25/03 12:12p yuxiaz
292	* Change BRDC_Trigger to use defines in RDB. Misc clean up.
293	*
294	* Hydra_Software_Devel/15 7/17/03 8:50a yuxiaz
295	* Added debug message.
296	*
297	* Hydra_Software_Devel/14 7/14/03 10:25a yuxiaz
298	* Change BCHP_PHYSICAL_OFFSET to 0x10000000.
299	*
300	* Hydra_Software_Devel/13 7/11/03 2:25p yuxiaz
301	* Remove BERR_RDC_ID.
302	*
303	* Hydra_Software_Devel/12 7/10/03 8:41a yuxiaz
304	* Rename BRDC_List_GetAddress to BRDC_List_GetStartAddress.
305	*
306	* Hydra_Software_Devel/11 7/7/03 2:51p yuxiaz
307	* Added opcode. Misc clean up.
308	*
309	* Hydra_Software_Devel/10 7/1/03 4:21p yuxiaz
310	* Added BRDC_Execute_Trigger.
311	*
312	* Hydra_Software_Devel/9 6/30/03 1:15p yuxiaz
313	* Added BRDC_Trigger.
314	*
315	* Hydra_Software_Devel/8 6/27/03 2:54p yuxiaz
316	* Added it to commonutils and fix build.
317	*
318	* Hydra_Software_Devel/7 6/26/03 3:00p yuxiaz
319	* Added BRDC_List_GetNumEntries.
320	*
321	* Hydra_Software_Devel/6 6/18/03 2:15p jasonh
322	* Fixed arguments to Open routine.
323	*
324	* Hydra_Software_Devel/5 6/16/03 3:23p jasonh
325	* Changes made due to 2nd code review.
326	*
327	* Hydra_Software_Devel/4 6/11/03 7:29p jasonh
328	* Changes made due to first code review.
329	*
330	* Hydra_Software_Devel/3 6/6/03 2:36p jasonh
331	* Added list commands and flushed out documentation.
332	*
333	* Hydra_Software_Devel/2 6/2/03 11:48a jasonh
334	* Changed RDA->RDC
335	*
336	* Hydra_Software_Devel/1 5/19/03 10:57a jasonh
337	* Initial version.
338	*
339	***************************************************************************/
340	#ifndef BRDC_H__
341	#define BRDC_H__
342
343
344	#include "bchp.h" /* Chip information */
345	#include "berr_ids.h" /* Error codes */
346	#include "bmem.h" /* Chip memory access */
347	#include "bint.h" /* Returning the interrupt ID of slot */
348
349	#include "bchp_rdc.h" /* RDC trigger */
350	#include "bchp_common.h" /* register physical offset */
351
352	#ifdef __cplusplus
353	extern "C" {
354	#endif
355
356	/=Module Overview: *******************************************************
357	Register DMA is the process where commands to read, modify, and write
358	registers are contained in allocated lists and issued directly by
359	hardware when a trigger fires. This module provides the interface
360	for register DMA.
361
362	Register DMA can only be used for BVN operations with the current GISB
363	settings. If Register DMA tries to access a register outside BVN, such as
364	IFD regerters, a bus timeout interrupt will be generated.
365
366	The two basic types in the RDC are the list handle, BRDC_List_Handle, and
367	the slot handle, BRDC_Slot_Handle. A list handle points to an allocated
368	list of 32-bit entries capable of storing register DMA commands. When
369	the user wants to activate a given list, a list handle is assigned to a
370	slot handle. The slot handle is then triggered and issued by hardware.
371	Slots should be used by only one module at a time.
372
373	The commands within a list follow a specific pattern. Each command must
374	start with a command header, any of the macros starting with BRDC_OP,
375	and then are followed by other 32-bit data values. Each BRDC_OP describes
376	what must follow each command entry.
377
378	The basic process is as follows:
379
380	When a module needs to use register DMA, when the using module is
381	opened, it should allocate all lists and slots it needs with
382	BRDC_ListCreate and BRDC_SlotCreate.
383
384	When the module wants to issue a list, it should get the pointer to
385	list memory with a call to BRDC_List_GetStartAddress. Fill in the list with
386	any of the BRDC_OP commands and required data, notify RDC of the number of
387	entries in the list with BRDC_List_SetNumEntries_isr, assign the list to a slot
388	with BRDC_Slot_SetList_isr, and then trigger the list manually with
389	BRDC_SlotExecute or have hardware issue with a trigger by calling
390	BRDC_Slot_AssignTriggerToSlot.
391
392	Note that the most optimal command to use to update registers is
393	BRDC_OP_BLOCK_IMMS_TO_REGS. When possible, this command
394	should be used.
395
396	Note that since the BRDC_OP commands are macros, it is very possible
397	to statically create lists beforehand and copy them into allocated
398	lists. This is highly recommended.
399
400	When finished, the module should free all slots and lists with calls
401	to BRDC_List_Destroy and BRDC_Slot_Destroy.
402	****************************************************************************/
403
404	/***************************************************************************
405	Summary:
406	List of errors unique to RDC
407	****************************************************************************/
408	#define BRDC_LIST_ERR_ASSIGNED_TO_SLOT BERR_MAKE_CODE(BERR_RDC_ID, 0)
409	#define BRDC_LIST_ERR_ENTRIES_MORE_THAN_MAX BERR_MAKE_CODE(BERR_RDC_ID, 1)
410	#define BRDC_LIST_ERR_MEMORY_BEYOND_128M BERR_MAKE_CODE(BERR_RDC_ID, 2)
411
412	#define BRDC_SLOT_ERR_ALL_USED BERR_MAKE_CODE(BERR_RDC_ID, 3)
413	#define BRDC_SLOT_ERR_EMPTY_LIST BERR_MAKE_CODE(BERR_RDC_ID, 4)
414	#define BRDC_SLOT_ERR_ACQUIRE_SEMAPHORE BERR_MAKE_CODE(BERR_RDC_ID, 5)
415
416	/***************************************************************************
417	* Enums
418	***************************************************************************/
419	/***************************************************************************
420	Summary:
421	List of all slots used by RDC. Must match descriptors in RDB.
422
423	Description:
424
425	See Also:
426	BRDC_Slot_GetId
427	****************************************************************************/
428	typedef enum
429	{
430	BRDC_SlotId_eSlot0 = 0, /* RDC Descriptor 0 */
431	BRDC_SlotId_eSlot1, /* RDC Descriptor 1 */
432	BRDC_SlotId_eSlot2, /* RDC Descriptor 2 */
433	BRDC_SlotId_eSlot3, /* RDC Descriptor 3 */
434	BRDC_SlotId_eSlot4, /* RDC Descriptor 4 */
435	BRDC_SlotId_eSlot5, /* RDC Descriptor 5 */
436	BRDC_SlotId_eSlot6, /* RDC Descriptor 6 */
437	BRDC_SlotId_eSlot7, /* RDC Descriptor 7 */
438	BRDC_SlotId_eSlot8, /* RDC Descriptor 8 */
439	BRDC_SlotId_eSlot9, /* RDC Descriptor 9 */
440	BRDC_SlotId_eSlot10, /* RDC Descriptor 10 */
441	BRDC_SlotId_eSlot11, /* RDC Descriptor 11 */
442	BRDC_SlotId_eSlot12, /* RDC Descriptor 12 */
443	BRDC_SlotId_eSlot13, /* RDC Descriptor 13 */
444	BRDC_SlotId_eSlot14, /* RDC Descriptor 14 */
445	BRDC_SlotId_eSlot15, /* RDC Descriptor 15 */
446	BRDC_SlotId_eSlot16, /* RDC Descriptor 16 */
447	BRDC_SlotId_eSlot17, /* RDC Descriptor 17 */
448	BRDC_SlotId_eSlot18, /* RDC Descriptor 18 */
449	BRDC_SlotId_eSlot19, /* RDC Descriptor 19 */
450	BRDC_SlotId_eSlot20, /* RDC Descriptor 20 */
451	BRDC_SlotId_eSlot21, /* RDC Descriptor 21 */
452	BRDC_SlotId_eSlot22, /* RDC Descriptor 22 */
453	BRDC_SlotId_eSlot23, /* RDC Descriptor 23 */
454	BRDC_SlotId_eSlot24, /* RDC Descriptor 24 */
455	BRDC_SlotId_eSlot25, /* RDC Descriptor 25 */
456	BRDC_SlotId_eSlot26, /* RDC Descriptor 26 */
457	BRDC_SlotId_eSlot27, /* RDC Descriptor 27 */
458	BRDC_SlotId_eSlot28, /* RDC Descriptor 28 */
459	BRDC_SlotId_eSlot29, /* RDC Descriptor 29 */
460	BRDC_SlotId_eSlot30, /* RDC Descriptor 30 */
461	BRDC_SlotId_eSlot31, /* RDC Descriptor 31 */
462
463	/* Add new slot here */
464
465	BRDC_SlotId_eSlotMAX /* Maximum number of slot. Must be last ! */
466
467	} BRDC_SlotId;
468
469	/***************************************************************************
470	Summary:
471	List of all triggers used by RDC. Must match trigger select in RDB.
472
473	Description:
474	These enum are also use for indexing internal tables. Note, not all
475	triggers are available on a given chip. In given case RDC API will return
476	error with not supported.
477
478	See Also:
479	BRDC_Slot_ExecuteOnTrigger_isr
480	****************************************************************************/
481	typedef enum
482	{
483	/* Capture */
484	BRDC_Trigger_eCap0Trig0 = 0,
485	BRDC_Trigger_eCap0Trig1,
486
487	BRDC_Trigger_eCap1Trig0,
488	BRDC_Trigger_eCap1Trig1,
489
490	BRDC_Trigger_eCap2Trig0,
491	BRDC_Trigger_eCap2Trig1,
492
493	BRDC_Trigger_eCap3Trig0,
494	BRDC_Trigger_eCap3Trig1,
495
496	BRDC_Trigger_eCap4Trig0,
497	BRDC_Trigger_eCap4Trig1,
498
499	BRDC_Trigger_eCap5Trig0,
500	BRDC_Trigger_eCap5Trig1,
501
502	/* Vec */
503	BRDC_Trigger_eVec0Trig0,
504	BRDC_Trigger_eVec0Trig1,
505	BRDC_Trigger_eVec0Trig2,
506	BRDC_Trigger_eVec0Trig3,
507
508	BRDC_Trigger_eVec1Trig0,
509	BRDC_Trigger_eVec1Trig1,
510	BRDC_Trigger_eVec1Trig2,
511	BRDC_Trigger_eVec1Trig3,
512
513	BRDC_Trigger_eVec2Trig0,
514	BRDC_Trigger_eVec2Trig1,
515	BRDC_Trigger_eVec2Trig2,
516	BRDC_Trigger_eVec2Trig3,
517
518	/* aka, 656 output */
519	BRDC_Trigger_eDtgTrig0,
520	BRDC_Trigger_eDtgTrig1,
521
522	BRDC_Trigger_eDtg1Trig0,
523	BRDC_Trigger_eDtg1Trig1,
524
525	/* Analog video decoder (vdec) */
526	BRDC_Trigger_eVdec0Trig0,
527	BRDC_Trigger_eVdec0Trig1,
528
529	BRDC_Trigger_eVdec1Trig0,
530	BRDC_Trigger_eVdec1Trig1,
531
532	/* External ITU-R-656 input source */
533	BRDC_Trigger_e6560Trig0,
534	BRDC_Trigger_e6560Trig1,
535
536	BRDC_Trigger_e6561Trig0,
537	BRDC_Trigger_e6561Trig1,
538
539	/* Memory to Memory compositor (or grc) */
540	BRDC_Trigger_eM2mc0Trig,
541	BRDC_Trigger_eM2mc1Trig,
542
543	/* HD_DVI input */
544	BRDC_Trigger_eHdDvi0Trig0,
545	BRDC_Trigger_eHdDvi0Trig1,
546
547	BRDC_Trigger_eHdDvi1Trig0,
548	BRDC_Trigger_eHdDvi1Trig1,
549
550	/* Simple Trigger Generator */
551	BRDC_Trigger_eStg0Trig0,
552	BRDC_Trigger_eStg0Trig1,
553
554	/* Box detection */
555	BRDC_Trigger_eLboxTrig0,
556	BRDC_Trigger_eLboxTrig1,
557
558	/* DVO output */
559	BRDC_Trigger_eDvoTrig0,
560	BRDC_Trigger_eDvoTrig1,
561	BRDC_Trigger_eDvoTrig2,
562	BRDC_Trigger_eDvoTrig3,
563
564	/* Mpeg/AVC feeder */
565	BRDC_Trigger_eMfd0Eof,
566	BRDC_Trigger_eMfd1Eof,
567	BRDC_Trigger_eMfd2Eof,
568	BRDC_Trigger_eMfd3Eof,
569
570	/* ANR Triggers */
571	BRDC_Trigger_eAnr0Trig0,
572	BRDC_Trigger_eAnr0Trig1,
573	BRDC_Trigger_eAnr1Trig0,
574	BRDC_Trigger_eAnr1Trig1,
575
576	/* DGP Triggers */
577	BRDC_Trigger_eDgp0Trig0,
578
579	/* PX3D Triggers */
580	BRDC_Trigger_ePx3d0Trig0,
581
582	/* Vec Source or CMP trigger */
583	BRDC_Trigger_eCmp_0Trig0,
584	BRDC_Trigger_eCmp_0Trig1,
585
586	BRDC_Trigger_eCmp_1Trig0,
587	BRDC_Trigger_eCmp_1Trig1,
588
589	BRDC_Trigger_eCmp_2Trig0,
590	BRDC_Trigger_eCmp_2Trig1,
591
592	BRDC_Trigger_eCmp_3Trig0,
593	BRDC_Trigger_eCmp_3Trig1,
594
595	BRDC_Trigger_eCmp_4Trig0,
596	BRDC_Trigger_eCmp_4Trig1,
597
598	BRDC_Trigger_eCmp_5Trig0,
599	BRDC_Trigger_eCmp_5Trig1,
600
601	/* Combined of triggers to trigger*/
602	BRDC_Trigger_eComboTrig0,
603	BRDC_Trigger_eComboTrig1,
604	BRDC_Trigger_eComboTrig2,
605	BRDC_Trigger_eComboTrig3,
606
607	/* Unknown trigger ID */
608	BRDC_Trigger_UNKNOWN
609
610	} BRDC_Trigger;
611
612
613	/***************************************************************************
614	Summary:
615	List of all combined trigger modes used by RDC.
616
617	Description:
618	BRDC_ComboTrigMode_eAllTriggers - If all of the triggers in the mask are active,
619	the trigger for this will fire;
620	BRDC_ComboTrigMode_eAnyTrigger - If any of the triggers in the mask are active,
621	the trigger for this will fire.
622
623	Reset value is BRDC_ComboTrigMode_eAllTriggers;
624
625	See Also:
626	BRDC_SetComboTrigMode_isr
627	****************************************************************************/
628	typedef enum
629	{
630	BRDC_ComboTrigMode_eAllTriggers = 0,
631	BRDC_ComboTrigMode_eAnyTrigger
632	} BRDC_ComboTrigMode;
633
634	/***************************************************************************
635	Summary:
636	List of all variables used to store temporary values.
637
638	Description:
639	Used by list operations to hold temporary values. These
640	variables are available for all lists to use.
641
642	Referred to as general purpose registers in the hardware documentation.
643
644	Naming convention:
645	BRDC_Variable_num:
646	The general purpose variables, can be used by all the moduals.
647
648	The following moduals have reserved variables:
649	VDC: ? variables are reserved for VDC.
650
651	See Also:
652	BRDC_OP_VAR_TO_REG,
653	BRDC_OP_REG_TO_VAR,
654	BRDC_OP_IMM_TO_VAR,
655	BRDC_OP_VAR_AND_VAR_TO_VAR,
656	BRDC_OP_VAR_AND_IMM_TO_VAR,
657	BRDC_OP_VAR_OR_VAR_TO_VAR,
658	BRDC_OP_VAR_OR_IMM_TO_VAR,
659	BRDC_OP_VAR_XOR_VAR_TO_VAR,
660	BRDC_OP_VAR_XOR_IMM_TO_VAR,
661	BRDC_OP_NOT_VAR_TO_VAR,
662	BRDC_OP_VAR_ROR_TO_VAR
663	****************************************************************************/
664	typedef enum
665	{
666	/* General purpose RDC variables*/
667	/* Note: Only provide small number variables for general use.
668	* If additional variables are needeed, only add the ones
669	* that are not used. Changing the reserved ones may break
670	* the system.
671	* TODO: expose them in a generic way to be shared by different
672	* PI modules; */
673	BRDC_Variable_0 = 0, /* RDC_data_0 */
674	BRDC_Variable_1 = 1, /* RDC_data_1 */
675	BRDC_Variable_2 = 2, /* RDC_data_2 */
676	BRDC_Variable_3 = 3, /* RDC_data_3 */
677	/* RDC_data_4: Reserved do not used */
678
679	/* RDC_data_5: Reserved do not used */
680	/* RDC_data_6: Reserved do not used */
681	/* RDC_data_7: Reserved do not used */
682	/* RDC_data_8: Reserved do not used */
683	BRDC_Variable_Max
684	} BRDC_Variable;
685
686	/***************************************************************************
687	Summary:
688	Opcode used for RDC
689
690	Description:
691
692	See Also:
693	****************************************************************************/
694	#define BRDC_SET_OPCODE(opcode) ((opcode) << 24)
695	#define BRDC_GET_OPCODE(x) ((x) & UINT32_C(0xFF000000))
696
697	#define BRDC_OP_NOP_OPCODE BRDC_SET_OPCODE(0x0)
698	#define BRDC_OP_IMM_TO_REG_OPCODE BRDC_SET_OPCODE(0x1)
699	#define BRDC_OP_VAR_TO_REG_OPCODE BRDC_SET_OPCODE(0x2)
700	#define BRDC_OP_REG_TO_VAR_OPCODE BRDC_SET_OPCODE(0x3)
701	#define BRDC_OP_IMM_TO_VAR_OPCODE BRDC_SET_OPCODE(0x4)
702	#define BRDC_OP_IMMS_TO_REG_OPCODE BRDC_SET_OPCODE(0x5)
703	#define BRDC_OP_IMMS_TO_REGS_OPCODE BRDC_SET_OPCODE(0x6)
704	#define BRDC_OP_REG_TO_REG_OPCODE BRDC_SET_OPCODE(0x7)
705	#define BRDC_OP_REGS_TO_REGS_OPCODE BRDC_SET_OPCODE(0x8)
706	#define BRDC_OP_REG_TO_REGS_OPCODE BRDC_SET_OPCODE(0x9)
707	#define BRDC_OP_REGS_TO_REG_OPCODE BRDC_SET_OPCODE(0xa)
708	#define BRDC_OP_VAR_AND_VAR_TO_VAR_OPCODE BRDC_SET_OPCODE(0xb)
709	#define BRDC_OP_VAR_AND_IMM_TO_VAR_OPCODE BRDC_SET_OPCODE(0xc)
710	#define BRDC_OP_VAR_OR_VAR_TO_VAR_OPCODE BRDC_SET_OPCODE(0xd)
711	#define BRDC_OP_VAR_OR_IMM_TO_VAR_OPCODE BRDC_SET_OPCODE(0xe)
712	#define BRDC_OP_VAR_XOR_VAR_TO_VAR_OPCODE BRDC_SET_OPCODE(0xf)
713	#define BRDC_OP_VAR_XOR_IMM_TO_VAR_OPCODE BRDC_SET_OPCODE(0x10)
714	#define BRDC_OP_NOT_VAR_TO_VAR_OPCODE BRDC_SET_OPCODE(0x11)
715	#define BRDC_OP_VAR_ROR_TO_VAR_OPCODE BRDC_SET_OPCODE(0x12)
716	#define BRDC_OP_VAR_SUM_VAR_TO_VAR_OPCODE BRDC_SET_OPCODE(0x13)
717	#define BRDC_OP_VAR_SUM_IMM_TO_VAR_OPCODE BRDC_SET_OPCODE(0x14)
718	#define BRDC_OP_COND_SKIP_OPCODE BRDC_SET_OPCODE(0x15)
719	#define BRDC_OP_SKIP_OPCODE BRDC_SET_OPCODE(0x16)
720	#define BRDC_OP_EXIT_OPCODE BRDC_SET_OPCODE(0x17)
721
722	/***************************************************************************
723	Summary:
724	Register wrapper
725
726	Description:
727	When specifying registers in a register list, this macro must be
728	used. The purpose of this macro is to handle any issues where
729	physical addresses are required instead of base-offsets.
730
731	Input:
732	The register base-offset.
733
734	Output:
735	Register value for RDC list.
736
737	See Also:
738	BRDC_List_Create,
739	BRDC_List_GetStartAddress_isr
740	****************************************************************************/
741	#define BRDC_REGISTER(reg) ((reg) + BCHP_PHYSICAL_OFFSET)
742
743	/***************************************************************************
744	Summmary
745	Converts RDC register back to offset register.
746
747	Description:
748	This macro converts a BRDC_REGISTER register value back to the
749	original register value. This function is useful for debugging purposes.
750
751	Input:
752	A value returned by BRDC_REGISTER.
753
754	Output:
755	The register base-offset.
756
757	See Also:
758	BRDC_REGISTER
759	****************************************************************************/
760	#define BRDC_REGISTER_TO_OFFSET(rdc) ((rdc) - BCHP_PHYSICAL_OFFSET)
761
762	/***************************************************************************
763	Summary:
764	NOP command.
765
766	Description:
767	This command can be used as a place holder so that other commands can
768	be inserted into the middle of a list without requiring the size
769	of the list to be adjusted.
770
771	No additional data is required for this command.
772
773	A NULL operation.
774	bit 31 - 24 = 0, opcode
775	bit 23 - 0 = 0, reserved
776
777	Output:
778	Command for RDC list.
779
780	See Also:
781	BRDC_List_Create,
782	BRDC_List_GetStartAddress_isr
783	****************************************************************************/
784	#define BRDC_OP_NOP() BRDC_OP_NOP_OPCODE
785
786	/***************************************************************************
787	Summary:
788	Immediate to register command.
789
790	Description:
791	Also called register write immediate. The command created allows
792	specified immediate data to be stored directly into a register.
793
794	Following this command is the register to write to wrapped in the
795	macro BRDC_REGISTER followed by the immediate data to be stored in
796	that register.
797
798	Write a BVN register using a 32-bit address data pair.
799	bit 31 - 24 = 1, opcode
800	bit 23 - 0 = 0, reserved
801
802	Output:
803	Command for RDC list.
804
805	See Also:
806	BRDC_REGISTER,
807	BRDC_List_Create,
808	BRDC_List_GetStartAddress_isr
809	****************************************************************************/
810	#define BRDC_OP_IMM_TO_REG() BRDC_OP_IMM_TO_REG_OPCODE
811
812	/***************************************************************************
813	Summary:
814	Variable to register command.
815
816	Description:
817	Also called register write, this command stores the contents of a
818	variable into a register.
819
820	Following this command is the register to write to wrapped in the
821	macro BRDC_REGISTER.
822
823	Write the value of a RDC register into a BVN register.
824	bit 31 - 24 = 2, opcode
825	bit 23 - 18 = 0, reserved
826	bit 17 - 12 = v, src
827	bit 11 - 0 = 0, reserved
828
829	Input:
830	v - The variable to read from.
831
832	Output:
833	Command for RDC list.
834
835	See Also:
836	BRDC_REGISTER,
837	BRDC_List_Create,
838	BRDC_List_GetStartAddress_isr
839	****************************************************************************/
840	/* this operation is followed by the register to write to (1 dword) */
841	#define BRDC_OP_VAR_TO_REG(v) ( BRDC_OP_VAR_TO_REG_OPCODE \| ((v)<<12) )
842
843	/***************************************************************************
844	Summary:
845	Register to variable command.
846
847	Description:
848	Also called register read, this command takes the contents of an
849	register and stores it into a variable.
850
851	Following this command is the register to read from wrapped in the
852	macro BRDC_REGISTER
853
854	Read a BVN register into a RDC register.
855	bit 31 - 24 = 3, opcode
856	bit 23 - 6 = 0, reserved
857	bit 5 - 0 = v, dst
858
859	Input:
860	v - The variable to write to.
861
862	Output:
863	Command for RDC list.
864
865	See Also:
866	BRDC_REGISTER,
867	BRDC_List_Create,
868	BRDC_List_GetStartAddress_isr
869	****************************************************************************/
870	#define BRDC_OP_REG_TO_VAR(v) ( BRDC_OP_REG_TO_VAR_OPCODE \| (v) )
871
872	/***************************************************************************
873	Summary:
874	Data to variable command.
875
876	Description:
877	Also called load immediate, this command takes the provided data and
878	stores it in a variable.
879
880	Following this command is the data to be stored in the variable.
881
882	Load a 32-bit immediate value into a RDC register.
883	bit 31 - 24 = 4, opcode
884	bit 23 - 6 = 0, reserved
885	bit 5 - 0 = v, dst
886
887	Input:
888	v - The variable to write to.
889
890	Output:
891	Command for RDC list.
892
893	See Also:
894	BRDC_List_Create,
895	BRDC_List_GetStartAddress_isr
896	****************************************************************************/
897	#define BRDC_OP_IMM_TO_VAR(v) ( BRDC_OP_IMM_TO_VAR_OPCODE \| (v) )
898
899	/***************************************************************************
900	Summary:
901	Block data to register command.
902
903	Description:
904	Also called window write, this command takes a set of data and stores
905	it into the same register.
906
907	Following this command is the register to write to wrapped in the
908	macro BRDC_REGISTER followed by the set of immediate data to be
909	written.
910
911	Write a block of data into a BVN window register, can be used to capture
912	control information such as a RUL through a capture engines's register window.
913	bit 31 - 24 = 5, opcode
914	bit 23 - 12 = 0, reserved
915	bit 11 - 0 = num -1, cnt
916
917	Input:
918	num - The number of data values to write.
919
920	Output:
921	Command for RDC list.
922
923	See Also:
924	BRDC_List_Create,
925	BRDC_List_GetStartAddress_isr
926	****************************************************************************/
927	#define BRDC_OP_IMMS_TO_REG(num) ( BRDC_OP_IMMS_TO_REG_OPCODE \| ((num)-1) )
928
929	/***************************************************************************
930	Summary:
931	Block data to block register command.
932
933	Description:
934	Also called block write, this command takes a set of data and stores
935	it into a consecutive list of registers.
936
937	This command is considered to be the most optimal way to write
938	a set of registers. However, since you are not reading the registers
939	beforehand, this command cannot be used in a read/write/modify
940	manner. Because of this, it is a good practice for software engineers
941	to explicitly store values for all bits in the register even
942	if those bit fields are reserved.
943
944	Following this command is the first register address to
945	write to wrapped in the macro BRDC_REGISTER followed by the set of
946	immediate data to be written.
947
948	Write a block of data into an array of BVN registers, can be used to
949	update a series of control registers such as a scaler's coefficient
950	table.
951	bit 31 - 24 = 6, opcode
952	bit 23 - 12 = 0, reserved
953	bit 11 - 0 = num-1, cnt
954
955	Input:
956	num - The number of consecutive registers to write.
957
958	Output:
959	Command for RDC list.
960
961	See Also:
962	BRDC_REGISTER,
963	BRDC_List_Create,
964	BRDC_List_GetStartAddress_isr
965	****************************************************************************/
966	#define BRDC_OP_IMMS_TO_REGS(num) ( BRDC_OP_IMMS_TO_REGS_OPCODE \| ((num)-1) )
967
968	/***************************************************************************
969	Summary:
970	Single register to single register block copy command.
971
972	Description:
973	Also called window copy, this command reads from a register
974	and writes the value into another register a specified
975	number of times.
976
977	Following this command is the address of the source register
978	wrapped in the BRDC_REGISTER macro followed by the
979	address of the destination register wrapped in the BRDC_REGISTER
980	macro.
981
982	Copy a block of data from a BVN window register to another BVN
983	window register.
984	bit 31 - 24 = 7, opcode
985	bit 23 - 12 = 0, reserved
986	bit 11 - 0 = num-1, cnt
987
988	Input:
989	num - The number of times to read and write.
990
991	Output:
992	Command for RDC list.
993
994	See Also:
995	BRDC_REGISTER,
996	BRDC_List_Create,
997	BRDC_List_GetStartAddress_isr
998	****************************************************************************/
999	#define BRDC_OP_REG_TO_REG(num) ( BRDC_OP_REG_TO_REG_OPCODE \| ((num)-1) )
1000
1001	/***************************************************************************
1002	Summary:
1003	Registers to registers command.
1004
1005	Description:
1006	Also called block copy, this command reads from a consecutive set of
1007	registers and writes those values into another consecutive
1008	set of registers.
1009
1010	Following this command is the first register source address
1011	wrapped in the BRDC_REGISTER macro followed by the first register
1012	destination address wrapped in the BRDC_REGISTER macro.
1013
1014	Copy a block of data from an array of BVN registers to another array
1015	of BVN registers.
1016	bit 31 - 24 = 8, opcode
1017	bit 23 - 12 = 0, reserved
1018	bit 11 - 0 = num-1, cnt
1019
1020	Input:
1021	num - The number of registers to read from and write to.
1022
1023	Output:
1024	Command for RDC list.
1025
1026	See Also:
1027	BRDC_REGISTER,
1028	BRDC_List_Create,
1029	BRDC_List_GetStartAddress_isr
1030	****************************************************************************/
1031	#define BRDC_OP_REGS_TO_REGS(num) ( BRDC_OP_REGS_TO_REGS_OPCODE \| ((num)-1) )
1032
1033	/***************************************************************************
1034	Summary:
1035	Register to registers command.
1036
1037	Description:
1038	Also called window to block copy, this command reads one external
1039	register and writes its value into a set of consecutive external
1040	registers.
1041
1042	Following this command is the source address of the register
1043	wrapped in the BRDC_REGISTER macro followed by the first register
1044	destination address wrapped in the BRDC_REGISTER macro.
1045
1046	Copy a block of data from a BVN window register to an array
1047	of BVN registers.
1048	bit 31 - 24 = 9, opcode
1049	bit 23 - 12 = 0, reserved
1050	bit 11 - 0 = num-1, cnt
1051
1052	Input:
1053	num - The number of registers to write to.
1054
1055	Output:
1056	Command for RDC list.
1057
1058	See Also:
1059	BRDC_REGISTER,
1060	BRDC_List_Create,
1061	BRDC_List_GetStartAddress_isr
1062	****************************************************************************/
1063	#define BRDC_OP_REG_TO_REGS(num) ( BRDC_OP_REG_TO_REGS_OPCODE \| ((num)-1) )
1064
1065	/***************************************************************************
1066	Summary:
1067	Registers to register command.
1068
1069	Description:
1070	Also called block to window copy, this command reads from a consecutive
1071	set of registers and writes them into one register.
1072
1073	Following this command is the first address of the source registers
1074	wrapped in the BREG_REGISTER macro followed by the destination
1075	register address wrapped in the BREG_REGISTER macro.
1076
1077	Copy a block of data from an array of BVN registers.to a BVN window register.
1078	bit 31 - 24 = 0xa, opcode
1079	bit 23 - 12 = 0, reserved
1080	bit 11 - 0 = num-1, cnt
1081
1082	Input:
1083	num - The number of registers to read from.
1084
1085	Output:
1086	Command for RDC list.
1087
1088	See Also:
1089	BRDC_REGISTER,
1090	BRDC_List_Create,
1091	BRDC_List_GetStartAddress_isr
1092	****************************************************************************/
1093	#define BRDC_OP_REGS_TO_REG(num) ( BRDC_OP_REGS_TO_REG_OPCODE \| ((num)-1) )
1094
1095	/***************************************************************************
1096	Summary:
1097	Variable logical AND command.
1098
1099	Description:
1100	Also called bitwise logic AND, this command ANDs values two
1101	variables and stores the result into another variable.
1102
1103	No additional data is required for this command.
1104
1105	Perform a bitwise logic AND operation of two RDC registers.
1106	bit 31 - 24 = 0xb, opcode
1107	bit 23 - 18 = 0, reserved
1108	bit 17 - 12 = v1, src1
1109	bit 11 - 6 = v2, src2
1110	bit 5 - 0 = v3, dst
1111
1112	Input:
1113	v1 - Source variable
1114	v2 - Source variable
1115	v3 - Destination variable
1116
1117	Output:
1118	Command for RDC list.
1119
1120	See Also:
1121	BRDC_List_Create,
1122	BRDC_List_GetStartAddress_isr
1123	****************************************************************************/
1124	#define BRDC_OP_VAR_AND_VAR_TO_VAR(v1, v2, v3) \
1125	( BRDC_OP_VAR_AND_VAR_TO_VAR_OPCODE \| ((v1)<<12) \| ((v2)<<6) \| (v3) )
1126
1127	/***************************************************************************
1128	Summary:
1129	Variable logical AND with immediate command.
1130
1131	Description:
1132	Also called bitwise logic AND immediate, this command ANDs a value
1133	stored in a variable with a specified immediate value and stores the
1134	result into another variable.
1135
1136	Following this command is the data to use in the AND operation.
1137
1138	Perform a bitwise logic AND operation of a RDC register and an immediate value.
1139	bit 31 - 24 = 0xc, opcode
1140	bit 23 - 18 = 0, reserved
1141	bit 17 - 12 = v1, src
1142	bit 11 - 6 = 0, reserved
1143	bit 5 - 0 = v2, dst
1144
1145	Input:
1146	v1 - Source variable
1147	v2 - Destination variable
1148
1149	Output:
1150	Command for RDC list.
1151
1152	See Also:
1153	BRDC_List_Create,
1154	BRDC_List_GetStartAddress_isr
1155	****************************************************************************/
1156	#define BRDC_OP_VAR_AND_IMM_TO_VAR(v1, v2) \
1157	( BRDC_OP_VAR_AND_IMM_TO_VAR_OPCODE \| ((v1)<<12) \| (v2) )
1158
1159	/***************************************************************************
1160	Summary:
1161	Variable logical OR command.
1162
1163	Description:
1164	Also called bitwise logic OR, this command ORs values from two
1165	variables and stores the result into another variable.
1166
1167	No additional data is required for this command.
1168
1169	Perform a bitwise logic OR operation of two RDC registers.
1170	bit 31 - 24 = 0xd, opcode
1171	bit 23 - 18 = 0, reserved
1172	bit 17 - 12 = v1, src1
1173	bit 11 - 6 = v2, src2
1174	bit 5 - 0 = v3, dst
1175
1176	Input:
1177	v1 - Source variable
1178	v2 - Source variable
1179	v3 - Destination variable
1180
1181	Output:
1182	Command for RDC list.
1183
1184	See Also:
1185	BRDC_List_Create,
1186	BRDC_List_GetStartAddress_isr
1187	****************************************************************************/
1188	#define BRDC_OP_VAR_OR_VAR_TO_VAR(v1, v2, v3) \
1189	( BRDC_OP_VAR_OR_VAR_TO_VAR_OPCODE \| ((v1)<<12) \| ((v2)<<6) \| (v3) )
1190
1191	/***************************************************************************
1192	Summary:
1193	Variable logical OR with immediate command.
1194
1195	Description:
1196	Also called bitwise logic OR immediate, this command ORs a value
1197	stored in a variable with a specified immediate value and stores the
1198	result into another variable.
1199
1200	Following this command is the data to use in the OR operation.
1201
1202	Perform a bitwise logic OR operation of a RDC register and an immediate value.
1203	bit 31 - 24 = 0xe, opcode
1204	bit 23 - 18 = 0, reserved
1205	bit 17 - 12 = v1, src
1206	bit 11 - 6 = 0, reserved
1207	bit 5 - 0 = v2, dst
1208
1209	Input:
1210	v1 - Source variable
1211	v2 - Destination variable
1212
1213	Output:
1214	Command for RDC list.
1215
1216	See Also:
1217	BRDC_List_Create,
1218	BRDC_List_GetStartAddress_isr
1219	****************************************************************************/
1220	#define BRDC_OP_VAR_OR_IMM_TO_VAR(v1, v2) \
1221	( BRDC_OP_VAR_OR_IMM_TO_VAR_OPCODE \| ((v1)<<12) \| (v2) )
1222
1223	/***************************************************************************
1224	Summary:
1225	Variable logical XOR command.
1226
1227	Description:
1228	Also called bitwise logic XOR, this command XORs values from two
1229	variables and stores the result into another variable.
1230
1231	No additional data is required for this command.
1232
1233	Perform a bitwise logic XOR operation of two RDC registers.
1234	bit 31 - 24 = 0xf, opcode
1235	bit 23 - 18 = 0, reserved
1236	bit 17 - 12 = v1, src1
1237	bit 11 - 6 = v2, src2
1238	bit 5 - 0 = v3, dst
1239
1240	Input:
1241	v1 - Source variable
1242	v2 - Source variable
1243	v3 - Destination variable
1244
1245	Output:
1246	Command for RDC list.
1247
1248	See Also:
1249	BRDC_List_Create,
1250	BRDC_List_GetStartAddress_isr
1251	****************************************************************************/
1252	#define BRDC_OP_VAR_XOR_VAR_TO_VAR(v1, v2, v3) \
1253	( BRDC_OP_VAR_XOR_VAR_TO_VAR_OPCODE \| ((v1)<<12) \| ((v2)<<6) \| (v3) )
1254
1255	/***************************************************************************
1256	Summary:
1257	Variable logical XOR with immediate command.
1258
1259	Description:
1260	Also called bitwise logic XOR immediate, this command XORs a value
1261	stored in a variable with a specified immediate value and stores the
1262	result into another variable.
1263
1264	Following this command is the data to use in the XOR operation.
1265
1266	Perform a bitwise logic XOR operation of a RDC register and an immediate value.
1267	bit 31 - 24 = 0x10, opcode
1268	bit 23 - 18 = 0, reserved
1269	bit 17 - 12 = v1, src
1270	bit 11 - 6 = 0, reserved
1271	bit 5 - 0 = v2, dst
1272
1273	Input:
1274	v1 - Source variable
1275	v2 - Destination variable
1276
1277	Output:
1278	Command for RDC list.
1279
1280	See Also:
1281	BRDC_List_Create,
1282	BRDC_List_GetStartAddress_isr
1283	****************************************************************************/
1284	#define BRDC_OP_VAR_XOR_IMM_TO_VAR(v1, v2) \
1285	( BRDC_OP_VAR_XOR_IMM_TO_VAR_OPCODE \| ((v1)<<12) \| (v2) )
1286
1287	/***************************************************************************
1288	Summary:
1289	Variable logical NOT command.
1290
1291	Description:
1292	Also called bitwise logic NOT, this command does a NOT operation on
1293	a variable and stores the result into another variable.
1294
1295	No additional data is required for this command.
1296
1297	Perform a bitwise inverse a RDC register.
1298	bit 31 - 24 = 0x11, opcode
1299	bit 23 - 18 = 0, reserved
1300	bit 17 - 12 = v1, src
1301	bit 11 - 6 = 0, reserved
1302	bit 5 - 0 = v2, dst
1303
1304	Input:
1305	v1 - Source variable
1306	v2 - Destination variable
1307
1308	Output:
1309	Command for RDC list.
1310
1311	See Also:
1312	BRDC_List_Create,
1313	BRDC_List_GetStartAddress_isr
1314	****************************************************************************/
1315	#define BRDC_OP_NOT_VAR_TO_VAR(v1, v2) \
1316	( BRDC_OP_NOT_VAR_TO_VAR_OPCODE \| ((v1)<<12) \| (v2) )
1317
1318	/***************************************************************************
1319	Summary:
1320	Variable rotate right command.
1321
1322	Description:
1323	This command right rotates the bits within a variable and stores
1324	the result into another variable. Values that are shifted off
1325	the LSB will become the bits for the MSB.
1326
1327	No additional data is required for this command.
1328
1329	Rotate a RDC register to the right by the amount specified in the instruction.
1330	Lower significant bits are shifted to the upper significant bits.
1331	bit 31 - 24 = 0x12, opcode
1332	bit 23 = 0, reserved
1333	bit 22 - 18 = rotate, rot
1334	bit 17 - 12 = v1, src
1335	bit 11 - 6 = 0, reserved
1336	bit 5 - 0 = v2, dst
1337
1338	Input:
1339	v1 - Source variable
1340	v2 - Destination variable
1341
1342	Output:
1343	Command for RDC list.
1344
1345	See Also:
1346	BRDC_List_Create,
1347	BRDC_List_GetStartAddress_isr
1348	****************************************************************************/
1349	#define BRDC_OP_VAR_ROR_TO_VAR(v1, rotate, v2) \
1350	( BRDC_OP_VAR_ROR_TO_VAR_OPCODE \| ((rotate)<<18) \| ((v1)<<12) \| (v2) )
1351
1352	/***************************************************************************
1353	Summary:
1354	Variable SUM command.
1355
1356	Description:
1357	This command SUMs values from two variables and stores the result
1358	into another variable.
1359
1360	No additional data is required for this command.
1361
1362	Perform a SUM operation of two RDC registers.
1363	bit 31 - 24 = 0x13, opcode
1364	bit 23 - 18 = 0, reserved
1365	bit 17 - 12 = v1, src1
1366	bit 11 - 6 = v2, src2
1367	bit 5 - 0 = v3, dst
1368
1369	Input:
1370	v1 - Source variable
1371	v2 - Source variable
1372	v3 - Destination variable
1373
1374	Output:
1375	Command for RDC list.
1376
1377	See Also:
1378	BRDC_List_Create,
1379	BRDC_List_GetStartAddress_isr
1380	****************************************************************************/
1381	#define BRDC_OP_VAR_SUM_VAR_TO_VAR(v1, v2, v3) \
1382	( BRDC_OP_VAR_SUM_VAR_TO_VAR_OPCODE \| ((v1)<<12) \| ((v2)<<6) \| (v3) )
1383
1384	/***************************************************************************
1385	Summary:
1386	Variable SUM with immediate command.
1387
1388	Description:
1389	This command SUMs a value stored in a variable with a specified
1390	immediate value and stores the result into another variable.
1391
1392	Following this command is the data to use in the SUM operation.
1393
1394	Perform a SUM operation of a RDC register and an immediate value.
1395	bit 31 - 24 = 0x14, opcode
1396	bit 23 - 18 = 0, reserved
1397	bit 17 - 12 = v1, src
1398	bit 11 - 6 = 0, reserved
1399	bit 5 - 0 = v2, dst
1400
1401	Input:
1402	v1 - Source variable
1403	v2 - Destination variable
1404
1405	Output:
1406	Command for RDC list.
1407
1408	See Also:
1409	BRDC_List_Create,
1410	BRDC_List_GetStartAddress_isr
1411	****************************************************************************/
1412	#define BRDC_OP_VAR_SUM_IMM_TO_VAR(v1, v2) \
1413	( BRDC_OP_VAR_SUM_IMM_TO_VAR_OPCODE \| ((v1)<<12) \| (v2) )
1414
1415	/***************************************************************************
1416	Summary:
1417	Conditional forward skip command.
1418
1419	Description:
1420	Also called conditional forward branch, this command does a forward
1421	branch if the specified general purpose register is non-zero.
1422
1423	Following this command is the amount of address to forward skip to.
1424
1425	Perform a conditional skip
1426	bit 31 - 24 = 0x15, opcode
1427	bit 23 - 18 = 0, reserved
1428	bit 17 - 12 = v, src
1429	bit 11 - 0 = 0, reserved
1430
1431	Input:
1432	v - The variable to read from.
1433
1434	Output:
1435	Command for RDC list.
1436
1437	See Also:
1438	BRDC_REGISTER,
1439	BRDC_List_Create,
1440	BRDC_List_GetStartAddress_isr
1441	****************************************************************************/
1442	#define BRDC_OP_COND_SKIP(v) ( BRDC_OP_COND_SKIP_OPCODE \| ((v)<<12) )
1443
1444	/***************************************************************************
1445	Summary:
1446	Forward skip command.
1447
1448	Description:
1449	Also called forward branch, this command does a forward branch
1450	unconditionally.
1451
1452	Following this command is the amount of address to forward skip to.
1453
1454	Perform an unconditional branch
1455	bit 31 - 24 = 0x16, opcode
1456	bit 23 - 0 = 0, reserved
1457
1458	Output:
1459	Command for RDC list.
1460
1461	See Also:
1462	BRDC_REGISTER,
1463	BRDC_List_Create,
1464	BRDC_List_GetStartAddress_isr
1465	****************************************************************************/
1466	#define BRDC_OP_SKIP() ( BRDC_OP_SKIP_OPCODE )
1467
1468	/***************************************************************************
1469	Summary:
1470	Exit command.
1471
1472	Description:
1473	This command ends RUL execution.
1474
1475	No additional data is required for this command.
1476
1477	Exit RUL execution
1478	bit 31 - 24 = 0x17, opcode
1479	bit 23 - 0 = 0, reserved
1480
1481	Output:
1482	Command for RDC list.
1483
1484	See Also:
1485	BRDC_REGISTER,
1486	BRDC_List_Create,
1487	BRDC_List_GetStartAddress_isr
1488	****************************************************************************/
1489	#define BRDC_OP_EXIT() ( BRDC_OP_EXIT_OPCODE )
1490
1491	/***************************************************************************
1492	Summary:
1493	Maximum number of register blocks used with RDC block out
1494
1495	Description:
1496
1497
1498	See Also:
1499	BRDC_BlockOut
1500	****************************************************************************/
1501	#define BRDC_MAX_RDC_BLOCKOUT_LIST_COUNT 8
1502
1503	/***************************************************************************
1504	Summary:
1505	The handle for the register DMA module.
1506
1507	Description:
1508	This is the main module handle required in order to create command list
1509	or command slots.
1510
1511	See Also:
1512	BRDC_Open
1513	****************************************************************************/
1514	typedef struct BRDC_P_Handle *BRDC_Handle;
1515
1516	/***************************************************************************
1517	Summary:
1518	A handle representing a command slot.
1519
1520	Description:
1521
1522	See Also:
1523	BRDC_Slot_Create
1524	****************************************************************************/
1525	typedef struct BRDC_P_Slot_Handle *BRDC_Slot_Handle;
1526
1527	/***************************************************************************
1528	Summary:
1529	A handle representing a command list.
1530
1531	Description:
1532
1533	See Also:
1534	BRDC_List_Create
1535	****************************************************************************/
1536	typedef struct BRDC_P_List_Handle *BRDC_List_Handle;
1537
1538	/***************************************************************************
1539	Summary:
1540	Data structure describing the information for a block of registers that
1541	will be blocked out during RDMA.
1542
1543	Description:
1544
1545	ulStartRegAddr - the starting register. Use the offset.
1546	ulBlockSize - the register block size
1547	bEnable - if true, block out this register block, else, don't block
1548
1549	See Also:
1550	BRDC_SetRdcBlockOut
1551	BRDC_GetRdcBlockOut
1552	****************************************************************************/
1553	typedef struct
1554	{
1555	uint32_t ulStartRegAddr;
1556	uint32_t ulBlockSize;
1557	bool bEnable;
1558	} BRDC_BlockOut;
1559
1560	/***************************************************************************
1561	Summary:
1562	Data structure descibe the trigger information that are relevant for other
1563	module to use.
1564
1565	Description:
1566	This data structure describes the trigger infomrations. BVDC and upper
1567	level software can use this sturcture to create callback with given
1568	trigger.
1569
1570	See Also:
1571	BRDC_GetTriggerInfo, BRDC_Trigger, BINT_Id
1572	****************************************************************************/
1573	typedef struct
1574	{
1575	/* Trigger enum */
1576	BRDC_Trigger eTrigger;
1577
1578	/* When trigger fire it will also fire this interrupt, and this interrupt id
1579	* is use in according with BINT. */
1580	BINT_Id TrigIntId;
1581
1582	/* Translate into hardware value. This is chip dependence. For internal
1583	* RDC use only. */
1584	uint32_t ulTrigVal;
1585
1586	/* Trigger name string. */
1587	const char *pchTrigName;
1588
1589	} BRDC_TrigInfo;
1590
1591	/***************************************************************************
1592	Summary:
1593	Global Settings for the RDC
1594
1595	Description:
1596	This data structure is used to allow the app to set global settings for
1597	the RDC.
1598
1599	See Also:
1600	BRDC_Open
1601	****************************************************************************/
1602	typedef struct BRDC_Settings
1603	{
1604	/* Intercept function for the BRDC_SetList_isr function */
1605	BERR_Code (*pfnSlot_SetList_Intercept_isr)
1606	(
1607	BRDC_Slot_Handle hSlot,
1608	BRDC_List_Handle hList,
1609	BRDC_Trigger eTrigger
1610	) ;
1611
1612	/* Intercept function for the BRDC_Slot_Execute_isr function */
1613	BERR_Code (*pfnSlot_Execute_Intercept_isr)
1614	(
1615	BRDC_Slot_Handle hSlot,
1616	BRDC_Trigger eTrigger
1617	) ;
1618
1619	/* Intercept function for the BRDC_Slot_ExecuteOnTrigger_isr
1620	function */
1621	BERR_Code (*pfnSlot_ExecuteOnTrigger_Intercept_isr)
1622	(
1623	BRDC_Slot_Handle hSlot,
1624	BRDC_Trigger eRDCTrigger,
1625	bool bRecurring
1626	);
1627	} BRDC_Settings;
1628
1629	/*****************************************************************************
1630	Summary:
1631	Structure for RDC power standby settings
1632
1633	pvStub - Stub holder for future expansion.
1634
1635	See Also:
1636	BRDC_Standby, BRDC_Resume
1637	*****************************************************************************/
1638	typedef struct BRDC_StandbySettings
1639	{
1640	void pvStub; / Stub holder */
1641
1642	} BRDC_StandbySettings;
1643
1644
1645	/***************************************************************************
1646	Summary:
1647	Returns the default settings structure for the module
1648
1649	Description:
1650	The default settings structure is returned by this function to be
1651	passed to BRDC_Open
1652
1653	Returns:
1654	BERR_SUCCESS - Successfully stored the default settings int the
1655	parameter
1656
1657	See Also:
1658	BRDC_Open
1659	****************************************************************************/
1660	BERR_Code BRDC_GetDefaultSettings
1661	( BCHP_Handle hChp, /* [in] Chip handle */
1662	BRDC_Settings pRdcSettings ); / [out] Return default Settings for RDC */
1663
1664	/***************************************************************************
1665	Summary:
1666	Opens the register DMA module.
1667
1668	Description:
1669	This open and initialized the RDMA modules. In addition it also unmask
1670	the BCHP_SUN_GISB_ARB_REQ_MASK_rdc_MASK, which allow RDC to access
1671	registers outside of BVN block.
1672
1673	Returns:
1674	BERR_SUCCESS - Handle was successfully created..
1675	BERR_OUT_OF_SYSTEM_MEMORY - Unable to allocate memory for the handle.
1676
1677	See Also:
1678	BRDC_Close,
1679	BRDC_List_Create.
1680	BRDC_Slot_Create
1681	****************************************************************************/
1682	BERR_Code BRDC_Open
1683	( BRDC_Handle phRdc, / [out] Register DMA handle to be returned. */
1684	BCHP_Handle hChp, /* [in] Chip handle. */
1685	BREG_Handle hReg, /* [in] Register access handle. */
1686	BMEM_Handle hMem, /* [in] Handle to memory heap to use for allocation. */
1687	const BRDC_Settings pRdcSettings ); / [in] Settings for RDC */
1688
1689	/***************************************************************************
1690	Summary:
1691	Closes the register DMA module.
1692
1693	Description:
1694
1695	Returns:
1696	BERR_SUCCESS - Module was successfully closed.
1697	BERR_LEAKED_RESOURCE - Module was closed without freeing all
1698	allocated surface and palette handles.
1699
1700	See Also:
1701	BRDC_Open
1702	****************************************************************************/
1703	BERR_Code BRDC_Close
1704	( BRDC_Handle hRdc ); /* [in] Register DMA handle to close */
1705
1706	/*****************************************************************************
1707	Summary:
1708	Get default standby settings.
1709
1710	See Also:
1711	BRDC_Standby
1712	*****************************************************************************/
1713	void BRDC_GetDefaultStandbySettings
1714	( BRDC_StandbySettings pStandbypSettings ); / [out] Storage for default settings. */
1715
1716	/*****************************************************************************
1717	Summary:
1718	Enter standby mode
1719
1720	Description:
1721	This function enters standby mode with the RDC module, if supported.
1722	The RDC modules. If standby mode is not supported, calling this
1723	function has no effect.
1724
1725	When in standby mode, the device clocks are turned off, resulting in a
1726	minimal power state.
1727
1728	No BRDC_* calls should be made until standby mode is exitted by calling
1729	BRDC_Resume(). Calling BRDC_* api while in standy result in undefined
1730	results.
1731
1732	Returns:
1733	BERR_SUCCESS - If standby is successful, otherwise error
1734
1735	See Also:
1736	BRDC_Resume
1737	*****************************************************************************/
1738	BERR_Code BRDC_Standby
1739	( BRDC_Handle hRdc, /* [in] RDC module handle. */
1740	const BRDC_StandbySettings pStandbypSettings ); / [in] Settings for going into standy mode. */
1741
1742	/*****************************************************************************
1743	Summary:
1744	Exit standby mode
1745
1746	Description:
1747	This function exits from standby mode with the RDC module, if supported.
1748	After exitting standby mode, upper-level SW is free to call
1749	BRDC_* functions.
1750
1751	Returns:
1752	BERR_SUCCESS - If standby is successful, otherwise error
1753
1754	See Also:
1755	BRDC_Standby
1756	*****************************************************************************/
1757	BERR_Code BRDC_Resume
1758	( BRDC_Handle hRdc ); /* [in] RDC module handle. */
1759
1760	/***************************************************************************
1761	Summary:
1762	Get a scratch register
1763
1764	Description:
1765	There are a pool of scratch registers available in RDC module. The scratch
1766	registers can be used by RUL to temporarily store information in middle
1767	of RUL operation or double buffer some information across RUL events.
1768	This function gets hold of an RDC scratch register.
1769
1770	Inputs:
1771	hRdc - RDC handle;
1772
1773	Outputs:
1774
1775	Returns:
1776	This function returns the address of an RDC scratch register.
1777	A zero address will be returned if no available RDC scratch register.
1778
1779	See Also:
1780	BRDC_FreeScratchReg.
1781	****************************************************************************/
1782	uint32_t BRDC_AllocScratchReg
1783	( BRDC_Handle hRdc ); /* [in] Register DMA handle to get scratch register */
1784
1785	/***************************************************************************
1786	Summary:
1787	return a scratch register back to RDC's pool
1788
1789	Description:
1790	There are a pool of scratch registers available in RDC module. The scratch
1791	registers can be used by RUL to temporarily store information in middle
1792	of RUL operation or double buffer some information across RUL events.
1793	This function frees an RDC scratch register back to the pool.
1794
1795	Inputs:
1796	hRdc - RDC handle;
1797	ulReg - to-be-freed scratch register address;
1798
1799	Outputs:
1800
1801	Returns:
1802	BERR_SUCCESS if the scratch register is successully freed to the pool.
1803	BERR_INVALID_PARAMETER will be returned if ulReg is not a RDC scratch
1804	register.
1805
1806	See Also:
1807	BRDC_AllocScratchReg.
1808	****************************************************************************/
1809	BERR_Code BRDC_FreeScratchReg
1810	( BRDC_Handle hRdc, /* [in] Register DMA handle to get scratch register */
1811	uint32_t ulReg );/* [in] Address of the to-be-freed scratch register */
1812
1813	/***************************************************************************
1814	Summary:
1815	Enables same trigger.
1816
1817	Description:
1818	Multiple slots using the same trigger are executed before any slots with a
1819	different trigger when enabled. Slots are executed without regard for
1820	which trigger was fired otherwise.
1821
1822	Slot 0 has highest priority. Slot 31 has lowest priority.
1823
1824	Trigger 0 has highest priority. Trigger 20 has lowest priority.
1825
1826	Returns:
1827
1828	See Also:
1829	BRDC_Trigger_Execute_isr
1830	BRDC_Slot_ExecuteOnTrigger_isr
1831	BRDC_Slot_Execute_isr
1832	****************************************************************************/
1833	BERR_Code BRDC_EnableSameTrigger_isr
1834	( BRDC_Handle hRdc,
1835	bool bEnable );
1836
1837	/***************************************************************************
1838	Summary:
1839	Set combine trigger mode.
1840
1841	Description:
1842
1843	Returns:
1844
1845	See Also:
1846	BRDC_Trigger
1847	BRDC_CombMode
1848	****************************************************************************/
1849	BERR_Code BRDC_SetComboTrigMode_isr
1850	( BRDC_Handle hRdc,
1851	BRDC_Trigger eComboTrig,
1852	BRDC_ComboTrigMode eMode );
1853
1854	/***************************************************************************
1855	*
1856	*/
1857	BERR_Code BRDC_SetComboTriggers_isr
1858	( BRDC_Handle hRdc,
1859	BRDC_Trigger eComboTrig,
1860	uint32_t ulTriggersMask );
1861
1862	/***************************************************************************
1863	Summary:
1864	Sets a register range to be blocked out during RDMA.
1865
1866	Description:
1867	If any of the registers specified by this range is part of an RUL during
1868	RDMA, these registers will be excluded from the RUL if enabled. If disabled,
1869	these registers will be included in the RUL.
1870
1871	Inputs:
1872	hRdc - the RDC handle
1873	pstBlockOut - the register block with the enable/disable info.
1874	ulRegBlock - identifies this register block. A max of 8 blocks are allowed.
1875	The first block id is 0, the last is 7.
1876	Returns:
1877
1878	See Also:
1879	BRDC_GetRdcBlockOut
1880	BRDC_BlockOut
1881	****************************************************************************/
1882	BERR_Code BRDC_SetRdcBlockOut
1883	( BRDC_Handle hRdc,
1884	const BRDC_BlockOut *pstBlockOut,
1885	uint32_t ulRegBlock );
1886
1887	/***************************************************************************
1888	Summary:
1889	Gets a register range that is blocked out during RDMA.
1890
1891	Description:
1892	If any of the registers specified by this range is part of an RUL during
1893	RDMA, these registers will be excluded from the RUL if enabled. If disabled,
1894	these registers will be included in the RUL.
1895
1896	Inputs:
1897	hRdc - the RDC handle
1898	ulRegBlock - identifies this register block. A max of 8 blocks are allowed.
1899	The first block id is 0, the last is 7.
1900
1901	Outputs:
1902	pstBlockOut - the register block with the enable/disable info.
1903
1904	Returns:
1905
1906	See Also:
1907	BRDC_SetRdcBlockOut
1908	BRDC_BlockOut
1909	****************************************************************************/
1910	BERR_Code BRDC_GetRdcBlockOut
1911	( BRDC_Handle hRdc,
1912	BRDC_BlockOut *pstBlockOut,
1913	uint32_t ulRegBlock );
1914
1915	/***************************************************************************
1916	Summary:
1917	Activates multiple slots on a trigger
1918
1919	Description:
1920	Multiple slots using the trigger are executed when a specific trigger fires.
1921
1922	If you want to execute a slot with a trigger call BRDC_Slot_ExecuteOnTrigger_isr.
1923
1924	If you want to execute a slot immediately without a trigger call
1925	BRDC_Slot_Execute_isr instead.
1926
1927	Returns:
1928
1929	See Also:
1930	BRDC_Slot_ExecuteOnTrigger_isr
1931	BRDC_Slot_Execute_isr
1932	****************************************************************************/
1933	BERR_Code BRDC_Trigger_Execute_isr
1934	( BRDC_Handle hRdc, /* [in] RDC module handle */
1935	BRDC_Trigger eRDCTrigger ); /* [in] The trigger used to fire the slot */
1936
1937	/***************************************************************************
1938	Summary:
1939	Get trigger information
1940
1941	Description:
1942	This function return the information of a given trigger enum. Information
1943	included but not limitied to trigger's bint id and name. On chipset
1944	that does not include eRDCTrigger a NULL pointer will be return.
1945
1946	Returns:
1947	pointer to (BRDC_TrigInfo*) eRDCTrigger's information. NULL if error,
1948	invalid trigger, or trigger not supported.
1949
1950	See Also:
1951	BRDC_TrigInfo.
1952	****************************************************************************/
1953	const BRDC_TrigInfo* BRDC_Trigger_GetInfo
1954	( BRDC_Handle hRdc, /* [in] RDC module handle */
1955	BRDC_Trigger eRDCTrigger ); /* [in] The trigger used to fire the slot */
1956
1957	/***************************************************************************
1958	Summary:
1959	Creates a list to contain RDC commands and data.
1960
1961	Description:
1962	This is the object used to store commands to be issued.
1963
1964	Users are required to allocate a list using this function, use the
1965	function BRDC_List_GetStartAddress_isr to get a pointer to the data within the
1966	list, store BRDC_OP commands and data within the list, and then
1967	specify the number of command/data entries in the list with a call to
1968	BRDC_List_SetNumEntries_isr.
1969
1970	Each command is a 32-bit value. Some commands have 1 or more additional
1971	32-bit values that must be stored after the command in a very specific
1972	order. For more information about BRDC_OP commands, see their
1973	individual desciption.
1974
1975	Once a list is created, it needs to be placed into a slot and then
1976	issued. See BRDC_Slot_Create for more information.
1977
1978	Returns:
1979
1980	See Also:
1981	BRDC_Open,
1982	BRDC_List_GetStartAddress_isr,
1983	BRDC_Slot_Create,
1984	BRDC_List_Destroy,
1985	BRDC_List_GetMaxEntries_isr,
1986	BRDC_REGISTER,
1987	BRDC_OP_NOP,
1988	BRDC_OP_IMM_TO_REG,
1989	BRDC_OP_VAR_TO_REG,
1990	BRDC_OP_REG_TO_VAR,
1991	BRDC_OP_IMM_TO_VAR,
1992	BRDC_OP_IMMS_TO_REG,
1993	BRDC_OP_BLOCK_IMMS_TO_REGS,
1994	BRDC_OP_REG_TO_REG_BLOCK,
1995	BRDC_OP_REGS_TO_REGS,
1996	BRDC_OP_REG_TO_REGS,
1997	BRDC_OP_REGS_TO_REG,
1998	BRDC_OP_VAR_AND_VAR_TO_VAR,
1999	BRDC_OP_VAR_AND_IMM_TO_VAR,
2000	BRDC_OP_VAR_OR_VAR_TO_VAR,
2001	BRDC_OP_VAR_OR_IMM_TO_VAR,
2002	BRDC_OP_VAR_XOR_VAR_TO_VAR,
2003	BRDC_OP_VAR_XOR_IMM_TO_VAR,
2004	BRDC_OP_NOT_VAR_TO_VAR,
2005	BRDC_OP_VAR_ROR_TO_VAR
2006	****************************************************************************/
2007	BERR_Code BRDC_List_Create
2008	( BRDC_Handle hRdc, /* [in] The handle to the RDC. */
2009	uint32_t ulMaxEntries, /* [in] The size of the list to allocate. */
2010	BRDC_List_Handle phList ); / [out] The allocated list. */
2011
2012	/***************************************************************************
2013	Summary:
2014	Destroys a list.
2015
2016	Description:
2017	This command will fail if the list is currently assigned to a
2018	slot.
2019
2020	Returns:
2021
2022	See Also:
2023	BRDC_List_Create,
2024	BRDC_Slot_SetList_isr
2025	****************************************************************************/
2026	BERR_Code BRDC_List_Destroy
2027	( BRDC_List_Handle hList ); /* [in] The list to destroy */
2028
2029	/***************************************************************************
2030	Summary:
2031	Returns the address of an allocated list.
2032
2033	Description:
2034	Once a list is created, the user must fill it with appropriate entries
2035	before it can be used. This function gives the user a pointer to the
2036	allocated list memory so that it can be modified.
2037
2038	Returns:
2039	The address of the list.
2040
2041	See Also:
2042	BRDC_List_Create
2043	BRDC_List_GetStartCachedAddress_isr
2044	****************************************************************************/
2045	uint32_t *BRDC_List_GetStartAddress_isr
2046	( BRDC_List_Handle hList ); /* [in] The list to use. */
2047
2048	/***************************************************************************
2049	Summary:
2050	Returns the cached address of an allocated list at isr.
2051
2052	Description:
2053	Once a list is created, the user must fill it with appropriate entries
2054	before it can be used. This function gives the user a pointer to the
2055	allocated list memory so that it can be modified.
2056
2057	Returns:
2058	The address of the list.
2059
2060	See Also:
2061	BRDC_List_Create
2062	BRDC_List_GetStartAddress_isr
2063	****************************************************************************/
2064	uint32_t *BRDC_List_GetStartCachedAddress_isr
2065	( BRDC_List_Handle hList ); /* [in] The list to use. */
2066
2067	/***************************************************************************
2068	Summary:
2069	Sets the list count.
2070
2071	Description:
2072	When a list is filled with commands an data. The user must set the
2073	number of entries that are in the list before assigning it to a slot.
2074
2075	If the number of entries exceeds the maximum number of entries
2076	specified when the list was created, an error will result.
2077
2078	Returns:
2079
2080	See Also:
2081	BRDC_List_Create
2082	BRDC_Slot_SetList_isr
2083	BRDC_List_GetNumEntries_isr
2084	BRDC_List_GetMaxEntries_isr
2085	BRDC_List_GetNumEntries_isr
2086	BRDC_List_SetNumEntries_isr
2087	****************************************************************************/
2088	BERR_Code BRDC_List_SetNumEntries_isr
2089	( BRDC_List_Handle hList, /* [in] List to set. */
2090	uint32_t ulNumEntries ); /* [in] The number of valid entries in a list. */
2091
2092	/***************************************************************************
2093	Summary:
2094	Gets the number of entries in the list
2095
2096	Description:
2097
2098	Returns:
2099
2100	See Also:
2101	BRDC_List_Create
2102	BRDC_Slot_SetList_isr
2103	BRDC_List_GetMaxEntries_isr
2104	BRDC_List_SetNumEntries_isr
2105	BRDC_List_SetNumEntries_isr
2106	BRDC_List_GetNumEntries_isr
2107	****************************************************************************/
2108	BERR_Code BRDC_List_GetNumEntries_isr
2109	( BRDC_List_Handle hList, /* [in] List to get the number of entries from. */
2110	uint32_t pulNumEntries ); / [out] The number of valid entries in the list */
2111
2112	/***************************************************************************
2113	Summary:
2114	Gets the maximum number of entries in the list
2115
2116	Description:
2117
2118	Returns:
2119
2120	See Also:
2121	BRDC_List_Create
2122	BRDC_Slot_SetList_isr
2123	BRDC_List_SetNumEntries_isr
2124	****************************************************************************/
2125	BERR_Code BRDC_List_GetMaxEntries_isr
2126	( BRDC_List_Handle hList, /* [in] List to get the number
2127	of entries from. */
2128	uint32_t pulMaxEntries ); / [out] The maximum number of entries in the list */
2129
2130	/***************************************************************************
2131	Summary:
2132	Get the status of list execution
2133
2134	Description:
2135	Get the status of the list if it last executed with last slot assignment.
2136	Need to call BRDC_Slot_UpdateLastRulStatus_isr with the last Slot
2137	assignment.
2138
2139	Returns:
2140	true if the list was executed last time setting to a slot. false otherwise.
2141
2142	See Also:
2143	BRDC_Slot_SetList_isr
2144	BRDC_Slot_UpdateLastRulStatus_isr
2145	****************************************************************************/
2146	bool BRDC_List_GetLastExecStatus_isr
2147	( BRDC_List_Handle hList ); /* [in] List to set. */
2148
2149	/***************************************************************************
2150	Summary:
2151	Creates a slot.
2152
2153	Description:
2154	Allocates a hardware slot used to store lists. When allocated this
2155	prevents any other module from using the same slot.
2156
2157	Since this slot is allocated, all slots that are needed by a module
2158	should be created when the using module is first opened.
2159
2160	Returns:
2161
2162	See Also:
2163	BRDC_Open
2164	****************************************************************************/
2165	BERR_Code BRDC_Slot_Create
2166	( BRDC_Handle hRdc, /* [in] The RDC handle. */
2167	BRDC_Slot_Handle phSlot ); / [out] The returned slot. */
2168
2169	/***************************************************************************
2170	Summary:
2171	Destroys the slot.
2172
2173	Description:
2174	If the slot is still active in hardware, this function will first
2175	deactivate the slot before freeing the data structure. Because of
2176	this added check, one should first destroy the slot then destroy
2177	any lists contained within the slot.
2178
2179	Returns:
2180
2181	See Also:
2182	BRDC_Slot_Create
2183	****************************************************************************/
2184	BERR_Code BRDC_Slot_Destroy
2185	( BRDC_Slot_Handle hSlot ); /* [in] The list to destroy.*/
2186
2187	/***************************************************************************
2188	Summary:
2189	Gets the ID of a specific slot.
2190
2191	Description:
2192	This function returns the ID of the slot which can be used to determine
2193	the exact set of registers used by this slot. One use of this information
2194	is to trigger a slot directly within another active list using register
2195	write commands.
2196
2197	See Also:
2198	BRDC_Slot_Create
2199	****************************************************************************/
2200	BERR_Code BRDC_Slot_GetId
2201	( BRDC_Slot_Handle hSlot, /* [in] The slot to get the ID from */
2202	BRDC_SlotId pSlotId ); / [out] Returned slot ID.*/
2203
2204	/***************************************************************************
2205	Summary:
2206	Returns the list handle stored in a specific slot.
2207
2208	Description:
2209	The list assigned to a current slot is returned. This will be NULL
2210	if no list handle was assigned.
2211
2212	Returns:
2213
2214	See Also:
2215	BRDC_Slot_SetList_isr
2216	BRDC_Slot_SetCachedList_isr
2217	****************************************************************************/
2218	BERR_Code BRDC_Slot_GetList_isr
2219	( BRDC_Slot_Handle hSlot, /* [in] The slot to hold the list */
2220	BRDC_List_Handle phList );/ [out] List to store. */
2221
2222	/***************************************************************************
2223	Summary:
2224	Stores a list into a specific slot. This function updates the RUL
2225	address and RUL count for the slot at isr.
2226
2227	Description:
2228	In order to activate a list, it must first be put into an allocated
2229	slot. This function does this task.
2230
2231	A list may be assigned to more than one slot.
2232
2233	Returns:
2234
2235	See Also:
2236	BRDC_Slot_Create
2237	****************************************************************************/
2238	BERR_Code BRDC_Slot_SetList_isr
2239	( BRDC_Slot_Handle hSlot, /* [in] The slot to hold the list */
2240	BRDC_List_Handle hList ); /* [in] List to store. */
2241
2242	/***************************************************************************
2243	Summary:
2244	Stores a list into dual slots This function updates the RUL
2245	address and RUL count for the slots at isr.
2246
2247	Description:
2248	In order to activate a list, it must first be put into an allocated
2249	slot. This function does this task.
2250
2251	A list may be assigned to more than one slot.
2252
2253	Returns:
2254
2255	See Also:
2256	BRDC_Slot_Create
2257	****************************************************************************/
2258	BERR_Code BRDC_Slot_SetListDual_isr
2259	( BRDC_Slot_Handle hSlot1, /* [in] The 1st slot to hold the list */
2260	BRDC_Slot_Handle hSlot2, /* [in] The 2nd slot to hold the list */
2261	BRDC_List_Handle hList ); /* [in] List to store. */
2262
2263	/***************************************************************************
2264	Summary:
2265	Stores a list into a specific slot. This function updates the RUL
2266	address and RUL count for the slot at isr.
2267
2268	Description:
2269	In order to activate a list, it must first be put into an allocated
2270	slot. This function does this task.
2271
2272	A list may be assigned to more than one slot.
2273
2274	Returns:
2275
2276	See Also:
2277	BRDC_Slot_Create
2278	BRDC_List_GetCachedAddress_isr
2279	****************************************************************************/
2280	BERR_Code BRDC_Slot_SetCachedList_isr
2281	( BRDC_Slot_Handle hSlot, /* [in] The slot to hold the list */
2282	BRDC_List_Handle hList ); /* [in] List to store. */
2283
2284	/***************************************************************************
2285	Summary:
2286	Stores a list into two slots. This function updates the RUL
2287	address and RUL count for the slots at isr.
2288
2289	Description:
2290	In order to activate a list, it must first be put into an allocated
2291	slot. This function does this task.
2292
2293	A list may be assigned to more than one slot.
2294
2295	Returns:
2296
2297	See Also:
2298	BRDC_Slot_Create
2299	BRDC_List_GetCachedAddress_isr
2300	****************************************************************************/
2301	BERR_Code BRDC_Slot_SetCachedListDual_isr
2302	( BRDC_Slot_Handle hSlot1, /* [in] The slot to hold the list */
2303	BRDC_Slot_Handle hSlot2, /* [in] The slot to hold the list */
2304	BRDC_List_Handle hList ); /* [in] List to store. */
2305
2306	/***************************************************************************
2307	Summary:
2308	Activates a slot on a trigger at isr.
2309
2310	Description:
2311	The slot is given to hardware and is allowed to fire on a specific
2312	trigger.
2313
2314	If bRecurring is true, the slot will be activated each time
2315	the trigger fires. If bRecurring is false, the slot will fire only the
2316	first time the trigger fires.
2317
2318	A level 2 interrupt will fire when the slot has completed. See level 2
2319	interrupt on how to service the interrupt appropriately.
2320
2321	While the trigger to be used is specified in the RDC register set, the
2322	configuration of those triggers (when they fire) is configured in
2323	the software module that controls the source of the trigger. Those
2324	modules must be active and running before those triggers can fire.
2325
2326	If you want to execute a slot immediately without a trigger call
2327	BRDC_Slot_Execute_isr instead.
2328
2329	Returns:
2330
2331	See Also:
2332	BRDC_Slot_Create,
2333	****************************************************************************/
2334	BERR_Code BRDC_Slot_ExecuteOnTrigger_isr
2335	( BRDC_Slot_Handle hSlot, /* [in] The slot to activate. */
2336	BRDC_Trigger eRDCTrigger, /* [in] The trigger used to fire the slot. */
2337	bool bRecurring ); /* [in] Whether to allow multiple firings
2338	of the trigger to execute the slot
2339	repeatedly. */
2340
2341	/***************************************************************************
2342	Summary:
2343	Executes a slot manually at isr.
2344
2345	Description:
2346	Slot is executed once and immediately.
2347
2348	If you want to execute a slot on a trigger, use
2349	BRDC_Slot_ExecuteOnTrigger_isr instead.
2350
2351	Returns:
2352
2353	See Also:
2354	BRDC_Slot_Create,
2355	BRDC_Slot_ExecuteOnTrigger_isr
2356	****************************************************************************/
2357	BERR_Code BRDC_Slot_Execute_isr
2358	( BRDC_Slot_Handle hSlot ); /* [in] The slot to execute. */
2359
2360	/***************************************************************************
2361	Summary:
2362	Disables a slots execution at isr.
2363
2364	Description:
2365	Prevents a slot from further execution.
2366
2367	This function is only necessary when a slot has been executed
2368	with BRDC_Slot_ExecuteOnTrigger_isr in recurring mode.
2369
2370	Returns:
2371
2372	See Also:
2373	BRDC_Slot_Create,
2374	BRDC_Slot_ExecuteOnTrigger_isr
2375	****************************************************************************/
2376	BERR_Code BRDC_Slot_Disable_isr
2377	( BRDC_Slot_Handle hSlot ); /* [in] The slot to disable.*/
2378
2379	/***************************************************************************
2380	Summary:
2381	Get the interrupt id of this slot.
2382
2383	Description:
2384	This function return the interrupt id of this slot. Use this id to
2385	create callback. The interrupt will fire when the slot execution
2386	is done.
2387
2388	Returns:
2389
2390	See Also:
2391	****************************************************************************/
2392	BINT_Id BRDC_Slot_GetIntId
2393	( const BRDC_Slot_Handle hSlot ); /* [in] The slot to get the int id.*/
2394
2395	/***************************************************************************
2396	Summary:
2397	Update the status of last executed RUL.
2398
2399	Description:
2400	This function update the status of last assigned RUL has been executed
2401	or not. In addition it will store that information in a given list.
2402
2403	Returns:
2404	true - if slot was last executed with the last list assignment.
2405	false - the last list assignment did not execute.
2406
2407	See Also:
2408	BRDC_List_GetLastExecStatus_isr
2409	****************************************************************************/
2410	bool BRDC_Slot_UpdateLastRulStatus_isr
2411	( BRDC_Slot_Handle hSlot, /* [in] The slot to update the status. */
2412	BRDC_List_Handle hList, /* [in] The list to update the status. */
2413	bool bEnableTracking ); /[in] Enable tracking for this slot /
2414
2415	/***************************************************************************
2416	* This function program RUL to config the length of the RUL;
2417	*/
2418	BERR_Code BRDC_Slot_RulConfigRulSize_isr
2419	( BRDC_Slot_Handle hSlot,
2420	BRDC_List_Handle hList,
2421	uint32_t ulCount );
2422
2423	/***************** Chained RUL programming *****************************/
2424	/***************************************************************************
2425	* This function program RUL to config the slave slot trigger;
2426	*/
2427	BERR_Code BRDC_Slot_RulConfigSlaveTrigger_isr
2428	( BRDC_Slot_Handle hSlot,
2429	BRDC_Slot_Handle hSlotSlave,
2430	BRDC_List_Handle hList,
2431	BRDC_Trigger eRDCTrigger,
2432	bool bRecurring );
2433
2434	/***************************************************************************
2435	* This function program previous RUL to config the length of the next RUL;
2436	*/
2437	BERR_Code BRDC_Slot_RulConfigCount_isr
2438	( BRDC_Slot_Handle hSlot,
2439	uint32_t ulCount );
2440
2441	/***************************************************************************
2442	* This function build RUL to program slot descriptor to point to the
2443	* next slave RUL address;
2444	*/
2445	uint32_t BRDC_Slot_RulSetNextAddr_isr
2446	( BRDC_Slot_Handle hSlot,
2447	BRDC_List_Handle hList );
2448
2449	/***************************************************************************
2450	* This function build the master RUL to program the slave slot to point to
2451	* the head of the slave RULs
2452	*/
2453	BERR_Code BRDC_List_RulSetSlaveListHead_isr
2454	( BRDC_List_Handle hList,
2455	BRDC_Slot_Handle hSlotSlave,
2456	BRDC_List_Handle hListSlave );
2457
2458	/***************************************************************************
2459	* This function build the tail of the chained slave-RULs:
2460	* it simply disable the slave slot itself;
2461	*/
2462	BERR_Code BRDC_Slot_RulConfigSlaveListTail_isr
2463	( BRDC_Slot_Handle hSlot,
2464	BRDC_List_Handle hList );
2465
2466	/***************************************************************************
2467	* This function flushes the cached list;
2468	*/
2469	BERR_Code BRDC_Slot_FlushCachedList_isr
2470	( BRDC_Slot_Handle hSlot,
2471	BRDC_List_Handle hList );
2472
2473	/***************************************************************************
2474	* This function returns the timer snapshot for the slot
2475	*/
2476	uint32_t BRDC_Slot_GetTimerSnapshot_isr
2477	( BRDC_Slot_Handle hSlot );
2478
2479	#ifdef __cplusplus
2480	}
2481	#endif
2482
2483	#endif /* #ifndef BRDC_H__ */
2484
2485	/* end of file */

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