| 1 | |
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| 2 | /*************************************************************************** |
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| 3 | * Copyright (c) 2003-2012, Broadcom Corporation |
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| 4 | * All Rights Reserved |
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| 5 | * Confidential Property of Broadcom Corporation |
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| 6 | * |
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| 7 | * THIS SOFTWARE MAY ONLY BE USED SUBJECT TO AN EXECUTED SOFTWARE LICENSE |
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| 8 | * AGREEMENT BETWEEN THE USER AND BROADCOM. YOU HAVE NO RIGHT TO USE OR |
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| 9 | * EXPLOIT THIS MATERIAL EXCEPT SUBJECT TO THE TERMS OF SUCH AN AGREEMENT. |
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| 10 | * |
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| 11 | * $brcm_Workfile: bvbi_a656.c $ |
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| 12 | * $brcm_Revision: Hydra_Software_Devel/7 $ |
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| 13 | * $brcm_Date: 2/20/12 2:53p $ |
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| 14 | * |
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| 15 | * Module Description: |
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| 16 | * |
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| 17 | * This module provides access to the ANCI_656 cores for the VBI porting |
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| 18 | * interface (BVBI). This module is private to BVBI. |
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| 19 | * |
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| 20 | * Revision History: |
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| 21 | * |
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| 22 | * $brcm_Log: /magnum/portinginterface/vbi/7420/bvbi_a656.c $ |
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| 23 | * |
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| 24 | * Hydra_Software_Devel/7 2/20/12 2:53p darnstein |
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| 25 | * SW7425-2434: more detail in error messages. |
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| 26 | * |
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| 27 | * Hydra_Software_Devel/6 2/20/12 12:56p darnstein |
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| 28 | * SW7425-2434: when an unsupported video format is entered, the BDBG |
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| 29 | * error message should be informative. |
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| 30 | * |
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| 31 | * Hydra_Software_Devel/5 10/1/10 2:35p darnstein |
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| 32 | * SW7422-46: Adapt to 7422 and 7425 chipsets. |
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| 33 | * |
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| 34 | * Hydra_Software_Devel/4 12/21/09 6:58p darnstein |
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| 35 | * SW7550-120: Add support for SECAM variants. |
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| 36 | * |
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| 37 | * Hydra_Software_Devel/3 12/5/08 11:14a darnstein |
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| 38 | * PR45819: register names were all wrong. |
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| 39 | * |
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| 40 | * Hydra_Software_Devel/2 12/4/08 6:07p darnstein |
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| 41 | * PR45819: 7420 software will now compile, but not link. |
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| 42 | * |
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| 43 | * Hydra_Software_Devel/1 12/3/08 8:56p darnstein |
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| 44 | * PR45819: copied over from 7400 area. |
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| 45 | * |
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| 46 | * Hydra_Software_Devel/2 12/3/08 7:56p darnstein |
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| 47 | * PR45819: New, more modular form of most BVBI source files. |
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| 48 | * |
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| 49 | * Hydra_Software_Devel/12 10/10/07 4:00p darnstein |
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| 50 | * PR35440: handle ancillary VEC and passthrough VEC in the same fashion. |
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| 51 | * Since there is already a #define macro for modular VEC, this seems |
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| 52 | * more graceful than before. |
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| 53 | * |
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| 54 | * Hydra_Software_Devel/11 2/26/07 2:28p darnstein |
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| 55 | * PR25990: Some minor changes were required for compiling on 7400-B0. |
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| 56 | * |
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| 57 | * Hydra_Software_Devel/10 1/2/07 4:20p darnstein |
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| 58 | * PR26872: Mechanically add SECAM to all cases where PAL formats are |
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| 59 | * accepted. |
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| 60 | * |
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| 61 | * Hydra_Software_Devel/9 12/14/06 7:19p darnstein |
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| 62 | * PR25990: Can compile for BCM97400-B0 now. |
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| 63 | * |
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| 64 | * Hydra_Software_Devel/8 7/20/06 2:22p darnstein |
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| 65 | * PR21688: Use the new hardware soft reset scheme for later model chips. |
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| 66 | * |
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| 67 | * Hydra_Software_Devel/7 4/12/06 1:56p darnstein |
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| 68 | * PR18010: Add ANCI656_PRIM_ANCI656_CNTRL setting to the PR18010 |
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| 69 | * backwards compatibility option. |
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| 70 | * |
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| 71 | * Hydra_Software_Devel/6 9/23/05 2:47p darnstein |
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| 72 | * PR13750: Proper use of BERR_TRACE and BERR_CODEs. |
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| 73 | * |
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| 74 | * Hydra_Software_Devel/5 8/22/05 8:11p darnstein |
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| 75 | * PR16057: To support many different chips, use private #defines that |
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| 76 | * specify number of VECs, VDECs, and (separately) pass-through VECs. |
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| 77 | * |
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| 78 | * Hydra_Software_Devel/4 8/8/05 3:07p darnstein |
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| 79 | * PR16057: Avoid non-existent cores on BCM97401 chip. |
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| 80 | * |
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| 81 | * Hydra_Software_Devel/3 3/17/05 6:05p darnstein |
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| 82 | * PR 14472: Eliminate references to secondary VEC if chip is 3560. |
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| 83 | * |
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| 84 | * Hydra_Software_Devel/2 3/14/05 4:16p darnstein |
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| 85 | * PR 14382: Code DCount value according to D. Perrier, for SMPTE 291M |
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| 86 | * format. |
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| 87 | * |
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| 88 | * Hydra_Software_Devel/1 7/21/04 2:39p darnstein |
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| 89 | * PR9080: Finish merging ITU-R 656 software to main branch. |
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| 90 | * |
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| 91 | * I656/2 7/15/04 5:53p darnstein |
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| 92 | * Allow choice of sdid field in ancillary data packets written out. Try |
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| 93 | * to get dcount field right too. |
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| 94 | * |
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| 95 | * I656/1 6/25/04 3:24p darnstein |
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| 96 | * Initial version. |
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| 97 | * |
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| 98 | ***************************************************************************/ |
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| 99 | |
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| 100 | #include "bstd.h" /* standard types */ |
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| 101 | #include "bdbg.h" /* Dbglib */ |
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| 102 | #include "bvbi.h" /* VBI processing, this module. */ |
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| 103 | #include "bvbi_priv.h" /* VBI internal data structures */ |
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| 104 | |
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| 105 | #if (BVBI_P_NUM_ANCI656_656 > 0) /** { **/ |
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| 106 | |
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| 107 | #include "bchp_anci656_ancil_0.h" /* RDB info for ANCI_656_656 registers */ |
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| 108 | #if (BVBI_P_NUM_ANCI656_656 >= 2) |
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| 109 | #include "bchp_anci656_ancil_1.h" |
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| 110 | #endif |
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| 111 | |
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| 112 | BDBG_MODULE(BVBI); |
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| 113 | |
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| 114 | /*************************************************************************** |
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| 115 | * Forward declarations of static (private) functions |
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| 116 | ***************************************************************************/ |
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| 117 | static void BVBI_P_A656_Enc_Init (BREG_Handle hReg); |
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| 118 | static uint32_t P_GetCoreOffset (uint8_t hwCoreIndex); |
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| 119 | |
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| 120 | |
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| 121 | /*************************************************************************** |
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| 122 | * Implementation of "BVBI_" API functions |
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| 123 | ***************************************************************************/ |
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| 124 | |
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| 125 | |
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| 126 | /*************************************************************************** |
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| 127 | * Implementation of supporting VBI_ENC functions that are not in API |
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| 128 | ***************************************************************************/ |
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| 129 | |
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| 130 | |
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| 131 | BERR_Code BVBI_P_A656_Init( BVBI_P_Handle *pVbi ) |
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| 132 | { |
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| 133 | BDBG_ENTER(BVBI_P_A656_Init); |
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| 134 | |
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| 135 | /* Initialize ANCI656 cores */ |
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| 136 | BVBI_P_A656_Enc_Init (pVbi->hReg); |
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| 137 | |
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| 138 | BDBG_LEAVE(BVBI_P_A656_Init); |
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| 139 | return BERR_SUCCESS; |
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| 140 | } |
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| 141 | |
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| 142 | |
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| 143 | BERR_Code BVBI_P_A656_Enc_Program ( |
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| 144 | BREG_Handle hReg, |
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| 145 | uint8_t hwCoreIndex, |
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| 146 | BVBI_P_Encode_656_Options* h656options, |
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| 147 | bool bPR18010_bad_line_number, |
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| 148 | BFMT_VideoFmt eVideoFormat) |
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| 149 | { |
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| 150 | /* |
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| 151 | Programming note: the implementation here assumes that the bitfield layout |
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| 152 | within registers is the same for all ANCI656 cores in the chip. |
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| 153 | |
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| 154 | If a chip is built that has multiple ANCI656 encoder cores that are not |
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| 155 | identical, then this routine will have to be redesigned. |
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| 156 | */ |
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| 157 | uint32_t ulCoreOffset; |
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| 158 | uint32_t ulReg; |
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| 159 | uint8_t sdid; |
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| 160 | uint8_t dcountCC; |
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| 161 | uint8_t dcountTT; |
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| 162 | uint8_t dcountWSS; |
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| 163 | bool isPal; |
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| 164 | |
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| 165 | BDBG_ENTER(BVBI_P_A656_Enc_Program); |
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| 166 | |
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| 167 | /* Figure out which encoder core to use */ |
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| 168 | ulCoreOffset = P_GetCoreOffset (hwCoreIndex); |
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| 169 | if (ulCoreOffset == 0xFFFFFFFF) |
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| 170 | { |
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| 171 | /* This should never happen! This parameter was checked by |
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| 172 | BVBI_Encode_Create() */ |
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| 173 | BDBG_LEAVE(BVBI_P_A656_Enc_Program); |
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| 174 | return BERR_TRACE (BERR_INVALID_PARAMETER); |
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| 175 | } |
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| 176 | |
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| 177 | /* Determine whether PAL or NTSC. The hardware can only handle straight |
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| 178 | PAL or NTSC, so some of the video standards are "don't cares." */ |
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| 179 | /* Select video format */ |
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| 180 | switch (eVideoFormat) |
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| 181 | { |
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| 182 | case BFMT_VideoFmt_eNTSC: |
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| 183 | case BFMT_VideoFmt_eNTSC_J: |
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| 184 | case BFMT_VideoFmt_e1080i: |
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| 185 | case BFMT_VideoFmt_e720p: |
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| 186 | case BFMT_VideoFmt_e480p: |
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| 187 | isPal = false; |
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| 188 | break; |
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| 189 | |
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| 190 | case BFMT_VideoFmt_ePAL_B: |
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| 191 | case BFMT_VideoFmt_ePAL_B1: |
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| 192 | case BFMT_VideoFmt_ePAL_D: |
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| 193 | case BFMT_VideoFmt_ePAL_D1: |
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| 194 | case BFMT_VideoFmt_ePAL_G: |
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| 195 | case BFMT_VideoFmt_ePAL_H: |
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| 196 | case BFMT_VideoFmt_ePAL_K: |
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| 197 | case BFMT_VideoFmt_ePAL_I: |
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| 198 | case BFMT_VideoFmt_ePAL_M: |
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| 199 | case BFMT_VideoFmt_ePAL_N: |
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| 200 | case BFMT_VideoFmt_ePAL_NC: |
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| 201 | case BFMT_VideoFmt_eSECAM_L: |
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| 202 | case BFMT_VideoFmt_eSECAM_B: |
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| 203 | case BFMT_VideoFmt_eSECAM_G: |
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| 204 | case BFMT_VideoFmt_eSECAM_D: |
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| 205 | case BFMT_VideoFmt_eSECAM_K: |
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| 206 | case BFMT_VideoFmt_eSECAM_H: |
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| 207 | case BFMT_VideoFmt_e1080i_50Hz: |
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| 208 | case BFMT_VideoFmt_e720p_50Hz: |
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| 209 | case BFMT_VideoFmt_e576p_50Hz: |
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| 210 | isPal = true; |
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| 211 | break; |
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| 212 | |
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| 213 | default: |
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| 214 | BDBG_LEAVE(BVBI_P_A656_Enc_Program); |
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| 215 | BDBG_ERR(("BVBI_A656: video format %d not supported", eVideoFormat)); |
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| 216 | return BERR_TRACE (BERR_NOT_SUPPORTED); |
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| 217 | break; |
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| 218 | } |
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| 219 | |
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| 220 | /* Figure out the data ID and length fields for ancillary data packets */ |
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| 221 | /* TODO: some of this is likely wrong, especially SAA7113. */ |
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| 222 | switch (h656options->e656Format) |
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| 223 | { |
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| 224 | case BVBI_656Fmt_SAA7113: |
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| 225 | case BVBI_656Fmt_Modified_SAA7113: |
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| 226 | dcountCC = (isPal ? 1 : 5); |
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| 227 | dcountTT = (isPal ? 8 : 12); |
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| 228 | dcountWSS = 3; |
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| 229 | break; |
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| 230 | break; |
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| 231 | case BVBI_656Fmt_SMPTE291: |
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| 232 | dcountCC = 1; |
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| 233 | dcountTT = (isPal ? 21 : 17); |
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| 234 | dcountWSS = 2; |
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| 235 | break; |
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| 236 | default: |
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| 237 | BDBG_LEAVE(BVBI_P_A656_Enc_Program); |
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| 238 | BDBG_ERR(("BVBI_A656: ITU-R 656 encoding format %d not supported", |
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| 239 | h656options->e656Format)); |
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| 240 | return BERR_TRACE (BERR_INVALID_PARAMETER); |
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| 241 | break; |
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| 242 | } |
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| 243 | sdid = h656options->sdid; |
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| 244 | |
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| 245 | /* Program the "type A" register for closed caption */ |
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| 246 | if (h656options->e656Format != BVBI_656Fmt_SMPTE291) |
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| 247 | dcountCC = BVBI_P_p656_SetEEbits (dcountCC); |
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| 248 | ulReg = ( |
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| 249 | BCHP_FIELD_DATA(ANCI656_ANCIL_0_TYPE_A_VBI_HEADER, SDID, sdid) | |
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| 250 | BCHP_FIELD_DATA(ANCI656_ANCIL_0_TYPE_A_VBI_HEADER, DWORD_COUNT, dcountCC) |
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| 251 | ); |
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| 252 | if (isPal) |
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| 253 | { |
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| 254 | ulReg |= |
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| 255 | BCHP_FIELD_ENUM(ANCI656_ANCIL_0_TYPE_A_VBI_HEADER, TYPE, |
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| 256 | EURO_CLOSED_CAPTION); |
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| 257 | } |
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| 258 | else |
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| 259 | { |
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| 260 | ulReg |= |
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| 261 | BCHP_FIELD_ENUM(ANCI656_ANCIL_0_TYPE_A_VBI_HEADER, TYPE, |
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| 262 | US_CLOSED_CAPTION); |
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| 263 | } |
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| 264 | BREG_Write32 ( |
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| 265 | hReg, BCHP_ANCI656_ANCIL_0_TYPE_A_VBI_HEADER + ulCoreOffset, ulReg); |
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| 266 | |
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| 267 | /* Program the "type B" register for teletext */ |
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| 268 | if (h656options->e656Format != BVBI_656Fmt_SMPTE291) |
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| 269 | dcountTT = BVBI_P_p656_SetEEbits (dcountTT); |
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| 270 | ulReg = ( |
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| 271 | BCHP_FIELD_DATA(ANCI656_ANCIL_0_TYPE_B_VBI_HEADER, SDID, sdid) | |
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| 272 | BCHP_FIELD_DATA(ANCI656_ANCIL_0_TYPE_B_VBI_HEADER, DWORD_COUNT, dcountTT) |
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| 273 | ); |
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| 274 | if (isPal) |
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| 275 | { |
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| 276 | ulReg |= |
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| 277 | BCHP_FIELD_ENUM(ANCI656_ANCIL_0_TYPE_B_VBI_HEADER, TYPE, |
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| 278 | TELETEXT); |
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| 279 | } |
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| 280 | else |
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| 281 | { |
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| 282 | ulReg |= |
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| 283 | BCHP_FIELD_ENUM(ANCI656_ANCIL_0_TYPE_B_VBI_HEADER, TYPE, |
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| 284 | US_NABTS); |
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| 285 | } |
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| 286 | BREG_Write32 ( |
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| 287 | hReg, BCHP_ANCI656_ANCIL_0_TYPE_B_VBI_HEADER + ulCoreOffset, ulReg); |
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| 288 | |
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| 289 | /* Program the "type C" register for WSS */ |
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| 290 | if (h656options->e656Format != BVBI_656Fmt_SMPTE291) |
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| 291 | dcountWSS = BVBI_P_p656_SetEEbits (dcountWSS); |
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| 292 | ulReg = ( |
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| 293 | BCHP_FIELD_DATA(ANCI656_ANCIL_0_TYPE_C_VBI_HEADER, SDID, sdid)| |
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| 294 | BCHP_FIELD_DATA(ANCI656_ANCIL_0_TYPE_C_VBI_HEADER, DWORD_COUNT, dcountWSS) |
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| 295 | ); |
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| 296 | ulReg |= |
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| 297 | BCHP_FIELD_ENUM(ANCI656_ANCIL_0_TYPE_C_VBI_HEADER, TYPE, |
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| 298 | WIDE_SCREEN); |
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| 299 | BREG_Write32 ( |
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| 300 | hReg, BCHP_ANCI656_ANCIL_0_TYPE_C_VBI_HEADER + ulCoreOffset, ulReg); |
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| 301 | |
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| 302 | /* Program the ITU-R 656 data encoding format */ |
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| 303 | ulReg = |
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| 304 | BREG_Read32 ( hReg, BCHP_ANCI656_ANCIL_0_ANCI656_CNTRL + ulCoreOffset ); |
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| 305 | ulReg &= |
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| 306 | ~BCHP_MASK (ANCI656_ANCIL_0_ANCI656_CNTRL, FORMAT ); |
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| 307 | switch (h656options->e656Format) |
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| 308 | { |
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| 309 | case BVBI_656Fmt_SAA7113: |
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| 310 | ulReg |= |
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| 311 | BCHP_FIELD_ENUM(ANCI656_ANCIL_0_ANCI656_CNTRL, FORMAT, SAA7113H); |
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| 312 | break; |
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| 313 | case BVBI_656Fmt_Modified_SAA7113: |
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| 314 | ulReg |= |
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| 315 | BCHP_FIELD_ENUM(ANCI656_ANCIL_0_ANCI656_CNTRL, FORMAT, |
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| 316 | MODIFIED_SAA7113H); |
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| 317 | break; |
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| 318 | case BVBI_656Fmt_SMPTE291: |
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| 319 | ulReg |= |
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| 320 | BCHP_FIELD_ENUM(ANCI656_ANCIL_0_ANCI656_CNTRL, FORMAT, SMPTE291M); |
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| 321 | break; |
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| 322 | default: |
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| 323 | BDBG_LEAVE(BVBI_P_A656_Enc_Program); |
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| 324 | BDBG_ERR(("BVBI_A656: ITU-R 656 encoding format %d not supported", |
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| 325 | h656options->e656Format)); |
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| 326 | return BERR_TRACE (BERR_INVALID_PARAMETER); |
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| 327 | break; |
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| 328 | } |
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| 329 | |
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| 330 | /* Take care of the PR18010 backwards compatibility issue */ |
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| 331 | if (bPR18010_bad_line_number) |
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| 332 | { |
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| 333 | ulReg |= ( |
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| 334 | BCHP_FIELD_ENUM(ANCI656_ANCIL_0_ANCI656_CNTRL, V_BIT_SEL, REG) | |
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| 335 | BCHP_FIELD_ENUM(ANCI656_ANCIL_0_ANCI656_CNTRL, F_BIT_SEL, REG) |
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| 336 | ); |
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| 337 | } |
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| 338 | |
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| 339 | BREG_Write32 (hReg, BCHP_ANCI656_ANCIL_0_ANCI656_CNTRL + ulCoreOffset, ulReg); |
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| 340 | |
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| 341 | BDBG_LEAVE(BVBI_P_A656_Enc_Program); |
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| 342 | return BERR_SUCCESS; |
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| 343 | } |
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| 344 | |
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| 345 | /*************************************************************************** |
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| 346 | * Static (private) functions |
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| 347 | ***************************************************************************/ |
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| 348 | |
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| 349 | /*************************************************************************** |
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| 350 | * |
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| 351 | */ |
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| 352 | static void BVBI_P_A656_Enc_Init (BREG_Handle hReg) |
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| 353 | { |
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| 354 | BDBG_ENTER(BVBI_P_A656_Enc_Init); |
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| 355 | |
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| 356 | /* Just reset the core(s). Probably not necessary. */ |
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| 357 | BVBI_P_VIE_AncilSoftReset (hReg, 0); |
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| 358 | #if (BVBI_P_NUM_ANCI656_656 >= 2) |
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| 359 | BVBI_P_VIE_AncilSoftReset (hReg, 1); |
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| 360 | #endif |
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| 361 | |
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| 362 | BDBG_LEAVE(BVBI_P_A656_Enc_Init); |
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| 363 | } |
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| 364 | |
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| 365 | /*************************************************************************** |
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| 366 | * |
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| 367 | */ |
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| 368 | static uint32_t P_GetCoreOffset (uint8_t hwCoreIndex) |
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| 369 | { |
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| 370 | uint32_t ulCoreOffset = 0xFFFFFFFF; |
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| 371 | |
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| 372 | if (hwCoreIndex == 0) |
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| 373 | ulCoreOffset = 0x0; |
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| 374 | #if (BVBI_P_NUM_ANCI656_656 >= 2) |
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| 375 | if (hwCoreIndex == 0) |
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| 376 | ulCoreOffset = |
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| 377 | BCHP_ANCI656_ANCIL_1_ANCI656_REV_ID - |
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| 378 | BCHP_ANCI656_ANCIL_0_ANCI656_REV_ID; |
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| 379 | #endif |
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| 380 | |
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| 381 | return ulCoreOffset; |
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| 382 | } |
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| 383 | |
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| 384 | #endif /** } (BVBI_P_NUM_ANCI656_ANCIL_0 > 0) **/ |
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| 385 | |
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| 386 | /* End of file */ |
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