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bvbi_tte.c

Last change on this file was 2, checked in by phkim, 11 years ago

1.phkim

revision copy newcon3sk r27

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1	/***************************************************************************
2	* Copyright (c) 2003-2012, Broadcom Corporation
3	* All Rights Reserved
4	* Confidential Property of Broadcom Corporation
5	*
6	* THIS SOFTWARE MAY ONLY BE USED SUBJECT TO AN EXECUTED SOFTWARE LICENSE
7	* AGREEMENT BETWEEN THE USER AND BROADCOM. YOU HAVE NO RIGHT TO USE OR
8	* EXPLOIT THIS MATERIAL EXCEPT SUBJECT TO THE TERMS OF SUCH AN AGREEMENT.
9	*
10	* $brcm_Workfile: bvbi_tte.c $
11	* $brcm_Revision: Hydra_Software_Devel/10 $
12	* $brcm_Date: 2/20/12 2:53p $
13	*
14	* Module Description:
15	*
16	* Revision History:
17	*
18	* $brcm_Log: /magnum/portinginterface/vbi/7420/bvbi_tte.c $
19	*
20	* Hydra_Software_Devel/10 2/20/12 2:53p darnstein
21	* SW7425-2434: more detail in error messages.
22	*
23	* Hydra_Software_Devel/9 2/20/12 12:56p darnstein
24	* SW7425-2434: when an unsupported video format is entered, the BDBG
25	* error message should be informative.
26	*
27	* Hydra_Software_Devel/8 12/21/09 7:01p darnstein
28	* SW7550-120: Add support for SECAM variants.
29	*
30	* Hydra_Software_Devel/7 6/30/09 5:51p darnstein
31	* PR56342: support for 7550 chipset.
32	*
33	* Hydra_Software_Devel/6 6/24/09 5:39p darnstein
34	* PR56342: BVBI compiles for 7550 chipset now.
35	*
36	* Hydra_Software_Devel/5 4/17/09 6:27p darnstein
37	* PR54282: On big-endian systems, do a 32-bit swap on the teletext line
38	* bitmask.
39	*
40	* Hydra_Software_Devel/4 4/13/09 3:26p darnstein
41	* PR54117: At the request of a 97405 customer, allow NABTS to occupy
42	* video lines as late as line 22.
43	*
44	* Hydra_Software_Devel/3 3/27/09 7:43p darnstein
45	* PR53635: Remove internal ConfigForOthers code. It is obsolete, and it
46	* was causing a problem (this PR).
47	*
48	* Hydra_Software_Devel/2 12/4/08 6:07p darnstein
49	* PR45819: 7420 software will now compile, but not link.
50	*
51	* Hydra_Software_Devel/2 12/3/08 7:57p darnstein
52	* PR45819: New, more modular form of most BVBI source files.
53	*
54	* Hydra_Software_Devel/52 5/13/08 2:15p darnstein
55	* PR34584: Port over changes from 7401 dedicated branch. Allow user to
56	* choose bit shift direction for teletext encoding.
57	*
58	* Hydra_Software_Devel/51 4/11/08 5:27p darnstein
59	* PR24573: silence a compiler warning.
60	*
61	* Hydra_Software_Devel/50 4/9/08 8:04p darnstein
62	* PR37064: The fix that works so well on 7401 hardware causes failure on
63	* 3563 hardware. I believe that there is a hardware flaw involving the
64	* line mask registers in the 3563-C0 TTE core. Will diagnose later.
65	*
66	* Hydra_Software_Devel/49 4/8/08 6:14p darnstein
67	* PR37064: This is the same 15-lines-of-teletext problem that was solved
68	* (worked-around, actually) on the dedicated 7401 ClearCase branch.
69	*
70	* Hydra_Software_Devel/48 3/23/07 4:06p darnstein
71	* PR24573: The RDB name for the reset register is now the same for 7440-
72	* A0 and 7440-B0. Adjust software to match this improvement.
73	*
74	* Hydra_Software_Devel/47 2/20/07 10:44a darnstein
75	* PR27521: Apply software workaround. The TTE core is reset, at every
76	* video field. Also, the encoder output for the field NOT in use is
77	* disabled, at every video field.
78	*
79	* Hydra_Software_Devel/46 1/17/07 5:32p darnstein
80	* PR26464: correctly handle teletext output to multiple VECs
81	*
82	* Hydra_Software_Devel/45 1/2/07 4:19p darnstein
83	* PR26872: Mechanically add SECAM to all cases where PAL formats are
84	* accepted.
85	*
86	* Hydra_Software_Devel/44 12/18/06 1:02p darnstein
87	* PR24573: Adapt to an odd register name for BCM97440-B0 chipset.
88	*
89	* Hydra_Software_Devel/43 12/15/06 4:16p darnstein
90	* PR25990: I recently broke the build for BCM97438-A0 chipset. Fixed now.
91	*
92	* Hydra_Software_Devel/42 12/15/06 3:50p darnstein
93	* PR24573: Adapt to some odd register names in BCM97440-A0 chipset.
94	*
95	* Hydra_Software_Devel/41 12/15/06 2:34p darnstein
96	* PR25990: Fix a stupid typo.
97	*
98	* Hydra_Software_Devel/40 12/14/06 7:19p darnstein
99	* PR25990: Can compile for BCM97400-B0 now.
100	*
101	* Hydra_Software_Devel/39 11/10/06 4:34p darnstein
102	* PR23247: Fix a silly bug programming for serial port output of
103	* teletext.
104	*
105	* Hydra_Software_Devel/38 11/8/06 5:13p darnstein
106	* PR23247: Serial output of teletext is partially supported now.
107	*
108	* Hydra_Software_Devel/37 10/19/06 5:47p darnstein
109	* PR24979: change horizontal offset of waveform when sending NTSC.
110	* Theory: VEC microcode changed in such a way that the register values
111	* are interpreted differently.
112	*
113	* Hydra_Software_Devel/36 9/26/06 7:37p darnstein
114	* PR24573: The BVBI porting interface module now compiles for the 7440
115	* chipset. Correct operation has not been verified.
116	*
117	* Hydra_Software_Devel/35 8/31/06 2:10p darnstein
118	* PR23869: clean up the handling of multiple VECs and VDECs.
119	*
120	* Hydra_Software_Devel/34 8/18/06 6:51p darnstein
121	* PR23178: basic compile on 93563 is possible.
122	*
123	* Hydra_Software_Devel/33 7/20/06 2:23p darnstein
124	* PR21688: Use the new hardware soft reset scheme for later model chips.
125	*
126	* Hydra_Software_Devel/32 5/4/06 5:31p darnstein
127	* PR18010: Silence a compiler warning.
128	*
129	* Hydra_Software_Devel/31 5/3/06 4:31p darnstein
130	* PR18010: The previous checkin Hydra_Software_Devel/30 was incomplete.
131	* This finishes it.
132	*
133	* Hydra_Software_Devel/30 5/3/06 2:31p darnstein
134	* PR18010: Remove extraneous call to BVBI_P_CC_ConfigForOthers() that
135	* might change the video format of closed caption encoder core.
136	*
137	* Hydra_Software_Devel/29 3/1/06 4:19p darnstein
138	* PR19955: For PAL teletext encoding: max lines is now 18 for both top
139	* and bottom fields. Do an "endian" swap on bit order (LSB first vs. MSB
140	* first).
141	*
142	* Hydra_Software_Devel/28 2/21/06 6:20p darnstein
143	* PR18343: Move top line for teletext output up raster by 1 (numerically
144	* smaller by 1), but ONLY for PAL.
145	*
146	* Hydra_Software_Devel/27 2/6/06 4:09p darnstein
147	* PR18343: Move top line for teletext output up raster by 1 (numerically
148	* smaller by 1).
149	*
150	* Hydra_Software_Devel/26 12/5/05 7:30p darnstein
151	* PR18010: Implement work-around for the bad line number, together with
152	* an exception for customers that now depend on the bad line number.
153	*
154	* Hydra_Software_Devel/25 11/30/05 3:48p darnstein
155	* PR18234: Apply encoder tuning parameters chosen by Kin Fan Ho, for PAL
156	* teletext output.
157	*
158	* Hydra_Software_Devel/24 9/23/05 2:47p darnstein
159	* PR13750: Proper use of BERR_TRACE and BERR_CODEs.
160	*
161	* Hydra_Software_Devel/23 9/2/05 2:16p darnstein
162	* PR16980: fix my stupid typing error.
163	*
164	* Hydra_Software_Devel/22 8/22/05 8:11p darnstein
165	* PR16057: To support many different chips, use private #defines that
166	* specify number of VECs, VDECs, and (separately) pass-through VECs.
167	*
168	* Hydra_Software_Devel/21 3/17/05 7:35p darnstein
169	* PR 14472: Eliminate references to secondary VEC if chip is 3560.
170	*
171	* Hydra_Software_Devel/20 7/16/04 7:07p darnstein
172	* PR 9080: merge in 656 input and output work. Some testing and debugging
173	* remains to be done.
174	*
175	* Hydra_Software_Devel/I656/1 6/28/04 1:10p darnstein
176	* 656 output is ready for testing.
177	*
178	* Hydra_Software_Devel/19 6/17/04 6:19p darnstein
179	* PR 11443: Get rid of a kludge that was only needed in revision -A0 of
180	* the hardware.
181	*
182	* Hydra_Software_Devel/18 5/24/04 7:24p jasonh
183	* PR 11189: Merge down from B0 to main-line
184	*
185	* Hydra_Software_Devel/Refsw_Devel_7038_B0/2 4/29/04 6:23p darnstein
186	* PR 9080: Tune start_delay and output_attenuation for NTSC encoding of
187	* teletext (with Kin Fan). This duplicates version 17 in the main
188	* branch.
189	*
190	* Hydra_Software_Devel/Refsw_Devel_7038_B0/1 4/19/04 2:45p darnstein
191	* PR 9080: Compilation is possible with 7038 B0. Correct execution is not
192	* likely.
193	*
194	* Hydra_Software_Devel/16 4/2/04 6:42p darnstein
195	* PR 9080: Allow NTSC-J video format.
196	*
197	* Hydra_Software_Devel/15 3/26/04 1:49p darnstein
198	* PR 8543: Workaround for "last line of teletext" hardware bug.
199	*
200	* Hydra_Software_Devel/14 3/18/04 11:18a darnstein
201	* PR 9080: remove some debugging code.
202	*
203	* Hydra_Software_Devel/13 3/12/04 5:52p darnstein
204	* PR 9080: Teletext for NTSC is working, with a kludge for an A0 hardware
205	* flaw. There is a lot of debug code that will be removed later.
206	*
207	* Hydra_Software_Devel/12 3/4/04 4:29p darnstein
208	* PR 9080: improve allocation of teletext private data. Add support for
209	* progressive video formats.
210	*
211	* Hydra_Software_Devel/11 2/27/04 6:09p darnstein
212	* PR 9080: handle ALL of the PAL formats.
213	*
214	* Hydra_Software_Devel/10 2/19/04 2:51p darnstein
215	* PR 9493: Use new PAL format enums.
216	*
217	* Hydra_Software_Devel/9 1/15/04 4:31p darnstein
218	* PR 9080: fix problems with critical sections.
219	*
220	* Hydra_Software_Devel/8 12/19/03 5:08p darnstein
221	* PR 9080: adapt to changed BAVC enum for field polarity.
222	*
223	* Hydra_Software_Devel/7 10/17/03 3:38p darnstein
224	* VBI encoding can be disabled for one field time.
225	*
226	* Hydra_Software_Devel/6 10/16/03 1:21p darnstein
227	* Fix usage of BDBG_ENTER(), BDBG_LEAVE().
228	*
229	* Hydra_Software_Devel/5 10/2/03 2:25p darnstein
230	* Remove improper use of BERR_TRACE.
231	* Put in some missing BDBG_LEAVE statements.
232	*
233	* Hydra_Software_Devel/4 9/30/03 1:04p darnstein
234	* Fix logic error discovered by Linux build script.
235	*
236	* Hydra_Software_Devel/3 9/29/03 5:00p darnstein
237	* Put in critical sections.
238	*
239	* Hydra_Software_Devel/2 9/25/03 4:48p darnstein
240	* BVBI module is mostly complete. The only things that I know are missing
241	* are the critical sections, 656 support, macrovision support, and LOTS
242	* OF TESTING.
243	*
244	* Hydra_Software_Devel/1 9/23/03 11:02a darnstein
245	* Teletext specific VBI software for encoding.
246	*
247	***************************************************************************/
248
249	#include "bstd.h" /* standard types */
250	#include "bdbg.h" /* Dbglib */
251	#include "bvbi.h" /* VBI processing, this module. */
252	#include "bkni.h" /* For critical sections */
253	#include "bvbi_priv.h" /* VBI internal data structures */
254	#if (BVBI_P_NUM_TTE >= 1)
255	#include "bchp_tte_0.h" /* RDB info for primary TTE core */
256	#endif
257	#if (BVBI_P_NUM_TTE >= 2)
258	#include "bchp_tte_1.h" /* RDB info for secondary TTE core */
259	#endif
260	#if (BVBI_P_NUM_TTE >= 3)
261	#include "bchp_tte_2.h" /* RDB info for tertiary TTE core */
262	#endif
263	#if (BVBI_P_NUM_TTE_656 >= 1)
264	#include "bchp_tte_ancil_0.h" /* RDB info for ITU-R 656 "bypass" TTE core */
265	#endif
266
267	BDBG_MODULE(BVBI);
268
269	/***************************************************************************
270	* Forward declarations of static (private) functions
271	***************************************************************************/
272	#if (BVBI_P_NUM_TTE >= 1) \|\| (BVBI_P_NUM_TTE_656 >= 1)
273	static uint32_t P_GetCoreOffset (bool is656, uint8_t hwCoreIndex);
274	#endif
275
276
277	/***************************************************************************
278	* Implementation of "BVBI_" API functions
279	***************************************************************************/
280
281
282	/***************************************************************************
283	* Implementation of supporting teletext functions that are not in API
284	***************************************************************************/
285
286	#if (BVBI_P_NUM_TTE >= 1) \|\| (BVBI_P_NUM_TTE_656 >= 1)
287	static BERR_Code BVBI_P_TT_Enc_Program_isr (
288	BREG_Handle hReg,
289	BMEM_Handle hMem,
290	bool is656,
291	uint8_t hwCoreIndex,
292	bool bActive,
293	bool bXserActive,
294	BFMT_VideoFmt eVideoFormat,
295	bool tteShiftDirMsb2Lsb,
296	BVBI_XSER_Settings* xserSettings,
297	BVBI_P_TTData* topData,
298	BVBI_P_TTData* botData
299	);
300	#endif
301
302	static void BVBI_P_TT_Enc_Init_isr (
303	BREG_Handle hReg, bool is656, uint8_t hwCoreIndex);
304
305	/***************************************************************************
306	*
307	*/
308	void BVBI_P_TT_Enc_Init (BREG_Handle hReg, bool is656, uint8_t hwCoreIndex)
309	{
310	BKNI_EnterCriticalSection();
311	BVBI_P_TT_Enc_Init_isr (hReg, is656, hwCoreIndex);
312	BKNI_LeaveCriticalSection();
313	}
314
315	/***************************************************************************
316	*
317	*/
318	void BVBI_P_TT_Enc_Init_isr (BREG_Handle hReg, bool is656, uint8_t hwCoreIndex)
319	{
320	BDBG_ENTER(BVBI_P_TT_Enc_Init_isr);
321
322	BVBI_P_VIE_SoftReset (hReg, is656, hwCoreIndex, BVBI_P_SELECT_TT);
323
324	BDBG_LEAVE(BVBI_P_TT_Enc_Init_isr);
325	}
326
327	#if (BVBI_P_NUM_TTE >= 1) \|\| (BVBI_P_NUM_TTE_656 >= 1) / { /
328
329	/***************************************************************************
330	*
331	*/
332	BERR_Code BVBI_P_TT_Enc_Program (
333	BREG_Handle hReg,
334	BMEM_Handle hMem,
335	bool is656,
336	uint8_t hwCoreIndex,
337	bool bActive,
338	bool bXserActive,
339	BFMT_VideoFmt eVideoFormat,
340	bool tteShiftDirMsb2Lsb,
341	BVBI_XSER_Settings* xserSettings,
342	BVBI_P_TTData* topData,
343	BVBI_P_TTData* botData
344	)
345	{
346	BERR_Code retval;
347	BDBG_ENTER(BVBI_P_TT_Enc_Program);
348	BKNI_EnterCriticalSection();
349	retval = BVBI_P_TT_Enc_Program_isr (
350	hReg, hMem, is656, hwCoreIndex, bActive, bXserActive,
351	eVideoFormat, tteShiftDirMsb2Lsb, xserSettings, topData, botData);
352	BKNI_LeaveCriticalSection();
353	BDBG_LEAVE(BVBI_P_TT_Enc_Program);
354	return retval;
355	}
356
357	/***************************************************************************
358	*
359	*/
360	static BERR_Code BVBI_P_TT_Enc_Program_isr (
361	BREG_Handle hReg,
362	BMEM_Handle hMem,
363	bool is656,
364	uint8_t hwCoreIndex,
365	bool bActive,
366	bool bXserActive,
367	BFMT_VideoFmt eVideoFormat,
368	bool tteShiftDirMsb2Lsb,
369	BVBI_XSER_Settings* xserSettings,
370	BVBI_P_TTData* topData,
371	BVBI_P_TTData* botData
372	)
373	{
374	uint32_t ulControlReg;
375	uint32_t ulFormatReg;
376	#if (BVBI_P_HAS_XSER_TT >= 1)
377	uint32_t iSerialPortMode;
378	uint32_t iSerialPort;
379	#endif
380
381	uint8_t ucNumLinesTF;
382	uint8_t ucNumLinesBF;
383	uint8_t ucBytesPerLine;
384
385	uint32_t offset;
386	uint32_t ulCoreOffset;
387	uint32_t ulShiftDir;
388	BERR_Code eErr;
389
390	#if (BVBI_P_HAS_XSER_TT >= 1)
391	#else
392	BSTD_UNUSED (bXserActive);
393	BSTD_UNUSED (xserSettings);
394	#endif
395
396	BDBG_ENTER(BVBI_P_TT_Enc_Program_isr);
397
398	/* Figure out which encoder core to use */
399	ulCoreOffset = P_GetCoreOffset (is656, hwCoreIndex);
400	if (ulCoreOffset == 0xFFFFFFFF)
401	{
402	/* This should never happen! This parameter was checked by
403	BVBI_Encode_Create() */
404	BDBG_LEAVE(BVBI_P_TT_Enc_Program_isr);
405	return BERR_TRACE(BERR_INVALID_PARAMETER);
406	}
407
408	/* TODO: Verify little endian */
409
410	/* If user wants to turn off teletext processing, just reset the
411	entire core. */
412	if (!bActive)
413	{
414	BVBI_P_TT_Enc_Init_isr (hReg, is656, hwCoreIndex);
415	BDBG_LEAVE(BVBI_P_TT_Enc_Program_isr);
416	return BERR_SUCCESS;
417	}
418
419	#if (BVBI_P_HAS_XSER_TT >= 1)
420	iSerialPort = (bXserActive ?
421	BCHP_TTE_0_control_serial_port_ENABLE :
422	BCHP_TTE_0_control_serial_port_DISABLE);
423	switch (xserSettings->xsSerialDataContent)
424	{
425	case BVBI_TTserialDataContent_None:
426	iSerialPortMode = BCHP_TTE_0_control_serial_port_mode_DATA_ONLY;
427	iSerialPort = BCHP_TTE_0_control_serial_port_DISABLE;
428	break;
429	case BVBI_TTserialDataContent_DataOnly:
430	iSerialPortMode = BCHP_TTE_0_control_serial_port_mode_DATA_ONLY;
431	break;
432	case BVBI_TTserialDataContent_DataMag:
433	iSerialPortMode = BCHP_TTE_0_control_serial_port_mode_MAGAZINE_DATA;
434	break;
435	case BVBI_TTserialDataContent_DataMagFrm:
436	iSerialPortMode =
437	BCHP_TTE_0_control_serial_port_mode_FRM_MAGAZINE_DATA;
438	break;
439	case BVBI_TTserialDataContent_DataMagFrmRun:
440	iSerialPortMode =
441	BCHP_TTE_0_control_serial_port_mode_RUNIN_FRM_MAGAZINE_DATA;
442	break;
443	default:
444	iSerialPortMode = BCHP_TTE_0_control_serial_port_mode_DATA_ONLY;
445	/* This should never happen! This parameter was checked by
446	BVBI_Encode_Create() */
447	BDBG_LEAVE(BVBI_P_TT_Enc_Program_isr);
448	return BERR_TRACE(BERR_INVALID_PARAMETER);
449	break;
450	}
451	#endif
452
453	if (tteShiftDirMsb2Lsb)
454	ulShiftDir = BCHP_TTE_0_control_shift_direction_MSBToLSB;
455	else
456	ulShiftDir = BCHP_TTE_0_control_shift_direction_LSBToMSB;
457
458	/* Start programming the TTE control register */
459	ulControlReg = BREG_Read32 (hReg, BCHP_TTE_0_control + ulCoreOffset);
460	ulControlReg &= ~(
461	#if (BVBI_P_HAS_XSER_TT >= 1)
462	BCHP_MASK (TTE_0_control, serial_port_mode ) \|
463	BCHP_MASK (TTE_0_control, serial_port ) \|
464	#endif
465	BCHP_MASK (TTE_0_control, constant_phase ) \|
466	BCHP_MASK (TTE_0_control, anci656_enable ) \|
467	BCHP_MASK (TTE_0_control, anci656_output_fc ) \|
468	BCHP_MASK (TTE_0_control, shift_direction ) \|
469	BCHP_MASK (TTE_0_control, enable_tf ) \|
470	BCHP_MASK (TTE_0_control, enable_bf ) );
471	ulControlReg \|= (
472	#if (BVBI_P_HAS_XSER_TT >= 1)
473	BCHP_FIELD_DATA (TTE_0_control, serial_port_mode,
474	iSerialPortMode) \|
475	BCHP_FIELD_DATA (TTE_0_control, serial_port, iSerialPort) \|
476	#endif
477	BCHP_FIELD_DATA (TTE_0_control, constant_phase, 0) \|
478	BCHP_FIELD_DATA (TTE_0_control, anci656_enable, 1) \|
479	BCHP_FIELD_DATA (TTE_0_control, anci656_output_fc, 1) \|
480	BCHP_FIELD_DATA (TTE_0_control, shift_direction, ulShiftDir) \|
481	BCHP_FIELD_DATA (TTE_0_control, enable_tf, 1) \|
482	BCHP_FIELD_DATA (TTE_0_control, enable_bf, 1) );
483
484	/* Program the TTE top mask register */
485	BREG_Write32 (hReg, BCHP_TTE_0_top_mask + ulCoreOffset, 0x0);
486
487	/* Program the TTE bottom mask register */
488	BREG_Write32 (hReg, BCHP_TTE_0_bottom_mask + ulCoreOffset, 0x0);
489
490	/* Start programming the output format register */
491	ulFormatReg =
492	BREG_Read32 (hReg, BCHP_TTE_0_output_format + ulCoreOffset);
493
494	/* Select video format */
495	switch (eVideoFormat)
496	{
497	case BFMT_VideoFmt_eNTSC:
498	case BFMT_VideoFmt_eNTSC_J:
499	/* NTSC specific settings */
500
501	ucNumLinesTF = 11;
502	ucNumLinesBF = 11;
503	ucBytesPerLine = 34;
504
505	/* Continue programming the control register */
506	ulControlReg &= ~(
507	BCHP_MASK (TTE_0_control, start_delay ) \|
508	BCHP_MASK (TTE_0_control, teletext_mode ) );
509	ulControlReg \|= (
510	BCHP_FIELD_DATA (TTE_0_control, start_delay, 0x1F) \|
511	BCHP_FIELD_ENUM (TTE_0_control, teletext_mode, NABTS) );
512
513	/* Continue programming the output_format register */
514	ulFormatReg &=
515	~BCHP_MASK (TTE_0_output_format, output_attenuation );
516	ulFormatReg \|=
517	BCHP_FIELD_DATA (TTE_0_output_format, output_attenuation,0x63);
518
519	break;
520
521	case BFMT_VideoFmt_ePAL_B:
522	case BFMT_VideoFmt_ePAL_B1:
523	case BFMT_VideoFmt_ePAL_D:
524	case BFMT_VideoFmt_ePAL_D1:
525	case BFMT_VideoFmt_ePAL_G:
526	case BFMT_VideoFmt_ePAL_H:
527	case BFMT_VideoFmt_ePAL_K:
528	case BFMT_VideoFmt_ePAL_I:
529	case BFMT_VideoFmt_ePAL_M:
530	case BFMT_VideoFmt_ePAL_N:
531	case BFMT_VideoFmt_ePAL_NC:
532	case BFMT_VideoFmt_eSECAM_L:
533	case BFMT_VideoFmt_eSECAM_B:
534	case BFMT_VideoFmt_eSECAM_G:
535	case BFMT_VideoFmt_eSECAM_D:
536	case BFMT_VideoFmt_eSECAM_K:
537	case BFMT_VideoFmt_eSECAM_H:
538	/* 576I settings */
539
540	ucNumLinesTF = 17;
541	ucNumLinesBF = 18;
542	ucBytesPerLine = 43;
543
544	/* Continue programming the control register */
545	ulControlReg &= ~(
546	BCHP_MASK (TTE_0_control, start_delay ) \|
547	BCHP_MASK (TTE_0_control, teletext_mode ) );
548	ulControlReg \|= (
549	BCHP_FIELD_DATA (TTE_0_control, start_delay, 0x00) \|
550	BCHP_FIELD_ENUM (TTE_0_control, teletext_mode, ETSTeletext) );
551
552	/* Continue programming the output_format register */
553	ulFormatReg &=
554	~BCHP_MASK (TTE_0_output_format, output_attenuation );
555	ulFormatReg \|=
556	BCHP_FIELD_DATA (TTE_0_output_format, output_attenuation, 0x5a);
557
558	break;
559
560	default:
561	BDBG_ERR(("BVBI_TTE: video format %d not supported", eVideoFormat));
562	BDBG_LEAVE(BVBI_P_TT_Enc_Program_isr);
563	return BERR_TRACE (BERR_INVALID_PARAMETER);
564	break;
565	}
566
567	/* Prepare to send data in the encode handle */
568	eErr = BERR_TRACE (BMEM_ConvertAddressToOffset (
569	hMem, topData->pucData, &offset));
570	BDBG_ASSERT (eErr == BERR_SUCCESS);
571	BREG_Write32 (hReg, BCHP_TTE_0_read_address_top + ulCoreOffset, offset);
572	eErr = BERR_TRACE (BMEM_ConvertAddressToOffset (
573	hMem, botData->pucData, &offset));
574	BDBG_ASSERT (eErr == BERR_SUCCESS);
575	BREG_Write32 (
576	hReg, BCHP_TTE_0_read_address_bottom + ulCoreOffset, offset);
577
578	/* Update the field handles that send the data */
579	topData->ucLines = ucNumLinesTF;
580	topData->ucLineSize = ucBytesPerLine;
581	botData->ucLines = ucNumLinesBF;
582	botData->ucLineSize = ucBytesPerLine;
583
584	/* write the three registers with updated values */
585	BREG_Write32 (
586	hReg, BCHP_TTE_0_control + ulCoreOffset, ulControlReg);
587	BREG_Write32 (
588	hReg, BCHP_TTE_0_output_format + ulCoreOffset, ulFormatReg);
589
590	BDBG_LEAVE(BVBI_P_TT_Enc_Program_isr);
591	return BERR_SUCCESS;
592	}
593
594
595	/***************************************************************************
596	*
597	*/
598	uint32_t BVBI_P_TT_Encode_Data_isr (
599	BREG_Handle hReg,
600	BMEM_Handle hMem,
601	bool is656,
602	uint8_t hwCoreIndex,
603	BFMT_VideoFmt eVideoFormat,
604	BAVC_Polarity polarity,
605	bool bPR18010_bad_line_number,
606	BVBI_P_TTData* pTTDataNext )
607	{
608	/*
609	Programming note: the implementation here assumes that the bitfield layout
610	within registers is the same for all teletext encoder cores in the chip.
611
612	If a chip is built that has multiple teletext encoder cores that are not
613	identical, then this routine will have to be redesigned.
614	*/
615	uint32_t ulCoreOffset;
616	uint32_t H_ReAdTop;
617	uint32_t H_ReAdBot;
618	uint32_t H_MaskTop;
619	uint32_t H_MaskBot;
620	uint32_t H_Lines;
621	uint32_t H_Status;
622	uint32_t ulStatusReg;
623	uint16_t usStartLineTF;
624	uint16_t usStartLineBF;
625	uint8_t ucMinLines;
626	uint8_t ucMinLineSize;
627	uint32_t ulLinesReg;
628	uint32_t offset;
629	uint32_t lineMask;
630	uint32_t ulErrInfo = 0;
631
632	/* Debug code
633	uint8_t* printme = 0;
634	*/
635
636	#if (BVBI_P_NUM_TTE_656 >= 1)
637	#else
638	BSTD_UNUSED (bPR18010_bad_line_number);
639	#endif
640
641	BDBG_ENTER(BVBI_P_TT_Encode_Data_isr);
642
643	/* Figure out which encoder core to use */
644	ulCoreOffset = P_GetCoreOffset (is656, hwCoreIndex);
645	if (ulCoreOffset == 0xFFFFFFFF)
646	{
647	/* This should never happen! This parameter was checked by
648	BVBI_Encode_Create() */
649	BDBG_LEAVE(BVBI_P_TT_Encode_Data_isr);
650	return BERR_TRACE(BERR_INVALID_PARAMETER);
651	}
652
653	H_ReAdTop = BCHP_TTE_0_read_address_top + ulCoreOffset;
654	H_ReAdBot = BCHP_TTE_0_read_address_bottom + ulCoreOffset;
655	H_MaskTop = BCHP_TTE_0_top_mask + ulCoreOffset;
656	H_MaskBot = BCHP_TTE_0_bottom_mask + ulCoreOffset;
657	H_Lines = BCHP_TTE_0_lines_active + ulCoreOffset;
658	H_Status = BCHP_TTE_0_status + ulCoreOffset;
659
660	/* Verify that field handle is big enough to hold the TT data */
661	switch (eVideoFormat)
662	{
663	case BFMT_VideoFmt_eNTSC:
664	case BFMT_VideoFmt_eNTSC_J:
665	ucMinLines = 13;
666	ucMinLineSize = 34;
667	usStartLineTF = 10 - 1;
668	usStartLineBF = 273 - 263;
669	#if (BVBI_P_NUM_TTE_656 >= 1)
670	if (is656 && !bPR18010_bad_line_number)
671	{
672	usStartLineTF -= 1;
673	usStartLineBF -= 1;
674	}
675	#endif
676	break;
677	case BFMT_VideoFmt_ePAL_B:
678	case BFMT_VideoFmt_ePAL_B1:
679	case BFMT_VideoFmt_ePAL_D:
680	case BFMT_VideoFmt_ePAL_D1:
681	case BFMT_VideoFmt_ePAL_G:
682	case BFMT_VideoFmt_ePAL_H:
683	case BFMT_VideoFmt_ePAL_K:
684	case BFMT_VideoFmt_ePAL_I:
685	case BFMT_VideoFmt_ePAL_M:
686	case BFMT_VideoFmt_ePAL_N:
687	case BFMT_VideoFmt_ePAL_NC:
688	case BFMT_VideoFmt_eSECAM_L:
689	case BFMT_VideoFmt_eSECAM_B:
690	case BFMT_VideoFmt_eSECAM_G:
691	case BFMT_VideoFmt_eSECAM_D:
692	case BFMT_VideoFmt_eSECAM_K:
693	case BFMT_VideoFmt_eSECAM_H:
694	ucMinLines = 18;
695	ucMinLineSize = 43;
696	usStartLineTF = 6 - 1;
697	usStartLineBF = 318 - 313;
698	#if (BVBI_P_NUM_TTE_656 >= 1)
699	if (is656 && !bPR18010_bad_line_number)
700	{
701	usStartLineTF -= 1;
702	usStartLineBF -= 1;
703	}
704	#endif
705	/* PR18343 */
706	usStartLineTF -= 1;
707	break;
708	default:
709	/* This should never happen! */
710	ulErrInfo = (uint32_t)(-1);
711	BDBG_ERR(("BVBI_TTE: video format %d not supported", eVideoFormat));
712	BDBG_LEAVE(BVBI_P_TT_Encode_Data_isr);
713	return ulErrInfo;
714	break;
715	}
716	if ( (pTTDataNext->ucLines > ucMinLines) \|\|
717	(pTTDataNext->ucLineSize != ucMinLineSize) )
718	{
719	ulErrInfo \|= BVBI_LINE_ERROR_FLDH_CONFLICT;
720	BDBG_LEAVE(BVBI_P_TT_Encode_Data_isr);
721	return ulErrInfo;
722	}
723
724	/* Read the status register */
725	ulStatusReg = BREG_Read32 (hReg, H_Status);
726
727	/* Start programming the lines_active register */
728	ulLinesReg = BREG_Read32 (hReg, H_Lines);
729
730	/* If top field */
731	if (polarity == BAVC_Polarity_eTopField)
732	{
733	/* Check for hardware busy */
734	if ((ulStatusReg & BCHP_MASK (TTE_0_status, data_sent_tf)) == 0)
735	{
736	ulErrInfo \|= BVBI_LINE_ERROR_TELETEXT_OVERRUN;
737	goto done;
738	}
739
740	/* Will clear hardware status */
741	ulStatusReg = BCHP_MASK (TTE_0_status, data_sent_tf);
742
743	/* Give hardware a new place to encode data from */
744	if (BMEM_ConvertAddressToOffset (hMem, pTTDataNext->pucData, &offset) !=
745	BERR_SUCCESS)
746	{
747	ulErrInfo = (uint32_t)(-1);
748	goto done;
749	}
750	BREG_Write32 (hReg, H_ReAdTop, offset);
751
752	/* Program the masking register */
753	#if (BSTD_CPU_ENDIAN == BSTD_ENDIAN_LITTLE)
754	lineMask = pTTDataNext->lineMask;
755	#else
756	lineMask = BVBI_P_LEBE_SWAP (pTTDataNext->lineMask);
757	#endif
758	#ifdef BVBI_P_TTE_WA15
759	/* This is not working on 3563-C0 */
760	BREG_Write32 (hReg, H_MaskTop, lineMask);
761	#else
762	BREG_Write32 (hReg, H_MaskTop, 0xFFFFFFFF);
763	(uint32_t)(pTTDataNext->pucData) = lineMask;
764	#endif
765
766	/* Continue programming the lines_active register */
767	ulLinesReg &= ~BCHP_MASK (TTE_0_lines_active, startline_tf);
768	ulLinesReg \|= BCHP_FIELD_DATA (
769	TTE_0_lines_active, startline_tf,
770	pTTDataNext->firstLine + usStartLineTF);
771
772	/* Debug code
773	printme = pTTDataNext->pucData;
774	*/
775	}
776	else /* Bottom field */
777	{
778	/* Check for hardware busy */
779	if ((ulStatusReg & BCHP_MASK (TTE_0_status, data_sent_bf)) == 0)
780	{
781	ulErrInfo \|= BVBI_LINE_ERROR_TELETEXT_OVERRUN;
782	goto done;
783	}
784
785	/* Will clear hardware status */
786	ulStatusReg = BCHP_MASK (TTE_0_status, data_sent_bf);
787
788	/* Give hardware a new place to encode data from */
789	if (BMEM_ConvertAddressToOffset (hMem, pTTDataNext->pucData, &offset) !=
790	BERR_SUCCESS)
791	{
792	ulErrInfo = (uint32_t)(-1);
793	goto done;
794	}
795	BREG_Write32 (hReg, H_ReAdBot, offset);
796
797	/* Program the masking register */
798	#if (BSTD_CPU_ENDIAN == BSTD_ENDIAN_LITTLE)
799	lineMask = pTTDataNext->lineMask;
800	#else
801	lineMask = BVBI_P_LEBE_SWAP (pTTDataNext->lineMask);
802	#endif
803	#ifdef BVBI_P_TTE_WA15
804	/* This is not working on 3563-C0 */
805	BREG_Write32 (hReg, H_MaskBot, lineMask);
806	#else
807	BREG_Write32 (hReg, H_MaskBot, 0xFFFFFFFF);
808	(uint32_t)(pTTDataNext->pucData) = lineMask;
809	#endif
810
811	/* Continue programming the lines_active register */
812	ulLinesReg &= ~BCHP_MASK (TTE_0_lines_active, startline_bf);
813	ulLinesReg \|= BCHP_FIELD_DATA (
814	TTE_0_lines_active, startline_bf,
815	pTTDataNext->firstLine + usStartLineBF);
816
817	/* Debug code
818	printme = pTTDataNext->pucData;
819	*/
820	}
821
822	/* Finish programming the lines_active register */
823	BREG_Write32 (hReg, H_Lines, ulLinesReg);
824
825	/* Finish clearing status */
826	BREG_Write32 (hReg, H_Status, ulStatusReg);
827
828	/* Debug code */
829	/*
830	{
831	static uint32_t dcounter = 0;
832	++dcounter;
833	if ((dcounter > 80) && (dcounter < 150))
834	{
835	if (printme)
836	{
837	uint32_t mask = (uint32_t)printme;
838	char* p1 = printme + 4;
839	char* p2 = printme + (4 + 34);
840	printf ("%d%c: At %08x: encoding M:%08x \"%s\" \"%s\"\n",
841	dcounter,
842	(polarity == BAVC_Polarity_eTopField) ? 'T' : 'B',
843	offset,
844	mask, p1, p2);
845	}
846	else
847	printf ("%d%c: Did not encode anything\n",
848	dcounter,
849	(polarity == BAVC_Polarity_eTopField) ? 'T' : 'B');
850	{
851	}
852	}
853	}
854	*/
855
856	done:
857	BDBG_LEAVE(BVBI_P_TT_Encode_Data_isr);
858	return ulErrInfo;
859	}
860
861	/***************************************************************************
862	*
863	*/
864	BERR_Code BVBI_P_TT_Encode_Enable_isr (
865	BREG_Handle hReg,
866	bool is656,
867	uint8_t hwCoreIndex,
868	BFMT_VideoFmt eVideoFormat,
869	bool bEnable)
870	{
871	uint32_t ulCoreOffset;
872	uint32_t ulControlReg;
873
874	/* TODO: handle progressive video */
875	BSTD_UNUSED (eVideoFormat);
876
877	BDBG_ENTER(BVBI_P_TT_Encode_Enable_isr);
878
879	/* Figure out which encoder core to use */
880	ulCoreOffset = P_GetCoreOffset (is656, hwCoreIndex);
881	if (ulCoreOffset == 0xFFFFFFFF)
882	{
883	/* This should never happen! This parameter was checked by
884	BVBI_Encode_Create() */
885	BDBG_LEAVE(BVBI_P_TT_Encode_Enable_isr);
886	return BERR_TRACE(BERR_INVALID_PARAMETER);
887	}
888
889	ulControlReg = BREG_Read32 ( hReg, BCHP_TTE_0_control + ulCoreOffset );
890	ulControlReg &= ~(
891	BCHP_MASK (TTE_0_control, enable_tf) \|
892	BCHP_MASK (TTE_0_control, enable_bf) );
893	if (bEnable)
894	{
895	ulControlReg \|= (
896	BCHP_FIELD_DATA (TTE_0_control, enable_tf, 1) \|
897	BCHP_FIELD_DATA (TTE_0_control, enable_bf, 1) );
898	}
899	else
900	{
901	ulControlReg \|= (
902	BCHP_FIELD_DATA (TTE_0_control, enable_tf, 0) \|
903	BCHP_FIELD_DATA (TTE_0_control, enable_bf, 0) );
904	}
905	BREG_Write32 ( hReg, BCHP_TTE_0_control + ulCoreOffset, ulControlReg );
906
907	BDBG_LEAVE(BVBI_P_TT_Encode_Enable_isr);
908	return BERR_SUCCESS;
909	}
910
911	#endif / } (BVBI_P_NUM_TTE >= 1) /
912
913	/***************************************************************************
914	* Static (private) functions
915	***************************************************************************/
916
917	#if (BVBI_P_NUM_TTE >= 1) \|\| (BVBI_P_NUM_TTE_656 >= 1)
918	/***************************************************************************
919	*
920	*/
921	static uint32_t P_GetCoreOffset (bool is656, uint8_t hwCoreIndex)
922	{
923	uint32_t ulCoreOffset = 0xFFFFFFFF;
924
925	if (is656)
926	{
927	#if (BVBI_P_NUM_TTE_656 >= 1)
928	ulCoreOffset = (BCHP_TTE_ANCIL_0_status - BCHP_TTE_0_status);
929	#endif
930	}
931	else
932	{
933	switch (hwCoreIndex)
934	{
935	#if (BVBI_P_NUM_TTE >= 1)
936	case 0:
937	ulCoreOffset = 0;
938	break;
939	#endif
940	#if (BVBI_P_NUM_TTE >= 2)
941	case 1:
942	ulCoreOffset = (BCHP_TTE_1_status - BCHP_TTE_0_status);
943	break;
944	#endif
945	#if (BVBI_P_NUM_TTE >= 3)
946	case 2:
947	ulCoreOffset = (BCHP_TTE_1_status - BCHP_TTE_0_status);
948	break;
949	#endif
950	default:
951	break;
952	}
953	}
954
955	return ulCoreOffset;
956	}
957	#endif
958
959	/* End of file */

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source: svn/trunk/newcon3bcm2_21bu/magnum/portinginterface/vbi/7552/bvbi_tte.c

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