| 1 | /*************************************************************************** |
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| 2 | * Copyright (c) 2003-2012, Broadcom Corporation |
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| 3 | * All Rights Reserved |
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| 4 | * Confidential Property of Broadcom Corporation |
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| 5 | * |
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| 6 | * THIS SOFTWARE MAY ONLY BE USED SUBJECT TO AN EXECUTED SOFTWARE LICENSE |
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| 7 | * AGREEMENT BETWEEN THE USER AND BROADCOM. YOU HAVE NO RIGHT TO USE OR |
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| 8 | * EXPLOIT THIS MATERIAL EXCEPT SUBJECT TO THE TERMS OF SUCH AN AGREEMENT. |
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| 9 | * |
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| 10 | * $brcm_Workfile: bvdc_priv.h $ |
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| 11 | * $brcm_Revision: Hydra_Software_Devel/120 $ |
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| 12 | * $brcm_Date: 3/1/12 11:46a $ |
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| 13 | * |
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| 14 | * Module Description: |
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| 15 | * |
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| 16 | * Revision History: |
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| 17 | * |
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| 18 | * $brcm_Log: /magnum/portinginterface/vdc/7038/bvdc_priv.h $ |
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| 19 | * |
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| 20 | * Hydra_Software_Devel/120 3/1/12 11:46a yuxiaz |
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| 21 | * SW7425-2526, SW7425-1182: Added runtime query capabilities for source |
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| 22 | * in VDC. |
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| 23 | * |
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| 24 | * Hydra_Software_Devel/119 1/13/12 2:51p tdo |
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| 25 | * SW7358-159 , SW7418-55 : Default DAC auto detection ON for |
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| 26 | * 7231/7344/7346Bx |
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| 27 | * |
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| 28 | * Hydra_Software_Devel/118 12/1/11 4:33p yuxiaz |
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| 29 | * SW7425-968, SW7344-95: Merged into mainline.: added independent source |
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| 30 | * clipping of right window in 3D mode. |
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| 31 | * |
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| 32 | * Hydra_Software_Devel/117 11/18/11 3:09p yuxiaz |
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| 33 | * SW7420-2135: Move MAX number of RULs defines to bvdc_common_priv.h |
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| 34 | * |
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| 35 | * Hydra_Software_Devel/116 10/14/11 2:23p tdo |
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| 36 | * SW7425-1416, SW7358-159: Add feature to control automatic DAC |
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| 37 | * detection. Default is currently OFF until it's fully functional. |
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| 38 | * |
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| 39 | * Hydra_Software_Devel/115 8/31/11 11:19a syang |
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| 40 | * SW7425-1170: pxlAspRatio passed to ViCE2 is corrected to x<<16 | y |
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| 41 | * format |
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| 42 | * |
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| 43 | * Hydra_Software_Devel/114 8/26/11 5:38p syang |
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| 44 | * SW7425-1170: merge from branch SW7572-1170 |
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| 45 | * |
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| 46 | * Hydra_Software_Devel/SW7425-1170/2 8/26/11 4:22p syang |
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| 47 | * SW7425-1170: refactor pixel aspect ratio related code |
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| 48 | * |
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| 49 | * Hydra_Software_Devel/SW7425-1170/1 8/23/11 6:20p vanessah |
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| 50 | * SW7425-1170: Aspect ratio cleanup |
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| 51 | * |
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| 52 | * Hydra_Software_Devel/113 8/4/11 7:20p tdo |
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| 53 | * SW7425-979: Add support for 7425B0 DAC name change |
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| 54 | * |
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| 55 | * Hydra_Software_Devel/112 7/22/11 4:56p tdo |
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| 56 | * SW7422-194: implement 40nm vDAC scaled voltage swing and auto-detection |
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| 57 | * to reduce power dissipation |
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| 58 | * |
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| 59 | * Hydra_Software_Devel/111 2/9/11 3:35p pntruong |
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| 60 | * SW7420-1456: Initial standby power management that used chp's pm |
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| 61 | * functionalities. |
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| 62 | * |
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| 63 | * Hydra_Software_Devel/110 11/12/10 3:56p pntruong |
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| 64 | * SW7425-31: Takes bvn yuv into account for hddvi input. Fixed bad debug |
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| 65 | * register read on non-mfd source. Updated scratch registers |
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| 66 | * availabliity. |
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| 67 | * |
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| 68 | * Hydra_Software_Devel/109 10/20/10 4:11p yuxiaz |
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| 69 | * SW7420-1190: Put back generic VDC drian buffer for mosaic mode. Only |
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| 70 | * allocate drain buffer in window if it does not use main VDC heap. |
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| 71 | * |
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| 72 | * Hydra_Software_Devel/108 10/19/10 4:07p yuxiaz |
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| 73 | * SW7420-1190: Make mosaic scratch buffer to be per window base. |
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| 74 | * |
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| 75 | * Hydra_Software_Devel/107 8/26/10 5:27p tdo |
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| 76 | * SW7422-57: Add simple vdc support |
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| 77 | * |
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| 78 | * Hydra_Software_Devel/106 6/23/10 4:59p rpan |
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| 79 | * SW7400-2808: Stop enabling BVN while aligning VECs. |
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| 80 | * |
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| 81 | * Hydra_Software_Devel/105 5/7/10 7:19p albertl |
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| 82 | * SW7125-364: Changed dirty bits to use union structure to avoid type-pun |
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| 83 | * warnings |
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| 84 | * |
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| 85 | * Hydra_Software_Devel/104 4/19/10 10:18p tdo |
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| 86 | * SW3548-2814: Improvements to VDC ulBlackMagic. Move |
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| 87 | * BDBG_OBJECT_ID_DECLARE private header files instead of .c. |
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| 88 | * |
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| 89 | * Hydra_Software_Devel/103 4/7/10 11:34a tdo |
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| 90 | * SW3548-2814: Improvements to VDC ulBlackMagic. Rename TLA |
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| 91 | * |
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| 92 | * Hydra_Software_Devel/102 4/5/10 4:13p tdo |
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| 93 | * SW3548-2814: Improvements to VDC ulBlackMagic |
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| 94 | * |
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| 95 | * Hydra_Software_Devel/101 8/21/09 2:37p tdo |
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| 96 | * PR57734: Add capability for display to handle DACs re-assignment |
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| 97 | * |
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| 98 | * Hydra_Software_Devel/100 6/25/09 12:11p rpan |
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| 99 | * PR56137, PR56138, PR56139, PR56166, PR56167, PR56168: Support for |
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| 100 | * various orthogonal VEC configurations. |
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| 101 | * |
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| 102 | * Hydra_Software_Devel/99 6/18/09 5:54p syang |
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| 103 | * PR 55812: add 7550 support |
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| 104 | * |
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| 105 | * Hydra_Software_Devel/98 6/5/09 3:08p pntruong |
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| 106 | * PR54615: [M+T][LCD][VIDEO] Pink gargabe blinks on DTV. Ensured that |
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| 107 | * the window shutdown process go thru upon destroy. |
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| 108 | * |
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| 109 | * Hydra_Software_Devel/97 2/17/09 2:33p rpan |
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| 110 | * PR52001: Added 7420 DAC connection state for power management. |
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| 111 | * |
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| 112 | * Hydra_Software_Devel/96 2/10/09 4:47p rpan |
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| 113 | * PR52001: Added 7420 DAC power management. |
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| 114 | * |
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| 115 | * Hydra_Software_Devel/95 11/12/08 3:14p tdo |
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| 116 | * PR48642: Provide clipping rect for histo luma region |
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| 117 | * |
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| 118 | * Hydra_Software_Devel/94 9/5/08 4:43p tdo |
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| 119 | * PR46484: Bringup appframework for7420 |
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| 120 | * |
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| 121 | * Hydra_Software_Devel/93 8/8/08 3:30p yuxiaz |
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| 122 | * PR45484: Enable Dithering in VDC. |
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| 123 | * |
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| 124 | * Hydra_Software_Devel/92 7/23/08 7:01p tdo |
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| 125 | * PR43508, PR43509: Mapping individual bandgap adjustment for each DAC |
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| 126 | * |
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| 127 | * Hydra_Software_Devel/91 2/29/08 4:19p yuxiaz |
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| 128 | * PR39158: Implement dithering in various BVN components for 3548. |
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| 129 | * |
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| 130 | * Hydra_Software_Devel/90 2/21/08 5:00p pntruong |
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| 131 | * PR39244: Need drain debugging hooked up to HD_DVI, VDEC, and 656in. |
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| 132 | * Improved code readability. |
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| 133 | * |
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| 134 | * Hydra_Software_Devel/89 10/23/07 11:16a yuxiaz |
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| 135 | * PR29569, PR36290: Add FGT support on 7405. |
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| 136 | * |
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| 137 | * Hydra_Software_Devel/PR29569/1 10/12/07 10:49a yuxiaz |
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| 138 | * PR29569: Add FGT support on 7405 |
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| 139 | * |
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| 140 | * Hydra_Software_Devel/88 2/20/07 2:56p jessem |
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| 141 | * PR25235: Removed the use of rate mask and replaced with actual value of |
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| 142 | * source frame and display refresh rates. |
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| 143 | * |
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| 144 | * Hydra_Software_Devel/87 2/16/07 9:37a pntruong |
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| 145 | * PR15284, PR27951: Graphics shimmering on HD path when video is scaled |
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| 146 | * down (PIG). HW fixed. Removed software work-around to avoid bvb |
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| 147 | * error interrupts from window surface. Make bvdc dbg more portable. |
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| 148 | * |
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| 149 | * Hydra_Software_Devel/86 1/24/07 9:07p albertl |
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| 150 | * PR22237: Updated BMEM calls to use new BMEM_Heap functions. |
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| 151 | * |
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| 152 | * Hydra_Software_Devel/85 12/19/06 3:56p hongtaoz |
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| 153 | * PR25668: added 7403 support for VDC; further consolidate chip specific |
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| 154 | * ifdefs to bvdc_common_priv.h; |
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| 155 | * |
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| 156 | * Hydra_Software_Devel/84 12/18/06 11:19p pntruong |
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| 157 | * PR22577: Merged back to mainline. |
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| 158 | * |
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| 159 | * Hydra_Software_Devel/Refsw_Devel_3563/4 11/22/06 3:51p syang |
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| 160 | * PR 26151: re-write shared resource manager. update letter box, mad, dnr |
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| 161 | * shared-scl acquire/release code accordingly |
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| 162 | * |
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| 163 | * Hydra_Software_Devel/Refsw_Devel_3563/3 11/16/06 1:54p hongtaoz |
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| 164 | * PR25668: merge in vdc support for 7403; |
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| 165 | * |
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| 166 | * Hydra_Software_Devel/Refsw_Devel_3563/2 10/23/06 2:44p tdo |
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| 167 | * PR 23384: Increase MAX_ENTRY_PER_RUL to acomodate 10-bits table size |
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| 168 | * |
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| 169 | * Hydra_Software_Devel/Refsw_Devel_3563/1 9/20/06 6:23p tdo |
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| 170 | * PR 23379, PR 23380, PR 23382, PR 23384: Increase MAX entries per RUL to |
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| 171 | * handle PEP table writes |
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| 172 | * |
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| 173 | * Hydra_Software_Devel/82 8/29/06 11:00a hongtaoz |
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| 174 | * PR23246: add new QDAC support for 3563; centralize some chip-specific |
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| 175 | * display macroes into bvdc_common_priv.h; |
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| 176 | * |
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| 177 | * Hydra_Software_Devel/81 8/22/06 5:36p pntruong |
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| 178 | * PR23674: Support CSC auto detection in HDMI. Added supporting |
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| 179 | * RGB/YCrCb444/YCrCb422 input colorspace. Thru eYCbCrType and |
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| 180 | * eMatrixCoefficients in BAVC_VDC_HdDvi_Picture. |
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| 181 | * |
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| 182 | * Hydra_Software_Devel/80 8/18/06 4:24p albertl |
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| 183 | * PR23117: Added 7440 support. |
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| 184 | * |
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| 185 | * Hydra_Software_Devel/79 8/14/06 1:54p tdo |
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| 186 | * PR 23456: Moving large array of local variables into handle context |
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| 187 | * |
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| 188 | * Hydra_Software_Devel/78 8/7/06 5:32p pntruong |
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| 189 | * PR22577: Initial bringup of VDC. |
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| 190 | * |
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| 191 | * Hydra_Software_Devel/77 7/13/06 10:56a jessem |
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| 192 | * PR 22389: Added BVDC_P_MapSrcFrameRateToVerticalRefreshRate_isr. |
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| 193 | * |
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| 194 | * Hydra_Software_Devel/76 6/15/06 4:45p hongtaoz |
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| 195 | * PR20716, PR21804: support individual mosaic rectangles visibility; |
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| 196 | * |
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| 197 | * Hydra_Software_Devel/75 6/14/06 1:42p syang |
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| 198 | * PR 21689: add support for 7118 |
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| 199 | * |
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| 200 | * Hydra_Software_Devel/74 5/10/06 3:26p jessem |
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| 201 | * PR 17530: Added BTMR_Handle and BTMR_TimerHandle to BVDC_P_Context. |
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| 202 | * |
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| 203 | * Hydra_Software_Devel/73 3/7/06 4:03p syang |
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| 204 | * PR 19670: added 7438 support |
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| 205 | * |
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| 206 | * Hydra_Software_Devel/72 2/9/06 4:15p pntruong |
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| 207 | * PR19270: HDCP glitches at wrap of Sarnoff 1080i DYNPICTS.TRP stream. |
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| 208 | * Update hdmi rate manager in vertical blanking to avoid glitches. |
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| 209 | * |
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| 210 | * Hydra_Software_Devel/70 1/17/06 4:19p hongtaoz |
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| 211 | * PR19082: first compiled for 7400; |
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| 212 | * |
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| 213 | * Hydra_Software_Devel/69 1/12/06 1:33p hongtaoz |
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| 214 | * PR18233: added mosaic mode support; |
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| 215 | * |
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| 216 | * Hydra_Software_Devel/MosaicMode_Feature_PR18233/1 12/8/05 6:50p hongtaoz |
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| 217 | * PR18233: add Mosaic mode support (single window working); |
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| 218 | * |
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| 219 | * Hydra_Software_Devel/68 9/20/05 4:39p pntruong |
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| 220 | * PR17153: Request to implement a full SCART solution for European |
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| 221 | * market. Added flag to control vec swap. |
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| 222 | * |
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| 223 | * Hydra_Software_Devel/67 8/18/05 1:18p pntruong |
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| 224 | * PR15757, PR16391, PR16411, PR12519, PR14791, PR15535, PR15206, PR15778: |
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| 225 | * Improved bandwidth for cropping/scaler/capture/playback. Unified |
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| 226 | * window shutdown sequence for destroy, reconfigure mad/scaler, and/or |
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| 227 | * reconfigure result of source changes. And miscellances fixes from |
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| 228 | * above PRs. |
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| 229 | * |
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| 230 | * Hydra_Software_Devel/XVDPhase1/XVDPhase1_merge/2 8/17/05 5:01p pntruong |
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| 231 | * PR12519: Take in additional fixes from mainline, no need to use crc for |
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| 232 | * drain use vec takeover. |
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| 233 | * |
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| 234 | * Hydra_Software_Devel/XVDPhase1/XVDPhase1_merge/1 8/16/05 2:01p pntruong |
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| 235 | * PR12519: Take in additional fixes from mainline. |
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| 236 | * |
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| 237 | * Hydra_Software_Devel/XVDPhase1/4 5/26/05 5:49p pntruong |
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| 238 | * PR15321, PR15510, PR15560, PR15563: Additional hd_dvi channel change |
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| 239 | * work. |
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| 240 | * |
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| 241 | * Hydra_Software_Devel/XVDPhase1/3 5/6/05 4:00p pntruong |
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| 242 | * PR13121, PR12519: Added support for xvd hd/sd simul mode. |
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| 243 | * |
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| 244 | * Hydra_Software_Devel/XVDPhase1/2 5/3/05 8:34p pntruong |
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| 245 | * PR15084: Additional work on hddvi input format change. |
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| 246 | * |
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| 247 | * Hydra_Software_Devel/XVDPhase1/1 5/2/05 4:54p pntruong |
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| 248 | * PR12519, PR13121, PR15048, PR15084, PR15100: Dynamically re-allocate |
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| 249 | * capture in bvn path to reduce memory consumption and bandwith. |
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| 250 | * |
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| 251 | * Hydra_Software_Devel/1 5/1/05 4:55p pntruong |
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| 252 | * XVDPhase1 branch off. Temp storage so we can keep track of changes. |
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| 253 | * |
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| 254 | * Hydra_Software_Devel/65 4/8/05 3:38p pntruong |
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| 255 | * PR14018, PR14011, PR14450, PR14648: Vec to generate fake trigger when |
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| 256 | * source is pulled or not configured correctly or any condition that |
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| 257 | * cause source to lose trigger. This vec's fake trigger enable the |
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| 258 | * applychanges to go thru, and does not result in timeout. |
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| 259 | * |
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| 260 | * Hydra_Software_Devel/64 3/21/05 3:32p pntruong |
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| 261 | * PR14494: Added reset for bvn blocks at startup. |
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| 262 | * |
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| 263 | * Hydra_Software_Devel/63 3/18/05 6:30p pntruong |
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| 264 | * PR14494: Basic vdc up and running. Background and passed output format |
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| 265 | * switch test. |
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| 266 | * |
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| 267 | * Hydra_Software_Devel/62 3/17/05 6:40p pntruong |
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| 268 | * PR14494: Add preliminary software support to 3560 A0. |
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| 269 | * |
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| 270 | * Hydra_Software_Devel/61 2/22/05 12:53p pntruong |
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| 271 | * PR14046: While in mirror mode with PIP, VDC times out when toggling |
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| 272 | * between analog and digital channel. |
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| 273 | * |
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| 274 | * Hydra_Software_Devel/60 1/26/05 4:53p pntruong |
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| 275 | * PR13450, PR12854, PR13549, PR13617, PR13618, PR13683, PR13321, PR13646, |
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| 276 | * PR13447, PR13429: Disabled vec triggers when vec reset (e.g. format |
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| 277 | * change) to prevent it from continuosly executing same register update |
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| 278 | * list that cause system locked up and/or causing vec errors. |
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| 279 | * |
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| 280 | * Hydra_Software_Devel/59 12/10/04 2:57p pntruong |
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| 281 | * PR1344: Added initial C0 Support for VDC. |
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| 282 | * |
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| 283 | ***************************************************************************/ |
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| 284 | #ifndef BVDC_PRIV_H__ |
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| 285 | #define BVDC_PRIV_H__ |
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| 286 | |
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| 287 | #include "bvdc.h" |
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| 288 | #include "bkni.h" |
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| 289 | #include "bchp_common.h" |
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| 290 | #include "bvdc_common_priv.h" |
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| 291 | #include "bvdc_resource_priv.h" |
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| 292 | #include "bchp_misc.h" |
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| 293 | #include "btmr.h" |
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| 294 | |
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| 295 | #ifdef __cplusplus |
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| 296 | extern "C" { |
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| 297 | #endif |
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| 298 | |
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| 299 | BDBG_OBJECT_ID_DECLARE(BVDC_VDC); |
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| 300 | BDBG_OBJECT_ID_DECLARE(BVDC_SRC); |
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| 301 | BDBG_OBJECT_ID_DECLARE(BVDC_CMP); |
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| 302 | BDBG_OBJECT_ID_DECLARE(BVDC_WIN); |
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| 303 | BDBG_OBJECT_ID_DECLARE(BVDC_DSP); |
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| 304 | |
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| 305 | /* B0 does not support Letterbox Detection and VBI Pass through together */ |
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| 306 | #define B0_NO_LETTERBOX_DETECTION_AND_VBI_PASS_THROUGH_COMBO (1) |
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| 307 | |
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| 308 | /* */ |
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| 309 | #define BVDC_P_SUPPORT_TDAC_VER_0 (0) /* 3563 */ |
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| 310 | #define BVDC_P_SUPPORT_TDAC_VER_1 (1) /* 7401, 7403, 7118 */ |
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| 311 | #define BVDC_P_SUPPORT_TDAC_VER_2 (2) /* 7400 */ |
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| 312 | #define BVDC_P_SUPPORT_TDAC_VER_3 (3) /* 7405A0, 7325 */ |
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| 313 | #define BVDC_P_SUPPORT_TDAC_VER_4 (4) /* 7405Bx, 7335 */ |
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| 314 | #define BVDC_P_SUPPORT_TDAC_VER_5 (5) /* 3548, 3556 */ |
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| 315 | #define BVDC_P_SUPPORT_TDAC_VER_6 (6) /* 7420 */ |
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| 316 | #define BVDC_P_SUPPORT_TDAC_VER_7 (7) /* 7340, 7342 */ |
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| 317 | #define BVDC_P_SUPPORT_TDAC_VER_8 (8) /* 7550: no DAC_BG_CTRL_1 */ |
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| 318 | #define BVDC_P_SUPPORT_TDAC_VER_9 (9) /* 7422: add DAC detection */ |
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| 319 | #define BVDC_P_SUPPORT_TDAC_VER_10 (10) /* 7425 B0: new DAC grouping, DAC detection logic not working */ |
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| 320 | #define BVDC_P_SUPPORT_TDAC_VER_11 (11) /* DAC detection logic working */ |
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| 321 | |
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| 322 | #define BVDC_P_SUPPORT_QDAC_VER_0 (0) |
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| 323 | #define BVDC_P_SUPPORT_QDAC_VER_1 (1) /* 7400, 3563 */ |
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| 324 | |
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| 325 | #ifndef BVDC_SUPPORT_BVN_DEBUG |
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| 326 | #define BVDC_SUPPORT_BVN_DEBUG (0) |
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| 327 | #endif |
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| 328 | |
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| 329 | /* Display cracking macros. */ |
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| 330 | #define BVDC_P_DISP_GET_REG_IDX(reg) \ |
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| 331 | ((BCHP##_##reg - BCHP_MISC_REG_START) / sizeof(uint32_t)) |
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| 332 | |
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| 333 | /* Get/Set reg data */ |
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| 334 | #define BVDC_P_VDC_GET_MISC_REG_DATA(reg) \ |
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| 335 | (hVdc->aulMiscRegs[BVDC_P_DISP_GET_REG_IDX(reg)]) |
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| 336 | |
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| 337 | #define BVDC_P_DISP_GET_REG_DATA(reg) \ |
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| 338 | (hDisplay->hVdc->aulMiscRegs[BVDC_P_DISP_GET_REG_IDX(reg)]) |
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| 339 | #define BVDC_P_DISP_SET_REG_DATA(reg, data) \ |
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| 340 | (BVDC_P_DISP_GET_REG_DATA(reg) = (uint32_t)(data)) |
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| 341 | |
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| 342 | /* Get field */ |
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| 343 | #define BVDC_P_DISP_GET_FIELD_NAME(reg, field) \ |
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| 344 | (BVDC_P_GET_FIELD(BVDC_P_DISP_GET_REG_DATA(reg), reg, field)) |
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| 345 | |
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| 346 | /* Compare field */ |
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| 347 | #define BVDC_P_DISP_COMPARE_FIELD_DATA(reg, field, data) \ |
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| 348 | (BVDC_P_COMPARE_FIELD_DATA(BVDC_P_DISP_GET_REG_DATA(reg), reg, field, (data))) |
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| 349 | #define BVDC_P_DISP_COMPARE_FIELD_NAME(reg, field, name) \ |
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| 350 | (BVDC_P_COMPARE_FIELD_NAME(BVDC_P_DISP_GET_REG_DATA(reg), reg, field, name)) |
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| 351 | |
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| 352 | /* number of registers in one block. */ |
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| 353 | #define BVDC_P_DISP_REGS_COUNT \ |
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| 354 | BVDC_P_REGS_ENTRIES(MISC_REG_START, MISC_REG_END) |
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| 355 | |
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| 356 | /* This macro does a write into RUL (write, addr, data). 3 dwords. */ |
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| 357 | #define BVDC_P_DISP_WRITE_TO_RUL(reg, addr_ptr) \ |
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| 358 | do { \ |
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| 359 | *addr_ptr++ = BRDC_OP_IMM_TO_REG(); \ |
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| 360 | *addr_ptr++ = BRDC_REGISTER(BCHP##_##reg); \ |
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| 361 | *addr_ptr++ = BVDC_P_DISP_GET_REG_DATA(reg); \ |
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| 362 | } while(0) |
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| 363 | |
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| 364 | /* Max length for BVN error msg */ |
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| 365 | #define BVDC_P_ERROR_MAX_MSG_LENGTH (256) |
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| 366 | |
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| 367 | #define BVDC_P_CLIPRECT_PERCENT (10000) |
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| 368 | |
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| 369 | #ifndef BVDC_UINT32_ONLY |
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| 370 | #define uintAR_t uint64_t |
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| 371 | #define BVDC_P_ASPR_FRAC_BITS_NUM (40) |
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| 372 | #else |
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| 373 | #define uintAR_t uint32_t |
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| 374 | /* for well bounded value such as pixel and full aspect ratio value */ |
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| 375 | #define BVDC_P_ASPR_FRAC_BITS_NUM (16) |
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| 376 | #endif |
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| 377 | |
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| 378 | |
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| 379 | /*************************************************************************** |
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| 380 | * VDC Internal data structures |
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| 381 | ***************************************************************************/ |
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| 382 | typedef struct BVDC_P_Context |
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| 383 | { |
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| 384 | BDBG_OBJECT(BVDC_VDC) |
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| 385 | |
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| 386 | /* public fields */ |
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| 387 | BVDC_Settings stSettings; |
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| 388 | |
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| 389 | /* handed down from app. */ |
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| 390 | BCHP_Handle hChip; |
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| 391 | BREG_Handle hRegister; |
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| 392 | BMEM_Heap_Handle hMemory; |
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| 393 | BINT_Handle hInterrupt; |
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| 394 | BRDC_Handle hRdc; |
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| 395 | BTMR_Handle hTmr; |
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| 396 | |
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| 397 | /* Created during BVDC_Open via a call to BVDC_P_InitTimer */ |
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| 398 | BTMR_TimerHandle hTimer; |
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| 399 | |
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| 400 | /* These handle get defer allocation until used by app. */ |
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| 401 | BVDC_Source_Handle ahSource[BVDC_P_MAX_SOURCE_COUNT]; |
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| 402 | BVDC_Display_Handle ahDisplay[BVDC_P_MAX_DISPLAY_COUNT]; |
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| 403 | BVDC_Compositor_Handle ahCompositor[BVDC_P_MAX_COMPOSITOR_COUNT]; |
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| 404 | |
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| 405 | BVDC_P_BufferHeap_Handle hBufferHeap; |
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| 406 | |
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| 407 | /* Allocated hardware resources */ |
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| 408 | const BVDC_P_Features *pFeatures; |
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| 409 | BVDC_P_Resource_Handle hResource; |
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| 410 | |
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| 411 | /* Swap compositor/vec! cmp_0 -> prim vs. cmp_0 -> sec */ |
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| 412 | bool bSwapVec; |
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| 413 | |
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| 414 | /* Store other var that is global to VDC here. If it's has window, |
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| 415 | * compositor, display, or source scope store it in respectives context. */ |
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| 416 | BVDC_Compositor_Handle hCmpCheckSource; |
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| 417 | |
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| 418 | /* Misc register (VEC's top-level registers) */ |
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| 419 | uint32_t aulMiscRegs[BVDC_P_DISP_REGS_COUNT]; |
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| 420 | uint32_t ulInsideCs; |
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| 421 | |
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| 422 | BINT_CallbackHandle ahErrHandlerCb[BVDC_P_ERROR_INTR_CB_COUNT]; |
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| 423 | |
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| 424 | /* HD_DVI register shared between BVDC_P_HdDviId_eHdDvi0 and |
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| 425 | * BVDC_P_HdDviId_eHdDvi1. Need to keep track of it here to |
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| 426 | * work around the RDC read/modify/write problem */ |
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| 427 | uint32_t ulHdDviBvbReg; |
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| 428 | uint32_t ulHdDviChMapReg; |
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| 429 | |
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| 430 | #if BVDC_P_SUPPORT_MOSAIC_MODE |
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| 431 | /* capture drain buffer for mosaic mode, shared by all captures; */ |
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| 432 | void *pvVdcNullBufAddr; |
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| 433 | uint32_t ulVdcNullBufOffset; |
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| 434 | #endif |
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| 435 | |
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| 436 | /* FGT Noise Pixel Pattern Table */ |
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| 437 | uint8_t *pucFgtPatTblAddr; |
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| 438 | |
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| 439 | /* Store the generic BVN error msg */ |
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| 440 | char achBuf[BVDC_P_ERROR_MAX_MSG_LENGTH]; |
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| 441 | uint32_t ulApplyCnt; |
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| 442 | bool bForcePrint; |
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| 443 | |
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| 444 | #if BVDC_P_ORTHOGONAL_VEC |
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| 445 | BVDC_DacOutput aDacOutput[BVDC_P_MAX_DACS]; |
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| 446 | uint32_t aDacDisplay[BVDC_P_MAX_DACS]; |
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| 447 | bool bCalibrated; |
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| 448 | bool bDacDetectionEnable; |
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| 449 | const uint32_t *aulDacGrouping; |
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| 450 | #endif |
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| 451 | |
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| 452 | /* Standby state */ |
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| 453 | bool bStandby; |
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| 454 | |
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| 455 | } BVDC_P_Context; |
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| 456 | |
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| 457 | |
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| 458 | /*************************************************************************** |
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| 459 | * VDC private functions |
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| 460 | ***************************************************************************/ |
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| 461 | void BVDC_P_CompositorDisplay_isr |
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| 462 | ( void *pvParam1, |
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| 463 | int iParam2 ); |
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| 464 | |
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| 465 | void BVDC_P_BuildNoOpsRul_isr |
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| 466 | ( BRDC_List_Handle hList ); |
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| 467 | |
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| 468 | void BVDC_P_ReadListInfo_isr |
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| 469 | ( BVDC_P_ListInfo *pList, |
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| 470 | BRDC_List_Handle hList ); |
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| 471 | |
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| 472 | void BVDC_P_WriteListInfo_isr |
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| 473 | ( const BVDC_P_ListInfo *pList, |
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| 474 | BRDC_List_Handle hList ); |
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| 475 | |
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| 476 | void BVDC_P_Dither_Init |
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| 477 | ( BVDC_P_DitherSetting *pDitherSetting, |
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| 478 | uint32_t ulLfsrCtrlT0, |
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| 479 | uint32_t ulLfsrCtrlT1, |
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| 480 | uint32_t ulLfsrCtrlT2, |
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| 481 | uint32_t ulLfsrValue ); |
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| 482 | |
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| 483 | BERR_Code BVDC_P_CreateErrCb |
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| 484 | ( BVDC_P_Context *pVdc ); |
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| 485 | |
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| 486 | BERR_Code BVDC_P_DestroyErrCb |
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| 487 | ( BVDC_P_Context *pVdc ); |
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| 488 | |
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| 489 | void BVDC_P_CalculateRect_isr |
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| 490 | ( const BVDC_ClipRect *pClipRect, |
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| 491 | uint32_t ulWidth, |
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| 492 | uint32_t ulHeight, |
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| 493 | bool bInterlaced, |
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| 494 | BVDC_P_Rect *pRect ); |
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| 495 | |
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| 496 | bool BVDC_P_CbIsDirty |
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| 497 | (void *pDirty, |
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| 498 | uint32_t ulSize ); |
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| 499 | |
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| 500 | void BVDC_P_CalcuPixelAspectRatio_isr( |
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| 501 | BFMT_AspectRatio eFullAspectRatio, /* full asp ratio enum */ |
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| 502 | uint32_t ulSampleAspectRatioX, /* width of one sampled src pixel */ |
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| 503 | uint32_t ulSampleAspectRatioY, /* height of one sampled src pixel */ |
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| 504 | uint32_t ulFullWidth, /* full asp ratio width */ |
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| 505 | uint32_t ulFullHeight, /* full asp ratio height */ |
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| 506 | const BVDC_P_ClipRect* pAspRatCnvsClip, /* asp rat cnvs clip */ |
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| 507 | uintAR_t * pulPxlAspRatio, /* PxlAspR_int.PxlAspR_frac */ |
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| 508 | uint32_t * pulPxlAspRatio_x_y); /* PxlAspR_x<<16 | PxlAspR_y */ |
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| 509 | |
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| 510 | bool BVDC_P_IsPxlfmtSupported |
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| 511 | (BPXL_Format ePxlFmt); |
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| 512 | |
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| 513 | #ifdef __cplusplus |
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| 514 | } |
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| 515 | #endif |
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| 516 | |
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| 517 | #endif /* #ifndef BVDC_PRIV_H__ */ |
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| 518 | /* End of file. */ |
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