source: svn/trunk/newcon3bcm2_21bu/magnum/portinginterface/xpt/7552/bxpt_pcr.c

Last change on this file was 2, checked in by phkim, 11 years ago

1.phkim

  1. revision copy newcon3sk r27
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1/***************************************************************************
2 *     Copyright (c) 2003-2011, Broadcom Corporation
3 *     All Rights Reserved
4 *     Confidential Property of Broadcom Corporation
5 *
6 *  THIS SOFTWARE MAY ONLY BE USED SUBJECT TO AN EXECUTED SOFTWARE LICENSE
7 *  AGREEMENT  BETWEEN THE USER AND BROADCOM.  YOU HAVE NO RIGHT TO USE OR
8 *  EXPLOIT THIS MATERIAL EXCEPT SUBJECT TO THE TERMS OF SUCH AN AGREEMENT.
9 *
10 * $brcm_Workfile: bxpt_pcr.c $
11 * $brcm_Revision: Hydra_Software_Devel/7 $
12 * $brcm_Date: 9/12/11 4:36p $
13 *
14 * Module Description:
15 *
16 * Revision History:
17 *
18 * $brcm_Log: /magnum/portinginterface/xpt/base2/bxpt_pcr.c $
19 *
20 * Hydra_Software_Devel/7   9/12/11 4:36p gmullen
21 * SW7344-193: Merged changes to Hydra
22 *
23 * Hydra_Software_Devel/SW7344-193/1   9/7/11 4:34p gmullen
24 * SW7344-193: Added tri-state logic to jitter API
25 *
26 * Hydra_Software_Devel/6   8/31/11 2:30p gmullen
27 * SW7408-284: Fixed bad arg in call to BREG_Write32
28 *
29 * Hydra_Software_Devel/5   5/16/11 4:58p gmullen
30 * SW7408-284: Added support for jitter adjust in PCR hw to PI
31 *
32 * Hydra_Software_Devel/4   11/8/10 4:02p gmullen
33 * SW7422-20: PI can now generate the required INT IDs
34 *
35 * Hydra_Software_Devel/3   11/6/10 4:57p gmullen
36 * SW7422-20: Fixed incorrect register address calc
37 *
38 * Hydra_Software_Devel/2   10/27/10 2:08p gmullen
39 * SW7422-20: Added BXPT_PCR_TimeRef_eHD_DVI_H1 and
40 * BXPT_PCR_TimeRef_eHD_DVI_V1 as placeholders
41 *
42 * Hydra_Software_Devel/39   9/17/09 2:23p piyushg
43 * SW7400-2527: Fix coverity defect.
44 *
45 * Hydra_Software_Devel/38   8/12/09 5:48p gmullen
46 * PR57174: Incorrect check for macro.
47 *
48 * Hydra_Software_Devel/37   8/11/09 10:39a piyushg
49 * PR55216: Added initial 7340 XPT support.
50 *
51 * Hydra_Software_Devel/36   8/5/09 4:52p piyushg
52 * PR55545: Add 7125 XPT PI support
53 * Added file element "bxpt_rave_ihex.c".
54 * Added file element "bxpt_rave_ihex.h".
55 *
56 * Hydra_Software_Devel/35   7/31/09 3:27p piyushg
57 * PR56771: Add support for 7342.
58 *
59 * Hydra_Software_Devel/34   7/31/09 3:24p gmullen
60 * PR54331: Fixed compilation bug in 7405.
61 *
62 * Hydra_Software_Devel/33   7/31/09 2:44p gmullen
63 * PR54331: Added 35130 to XPT support.
64 *
65 * Hydra_Software_Devel/32   7/14/09 10:22a piyushg
66 * PR56771: Add XPT PI code for 7342.
67 *
68 * Hydra_Software_Devel/31   6/17/09 6:46p gmullen
69 * PR56110: Added support.xpt/7550/uif_image/a0
70 *
71 * Hydra_Software_Devel/30   6/8/09 3:05p piyushg
72 * PR53746: Remove DSS packetmode restriction for
73 * BXPT_PCR_GetPhaseError_isr.
74 *
75 * Hydra_Software_Devel/29   5/11/09 5:10p piyushg
76 * PR53746: Added xpt interface for retrieving phase error at isr time
77 * BXPT_PCR_GetPhaseError_isr().
78 *
79 * Hydra_Software_Devel/28   4/7/09 5:25p piyushg
80 * PR52986: Add support for 7635
81 * Added directory element "7635".
82 *
83 * Hydra_Software_Devel/27   2/24/09 9:36a gmullen
84 * PR 52429: Merged fix from wince_7400 branch
85 *
86 * Hydra_Software_Devel/wince_7400/1   2/24/09 9:28a gmullen
87 * PR 52429: Block redudant writes to filter coeffs and reference
88 * polarity.
89 *
90 * Hydra_Software_Devel/26   2/6/09 11:36a gmullen
91 * PR51625: Fixed conditional compilation error for 7336.
92 *
93 * Hydra_Software_Devel/25   2/5/09 12:12p piyushg
94 * PR51625: Added 7336 support
95 *
96 * Hydra_Software_Devel/24   1/27/09 1:09p gmullen
97 * PR51625: Added 7336 support
98 *
99 * Hydra_Software_Devel/23   11/26/08 4:14p gmullen
100 * PR47755: Added support for 7420.
101 *
102 * Hydra_Software_Devel/22   11/10/08 9:07a gmullen
103 * PR48128: Added playback support for 7325/7335. Removed redundant code.
104 *
105 * Hydra_Software_Devel/21   9/12/08 2:21p gmullen
106 * PR46659: Added 3556/3548 B0 support
107 *
108 * Hydra_Software_Devel/20   9/12/08 11:27a gmullen
109 * PR46659: Added B0 support
110 *
111 * Hydra_Software_Devel/19   9/8/08 12:05p piyushg
112 * PR46621: Added default values for BXPT_PCR_TimeRef_eInternal in
113 * BXPT_PCR_GetTimeBaseFreqRefDefaults().
114 *
115 * Hydra_Software_Devel/18   8/15/08 10:47a gmullen
116 * PR45362: Removed calls to BKNI_Enter/LeaveCriticalSectionISR()
117 *
118 * Hydra_Software_Devel/17   8/8/08 5:47p gmullen
119 * PR45362: Merged SanJose_CDI_Devel changes to Hydra_Software_Devel
120 *
121 * Hydra_Software_Devel/16   8/4/08 5:35p gmullen
122 * PR45240: Added support for playbacks as a source for
123 * BXPT_PCR_SetStreamPcrConfig, for 3556/3548
124 *
125 * Hydra_Software_Devel/15   2/27/08 4:16p katrep
126 * PR36900: Added playvack support for 7325 and 7335
127 *
128 * Hydra_Software_Devel/14   2/5/08 3:10p piyushg
129 * PR38634: Change XPT_DPCR0_STC_EXT_CTRL to XPT_DPCR0_REF_PCR
130 * in BXPT_PCR_SetStreamPcrConfig function.
131 *
132 * Hydra_Software_Devel/13   2/5/08 8:19a gmullen
133 * PR39329: Added ISR version of GetLastPcr.
134 *
135 * Hydra_Software_Devel/12   10/11/07 9:37a gmullen
136 * PR35998: Wrong register used to set Prescale and Inc bitfields.
137 *
138 * Hydra_Software_Devel/11   8/15/07 4:52p gmullen
139 * PR34082: Added filter coefficients to BXPT_PCR_XptStreamPcrCfg struct.
140 *
141 * Hydra_Software_Devel/10   7/18/07 1:38p gmullen
142 * PR33106: Added BXPT_PCR_SetCenterFrequency()
143 *
144 * Hydra_Software_Devel/9   3/22/07 9:35a gmullen
145 * PR28959: Added support for playback streams.
146 *
147 * Hydra_Software_Devel/8   12/12/06 12:22p katrep
148 * PR25767: program the Packet Mode according to the stream type.
149 *
150 * Hydra_Software_Devel/7   11/10/06 5:47p katrep
151 * PR25737: Added BXPT_PCR_SetTimeRefTrackRange API.
152 *
153 * Hydra_Software_Devel/6   8/18/06 10:13a gmullen
154 * PR23345: Added MaxPcrError to Get/SetSettings calls.
155 *
156 * Hydra_Software_Devel/5   8/2/06 4:33p gmullen
157 * PR23137: Added support to GetPcrStreamCfg
158 *
159 * Hydra_Software_Devel/4   8/2/06 3:56p gmullen
160 * PR23137: Added support for playback data to PCR block.
161 *
162 * Hydra_Software_Devel/3   4/18/06 9:52a gmullen
163 * PR18998: Close() call was writing to wrong register.
164 *
165 * Hydra_Software_Devel/2   4/12/06 10:34a gmullen
166 * PR20631: Added compilation checks for 7401 B0
167 *
168 * Hydra_Software_Devel/3   9/26/05 4:40p gmullen
169 * PR15309: Removed support for loading user STCs. That support is now in
170 * bxpt_pcr_offset.c
171 *
172 * Hydra_Software_Devel/2   8/12/05 8:57a gmullen
173 * PR15309: Added PCR, PCR Offset, DirecTV, RAVE video, and ITB/CDB
174 * endianess support. Tested same.
175 *
176 * Hydra_Software_Devel/1   8/4/05 8:14a gmullen
177 * PR15309: Added PCR support.
178 *
179 ***************************************************************************/
180
181#include "bstd.h"
182#include "bkni.h"
183#include "bxpt_pcr.h"
184
185#if BXPT_NUM_PCRS > 1
186#include "bchp_xpt_dpcr1.h"
187#endif
188#include "bchp_xpt_dpcr_pp.h"
189#include "bxpt_priv.h"
190 
191BDBG_MODULE( xpt_pcr );
192
193#define XPR_PCR_DEF_MAX_PCR_ERROR  100 
194
195/* Support for automatically scaling the number of DPCR blocks. */
196#ifdef BCHP_XPT_DPCR1_PID_CH
197    #define BXPT_PCR_P_REGOFFSET  (BCHP_XPT_DPCR1_PID_CH - BCHP_XPT_DPCR0_PID_CH)
198#else
199    #define BXPT_PCR_P_REGOFFSET  (BCHP_XPT_DPCR0_PHASE_ERROR_CLAMP - BCHP_XPT_DPCR0_PID_CH)
200#endif
201
202#define RESET_FILTA   7
203#define RESET_FILTB   8
204#define RESET_FILTC   3
205
206static BERR_Code BXPT_PCR_P_Lock2Source( BXPT_PCR_Handle hPcr, BXPT_PCR_TimeRef eTimeRef, BXPT_PCR_TimebaseFreqRefConfig *Timebasefreq );
207static void SetPcrIncAndPrescale( BXPT_PCR_Handle hPcr, const BXPT_PCR_TimebaseFreqRefConfig *Timebasefreq );
208static void GetPcrIncAndPrescale( BXPT_PCR_Handle hPcr, BXPT_PCR_TimebaseFreqRefConfig  *TimebaseFreqConfig );
209
210
211BERR_Code BXPT_PCR_P_Lock2Source(
212    BXPT_PCR_Handle hPcr, 
213    BXPT_PCR_TimeRef eTimeRef,
214    BXPT_PCR_TimebaseFreqRefConfig *Timebasefreq
215    )
216{
217    uint32_t      Reg;
218    uint8_t     FiltA, FiltB, FiltC;
219    BERR_Code     ret = BERR_SUCCESS;
220    BREG_Handle   hRegister = hPcr->hRegister;
221
222    /* Always allow the PRESCALE and PCR_INC to be adjusted */
223    if (Timebasefreq && eTimeRef != BXPT_PCR_TimeRef_eXpt)
224    {
225        SetPcrIncAndPrescale( hPcr, Timebasefreq );
226    }
227
228    /*
229    ** Don't write to the loop filter or polarity bitfields if the values aren't being
230    ** changed. It can cause a glitch that interferes with the HDCP authentication.
231    */
232    if( Timebasefreq )
233    {
234        FiltA = Timebasefreq->FiltA;
235        FiltB = Timebasefreq->FiltB;
236        FiltC = Timebasefreq->FiltC;
237    }
238    else
239    {
240        FiltA = RESET_FILTA;
241        FiltB = RESET_FILTB;
242        FiltC = RESET_FILTC;
243    }
244   
245    Reg = BREG_Read32(hRegister, BCHP_XPT_DPCR0_LOOP_CTRL+ hPcr->RegOffset);
246
247    if( BCHP_GET_FIELD_DATA( Reg, XPT_DPCR0_LOOP_CTRL, TIME_REF ) != eTimeRef
248    || BCHP_GET_FIELD_DATA( Reg, XPT_DPCR0_LOOP_CTRL, FILT_C ) != FiltC
249    || BCHP_GET_FIELD_DATA( Reg, XPT_DPCR0_LOOP_CTRL, FILT_B ) != FiltB
250    || BCHP_GET_FIELD_DATA( Reg, XPT_DPCR0_LOOP_CTRL, FILT_A ) != FiltA
251    )
252    {
253        /* First Set Ref_Polarity to 0-None */
254        Reg = BREG_Read32(hRegister, BCHP_XPT_DPCR0_LOOP_CTRL+ hPcr->RegOffset);
255        Reg &= ~(BCHP_MASK( XPT_DPCR0_LOOP_CTRL, REF_POLARITY ));
256        BREG_Write32( hRegister, BCHP_XPT_DPCR0_LOOP_CTRL + hPcr->RegOffset, Reg);
257   
258        /* do the follow 2 steps if time reference is non-xpt*/
259        /* 1) change frequency time reference in XPT_DPCR0_REF_PCR*/
260        /* 2) Set the packetmode to 1 for non_xpt reference*/
261            /*
262            Does it mean that we are in direct TV mode? 
263            Reg = BREG_Read32(hRegister, BCHP_XPT_DPCR0_CTRL + hPcr->RegOffset);
264            Reg &= ~(BCHP_MASK( XPT_DPCR0_CTRL, PCR_PACKET_MODE ));
265            Reg |= BCHP_FIELD_DATA(XPT_DPCR0_CTRL, PCR_PACKET_MODE,1);
266            BREG_Write32( hRegister, BCHP_XPT_DPCR0_CTRL + hPcr->RegOffset, Reg);
267            */     
268   
269        Reg = BREG_Read32(hRegister, BCHP_XPT_DPCR0_CTRL + hPcr->RegOffset);
270        Reg &= ~(BCHP_MASK( XPT_DPCR0_CTRL, PCR_PACKET_MODE ));
271        Reg |= BCHP_FIELD_DATA( XPT_DPCR0_CTRL, PCR_PACKET_MODE, hPcr->DMode == true ? 1 : 0 );
272        BREG_Write32( hRegister, BCHP_XPT_DPCR0_CTRL + hPcr->RegOffset, Reg);       
273   
274        /* Set the Time_Ref */
275        /* Change the loop constants, if they where given. Otherwise, reload the reset defaults. */
276        Reg = BREG_Read32(hRegister, BCHP_XPT_DPCR0_LOOP_CTRL+ hPcr->RegOffset);
277        Reg &= ~(
278            BCHP_MASK( XPT_DPCR0_LOOP_CTRL, TIME_REF ) |
279            BCHP_MASK( XPT_DPCR0_LOOP_CTRL, FILT_C ) |
280            BCHP_MASK( XPT_DPCR0_LOOP_CTRL, FILT_B ) |
281            BCHP_MASK( XPT_DPCR0_LOOP_CTRL, FILT_A )
282        );
283        Reg |= (
284            BCHP_FIELD_DATA( XPT_DPCR0_LOOP_CTRL, TIME_REF, eTimeRef ) |
285            BCHP_FIELD_DATA( XPT_DPCR0_LOOP_CTRL, FILT_C, FiltC ) |
286            BCHP_FIELD_DATA( XPT_DPCR0_LOOP_CTRL, FILT_B, FiltB ) |
287            BCHP_FIELD_DATA( XPT_DPCR0_LOOP_CTRL, FILT_A, FiltA )
288        );
289        BREG_Write32( hRegister, BCHP_XPT_DPCR0_LOOP_CTRL + hPcr->RegOffset, Reg);
290   
291        /* Set Ref_Polarity to 1*/ 
292        Reg = BREG_Read32(hRegister, BCHP_XPT_DPCR0_LOOP_CTRL+ hPcr->RegOffset);
293        Reg &= ~(BCHP_MASK( XPT_DPCR0_LOOP_CTRL, REF_POLARITY ));
294        Reg |= BCHP_FIELD_DATA( XPT_DPCR0_LOOP_CTRL, REF_POLARITY, 1);
295        BREG_Write32( hRegister, BCHP_XPT_DPCR0_LOOP_CTRL + hPcr->RegOffset, Reg);
296    }
297
298    return ret;
299}
300
301
302BERR_Code BXPT_PCR_GetTotalChannels(
303    BXPT_Handle hXpt,           
304    unsigned int *TotalChannels     
305    )
306{
307    BERR_Code  ret = BERR_SUCCESS;
308    *TotalChannels = hXpt->MaxPcrs;
309    if(!(hXpt->MaxPcrs))
310    {
311        BDBG_ERR(("No PCR Channels Available!"));
312        ret = BERR_TRACE(BERR_INVALID_PARAMETER);
313    }
314    return ret; 
315}
316
317
318BERR_Code BXPT_PCR_GetChannelDefSettings(
319    BXPT_Handle hXpt,                       /* [in] The transport handle - need chip info */
320    unsigned int WhichPcr,                      /* [In] Which pcr module */
321    BXPT_PCR_DefSettings *pcrSettings       /* [out] The default settings of a pcr module */
322    )
323{
324    BERR_Code  ret = BERR_SUCCESS;
325    if ( WhichPcr >= hXpt->MaxPcrs )
326    {
327        ret = BERR_TRACE( BERR_INVALID_PARAMETER );
328        BDBG_ERR(("Pcr number %d exceeds max PCR channels!",WhichPcr));
329        return ret;
330    }   
331    /* the current default setting for all the PCR blocks are the same*/
332    pcrSettings -> PcrTwoErrReaquireEn = 1; 
333    pcrSettings -> MaxPcrError = XPR_PCR_DEF_MAX_PCR_ERROR;
334    return ret;
335}
336
337
338BERR_Code BXPT_PCR_Open(
339    BXPT_Handle hXpt,
340    unsigned int WhichPcr,
341    BXPT_PCR_DefSettings *pcrSettings,
342    BXPT_PCR_Handle *hPcr
343    )
344{
345    BXPT_PCR_Handle     handle;
346    BREG_Handle         hRegister = hXpt->hRegister;
347    uint32_t            Reg;
348    BERR_Code           ret = BERR_SUCCESS;
349
350    BDBG_ASSERT( pcrSettings ); 
351    if ( WhichPcr >= BXPT_NUM_PCRS )
352    {
353        ret = BERR_TRACE(BERR_INVALID_PARAMETER);
354        BDBG_ERR(("Pcr number %d exceeds max PCR channels!",WhichPcr));
355        return ret;
356    }       
357    /* allocate pcr channel handle */
358    handle = (BXPT_P_PcrHandle_Impl * )BKNI_Malloc( sizeof(BXPT_P_PcrHandle_Impl));     
359    if ( handle == NULL )
360    {
361        ret = BERR_TRACE(BERR_OUT_OF_DEVICE_MEMORY);
362        return ret;
363    }
364       
365    handle->hRegister = hXpt->hRegister;
366    handle->ChannelNo = WhichPcr;
367    handle->RegOffset = WhichPcr * BXPT_PCR_P_REGOFFSET;
368    handle->DMode = false;
369    handle->vhXpt = ( void * ) hXpt;
370   
371    hXpt->PcrHandles[WhichPcr] = handle;
372    *hPcr = handle;
373
374    /* set the default settings */
375    BREG_Write32( hRegister, BCHP_XPT_DPCR0_MAX_PCR_ERROR + handle->RegOffset, pcrSettings->MaxPcrError);
376
377    Reg = BREG_Read32(hRegister, BCHP_XPT_DPCR0_CTRL + handle->RegOffset);
378    Reg &= ~(BCHP_MASK( XPT_DPCR0_CTRL, PCR_TWO_ERR_REACQUIRE_EN ));
379    Reg |=  BCHP_FIELD_DATA( XPT_DPCR0_CTRL, PCR_TWO_ERR_REACQUIRE_EN, pcrSettings->PcrTwoErrReaquireEn); 
380    BREG_Write32( hRegister, BCHP_XPT_DPCR0_CTRL + handle->RegOffset, Reg);
381
382    /* This reg is shared by all DPCR instances, so init only on the first open. */
383    if( !hXpt->DpcrRefCount++ ) 
384    {
385        BREG_Write32( hRegister, BCHP_XPT_DPCR_PP_PP_CTRL, 0 );
386    }
387
388    return ret;
389}
390
391
392BERR_Code BXPT_PCR_Close(
393    BXPT_PCR_Handle hPcr
394    )
395{
396    uint32_t      Reg;
397    BERR_Code     ret = BERR_SUCCESS;
398    BREG_Handle   hRegister = hPcr->hRegister;
399    BXPT_Handle   lhXpt = ( BXPT_Handle ) hPcr->vhXpt;
400
401    lhXpt->PcrHandles[ hPcr->ChannelNo ] = ( void * ) NULL;
402
403    if( ! --lhXpt->DpcrRefCount ) 
404    {
405        BREG_Write32( hRegister, BCHP_XPT_DPCR_PP_PP_CTRL, 0 );
406    }
407
408    /* set pid_valid_bit to 0 in case it is still active*/
409    Reg = BREG_Read32(hRegister, BCHP_XPT_DPCR0_PID_CH  + hPcr->RegOffset);
410    Reg &= ~(BCHP_MASK( XPT_DPCR0_PID_CH , PCR_PID_CH_VALID)); 
411    BREG_Write32( hRegister, BCHP_XPT_DPCR0_PID_CH + hPcr->RegOffset, Reg);
412
413    BKNI_Free(hPcr);
414    return ret;
415}
416
417
418BERR_Code   BXPT_PCR_GetStreamPcrConfig( 
419    BXPT_PCR_Handle hPcr,                         
420    BXPT_PCR_XptStreamPcrCfg *PcrCfg             
421    )
422{
423    BREG_Handle         hRegister = hPcr->hRegister;
424    BXPT_Handle hXpt = (BXPT_Handle) hPcr->vhXpt;
425    uint32_t            Reg;
426    uint32_t StreamSelect;
427    BERR_Code           ret = BERR_SUCCESS;
428
429    BDBG_ENTER(BXPT_PCR_GetStreamPcrConfig);
430
431    BSTD_UNUSED( StreamSelect );
432
433    PcrCfg->JitterTimestamp = hXpt->JitterTimestamp[ hPcr->ChannelNo ];
434    PcrCfg->PbJitterDisable = hXpt->PbJitterDisable[ hPcr->ChannelNo ];
435    PcrCfg->LiveJitterDisable = hXpt->LiveJitterDisable[ hPcr->ChannelNo ];
436
437    Reg = BREG_Read32(hRegister, BCHP_XPT_DPCR0_PID_CH  + hPcr->RegOffset);
438    PcrCfg->PidChannel = BCHP_GET_FIELD_DATA(Reg, XPT_DPCR0_PID_CH , PCR_PID_CH);
439    PcrCfg->MaxPcrError = BREG_Read32( hRegister, BCHP_XPT_DPCR0_MAX_PCR_ERROR + hPcr->RegOffset );
440    ret = BXPT_PCR_GetfreqRefConfig( hPcr, &PcrCfg->TimebaseCfg );
441
442    BDBG_LEAVE(BXPT_PCR_GetStreamPcrConfig);
443
444    return ret;
445}
446
447BERR_Code   BXPT_PCR_SetStreamPcrConfig( 
448    BXPT_PCR_Handle hPcr,                               
449    const BXPT_PCR_XptStreamPcrCfg *PcrCfg
450    )
451{
452    BERR_Code ret = BERR_SUCCESS;
453 
454    BKNI_EnterCriticalSection();
455    ret = BXPT_PCR_SetStreamPcrConfig_isr( hPcr, PcrCfg );
456    BKNI_LeaveCriticalSection();
457    return ret;
458}
459
460BERR_Code   BXPT_PCR_SetStreamPcrConfig_isr( 
461    BXPT_PCR_Handle hPcr,                               
462    const BXPT_PCR_XptStreamPcrCfg *PcrCfg
463    )
464{
465    BREG_Handle         hRegister = hPcr->hRegister;
466    BXPT_Handle hXpt = (BXPT_Handle) hPcr->vhXpt;
467    uint32_t            Reg;
468    BERR_Code           ret = BERR_SUCCESS;
469    uint32_t            tempStreamSelect = 0;
470    unsigned JitterTimestamp, PbJitterDisable, LiveJitterDisable;
471
472    BDBG_ENTER(BXPT_PCR_SetStreamPcrConfig_isr);
473
474    BSTD_UNUSED( tempStreamSelect );
475
476    if( PcrCfg->JitterTimestamp >= BXPT_PCR_JitterTimestampMode_eMax ) 
477    {
478        BDBG_ERR(( "Invalid jitter timestamp mode %u", PcrCfg->JitterTimestamp ));
479        ret = BERR_TRACE(BERR_INVALID_PARAMETER);
480        goto Done;
481    }
482
483    Reg = BREG_Read32(hRegister, BCHP_XPT_DPCR_PP_PP_CTRL );
484    JitterTimestamp = BCHP_GET_FIELD_DATA( Reg, XPT_DPCR_PP_PP_CTRL , PP_JITTER_TIMESTAMP_MODE );
485    PbJitterDisable = BCHP_GET_FIELD_DATA( Reg, XPT_DPCR_PP_PP_CTRL , PP_PLAYBACK_PCR_JITTER_DIS );
486    LiveJitterDisable = BCHP_GET_FIELD_DATA( Reg, XPT_DPCR_PP_PP_CTRL , PP_LIVE_PCR_JITTER_DIS );
487
488    if( PcrCfg->JitterTimestamp != BXPT_PCR_JitterTimestampMode_eAuto )
489    {
490        JitterTimestamp = PcrCfg->JitterTimestamp;
491    }
492    hXpt->JitterTimestamp[ hPcr->ChannelNo ] = PcrCfg->JitterTimestamp;
493
494    if( PcrCfg->PbJitterDisable != BXPT_PCR_JitterCorrection_eAuto )
495    {
496        PbJitterDisable = PcrCfg->PbJitterDisable;
497    }
498    hXpt->PbJitterDisable[ hPcr->ChannelNo ] = PcrCfg->PbJitterDisable;
499
500    if( PcrCfg->LiveJitterDisable != BXPT_PCR_JitterCorrection_eAuto )
501    {
502        LiveJitterDisable = PcrCfg->LiveJitterDisable;
503    }
504    hXpt->LiveJitterDisable[ hPcr->ChannelNo ] = PcrCfg->LiveJitterDisable;
505
506    Reg = BREG_Read32(hRegister, BCHP_XPT_DPCR_PP_PP_CTRL );
507    Reg &= ~(
508        BCHP_MASK( XPT_DPCR_PP_PP_CTRL , PP_JITTER_TIMESTAMP_MODE ) |
509        BCHP_MASK( XPT_DPCR_PP_PP_CTRL , PP_PLAYBACK_PCR_JITTER_DIS ) |
510        BCHP_MASK( XPT_DPCR_PP_PP_CTRL , PP_LIVE_PCR_JITTER_DIS )
511        ); 
512    Reg |= ( 
513        BCHP_FIELD_DATA( XPT_DPCR_PP_PP_CTRL, PP_JITTER_TIMESTAMP_MODE, JitterTimestamp ) |
514        BCHP_FIELD_DATA( XPT_DPCR_PP_PP_CTRL, PP_PLAYBACK_PCR_JITTER_DIS, PbJitterDisable ) |
515        BCHP_FIELD_DATA( XPT_DPCR_PP_PP_CTRL, PP_LIVE_PCR_JITTER_DIS, LiveJitterDisable )
516        );
517    BREG_Write32( hRegister, BCHP_XPT_DPCR_PP_PP_CTRL, Reg );
518
519    Reg = BREG_Read32(hRegister, BCHP_XPT_DPCR0_PID_CH  + hPcr->RegOffset);
520    Reg &= ~(
521        BCHP_MASK( XPT_DPCR0_PID_CH , PCR_PID_CH_VALID ) |
522        BCHP_MASK( XPT_DPCR0_PID_CH , PCR_PID_CH )
523        ); 
524    Reg |= BCHP_FIELD_DATA( XPT_DPCR0_PID_CH, PCR_PID_CH, PcrCfg->PidChannel );
525    BREG_Write32( hRegister, BCHP_XPT_DPCR0_PID_CH + hPcr->RegOffset, Reg);
526    BREG_Write32( hRegister, BCHP_XPT_DPCR0_MAX_PCR_ERROR + hPcr->RegOffset, PcrCfg->MaxPcrError );
527   
528    /* Set the timebase select to xpt source */
529    ret = BERR_TRACE( BXPT_PCR_P_Lock2Source( hPcr, BXPT_PCR_TimeRef_eXpt, NULL ));
530
531    Reg = BREG_Read32(hRegister, BCHP_XPT_DPCR0_LOOP_CTRL+ hPcr->RegOffset);
532    Reg &= ~(
533        BCHP_MASK( XPT_DPCR0_LOOP_CTRL, FILT_C ) |
534        BCHP_MASK( XPT_DPCR0_LOOP_CTRL, FILT_B ) |
535        BCHP_MASK( XPT_DPCR0_LOOP_CTRL, FILT_A )
536    );
537    Reg |= (
538        BCHP_FIELD_DATA( XPT_DPCR0_LOOP_CTRL, FILT_C, PcrCfg->TimebaseCfg.FiltC ) |
539        BCHP_FIELD_DATA( XPT_DPCR0_LOOP_CTRL, FILT_B, PcrCfg->TimebaseCfg.FiltB ) |
540        BCHP_FIELD_DATA( XPT_DPCR0_LOOP_CTRL, FILT_A, PcrCfg->TimebaseCfg.FiltA )
541    );
542    BREG_Write32( hRegister, BCHP_XPT_DPCR0_LOOP_CTRL + hPcr->RegOffset, Reg);
543
544    SetPcrIncAndPrescale( hPcr, &PcrCfg->TimebaseCfg );
545
546    /* Set PCR Valid bit to 1 */
547    Reg = BREG_Read32(hRegister, BCHP_XPT_DPCR0_PID_CH  + hPcr->RegOffset);
548    Reg |= BCHP_FIELD_DATA( XPT_DPCR0_PID_CH, PCR_PID_CH_VALID, 1 );
549    BREG_Write32( hRegister, BCHP_XPT_DPCR0_PID_CH + hPcr->RegOffset, Reg);
550
551    Done:
552    BDBG_LEAVE(BXPT_PCR_SetStreamPcrConfig_isr);
553
554    return ret;
555}
556
557void BXPT_PCR_RefreshPcrPid( 
558    BXPT_PCR_Handle hPcr             
559    )
560{
561    BKNI_EnterCriticalSection();
562    BXPT_PCR_RefreshPcrPid_isr(hPcr);
563    BKNI_LeaveCriticalSection();
564    return ;
565}
566
567
568void BXPT_PCR_RefreshPcrPid_isr( 
569    BXPT_PCR_Handle hPcr               /*[in] The pcr handle  */
570    )
571{
572    uint32_t Reg;
573   
574    Reg = BREG_Read32(hPcr->hRegister, BCHP_XPT_DPCR0_PID_CH  + hPcr->RegOffset);
575    Reg &= ~(BCHP_MASK( XPT_DPCR0_PID_CH , PCR_PID_CH_VALID )); 
576    Reg |= BCHP_FIELD_DATA( XPT_DPCR0_PID_CH, PCR_PID_CH_VALID, 1 );
577    BREG_Write32( hPcr->hRegister, BCHP_XPT_DPCR0_PID_CH + hPcr->RegOffset, Reg);
578    return;
579}
580
581BERR_Code   BXPT_PCR_GetLastPcr( 
582    BXPT_PCR_Handle hPcr,             
583    uint32_t *p_pcrHi,           
584    uint32_t *p_pcrLo             
585    )
586{
587    BERR_Code ret = BERR_SUCCESS;
588
589    BKNI_EnterCriticalSection();
590    ret = BXPT_PCR_GetLastPcr_isr(hPcr, p_pcrHi, p_pcrLo);
591    BKNI_LeaveCriticalSection();
592    return ret;
593}
594
595BERR_Code   BXPT_PCR_GetLastPcr_isr( 
596    BXPT_PCR_Handle hPcr,             
597    uint32_t *p_pcrHi,           
598    uint32_t *p_pcrLo             
599    )
600{
601    BREG_Handle         hRegister = hPcr->hRegister;
602    uint32_t            Reg;
603    BERR_Code           ret = BERR_SUCCESS;
604    uint32_t            Offset = hPcr->RegOffset;
605    bool                PacketMode;
606
607    BDBG_ENTER(BXPT_PCR_GetLastPcr);
608   
609    Reg = BREG_Read32(hRegister, BCHP_XPT_DPCR0_CTRL + Offset);
610    PacketMode = (bool) BCHP_GET_FIELD_DATA(Reg, XPT_DPCR0_CTRL, PCR_PACKET_MODE);
611    if ( PacketMode )
612    {
613        BDBG_ERR(("Unsupported PI for this mode"));
614        ret = BERR_TRACE(BERR_INVALID_PARAMETER);
615        return ret;
616    }   
617    *p_pcrHi = BREG_Read32(hRegister,BCHP_XPT_DPCR0_LAST_PCR_HI + Offset);
618    *p_pcrLo = BREG_Read32(hRegister,BCHP_XPT_DPCR0_LAST_PCR_LO + Offset);
619
620    BDBG_LEAVE(BXPT_PCR_GetLastPcr);
621
622    return ret;
623
624}
625
626BERR_Code   BXPT_PCR_GetPhaseError_isr( 
627    BXPT_PCR_Handle hPcr,             
628    int32_t *p_error
629    )
630{
631    BREG_Handle         hRegister = hPcr->hRegister;
632    uint32_t            Reg;
633    bool                sign;
634    uint32_t            magnitude;
635    BERR_Code           ret = BERR_SUCCESS;
636    uint32_t            Offset = hPcr->RegOffset;
637
638    BDBG_ENTER(BXPT_PCR_GetPhaseError_isr);
639   
640    Reg = BREG_Read32(hRegister,BCHP_XPT_DPCR0_PHASE_ERROR + Offset);
641    Reg = BCHP_GET_FIELD_DATA(Reg, XPT_DPCR0_PHASE_ERROR, PHASE_ERROR);
642
643        /* stored as 2's complement */
644    sign = (bool)((Reg & 0x100000) >> 20); /* sign bit is bit 20 */
645        magnitude = Reg;
646    if (sign) magnitude = ~Reg + 1; /* 2's complement */
647    magnitude &= 0x0fffff; /* magnitude is 19 to 0 */
648
649    /*  bits 10:1 of pcr base - stc base are stored in 19:10 here.
650        bit 9 has bit 0 of base diff. bits 8:0 have extension diff. */
651        *p_error = (sign ? -1 : 1) * (magnitude >> 9);
652    BDBG_LEAVE(BXPT_PCR_GetPhaseError_isr);
653
654    return ret;
655
656}
657
658
659BERR_Code   BXPT_PCR_GetStc( 
660    BXPT_PCR_Handle hPcr,           
661    uint32_t *p_stcHi,         
662    uint32_t *p_stcLo           
663    )
664{
665    BREG_Handle         hRegister = hPcr->hRegister;
666    uint32_t            Reg;
667    BERR_Code           ret = BERR_SUCCESS;
668    uint32_t            Offset = hPcr->RegOffset;
669    bool                PacketMode;
670
671    BDBG_ENTER(BXPT_PCR_GetStc);
672    Reg = BREG_Read32(hRegister, BCHP_XPT_DPCR0_CTRL + Offset);
673    PacketMode = (bool) BCHP_GET_FIELD_DATA(Reg, XPT_DPCR0_CTRL, PCR_PACKET_MODE);
674    if ( PacketMode )
675    {
676        BDBG_ERR(("Unsupported PI for this mode"));
677        ret = BERR_TRACE(BERR_INVALID_PARAMETER);
678        return ret;
679    }   
680    *p_stcHi = BREG_Read32(hRegister,BCHP_XPT_DPCR0_STC_HI+Offset);
681    *p_stcLo = BREG_Read32(hRegister,BCHP_XPT_DPCR0_STC_LO+Offset);
682    BDBG_LEAVE(BXPT_PCR_GetStc);
683
684    return ret;
685}
686
687
688BERR_Code   BXPT_PCR_SetStcExtRateControl( 
689    BXPT_PCR_Handle hPcr,                                           
690    const BXPT_PCR_STCExtRateConfig  *StcExtRateCfg
691    )
692{
693
694    uint32_t            Reg;
695    uint32_t            Offset = hPcr->RegOffset;
696    BERR_Code           ret = BERR_SUCCESS;
697    BREG_Handle         hRegister = hPcr->hRegister;
698
699    BDBG_ENTER(BXPT_PCR_SetStcExtRateControl);
700
701    Reg = BREG_Read32(hRegister, BCHP_XPT_DPCR0_STC_EXT_CTRL+Offset);
702
703    Reg &= ~(
704        BCHP_MASK( XPT_DPCR0_STC_EXT_CTRL, PRESCALE ) |
705        BCHP_MASK( XPT_DPCR0_STC_EXT_CTRL, INC_VAL )
706        );
707
708    Reg |= (
709        BCHP_FIELD_DATA(XPT_DPCR0_STC_EXT_CTRL,PRESCALE,StcExtRateCfg->Prescale)|
710        BCHP_FIELD_DATA(XPT_DPCR0_STC_EXT_CTRL,INC_VAL,StcExtRateCfg->Inc)
711        );
712    BREG_Write32( hRegister, BCHP_XPT_DPCR0_STC_EXT_CTRL+Offset, Reg);
713
714    BDBG_LEAVE(BXPT_PCR_SetStcExtRateControl);
715
716    return ret;
717}
718
719BERR_Code   BXPT_PCR_ConfigNonStreamTimeBase( 
720    BXPT_PCR_Handle hPcr,                         
721    BXPT_PCR_TimeRef  eNonStreamTimeBaseCfg, 
722    BXPT_PCR_TimebaseFreqRefConfig *Timebasefreq
723    )
724{
725    BERR_Code  ret = BERR_SUCCESS;
726
727    BDBG_ENTER(BXPT_PCR_ConfigNonStreamTimeBase);
728    BDBG_ASSERT( Timebasefreq );   
729    if (eNonStreamTimeBaseCfg == BXPT_PCR_TimeRef_eXpt) 
730    {
731        ret = BERR_TRACE(BERR_INVALID_PARAMETER);
732        goto Done;
733    }   
734       
735    if ( eNonStreamTimeBaseCfg >= BXPT_PCR_TimeRef_eMax )
736    {
737        BDBG_ERR(( "Unsupported BXPT_PCR_TimeRef" )); 
738        ret = BERR_TRACE(BERR_INVALID_PARAMETER);
739        goto Done;
740    }   
741    BXPT_PCR_P_Lock2Source( hPcr,eNonStreamTimeBaseCfg, Timebasefreq);
742
743    Done:
744    BDBG_LEAVE(BXPT_PCR_ConfigNonStreamTimeBase);
745    return ret;
746
747}
748
749
750BERR_Code   BXPT_PCR_GetTimeBaseFreqRefDefaults( 
751    BXPT_PCR_Handle hPcr,                         
752    BXPT_PCR_TimeRef TimeBase, 
753    BXPT_PCR_TimebaseFreqRefConfig *Def
754    )
755{
756    BERR_Code  ret = BERR_SUCCESS;
757
758    BDBG_ENTER(BXPT_PCR_GetTimeBaseFreqRefDefaults);
759    BDBG_ASSERT( Def ); 
760    BSTD_UNUSED( hPcr );
761
762    Def->Prescale = 0; 
763    Def->Inc = 1;       
764    Def->FiltA = RESET_FILTA;       
765    Def->FiltB = RESET_FILTB;       
766    Def->FiltC = RESET_FILTC;       
767
768    switch( TimeBase )
769    {
770        case BXPT_PCR_TimeRef_eI656_Vl:         /* Lock to ITU 656 VSync */
771        Def->Prescale = 0; 
772        Def->Inc = 450450;     
773        Def->FiltA = 7;     
774        Def->FiltB = 4;     
775        Def->FiltC = 1; 
776        break; 
777
778        case BXPT_PCR_TimeRef_eI656_Fl:         /* Lock to ITU 656 Frame Sync */
779        Def->Prescale = 0; 
780        Def->Inc = 900900;     
781        Def->FiltA = 7;     
782        Def->FiltB = 4;     
783        Def->FiltC = 1; 
784        break; 
785
786            case BXPT_PCR_TimeRef_eInternal:
787        Def->Prescale = 243; 
788        Def->Inc = 249856;     
789        Def->FiltA = 7;     
790        Def->FiltB = 4;     
791        Def->FiltC = 1;
792                break;
793
794        default:    /* Use defaults set before the switch() */
795        break;
796    }
797
798    BDBG_LEAVE(BXPT_PCR_GetTimeBaseFreqRefDefaults);
799
800    return ret;
801}                                       
802
803BERR_Code   BXPT_PCR_GetfreqRefConfig( 
804    BXPT_PCR_Handle hPcr,                               
805    BXPT_PCR_TimebaseFreqRefConfig  *TimebaseFreqConfig
806    )
807{
808    uint32_t            Reg;
809    BREG_Handle         hRegister = hPcr->hRegister;
810
811    BERR_Code  ret = BERR_SUCCESS;
812
813    BDBG_ENTER(BXPT_PCR_GetfreqRefConfig);
814
815    GetPcrIncAndPrescale( hPcr, TimebaseFreqConfig );
816
817    Reg = BREG_Read32( hRegister, BCHP_XPT_DPCR0_LOOP_CTRL + hPcr->RegOffset );
818    TimebaseFreqConfig->FiltA = BCHP_GET_FIELD_DATA( Reg, XPT_DPCR0_LOOP_CTRL, FILT_A );
819    TimebaseFreqConfig->FiltB = BCHP_GET_FIELD_DATA( Reg, XPT_DPCR0_LOOP_CTRL, FILT_B );
820    TimebaseFreqConfig->FiltC = BCHP_GET_FIELD_DATA( Reg, XPT_DPCR0_LOOP_CTRL, FILT_C );
821
822    BDBG_LEAVE(BXPT_PCR_GetfreqRefConfig);
823
824    return ret;
825
826}
827
828
829void BXPT_PCR_FreezeIntegrator( 
830    BXPT_PCR_Handle hPcr,    /* [in] The pcr handle  */
831    bool Freeze              /* [in] Freeze integrator if true, run if false. */
832    )
833{
834    uint32_t Reg;
835       
836    Reg = BREG_Read32( hPcr->hRegister, BCHP_XPT_DPCR0_LOOP_CTRL + hPcr->RegOffset );
837    Reg &= ~( BCHP_MASK( XPT_DPCR0_LOOP_CTRL, FREEZE_INTEGRATOR ));
838    Reg |= BCHP_FIELD_DATA( XPT_DPCR0_LOOP_CTRL, FREEZE_INTEGRATOR, Freeze == true ? 1 : 0 ); 
839    BREG_Write32( hPcr->hRegister, BCHP_XPT_DPCR0_LOOP_CTRL + hPcr->RegOffset, Reg );
840
841    /* Freezing the integrator requires stopping PCR processing, so mark the PCR PID as invalid */
842    Reg = BREG_Read32(hPcr->hRegister, BCHP_XPT_DPCR0_PID_CH  + hPcr->RegOffset);
843    Reg &= ~(BCHP_MASK( XPT_DPCR0_PID_CH , PCR_PID_CH_VALID )); 
844    Reg |= BCHP_FIELD_DATA( XPT_DPCR0_PID_CH, PCR_PID_CH_VALID, Freeze == true ? 0 : 1 );
845    BREG_Write32( hPcr->hRegister, BCHP_XPT_DPCR0_PID_CH + hPcr->RegOffset, Reg);
846}
847
848void BXPT_PCR_SetCenterFrequency( 
849    BXPT_PCR_Handle hPcr,       /* [in] The pcr handle  */
850    uint32_t CenterFreq         /* [in] Center frequency */
851    )
852{                                           
853    uint32_t Reg;
854       
855    Reg = BREG_Read32( hPcr->hRegister, BCHP_XPT_DPCR0_CENTER + hPcr->RegOffset );
856
857    Reg &= ~( BCHP_MASK( XPT_DPCR0_CENTER, CENTER ));
858    Reg |= BCHP_FIELD_DATA( XPT_DPCR0_CENTER, CENTER, CenterFreq ); 
859
860    BREG_Write32( hPcr->hRegister, BCHP_XPT_DPCR0_CENTER + hPcr->RegOffset, Reg );
861}
862
863void BXPT_PCR_SetTimeRefTrackRange( 
864    BXPT_PCR_Handle hPcr,                         
865    BXPT_PCR_RefTrackRange TrackRange
866    )
867{
868    uint32_t Reg;
869       
870    Reg = BREG_Read32( hPcr->hRegister, BCHP_XPT_DPCR0_LOOP_CTRL + hPcr->RegOffset );
871
872    Reg &= ~( BCHP_MASK( XPT_DPCR0_LOOP_CTRL, TRACK_RANGE ));
873    Reg |= BCHP_FIELD_DATA( XPT_DPCR0_LOOP_CTRL, TRACK_RANGE, TrackRange ); 
874
875    BREG_Write32( hPcr->hRegister, BCHP_XPT_DPCR0_LOOP_CTRL + hPcr->RegOffset, Reg );
876
877}
878
879void BXPT_PCR_SetPhaseErrorClampRange( 
880        BXPT_PCR_Handle hPcr,                                         
881        BXPT_PCR_PhaseErrorClampRange ClampRange
882    )
883{
884    uint32_t Reg;
885       
886    Reg = BREG_Read32( hPcr->hRegister, BCHP_XPT_DPCR0_PHASE_ERROR_CLAMP + hPcr->RegOffset );
887    Reg &= ~( BCHP_MASK( XPT_DPCR0_PHASE_ERROR_CLAMP, PHASE_ERROR_CLAMP_RANGE ));
888    Reg |= BCHP_FIELD_DATA( XPT_DPCR0_PHASE_ERROR_CLAMP, PHASE_ERROR_CLAMP_RANGE, ClampRange ); 
889    BREG_Write32( hPcr->hRegister, BCHP_XPT_DPCR0_PHASE_ERROR_CLAMP + hPcr->RegOffset, Reg );
890}
891
892static void SetPcrIncAndPrescale( 
893    BXPT_PCR_Handle hPcr, 
894    const BXPT_PCR_TimebaseFreqRefConfig *Timebasefreq
895    )
896{
897    uint32_t Reg;
898    BREG_Handle         hRegister = hPcr->hRegister;
899   
900    Reg = BREG_Read32(hRegister, BCHP_XPT_DPCR0_REF_PCR_PRESCALE + hPcr->RegOffset);
901    Reg &= ~(
902        BCHP_MASK( XPT_DPCR0_REF_PCR_PRESCALE, PRESCALE ) 
903        );
904    Reg |= (
905        BCHP_FIELD_DATA( XPT_DPCR0_REF_PCR_PRESCALE, PRESCALE, Timebasefreq->Prescale )
906        );
907    BREG_Write32( hRegister, BCHP_XPT_DPCR0_REF_PCR_PRESCALE + hPcr->RegOffset, Reg);                                                   
908
909    Reg = BREG_Read32(hRegister, BCHP_XPT_DPCR0_REF_PCR_INC + hPcr->RegOffset);
910    Reg &= ~(
911        BCHP_MASK( XPT_DPCR0_REF_PCR_INC, PCR_INC )               
912        );
913    Reg |= (
914        BCHP_FIELD_DATA( XPT_DPCR0_REF_PCR_INC, PCR_INC, Timebasefreq->Inc )
915        );
916    BREG_Write32( hRegister, BCHP_XPT_DPCR0_REF_PCR_INC + hPcr->RegOffset, Reg);
917}
918
919static void GetPcrIncAndPrescale(
920    BXPT_PCR_Handle hPcr, 
921    BXPT_PCR_TimebaseFreqRefConfig  *TimebaseFreqConfig
922    )
923{
924    uint32_t            Reg;
925    BREG_Handle         hRegister = hPcr->hRegister;
926
927    Reg = BREG_Read32(hRegister, BCHP_XPT_DPCR0_REF_PCR_INC + hPcr->RegOffset);
928    TimebaseFreqConfig->Inc =  BCHP_GET_FIELD_DATA( Reg, XPT_DPCR0_REF_PCR_INC,PCR_INC );
929    Reg = BREG_Read32(hRegister, BCHP_XPT_DPCR0_REF_PCR_PRESCALE + hPcr->RegOffset);
930    TimebaseFreqConfig->Prescale = BCHP_GET_FIELD_DATA( Reg, XPT_DPCR0_REF_PCR_PRESCALE, PRESCALE );
931}
932
933
934BERR_Code BXPT_PCR_GetIntId(
935    unsigned WhichPcr, 
936    BXPT_PCR_IntName Name,
937    BINT_Id *IntId
938    )
939{
940    uint32_t RegAddr;   
941    BERR_Code ExitCode = BERR_SUCCESS;
942
943    BDBG_ASSERT( IntId ); 
944
945    if(WhichPcr >= BXPT_NUM_PCRS) 
946    {
947        BDBG_ERR(("Pcr number %u exceeds max PCR channels (%u)!",WhichPcr, BXPT_NUM_PCRS));
948        ExitCode = BERR_TRACE(BERR_INVALID_PARAMETER);
949        goto Done;
950    }
951
952    switch( Name ) 
953    {
954        case BXPT_PCR_IntName_ePhaseCompare:
955        case BXPT_PCR_IntName_eTwoPcrErrors:
956        RegAddr = BCHP_XPT_DPCR0_INTR_STATUS_REG + ( WhichPcr * BXPT_PCR_P_REGOFFSET );
957        *IntId = BCHP_INT_ID_CREATE( RegAddr, Name );
958        break;
959   
960        default:
961        BDBG_ERR(( "Unsupported interrupt enum %u", (unsigned) Name ));
962        ExitCode = BERR_TRACE(BERR_INVALID_PARAMETER);
963        break;
964    }
965
966    Done:
967    return( ExitCode );
968}
969
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